JP2022027680A - Photoelectric conversion semiconductor device - Google Patents

Photoelectric conversion semiconductor device Download PDF

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JP2022027680A
JP2022027680A JP2020131313A JP2020131313A JP2022027680A JP 2022027680 A JP2022027680 A JP 2022027680A JP 2020131313 A JP2020131313 A JP 2020131313A JP 2020131313 A JP2020131313 A JP 2020131313A JP 2022027680 A JP2022027680 A JP 2022027680A
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JP6818208B1 (en
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良昭 萩原
Yoshiaki Hagiwara
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Abstract

To improve the efficiency of photoelectric conversion.SOLUTION: In the depth direction of a photoelectric conversion semiconductor device 1, front and back sides of an N region 4 are sandwiched between P regions 3, 5, and furthermore, the front side of the P region 3 and the back side of the P region 5 are sandwiched between P+ region 2 and P+ region 6 for concentration gradient type barrier electric field generation to form a P+PNPP+ junction 7. A photosensitive window region 8 and an outer electrode 9 of a first polarity are provided on the front side of the P+ region 2, and an outer electrode 10 of a first polarity is provided on the back side of the P+ region 6. An N+ region 11 for photoelectron absorption is provided in the center of the depth direction of an N region 4, and an outer surface electrode 12 of a second polarity is provided on the outside of the N+ region 11. The outer surface electrodes 9, 10 of the first polarity are connected to ground, and a capacitance 30 for charge storage is connected between an outer surface electrode 12 of the second polarity and ground.SELECTED DRAWING: Figure 1

Description

本発明は光電変換半導体装置に係り、とくに光電変換半導体装置内に生じた光電子の再結合を抑制することでエネルギー変換効率を改善するようにした光電変換半導体装置に関する。 The present invention relates to a photoelectric conversion semiconductor device, and more particularly to a photoelectric conversion semiconductor device in which energy conversion efficiency is improved by suppressing recoupling of photoelectrons generated in the photoelectric conversion semiconductor device.

地球温暖化を抑制する自然エネルギーとして太陽光発電が注目されている。太陽光発電には、N型半導体領域とP型半導体領域を隣接させたPN接合を有し、光照射で生じた光電子と正孔を各々、PN接合の空乏層内に生じるPN接合型バリア電界によりN型半導体領域側とP型半導体領域側に分離させて、N型半導体領域のPN接合とは反対側端部と、P型半導体領域のPN接合とは反対側端部の間に光起電力を生じさせるようにした光電変換半導体装置が用いられる。
ところで、太陽光のエネルギー密度は薄く、発電量を増やそうとすると大規模な施設が必要となる。このため、太陽光発電の普及には、太陽電池の変換効率の更なる改善が重要である。
Photovoltaic power generation is attracting attention as a natural energy source that suppresses global warming. The solar power generation has a PN junction in which an N-type semiconductor region and a P-type semiconductor region are adjacent to each other, and a PN junction type barrier electric field in which photoelectrons and holes generated by light irradiation are generated in a poor layer of the PN junction, respectively. The N-type semiconductor region side and the P-type semiconductor region side are separated by A photoelectric conversion semiconductor device capable of generating electric power is used.
By the way, the energy density of solar power is low, and a large-scale facility is required to increase the amount of power generation. Therefore, further improvement of the conversion efficiency of solar cells is important for the spread of photovoltaic power generation.

変換効率の改善策の一つとして従来、例えば特開昭53-10987号公報や特開平07-297444号公報に示す如く、光電変換半導体装置の表面と平行なPN接合面を深さ方向(上下方向)に複数個形成する手法が提案されていた。
けれども、上記した特開昭53-10987号公報や特開平07-297444号公報の光電変換半導体装置では、光電子はN領域のエネルギー準位の低い場所に移動して滞留するが、その滞留した光電子の量に応じてN領域の電位は固定されずに変動し、滞留した光電子がN領域の空乏層を狭めて光電子・空孔の再結合を促進したり、光電変換半導体装置の表面近くで再結合が起き易く、変換効率の向上に限界があった。
As one of the measures for improving the conversion efficiency, conventionally, as shown in JP-A-53-10987 and JP-A-07-297444, for example, the PN junction surface parallel to the surface of the photoelectric conversion semiconductor device is formed in the depth direction (up and down). A method of forming a plurality of pieces in the direction) has been proposed.
However, in the photoelectric conversion semiconductor device of JP-A-53-10987 and JP-A-07-297444 described above, photoelectrons move to a place having a low energy level in the N region and stay there, but the staying photoelectrons The potential of the N region fluctuates without being fixed according to the amount of the Bonding is likely to occur, and there is a limit to the improvement of conversion efficiency.

本発明は上記した従来技術の問題に鑑みなされたもので、光電変換の変換効率の向上を図った光電変換半導体装置を提供することを、その目的とする。 The present invention has been made in view of the above-mentioned problems of the prior art, and an object of the present invention is to provide a photoelectric conversion semiconductor device in which the conversion efficiency of photoelectric conversion is improved.

請求項1記載の発明では、
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に、表側から裏側に向かう深さ方向にN領域の表裏両側を表側のP領域及び裏側のP領域で挟み、更に当該表側のP領域の表側と裏側のP領域の裏側を、P+Pの濃度勾配により生じる濃度勾配型バリア電界生成用の表側のP+領域と裏側のP+領域とで挟んだP+PNPP+接合部を設け、
前記表側のP+領域の表側に、受光窓領域及び当該表側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記裏側のP+領域の裏側に、該裏側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の深さ方向の中央部に、該N領域と接触するようにして光電子吸出し用のN+領域を設け、
前記N+領域の外側に、該N+領域と導通した第2の極性の外面電極を設け、
前記各第1の極性の外面電極をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴としている。
請求項2記載の発明では、
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内にN領域を設け、
該N領域の裏側左右端部近くの一部を除く表側、裏側、側面側を囲むようにしてP領域を設け、
該P領域の表側に、該P領域の表面に接触するようにして表側のP+領域を設け、
前記P領域の裏側に、該P領域の表面に接触するようにして裏側のP+領域を設け、
前記表側のP+領域の表側に、受光窓領域及び当該表側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記裏側のP+領域の裏側に、該裏側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の裏側の左右端部近くに、当該N領域と接触するようにして光電子吸出し用のN+領域を設け、
N+領域の裏側に、当該N+領域と導通した第2の極性の外面電極を設け、
前記各第1の極性の外面電極をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴としている。
請求項3記載の発明では、
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に設けたN領域の裏側中央部を除く表側、裏側、側面側を囲むようにしてP領域を設け、
該P領域の表側に、該P領域の表面に接触するようにして表側のP+領域を設け、
前記P領域の裏側に、該P領域の表面に接触するようにして裏側のP+領域を設け、
前記表側のP+領域の表側に、受光窓領域及び当該表側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記裏側のP+領域の裏側に、当該裏側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の裏側の中央部に、当該N領域に接触するようにして光電子吸出し用のN+領域を設け、
N+領域の裏側に、当該N+領域と導通した第2の極性の外面電極を設け、
前記各第1の極性の外面電極をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴としている。
請求項4記載の発明では、
面側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に設けた断面がくし形のN領域の裏側を除く表側と側面側を囲むようにしてP領域を設け、
該P領域の表側に、該P領域の表面に接触するようにしてP+領域を設け、
該P+領域の表側に、受光窓領域及び当該P+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の裏側に、該N領域と接触するようにして光電子吸出し用のN+領域を設け、
N+領域の裏側に、当該N+領域と導通した第2の極性の外面電極を設け、
第1の極性の外面電極をグランドに接続し、第2の極性の外面電極とグランドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴としている。
請求項5記載の発明では、
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に設けた断面がくし形のN領域の裏側中央部を除く表側、裏側、側面側を囲むようにしてP領域を設け、
該P領域の表側に、該P領域の表面に接触するようにして表側のP+領域を設け、
前記P領域の裏側に、該P領域の表面に接触するようにして裏側のP+領域を設け、
前記表側のP+領域の表側に、受光窓領域及び当該表側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記裏側のP+領域の裏側に、当該裏側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の裏側の中央部に、該N領域と接触するようにして光電子吸出し用のN+領域を設け、
N+領域の裏側に、該N+領域と導通した第2の極性の外面電極を設け、
前記各第1の極性の外面電極をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴としている。
請求項6記載の発明では、
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に光電変換層を設け、
この光電変換層は、
光電変換半導体装置内に設けたN領域と、
該N領域の表側中央部を除く表側に、当該N領域の表面に接触するようにして設けた表側のP領域と、
前記N領域の裏側に、当該N領域の表面に接触するようにして設けた裏側のP領域と、
前記表側のP領域の表側の全部または一部と側面側、前記N領域の側面側、前記裏側のP領域の裏側と側面側を囲むようにして設けたP+領域と、
前記N領域の表側の中央部に、当該N領域と接触するようにして設けた表側のN+領域と、
を含み、
前記光電変換部の表側に、受光窓領域と、前記P+領域の表面と導通した第1の極性の外面電極と、前記N+領域と導通した第2の極性の外面電極を設け、
前記P+領域の裏側に、第2のN領域と第2のN+領域の内、少なくとも一方を介して金属製反射領域を設け、
前記第1の極性の外面電極と金属製反射領域をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴としている。
各請求項において、N+領域をN領域に埋め込むように設けても良い。
In the invention according to claim 1,
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
Inside the photoelectric conversion semiconductor device, both the front and back sides of the N region are sandwiched between the front side P region and the back side P region in the depth direction from the front side to the back side, and the front side and the back side of the back side P region of the front side P region are further sandwiched. , A P + PNPP + junction sandwiched between the P + region on the front side and the P + region on the back side for generating a concentration gradient type barrier electric field generated by the concentration gradient of P + P is provided.
On the front side of the P + region on the front side, an outer surface electrode having a first polarity conducting with the surface of the light receiving window region and the P + region on the front side is provided.
On the back side of the P + region on the back side, an outer surface electrode having a first polarity conducting with the surface of the P + region on the back side is provided.
An N + region for sucking photoelectrons is provided at the center of the N region in the depth direction so as to be in contact with the N region.
An outer surface electrode having a second polarity conducting with the N + region is provided outside the N + region.
The outer electrode of each first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
It is characterized by.
In the invention according to claim 2,
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
An N region is provided in the photoelectric conversion semiconductor device, and
A P region is provided so as to surround the front side, the back side, and the side surface side except for a part near the left and right ends on the back side of the N region.
On the front side of the P region, a P + region on the front side is provided so as to be in contact with the surface of the P region.
On the back side of the P region, a P + region on the back side is provided so as to be in contact with the surface of the P region.
On the front side of the P + region on the front side, an outer surface electrode having a first polarity conducting with the surface of the light receiving window region and the P + region on the front side is provided.
On the back side of the P + region on the back side, an outer surface electrode having a first polarity conducting with the surface of the P + region on the back side is provided.
An N + region for sucking photoelectrons is provided near the left and right ends on the back side of the N region so as to be in contact with the N region.
An outer surface electrode having a second polarity conducting with the N + region is provided on the back side of the N + region.
The outer electrode of each first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
It is characterized by.
In the invention according to claim 3,
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
A P region is provided so as to surround the front side, the back side, and the side surface side excluding the back side central portion of the N region provided in the photoelectric conversion semiconductor device.
On the front side of the P region, a P + region on the front side is provided so as to be in contact with the surface of the P region.
On the back side of the P region, a P + region on the back side is provided so as to be in contact with the surface of the P region.
On the front side of the P + region on the front side, an outer surface electrode having a first polarity conducting with the surface of the light receiving window region and the P + region on the front side is provided.
On the back side of the P + region on the back side, an outer surface electrode having a first polarity conducting with the surface of the P + region on the back side is provided.
An N + region for sucking photoelectrons is provided in the central portion on the back side of the N region so as to be in contact with the N region.
An outer surface electrode having a second polarity conducting with the N + region is provided on the back side of the N + region.
The outer electrode of each first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
It is characterized by.
In the invention according to claim 4,
It is a photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the surface side.
A P region is provided so as to surround the front side and the side surface side excluding the back side of the N region having a comb-shaped cross section provided in the photoelectric conversion semiconductor device.
A P + region is provided on the front side of the P region so as to be in contact with the surface of the P region.
On the front side of the P + region, an outer surface electrode having a first polarity conducting with the light receiving window region and the surface of the P + region is provided.
An N + region for sucking photoelectrons is provided on the back side of the N region so as to be in contact with the N region.
An outer surface electrode having a second polarity conducting with the N + region is provided on the back side of the N + region.
The outer electrode of the first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
It is characterized by.
In the invention according to claim 5,
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
A P region is provided so as to surround the front side, the back side, and the side surface side excluding the back side central portion of the N region having a comb-shaped cross section provided in the photoelectric conversion semiconductor device.
On the front side of the P region, a P + region on the front side is provided so as to be in contact with the surface of the P region.
On the back side of the P region, a P + region on the back side is provided so as to be in contact with the surface of the P region.
On the front side of the P + region on the front side, an outer surface electrode having a first polarity conducting with the surface of the light receiving window region and the P + region on the front side is provided.
On the back side of the P + region on the back side, an outer surface electrode having a first polarity conducting with the surface of the P + region on the back side is provided.
An N + region for sucking photoelectrons is provided in the central portion on the back side of the N region so as to be in contact with the N region.
On the back side of the N + region, an outer surface electrode having a second polarity conducting with the N + region is provided.
The outer electrode of each first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
It is characterized by.
In the invention according to claim 6,
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
A photoelectric conversion layer is provided in the photoelectric conversion semiconductor device, and the photoelectric conversion layer is provided.
This photoelectric conversion layer is
The N region provided in the photoelectric conversion semiconductor device and
On the front side excluding the central part of the front side of the N region, a P region on the front side provided in contact with the surface of the N region and a P region on the front side.
A P region on the back side provided on the back side of the N region so as to be in contact with the surface of the N region, and a P region on the back side.
All or part of the front side of the P region on the front side and the side surface side, the side surface side of the N region, and the P + region provided so as to surround the back side and the side surface side of the P region on the back side.
An N + region on the front side provided in contact with the N region at the center of the front side of the N region,
Including
On the front side of the photoelectric conversion unit, a light receiving window region, an outer surface electrode having a first polarity conducting with the surface of the P + region, and an outer surface electrode having a second polarity conducting with the N + region are provided.
A metal reflection region is provided on the back side of the P + region via at least one of the second N region and the second N + region.
The outer electrode of the first polarity and the metal reflection region are connected to the ground, and a charge storage capacity provided inside or outside the photoelectric conversion semiconductor device is provided between the outer electrode of the second polarity and the ground. Having connected,
It is characterized by.
In each claim, the N + region may be provided so as to be embedded in the N region.

本発明によれば、N領域のエネルギー準位の低い箇所に移動して来た光電子をN+領域へ吸い出し、N領域の空乏化状態を常に維持し、空乏層が狭くなるのを防止することにより、光電子・空孔の再結合を抑制が可能となる。またP+Pの濃度勾配により生じる濃度勾配型バリア電界により、表側や裏側の表面近くでの再結合の抑制もでき、変換効率の向上を図ることができる。
またP+領域の表面がグランド電位に固定されることで、サージ等の外乱の影響を受けにくくなるとともに、P+領域のごく表面近くの電界が零となることで、P+領域のごく表面近くで熱エネルギーを吸収して伝導帯に上がった電子がその場で直ちに空孔と再結合するので、表面暗電流となって外部または内部の容量を放電させてしまう恐れが少なくなり、変換効率の一層の向上を図ることができる。
According to the present invention, by sucking photoelectrons that have moved to a place where the energy level of the N region is low to the N + region, the depletion state of the N region is always maintained, and the depletion layer is prevented from narrowing. , It is possible to suppress the recombination of photoelectrons and vacancies. Further, the concentration gradient type barrier electric field generated by the concentration gradient of P + P can suppress recombination near the front surface and the back surface, and can improve the conversion efficiency.
In addition, since the surface of the P + region is fixed to the ground potential, it is less susceptible to disturbances such as surges, and the electric field near the surface of the P + region becomes zero, so that heat is generated near the surface of the P + region. Since the electrons that absorb energy and rise to the conduction band are immediately recombined with the vacancies on the spot, there is less risk of becoming a surface dark current and discharging the external or internal capacitance, further improving conversion efficiency. It can be improved.

図1は本発明の第1実施例に係る光電変換半導体装置の断面構造と外部回路の構成および不純物濃度プロファイルを示す説明図である(実施例1)。FIG. 1 is an explanatory diagram showing a cross-sectional structure of a photoelectric conversion semiconductor device according to the first embodiment of the present invention, a configuration of an external circuit, and an impurity concentration profile (Example 1). 図2は図1の光電変換半導体装置の不純物濃度プロファイルを示す説明図である。FIG. 2 is an explanatory diagram showing an impurity concentration profile of the photoelectric conversion semiconductor device of FIG. 図3は図1中のP+PNPP+接合部の深さ方向のエネルギーバンドを示す説明図である。FIG. 3 is an explanatory diagram showing an energy band in the depth direction of the P + PNPP + junction in FIG. 1. 図4は本発明の第2実施例に係る光電変換半導体装置の断面構造と外部回路の構成を示す構成図である(実施例2)。FIG. 4 is a configuration diagram showing a cross-sectional structure of a photoelectric conversion semiconductor device according to a second embodiment of the present invention and a configuration of an external circuit (Example 2). 図5は本発明の第3実施例に係る光電変換半導体装置の断面構造と外部回路の構成を示す構成図である(実施例3)。FIG. 5 is a configuration diagram showing a cross-sectional structure of a photoelectric conversion semiconductor device according to a third embodiment of the present invention and a configuration of an external circuit (Example 3). 図6は本発明の第4実施例に係る光電変換半導体装置の断面構造と外部回路の構成を示す構成図である(実施例4)。FIG. 6 is a configuration diagram showing a cross-sectional structure of a photoelectric conversion semiconductor device according to a fourth embodiment of the present invention and a configuration of an external circuit (Example 4). 図7は本発明の第5実施例に係る光電変換半導体装置の断面構造と外部回路の構成を示す構成図である(実施例5)。FIG. 7 is a configuration diagram showing a cross-sectional structure of a photoelectric conversion semiconductor device according to a fifth embodiment of the present invention and a configuration of an external circuit (Example 5). 図8は図7の光電変換半導体装置の種々の方向に沿ったエネルギーバンドを示す説明図である。FIG. 8 is an explanatory diagram showing energy bands along various directions of the photoelectric conversion semiconductor device of FIG. 7. 図9は本発明の第6実施例に係る光電変換半導体装置の断面構造と外部回路の構成を示す構成図である(実施例6)。FIG. 9 is a configuration diagram showing a cross-sectional structure of a photoelectric conversion semiconductor device according to a sixth embodiment of the present invention and a configuration of an external circuit (Example 6). 図10は本発明の第7実施例に係る光電変換半導体装置の断面構造と外部回路の構成を示す構成図である(実施例7)。FIG. 10 is a configuration diagram showing a cross-sectional structure of a photoelectric conversion semiconductor device according to a seventh embodiment of the present invention and a configuration of an external circuit (Example 7).

以下、本発明の最良の形態を実施例に基づき説明する。 Hereinafter, the best embodiment of the present invention will be described based on examples.

図1乃至図3を参照して本発明の第1実施例に係る光電変換半導体装置を説明する。図1は光電変換半導体装置の断面構造と外部回路を示す説明図、図2は図1の光電変換半導体装置の具体的な不純物濃度プロファイルを示す説明図、図3は図1中のP+PNPP+接合部の深さ方向のエネルギーバンドを示す説明図である。光電子のエネルギーレベルは光電変換半導体装置の表側及び裏側のP+領域内が一番高く、N+領域内が一番低くなる。
図1において、1は太陽光を受光して光起電力を発生する光電変換半導体装置であり、右側が表側表面(受光主面)、左側が裏側表面であり、深さ方向は右から左へ向かう方向である。表側表面から深さ方向にP+領域2、P領域3、N領域4、P領域5、P+領域6が多段接合されたP+PNPP+接合部7、P+領域2の表側表面に接触するように設けられた透明な受光窓領域としての絶縁性のSiO2領域8及びP+領域2の表側表面に接触するように設けられた第1の極性の外面電極9、P+領域6の裏側表面に接触するように設けられた第1の極性の外面電極10、N領域4の深さ方向の中央部に接触するようにして埋め込み状態で設けられた光電子吸出し用のN+領域11及びN+領域11の外側に設けられた第2の極性の外面電極12を備えている。表側と裏側のP領域3と5はここでは深さ方向の厚みが同一に形成されている例を示す。外面電極9はP+領域2と導通しており、外面電極10はP+領域6と導通しており、外面電極12はN+領域11と導通している。各外面電極9、10、12は金属製である。
The photoelectric conversion semiconductor device according to the first embodiment of the present invention will be described with reference to FIGS. 1 to 3. 1 is an explanatory view showing a cross-sectional structure and an external circuit of a photoelectric conversion semiconductor device, FIG. 2 is an explanatory view showing a specific impurity concentration profile of the photoelectric conversion semiconductor device of FIG. 1, and FIG. 3 is a P + PNPP + junction portion in FIG. It is explanatory drawing which shows the energy band in the depth direction of. The energy level of photoelectrons is highest in the P + region on the front side and the back side of the photoelectric conversion semiconductor device, and lowest in the N + region.
In FIG. 1, 1 is a photoelectric conversion semiconductor device that receives sunlight and generates photovoltaic power, the right side is the front surface (light receiving main surface), the left side is the back surface, and the depth direction is from right to left. The direction to go. The P + region 2, the P region 3, the N region 4, the P region 5, and the P + region 6 are provided so as to be in contact with the front surface of the P + PNPP + joint portion 7 and the P + region 2 to which the P + region 6 is joined in multiple stages in the depth direction from the front surface. Insulating SiO2 region 8 and P + region 2 as a transparent light receiving window region are provided so as to be in contact with the back surface of the first polar outer electrode 9 and P + region 6 provided so as to be in contact with the front surface. The outer electrode 10 having the first polarity and the N + region 11 and the N + region 11 for photoelectron suction provided in an embedded state so as to be in contact with the central portion of the N region 4 in the depth direction are provided outside the N + region 11. It is provided with an outer surface electrode 12 having two polarities. Here, P regions 3 and 5 on the front side and the back side show an example in which the thickness in the depth direction is the same. The outer surface electrode 9 is conducting with the P + region 2, the outer surface electrode 10 is conducting with the P + region 6, and the outer surface electrode 12 is conducting with the N + region 11. The outer surface electrodes 9, 10 and 12 are made of metal.

P+PNPP+接合部7は、N領域4の深さ方向の中央を中心にして表裏方向に略対称に形成されている。すなわち、N領域4の表裏両側を表側のP領域3及び裏側のP領域5で挟み、更に当該表側のP領域3の表外側と裏側のP領域の裏外側を、P+Pの濃度勾配により生じる濃度勾配型バリア電界生成用の表側のP+領域2と裏側のP+領域6で挟んで積層して成る。P領域3、N領域4、P領域5は深さ方向に2段のPN接合面を形成するものであり、N領域4とP領域3の接合面jk1を挟んだ上下両側(図1では左右両側)、N領域4とP領域5の接合面jk2を挟んだ上下両側(図1では左右両側)に、PN接合の空乏層内に生じるPN接合型バリア電界領域が形成される。 The P + PNPP + joint portion 7 is formed substantially symmetrically in the front and back directions with the center of the N region 4 in the depth direction as the center. That is, both sides of the front and back sides of the N region 4 are sandwiched between the front side P region 3 and the back side P region 5, and the front and outer sides of the front side P region 3 and the back side of the back side P region are the concentrations generated by the concentration gradient of P + P. It is laminated by sandwiching it between the P + region 2 on the front side and the P + region 6 on the back side for generating a gradient type barrier electric field. The P region 3, the N region 4, and the P region 5 form a two-stage PN junction surface in the depth direction, and both the upper and lower sides (left and right in FIG. 1) sandwich the junction surface jk1 of the N region 4 and the P region 3. A PN junction type barrier electric field region generated in the depletion layer of the PN junction is formed on both the upper and lower sides (both left and right in FIG. 1) sandwiching the junction surface jk2 of the N region 4 and the P region 5 (both sides).

表側のP+領域2は光電変換半導体装置1の表側表面近くでの光電子の再結合を抑制するため、P+Pの濃度勾配により生じる濃度勾配型バリア電界を生成するとともに、青色短波長の光成分に対する光電変換効率の改善をするために設けられた領域である。太陽光は短波長領域のエネルギー量が大きな割合を示すが、例えばシリコン半導体では、青色短波長の光は表面から0.2μm程度の深さまでしか内部に透過できない。この実施例では、受光面である表側表面近くのP+P濃度勾配型バリア電界が青色短波長の光入射で生じた光電子・正孔の再結合を抑制するようにしてあり、受光面近くでの光電変換が可能となる。表側のP+領域2とP領域3との境界面jk3を挟んだ上下両側(図1では左右両側)に濃度勾配型バリア電界領域が形成されている。 In order to suppress the recombination of photoelectrons near the front surface of the photoelectric conversion semiconductor device 1, the P + region 2 on the front side generates a concentration gradient type barrier electric field generated by the concentration gradient of P + P, and is photoelectric for a blue short wavelength optical component. This is an area provided to improve the conversion efficiency. Sunlight shows a large proportion of energy in the short wavelength region, but in silicon semiconductors, for example, blue short wavelength light can only pass through to a depth of about 0.2 μm from the surface. In this embodiment, the P + P concentration gradient type barrier electric field near the front surface, which is the light receiving surface, suppresses the recombination of photoelectrons and holes generated by the incident of light with a short blue wavelength, and the photoelectric near the light receiving surface. Conversion is possible. A concentration gradient type barrier electric field region is formed on both the upper and lower sides (both left and right in FIG. 1) sandwiching the boundary surface jk3 between the P + region 2 and the P region 3 on the front side.

裏側のP+領域6は裏側表面近くでの光電子の再結合を抑制するため、P+Pの濃度勾配により生じる濃度勾配型バリア電界を生成するためのものであり、裏側のP+領域6とP領域5との境界面jk4を挟んだ上下両側(図1では左右両側)に濃度勾配型バリア電界領域が形成される。P+領域2、P領域3、N領域4、P領域5、P+領域6のドナー密度、アクセプタ密度、深さ方向の厚さは、PN接合の空乏層内に生じるPN接合型バリア電界とP+Pの濃度勾配により生じる濃度勾配型バリア電界が深さ方向にほぼ一体化して一つのほぼ完全なバリア電界領域Wd(20~40μmがWdの最適幅。図3参照)が形成されるように設定されている。図2に光電変換半導体装置1のa-a’線に沿った不純物濃度プロファイルとb-b’線に沿った不純物濃度プロファイルの具体的な例を示す。 The P + region 6 on the back side is for generating a concentration gradient type barrier electric field generated by the concentration gradient of P + P in order to suppress the recombination of photoelectrons near the surface on the back side. A concentration gradient type barrier electric field region is formed on both the upper and lower sides (both left and right in FIG. 1) sandwiching the boundary surface jk4. The donor density, acceptor density, and depth thickness of the P + region 2, P region 3, N region 4, P region 5, and P + region 6 are the PN junction type barrier electric field generated in the depletion layer of the PN junction and the P + P. The concentration gradient type barrier electric field generated by the concentration gradient is set so as to be almost integrated in the depth direction to form one almost complete barrier electric field region Wd (20 to 40 μm is the optimum width of Wd. See FIG. 3). There is. FIG. 2 shows a specific example of the impurity concentration profile along the aa'line and the impurity concentration profile along the bb' line of the photoelectric conversion semiconductor device 1.

光電変換半導体装置1の内、表側と裏側のP+領域2と6に設けられた外面電極9、10はグランドに接続されており、グランド電位に固定されている。一方、N+領域11に設けられた外面電極12とグランドとの間には電荷蓄積用の外部容量30が接続されている。また、外部容量30にはスイッチ31を介して外部負荷32が接続されている。
なお、図1の外部回路は一例であり、光電変換半導体装置1の外部に外部容量を設ける代わりに、光電変換半導体装置1の内部に電荷蓄積用の容量(図示せず)を形成し、この容量の両極をN+領域11に設けられた外面電極12とグランド間に接続するようにしても良い。
The outer surface electrodes 9 and 10 provided in the P + regions 2 and 6 on the front side and the back side of the photoelectric conversion semiconductor device 1 are connected to the ground and fixed to the ground potential. On the other hand, an external capacitance 30 for charge storage is connected between the outer surface electrode 12 provided in the N + region 11 and the ground. Further, an external load 32 is connected to the external capacity 30 via a switch 31.
The external circuit of FIG. 1 is an example. Instead of providing an external capacitance outside the photoelectric conversion semiconductor device 1, a charge storage capacitance (not shown) is formed inside the photoelectric conversion semiconductor device 1 and the capacitance is formed inside the photoelectric conversion semiconductor device 1. Both electrodes of the capacitance may be connected between the outer surface electrode 12 provided in the N + region 11 and the ground.

P+PNPP+接合部7の深さ方向のエネルギーバンドは図3の如くなり、表側及び裏側のP+領域2、6は光電子のエネルギーレベルが一番高くなり、N領域4の中央付近が一番低くなる。N+領域11はN領域4の中央付近より更に一段低くなる。
表側のSiO2領域8を通した入射光で発生した光電子(e-)とホール(h+)は、表側及び裏側のP+P濃度勾配により生じる濃度勾配型バリア電界領域とPN接合型バリア電界領域を合わせたバリア電界領域Wdの電界により直ちに分離されるので、再結合することなく光電子はエネルギーレベルが一番低いN領域4の中央へ移動し、ホールは表側と裏側のP+領域2、6へ移動する。仮にN領域4の中央付近に光電子が溜まったままになるとN領域4の空乏層が狭くなってしまい、光電子とホールの再結合がし易くなってしまう。この実施例では、N領域4の中央付近に設けられたエネルギーレベルの一段番低いN+領域11の側へ光電子が移動するので、N領域4の空乏層が狭くなることはない。
表側と裏側のP+領域2、6に到達したホールは外面電極9、10より供給される電子と結合して消失する。スイッチ31が開のとき、N+領域11に到達した光電子はN+領域11、外面電極12、外部容量30の+極30aに蓄積される。図1の外部回路は、スイッチ31を閉にすると、外部容量30に蓄積された光電子が外部負荷32に流れ、N+領域11、外面電極12、外部容量30の+極30aに蓄積された光電子がリセットされる例を示す。
The energy band in the depth direction of the P + PNPP + junction 7 is as shown in FIG. 3, the energy levels of photoelectrons are highest in the P + regions 2 and 6 on the front side and the back side, and the energy level near the center of the N region 4 is the lowest. The N + region 11 is one step lower than the vicinity of the center of the N region 4.
The photoelectrons (e−) and holes (h +) generated by the incident light passing through the SiO2 region 8 on the front side are the sum of the concentration gradient type barrier electric field region and the PN junction type barrier electric field region generated by the P + P concentration gradients on the front side and the back side. Since the photoelectrons are immediately separated by the electric field of the barrier electric field region Wd, the photoelectrons move to the center of the N region 4 having the lowest energy level, and the holes move to the P + regions 2 and 6 on the front side and the back side without recombination. If the photoelectrons remain accumulated near the center of the N region 4, the depletion layer of the N region 4 becomes narrow, and the photoelectrons and the holes are easily recombined. In this embodiment, since the photoelectrons move to the side of the N + region 11 having the lowest energy level provided near the center of the N region 4, the depletion layer of the N region 4 does not become narrow.
The holes that reach the P + regions 2 and 6 on the front side and the back side are combined with the electrons supplied from the outer surface electrodes 9 and 10 and disappear. When the switch 31 is open, the photoelectrons that have reached the N + region 11 are accumulated in the + electrode 30a of the N + region 11, the outer surface electrode 12, and the external capacitance 30. In the external circuit of FIG. 1, when the switch 31 is closed, the photoelectrons accumulated in the external capacity 30 flow to the external load 32, and the photoelectrons accumulated in the + pole 30a of the N + region 11, the outer surface electrode 12, and the external capacity 30 flow. Here is an example of being reset.

光電変換半導体装置1の表側のP+領域2の表側表面と裏側のP+領域6の裏側表面がグランド電位に固定されることにより、表側及び裏側表面近くのP+P濃度勾配により生じる濃度勾配型バリア電界領域とPN接合の空乏層内に生じるPN接合型バリア電界領域を合わせたバリア電界領域Wdの全域の電位が固定されるので、光電変換半導体装置1の周囲でサージ等の外乱が生じても、バリア電界領域Wdのいずれの場所の電界も外乱の影響を受けたり、N+領域11に蓄積した光電子がN領域4の側に戻ったりすることもなく、安定した光電変換動作を維持できる。
また表側のP+領域2の表側表面と裏側のP+領域6の裏側表面がグランド電位に固定されることで、P+領域2の表側のごく表面近くとP+領域6の裏側のごく表面近くの電界が零となり、この結果、P+領域6のごく表面近くで熱エネルギーを吸収して伝導帯に上がった電子がその場で直ちに空孔と再結合するので、表面暗電流となって電荷電荷蓄積用の外部容量30を放電させてしまう恐れが少なくなり、変換効率の一層の向上を図ることができる。
A concentration gradient type barrier electric field region generated by a P + P concentration gradient near the front and back surfaces by fixing the front surface of the P + region 2 on the front side of the photoelectric conversion semiconductor device 1 and the back surface of the P + region 6 on the back side to the ground potential. Since the potential of the entire barrier electric field region Wd including the PN junction type barrier electric field region generated in the PN junction empty layer is fixed, even if a disturbance such as a surge occurs around the photoelectric conversion semiconductor device 1, the barrier The electric field at any location in the electric field region Wd is not affected by the disturbance, and the photoelectrons accumulated in the N + region 11 do not return to the side of the N region 4, so that a stable photoelectric conversion operation can be maintained.
Further, by fixing the front surface of the P + region 2 on the front side and the back surface of the P + region 6 on the back side to the ground potential, the electric field near the very surface of the front side of the P + region 2 and the electric field near the back surface of the P + region 6 is generated. It becomes zero, and as a result, the electrons that absorb heat energy very close to the surface of the P + region 6 and rise to the conduction band are immediately recombined with the vacancies on the spot, resulting in a surface dark current for charge charge storage. The risk of discharging the external capacity 30 is reduced, and the conversion efficiency can be further improved.

この実施例によれば、表面側から裏面側に向かう深さ方向にN領域4の表裏両側をP領域3、5で挟み、更に、両P領域3、5の外側をバリア電界生成用のP+領域2、6で挟んだP+PNPP+接合部7を設け、この内、PNP接合部分をN領域4の深さ方向の中央を中心にして表裏方向に対称に形成し、N領域4の深さ方向の中央部に接触するよにして設けたN+領域11により光電子を吸い出すようにしたことにより、P+PNPP+接合部7のほぼ全域にわたるバリア電界領域Wdを容易に形成することができ、表面側のSiO2領域8を通した光入射で発生した光電子とホールを再結合することなく分離させ、光電子をN領域4の中央付近からエネルギーレベルの一段低いN+領域11へ吸い出すことができるので、N領域4に光電子が滞留せず、光電変換効率の高い光電変換半導体装置1が得られる。
また光電変換半導体装置1の表裏のP+領域2、6がグランド電位に固定されることにより、表側及び裏側表面近くのP+P濃度勾配により生じる濃度勾配型バリア電界領域とPN接合の空乏層内に生じるPN接合型バリア電界領域を合わせたバリア電界領域Wdの全域の電位が固定されるので、光電変換半導体装置1の周囲でサージ等の外乱が生じても、バリア電界領域Wdのいずれの場所の電界も外乱の影響を受けたり、N+領域11に蓄積した光電子がN領域4の側に戻ったりすることもなく、安定した光電変換動作を維持できる。
またP+領域2の表側表面とP+領域6の裏側表面がグランド電位に固定されることで、P+領域2の表側表面近くとP+領域6の裏側表面近くの電界が零となり、この結果、P+領域2と6のごく表面近くで熱エネルギーを吸収して伝導帯に上がった電子がその場で直ちに空孔と再結合するので、表面暗電流となって外部または内部の容量を放電させてしまう恐れが少なくなり、変換効率の一層の向上を図ることができる。
According to this embodiment, both the front and back sides of the N region 4 are sandwiched between the P regions 3 and 5 in the depth direction from the front surface side to the back surface side, and the outside of both P regions 3 and 5 is P + for generating a barrier electric field. A P + PNPP + junction 7 sandwiched between regions 2 and 6 is provided, of which the PNP junction is formed symmetrically in the front and back directions with the center in the depth direction of the N region 4 as the center, in the depth direction of the N region 4. By sucking out photoelectrons by the N + region 11 provided so as to be in contact with the central portion, the barrier electric field region Wd over almost the entire area of the P + PNPP + junction 7 can be easily formed, and the SiO2 region 8 on the surface side can be easily formed. Since the photoelectrons generated by the light incident through the light and the holes can be separated without recombination, and the photoelectrons can be sucked out from the vicinity of the center of the N region 4 to the N + region 11 whose energy level is one step lower, the photoelectrons can be generated in the N region 4. A photoelectric conversion semiconductor device 1 having high photoelectric conversion efficiency without staying can be obtained.
Further, when the P + regions 2 and 6 on the front and back surfaces of the photoelectric conversion semiconductor device 1 are fixed to the ground potential, they are generated in the density gradient type barrier electric field region generated by the P + P concentration gradients near the front and back surfaces and the PN junction. Since the potential of the entire barrier electric field region Wd including the PN junction type barrier electric field region is fixed, even if a disturbance such as a surge occurs around the photoelectric conversion semiconductor device 1, the electric field at any place in the barrier electric field region Wd. However, stable photoelectric conversion operation can be maintained without being affected by disturbance or returning the photoelectrons accumulated in the N + region 11 to the side of the N region 4.
Further, by fixing the front surface of the P + region 2 and the back surface of the P + region 6 to the ground potential, the electric fields near the front surface of the P + region 2 and near the back surface of the P + region 6 become zero, and as a result, the P + region becomes zero. Electrons that absorb heat energy very close to the surfaces of 2 and 6 and rise to the conduction band are immediately recombined with the pores on the spot, which may cause a surface dark current and discharge the external or internal capacitance. Is reduced, and the conversion efficiency can be further improved.

図4を参照して本発明の第2実施例に係る光電変換半導体装置を説明する。
図4において、50は太陽光を受光して光起電力を発生する光電変換半導体装置であり、上側が表側、下側が裏側であり、深さ方向は上から下へ向かう方向である。光電変換半導体装置50の内部に断面が略長方形のN領域51が設けられている。N領域51の裏側の左右端部近くには裏側方向へ突設された突設部51a、51bが形成されている。N領域51の内、裏側の突設部51a、51bの裏側端面51c、51dを除く裏側表面、上側表面、側周面に接触しながら周囲を囲むようにしてP領域52が設けられている。P領域52の裏側の左右端部近くには突設部51a、51bの側面周囲を囲むように一段裏側に突設した段差部52a、52bが形成されている。N領域51とP領域52の境界にPN接合面が形成されており、PN接合面を挟んだ上下両側または左右両側にPN接合型バリア電界領域が形成されている。
The photoelectric conversion semiconductor device according to the second embodiment of the present invention will be described with reference to FIG.
In FIG. 4, 50 is a photoelectric conversion semiconductor device that receives sunlight and generates photovoltaic power, the upper side is the front side, the lower side is the back side, and the depth direction is from top to bottom. An N region 51 having a substantially rectangular cross section is provided inside the photoelectric conversion semiconductor device 50. Protruding portions 51a and 51b projecting in the back side direction are formed near the left and right ends on the back side of the N region 51. Among the N regions 51, the P region 52 is provided so as to surround the periphery while contacting the back side surface, the upper surface, and the side peripheral surface excluding the back side end faces 51c and 51d of the back side protruding portions 51a and 51b. Near the left and right ends on the back side of the P region 52, stepped portions 52a and 52b are formed so as to surround the side surfaces of the protruding portions 51a and 51b. A PN junction surface is formed at the boundary between the N region 51 and the P region 52, and a PN junction type barrier electric field region is formed on both the upper and lower sides or the left and right sides of the PN junction surface.

P領域52の表外側にP領域52の表面に接触するようにして面方向に延設された表側のP+領域53が設けられている。表側のP+領域53は光電変換半導体装置50の表側表面近くでの光電子の再結合を抑制するため、P+Pの濃度勾配により生じる濃度勾配型バリア電界を生成するとともに、青色短波長の光に対する光電変換効率の改善をするために設けられた領域である。P+領域53とP領域52との境界面を挟んだ上下両側に濃度勾配型バリア電界領域が形成されている。 On the outside of the front side of the P region 52, a front side P + region 53 extending in the surface direction so as to come into contact with the surface of the P region 52 is provided. The P + region 53 on the front side suppresses the recombination of photoelectrons near the front surface of the photoelectric conversion semiconductor device 50, so that a concentration gradient type barrier electric field generated by the concentration gradient of P + P is generated and photoelectric conversion to blue short wavelength light is performed. This is an area provided to improve efficiency. A concentration gradient type barrier electric field region is formed on both the upper and lower sides of the boundary surface between the P + region 53 and the P region 52.

P領域52の裏外側の内、段差部52a、52bの裏側端面52c、52dを除くP領域52の裏側表面に接触するようにして面方向に沿ってP+領域54、55、56が設けられている。P+領域54、55、56は光電変換半導体装置50の裏側表面近くでの光電子の再結合を抑制するため、P+Pの濃度勾配により生じる濃度勾配型バリア電界を生成するために設けられた領域である。P+領域54、55、56とP領域52との境界面を挟んだ上下両側に濃度勾配型バリア電界領域が形成されている。
N領域51の裏側の左右端部の一部に接触するようにして光電子吸出し用のN+領域57、58が設けられている。具体的には突設部51a、51bにN+領域57、58が埋め込み状態で設けられている。N+領域57、58の光電子エネルギーレベルはN領域51より一段低く、N領域51に集まった光電子を吸い出す機能を有する。P+領域54、55、56、段差部52a、52bの裏側端面52c、52d、突設部51a、51bの裏側端面51c、51d、N+領域57、58の裏側端面57a、58aは受光主面に平行な平面を成す。N領域51、P領域52、P+領域53、54、55、56、N+領域57、58により、光電変換層59が構成されている。
Inside the back outside of the P region 52, P + regions 54, 55, 56 are provided along the surface direction so as to be in contact with the back surface of the P region 52 excluding the back end surfaces 52c and 52d of the step portions 52a and 52b. There is. The P + regions 54, 55, and 56 are regions provided to generate a concentration gradient type barrier electric field generated by the concentration gradient of P + P in order to suppress the recombination of photoelectrons near the back surface of the photoelectric conversion semiconductor device 50. .. Concentration gradient type barrier electric field regions are formed on both the upper and lower sides of the boundary surface between the P + regions 54, 55, 56 and the P region 52.
N + regions 57 and 58 for sucking photoelectrons are provided so as to come into contact with a part of the left and right ends on the back side of the N region 51. Specifically, N + regions 57 and 58 are provided in the projecting portions 51a and 51b in an embedded state. The photoelectron energy level of the N + regions 57 and 58 is one step lower than that of the N region 51, and has a function of sucking out the photoelectrons collected in the N region 51. The P + regions 54, 55, 56, the back end surfaces 52c, 52d of the stepped portions 52a, 52b, the back end surfaces 51c, 51d of the protruding portions 51a, 51b, and the back end surfaces 57a, 58a of the N + regions 57, 58 are parallel to the light receiving main surface. Form a flat surface. The photoelectric conversion layer 59 is composed of N regions 51, P regions 52, P + regions 53, 54, 55, 56, and N + regions 57, 58.

光電変換層59の表側には、P+領域53の表側の左右端部を除く表面に接触するようにして透明な受光窓領域としての絶縁性のSiO2領域60が設けられている。SiO2領域60の左側と右側には表側のP+領域53の表側表面の左右端部と導通した第1の極性の外面電極61、62が設けられている。
光電変換層59の裏側には、P+領域56の左右端部を除く裏外側に、P+領域56の表面と導通した第1の極性の外面電極63、左右端部のP+領域54、55の裏外側にP+領域54、55の表面と導通した第1の極性の外面電極64、65が設けられている。またN+領域57、58の裏外側に、N+領域57、58の表面と導通した第2の極性の外面電極66、67が設けられている。光電変換層59の左右側面には絶縁性のSiO2領域68、69が設けられている。光電変換層59の裏側の外面電極63、64、65、66、67以外の外面には絶縁性のSiO2領域70、71、72、73が設けられている。
On the front side of the photoelectric conversion layer 59, an insulating SiO2 region 60 as a transparent light receiving window region is provided so as to be in contact with the surface of the P + region 53 except for the left and right ends on the front side. On the left and right sides of the SiO2 region 60, outer surface electrodes 61 and 62 having the first polarity conducting with the left and right ends of the front surface of the P + region 53 on the front side are provided.
On the back side of the photoelectric conversion layer 59, the outer surface electrode 63 having the first polarity conducting with the surface of the P + region 56, and the back of the P + regions 54 and 55 at the left and right ends are on the back outside except for the left and right ends of the P + region 56. External electrodes 64, 65 having the first polarity conducting with the surface of the P + regions 54, 55 are provided on the outside. Further, on the back outside of the N + regions 57 and 58, outer surface electrodes 66 and 67 having a second polarity conducting with the surface of the N + regions 57 and 58 are provided. Insulating SiO2 regions 68 and 69 are provided on the left and right side surfaces of the photoelectric conversion layer 59. Insulating SiO2 regions 70, 71, 72, 73 are provided on the outer surface other than the outer surface electrodes 63, 64, 65, 66, 67 on the back side of the photoelectric conversion layer 59.

光電変換半導体装置50は、N領域51の左右方向の中央を通り、深さ方向に延びた対称線C1から見て、N領域51、P領域52、P+領域53、54、55、56、N+領域57、58、外面電極61、62、63、64、65、66、67、SiO2領域60、68、69、70、71、72、73が左右線対称に形成されている。各外面電極61、62、63、64、65、66、67は金属製である。外面電極63は光電変換半導体装置50の裏側に到達した入射光の可視光成分を反射し、再度、光電変換させたり、入射光の遠赤外成分を反射し、光電変換半導体装置50の表外側に放出させて光電変換半導体装置50の昇温を抑制する機能を有する。 The photoelectric conversion semiconductor device 50 passes through the center of the N region 51 in the left-right direction and is viewed from the symmetry line C1 extending in the depth direction. Regions 57, 58, outer surface electrodes 61, 62, 63, 64, 65, 66, 67, SiO2 regions 60, 68, 69, 70, 71, 72, 73 are formed symmetrically in the left-right line. Each outer surface electrode 61, 62, 63, 64, 65, 66, 67 is made of metal. The outer surface electrode 63 reflects the visible light component of the incident light that has reached the back side of the photoelectric conversion semiconductor device 50 and converts it again by photoelectric conversion or reflects the far infrared component of the incident light, so that the front and outer surfaces of the photoelectric conversion semiconductor device 50 are reflected. It has a function of suppressing the temperature rise of the photoelectric conversion semiconductor device 50 by emitting light from the semiconductor device 50.

光電変換半導体装置50の内、外面電極61、62、63、64、65はグランドに接続されており、グランド電位に固定されている。一方、外面電極66、67とグランドとの間には電荷蓄積用の外部容量30が接続されている。また、外部容量30にはスイッチ31を介して外部負荷32が接続されている。なお、光電変換半導体装置50の内部に電荷蓄積用の容量(図示せず)を形成し、この容量の両極をN+領域57、58に設けられた外面電極66、67とグランド間に接続するようにしても良い。 Among the photoelectric conversion semiconductor devices 50, the outer surface electrodes 61, 62, 63, 64, 65 are connected to the ground and are fixed to the ground potential. On the other hand, an external capacitance 30 for charge storage is connected between the outer surface electrodes 66 and 67 and the ground. Further, an external load 32 is connected to the external capacity 30 via a switch 31. A capacitance (not shown) for accumulating charge is formed inside the photoelectric conversion semiconductor device 50, and both poles of this capacitance are connected between the outer surface electrodes 66 and 67 provided in the N + regions 57 and 58 and the ground. You can do it.

光電子のエネルギーレベルは表側及び裏側のP+領域53、54、55、56が一番高く、内部のP領域52、N領域51、N+領域57と58の順に低くなる。
表面側のSiO2領域60を通した入射光で発生した光電子(e-)とホール(h+)は、表側及び裏側のP+P濃度勾配により生じる濃度勾配型バリア電界とPN接合の空乏層内に生じるPN接合型バリア電界により直ちに分離されるので、再結合することなく光電子はエネルギーレベルが一番低いN+領域57、58へ移動し、ホールはP+領域53、54、55、56へ移動する。
P+領域53、54、55、56に到達したホールは外面電極61、62、63、64、65より供給される電子と結合して消失する。スイッチ31が開のとき、N+領域57、58に到達した光電子はN+領域57、58、外面電極66、67、外部容量30の+極30aに蓄積される。図4の外部回路は、スイッチ31を閉にすると、外部容量30に蓄積された光電子が外部負荷32に流れて、N+領域57、58、外面電極66、67、外部容量30の+極30aに蓄積された光電子がリセットされる例を示す。
The energy levels of photoelectrons are highest in the front and back P + regions 53, 54, 55, and 56, and decrease in the order of the internal P regions 52, N region 51, and N + regions 57 and 58.
The photoelectrons (e−) and holes (h +) generated by the incident light passing through the SiO2 region 60 on the front side are the concentration gradient type barrier electric field generated by the P + P concentration gradients on the front side and the back side and the PN generated in the depletion layer of the PN junction. Since they are immediately separated by the junctional barrier electric field, the photoelectrons move to the N + regions 57 and 58 with the lowest energy levels and the holes move to the P + regions 53, 54, 55 and 56 without recombination.
The holes that reach the P + regions 53, 54, 55, and 56 are combined with the electrons supplied from the outer surface electrodes 61, 62, 63, 64, and 65 and disappear. When the switch 31 is open, the photoelectrons that have reached the N + regions 57 and 58 are accumulated in the + pole 30a of the N + regions 57 and 58, the outer surface electrodes 66 and 67, and the external capacitance 30. In the external circuit of FIG. 4, when the switch 31 is closed, the photoelectrons accumulated in the external capacitance 30 flow to the external load 32 and move to the N + regions 57, 58, the outer surface electrodes 66, 67, and the + pole 30a of the external capacitance 30. An example in which the accumulated photoelectrons are reset is shown.

光電変換半導体装置50の表側のP+領域53、裏側のP+領域54、55、56の表面がグランド電位に固定されることにより、表側及び裏側表面近くのP+P濃度勾配により生じる濃度勾配型バリア電界領域とPN接合の空乏層内に生じるPN接合型バリア電界領域の全域の電位が固定されるので、光電変換半導体装置50の周囲でサージ等の外乱が生じても、バリア電界領域のいずれの場所の電界も外乱の影響を受けたり、N+領域57、58に蓄積した光電子がN領域51の側に戻ったりすることもなく、安定した光電変換動作を維持できる。
またP+領域53、54、55、56の表面がグランド電位に固定されることで、P+領域53の表側のごく表面近くと、54、55、56の裏側のごく表面近くの電界が零となり、この結果、P+領域53、54、55、56のごく表面近くで熱エネルギーを吸収して伝導帯に上がった電子がその場で直ちに空孔と再結合するので、表面暗電流となって電荷電荷蓄積用の外部容量30を放電させてしまう恐れが少なくなり、変換効率の一層の向上を図ることができる。
By fixing the surfaces of the P + region 53 on the front side and the P + regions 54, 55, 56 on the back side of the photoelectric conversion semiconductor device 50 to the ground potential, the concentration gradient type barrier electric field region generated by the P + P concentration gradient near the front and back surfaces. Since the potential of the entire PN junction type barrier electric field region generated in the PN junction void layer is fixed, even if a disturbance such as a surge occurs around the photoelectric conversion semiconductor device 50, any location in the barrier electric field region The electric field is not affected by the disturbance, and the photoelectrons accumulated in the N + regions 57 and 58 do not return to the side of the N region 51, so that a stable photoelectric conversion operation can be maintained.
Further, by fixing the surface of the P + region 53, 54, 55, 56 to the ground potential, the electric field near the very surface on the front side of the P + region 53 and near the very surface on the back side of the 54, 55, 56 becomes zero. As a result, the electrons that have absorbed heat energy very close to the surface of the P + regions 53, 54, 55, and 56 and have risen to the conduction band are immediately recombined with the pores on the spot, resulting in a surface dark current and an electric charge. The risk of discharging the external capacity 30 for storage is reduced, and the conversion efficiency can be further improved.

この第2実施例によれば、P領域52によりN領域51の周囲を囲み、深さ方向に多層のPN接合面を形成し、更にP領域52の表裏両側の表面に再結合阻止用のP+領域53、54、55、56を設けるとともに、N領域51の裏側表面の左右端部近くにN+領域57、58を設けて光電子を吸い出すようにしたことにより、深さ方向のほぼ全域にわたりバリア電界領域を形成することができ、SiO2領域60を通した光入射で発生した光電子とホールを再結合することなく分離させ、光電子をN領域51からエネルギー準位の一段低いN+領域57、58へ吸い出すことができるので、N領域51に光電子が滞留せず、光電変換効率の高い光電変換半導体装置50が得られる。
また、裏面側に到達した入射光は外面電極63により再度、表面方向に反射されて可視光成分が光電子に変換されるので、これによっても変換効率が改善する。入射光の遠赤外線成分は外面電極63により反射されて光電変換半導体装置50の表面から外側に放出されるので、光電変換半導体装置50の設置台側が昇温せずに済み、冷却設備の負担を軽減したり、変換効率の悪化防止をしたりすることができる。
光電変換半導体装置50のP+領域53、54、55、56の表面がグランド電位に固定されることにより、表側及び裏側表面近くのP+P濃度勾配により生じる濃度勾配型バリア電界領域とPN接合型バリア電界領域の全域の電位が固定されるので、光電変換半導体装置50の周囲でサージ等の外乱が生じても、バリア電界領域のいずれの場所の電界も外乱の影響を受けたり、N+領域57、58に蓄積した光電子がN領域51の側に戻ったりすることもなく、安定した光電変換動作を維持できる。
またP+領域53、54、55、56の表面がグランド電位に固定されることで、P+領域53の表側のごく表面近くと、54、55、56の裏側のごく表面近くの電界が零となり、この結果、P+領域53、54、55、56のごく表面近くで熱エネルギーを吸収して伝導帯に上がった電子がその場で直ちに空孔と再結合するので、表面暗電流となって電荷電荷蓄積用の外部容量30を放電させてしまう恐れが少なくなり、変換効率の一層の向上を図ることができる。
According to this second embodiment, the P region 52 surrounds the N region 51 to form a multi-layered PN junction surface in the depth direction, and P + for preventing recombination is further formed on both the front and back surfaces of the P region 52. By providing regions 53, 54, 55, 56 and N + regions 57, 58 near the left and right ends of the back surface of the N region 51 to suck out photoelectrons, a barrier electric field is provided over almost the entire depth direction. A region can be formed, and the photoelectrons generated by light incident through the SiO2 region 60 and the holes are separated without recombination, and the photoelectrons are sucked from the N region 51 to the N + regions 57 and 58, which are one step lower in energy level. Therefore, photoelectrons do not stay in the N region 51, and a photoelectric conversion semiconductor device 50 having high photoelectric conversion efficiency can be obtained.
Further, the incident light that has reached the back surface side is reflected again in the surface direction by the outer surface electrode 63, and the visible light component is converted into photoelectrons, which also improves the conversion efficiency. Since the far-infrared component of the incident light is reflected by the outer surface electrode 63 and emitted to the outside from the surface of the photoelectric conversion semiconductor device 50, the installation base side of the photoelectric conversion semiconductor device 50 does not need to be heated, which imposes a burden on the cooling equipment. It can be reduced or the conversion efficiency can be prevented from deteriorating.
By fixing the surfaces of the P + regions 53, 54, 55, 56 of the photoelectric conversion semiconductor device 50 to the ground potential, the concentration gradient type barrier electric field region and the PN junction type barrier electric field generated by the P + P concentration gradient near the front and back surfaces. Since the potential in the entire region is fixed, even if a disturbance such as a surge occurs around the photoelectric conversion semiconductor device 50, the electric field at any location in the barrier electric field region is affected by the disturbance, or the N + regions 57 and 58. The photoelectrons accumulated in the N region 51 do not return to the side of the N region 51, and a stable photoelectric conversion operation can be maintained.
Further, by fixing the surface of the P + region 53, 54, 55, 56 to the ground potential, the electric field near the very surface on the front side of the P + region 53 and near the very surface on the back side of the 54, 55, 56 becomes zero. As a result, the electrons that have absorbed heat energy very close to the surface of the P + regions 53, 54, 55, and 56 and have risen to the conduction band are immediately recombined with the pores on the spot, resulting in a surface dark current and an electric charge. The risk of discharging the external capacity 30 for storage is reduced, and the conversion efficiency can be further improved.

図5を参照して本発明の第3実施例に係る光電変換半導体装置を説明する。
図5において、70は太陽光を受光して光起電力を発生する光電変換半導体装置であり、上側が表側、下側が裏側であり、深さ方向は上から下へ向かう方向である。光電変換半導体装置70の内部には、断面が略T字状のN領域71が設けられている。N領域71の裏側の中央部には裏側方向へ突設された突設部71aが形成されている。N領域71の内、裏側の突設部71aの裏側端面を除く裏側表面、表側表面、側周面に接触しながら周囲を囲むようにしてP領域72が設けられている。P領域72の裏側の中央近くには突設部71aの側面周囲を囲むように一段表側に突設した段差部72aが形成されている。N領域71とP領域72の境界にPN接合面が形成されており、PN接合面を挟んだ上下両側または左右両側にPN接合型バリア電界領域が形成される。
The photoelectric conversion semiconductor device according to the third embodiment of the present invention will be described with reference to FIG.
In FIG. 5, reference numeral 70 denotes a photoelectric conversion semiconductor device that receives sunlight and generates photovoltaic power, the upper side is the front side, the lower side is the back side, and the depth direction is from top to bottom. Inside the photoelectric conversion semiconductor device 70, an N region 71 having a substantially T-shaped cross section is provided. A protruding portion 71a projecting in the back side direction is formed in the central portion on the back side of the N region 71. Among the N regions 71, the P region 72 is provided so as to surround the periphery while contacting the back side surface, the front side surface, and the side peripheral surface excluding the back side end surface of the back side protruding portion 71a. Near the center of the back side of the P region 72, a stepped portion 72a projecting on the front side of the projecting portion 71a is formed so as to surround the side surface of the projecting portion 71a. A PN junction surface is formed at the boundary between the N region 71 and the P region 72, and a PN junction type barrier electric field region is formed on both the upper and lower sides or the left and right sides of the PN junction surface.

P領域72の表外側にP領域72の表面に接触するようにして面方向に延設された表側のP+領域73が設けられている。表側のP+領域73は光電変換半導体装置70の表側表面近くでの光電子の再結合を抑制するため、P+Pの濃度勾配により生じる濃度勾配型バリア電界を生成するとともに、青色短波長の光に対する光電変換効率の改善をするために設けられた領域である。P+領域73とP領域72との境界面を挟んだ上下両側に濃度勾配型バリア電界領域が形成されている。 On the outside of the front side of the P region 72, a front side P + region 73 extending in the surface direction so as to come into contact with the surface of the P region 72 is provided. The P + region 73 on the front side suppresses the recombination of photoelectrons near the front surface of the photoelectric conversion semiconductor device 70, so that a concentration gradient type barrier electric field generated by the concentration gradient of P + P is generated and photoelectric conversion to blue short wavelength light is performed. This is an area provided to improve efficiency. A concentration gradient type barrier electric field region is formed on both the upper and lower sides of the boundary surface between the P + region 73 and the P region 72.

P領域72の裏外側の内、段差部72aの裏側端面72bを除くP領域72の裏側表面に接触するようにして面方向に沿ってP+領域74、75が設けられている。P+領域74、75は光電変換半導体装置70の裏側表面近くでの光電子の再結合を抑制するため、P+Pの濃度勾配により生じる濃度勾配型バリア電界を生成するために設けられた領域である。P+領域74、75とP領域72との境界面を挟んだ上下両側に濃度勾配型バリア電界領域が形成されている。
N領域71の裏側の中央部に接触するようにして光電子吸出し用のN+領域76が設けられている。具体的には突設部71aにN+領域76が埋め込み状態で設けられている。N+領域76の光電子エネルギーレベルはN領域71より一段低く、N領域71に集まった光電子を吸い出す機能を有する。P+領域74、75、段差部72aの裏側端面72b、突設部71aの裏側端面71b、N+領域76の裏側端面76aは受光主面に平行な平面を成す。N領域71、P領域72、P+領域73、74、75、N+領域76により、光電変換層77が構成されている。
Inside the back outside of the P region 72, the P + regions 74 and 75 are provided along the surface direction so as to come into contact with the back surface of the P region 72 excluding the back end surface 72b of the step portion 72a. The P + regions 74 and 75 are regions provided to generate a concentration gradient type barrier electric field generated by the concentration gradient of P + P in order to suppress the recombination of photoelectrons near the back surface of the photoelectric conversion semiconductor device 70. A concentration gradient type barrier electric field region is formed on both the upper and lower sides of the boundary surface between the P + regions 74 and 75 and the P region 72.
The N + region 76 for sucking out photoelectrons is provided so as to come into contact with the central portion on the back side of the N region 71. Specifically, the N + region 76 is provided in the projecting portion 71a in an embedded state. The photoelectron energy level of the N + region 76 is one step lower than that of the N region 71, and has a function of sucking out the photoelectrons collected in the N region 71. The P + regions 74 and 75, the back side end surface 72b of the step portion 72a, the back side end surface 71b of the projecting portion 71a, and the back side end surface 76a of the N + region 76 form a plane parallel to the light receiving main surface. The photoelectric conversion layer 77 is composed of the N region 71, the P region 72, the P + region 73, 74, 75, and the N + region 76.

光電変換層77の表側には、P+領域73の表側の左右端部を除く表面に接触するようにして透明な受光窓領域としての絶縁性のSiO2領域78が設けられている。SiO2領域78の左側と右側には表側のP+領域73の表側表面の左右端部と導通した第1の極性の外面電極79、80が設けられている。
光電変換層77の裏側には、P+領域74の左右端部を除く裏外側に、P+領域74の表面と導通した第1の極性の外面電極81、P+領域75の左右端部を除く裏外側に、P+領域75の表面と導通した第1の極性の外面電極82が設けられている。またN+領域76の裏外側に、N+領域76の表面と導通した第2の極性の外面電極83が設けられている。光電変換層77の左右側面には絶縁性のSiO2領域84、85が設けられている。光電変換層77の裏側の外面電極81、82、83以外の外面には絶縁性のSiO2領域86、87が設けられている。
On the front side of the photoelectric conversion layer 77, an insulating SiO2 region 78 as a transparent light receiving window region is provided so as to be in contact with the surface of the P + region 73 excluding the left and right ends on the front side. On the left and right sides of the SiO2 region 78, outer surface electrodes 79 and 80 having the first polarity that are conductive with the left and right ends of the front surface of the P + region 73 on the front side are provided.
On the back side of the photoelectric conversion layer 77, on the back outside excluding the left and right ends of the P + region 74, the outer surface electrode 81 having the first polarity conducting with the surface of the P + region 74, and the back outside excluding the left and right ends of the P + region 75. Is provided with an outer surface electrode 82 having a first polarity that is conductive with the surface of the P + region 75. Further, on the back outer side of the N + region 76, an outer surface electrode 83 having a second polarity conducting with the surface of the N + region 76 is provided. Insulating SiO2 regions 84 and 85 are provided on the left and right side surfaces of the photoelectric conversion layer 77. Insulating SiO2 regions 86, 87 are provided on the outer surface other than the outer surface electrodes 81, 82, 83 on the back side of the photoelectric conversion layer 77.

光電変換半導体装置70は、N領域71の左右方向の中央を通り、深さ方向に延びた対称線C2から見て、N領域71、P領域72、P+領域73、74、75、N+領域76、外面電極79、80、81、82、83、SiO2領域78、84、85、86、87が左右線対称に形成されている。各外面電極79、80、81、82、83は金属製である。外面電極81、82は光電変換半導体装置70の裏側に到達した入射光の可視光成分を反射し、再度、光電変換させたり、入射光の遠赤外成分を反射し、光電変換半導体装置70の表外側に放出させて光電変換半導体装置70の昇温を抑制する機能を有する。 The photoelectric conversion semiconductor device 70 passes through the center of the N region 71 in the left-right direction, and when viewed from the symmetry line C2 extending in the depth direction, the N region 71, the P region 72, the P + region 73, 74, 75, and the N + region 76. , External electrodes 79, 80, 81, 82, 83, SiO2 regions 78, 84, 85, 86, 87 are formed symmetrically in the left-right line. Each outer surface electrode 79, 80, 81, 82, 83 is made of metal. The outer surface electrodes 81 and 82 reflect the visible light component of the incident light that has reached the back side of the photoelectric conversion semiconductor device 70, and perform photoelectric conversion again or reflect the far-infrared component of the incident light to reflect the far-infrared component of the incident light of the photoelectric conversion semiconductor device 70. It has a function of suppressing the temperature rise of the photoelectric conversion semiconductor device 70 by discharging it to the outside.

光電変換半導体装置70の内、外面電極79、80、81、82はグランドに接続されており、グランド電位に固定されている。一方、外面電極83とグランドとの間には電荷蓄積用の外部容量30が接続されている。また、外部容量30にはスイッチ31を介して外部負荷32が接続されている。なお、光電変換半導体装置70の内部に電荷蓄積用の容量(図示せず)を形成し、この容量の両極をN+領域76に設けられた外面電極83とグランド間に接続するようにしても良い。 Among the photoelectric conversion semiconductor devices 70, the outer surface electrodes 79, 80, 81, 82 are connected to the ground and are fixed to the ground potential. On the other hand, an external capacitance 30 for charge storage is connected between the outer surface electrode 83 and the ground. Further, an external load 32 is connected to the external capacity 30 via a switch 31. A capacitance (not shown) for accumulating charge may be formed inside the photoelectric conversion semiconductor device 70, and both poles of this capacitance may be connected between the outer surface electrode 83 provided in the N + region 76 and the ground. ..

光電子のエネルギーレベルは表側及び裏側のP+領域73、74、75が一番高く、内部のP領域72、N領域71、裏側のN+領域76の順に低くなる。
表面側のSiO2領域78を通した入射光で発生した光電子(e-)とホール(h+)は、表側及び裏側のP+P濃度勾配により生じる濃度勾配型バリア電界とPN接合の空乏層内に生じるPN接合型バリア電界により直ちに分離されるので、再結合することなく光電子はエネルギーレベルが一番低いN+領域76へ移動し、ホールはP+領域73、74、75へ移動する。
P+領域73、74、75に到達したホールは外面電極79、80、81、82により供給される電子と結合して消失する。スイッチ31が開のとき、N+領域76に到達した光電子はN+領域76、外面電極83、外部容量30の+極30aに蓄積される。図5の外部回路は、スイッチ31を閉にすると、外部容量30に蓄積された光電子が外部負荷32に流れて、N+領域76、外面電極83、外部容量30の+極30aに蓄積された光電子がリセットされる例を示す。
The energy levels of photoelectrons are highest in the front and back P + regions 73, 74, and 75, and decrease in the order of the internal P regions 72, N regions 71, and the back N + regions 76.
The photoelectrons (e−) and holes (h +) generated by the incident light passing through the SiO2 region 78 on the front side are the concentration gradient type barrier electric field generated by the P + P concentration gradients on the front side and the back side and the PN generated in the depletion layer of the PN junction. Since they are immediately separated by the junctional barrier electric field, the photoelectrons move to the N + region 76, which has the lowest energy level, and the holes move to the P + regions 73, 74, 75 without recombination.
The holes that reach the P + regions 73, 74, and 75 are combined with the electrons supplied by the outer surface electrodes 79, 80, 81, and 82 and disappear. When the switch 31 is open, the photoelectrons that have reached the N + region 76 are accumulated in the + pole 30a of the N + region 76, the outer surface electrode 83, and the external capacitance 30. In the external circuit of FIG. 5, when the switch 31 is closed, the photoelectrons accumulated in the external capacitance 30 flow to the external load 32, and the optoelectronics accumulated in the + pole 30a of the N + region 76, the outer surface electrode 83, and the external capacitance 30. Here is an example where is reset.

光電変換半導体装置70の表側のP+領域73、裏側のP+領域74、75の表面がグランド電位に固定されることにより、表側及び裏側表面近くのP+P濃度勾配により生じる濃度勾配型バリア電界領域とPN接合の空乏層内に生じるPN接合型バリア電界領域の全域の電位が固定されるので、光電変換半導体装置70の周囲でサージ等の外乱が生じても、バリア電界領域のいずれの場所の電界も外乱の影響を受けたり、N+領域76に蓄積した光電子がN領域71の側に戻ったりすることもなく、安定した光電変換動作を維持できる。
またP+領域73、74、75の表面がグランド電位に固定されることで、P+領域73の表側のごく表面近くと、74、75の裏側のごく表面近くの電界が零となり、この結果、P+領域73、74、75のごく表面近くで熱エネルギーを吸収して伝導帯に上がった電子がその場で直ちに空孔と再結合するので、表面暗電流となって電荷電荷蓄積用の外部容量30を放電させてしまう恐れが少なくなり、変換効率の一層の向上を図ることができる。
By fixing the surfaces of the P + region 73 on the front side and the P + regions 74 and 75 on the back side of the photoelectric conversion semiconductor device 70 to the ground potential, the concentration gradient type barrier electric field region and PN generated by the P + P concentration gradient near the front and back surfaces. Since the potential of the entire PN junction type barrier electric field region generated in the poor layer of the junction is fixed, even if a disturbance such as a surge occurs around the photoelectric conversion semiconductor device 70, the electric field at any place in the barrier electric field region can be applied. A stable photoelectric conversion operation can be maintained without being affected by disturbance or returning the photoelectrons accumulated in the N + region 76 to the side of the N region 71.
Further, by fixing the surfaces of the P + regions 73, 74, and 75 to the ground potential, the electric fields near the very surface on the front side of the P + region 73 and near the very surface on the back side of the 74, 75 become zero, and as a result, P +. Electrons that absorb heat energy very close to the surfaces of regions 73, 74, and 75 and rise to the conduction band immediately recombine with the pores on the spot, resulting in a surface dark current and an external capacity 30 for charge charge storage. The risk of discharging the electric charge is reduced, and the conversion efficiency can be further improved.

この第3実施例によれば、P領域72によりN領域71の周囲を囲み、深さ方向に多層のPN接合面を形成し、更にP領域72の表裏両側の表面に再結合阻止用のP+領域73、74、75を設けるとともに、N領域71の裏側の中央部にN+領域76を設けて光電子を吸い出すようにしたことにより、深さ方向のほぼ全域にわたりバリア電界領域を形成することができ、SiO2領域78を通した光入射で発生した光電子とホールを再結合することなく分離させ、光電子をN領域71からエネルギー準位の一段低いN+領域76へ吸い出すことができるので、N領域71に光電子が滞留せず、光電変換効率の高い光電変換半導体装置70が得られる。
また、裏面側に到達した入射光は外面電極81、82により再度、表面方向に反射されて可視光成分が光電子に変換されるので、これによっても変換効率が改善する。入射光の遠赤外線成分は外面電極81、82により反射されて光電変換半導体装置70の表面から外側に放出されるので、光電変換半導体装置70の設置台側が昇温せずに済み、冷却設備の負担を軽減したり、変換効率の悪化防止をしたりすることができる。
光電変換半導体装置70のP+領域73、74、75の表面がグランド電位に固定されることにより、表側及び裏側表面近くのP+P濃度勾配により生じる濃度勾配型バリア電界領域とPN接合型バリア電界領域の全域の電位が固定されるので、光電変換半導体装置70の周囲でサージ等の外乱が生じても、バリア電界領域のいずれの場所の電界も外乱の影響を受けたり、N+領域76に蓄積した光電子がN領域71の側に戻ったりすることもなく、安定した光電変換動作を維持できる。
またP+領域73、74、75の表面がグランド電位に固定されることで、P+領域73の表側のごく表面近くと、74、75の裏側のごく表面近くの電界が零となり、この結果、P+領域73、74、75のごく表面近くで熱エネルギーを吸収して伝導帯に上がった電子がその場で直ちに空孔と再結合するので、表面暗電流となって電荷電荷蓄積用の外部容量30を放電させてしまう恐れが少なくなり、変換効率の一層の向上を図ることができる。
According to this third embodiment, the P region 72 surrounds the N region 71 to form a multi-layered PN junction surface in the depth direction, and P + for preventing recombination is further formed on both the front and back surfaces of the P region 72. By providing the regions 73, 74, and 75 and by providing the N + region 76 in the central portion on the back side of the N region 71 so as to suck out the photoelectrons, the barrier electric field region can be formed over almost the entire depth direction. , Photoelectrons generated by light incident through the SiO2 region 78 and holes can be separated without recombination, and the photoelectrons can be sucked from the N region 71 to the N + region 76, which is one step lower in energy level. A photoelectric conversion semiconductor device 70 having high photoelectric conversion efficiency without retention of photoelectrons can be obtained.
Further, the incident light that reaches the back surface side is reflected again in the surface direction by the outer surface electrodes 81 and 82, and the visible light component is converted into photoelectrons, which also improves the conversion efficiency. Since the far-infrared component of the incident light is reflected by the outer surface electrodes 81 and 82 and emitted to the outside from the surface of the photoelectric conversion semiconductor device 70, the installation base side of the photoelectric conversion semiconductor device 70 does not need to be heated, and the cooling equipment It is possible to reduce the burden and prevent deterioration of conversion efficiency.
By fixing the surfaces of the P + regions 73, 74, 75 of the photoelectric conversion semiconductor device 70 to the ground potential, the concentration gradient type barrier electric field region and the PN junction type barrier electric field region generated by the P + P concentration gradient near the front and back surfaces Since the potential over the entire range is fixed, even if a disturbance such as a surge occurs around the photoelectric conversion semiconductor device 70, the electric field at any location in the barrier electric field region is affected by the disturbance, or the photoelectrons accumulated in the N + region 76. Can maintain a stable photoelectric conversion operation without returning to the side of the N region 71.
Further, by fixing the surfaces of the P + regions 73, 74, and 75 to the ground potential, the electric fields near the very surface on the front side of the P + region 73 and near the very surface on the back side of the 74, 75 become zero, and as a result, P +. Electrons that absorb heat energy very close to the surfaces of regions 73, 74, and 75 and rise to the conduction band immediately recombine with the pores on the spot, resulting in a surface dark current and an external capacity 30 for charge charge storage. The risk of discharging the electric charge is reduced, and the conversion efficiency can be further improved.

図6を参照して本発明の第4実施例に係る光電変換半導体装置を説明する。
図6において、90は太陽光を受光して光起電力を発生する光電変換半導体装置であり、上側が表側、下側が裏側であり、深さ方向は上から下へ向かう方向である。光電変換半導体装置90には、断面がくし形(横向きH字状)のN領域91が設けられている。N領域91の内、裏側表面を除く上側表面、側周面に接触しながら周囲を囲むようにしてP領域92が設けられている。N領域91とP領域92の境界にPN接合面が形成されており、PN接合面を挟んだ上下両側と左右両側にPN接合型バリア電界領域が形成される。
The photoelectric conversion semiconductor device according to the fourth embodiment of the present invention will be described with reference to FIG.
In FIG. 6, 90 is a photoelectric conversion semiconductor device that receives sunlight and generates photovoltaic power, the upper side is the front side, the lower side is the back side, and the depth direction is from top to bottom. The photoelectric conversion semiconductor device 90 is provided with an N region 91 having a comb-shaped cross section (horizontally H-shaped). Among the N regions 91, the P region 92 is provided so as to surround the periphery while contacting the upper surface excluding the back surface and the side peripheral surface. A PN junction surface is formed at the boundary between the N region 91 and the P region 92, and a PN junction type barrier electric field region is formed on both the upper and lower sides and the left and right sides of the PN junction surface.

P領域92の表外側にP領域92の表面に接触するようにして面方向に延設された表側のP+領域93が設けられている。表側のP+領域93は光電変換半導体装置90の表側表面近くでの光電子の再結合を抑制するため、P+Pの濃度勾配により生じる濃度勾配型バリア電界を生成するとともに、青色短波長の光に対する光電変換効率の改善をするために設けられた領域である。P+領域93とP領域92との境界面を挟んだ上下両側に濃度勾配型バリア電界領域が形成されている。
N領域91の裏側表面及びP領域92の裏側表面に接触するようにして面方向に沿って延設された光電子吸出し用のN+領域94が設けられている。N+領域94の左右方向の中央部はN領域91の裏側中央部に埋め込み状態となるように突出した突出部94aとなっている。N+領域94の光電子エネルギーレベルはN領域91より一段低く、N領域91に集まった光電子を吸い出す機能を有する。N領域91、P領域92、P+領域93、N+領域94により、光電変換層95が構成されている。
On the outside of the front side of the P region 92, a front side P + region 93 extending in the surface direction so as to come into contact with the surface of the P region 92 is provided. The P + region 93 on the front side suppresses the recombination of photoelectrons near the front surface of the photoelectric conversion semiconductor device 90, so that a concentration gradient type barrier electric field generated by the concentration gradient of P + P is generated and photoelectric conversion to blue short wavelength light is performed. This is an area provided to improve efficiency. A concentration gradient type barrier electric field region is formed on both the upper and lower sides of the boundary surface between the P + region 93 and the P region 92.
An N + region 94 for sucking out photoelectrons is provided so as to be in contact with the back surface of the N region 91 and the back surface of the P region 92 and extended along the surface direction. The central portion in the left-right direction of the N + region 94 is a protruding portion 94a that protrudes so as to be embedded in the central portion on the back side of the N region 91. The photoelectron energy level in the N + region 94 is one step lower than that in the N region 91, and has a function of sucking out the photoelectrons collected in the N region 91. The photoelectric conversion layer 95 is composed of the N region 91, the P region 92, the P + region 93, and the N + region 94.

光電変換層95の表側には、P+領域93の表側の左右端部を除く表面に接触するようにして透明な受光窓領域としての絶縁性のSiO2領域96が設けられている。SiO2領域96の左側と右側には表側のP+領域93の表側表面の左右端部と導通した第1の極性の外面電極97、98が設けられている。
光電変換層95の裏側には、N+領域94の中央部を除く裏外側に絶縁性のSiO2領域99、100が設けられており、このSiO2領域99、100の裏外側に、中央部でN+領域94の裏外側表面と導通した第2の極性の外面電極101が設けられている。
On the front side of the photoelectric conversion layer 95, an insulating SiO2 region 96 as a transparent light receiving window region is provided so as to be in contact with the surface of the P + region 93 except for the left and right ends on the front side. On the left and right sides of the SiO2 region 96, outer surface electrodes 97 and 98 having the first polarity conducting with the left and right ends of the front surface of the front P + region 93 are provided.
Insulating SiO2 regions 99 and 100 are provided on the back side of the photoelectric conversion layer 95 except for the central portion of the N + region 94, and the N + region at the central portion is provided on the back outer side of the SiO2 regions 99 and 100. An outer surface electrode 101 having a second polarity conducting with the back outer surface of 94 is provided.

光電変換半導体装置90は、N領域91の左右方向の中央を通り、深さ方向に延びた対称線C3から見て、N領域91、P領域92、P+領域93、N+領域94、外面電極97、98、101、SiO2領域96、99、100が左右線対称に形成されている。各外面電極97、98、101は金属製である。外面電極101は光電変換半導体装置90の裏側に到達した入射光の可視光成分を反射し、再度、光電変換させたり、入射光の遠赤外成分を反射し、光電変換半導体装置90の表外側に放出させて光電変換半導体装置90の昇温を抑制する機能を有する。 The photoelectric conversion semiconductor device 90 passes through the center of the N region 91 in the left-right direction, and when viewed from the symmetry line C3 extending in the depth direction, the N region 91, the P region 92, the P + region 93, the N + region 94, and the outer surface electrode 97. , 98, 101, SiO2 regions 96, 99, 100 are formed symmetrically in the left-right line. Each outer surface electrode 97, 98, 101 is made of metal. The outer surface electrode 101 reflects the visible light component of the incident light that has reached the back side of the photoelectric conversion semiconductor device 90, and performs photoelectric conversion again or reflects the far infrared component of the incident light, so that the front and outer surfaces of the photoelectric conversion semiconductor device 90 are reflected. It has a function of suppressing the temperature rise of the photoelectric conversion semiconductor device 90.

光電変換半導体装置90の内、外面電極97、98はグランドに接続されており、グランド電位に固定されている。一方、外面電極101とグランドとの間には電荷蓄積用の外部容量30が接続されている。また、外部容量30にはスイッチ31を介して外部負荷32が接続されている。なお、光電変換半導体装置90の内部に電荷蓄積用の容量(図示せず)を形成し、この容量の両極をN+領域94に設けられた外面電極101とグランド間に接続するようにしても良い。 In the photoelectric conversion semiconductor device 90, the outer surface electrodes 97 and 98 are connected to the ground and fixed to the ground potential. On the other hand, an external capacitance 30 for charge storage is connected between the outer surface electrode 101 and the ground. Further, an external load 32 is connected to the external capacity 30 via a switch 31. A charge storage capacitance (not shown) may be formed inside the photoelectric conversion semiconductor device 90, and both electrodes of this capacitance may be connected between the outer surface electrode 101 provided in the N + region 94 and the ground. ..

光電子のエネルギーレベルは表側のP+領域93が一番高く、P領域92、N領域91、N+領域94の順に低くなる。
表側のSiO2領域96を通した入射光で発生した光電子(e-)とホール(h+)は、表側のP+P濃度勾配により生じる濃度勾配型バリア電界とPN接合の空乏層内に生じるPN接合型バリア電界により直ちに分離されるので、再結合することなく光電子はエネルギーレベルが一番低いN+領域94へ移動し、ホールはP+領域93へ移動する。
P+領域93に到達したホールは外面電極97、98より供給される電子と結合して消失する。スイッチ31が開のとき、N+領域94に到達した光電子はN+領域94、外面電極101、外部容量30の+極30aに蓄積される。図6の外部回路は、スイッチ31を閉にすると、外部容量30に蓄積された光電子が外部負荷32に流れて、N+領域94、外面電極101、外部容量30の+極30aに蓄積された光電子がリセットされる例を示す。
The energy level of photoelectrons is highest in the P + region 93 on the front side, and decreases in the order of the P region 92, the N region 91, and the N + region 94.
The photoelectrons (e−) and holes (h +) generated by the incident light passing through the SiO2 region 96 on the front side are the concentration gradient type barrier electric field generated by the P + P concentration gradient on the front side and the PN junction type barrier generated in the depletion layer of the PN junction. Since the photoelectrons are immediately separated by the electric field, the photoelectrons move to the N + region 94 having the lowest energy level and the holes move to the P + region 93 without recombination.
The holes that reach the P + region 93 are combined with the electrons supplied from the outer surface electrodes 97 and 98 and disappear. When the switch 31 is open, the photoelectrons that have reached the N + region 94 are accumulated in the + electrode 30a of the N + region 94, the outer surface electrode 101, and the external capacitance 30. In the external circuit of FIG. 6, when the switch 31 is closed, the photoelectrons accumulated in the external capacitance 30 flow to the external load 32, and the optoelectronics accumulated in the + pole 30a of the N + region 94, the outer surface electrode 101, and the external capacitance 30. Here is an example where is reset.

光電変換半導体装置90の表側のP+領域93の表面がグランド電位に固定されることにより、表側及び裏側表面近くのP+P濃度勾配により生じる濃度勾配型バリア電界領域とPN接合の空乏層内に生じるPN接合型バリア電界領域の全域の電位が固定されるので、光電変換半導体装置90の周囲でサージ等の外乱が生じても、バリア電界領域のいずれの場所の電界も外乱の影響を受けたり、N+領域94に蓄積した光電子がN領域91の側に戻ったりすることもなく、安定した光電変換動作を維持できる。
またP+領域93の表面がグランド電位に固定されることで、P+領域93の表側のごく表面近くの電界が零となり、この結果、P+領域93のごく表面近くで熱エネルギーを吸収して伝導帯に上がった電子がその場で直ちに空孔と再結合するので、表面暗電流となって電荷電荷蓄積用の外部容量30を放電させてしまう恐れが少なくなり、変換効率の一層の向上を図ることができる。
When the surface of the P + region 93 on the front side of the photoelectric conversion semiconductor device 90 is fixed to the ground potential, the PN generated in the PN junction between the concentration gradient type barrier electric field region generated by the P + P concentration gradient near the front and back surfaces and the PN junction. Since the potential over the entire junction type barrier electric field region is fixed, even if a disturbance such as a surge occurs around the photoelectric conversion semiconductor device 90, the electric field at any location in the barrier electric field region is affected by the disturbance, or N +. The photoelectrons accumulated in the region 94 do not return to the side of the N region 91, and a stable photoelectric conversion operation can be maintained.
Further, since the surface of the P + region 93 is fixed to the ground potential, the electric field near the very surface on the front side of the P + region 93 becomes zero, and as a result, heat energy is absorbed near the very surface of the P + region 93 and the conduction band is absorbed. Since the electrons that have risen to the surface are immediately recombined with the vacancies on the spot, there is less risk that the external capacitance 30 for charge storage will be discharged as a surface dark current, and the conversion efficiency will be further improved. Can be done.

この第4実施例によれば、断面がくし形のN領域91をP領域92により囲み、深さ方向に多層のPN接合面を形成し、更にP領域92の表側表面に再結合阻止用のP+領域93を設けるとともに、N領域91の裏側表面にN+領域94を設けて光電子を吸い出すようにしたことにより、深さ方向のほぼ全域にわたりバリア電界領域を形成することができ、表側のSiO2領域96を通した光入射で発生した光電子とホールを再結合することなく分離させ、光電子をN領域91からエネルギー準位の一段低いN+領域94へ吸い出すことができるので、N領域91に光電子が滞留せず、光電変換効率の高い光電変換半導体装置90が得られる。
また、裏面側に到達した入射光は外面電極101により再度、表面方向に反射されて可視光成分が光電子に変換されるので、これによっても変換効率が改善する。入射光の遠赤外線成分は外面電極101により反射されて光電変換半導体装置90の表面から外側に放出されるので、光電変換半導体装置90の設置台側が昇温せずに済み、冷却設備の負担を軽減したり、変換効率の悪化防止をしたりすることができる。
また光電変換半導体装置90の表側のP+領域93の表面がグランド電位に固定されることにより、表側及び裏側表面近くのP+P濃度勾配により生じる濃度勾配型バリア電界領域とPN接合の空乏層内に生じるPN接合型バリア電界領域の全域の電位が固定されるので、光電変換半導体装置90の周囲でサージ等の外乱が生じても、バリア電界領域のいずれの場所の電界も外乱の影響を受けたり、N+領域94に蓄積した光電子がN領域91の側に戻ったりすることもなく、安定した光電変換動作を維持できる。
またP+領域93の表面がグランド電位に固定されることで、P+領域93の表側のごく表面近くの電界が零となり、この結果、P+領域93のごく表面近くで熱エネルギーを吸収して伝導帯に上がった電子がその場で直ちに空孔と再結合するので、表面暗電流となって電荷電荷蓄積用の外部容量30を放電させてしまう恐れが少なくなり、変換効率の一層の向上を図ることができる。
According to this fourth embodiment, the N region 91 having a comb-shaped cross section is surrounded by the P region 92 to form a multi-layered PN junction surface in the depth direction, and further, P + for preventing recombination is formed on the front surface of the P region 92. By providing the region 93 and providing the N + region 94 on the back surface of the N region 91 to suck out photoelectrons, a barrier electric field region can be formed over almost the entire depth direction, and the SiO2 region 96 on the front side can be formed. Since the photoelectrons generated by the light incident through the light and the holes can be separated without recombination, and the photoelectrons can be sucked from the N region 91 to the N + region 94, which is one step lower in the energy level, the photoelectrons stay in the N region 91. Instead, a photoelectric conversion semiconductor device 90 having high photoelectric conversion efficiency can be obtained.
Further, the incident light that has reached the back surface side is reflected again in the surface direction by the outer surface electrode 101, and the visible light component is converted into photoelectrons, which also improves the conversion efficiency. Since the far-infrared component of the incident light is reflected by the outer surface electrode 101 and emitted to the outside from the surface of the photoelectric conversion semiconductor device 90, the installation base side of the photoelectric conversion semiconductor device 90 does not need to be heated, which imposes a burden on the cooling equipment. It can be reduced or the conversion efficiency can be prevented from deteriorating.
Further, when the surface of the P + region 93 on the front side of the photoelectric conversion semiconductor device 90 is fixed to the ground potential, it is generated in the empty layer of the PN junction with the concentration gradient type barrier electric field region generated by the P + P concentration gradient near the front and back surfaces. Since the potential over the entire PN junction type barrier electric field region is fixed, even if a disturbance such as a surge occurs around the photoelectric conversion semiconductor device 90, the electric field at any location in the barrier electric field region is affected by the disturbance. The photoelectrons accumulated in the N + region 94 do not return to the side of the N region 91, and a stable photoelectric conversion operation can be maintained.
Further, by fixing the surface of the P + region 93 to the ground potential, the electric field near the very surface on the front side of the P + region 93 becomes zero, and as a result, heat energy is absorbed near the very surface of the P + region 93 and the conduction band is absorbed. Since the electrons that have risen to the surface are immediately recombined with the vacancies on the spot, there is less risk that the external capacitance 30 for charge charge storage will be discharged as a surface dark current, and the conversion efficiency will be further improved. Can be done.

図7、図8を参照して本発明の第5実施例に係る光電変換半導体装置を説明する。
図7において、110は太陽光を受光して光起電力を発生する光電変換半導体装置であり、上側が表側、下側が裏側であり、深さ方向は上から下へ向かう方向である。光電変換半導体装置110は、内部に断面がくし形のN領域111が設けられている。N領域111の裏側の中央部には裏側方向へ突設された突設部111aが形成されている。N領域111の内、裏側の突設部111aの裏側端面111bを除く裏側表面、表側表面、側周面に接触しながら周囲を囲むようにしてP領域112が設けられている。P領域112の裏側の中央部には突設部111aの側面周囲を囲むように一段裏側に突設した段差部112aが形成されている。N領域111とP領域112の境界にPN接合面が形成されており、PN接合面を挟んだ上下両側または左右両側にPN接合型バリア電界領域が形成される。
The photoelectric conversion semiconductor device according to the fifth embodiment of the present invention will be described with reference to FIGS. 7 and 8.
In FIG. 7, 110 is a photoelectric conversion semiconductor device that receives sunlight and generates photovoltaic power, the upper side is the front side, the lower side is the back side, and the depth direction is from top to bottom. The photoelectric conversion semiconductor device 110 is provided with an N region 111 having a comb-shaped cross section inside. A projecting portion 111a projecting in the back side direction is formed in the central portion on the back side of the N region 111. Among the N regions 111, the P region 112 is provided so as to surround the periphery while contacting the back side surface, the front side surface, and the side peripheral surface excluding the back side end surface 111b of the back side protruding portion 111a. In the central portion on the back side of the P region 112, a stepped portion 112a is formed so as to surround the side surface of the protruding portion 111a so as to project on the back side one step. A PN junction surface is formed at the boundary between the N region 111 and the P region 112, and a PN junction type barrier electric field region is formed on both the upper and lower sides or the left and right sides of the PN junction surface.

P領域112の表外側にP領域112の表面に接触するようにして面方向に延設された表側のP+領域113が設けられている。表側のP+領域113は光電変換半導体装置110の表側表面近くでの光電子の再結合を抑制するため、P+Pの濃度勾配により生じる濃度勾配型バリア電界を生成するとともに、青色短波長の光に対する光電変換効率の改善をするために設けられた領域である。P+領域113とP領域112との境界面を挟んだ上下両側に濃度勾配型バリア電界領域が形成されている。 On the outside of the front side of the P region 112, a front side P + region 113 extending in the surface direction so as to come into contact with the surface of the P region 112 is provided. The P + region 113 on the front side suppresses the recombination of photoelectrons near the front surface of the photoelectric conversion semiconductor device 110, so that a concentration gradient type barrier electric field generated by the concentration gradient of P + P is generated and photoelectric conversion for blue short wavelength light is performed. This is an area provided to improve efficiency. Concentration gradient type barrier electric field regions are formed on both the upper and lower sides of the boundary surface between the P + region 113 and the P region 112.

P領域112の裏外側の内、段差部112aの裏側端面112bを除くP領域112の裏側表面に接触するようにして面方向に沿ってP+領域114、115が設けられている。P+領域114、115は光電変換半導体装置110の裏側表面近くでの光電子の再結合を抑制するため、P+Pの濃度勾配により生じる濃度勾配型バリア電界を生成するために設けられた領域である。P+領域114、115とP領域112との境界面を挟んだ上下両側に濃度勾配型バリア電界領域が形成されている。
N領域111の裏側の中央部に接触するようにして光電子吸出し用のN+領域116が設けられている。具体的には突設部111aにN+領域116が埋め込み状態で設けられている。N+領域116の光電子エネルギーレベルはN領域111より一段低く、N領域111に集まった光電子を吸い出す機能を有する。P+領域114、115、段差部112aの裏側端面112b、突設部111aの裏側端面111b、N+領域116の裏側端面116aは受光主面に平行な平面を成す。N領域111、P領域112、P+領域113、114、115、N+領域116により、光電変換層117が構成されている。
Within the back outer side of the P region 112, the P + regions 114 and 115 are provided along the surface direction so as to come into contact with the back side surface of the P region 112 excluding the back side end surface 112b of the step portion 112a. The P + regions 114 and 115 are regions provided to generate a concentration gradient type barrier electric field generated by the concentration gradient of P + P in order to suppress the recombination of photoelectrons near the back surface of the photoelectric conversion semiconductor device 110. Concentration gradient type barrier electric field regions are formed on both the upper and lower sides of the boundary surface between the P + regions 114 and 115 and the P region 112.
The N + region 116 for sucking out photoelectrons is provided so as to come into contact with the central portion on the back side of the N region 111. Specifically, the N + region 116 is provided in the projecting portion 111a in an embedded state. The photoelectron energy level of the N + region 116 is one step lower than that of the N region 111, and has a function of sucking out the photoelectrons collected in the N region 111. The P + regions 114 and 115, the back side end surface 112b of the step portion 112a, the back side end surface 111b of the projecting portion 111a, and the back side end surface 116a of the N + region 116 form a plane parallel to the light receiving main surface. The photoelectric conversion layer 117 is composed of the N region 111, the P region 112, the P + region 113, 114, 115, and the N + region 116.

光電変換層117の表側には、P+領域113の表側の左右端部を除く表面に接触するようにして透明な受光窓領域としての絶縁性のSiO2領域118が設けられている。SiO2領域118の左側と右側には表側のP+領域113の表側表面の左右端部と導通した第1の極性の外面電極119、120が設けられている。
光電変換層117の裏側には、P+領域114の左右端部を除く裏外側に、P+領域114の表面と導通した第1の極性の外面電極121、P+領域115の左右端部を除く裏外側に、P+領域115の表面と導通した第1の極性の外面電極122が設けられている。またN+領域116の裏外側に、N+領域116の表面と導通した第2の極性の外面電極123が設けられている。光電変換層117の左右側面には絶縁性のSiO2領域124、125が設けられている。光電変換層117の裏側の外面電極121、122、123以外の外面には絶縁性のSiO2領域126、127が設けられている。
On the front side of the photoelectric conversion layer 117, an insulating SiO2 region 118 as a transparent light receiving window region is provided so as to be in contact with the surface of the P + region 113 excluding the left and right ends on the front side. On the left and right sides of the SiO2 region 118, outer surface electrodes 119 and 120 having the first polarity conducting with the left and right ends of the front surface of the P + region 113 on the front side are provided.
On the back side of the photoelectric conversion layer 117, on the back outside excluding the left and right ends of the P + region 114, the outer surface electrode 121 having the first polarity conducting with the surface of the P + region 114, and the back outside excluding the left and right ends of the P + region 115. Is provided with an outer surface electrode 122 having a first polarity that is conductive with the surface of the P + region 115. Further, on the back outer side of the N + region 116, an outer surface electrode 123 having a second polarity conducting with the surface of the N + region 116 is provided. Insulating SiO2 regions 124 and 125 are provided on the left and right side surfaces of the photoelectric conversion layer 117. Insulating SiO2 regions 126, 127 are provided on the outer surface other than the outer surface electrodes 121, 122, and 123 on the back side of the photoelectric conversion layer 117.

光電変換半導体装置110は、N領域111の左右方向の中央を通り、深さ方向に延びた対称線C4から見て、N領域111、P領域112、P+領域113、114、115、N+領域116、外面電極119、120、121、122、123、SiO2領域118、124、125、126、127が左右線対称に形成されている。各外面電極119、120、121、122、123は金属製である。外面電極121、122は光電変換半導体装置110の裏側に到達した入射光の可視光成分を反射し、再度、光電変換させたり、入射光の遠赤外成分を反射し、光電変換半導体装置110の表外側に放出させて光電変換半導体装置110の昇温を抑制する機能を有する。 The photoelectric conversion semiconductor device 110 passes through the center of the N region 111 in the left-right direction and is viewed from the symmetry line C4 extending in the depth direction, the N region 111, the P region 112, the P + region 113, 114, 115, and the N + region 116. , External electrodes 119, 120, 121, 122, 123, SiO2 regions 118, 124, 125, 126, 127 are formed symmetrically in the left-right line. Each outer surface electrode 119, 120, 121, 122, 123 is made of metal. The outer surface electrodes 121 and 122 reflect the visible light component of the incident light that has reached the back side of the photoelectric conversion semiconductor device 110, and perform photoelectric conversion again or reflect the far-infrared component of the incident light to reflect the far-infrared component of the incident light of the photoelectric conversion semiconductor device 110. It has a function of suppressing the temperature rise of the photoelectric conversion semiconductor device 110 by discharging it to the outside.

光電変換半導体装置110の内、外面電極119、120、121、122はグランドに接続されており、グランド電位に固定されている。一方、外面電極123とグランドとの間には電荷蓄積用の外部容量30が接続されている。また、外部容量30にはスイッチ31を介して外部負荷32が接続されている。なお、光電変換半導体装置70の内部に電荷蓄積用の容量(図示せず)を形成し、この容量の両極をN+領域116に設けられた外面電極123とグランド間に接続するようにしても良い。 Among the photoelectric conversion semiconductor devices 110, the outer surface electrodes 119, 120, 121, 122 are connected to the ground and are fixed to the ground potential. On the other hand, an external capacitance 30 for charge storage is connected between the outer surface electrode 123 and the ground. Further, an external load 32 is connected to the external capacity 30 via a switch 31. A charge storage capacity (not shown) may be formed inside the photoelectric conversion semiconductor device 70, and both electrodes of this capacity may be connected between the outer surface electrode 123 provided in the N + region 116 and the ground. ..

光電子のエネルギーレベルは表側及び裏側のP+領域113、114、115が一番高く、内部のP領域112、N領域111、裏側のN+領域116の順に低くなる。
表面側のSiO2領域118を通した入射光で発生した光電子(e-)とホール(h+)は、表側及び裏側のP+P濃度勾配により生じる濃度勾配型バリア電界とPN接合の空乏層内に生じるPN接合型バリア電界により直ちに分離されるので、再結合することなく光電子はエネルギーレベルが一番低いN+領域116へ移動し、ホールはP+領域113、114、115へ移動する。
P+領域113、114、115に到達したホールは外面電極119、120、121、122により供給される電子と結合して消失する。スイッチ31が開のとき、N+領域116に到達した光電子はN+領域116、外面電極123、外部容量30の+極30aに蓄積される。図7の外部回路は、スイッチ31を閉にすると、外部容量30に蓄積された光電子が外部負荷32に流れて、N+領域116、外面電極123、外部容量30の+極30aに蓄積された光電子がリセットされる例を示す。
The energy levels of photoelectrons are highest in the P + regions 113, 114, and 115 on the front and back sides, and decrease in the order of the internal P regions 112, N regions 111, and the back side N + regions 116.
The photoelectrons (e−) and holes (h +) generated by the incident light passing through the SiO2 region 118 on the front side are the concentration gradient type barrier electric field generated by the P + P concentration gradients on the front and back sides and the PN generated in the depletion layer of the PN junction. Since they are immediately separated by the junctional barrier electric field, the photoelectrons move to the N + region 116, which has the lowest energy level, and the holes move to the P + regions 113, 114, 115 without recombination.
The holes that reach the P + regions 113, 114, 115 combine with the electrons supplied by the outer surface electrodes 119, 120, 121, 122 and disappear. When the switch 31 is open, the photoelectrons that have reached the N + region 116 are accumulated in the + pole 30a of the N + region 116, the outer surface electrode 123, and the external capacitance 30. In the external circuit of FIG. 7, when the switch 31 is closed, the photoelectrons accumulated in the external capacitance 30 flow to the external load 32, and the optoelectronics accumulated in the + pole 30a of the N + region 116, the outer surface electrode 123, and the external capacitance 30. Here is an example where is reset.

光電変換半導体装置110の表側のP+領域113、裏側のP+領域114、115の表面がグランド電位に固定されることにより、表側及び裏側表面近くのP+P濃度勾配により生じる濃度勾配型バリア電界領域とPN接合の空乏層内に生じるPN接合型バリア電界領域の全域の電位が固定されるので、光電変換半導体装置110の周囲でサージ等の外乱が生じても、バリア電界領域のいずれの場所の電界も外乱の影響を受けたり、N+領域116に蓄積した光電子がN領域111の側に戻ったりすることもなく、安定した光電変換動作を維持できる。
またP+領域113、114、115の表面がグランド電位に固定されることで、P+領域113の表側のごく表面近くと、114、115の裏側のごく表面近くの電界が零となり、この結果、P+領域113、114、115のごく表面近くで熱エネルギーを吸収して伝導帯に上がった電子がその場で直ちに空孔と再結合するので、表面暗電流となって電荷電荷蓄積用の外部容量30を放電させてしまう恐れが少なくなり、変換効率の一層の向上を図ることができる。
By fixing the surfaces of the P + region 113 on the front side and the P + regions 114 and 115 on the back side of the photoelectric conversion semiconductor device 110 to the ground potential, the concentration gradient type barrier electric field region and PN generated by the P + P concentration gradient near the front and back surfaces. Since the potential of the entire PN junction type barrier electric field region generated in the poor layer of the junction is fixed, even if a disturbance such as a surge occurs around the photoelectric conversion semiconductor device 110, the electric field at any place in the barrier electric field region can be applied. A stable photoelectric conversion operation can be maintained without being affected by disturbance or returning the photoelectrons accumulated in the N + region 116 to the side of the N region 111.
Further, by fixing the surfaces of the P + regions 113, 114, 115 to the ground potential, the electric fields near the very surface on the front side of the P + region 113 and near the very surface on the back side of the 114, 115 become zero, and as a result, P +. Electrons that absorb heat energy very close to the surfaces of regions 113, 114, and 115 and rise to the conduction band immediately recombine with the pores on the spot, resulting in a surface dark current and an external capacity 30 for charge charge storage. The risk of discharging the electric charge is reduced, and the conversion efficiency can be further improved.

この第5実施例によれば、P領域112によりN領域111の周囲を囲み、深さ方向に多層のPN接合面を形成し、更にP領域112の表裏両側の表面に再結合阻止用のP+領域113、114、115を設けるとともに、N領域111の裏側の中央部にN+領域116を設けて光電子を吸い出すようにしたことにより、深さ方向のほぼ全域にわたりバリア電界領域を形成することができ、SiO2領域118を通した光入射で発生した光電子とホールを再結合することなく分離させ、光電子をN領域111からエネルギー準位の一段低いN+領域116へ吸い出すことができるので、N領域111に光電子が滞留せず、光電変換効率の高い光電変換半導体装置110が得られる。
また、裏面側に到達した入射光は外面電極121、122により再度、表面方向に反射されて可視光成分が光電子に変換されるので、これによっても変換効率が改善する。入射光の遠赤外線成分は外面電極121、122により反射されて光電変換半導体装置110の表面から外側に放出されるので、光電変換半導体装置110の設置台側が昇温せずに済み、冷却設備の負担を軽減したり、変換効率の悪化防止をしたりすることができる。
光電変換半導体装置110のP+領域113、114、115の表面がグランド電位に固定されることにより、表側及び裏側表面近くのP+P濃度勾配により生じる濃度勾配型バリア電界領域とPN接合型バリア電界領域の全域の電位が固定されるので、光電変換半導体装置110の周囲でサージ等の外乱が生じても、バリア電界領域のいずれの場所の電界も外乱の影響を受けたり、N+領域116に蓄積した光電子がN領域111の側に戻ったりすることもなく、安定した光電変換動作を維持できる。
またP+領域113、114、115の表面がグランド電位に固定されることで、P+領域113の表側のごく表面近くと、114、115の裏側のごく表面近くの電界が零となり、この結果、P+領域113、114、115のごく表面近くで熱エネルギーを吸収して伝導帯に上がった電子がその場で直ちに空孔と再結合するので、表面暗電流となって電荷電荷蓄積用の外部容量30を放電させてしまう恐れが少なくなり、変換効率の一層の向上を図ることができる。
According to this fifth embodiment, the P region 112 surrounds the N region 111 to form a multi-layered PN junction surface in the depth direction, and P + for preventing recombination is further formed on both the front and back surfaces of the P region 112. By providing the regions 113, 114, and 115 and by providing the N + region 116 in the central portion on the back side of the N region 111 to suck out the photoelectrons, the barrier electric field region can be formed over almost the entire depth direction. , Photoelectrons generated by light incident through the SiO2 region 118 and holes can be separated without recombination, and the photoelectrons can be sucked from the N region 111 to the N + region 116, which is one step lower in energy level. A photoelectric conversion semiconductor device 110 having high photoelectric conversion efficiency without retention of photoelectrons can be obtained.
Further, the incident light that reaches the back surface side is reflected again in the surface direction by the outer surface electrodes 121 and 122, and the visible light component is converted into photoelectrons, which also improves the conversion efficiency. Since the far-infrared component of the incident light is reflected by the outer surface electrodes 121 and 122 and emitted to the outside from the surface of the photoelectric conversion semiconductor device 110, the installation base side of the photoelectric conversion semiconductor device 110 does not need to be heated, and the cooling equipment It is possible to reduce the burden and prevent deterioration of conversion efficiency.
By fixing the surfaces of the P + regions 113, 114, 115 of the photoelectric conversion semiconductor device 110 to the ground potential, the concentration gradient type barrier electric field region and the PN junction type barrier electric field region generated by the P + P concentration gradient near the front and back surfaces Since the potential over the entire range is fixed, even if a disturbance such as a surge occurs around the photoelectric conversion semiconductor device 110, the electric field at any location in the barrier electric field region is affected by the disturbance, or the photoelectrons accumulated in the N + region 116. Can maintain a stable photoelectric conversion operation without returning to the side of the N region 111.
Further, by fixing the surfaces of the P + regions 113, 114, 115 to the ground potential, the electric fields near the very surface on the front side of the P + region 113 and near the very surface on the back side of the 114, 115 become zero, and as a result, P +. Electrons that absorb heat energy very close to the surfaces of regions 113, 114, and 115 and rise to the conduction band immediately recombine with the pores on the spot, resulting in a surface dark current and an external capacity 30 for charge charge storage. The risk of discharging the electric charge is reduced, and the conversion efficiency can be further improved.

図9を参照して本発明の第6実施例に係る光電変換半導体装置を説明する。
図9において、130は太陽光を受光して光起電力を発生する光電変換半導体装置であり、上側が表側、下側が裏側であり、深さ方向は上から下へ向かう方向である。光電変換半導体装置130は内部に後述する光電変換層(符号145参照)を有している。
光電変換層131には断面が逆T字状のN領域140が設けられている。N領域140の表側中央部には表側方向へ突設された突設部140aが形成されている。N領域140の内、表側の突設部140aの表側端面140bを除く表側表面に、N領域140の表面に接触するようにして表側のP領域141が設けられており、N領域140の裏側に、N領域140の表面に接触するようにして裏側のP領域142が設けられている。表側のP領域141には突設部140aの側面周囲を囲むように一段表側に突設した段差部141aが形成されている。N領域140とP領域141、142の境界にPN接合面が形成されており、PN接合面を挟んだ上下両側にPN接合型バリア電界領域が形成される。
The photoelectric conversion semiconductor device according to the sixth embodiment of the present invention will be described with reference to FIG.
In FIG. 9, 130 is a photoelectric conversion semiconductor device that receives sunlight and generates photovoltaic power, the upper side is the front side, the lower side is the back side, and the depth direction is from top to bottom. The photoelectric conversion semiconductor device 130 has a photoelectric conversion layer (see reference numeral 145) described later inside.
The photoelectric conversion layer 131 is provided with an N region 140 having an inverted T-shaped cross section. A protruding portion 140a projecting in the front side is formed in the central portion on the front side of the N region 140. A P region 141 on the front side is provided on the front surface of the N region 140 excluding the front end surface 140b of the projecting portion 140a on the front side so as to be in contact with the surface of the N region 140, and the P region 141 on the front side is provided on the back side of the N region 140. , The P region 142 on the back side is provided so as to come into contact with the surface of the N region 140. In the P region 141 on the front side, a stepped portion 141a is formed so as to surround the side surface of the protruding portion 140a. A PN junction surface is formed at the boundary between the N region 140 and the P regions 141 and 142, and a PN junction type barrier electric field region is formed on both the upper and lower sides of the PN junction surface.

表側のP領域141の内、段差部141aの表側端面141bを除く表側と側面側、N領域140の側面側、裏側のP領域142の裏側と側面側を囲むようにして、P+領域143が設けられている。N領域140の突設部140aには、N領域140に接触するようにしてN+領域144が埋め込み状態で設けられている。P+領域143、段差部141a、突設部140a、N+領域144の表側は受光主面に平行な平面を成す。N領域140、P領域141、142、P+領域143、N+領域144により、光電変換層145が構成されている。P+領域143は光電変換半導体装置130の表側表面近くでの光電子の再結合を抑制するため、P+Pの濃度勾配により生じる濃度勾配型バリア電界を生成するとともに、青色短波長の光に対する光電変換効率の改善をするために設けられた領域である。P+領域143とP領域141、142との境界面を挟んだ上下両側に濃度勾配型バリア電界領域が形成されている。 A P + region 143 is provided so as to surround the front side and the side surface side of the front side P region 141 excluding the front side end surface 141b of the step portion 141a, the side surface side of the N region 140, and the back side and the side surface side of the back side P region 142. There is. The projecting portion 140a of the N region 140 is provided with the N + region 144 in an embedded state so as to be in contact with the N region 140. The front side of the P + region 143, the step portion 141a, the projecting portion 140a, and the N + region 144 forms a plane parallel to the light receiving main surface. The photoelectric conversion layer 145 is composed of the N region 140, the P region 141, 142, the P + region 143, and the N + region 144. In the P + region 143, in order to suppress the recombination of photoelectrons near the front surface of the photoelectric conversion semiconductor device 130, a concentration gradient type barrier electric field generated by the concentration gradient of P + P is generated, and the photoelectric conversion efficiency for blue short wavelength light is increased. This is an area provided for improvement. A concentration gradient type barrier electric field region is formed on both the upper and lower sides of the boundary surface between the P + region 143 and the P regions 141 and 142.

光電変換層145の表側表面に接触するようにして透明な受光窓領域としての絶縁性のSiO2領域146が設けられている。SiO2領域146の左右端部近くにはP+領域143の表側表面の左右端部と導通した第1の極性の外面電極147、148が設けられており、SiO2領域146の中央に埋め込むようにしてN+領域144の表側表面と接触する第2の極性の外面電極149が設けられている。光電変換層145の裏側及び側面側を囲むようにして、第2のN領域150が設けられており、更に第2のN領域150の裏側に第2のN+領域151が設けられている。第2のN+領域151の裏側に金属製反射領域152が設けられている。 An insulating SiO2 region 146 as a transparent light receiving window region is provided so as to be in contact with the front surface of the photoelectric conversion layer 145. Near the left and right ends of the SiO2 region 146, outer surface electrodes 147 and 148 having the first polarity conducting with the left and right ends of the front surface of the P + region 143 are provided, and N + is embedded in the center of the SiO2 region 146. A second polarity outer surface electrode 149 that comes into contact with the front surface of the region 144 is provided. A second N region 150 is provided so as to surround the back side and the side surface side of the photoelectric conversion layer 145, and a second N + region 151 is further provided on the back side of the second N region 150. A metal reflection region 152 is provided on the back side of the second N + region 151.

光電変換半導体装置130は、N領域140の左右方向の中央を通り、深さ方向に延びた対称線C5から見て、N領域140、P領域141、142、P+領域143、N+領域144、外面電極147、148、149、SiO2領域146、第2のN領域150、第2のN+領域151、金属製反射領域152が左右線対称となっている例を示す。各外面電極147、148、149は金属製である。金属製反射領域152は、光電変換半導体装置130の裏側に到達した入射光の可視光成分を反射し、再度、光電変換させたり、入射光の遠赤外成分を反射し、光電変換半導体装置130の表外側に放出させて光電変換半導体装置130の昇温を抑制する機能を有する。 The photoelectric conversion semiconductor device 130 passes through the center of the N region 140 in the left-right direction, and when viewed from the symmetry line C5 extending in the depth direction, the N region 140, the P region 141, 142, the P + region 143, the N + region 144, and the outer surface. An example is shown in which the electrodes 147, 148, 149, SiO2 region 146, the second N region 150, the second N + region 151, and the metal reflection region 152 are left-right axisymmetric. Each outer surface electrode 147, 148, 149 is made of metal. The metal reflection region 152 reflects the visible light component of the incident light that has reached the back side of the photoelectric conversion semiconductor device 130, performs photoelectric conversion again, or reflects the far-infrared component of the incident light, and the photoelectric conversion semiconductor device 130. It has a function of suppressing the temperature rise of the photoelectric conversion semiconductor device 130 by discharging it to the outside of the surface of the above.

光電変換半導体装置130の内、外面電極147、148と金属製反射領域152はグランドに接続されており、グランド電位に固定されている。一方、外面電極149とグランドとの間には電荷蓄積用の外部容量30が接続されている。また、外部容量30にはスイッチ31を介して外部負荷32が接続されている。なお、光電変換半導体装置130の内部に電荷蓄積用の容量(図示せず)を形成し、この容量の両極をN+領域144に設けられた外面電極149とグランド間に接続するようにしても良い。 In the photoelectric conversion semiconductor device 130, the outer surface electrodes 147 and 148 and the metal reflection region 152 are connected to the ground and are fixed to the ground potential. On the other hand, an external capacitance 30 for charge storage is connected between the outer surface electrode 149 and the ground. Further, an external load 32 is connected to the external capacity 30 via a switch 31. A charge storage capacity (not shown) may be formed inside the photoelectric conversion semiconductor device 130, and both electrodes of this capacity may be connected between the outer surface electrode 149 provided in the N + region 144 and the ground. ..

光電変換層145での光電子のエネルギーレベルはP+領域143が一番高く、P領域141、142、N領域140、N+領域144の順に低くなる。
表面側のSiO2領域146を通した入射光で発生した光電子(e-)とホール(h+)は、表側及び裏側のP+P濃度勾配により生じる濃度勾配型バリア電界とPN接合の空乏層内に生じるPN接合型バリア電界により直ちに分離されるので、再結合することなく光電子はエネルギーレベルが一番低いN+領域144へ移動し、ホールはP+領域143へ移動する。
P+領域143に到達したホールは外面電極147、148より供給される電子と結合して消失する。スイッチ31が開のとき、N+領域144に到達した光電子はN+領域144、外面電極149、外部コンデンサ30の+極30aに蓄積される。図9の外部回路は、スイッチ31を閉にすると、外部容量30に蓄積された光電子が外部負荷32に流れて、N+領域144、外面電極149、外部容量30の+極30aに蓄積された光電子がリセットされる例を示す。
The energy level of photoelectrons in the photoelectric conversion layer 145 is highest in the P + region 143, and decreases in the order of P regions 141, 142, N region 140, and N + region 144.
The photoelectrons (e−) and holes (h +) generated by the incident light passing through the SiO2 region 146 on the front side are the concentration gradient type barrier electric field generated by the P + P concentration gradients on the front and back sides and the PN generated in the depletion layer of the PN junction. Since they are immediately separated by the junctional barrier electric field, the photoelectrons move to the N + region 144, which has the lowest energy level, and the holes move to the P + region 143, without recombination.
The holes that reach the P + region 143 are combined with the electrons supplied from the outer surface electrodes 147 and 148 and disappear. When the switch 31 is open, the photoelectrons that have reached the N + region 144 are accumulated in the N + region 144, the outer surface electrode 149, and the + pole 30a of the external capacitor 30. In the external circuit of FIG. 9, when the switch 31 is closed, the photoelectrons stored in the external capacity 30 flow to the external load 32, and the photoelectrons stored in the N + region 144, the outer surface electrode 149, and the + pole 30a of the external capacity 30 are stored. Here is an example where is reset.

光電変換半導体装置130のP+領域143の表側表面がグランド電位に固定されることにより、表側及び裏側表面近くのP+P濃度勾配により生じる濃度勾配型バリア電界領域とPN接合の空乏層内に生じるPN接合型バリア電界領域の全域の電位が固定されるので、光電変換半導体装置130の周囲でサージ等の外乱が生じても、バリア電界領域のいずれの場所の電界も外乱の影響を受けたり、N+領域144に蓄積した光電子がN領域140の側に戻ったりすることもなく、安定した光電変換動作を維持できる。
またP+領域143の表面がグランド電位に固定されることで、P+領域143の表側のごく表面近くの電界が零となり、この結果、P+領域143のごく表面近くで熱エネルギーを吸収して伝導帯に上がった電子がその場で直ちに空孔と再結合するので、表面暗電流となって電荷電荷蓄積用の外部容量30を放電させてしまう恐れが少なくなり、変換効率の一層の向上を図ることができる。
When the front surface of the P + region 143 of the photoelectric conversion semiconductor device 130 is fixed to the ground potential, the concentration gradient type barrier electric field region generated by the P + P concentration gradient near the front and back surfaces and the PN junction generated in the PN junction empty layer. Since the potential in the entire range of the type barrier electric field region is fixed, even if a disturbance such as a surge occurs around the photoelectric conversion semiconductor device 130, the electric field at any place in the barrier electric field region is affected by the disturbance, or the N + region. The photoelectrons accumulated in 144 do not return to the side of the N region 140, and a stable photoelectric conversion operation can be maintained.
Further, by fixing the surface of the P + region 143 to the ground potential, the electric field near the very surface on the front side of the P + region 143 becomes zero, and as a result, heat energy is absorbed near the very surface of the P + region 143 to absorb the conduction band. Since the electrons that have risen to the surface are immediately recombined with the vacancies on the spot, there is less risk that the external capacitance 30 for charge charge storage will be discharged as a surface dark current, and the conversion efficiency will be further improved. Can be done.

この第6実施例によれば、光電変換半導体装置130の内部に設けた光電変換部145の中にN領域140に設け、N領域140の表側中央部を除く表側と裏側にP領域141、142を設け、表側のP領域141の段差部141aの表側端面141bを除く表側と側面側、N領域140の側面側、裏側のP領域142の裏側と側面側を囲むようにしてP+領域143を設けるとともに、N領域140の表側の中央にN+領域144を設けて光電子を吸い出すようにしたことにより、深さ方向のほぼ全域にわたり空乏層を形成し、SiO2領域146を通した光入射で発生した光電子とホールを再結合することなく分離させ、光電子をN領域140からエネルギーレベルの一段低いN+領域144へ吸い出すことができるので、N領域140に光電子が滞留せず、光電変換効率の高い光電変換半導体装置130が得られる。
また、裏面側に到達した入射光は金属製反射領域152により再度、表面方向に反射されて可視光成分が光電子に変換されるので、これによっても変換効率が改善する。入射光の遠赤外線成分は金属製反射領域152により反射されて光電変換半導体装置130の表面から外側に放出されるので、光電変換半導体装置130の設置台側が昇温せずに済み、冷却設備の負担を軽減したり、変換効率の悪化防止をしたりすることができる。
また光電変換半導体装置130のP+領域143の表側表面がグランド電位に固定されることにより、表側及び裏側表面近くのP+P濃度勾配により生じる濃度勾配型バリア電界領域とPN接合の空乏層内に生じるPN接合型バリア電界領域の全域の電位が固定されるので、光電変換半導体装置130の周囲でサージ等の外乱が生じても、バリア電界領域のいずれの場所の電界も外乱の影響を受けたり、N+領域144に蓄積した光電子がN領域140の側に戻ったりすることもなく、安定した光電変換動作を維持できる。
またP+領域143の表面がグランド電位に固定されることで、P+領域143の表側のごく表面近くの電界が零となり、この結果、P+領域143の表側のごく表面近くで熱エネルギーを吸収して伝導帯に上がった電子がその場で直ちに空孔と再結合するので、表面暗電流となって電荷電荷蓄積用の外部容量30を放電させてしまう恐れが少なくなり、変換効率の一層の向上を図ることができる。
According to the sixth embodiment, the N region 140 is provided in the photoelectric conversion unit 145 provided inside the photoelectric conversion semiconductor device 130, and the P regions 141 and 142 are provided on the front side and the back side of the N region 140 excluding the front center portion. The P + region 143 is provided so as to surround the front side and the side surface side of the step portion 141a of the front side P region 141 except for the front end surface 141b, the side surface side of the N region 140, and the back side and the side surface side of the back side P region 142. By providing an N + region 144 in the center of the front side of the N region 140 to suck out photoelectrons, a depletion layer is formed over almost the entire depth direction, and photoelectrons and holes generated by light incident through the SiO2 region 146 are formed. The photoelectrons can be sucked from the N region 140 to the N + region 144, which has a lower energy level, so that the photoelectrons do not stay in the N region 140 and the photoelectric conversion semiconductor device 130 has high photoelectric conversion efficiency. Is obtained.
Further, the incident light that reaches the back surface side is reflected again in the surface direction by the metal reflection region 152, and the visible light component is converted into photoelectrons, which also improves the conversion efficiency. Since the far-infrared component of the incident light is reflected by the metal reflection region 152 and emitted to the outside from the surface of the photoelectric conversion semiconductor device 130, the installation base side of the photoelectric conversion semiconductor device 130 does not need to be heated, and the cooling equipment It is possible to reduce the burden and prevent deterioration of conversion efficiency.
Further, when the front surface of the P + region 143 of the photoelectric conversion semiconductor device 130 is fixed to the ground potential, the PN generated in the PN junction between the concentration gradient type barrier electric field region generated by the P + P concentration gradient near the front and back surfaces and the PN junction. Since the potential over the entire junction type barrier electric field region is fixed, even if a disturbance such as a surge occurs around the photoelectric conversion semiconductor device 130, the electric field at any location in the barrier electric field region is affected by the disturbance, or N +. The photoelectrons accumulated in the region 144 do not return to the side of the N region 140, and a stable photoelectric conversion operation can be maintained.
Further, since the surface of the P + region 143 is fixed to the ground potential, the electric field near the very surface on the front side of the P + region 143 becomes zero, and as a result, heat energy is absorbed near the very surface on the front side of the P + region 143. Since the electrons that have risen in the conduction band are immediately recombined with the vacancies on the spot, there is less risk of becoming a surface dark current and discharging the external capacity 30 for charge storage, further improving conversion efficiency. Can be planned.

図10を参照して本発明の第7実施例に係る光電変換半導体装置を説明する。
図10において、160は太陽光を受光して光起電力を発生する光電変換半導体装置であり、上側が表側、下側が裏側であり、深さ方向は上から下へ向かう方向である。光電変換半導体装置160は図9の光電変換半導体装置130と同一構成の光電変換部161、162、163を左右方向に一体的に併設した構成を有している。各光電変換部161、162、163の構造及び働きは図9の光電変換半導体装置130と同様である。
The photoelectric conversion semiconductor device according to the seventh embodiment of the present invention will be described with reference to FIG.
In FIG. 10, 160 is a photoelectric conversion semiconductor device that receives sunlight and generates photovoltaic power, the upper side is the front side, the lower side is the back side, and the depth direction is from top to bottom. The photoelectric conversion semiconductor device 160 has a configuration in which photoelectric conversion units 161, 162, and 163 having the same configuration as the photoelectric conversion semiconductor device 130 of FIG. 9 are integrally provided in the left-right direction. The structure and function of each photoelectric conversion unit 161, 162, 163 are the same as those of the photoelectric conversion semiconductor device 130 of FIG.

光電変換部161の外面電極147、148はグランドと接続されており、外面電極149は電荷蓄積用の第1の外部容量331の+極331aと接続されている。光電変換部162の外面電極147、148は外部容量331の+極331aと接続されており、外面電極149は電荷蓄積用の第2の外部容量332の+極332aと接続されている。光電変換部163の外面電極147、148は外部容量332の+極332aと接続されており、外面電極149は電荷蓄積用の第3の外部容量333の+極332aと接続されている。第3の外部容量333にはスイッチ31を介して外部負荷32が接続されている。 The outer surface electrodes 147 and 148 of the photoelectric conversion unit 161 are connected to the ground, and the outer surface electrode 149 is connected to the + pole 331a of the first external capacitance 331 for charge storage. The outer surface electrodes 147 and 148 of the photoelectric conversion unit 162 are connected to the + pole 331a of the external capacitance 331, and the outer surface electrode 149 is connected to the + pole 332a of the second external capacitance 332 for charge storage. The outer surface electrodes 147 and 148 of the photoelectric conversion unit 163 are connected to the + pole 332a of the external capacitance 332, and the outer surface electrode 149 is connected to the + pole 332a of the third external capacitance 333 for charge storage. An external load 32 is connected to the third external capacity 333 via a switch 31.

図10の如く構成された光電変換半導体装置160によれば、光電変換部161、162、163の一つ当たりの光起電圧の3倍の電圧を外部負荷32に印加することが可能となる。 According to the photoelectric conversion semiconductor device 160 configured as shown in FIG. 10, it is possible to apply a voltage three times the photovoltaic voltage per photoelectric conversion unit 161, 162, 163 to the external load 32.

本発明は、太陽光を入射して電気エネルギーに変換する太陽電池用の光電変換半導体装置に適用可能である。 The present invention is applicable to a photoelectric conversion semiconductor device for a solar cell that incidents sunlight and converts it into electrical energy.

1 光電変換半導体装置
2 表側のP+領域
3 表側のP領域
4 N領域
5 裏側のP領域
6 裏側のP+領域
9、10、12 外面電極
11 N+領域
30 外部容量
1 Photoelectric conversion semiconductor device 2 Front side P + region 3 Front side P region 4 N region 5 Back side P region 6 Back side P + region 9, 10, 12 External electrode 11 N + region 30 External capacitance

変換効率の改善策の一つとして従来、例えば特開平07-297444号公報に示す如く、光電変換半導体装置の表面と平行なPN接合面を深さ方向(上下方向)に複数個形成する手法が提案されていた。
けれども、上記した特開平07-297444号公報の光電変換半導体装置では、光電子はN領域のエネルギー準位の低い場所に移動して滞留するが、その滞留した光電子の量に応じてN領域の電位は固定されずに変動し、滞留した光電子がN領域の空乏層を狭めて光電子・空孔の再結合を促進したり、光電変換半導体装置の表面近くで再結合が起き易く、変換効率の向上に限界があった。
Conventionally, as one of the measures for improving the conversion efficiency, as shown in JP-A-07-297444, for example , a method of forming a plurality of PN junction surfaces parallel to the surface of a photoelectric conversion semiconductor device in the depth direction (vertical direction). Was proposed.
However, in the photoelectric conversion semiconductor device of JP-A No. 07-297444 described above, photoelectrons move to a place having a low energy level in the N region and stay there, but in the N region depending on the amount of the staying photoelectrons. The potential fluctuates without being fixed, and the stagnant photoelectrons narrow the depletion layer in the N region to promote the recoupling of photoelectrons and vacancies, and recoupling is likely to occur near the surface of the photoelectric conversion semiconductor device, resulting in conversion efficiency. There was a limit to the improvement.

請求項1記載の発明では、
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に、表側から裏側に向かう深さ方向にN領域の表裏両側を表側のP領域及び裏側のP領域で挟み、更に当該表側のP領域の表側と裏側のP領域の裏側を、
P+Pの濃度勾配により生じる濃度勾配型バリア電界生成用の表側のP+領域と裏側のP+領域とで挟んだP+PNPP+接合部を設け、
前記表側のP+領域の表側に、受光窓領域及び当該表側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記裏側のP+領域の裏側に、該裏側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の深さ方向の中央部に、該N領域と接触するようにして光電子吸出し用のN+領域を設け、
前記N+領域の外側に、該N+領域と導通した第2の極性の外面電極を設け、
前記各第1の極性の外面電極をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴としている。
請求項2記載の発明では、
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内にN領域を設け、
該N領域の裏側左右端部近くの一部を除く表側、裏側、側面側を囲むようにしてP領域を設け、
該P領域の表側に、該P領域の表面に接触するようにして表側のP+領域を設け、
前記P領域の裏側に、該P領域の表面に接触するようにして裏側のP+領域を設け、
前記表側のP+領域の表側に、受光窓領域及び当該表側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記裏側のP+領域の裏側に、該裏側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の裏側の左右端部近くに、当該N領域と接触するようにして光電子吸出し用のN+領域を設け、
N+領域の裏側に、当該N+領域と導通した第2の極性の外面電極を設け、
前記各第1の極性の外面電極をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴としている。
請求項3記載の発明では、
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に設けたN領域の裏側中央部を除く表側、裏側、側面側を囲むようにしてP領域を設け、
該P領域の表側に、該P領域の表面に接触するようにして表側のP+領域を設け、
前記P領域の裏側に、該P領域の表面に接触するようにして裏側のP+領域を設け、
前記表側のP+領域の表側に、受光窓領域及び当該表側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記裏側のP+領域の裏側に、当該裏側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の裏側の中央部に、当該N領域に接触するようにして光電子吸出し用のN+領域を設け、
N+領域の裏側に、当該N+領域と導通した第2の極性の外面電極を設け、
前記各第1の極性の外面電極をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴としている。
請求項4記載の発明では、
面側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に設けた断面がくし形のN領域の裏側を除く表側と側面側を囲むようにしてP領域を設け、
該P領域の表側に、該P領域の表面に接触するようにしてP+領域を設け、
該P+領域の表側に、受光窓領域及び当該P+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の裏側に、該N領域と接触するようにして光電子吸出し用のN+領域を設け、
N+領域の裏側に、当該N+領域と導通した第2の極性の外面電極を設け、
第1の極性の外面電極をグランドに接続し、第2の極性の外面電極とグランドの間に、
光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴としている。
請求項5記載の発明では、
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に設けた断面がくし形のN領域の裏側中央部を除く表側、裏側、側面側を囲むようにしてP領域を設け、
該P領域の表側に、該P領域の表面に接触するようにして表側のP+領域を設け、
前記P領域の裏側に、該P領域の表面に接触するようにして裏側のP+領域を設け、
前記表側のP+領域の表側に、受光窓領域及び当該表側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記裏側のP+領域の裏側に、当該裏側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の裏側の中央部に、該N領域と接触するようにして光電子吸出し用のN+領域を設け、
N+領域の裏側に、該N+領域と導通した第2の極性の外面電極を設け、
前記各第1の極性の外面電極をグランドに接続し、前記第2の極性の外面電極とグラン
ドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴としている。
請求項6記載の発明では、
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に光電変換層を設け、
この光電変換層は、
光電変換半導体装置内に設けたN領域と、
該N領域の表側中央部を除く表側に、当該N領域の表面に接触するようにして設けた表側のP領域と、
前記N領域の裏側に、当該N領域の表面に接触するようにして設けた裏側のP領域と、
前記表側のP領域の表側の全部または一部と側面側、前記N領域の側面側、前記裏側のP領域の裏側と側面側を囲むようにして設けたP+領域と、
前記N領域の表側の中央部に、当該N領域と接触するようにして設けた表側のN+領域と、
を含み、
前記光電変換の表側に、受光窓領域と、前記P+領域の表面と導通した第1の極性の外面電極と、前記N+領域と導通した第2の極性の外面電極を設け、
前記P+領域の裏側に、第2のN領域と第2のN+領域の内、少なくとも一方を介して金属製反射領域を設け、
前記第1の極性の外面電極と金属製反射領域をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴としている。
各請求項において、N+領域をN領域に埋め込むように設けても良い。
In the invention according to claim 1,
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
Inside the photoelectric conversion semiconductor device, both the front and back sides of the N region are sandwiched between the front side P region and the back side P region in the depth direction from the front side to the back side, and the front side and the back side of the back side P region of the front side P region are further sandwiched. ,
A P + PNPP + junction sandwiched between the P + region on the front side and the P + region on the back side for generating a concentration gradient type barrier electric field generated by the concentration gradient of P + P is provided.
On the front side of the P + region on the front side, an outer surface electrode having a first polarity conducting with the surface of the light receiving window region and the P + region on the front side is provided.
On the back side of the P + region on the back side, an outer surface electrode having a first polarity conducting with the surface of the P + region on the back side is provided.
An N + region for sucking photoelectrons is provided at the center of the N region in the depth direction so as to be in contact with the N region.
An outer surface electrode having a second polarity conducting with the N + region is provided outside the N + region.
The outer electrode of each first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
It is characterized by.
In the invention according to claim 2,
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
An N region is provided in the photoelectric conversion semiconductor device, and
A P region is provided so as to surround the front side, the back side, and the side surface side except for a part near the left and right ends on the back side of the N region.
On the front side of the P region, a P + region on the front side is provided so as to be in contact with the surface of the P region.
On the back side of the P region, a P + region on the back side is provided so as to be in contact with the surface of the P region.
On the front side of the P + region on the front side, an outer surface electrode having a first polarity conducting with the surface of the light receiving window region and the P + region on the front side is provided.
On the back side of the P + region on the back side, an outer surface electrode having a first polarity conducting with the surface of the P + region on the back side is provided.
An N + region for sucking photoelectrons is provided near the left and right ends on the back side of the N region so as to be in contact with the N region.
An outer surface electrode having a second polarity conducting with the N + region is provided on the back side of the N + region.
The outer electrode of each first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
It is characterized by.
In the invention according to claim 3,
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
A P region is provided so as to surround the front side, the back side, and the side surface side excluding the back side central portion of the N region provided in the photoelectric conversion semiconductor device.
On the front side of the P region, a P + region on the front side is provided so as to be in contact with the surface of the P region.
On the back side of the P region, a P + region on the back side is provided so as to be in contact with the surface of the P region.
On the front side of the P + region on the front side, an outer surface electrode having a first polarity conducting with the surface of the light receiving window region and the P + region on the front side is provided.
On the back side of the P + region on the back side, an outer surface electrode having a first polarity conducting with the surface of the P + region on the back side is provided.
An N + region for sucking photoelectrons is provided in the central portion on the back side of the N region so as to be in contact with the N region.
An outer surface electrode having a second polarity conducting with the N + region is provided on the back side of the N + region.
The outer electrode of each first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
It is characterized by.
In the invention according to claim 4,
It is a photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the surface side.
A P region is provided so as to surround the front side and the side surface side excluding the back side of the N region having a comb-shaped cross section provided in the photoelectric conversion semiconductor device.
A P + region is provided on the front side of the P region so as to be in contact with the surface of the P region.
On the front side of the P + region, an outer surface electrode having a first polarity conducting with the light receiving window region and the surface of the P + region is provided.
An N + region for sucking photoelectrons is provided on the back side of the N region so as to be in contact with the N region.
An outer surface electrode having a second polarity conducting with the N + region is provided on the back side of the N + region.
Connect the outer electrode of the first polarity to the ground, and between the outer electrode of the second polarity and the ground,
Connecting the charge storage capacity provided inside or outside the photoelectric conversion semiconductor device,
It is characterized by.
In the invention according to claim 5,
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
A P region is provided so as to surround the front side, the back side, and the side surface side excluding the back side central portion of the N region having a comb-shaped cross section provided in the photoelectric conversion semiconductor device.
On the front side of the P region, a P + region on the front side is provided so as to be in contact with the surface of the P region.
On the back side of the P region, a P + region on the back side is provided so as to be in contact with the surface of the P region.
On the front side of the P + region on the front side, an outer surface electrode having a first polarity conducting with the surface of the light receiving window region and the P + region on the front side is provided.
On the back side of the P + region on the back side, an outer surface electrode having a first polarity conducting with the surface of the P + region on the back side is provided.
An N + region for sucking photoelectrons is provided in the central portion on the back side of the N region so as to be in contact with the N region.
On the back side of the N + region, an outer surface electrode having a second polarity conducting with the N + region is provided.
The outer electrode of each first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
It is characterized by.
In the invention according to claim 6,
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
A photoelectric conversion layer is provided in the photoelectric conversion semiconductor device, and the photoelectric conversion layer is provided.
This photoelectric conversion layer is
The N region provided in the photoelectric conversion semiconductor device and
On the front side excluding the central part of the front side of the N region, a P region on the front side provided in contact with the surface of the N region and a P region on the front side.
A P region on the back side provided on the back side of the N region so as to be in contact with the surface of the N region, and a P region on the back side.
All or part of the front side of the P region on the front side and the side surface side, the side surface side of the N region, and the P + region provided so as to surround the back side and the side surface side of the P region on the back side.
An N + region on the front side provided in contact with the N region at the center of the front side of the N region,
Including
On the front side of the photoelectric conversion layer , a light receiving window region, an outer surface electrode having a first polarity conducting with the surface of the P + region, and an outer surface electrode having a second polarity conducting with the N + region are provided.
A metal reflection region is provided on the back side of the P + region via at least one of the second N region and the second N + region.
The outer electrode of the first polarity and the metal reflection region are connected to the ground, and a charge storage capacity provided inside or outside the photoelectric conversion semiconductor device is provided between the outer electrode of the second polarity and the ground. Having connected,
It is characterized by.
In each claim, the N + region may be provided so as to be embedded in the N region.

Claims (6)

表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に、表側から裏側に向かう深さ方向にN領域の表裏両側を表側のP領域及び裏側のP領域で挟み、更に当該表側のP領域の表側と裏側のP領域の裏側を、P+Pの濃度勾配により生じる濃度勾配型バリア電界生成用の表側のP+領域と裏側のP+領域とで挟んだP+PNPP+接合部を設け、
前記表側のP+領域の表側に、受光窓領域及び当該表側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記裏側のP+領域の裏側に、該裏側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の深さ方向の中央部に、該N領域と接触するようにして光電子吸出し用のN+領域を設け、
前記N+領域の外側に、該N+領域と導通した第2の極性の外面電極を設け、
前記各第1の極性の外面電極をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴とする光電変換半導体装置。
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
Inside the photoelectric conversion semiconductor device, both the front and back sides of the N region are sandwiched between the front side P region and the back side P region in the depth direction from the front side to the back side, and the front side and the back side of the back side P region of the front side P region are further sandwiched. , A P + PNPP + junction sandwiched between the P + region on the front side and the P + region on the back side for generating a concentration gradient type barrier electric field generated by the concentration gradient of P + P is provided.
On the front side of the P + region on the front side, an outer surface electrode having a first polarity conducting with the surface of the light receiving window region and the P + region on the front side is provided.
On the back side of the P + region on the back side, an outer surface electrode having a first polarity conducting with the surface of the P + region on the back side is provided.
An N + region for sucking photoelectrons is provided at the center of the N region in the depth direction so as to be in contact with the N region.
An outer surface electrode having a second polarity conducting with the N + region is provided outside the N + region.
The outer electrode of each first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
A photoelectric conversion semiconductor device characterized by.
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内にN領域を設け、
該N領域の裏側左右端部近くの一部を除く表側、裏側、側面側を囲むようにしてP領域を設け、
該P領域の表側に、該P領域の表面に接触するようにして表側のP+領域を設け、
前記P領域の裏側に、該P領域の表面に接触するようにして裏側のP+領域を設け、
前記表側のP+領域の表側に、受光窓領域及び当該表側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記裏側のP+領域の裏側に、該裏側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の裏側の左右端部近くに、当該N領域と接触するようにして光電子吸出し用のN+領域を設け、
N+領域の裏側に、当該N+領域と導通した第2の極性の外面電極を設け、
前記各第1の極性の外面電極をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴とする光電変換半導体装置。
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
An N region is provided in the photoelectric conversion semiconductor device, and
A P region is provided so as to surround the front side, the back side, and the side surface side except for a part near the left and right ends on the back side of the N region.
On the front side of the P region, a P + region on the front side is provided so as to be in contact with the surface of the P region.
On the back side of the P region, a P + region on the back side is provided so as to be in contact with the surface of the P region.
On the front side of the P + region on the front side, an outer surface electrode having a first polarity conducting with the surface of the light receiving window region and the P + region on the front side is provided.
On the back side of the P + region on the back side, an outer surface electrode having a first polarity conducting with the surface of the P + region on the back side is provided.
An N + region for sucking photoelectrons is provided near the left and right ends on the back side of the N region so as to be in contact with the N region.
An outer surface electrode having a second polarity conducting with the N + region is provided on the back side of the N + region.
The outer electrode of each first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
A photoelectric conversion semiconductor device characterized by.
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に設けたN領域の裏側中央部を除く表側、裏側、側面側を囲むようにしてP領域を設け、
該P領域の表側に、該P領域の表面に接触するようにして表側のP+領域を設け、
前記P領域の裏側に、該P領域の表面に接触するようにして裏側のP+領域を設け、
前記表側のP+領域の表側に、受光窓領域及び当該表側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記裏側のP+領域の裏側に、当該裏側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の裏側の中央部に、当該N領域に接触するようにして光電子吸出し用のN+領域を設け、
N+領域の裏側に、当該N+領域と導通した第2の極性の外面電極を設け、
前記各第1の極性の外面電極をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴とする光電変換半導体装置。
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
A P region is provided so as to surround the front side, the back side, and the side surface side excluding the back side central portion of the N region provided in the photoelectric conversion semiconductor device.
On the front side of the P region, a P + region on the front side is provided so as to be in contact with the surface of the P region.
On the back side of the P region, a P + region on the back side is provided so as to be in contact with the surface of the P region.
On the front side of the P + region on the front side, an outer surface electrode having a first polarity conducting with the surface of the light receiving window region and the P + region on the front side is provided.
On the back side of the P + region on the back side, an outer surface electrode having a first polarity conducting with the surface of the P + region on the back side is provided.
An N + region for sucking photoelectrons is provided in the central portion on the back side of the N region so as to be in contact with the N region.
An outer surface electrode having a second polarity conducting with the N + region is provided on the back side of the N + region.
The outer electrode of each first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
A photoelectric conversion semiconductor device characterized by.
面側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に設けた断面がくし形のN領域の裏側を除く表側と側面側を囲むようにしてP領域を設け、
該P領域の表側に、該P領域の表面に接触するようにしてP+領域を設け、
該P+領域の表側に、受光窓領域及び当該P+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の裏側に、該N領域と接触するようにして光電子吸出し用のN+領域を設け、
N+領域の裏側に、当該N+領域と導通した第2の極性の外面電極を設け、
第1の極性の外面電極をグランドに接続し、第2の極性の外面電極とグランドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴とする光電変換半導体装置。
It is a photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the surface side.
A P region is provided so as to surround the front side and the side surface side excluding the back side of the N region having a comb-shaped cross section provided in the photoelectric conversion semiconductor device.
A P + region is provided on the front side of the P region so as to be in contact with the surface of the P region.
On the front side of the P + region, an outer surface electrode having a first polarity conducting with the light receiving window region and the surface of the P + region is provided.
An N + region for sucking photoelectrons is provided on the back side of the N region so as to be in contact with the N region.
An outer surface electrode having a second polarity conducting with the N + region is provided on the back side of the N + region.
The outer electrode of the first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
A photoelectric conversion semiconductor device characterized by.
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に設けた断面がくし形のN領域の裏側中央部を除く表側、裏側、側面側を囲むようにしてP領域を設け、
該P領域の表側に、該P領域の表面に接触するようにして表側のP+領域を設け、
前記P領域の裏側に、該P領域の表面に接触するようにして裏側のP+領域を設け、
前記表側のP+領域の表側に、受光窓領域及び当該表側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記裏側のP+領域の裏側に、当該裏側のP+領域の表面と導通した第1の極性の外面電極を設け、
前記N領域の裏側の中央部に、該N領域と接触するようにして光電子吸出し用のN+領域を設け、
N+領域の裏側に、該N+領域と導通した第2の極性の外面電極を設け、
前記各第1の極性の外面電極をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴とする光電変換半導体装置。
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
A P region is provided so as to surround the front side, the back side, and the side surface side excluding the back side central portion of the N region having a comb-shaped cross section provided in the photoelectric conversion semiconductor device.
On the front side of the P region, a P + region on the front side is provided so as to be in contact with the surface of the P region.
On the back side of the P region, a P + region on the back side is provided so as to be in contact with the surface of the P region.
On the front side of the P + region on the front side, an outer surface electrode having a first polarity conducting with the surface of the light receiving window region and the P + region on the front side is provided.
On the back side of the P + region on the back side, an outer surface electrode having a first polarity conducting with the surface of the P + region on the back side is provided.
An N + region for sucking photoelectrons is provided in the central portion on the back side of the N region so as to be in contact with the N region.
On the back side of the N + region, an outer surface electrode having a second polarity conducting with the N + region is provided.
The outer electrode of each first polarity was connected to the ground, and the charge storage capacitance provided inside or outside the photoelectric conversion semiconductor device was connected between the outer electrode of the second polarity and the ground.
A photoelectric conversion semiconductor device characterized by.
表側から入射した太陽光を光電変換する光電変換半導体装置であって、
光電変換半導体装置内に光電変換層を設け、
この光電変換層は、
光電変換半導体装置内に設けたN領域と、
該N領域の表側中央部を除く表側に、当該N領域の表面に接触するようにして設けた表側のP領域と、
前記N領域の裏側に、当該N領域の表面に接触するようにして設けた裏側のP領域と、
前記表側のP領域の表側の全部または一部と側面側、前記N領域の側面側、前記裏側のP領域の裏側と側面側を囲むようにして設けたP+領域と、
前記N領域の表側の中央部に、当該N領域と接触するようにして設けた表側のN+領域と、
を含み、
前記光電変換部の表側に、受光窓領域と、前記P+領域の表面と導通した第1の極性の外面電極と、前記N+領域と導通した第2の極性の外面電極を設け、
前記P+領域の裏側に、第2のN領域と第2のN+領域の内、少なくとも一方を介して金属製反射領域を設け、
前記第1の極性の外面電極と金属製反射領域をグランドに接続し、前記第2の極性の外面電極とグランドの間に、光電変換半導体装置の内部または外部に設けた電荷蓄積用の容量を接続したこと、
を特徴とする光電変換半導体装置。
A photoelectric conversion semiconductor device that photoelectrically converts sunlight incident from the front side.
A photoelectric conversion layer is provided in the photoelectric conversion semiconductor device, and the photoelectric conversion layer is provided.
This photoelectric conversion layer is
The N region provided in the photoelectric conversion semiconductor device and
On the front side excluding the central part of the front side of the N region, a P region on the front side provided in contact with the surface of the N region and a P region on the front side.
A P region on the back side provided on the back side of the N region so as to be in contact with the surface of the N region, and a P region on the back side.
All or part of the front side of the P region on the front side and the side surface side, the side surface side of the N region, and the P + region provided so as to surround the back side and the side surface side of the P region on the back side.
An N + region on the front side provided in contact with the N region at the center of the front side of the N region,
Including
On the front side of the photoelectric conversion unit, a light receiving window region, an outer surface electrode having a first polarity conducting with the surface of the P + region, and an outer surface electrode having a second polarity conducting with the N + region are provided.
A metal reflection region is provided on the back side of the P + region via at least one of the second N region and the second N + region.
The outer electrode of the first polarity and the metal reflection region are connected to the ground, and a charge storage capacity provided inside or outside the photoelectric conversion semiconductor device is provided between the outer electrode of the second polarity and the ground. Having connected,
A photoelectric conversion semiconductor device characterized by.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001177120A (en) * 1999-12-16 2001-06-29 Toyota Motor Corp Solar cell
JP2002368238A (en) * 2001-06-07 2002-12-20 Toyota Motor Corp Tandem solar cell and manufacturing method therefor
JP2011233725A (en) * 2010-04-28 2011-11-17 Toyo Univ Solar cell device
JP2012023351A (en) * 2010-06-18 2012-02-02 Semiconductor Energy Lab Co Ltd Photoelectric conversion device
US20160149068A1 (en) * 2013-06-18 2016-05-26 Commissariat A I'energie Atomique Et Aux Energies Alternatives Multi-junction solar cell

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001177120A (en) * 1999-12-16 2001-06-29 Toyota Motor Corp Solar cell
JP2002368238A (en) * 2001-06-07 2002-12-20 Toyota Motor Corp Tandem solar cell and manufacturing method therefor
JP2011233725A (en) * 2010-04-28 2011-11-17 Toyo Univ Solar cell device
JP2012023351A (en) * 2010-06-18 2012-02-02 Semiconductor Energy Lab Co Ltd Photoelectric conversion device
US20160149068A1 (en) * 2013-06-18 2016-05-26 Commissariat A I'energie Atomique Et Aux Energies Alternatives Multi-junction solar cell

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