JP2022017129A - Semiconductor device - Google Patents

Abstract

To provide a semiconductor device capable of improving accuracy in deterioration determination and preventing dispersal of components.SOLUTION: In a semiconductor device 1, a resistor 3 is connected in series to a semiconductor element 2. The resistor 3 is an element having a resistance value equivalent to an on-resistance of the semiconductor element 2. A detection result accumulation unit 4 and a determination unit 5 are connected to the resistor 3. The detection result accumulation unit 4 accumulates past detection results detected by the resistor 3, and outputs the accumulated past detection results to the determination unit 5. The determination unit 5 determines whether the semiconductor element 2 to which the resistor 3 is connected is defective by comparing the current detection results with the past detection results. The determination unit 5 is connected with a gate block unit 6. The gate block unit 6 outputs a gate signal to the semiconductor element on the basis of the determination results of the determination unit 5, and gate-blocks the semiconductor element 2.SELECTED DRAWING: Figure 1

Description

The present embodiment relates to a semiconductor device for power control.

A power converter for high power is used for the power transmission system in the power system. These power converters convert a voltage that converts alternating current to direct current and direct current to alternating current. Alternatively, these power converters perform conversions that increase or decrease the DC voltage. The conversion of these voltages is performed by switching the supplied electric power by the semiconductor device provided in the power converter.

The semiconductor device used for power conversion opens and closes a high voltage exceeding 1000 V by switching. Further, the semiconductor device opens and closes a large current exceeding 1000 A by switching. In order to open and close a large current, a semiconductor device for switching, which is a so-called power element such as a plurality of electrically connected IGBTs, is arranged on the circuit board of the semiconductor device.

A plurality of semiconductor elements are mounted on one semiconductor device. When some of the semiconductor elements constituting the semiconductor device are short-circuited, the short-circuited semiconductor element bears an excessive short-circuit current and becomes high temperature and is destroyed. However, even when the semiconductor element is destroyed, as long as the failed semiconductor element maintains the short-circuit state, the semiconductor device can continue to supply power by the non-failed semiconductor element.

Therefore, it is important to maintain the short-circuited state of the failed semiconductor element, that is, to guarantee the short-circuited failure of the semiconductor element. In the conventional semiconductor device, for example, a short-circuit failure is guaranteed by applying a pressure welding structure to the semiconductor element.

Japanese Unexamined Patent Publication No. 08-330338 Japanese Unexamined Patent Publication No. 2006-013080

In general, it is difficult to guarantee a short-circuit failure in a semiconductor element other than a pressure-welded structure. For this reason, conventionally, a method of determining deterioration of a semiconductor element and short-circuiting it by itself is known. However, the characteristics of semiconductor devices vary widely, and the progress of deterioration differs from device to device. Therefore, regarding the deterioration determination of the semiconductor element, it is difficult to secure the determination accuracy, and a good product may be treated as a defective product. Therefore, it is desired to improve the deterioration determination accuracy of the semiconductor element.

Further, if the components of the semiconductor element caused by the destruction due to the short-circuit failure are scattered, there is a possibility that the non-failed semiconductor device and the peripheral circuit arranged in the periphery are destroyed. It is not desirable that the semiconductor element that has not failed is destroyed by the scattering of the parts, because the stable power supply is hindered.

An object of the present embodiment is to provide a semiconductor device capable of improving the accuracy of deterioration determination and preventing scattering of parts.

In the semiconductor device according to the present embodiment, any one of a plurality of semiconductor elements connected in parallel or each semiconductor element is connected in series with a resistance having a resistance value equivalent to an on-resistance which is a resistance value when operating the semiconductor element. Connecting.

The figure which shows the circuit and the structure of 1st Embodiment The figure which shows the flow of 1st Embodiment The figure which shows the flow of 1st Embodiment Front sectional view of another embodiment Top view of the main part of another embodiment

[First Embodiment]
[Constitution]
Hereinafter, the configuration of the semiconductor device 1 of the present embodiment will be described with reference to FIG. As shown in FIG. 1, a plurality of semiconductor elements 2 are connected in parallel to the semiconductor device 1. The semiconductor element 2 is a so-called power element, which is a semiconductor element for switching. For example, the semiconductor element 2 is composed of an IGBT (Insulated Gate Bipolar Transistor), and a positive electrode, a negative electrode, and a control electrode are arranged on a semiconductor layer formed of silicon or the like. The positive electrode is the collector of the IGBT, the negative electrode is the emitter of the IGBT, and the control electrode is the gate of the IGBT. All of these electrodes are made of a conductor metal such as copper or aluminum.

The semiconductor element 2 is sealed and packaged with a thermosetting resin such as an epoxy resin (in FIG. 1, the semiconductor element 2 is surrounded by a square). The packaged semiconductor element 2 is covered with a protective wall portion. The protective wall portion is made of, for example, a metal material such as aluminum or copper or a non-metal material such as carbon or ceramic. The inside of the protective wall is filled with an internal resin made of a thermosetting resin.

As shown in FIG. 1, a resistor 3 is connected in series to each semiconductor element 2. The resistance 3 is an element having a resistance value equivalent to that of the on-resistance of the semiconductor element 2. The resistance value equivalent to the on-resistance of the semiconductor element 2 is the resistance value when the semiconductor element 2 is operated. Since the IGBT is used as the semiconductor element in this embodiment, the resistance value equivalent to the on-resistance is the resistance value between the collector and the emitter. When a SiC- MOSFET is used as the semiconductor element, the resistance value equivalent to the on-resistance is the resistance value between the drain and the source.

The resistance 3 is a detection resistor that detects the voltage of the semiconductor element 2. When a detection resistor is used, it is common to connect a resistor as large as possible to the semiconductor device 2 in parallel so that the main current of the semiconductor device 2 does not flow through the detection resistor. However, in the present embodiment, the resistance 3 is connected in series to the semiconductor element 2 so that the resistance 3 is incorporated in the path through which the main current of the semiconductor element 2 flows.

Moreover, instead of using a resistor having a small resistance value, a resistor 3 equivalent to the on-resistance of the semiconductor element 2, for example, a resistor 3 of several mΩ class is adopted. Therefore, the increase in loss is unavoidable in the semiconductor device 1, but in the present embodiment, the increase in loss is compensated for in the entire semiconductor device 1 by connecting a large number of semiconductor elements 2 in parallel.

The detection result accumulating unit 4 and the determination unit 5 are connected to the resistance 3. The detection result accumulating unit 4 accumulates the past detection results detected by the resistance 3, and outputs the accumulated past detection results to the determination unit 5. The determination unit 5 captures the current detection result currently detected by the resistance 3 from the resistance 3, and also captures the past detection results from the detection result storage unit 4. Then, the determination unit 5 compares the current detection result with the past detection result, and determines the defect of the semiconductor element 2 to which the resistor 3 is connected. The value of the past detection result to be compared with the current detection result is, for example, an average of the voltage detection results.

A gate block unit 6 is connected to the determination unit 5. The gate block unit 6 outputs a gate signal to the semiconductor element based on the determination result of the determination unit 5 to gate block the semiconductor element 2.

A count unit 7 is connected to the gate block unit 6, and a short circuit guarantee unit 8 is connected to the count unit 7. The counting unit 7 counts the number of gate-blocked semiconductor elements 2. When the count number of the count unit 7 exceeds a preset number, the short-circuit guarantee unit 8 outputs a limit signal to turn on all the semiconductor elements 2 that are not gate-blocked. When all the semiconductor elements 2 are turned on, for example, the upper and lower arms of the MMC (Modular Multilevel Converter) are all turned on, and in this case, the entire semiconductor device 1 is short-circuited and fails. In the example shown in FIG. 1, a method is adopted in which the semiconductor element 2 of the lower arm is used as a detection target and the detection result is fed back to the semiconductor element 2 of the upper arm, but the detection result is fed back to the own arm side as the detection target. A method may be adopted. For example, the semiconductor element 2 of the lower arm may be the detection target, and the detection result may be fed back to the semiconductor element 2 of the lower arm.

[Component scattering process]
Before explaining the operation of the present embodiment, the process until the components of the semiconductor device 1 are scattered will be described. In the semiconductor element 2, a current is input from an external device whose positive electrode is a power supply source, and a current is output to an external device whose negative electrode is a load. The control electrode of the semiconductor element 2 inputs a control signal from an external control device, and converts the current between the positive electrode and the negative electrode into a desired voltage by the control signal.

The semiconductor element 2 may be destroyed when an overcurrent is input to the positive electrode or when a surge voltage is input. The semiconductor element 2 causes a short-circuit failure in which the positive electrode and the negative electrode conduct with each other due to destruction. In the semiconductor device 1, when the semiconductor element 2 in which the short circuit failure has occurred and the semiconductor element 2 in which the short circuit failure has not occurred coexist, when the semiconductor element 2 not causing the short circuit failure is in the cutoff state, the current flowing through the semiconductor device 1 Concentrates on the semiconductor element 2 where the short circuit failure has occurred.

As a result, an overcurrent flows through the semiconductor element 2, and a part of the semiconductor element 2 is melted and vaporized by Joule heat. As a result, the internal pressure of the internal resin that seals the semiconductor element 2 rises and breaks. When the crack generated by the break reaches the end of the internal resin, the semiconductor device 1 is explosively damaged, and the explosively damaged components are scattered. As a result, the non-failing semiconductor device 1 or the peripheral circuit arranged in the periphery is destroyed.

The semiconductor device 1 according to the present embodiment is designed to prevent scattering of components caused as described above. By preventing the scattering of the components, in the present embodiment, even if the semiconductor element 2 is destroyed, the failed semiconductor element 2 can maintain the short-circuited state, and the power supply can be continued by the non-failed semiconductor element 2. It is possible.

In the semiconductor device 1, a resistor 3 equivalent to the on-resistance of the semiconductor element 2 is connected in series to each semiconductor element 2. That is, a resistor 3 having a sufficiently high resistance value is incorporated in the path through which the main current of the semiconductor element 2 flows. Therefore, in the present embodiment, energy at the time of a short circuit failure can be passed through the resistance 3. Further, the semiconductor element 2 is sealed with a thermosetting resin or the like and packaged, and measures are taken to prevent the components of the semiconductor element 2 from being scattered when the semiconductor element 2 is damaged.

Further, in the present embodiment, the detection result accumulating unit 4 and the determination unit 5 are connected to the resistance 3. Therefore, as shown in FIG. 2, the detection result storage unit 4 stores the past detection results detected by the resistance 3, and the determination unit 5 determines the defect of the semiconductor element 2. The deterioration state of the semiconductor element 2 varies, and it is impossible to set a reference value for determining the deterioration state for each of the semiconductor elements 2. Therefore, in the present embodiment, the determination unit 5 determines whether or not the semiconductor element 2 is defective after comparing the past detection results accumulated in the detection result storage unit 4 with the current detection results. The past detection result is a value obtained by averaging the past voltage detection results. The determination unit 5 determines that the semiconductor element 2 is defective if the current detection result deviates from a predetermined threshold value as compared with the past voltage detection result, and if it does not deviate from the threshold value, the semiconductor element 2 Is determined to be a good product.

Further, in the present embodiment, the gate block unit 6 is connected to the determination unit 5. Therefore, as shown in FIG. 2, if the determination result of the determination unit 5 indicates that the semiconductor element 2 is defective, the gate block unit 6 outputs a gate signal to the semiconductor element 2 to block the semiconductor element 2. do. By gate-blocking the semiconductor element 2 determined to be defective, it is possible to avoid an accident in advance.

If the number of gate-blocked semiconductor elements 2 increases and, conversely, the number of non-defective semiconductor elements 2 in parallel decreases, it becomes difficult to avoid an accident simply by gate-blocking the semiconductor elements 2. This is because the magnitude of the current flowing through the semiconductor element 2 is not related to the number of the semiconductor elements 2. Therefore, when the number of parallel semiconductor elements 2 decreases, the current rating limit is exceeded at the moment of normal operation, and an unexpected impact occurs. This is because the semiconductor element 2 is destroyed (short-circuited).

Therefore, in the present embodiment, the count unit 7 and the short-circuit guarantee unit 8 are connected to the gate block unit 6 to determine the number of elements that cause the semiconductor element 2 to be short-circuited and broken. As shown in FIG. 3, the count unit 7 counts up the number of semiconductor elements 2 gate-blocked, and when the count-up number reaches a preset threshold value, the short-circuit guarantee unit 8 outputs a limit signal to block the gate. It is output to the ON signal to all the semiconductor elements 2 that are not. As a result, the short-circuit guarantee unit 8 can turn on all the semiconductor elements 2 that are not gate-blocked and cause a short-circuit failure by itself.

[effect]
In this embodiment, the semiconductor element 2 is packaged, and then a resistor 3 having a resistance value equivalent to the on-resistance of the semiconductor element 2 is connected in series to each of the semiconductor elements 2 connected in parallel. Therefore, in the present embodiment, the energy at the time of a short circuit failure can be shared by both the packaged semiconductor element 2 and the resistor 3. Therefore, according to the present embodiment, it is possible to avoid explosive damage to the semiconductor device 1, and it is possible to reliably suppress the scattering of component parts.

Further, in the present embodiment, the determination unit 5 determines whether or not the semiconductor element 2 is defective by comparing the past detection result, which is a value obtained by averaging the past voltage detection results, with the current detection result. I'm going at. Therefore, the average value of the past detection results can be set as a substantial reference value to determine the current detection result, and in the present embodiment, the deterioration determination accuracy of the semiconductor element 2 can be improved. Therefore, even if the characteristics of the semiconductor element 2 vary widely, excellent determination accuracy can be ensured, and there is no concern that a non-defective product is treated as a defective product.

Further, in the present embodiment, when the count-up number counted up by the count unit 7 reaches a preset threshold value, the short-circuit guarantee unit 8 outputs a limit signal and turns on signals to all semiconductor elements 2 that are not gate-blocked. Output to. In such an embodiment, it is possible to determine the number of gate-blocked semiconductor elements 2 and calculate the current flowing through the non-gate-blocked semiconductor elements 2.

Therefore, all the semiconductor elements 2 that are not gate-blocked can be short-circuited before the calculation result exceeds a predetermined current. As a result, the semiconductor element 2 can be spontaneously destroyed (short-circuited) with an expected force. As a result, the package of the semiconductor element 2 can be miniaturized, which can contribute to the miniaturization of the resistance 3.

In this embodiment, since the resistor 3 equivalent to the on-resistance of the semiconductor element 2 is adopted, the increase in loss is unavoidable in the semiconductor device 1, but by connecting a large number of semiconductor elements 2 in parallel, the entire semiconductor device 1 is connected. Compensates for the increase in loss.

[Other embodiments]
This embodiment is presented as an example and is not intended to limit the scope of the invention. The embodiment can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and variations thereof are included in the scope of the invention described in the claims and the equivalent scope thereof, as are included in the scope and gist of the invention. The following is an example.

(1) In the above embodiment, the semiconductor element 2 is an IGBT (Insulated Gate Bipolar Transistor), but the semiconductor element 2 is not limited to this. In addition to the IGBT, the semiconductor element 2 includes, for example, a transistor such as a MOS-FET (Meral Oxide Semiconductor Field Effect Transistor), a GTO (Gate Turnoff Transistor), a thyristor, a FRD (Fast Recovery Diode), or the like. It may be a thing.

(2) In the above embodiment, the resistance 3 is connected in series to each semiconductor element 2, but the present invention is not limited to this, and the resistor 3 may be connected in series to any of a plurality of semiconductor elements 2 connected in parallel.

(3) For example, as shown in FIG. 4, a connecting conductor 21 is attached to the semiconductor module 20 on which the semiconductor element 2 is mounted. The connecting conductor 21 is a member that connects the resistor 3 to the semiconductor module 20, and extends in the horizontal direction. The connecting conductors 21 and 21 are arranged parallel to each other and offset in the depth direction in FIG.

A resistor 3 is attached to the connecting conductor 21. The resistor 3 is composed of an L-shaped member having a vertical side portion 31 extending in the upward direction and a horizontal side portion 32 extending in the horizontal direction. In the resistance 3 on the left side of FIG. 4, the horizontal side portion 32 extends from the vertical side portion 31 toward the right side in FIG. 4, and in the resistance 3 on the right side in FIG. 4, the horizontal side portion 32 extends from the vertical side portion 31 toward the left side in FIG. It is extending.

The resistances 3 and 3 adjacent to each other are arranged so as to satisfy the following equation (1) (see FIGS. 4 and 5).
L1 / r1 = L2 / r2 · sinθ ... (1)
L1: Horizontal length dimension of resistance 3 L2: Vertical length dimension r1: Repulsive force acting between adjacent resistors 3 R2: Receives attractive force acting between adjacent resistances 3 Intervals I1 and I2 shown in FIG. 4 are currents flowing through the resistor 3, and the currents flow in the direction of the arrow. F1 shown in FIG. 5 is a repulsive force acting between the resistances 3 adjacent to each other, and F2 shown in FIG. 5 is an attractive force acting between the resistances 3 adjacent to each other. In the specification, the dimensions are shown in uppercase L, but in FIGS. 4 and 5, L is shown in lowercase.

In the above embodiment, since the above equation (1) L1 / r1 = L2 / r2 · sinθ is satisfied, when the resistors 3 adjacent to each other are connected in parallel, the horizontal sides of the two resistors 3 and 3 are connected in parallel. The repulsive force F1 acting on the 32 and 32 and the suction force F2 can be in a positional relationship in which they are balanced in the Y direction of FIG. Therefore, the horizontal side portion 32 of the resistance 3 is not affected by the repulsive force F1 or the attractive force F2. As a result, it is possible to prevent the resistance 3 and the connecting conductor 21 from being broken and the semiconductor module 20 from being damaged.

1 ... Semiconductor device 2 ... Semiconductor element 3 ... Resistance 4 ... Detection result storage unit 5 ... Judgment unit 6 ... Gate block unit 7 ... Count unit 8 ... Short circuit guarantee unit

Claims (4)

A semiconductor device in which a resistor having a resistance value equivalent to the on-resistance when the semiconductor element is operated is connected in series to any one of a plurality of semiconductor elements connected in parallel or each semiconductor element. The semiconductor device according to claim 1, wherein the semiconductor element connected in series with the resistor is packaged. The resistance is configured to detect the voltage of the semiconductor element.
A detection result storage unit that stores past detection results detected by the resistance,
A determination unit that compares the current detection result currently detected by the resistance with the past detection result to determine the defect of the semiconductor element, and
A gate block unit that outputs a gate signal to the semiconductor element based on the determination result of the determination unit to gate block the semiconductor element, and a gate block unit.
The semiconductor device according to claim 1 or 2. A counting unit that counts the number of semiconductor elements gate-blocked by the gate block unit, and a counting unit.
When the count number of the count unit exceeds a preset number, a short-circuit guarantee unit that turns on all the semiconductor elements that are not gate-blocked, and a short-circuit guarantee unit.
The semiconductor device according to claim 3.

Images