JP2021151096A - Photoelectric conversion module - Google Patents

Abstract

To suppress the decrease in the maximum power maintenance rate of a photoelectric conversion element in a photoelectric conversion module having the photoelectric conversion element.SOLUTION: The photoelectric conversion module has a photoelectric conversion element mounted on a substrate and a voltage control circuit that is connected to the photoelectric conversion element and controls a voltage to a load. When the maximum output voltage of the photoelectric conversion element is denoted as VMAX, a control voltage VA of the voltage control circuit is in a range of VA≤VMAX.SELECTED DRAWING: Figure 5

Description

The present invention relates to a photoelectric conversion module.

In recent years, the importance of photoelectric conversion elements has been increasing as an alternative energy to fossil fuels and as a countermeasure against global warming. In particular, recently, since a wide range of applications can be expected as a self-supporting power source that does not require battery replacement or power supply wiring, a photoelectric conversion module having an indoor photoelectric conversion element that can efficiently generate electricity even with low-illuminance light has attracted a lot of attention. ing.

Examples of the photoelectric conversion element include an amorphous silicon type solar cell, an organic thin film type solar cell, a perovskite type solar cell, and a dye sensitized type solar cell. For example, in a photoelectric conversion module equipped with a solar cell, a circuit configuration capable of restoring the operation of a load device in a short time is disclosed (see, for example, Patent Document 1).

However, in the conventional photoelectric conversion module, there is a possibility that the characteristics of the photoelectric conversion element such as a solar cell are deteriorated when the photoelectric conversion element is opened to the load, specifically, the maximum power retention rate of the photoelectric conversion element is lowered. there were.

An object of the present invention is to suppress a decrease in the maximum power retention rate of a photoelectric conversion element in a photoelectric conversion module having a photoelectric conversion element.

This photoelectric conversion module includes a photoelectric conversion element mounted on the substrate, is connected to the photoelectric conversion element includes a voltage control circuit for controlling the voltage to the load, and the maximum output voltage of the photoelectric conversion element V _MAX The control voltage _VA of the voltage control circuit is within the range of _VA ≤ V _MAX.

According to the disclosed technique, in a photoelectric conversion module having a photoelectric conversion element, it is possible to suppress a decrease in the maximum power retention rate of the photoelectric conversion element.

It is a top view which illustrates the photoelectric conversion module which concerns on 1st Embodiment. It is sectional drawing which illustrates the photoelectric conversion module which concerns on 1st Embodiment. It is sectional drawing which illustrates the power generation part of a photoelectric conversion element. It is a figure explaining the circuit which the photoelectric conversion module which concerns on 1st Embodiment has. This is an example of a time chart of a switch control circuit and a voltage control circuit. It is a figure which illustrates the maximum power retention rate by short-circuiting / opening of a photoelectric conversion element. It is a figure explaining the circuit which the photoelectric conversion module which concerns on the modification 1 of 1st Embodiment have. This is an example of the OUT / OUT1 time chart of the voltage control circuit.

Hereinafter, modes for carrying out the invention will be described with reference to the drawings. In each drawing, the same components may be designated by the same reference numerals and duplicate description may be omitted.

<First Embodiment>
FIG. 1 is a plan view illustrating the photoelectric conversion module according to the first embodiment. FIG. 2 is a cross-sectional view illustrating the photoelectric conversion module according to the first embodiment, and shows a cross section taken along the line AA of FIG.

Referring to FIGS. 1 and 2, the photoelectric conversion module 1 includes a substrate 10, a plurality of photoelectric conversion elements 20, sockets 31 and 32, male connectors 41 and 42, and female connectors 51 and 52. doing. The plurality of photoelectric conversion elements 20 are connected in parallel. In the present embodiment, an example in which three photoelectric conversion elements 20 are connected is shown, but the photoelectric conversion module 1 may have one or more photoelectric conversion elements 20, and the number of photoelectric conversion elements 20 to be connected. May be optional.

The substrate 10 is a substrate on which the photoelectric conversion element 20, the sockets 31 and 32, the male connectors 41 and 42, the female connectors 51 and 52, and the like are mounted. It has a wiring pattern that electrically connects the parts. As the substrate 10, for example, a resin substrate (glass epoxy substrate or the like), a silicon substrate, a ceramic substrate or the like is appropriately used.

In the present embodiment, as an example, the following description will be given with the planar shape of the substrate 10 as a rectangle. However, the planar shape of the substrate 10 is not limited to a rectangle. The plan view means that the object is viewed from the normal direction of the upper surface 10a of the substrate 10, and the planar shape refers to the shape of the object viewed from the normal direction of the upper surface 10a of the substrate 10.

The photoelectric conversion element 20 includes a substrate 21, a power generation unit 22, and a substrate 23, and the power generation unit 22 is sandwiched between the substrate 21 and the substrate 23 from above and below. The periphery of the power generation unit 22 may be sealed with a resin or the like.

The photoelectric conversion element 20 is mounted on the upper surface 10a of the substrate 10 with the light receiving surface facing upward (the side not facing the upper surface 10a of the substrate 10). The substrate 23 is transparent, and sunlight or the like is incident on the light receiving surface of the power generation unit 22 through the substrate 23. The substrates 21 and 23 are, for example, glass. The photoelectric conversion element 20 has a positive terminal 24 (+ terminal) and a negative terminal 25 (− terminal).

The photoelectric conversion element 20 is an element that converts light energy into electrical energy, and examples thereof include a solar cell and a photodiode. Examples of the solar cell include an amorphous silicon type solar cell, an organic thin film type solar cell, a perovskite type solar cell, a dye sensitized type solar cell, and the like.

Among these, the dye-sensitized solar cell is preferable in that it is advantageous in cost reduction because it can be manufactured by using a conventional printing means. Further, in particular, a solid dye-sensitized solar cell in which a solid material is used as the hole transport layer constituting the dye-sensitized solar cell is preferable because it can maintain high durability against a load.

Here, as an example, the cross-sectional structure of the power generation unit when the photoelectric conversion element 20 is a dye-sensitized solar cell is shown. FIG. 3 is a cross-sectional view illustrating a power generation unit of the photoelectric conversion element. When the photoelectric conversion element 20 is a dye-sensitized solar cell, the power generation unit 22 has, for example, the cross-sectional structure shown in FIG.

In the power generation unit 22 shown in FIG. 3, a first electrode 222 is formed on the substrate 221 and a hole blocking layer 223 is formed on the first electrode 222, an electron transport layer 224 is formed on the hole blocking layer 223, and electrons are formed. This is an example of a configuration in which the photosensitizing compound 225 is adsorbed on the electron transporting material in the transport layer 224, and the hole transport layer 226 is sandwiched between the first electrode 222 and the second electrode 227 facing the first electrode 222. The first electrode 222 is connected to the positive terminal 24 from the lead wire or the like, and the second electrode 227 is connected to the negative terminal 25 from the lead wire or the like, for example. Hereinafter, the power generation unit 22 will be described in detail.

[substrate]
The substrate 221 is not particularly limited, and known ones can be used. The substrate 221 is preferably made of a transparent material, and examples thereof include glass, a transparent plastic plate, a transparent plastic film, and an inorganic transparent crystal.

[First electrode]
The first electrode 222 is not particularly limited as long as it is a conductive substance that is transparent to visible light, and can be appropriately selected according to the purpose, and a known one used for a normal photoelectric conversion element, a liquid crystal panel, or the like is used. Can be used.

Examples of the material of the first electrode 222 include indium tin oxide (ITO), fluorine-doped tin oxide (FTO), antimony-doped tin oxide (ATO), indium zinc oxide, niobium titanium oxide, graphene and the like. Can be mentioned. These may be used alone or in combination of two or more.

The thickness of the first electrode 222 is preferably 5 nm to 100 μm, more preferably 50 nm to 10 μm.

Further, in order to maintain a constant hardness, the first electrode 222 is preferably provided on a substrate 221 made of a material transparent to visible light. A known one in which the first electrode 222 and the substrate 221 are integrated can also be used. For example, FTO coated glass, ITO coated glass, zinc oxide-added aluminum coated glass, FTO coated transparent plastic film, and ITO coating can be used. Examples include a transparent plastic film.

[Hole blocking layer]
The hole blocking layer 223 is provided in order to suppress a decrease in power due to the electrolyte coming into contact with the electrode and the electrons in the electrolyte recombining (so-called reverse electron transfer) with the holes on the electrode surface. The effect of the whole blocking layer 223 is particularly remarkable in the solid dye-sensitized solar cell. This is because compared with the wet dye-sensitized solar cell using the electrolytic solution, the solid dye-sensitized solar cell using the organic hole transport material or the like regenerates the electrons in the hole and the electrode surface in the hole transport material. This is due to the high bonding (reverse electron transfer) speed.

The whole blocking layer 223 preferably contains a metal oxide containing titanium atoms and niobium atoms. If necessary, other metal atoms may be contained, but a metal oxide composed of titanium atoms and niobium atoms is preferable. The hole blocking layer 223 is preferably transparent to visible light, and the hole blocking layer 223 is preferably dense in order to obtain a function as a hole blocking layer.

The average thickness of the hole blocking layer 223 is preferably 1,000 nm or less, more preferably 0.5 nm or more and 500 nm or less. When the average thickness is in the range of 0.5 nm or more and 500 nm or less, the back electron transfer can be prevented without hindering the electron transfer to the transparent conductive film (first electrode 222), and the photoelectric conversion efficiency can be improved. can. Further, if the average thickness is less than 0.5 nm, the film density becomes low and the back electron transfer cannot be sufficiently prevented. On the other hand, when the average thickness exceeds 500 nm, the internal stress increases and cracks are likely to occur.

[Electron transport layer]
The electron transport layer 224 is formed on the hole blocking layer 223, for example, as a porous layer. It is preferable that the electron transport layer 224 contains an electron transport material such as semiconductor fine particles, and the photosensitizing compound 225, which will be described later, is adsorbed on the electron transport material.

The electron transporting material is not particularly limited and may be appropriately selected depending on the intended purpose, but a semiconductor material such as a rod shape or a tube shape is preferable. Hereinafter, the semiconductor fine particles may be described as an example, but the description is not limited to this.

Further, the electron transport layer 224 may be a single layer or a multi-layer. In the case of multiple layers, dispersions of semiconductor fine particles having different particle sizes can be applied in multiple layers, or different types of semiconductors, resins, and coating layers having different composition of additives can be applied in multiple layers. Multilayer coating is an effective means when the film thickness is insufficient after one coating.

The semiconductor is not particularly limited, and known semiconductors can be used. Specific examples thereof include elemental semiconductors such as silicon and germanium, compound semiconductors typified by metallic chalcogenides, and compounds having a perovskite structure.

The particle size of the semiconductor fine particles is not particularly limited and may be appropriately selected depending on the intended purpose, but the average particle size of the primary particles is preferably 1 nm to 100 nm, more preferably 5 nm to 50 nm. It is also possible to improve efficiency by the effect of mixing or laminating semiconductor fine particles having a larger average particle size to scatter incident light. In this case, the average particle size of the semiconductor is preferably 50 nm to 500 nm.

Generally, as the thickness of the electron transport layer 224 increases, the amount of the supported photosensitizer compound per unit projected area also increases, so that the light capture rate increases, but the diffusion distance of the injected electrons also increases, so that the charge is charged. The loss due to recombination also increases. Therefore, the thickness of the electron transport layer 224 is preferably 100 nm to 100 μm, more preferably 100 nm to 50 μm, and even more preferably 100 nm to 10 μm.

[Photosensitizer compound]
In order to further improve the conversion efficiency, the electron transport layer 224 preferably contains an electron transport material on which the photosensitizing compound 225 is adsorbed. Specific examples of the photosensitizer compound 225 are described in detail in, for example, Japanese Patent No. 6249093.

As a method of adsorbing the photosensitizing compound 225 on the electron transporting layer 224 (electron transporting material), an electron collecting electrode (board 221) containing the electron transporting layer 224 in a solution or a dispersion of the photosensitizing compound 225. , The method of immersing the first electrode 222 and the electrode on which the hole blocking layer 223 is formed). In addition to this, a method of applying a solution or a dispersion liquid to the electron transport layer 224 and adsorbing it can be used.

In the former case, a dipping method, a dip method, a roller method, an air knife method, or the like can be used. In the latter case, the wire bar method, the slide hopper method, the extrusion method, the curtain method, the spin method, the spray method and the like can be used.

Further, it may be adsorbed in a supercritical fluid using carbon dioxide or the like.

When adsorbing the photosensitizer compound 225, a condensing agent may be used in combination. The condensing agent acts catalytically on the surface of the inorganic substance, which is thought to physically or chemically bond the photosensitizing compound 225 and the electron-transporting material, or acts stoichiometrically to favor chemical equilibrium. It may be any of those to be moved.

[Hall transport layer]
The hole transport layer 226 includes an electrolytic solution in which a redox pair is dissolved in an organic solvent, a gel electrolyte in which a polymer matrix is impregnated with a liquid in which a redox pair is dissolved in an organic solvent, a molten salt containing a redox pair, and a solid electrolyte. Inorganic hole transport materials, organic hole transport materials, etc. are used. Among these, an organic hole transport material is preferable. In the following, there is a section where the organic hole transport material is described as an example, but the present invention is not limited to this.

The hole transport layer 226 may have a single layer structure made of a single material or a laminated structure made of a plurality of compounds. In the case of a laminated structure, it is preferable to use a polymer material for the hole transport layer 226 near the second electrode 227. By using a polymer material having excellent film-forming properties, the surface of the porous electron transport layer 224 can be further smoothed, and the photoelectric conversion characteristics can be improved.

Further, since the polymer material does not easily penetrate into the porous electron transport layer 224, it is excellent in covering the surface of the porous electron transport layer 224 and is effective in preventing a short circuit when the electrode is provided. , It is possible to obtain higher performance.

The organic hole transporting material used in the single layer structure used alone is not particularly limited, and a known organic hole transporting compound is used.

The thickness of the hole transport layer 226 is not particularly limited and may be appropriately selected depending on the intended purpose, but it is preferable that the hole transport layer 226 has a structure that penetrates into the pores of the porous electron transport layer 224, and is placed on the electron transport layer 224. 0.01 μm or more is more preferable, and 0.1 μm to 10 μm is further preferable.

[Second electrode]
The second electrode 227 can be formed on the hole transport layer 226 or on the metal oxide in the hole transport layer 226. Further, as the second electrode 227, the same one as that of the first electrode 222 can be used, and the support is not always necessary in the configuration in which the strength and the sealing property are sufficiently maintained.

Examples of the material of the second electrode 227 include metals such as platinum, gold, silver, copper and aluminum, carbon-based compounds such as graphite, fullerene, carbon nanotubes and graphene, and conductive metal oxides such as ITO, FTO and ATO. , Polythiophene, conductive polymers such as polyaniline and the like.

The film thickness of the second electrode 227 is not particularly limited and can be appropriately selected depending on the intended purpose. The second electrode 227 can be formed on the hole transport layer 226 by a method such as coating, laminating, vapor deposition, CVD, or laminating as appropriate, depending on the type of material used and the type of the hole transport layer 226.

In order for the power generation unit 22 to perform photoelectric conversion, at least one of the first electrode 222 and the second electrode 227 must be substantially transparent. In the example of FIG. 3, since the first electrode 222 side is transparent, sunlight or the like is incident from the first electrode 222 side.

That is, in the photoelectric conversion module 1, the power generation unit 22 is arranged between the substrate 21 and the substrate 23 so that the first electrode 222 is located on the substrate 23 side. In this case, it is preferable to use a material that reflects light on the second electrode 227 side, and for example, metal, glass on which a conductive oxide is vapor-deposited, plastic, a metal thin film, or the like is used. It is also an effective means to provide an antireflection layer on the incident light side.

The photoelectric conversion element 20 having the power generation unit 22 can obtain good conversion efficiency even in the case of weak incident light such as indoor light.

Returning to the description of FIGS. 1 and 2, the substrate 10 is mounted with sockets 31 and 32 that can be connected to the positive terminal 24 and the negative terminal 25 of the photoelectric conversion element 20. The photoelectric conversion element 20 is mounted on the substrate 10 in a detachable state via the sockets 31 and 32.

Specifically, the sockets 31 and 32 are mounted on the upper surface 10a of the substrate 10 at predetermined intervals substantially parallel to the short side direction of the substrate 10 in a plan view. The socket 31 has an insertion hole 311 into which the positive terminal 24 of the photoelectric conversion element 20 is inserted, and is inserted into, for example, a through hole provided in the substrate 10. The socket 32 has an insertion hole into which the negative terminal 25 of the photoelectric conversion element 20 is inserted, and is inserted into, for example, a through hole provided in the substrate 10.

The positive terminal 24 of the photoelectric conversion element 20 is inserted into the insertion hole 311 of the socket 31, the negative terminal 25 of the photoelectric conversion element 20 is inserted into the insertion hole of the socket 32, and the photoelectric conversion element 20 and the sockets 31 and 32 are inserted. It is electrically and mechanically connected.

The substrate 21 is fixed to the upper surface 10a of the substrate 10 via the adhesive layer 60 on the side opposite to the side where the positive terminal 24 and the negative terminal 25 of the photoelectric conversion element 20 are provided. Examples of the adhesive layer 60 include a resin-based adhesive and double-sided tape. It is preferable to set the adhesive force of the adhesive layer 60 in consideration of maintainability such as replacement of the photoelectric conversion element 20.

By mounting the photoelectric conversion element 20 on the substrate 10 in a detachable state in this way, if the photoelectric conversion element 20 is deteriorated or damaged, it can be easily replaced.

However, the above description is an example of a mounting method of the photoelectric conversion element 20, and if necessary, the positive terminal 24 and the negative terminal 25 of the photoelectric conversion element 20 are soldered or the like without using the sockets 31 and 32. , May be connected to the land of the substrate 10. Alternatively, instead of the sockets 31 and 32, one socket having two insertion holes may be used.

Further, the substrate 21 can be substituted for the substrate 10, and in this case, the sockets 31 and 32 are unnecessary. When the substrate 21 is glass, the power storage elements 71 and 72, the switch control circuit 73, the voltage control circuit 74, and the like, which will be described later, are mounted by forming a wiring pattern on the glass surface on the side opposite to the power generation unit 22. It is also possible. Further, by processing the substrate 21 with glass, it is possible to form a female connector or a male connector. By doing so, the installation of the sockets 31 and 32 can be omitted, and the photoelectric conversion module 1 can be miniaturized.

The male connectors 41 and 42 are mounted on the side surface 10c side of the lower surface 10b of the substrate 10 at predetermined intervals substantially parallel to the long side direction of the substrate 10 in a plan view. The male connectors 41 and 42 include, for example, a male terminal electrically connected to the photoelectric conversion element 20 via a wiring pattern and a male housing that holds the male terminal. It is mounted on the lower surface 10b of the substrate 10 with the insertion side facing the outside of the substrate 10 (the left side in FIG. 1).

The male connectors 41 and 42 are electrically and mechanically connected to the land provided on the lower surface 10b of the substrate 10 by soldering, for example. In a plan view, a part of the male connectors 41 and 42 protrudes outward from the side surface 10c of the substrate 10, and the protruding part can be inserted into the female connectors 51 and 52 of the other photoelectric conversion module 1. be.

The female connectors 51 and 52 are mounted on the side surface 10d side of the lower surface 10b of the substrate 10 at predetermined intervals in a plan view substantially parallel to the long side direction of the substrate 10. The female connectors 51 and 52 include, for example, a female terminal electrically connected to the photoelectric conversion element 20 via a wiring pattern and a female housing for holding the female terminal. It is mounted on the lower surface 10b of the substrate 10 with the side to be inserted facing the outside of the substrate 10 (the right side in FIG. 1).

The female connectors 51 and 52 are electrically and mechanically connected to the lands provided on the lower surface 10b of the substrate 10 by soldering, for example. In a plan view, the female connectors 51 and 52 do not project outward from the side surface 10d of the substrate 10, but the side surfaces are provided to such an extent that the connection with the male connectors 41 and 42 of the other photoelectric conversion module 1 is not hindered. It may protrude outward from 10d. Alternatively, the female connectors 51 and 52 may enter the inside of the substrate 10 from the side surface 10d to the extent that the connection with the male connectors 41 and 42 of the other photoelectric conversion module 1 is not hindered.

As described above, the male connector 41 has a shape that can be inserted into the female connector 51, and when the male connector 41 is inserted into the female connector 51, the male terminal of the male connector 41 and the female connector 51 The female terminal is in contact and both are electrically connected.

Similarly, the male connector 42 has a shape that can be inserted into the female connector 52, and when the male connector 42 is inserted into the female connector 52, the male terminal of the male connector 42 and the female of the female connector 52 are female. The mold terminals are in contact and both are electrically connected.

Further, the pitch of the male connector 41 and the male connector 42 is equal to the pitch of the female connector 51 and the female connector 52.

However, if the male connector 41 can be inserted into the female connector 51 and the male connector 42 can be inserted into the female connector 52, are the shapes and sizes of the male connector 41 and 42 the same? It does not matter whether or not the female connectors 51 and 52 have the same shape and size.

The male connectors 41 and 42 and the female connectors 51 and 52 have the above-mentioned relationship. Therefore, the male connectors 41 and 42 of the photoelectric conversion module 1 can be electrically and mechanically connected to the female connectors 51 and 52 of the other photoelectric conversion module 1 arranged on one side of the photoelectric conversion module 1. .. Further, the female connectors 51 and 52 of the photoelectric conversion module 1 can be electrically and mechanically connected to the male connectors 41 and 42 of the other photoelectric conversion module 1 arranged on the other side of the photoelectric conversion module 1. ..

However, when it is not necessary to connect the plurality of photoelectric conversion modules 1 to each other, the male connectors 41 and 42 and the female connectors 51 and 52 may not be provided on the substrate 10.

FIG. 4 is a diagram illustrating a circuit included in the photoelectric conversion module according to the first embodiment. The photoelectric conversion module 1 has the circuit shown in FIG. 4, and the circuit shown in FIG. 4 can be mounted on, for example, the lower surface 10b of the substrate 10.

In FIG. 4, the three photoelectric conversion elements 20 are connected in parallel. PV + is the output of the photoelectric conversion element 20, and PV− is GND. The power storage elements 71 and 72 are directly connected between PV + and PV−. In other words, the power storage elements 71 and 72 are connected in parallel to the photoelectric conversion element 20. The power storage elements 71 and 72 are, for example, electric double layer capacitors, and store the electric power generated by the photoelectric conversion element 20. One or three or more power storage elements may be connected.

A switch control circuit 73 is connected to the subsequent stages (the side closer to the battery 75, which will be described later) of the power storage elements 71 and 72. The switch control circuit 73 is a semiconductor integrated circuit that controls the transistor Q2, which will be described later, to conduct when the storage voltage of the storage elements 71 and 72 becomes the first voltage or more, and shuts off when the storage voltage becomes the second voltage or less.

Resistors R1, R2, and R3 are connected in series between PV + and PV-, and the voltage divided by the ratio of resistors R1, R2, and R3 between PV + and PV- is the switch. It is connected to the LTHIN terminal and the HTHIN terminal of the control circuit 73. The first voltage is set by the voltage of the HTHIN terminal divided by the ratio of the resistors R1, R2, and R3, and the second voltage is set by the voltage of the LTHIN terminal. For example, the first voltage is 4.9V and the second voltage is 4V.

The / LBO terminal of the switch control circuit 73 is connected to the gate G of the transistor Q1 and is pulled down to PV- by the resistor R4. The drain D of the transistor Q1 is connected to the gate G of the transistor Q2 and is pulled up to PV + by the resistor R5. The source S of the transistor Q1 is connected to PV−.

Transistor Q2 is inserted in the PV + line. The source S of the transistor Q2 is connected to the switch control circuit 73 side, and the drain D of the transistor Q2 is connected to the voltage control circuit 74 side. When the transistor Q2 is conducted by the control of the switch control circuit 73, PV + is supplied to the voltage control circuit 74 side, but when the transistor Q2 is interrupted, no voltage is supplied to the voltage control circuit 74 side.

The voltage control circuit 74 is a semiconductor integrated circuit that is connected to the photoelectric conversion element 20 via the transistor Q2 and controls the voltage with respect to the load (power supply destination such as the battery 75). The OUT terminal of the voltage control circuit 74 is connected to the gate G of the transistor Q3 and is pulled down to PV- by the resistor R6. The drain D of the transistor Q3 is pulled up to PV + by the resistor R7. The source S of the transistor Q3 is connected to PV-. The resistance value of the resistor R7 is set to a relatively low value of about several hundred Ω.

It is not preferable to arrange the voltage control circuit 74 in front of the switch control circuit 73 (on the photoelectric conversion element 20 side). This is because the switch control circuit 73 cannot turn on the transistor Q2 unless the operating voltage of the voltage control circuit 74 is set higher, which may deteriorate the photoelectric conversion element 20.

By arranging the voltage control circuit 74 after the switch control circuit 73 (battery 75 side) as in the present embodiment, the operating voltage of the voltage control circuit 74 is set to the voltage at which the switch control circuit 73 turns on the transistor Q2. (For example, it can be set lower than (for example, 4.9 V in FIG. 5 described later). Therefore, the possibility of deteriorating the photoelectric conversion element 20 can be reduced.

A battery 75 is connected to the subsequent stage of the voltage control circuit 74 via the output terminals 81 and 82 of the photoelectric conversion module 1. Examples of the battery 75 include a lithium ion secondary battery, a lithium ion polymer secondary battery, a nickel / hydrogen storage battery, and the like. Hereinafter, the operations of the switch control circuit 73 and the voltage control circuit 74 will be described in detail.

FIG. 5 is an example of a time chart of the switch control circuit and the voltage control circuit. In FIG. 5, the power supply voltage on the vertical axis is the voltage of the storage elements 71 and 72 (PV +: the voltage on the source S side of the transistor Q2). The output voltage on the vertical axis is the voltage between the output terminal 81 and the output terminal 82, that is, the voltage of the output terminal 81 with respect to GND (the voltage on the drain D side of the transistor Q2).

Here, as an example, it is assumed that the voltage at which the transistor Q2 is turned on by the switch control circuit 73 is 4.9 V and the voltage at which the transistor Q2 is turned off is 4.0 V. Further, it is assumed that the voltage at which the voltage control circuit 74 is turned on is 4.8 V and the voltage at which the voltage control circuit 74 is turned off is 4.6 V. Further, as an example, it is assumed that the voltages of the power storage elements 71 and 72 are less than 4.5 V and the switch control circuit 73 is OFF (the voltage of the gate G of the transistor Q2 is'L') in the initial state.

In this case, when the illumination is ON, the output current from the photoelectric conversion element 20 flows to the storage elements 71 and 72 to charge the storage elements 71 and 72, and the voltage of the storage elements 71 and 72 gradually increases from a little less than 4.5V. It will rise. At this timing, since the transistor Q2 is OFF, no voltage is supplied to the voltage control circuit 74 and the battery 75.

When the voltage of the power storage elements 71 and 72 reaches 4.9 V, the transistor Q2 controlled by the switch control circuit 73 is turned on (the voltage of the gate G of the transistor Q2 is'H'), and the voltage control circuit 74 and the battery 75 A voltage is supplied to the battery 75, and charging of the battery 75 is started.

When charging of the battery 75 is started, current is supplied to the battery 75 from the storage elements 71 and 72, so that the voltage of the storage elements 71 and 72 gradually decreases from 4.9V, but it is built in the battery 75. Controlled by the circuit, the charging voltage does not drop below 4.5V.

When the lighting is ON and the battery 75 is fully charged, the control circuit on the battery 75 side cuts off the connection between the output terminals 81 and 82 and the battery 75, and the output current from the photoelectric conversion element 20 is the power storage element 71. And 72 flows to charge the power storage elements 71 and 72, and the voltage of the power storage elements 71 and 72 rises again from 4.5V. However, when the voltage of the storage elements 71 and 72 reaches 4.8V, the voltage control circuit 74 is turned on and a current flows through R7, so that the voltage of the storage elements 71 and 72 does not rise above 4.8V. , Begins to descend.

When the voltage of the storage elements 71 and 72 drops to 4.6V, the voltage control circuit 74 is turned off, so that no current flows through R7 and the voltage of the storage elements 71 and 72 rises again. After that, since the voltage control circuit 74 repeats the same operation, the voltages of the power storage elements 71 and 72 change periodically between 4.6V and 4.8V.

When the lighting condition becomes weak and the battery 75 is not fully charged due to self-discharge or the like, the output terminals 81 and 82 are connected to the battery 75 by the control circuit on the battery 75 side, and charging is restarted. At this time, the voltage of the power storage elements 71 and 72 drops below 4.6V, and the charging voltage becomes 4.5V under the control of the circuit built in the battery 75.

When the illumination is turned off, the power storage elements 71 and 72 are not charged, so that the voltage of the power storage elements 71 and 72 gradually decreases, and when it reaches 4.0 V, the transistor Q2 controlled by the switch control circuit 73 is turned off. (The voltage of the gate G of the transistor Q2 is'L'), and the voltage is not supplied to the voltage control circuit 74 and the battery 75. In this state, the battery 75 is not charged at all.

In the circuit of FIG. 4, the purpose of providing the switch control circuit 73 is that when the photoelectric conversion element 20 and the battery 75 are directly connected, charging is started before the voltages of the power storage elements 71 and 72 sufficiently rise, so that the battery 75 This is because the large current required for starting charging of the battery 75 cannot be secured, and as a result, charging of the battery 75 cannot be started.

A switch control circuit 73 is interposed between the photoelectric conversion element 20 and the battery 75, and the battery 75 is controlled by the switch control circuit 73 until the voltages of the storage elements 71 and 72 rise sufficiently (for example, 4.9 V). Does not supply current. Then, after the voltages of the power storage elements 71 and 72 have sufficiently risen (for example, 4.9 V), a current is supplied to the battery 75 under the control of the switch control circuit 73 to obtain a large current required to start charging the battery 75. It can be secured and the charging of the battery 75 can be started reliably.

When the initial current value required to start charging the battery 75 is I, the capacities of the storage elements 71 and 72 are C, the load operating voltage of the _{photoelectric conversion element 20 is V X} , and the open circuit voltage of the photoelectric conversion element 20 is V _OC. , The on-voltage V _B of the switch control circuit 73 preferably satisfies V _X + I / C ≦ V _B ≦ V _OC.

Here, the load operating voltage V _X + is the operating voltage of the device connected to the photoelectric conversion element 20, and in the present embodiment, is the steady charging voltage of the battery 75 connected to the photoelectric conversion element 20. .. The load operating voltage V _X + (the steady charging voltage of the battery 75) is, for example, 4.5 V. The open circuit voltage _VOC of the photoelectric conversion element 20 is, for example, 6.2 V.

The on-voltage V _B of the switch control circuit 73 is the storage voltage of the storage elements 71 and 72 when the transistor Q2 is conducted under the control of the switch control circuit 73, that is, the above-mentioned first voltage.

The reason for setting the range of the on-voltage V _{B of the switch control circuit 73 to V X} + I / C ≤ V _B ≤ V _OC is as follows. That is, from the equation of the current flowing through the capacitor (I = C · ΔV / Δt), ΔV = I · Δt / C. Further, since ΔV = V _B− V _X , V _B− V _X = I · Δt / C. Here, if Δt = 1s, then V _B = I / C + V _X.

That is, in order to allow the current I to flow and start charging the battery 75, the on-voltage V _B of the switch control circuit 73 may be I / C + V _X or more. That is, V _X + I / C ≦ V _B may be satisfied.

For example, if I = 30mA, C = 350mF, and Vx = 4.5V, then V _B = 30mA × 1s / 350mF + 4.5V = 4.6V. In this case, if the on-voltage V _B of the switch control circuit 73 is set to 4.6 V or more, when the transistor Q2 becomes conductive, a current flows through the battery 75 at once and charging of the battery 75 is started.

If PV + _{does not reach the voltage V B} , the transistor Q2 cannot be conducted. Therefore, it is necessary to satisfy _{V B} ≤ V _OC.
Also, off-voltage _{V C} of the switch control circuit _73, it is preferable to satisfy the V X> _{V C.} Here, the OFF voltage V _C of the switch control circuit 73, a power storage storage voltage of the element 71 and 72, i.e. the second voltage described above when the transistor Q2 by the control of switch control circuit 73 is shut off.

When the range of the off-voltage V _C of the switch control circuit 73 does not V _X> V _C, so that the device continues to flow electric current to the device despite not work.

Further, in the circuit of FIG. 4, the purpose of providing the voltage control circuit 74 is to suppress a decrease in the output of the photoelectric conversion element 20 by controlling the photoelectric conversion element 20 so as not to be in an open state. This will be described below.

FIG. 6 is a diagram illustrating a maximum power retention rate due to a short circuit / opening of a photoelectric conversion element. FIG. 6 shows the maximum power retention rate when the photoelectric conversion element 20 is irradiated with 1500 lpx light, and 1 on the vertical axis is the maximum power. A dye-sensitized solar cell is used as the photoelectric conversion element 20.

In FIG. 6, the solid line is the maximum power retention rate when the photoelectric conversion element 20 is short-circuited and irradiated with light of 1500 lpx. The alternate long and short dash line is the maximum power retention rate when 1500 lp of light is irradiated with the photoelectric conversion element 20 open. At open, the open circuit voltage (Voc) is about 6.2V.

As shown in FIG. 6, when light is irradiated with the photoelectric conversion element 20 short-circuited, the maximum power retention rate decreases with time, but the maximum power is higher than when light is irradiated with the photoelectric conversion element 20 open. The maintenance rate is high. That is, when the photoelectric conversion element 20 is irradiated with light in the open state, the output is reduced. Therefore, it is preferable to control the photoelectric conversion element 20 so as not to be in the open state.

When the battery 75 is fully charged, the control circuit on the battery 75 side cuts off the connection between the battery 75 and the photoelectric conversion element 20 in order to prevent overcharging. In this case, the output of the photoelectric conversion element 20 is in an open state, but by providing the voltage control circuit 74, the charging voltage to the battery 75 (voltage at the output terminal 81) does not become larger than 4.8V. ..

That is, by providing the voltage control circuit 74, it is possible to avoid a state in which the photoelectric conversion element 20 is irradiated with light in an open state, a decrease in the output of the photoelectric conversion element 20 is suppressed, and the maximum power retention rate is maintained in a good state. Can be maintained.

In this embodiment, the load operating voltage of the photoelectric conversion element 20 Vx, the maximum output voltage of the photoelectric conversion element 20 is taken as _{V MAX,} the control voltage _{V A} of the voltage control circuit _{74, V X ≦ V A ≦} V It is within the range of _MAX. The maximum output voltage _VMAX of the photoelectric conversion element 20 is the maximum power when the output characteristics when the photoelectric conversion element 20 receives light to generate electricity are expressed by taking power on the vertical axis and voltage on the horizontal axis. It is the voltage when becomes.

As the control voltage _VA exceeds the maximum output voltage _VMAX of the photoelectric conversion element 20 _{and approaches the open circuit voltage VOC} of the photoelectric conversion element 20, the potential difference between the electrodes of the photoelectric conversion element 20 increases. As a result, the electric charge generated by the photoelectric conversion stays in the photoelectric conversion element 20 and the electric charge does not flow, and is deactivated in the photoelectric conversion element 20.

The reason why the electric charge generated by the photoelectric conversion is deactivated in the photoelectric conversion element 20 is that, for example, when the photoelectric conversion element 20 is a dye-sensitized solar cell, the photoelectric conversion element 20 is partially generated by the charge generated by the photoelectric conversion. It is considered that the organic material inside causes a chemical reaction and the characteristics deteriorate. If the control voltage _VA ≤ maximum output voltage _VMAX , the electric charge flows smoothly without accumulating in the photoelectric conversion element 20, so that the chemical reaction of the organic material does not occur and the deterioration of the characteristics of the photoelectric conversion element 20 can be suppressed. ..

Therefore, the control voltage _VA of the voltage control circuit 74 can be prevented from deteriorating by satisfying _VA ≤ _{VMAX. If the control voltage VA} is lower than the load operating voltage Vx (for example, the charging voltage for the battery 75) when the fully charged state is released, it takes time to start charging, so the load operating voltage Vx or higher is maintained. It is desirable to keep it. However, since heat is generated by a resistor or the like (for example, R7 in FIG. 4) when the battery is fully charged for a long period of time, the control voltage _VA can be intentionally lowered to less than the load operating voltage Vx.

Further, if the control voltage V _A is in the case of controlling only the V _A ≦ V _MAX, in place of the voltage control circuit 74, it is also possible to avoid at Zener diode V _MAX over voltage. This Zener diode is connected between the output terminal 81 and the switch control circuit 73, for example. The voltage control circuit referred to in the present invention also includes a Zener diode.

Load operating voltage Vx of the photoelectric conversion element 20 is 4.5V for example, the maximum output voltage _{V MAX} of the photoelectric conversion element 20 is 5.5V, for example. In the example described with reference to FIG. 5, since the control voltage _VA is 4.6 V or more and 4.8 V or less, V _X ≤ _VA ≤ V _MAX is satisfied.

<Modification 1 of the first embodiment>
Modification 1 of the first embodiment shows an example in which a reset function is added to the voltage control circuit. In the first modification of the first embodiment, the description of the same component as that of the above-described embodiment may be omitted.

FIG. 7 is a diagram illustrating a circuit included in the photoelectric conversion module according to the first modification of the first embodiment. The circuit of the photoelectric conversion module 1A shown in FIG. 7 is different from the circuit of the photoelectric conversion module 1 shown in FIG. 4 in that the voltage control circuit 74 is replaced with the voltage control circuit 74A and the CPU 76 is added. Here, the CPU 76 is, for example, a controller IC built in a system that controls a load-side system 90 equipped with a battery such as a mobile projector.

The voltage control circuit 74A has, in addition to the function of the voltage control circuit 74, a terminal that detects a drop in the power supply voltage and outputs a reset signal. That is, the voltage control circuit 74A is a semiconductor integrated circuit in which an OUT1 terminal that outputs a reset signal for resetting the CPU 76 or the like from the output terminal 83 is added to the voltage control circuit 74. The voltage control circuit 74A incorporates, for example, a reference potential, a hysteresis comparator, and the like. For example, the OUT terminal is a CMOS output and the OUT1 terminal is an Nch open drain output. The OUT1 terminal is connected to the SETET terminal of the CPU 76 and is pulled up to the power supply of the CPU 76 by R8.

FIG. 8 is an example of the OUT / OUT1 time chart of the voltage control circuit. In FIG. 8, the power supply voltage is the voltage of the VDD terminal of the voltage control circuit 74A. The output voltage is the voltage output from OUT / OUT1. The hysteresis comparator built in the voltage control circuit 74A creates a hysteresis width between _{the release voltage (+ V DET} ) and the detection voltage (-V _DET).

As shown in FIG. 8, if the power supply voltage is larger than the detection voltage, the Nch open drain output OUT1 becomes equal to the pull-up voltage, and the CMOS output OUT terminal becomes equal to the power supply voltage.

When the power supply voltage becomes equal to or lower than the detection voltage, the output of the hysteresis comparator built in the voltage control circuit 74A is inverted, and the outputs of the OUT terminal and the OUT1 terminal become GND. At this time, the CPU 76 connected to the OUT1 terminal is reset.

When the power supply voltage further drops to the minimum operating voltage V _DDL of the voltage control circuit 74A or less, the output voltage becomes indefinite, but since the OUT1 terminal is an Nch open drain output, a pull-up voltage is output.

When the power supply voltage becomes equal to or higher than the release voltage, the output of the hysteresis comparator built in the voltage control circuit 74A is inverted, OUT1 becomes equal to the pull-up voltage, and the OUT terminal becomes equal to the power supply voltage. When the output voltage changes from H to L, there is _{a delay of t PHL} , and when the output voltage changes from L to H, there is a delay _{of t PLH.}

By adding the reset function to the voltage control circuit in this way, the CPU can be reset when the circuit to which the photoelectric conversion element 20 is connected includes the CPU.

Although the preferred embodiments and the like have been described in detail above, they are not limited to the above-described embodiments and the like, and various modifications and substitutions are made to the above-mentioned embodiments and the like without departing from the scope of claims. Can be added.

For example, in the above description, the examples in which the photoelectric conversion elements are connected in parallel are shown, but the photoelectric conversion elements may be connected in series or connected in series with the photoelectric conversion elements connected in parallel. The photoelectric conversion element may be mixed.

1, 1A, 6 Photoelectric conversion module 10 Board 10a Top surface 10b Bottom surface 10c, 10d Side surface 20, 201, 202 Photoelectric conversion element 21, 23 Board 22 Power generation unit 24 Positive terminal 25 Negative terminal 31, 32 Socket 41, 42 Male Connector 51, 52 Female connector 60 Adhesive layer 71, 72 Power storage element 73 Switch control circuit 74 Voltage control circuit 75 Battery 76 CPU
81, 82, 83 Output terminal 90 Load side system 221 Board 222 First electrode 223 Hole blocking layer 224 Electron transport layer 225 Photosensitizer compound 226 Hole transport layer 227 Second electrode 311 Insertion hole

JP-A-2017-077073

Claims (8)

The photoelectric conversion element mounted on the substrate and
It has a voltage control circuit that is connected to the photoelectric conversion element and controls the voltage with respect to the load.
When the maximum output voltage of the photoelectric conversion element is _VMAX ,
_A photoelectric conversion module characterized in that _{the control voltage VA} of the voltage control circuit is within the range of VA ≤ _VMAX. The photoelectric conversion module according to claim 1 _{, wherein the control voltage VA} of the voltage control circuit _{is within the range of V X} ≤ _VA when the load operating voltage of the photoelectric conversion element is Vx. .. The photoelectric conversion module according to claim 1, wherein the voltage control circuit is a Zener diode. The photoelectric conversion module according to claim 1 or 2, wherein the voltage control circuit has a terminal for detecting a drop in power supply voltage and outputting a reset signal. A power storage element connected in parallel to the photoelectric conversion element and
The switch control circuit connected to the power storage element and
With a battery connected to the voltage control circuit,
When the initial current value required to start charging the battery is I, the capacity of the power storage element is C, and the open circuit voltage of the photoelectric conversion element is _VOC ,
The on-voltage V _B of the switch control circuit satisfies _{V X} + I / C ≤ V _B ≤ V _OC.
Off voltage V _C of the switch control circuit includes a photoelectric conversion module according to any one of claims 1 to 4, characterized in that satisfy V _X> V _C. A plurality of the photoelectric conversion elements are mounted on the substrate, and the photoelectric conversion elements are mounted on the substrate.
The photoelectric conversion module according to any one of claims 1 to 5, wherein the photoelectric conversion elements are connected in parallel or in series. The photoelectric conversion module according to any one of claims 1 to 6, wherein the photoelectric conversion element is a dye-sensitized solar cell. The photoelectric conversion module according to any one of claims 1 to 6, wherein the photoelectric conversion element is a perovskite type solar cell.

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