JP2021129107A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

To provide a complementary semiconductor device with a wide noise margin.SOLUTION: A semiconductor device comprises a first semiconductor device 500, which is an n-type semiconductor device, and a second semiconductor device 501, which is a p-type semiconductor device, both of semiconductor layers 560 and 561 of each semiconductor device contain carbon nanotubes, and the total length (Cn) of the carbon nanotubes present per 1 μm2 of the semiconductor layer of the first semiconductor device and the total length (Cp) of the carbon nanotubes present per 1 μm2 of the semiconductor layer of the second semiconductor device are in a predetermined relationship.SELECTED DRAWING: Figure 5

Description

The present invention relates to a semiconductor device and a method for manufacturing the same.

In recent years, as a device using a field effect transistor (hereinafter referred to as FET), a wireless communication system using RFID (Radio Frequency Identification) technology has attracted attention. The RFID tag has an IC chip having a circuit composed of FETs and an antenna for wireless communication with a reader / writer. The antenna installed in the tag receives the carrier wave transmitted from the reader / writer, and the drive circuit in the IC chip operates.

RFID tags are expected to be used for various purposes such as distribution management, product management, and shoplifting prevention, and some IC cards such as transportation cards and product tags have begun to be introduced.

In order for RFID tags to be used in all products in the future, it is necessary to reduce the manufacturing cost, and it is being considered to use an inexpensive process using coating / printing technology in the manufacturing.

For example, as a transistor in a drive circuit in an IC chip, FETs using carbon nanotubes (CNTs) and organic semiconductors to which inkjet technology and screen printing technology can be applied are being actively studied.

By the way, the drive circuit in the IC chip includes a memory circuit for storing data, a rectifier circuit for generating a power supply voltage from an AC signal transmitted from a reader / writer, and a memory circuit for demodulating the AC signal. It is composed of at least a logic circuit that reads data. Above all, the logic circuit is generally composed of a complementary semiconductor device including a p-type FET and an n-type FET in order to suppress its power consumption.

However, it is known that FETs using CNTs (hereinafter referred to as CNT-FETs) usually exhibit the characteristics of p-type semiconductor devices in the atmosphere. Therefore, an n-type modified polymer is formed on the semiconductor layer containing the CNT, and a second insulating layer containing an electron-donating compound having at least one selected from a nitrogen atom and a phosphorus atom is formed. By doing so, it has been studied to convert the characteristics of the CNT-FET into an n-type semiconductor element (see, for example, Patent Documents 1 and 2).

International Publication No. 2009/139339 International Publication No. 2018/180146

However, the techniques described in Patent Documents 1 and 2 have a problem that the noise margin of the output signal with respect to the input signal is narrow when the complementary semiconductor device is assembled.

Therefore, the present invention focuses on the above problems and aims to provide a complementary semiconductor device having a wide noise margin.

In order to solve the above problems, the present invention has the following configurations.
That is, the present invention
A semiconductor device having a first semiconductor element and a second semiconductor element provided on a substrate having an insulating surface.
The first semiconductor element is an n-type semiconductor element.
With the source electrode
With the drain electrode
With the gate electrode
A first semiconductor layer in contact with the source electrode and the drain electrode,
A gate insulating layer that insulates the first semiconductor layer from the gate electrode,
Including
The second semiconductor element is
With the source electrode
With the drain electrode
With the gate electrode
A second semiconductor layer in contact with the source electrode and the drain electrode,
A gate insulating layer that insulates the second semiconductor layer from the gate electrode,
Including
Both the first semiconductor layer and the second semiconductor layer contain carbon nanotubes, and the first semiconductor layer and the second semiconductor layer both contain carbon nanotubes.
A value (Cn / Ln) obtained by dividing the total length (Cn) of the carbon nanotubes existing per ^{1 μm 2 of} the first semiconductor layer by the distance (Ln) between the source electrode and the drain electrode of the first semiconductor element. ^{) Is the value obtained by dividing the total length (Cp) of the carbon nanotubes existing per 1 μm 2 of} the second semiconductor layer by the distance (Lp) between the source electrode and the drain electrode of the second semiconductor element (). It is a semiconductor device characterized by being different from Cp / Lp).

Further, the semiconductor device of the present invention is
A semiconductor device having a first semiconductor element and a second semiconductor element provided on a substrate having an insulating surface.
The first semiconductor element is an n-type semiconductor element.
With the source electrode
With the drain electrode
With the gate electrode
A first semiconductor layer in contact with the source electrode and the drain electrode,
A gate insulating layer that insulates the first semiconductor layer from the gate electrode,
Including
The second semiconductor element is a p-type semiconductor element.
With the source electrode
With the drain electrode
With the gate electrode
A second semiconductor layer in contact with the source electrode and the drain electrode,
A gate insulating layer that insulates the second semiconductor layer from the gate electrode,
Including
Both the first semiconductor layer and the second semiconductor layer contain carbon nanotubes, and the first semiconductor layer and the second semiconductor layer both contain carbon nanotubes.
The total length of the carbon nanotubes present in the first semiconductor layer 1 [mu] m ² per (Cn) is, the total length of the carbon nanotubes present in the second semiconductor layer 1 [mu] m ² per different from (Cp), characterized in that It is a semiconductor device.

According to the present invention, it is possible to provide a complementary semiconductor device having a wide noise margin.

Schematic cross-sectional view showing the first semiconductor element in the semiconductor device according to the first embodiment of the present invention. Schematic cross-sectional view showing a second semiconductor element in the semiconductor device according to the first embodiment of the present invention. Schematic cross-sectional view showing the first semiconductor element in the semiconductor device according to the third embodiment of the present invention. Schematic diagram illustrating the function of the semiconductor device according to the embodiment of the present invention. The figure which showed an example of the transmission characteristic of the semiconductor device which concerns on embodiment of this invention. Schematic cross-sectional view showing the manufacturing process of the semiconductor device according to the embodiment of the present invention.

One embodiment of the semiconductor device according to the present invention has a first semiconductor element which is an n-type semiconductor element and a second semiconductor element which is a p-type semiconductor element, and the semiconductor layer of each semiconductor element is carbon. ^{The total length (Cn) of the carbon nanotubes containing nanotubes and existing per 1 μm 2} of the semiconductor layer of the first semiconductor element is the distance (Ln) between the source electrode and the drain electrode of the first semiconductor element. The value (Cn / Ln) divided by is ^{the total length (Cp) of the carbon nanotubes present per 1 μm 2} of the semiconductor layer of the second semiconductor element, which is the source electrode and drain electrode of the second semiconductor element. It is different from the value (Cp / Lp) divided by the distance (Lp) between them.

Further, one embodiment of the semiconductor device according to the present invention includes a first semiconductor element which is an n-type semiconductor element and a second semiconductor element which is a p-type semiconductor element, and the semiconductor layer of each semiconductor element is formed. both containing carbon nanotubes, the carbon the total length of the carbon nanotubes present in the semiconductor layer 1 [mu] m ² per the first semiconductor element (Cn) is present in the semiconductor layer 1 [mu] m ² per the second semiconductor device It is different from the total length (Cp) of the nanotube.

According to the configuration according to each of the above embodiments, it is possible to provide a complementary semiconductor device having a wide noise margin.

Hereinafter, preferred embodiments of the semiconductor device and the method for manufacturing the same according to the present invention will be described in detail. However, the present invention is not limited to the following embodiments, and can be variously modified and implemented according to an object and an application.

(Embodiment 1)
In the semiconductor device according to the first embodiment of the present invention, the first semiconductor element further comprises a second insulating layer in contact with the first semiconductor layer on the side opposite to the gate insulating layer with respect to the first semiconductor layer. Including, it is a semiconductor device.

<First semiconductor element>
The first semiconductor element is provided on a base material having an insulating surface, and includes a source electrode, a drain electrode, a gate electrode, a first semiconductor layer in contact with the source electrode and the drain electrode, and a first semiconductor element. The first semiconductor includes a gate insulating layer that insulates the semiconductor layer from the gate electrode, and a second insulating layer that is in contact with the first semiconductor layer on the side opposite to the gate insulating layer with respect to the first semiconductor layer. The layer contains carbon nanotubes.

FIG. 1 shows a schematic cross-sectional view showing an example of the first semiconductor element. The semiconductor element 1 is provided between a gate electrode 11 formed on a substrate 10, a gate insulating layer 12 covering the gate electrode 11, a source electrode 13 and a drain electrode 14 provided on the gate electrode 11, and the electrodes thereof. It has a first semiconductor layer 15 and a second insulating layer 16 covering the first semiconductor layer on the upper side of the first semiconductor layer 15. The first semiconductor layer 15 contains carbon nanotubes (hereinafter referred to as “CNT”).

In the structure of the first semiconductor element 1, the gate electrode 11 is arranged on the lower side (the substrate 10 side) of the first semiconductor layer 15, and the source electrode 13 and the drain electrode 14 are arranged on the lower surface of the first semiconductor layer 15. It is a so-called bottom gate / bottom contact structure. However, the structure of the first semiconductor element is not limited to this, for example, a so-called top gate structure in which the gate electrode 11 is arranged on the upper side (opposite side of the substrate 10) of the first semiconductor layer 15. It may have a so-called top contact structure in which the source electrode 13 and the drain electrode 14 are arranged on the upper surface of the first semiconductor layer 15.

(Base material with an insulating surface)
The base material having the insulating surface of the first semiconductor element may be any material as long as at least the surface on which the electrode system is arranged is insulating. For example, inorganic materials such as silicon wafers, glass, sapphire, alumina sintered body, polyimide, polyvinyl alcohol, polyvinyl chloride, polyethylene terephthalate, polyvinylidene fluoride, polysiloxane, polyvinylphenol (PVP), polyester, polycarbonate, polysulfone, polyether. Organic materials such as sulfone, polyethylene, polyphenylene sulfide, and polyparaxylene are preferably used. Further, a plurality of materials may be laminated, for example, one having a PVP film formed on a silicon wafer or one having a polysiloxane film formed on polyethylene terephthalate.

(Source electrode, drain electrode, gate electrode)
The material used for the source electrode, drain electrode, and gate electrode of the first semiconductor element may be any conductive material that can be generally used as an electrode. Examples of such a conductive material include conductive metal oxides such as tin oxide, indium oxide, and indium tin oxide (ITO). Also, among these, metals such as platinum, gold, silver, copper, iron, tin, zinc, aluminum, indium, chromium, lithium, sodium, potassium, cesium, calcium, magnesium, palladium, molybdenum, amorphous silicon and polysilicon. Examples thereof include alloys of a plurality of metals selected from the above, and inorganic conductive substances such as copper iodide and copper sulfide. Examples thereof include polythiophene, polypyrrole, polyaniline, a complex of polyethylene dioxythiophene and polystyrene sulfonic acid, and a conductive polymer whose conductivity has been improved by doping with iodine or the like. Further, a carbon material, a material containing an organic component and a conductor, and the like can be mentioned.

The material containing the organic component and the conductor increases the flexibility of the electrode, has good adhesion even when bent, and has good electrical connection. The organic component is not particularly limited, and examples thereof include a monomer, an oligomer or a polymer, a photopolymerization initiator, a plasticizer, a leveling agent, a surfactant, a silane coupling agent, a defoaming agent, and a pigment. From the viewpoint of improving the bending resistance of the electrode, an oligomer or a polymer is preferable. However, the conductive material of the electrode and the wiring is not limited to these. These conductive materials may be used alone, or a plurality of materials may be laminated or mixed.

As a method for forming the electrode, a known method such as that described in International Publication No. 2018/180146 can be used.

The distance 100 (Ln) between the source electrode and the drain electrode of the first semiconductor element is not particularly limited, but is preferably 1000 μm or less, more preferably 500 μm or less, still more preferably 100 μm or less. By setting the distance within this range, the characteristics of the semiconductor element are further improved. The distance between the electrodes can be measured with an optical microscope, a scanning electron microscope (SEM), or the like.

Further, a wiring for electrically connecting a plurality of first semiconductor elements may be formed. The material used for wiring may be any conductive material that can be generally used as an electrode. For example, the same as the above-mentioned electrode material can be mentioned.

The method for forming the wiring and the method for forming the wiring are not particularly limited as long as they can take conduction, and examples thereof include the same method as the above-mentioned electrode material.

(Gate insulation layer)
The material used for the gate insulating layer is not particularly limited, but is an inorganic material such as silicon oxide and alumina; organic highs such as polyimide, polyvinyl alcohol, polyvinyl chloride, polyethylene terephthalate, polyvinylidene fluoride, polysiloxane, and polyvinylphenol (PVP). Molecular materials; or mixtures of inorganic material powders and organic materials can be mentioned. Among the organic materials, those containing an organic compound containing a bond between silicon and carbon are preferable from the viewpoint of adhesion to a substrate or an electrode.

Examples of the organic compound containing a bond between silicon and carbon include polysiloxane. Polysiloxane is more preferable because it has high insulating properties and can be cured at low temperature.

The film thickness of the gate insulating layer of the first semiconductor element is preferably 0.05 to 5 μm, more preferably 0.1 to 1 μm. By setting the film thickness in this range, it becomes easy to form a uniform thin film. The film thickness can be measured by an atomic force microscope, an ellipsometry method, or the like.

The method for producing the gate insulating layer of the first semiconductor element is not particularly limited, but for example, a coating film obtained by applying a composition containing a material for forming the gate insulating layer to a substrate and drying it is required. A method of heat treatment may be mentioned. Examples of the coating method include known coating methods such as spin coating method, blade coating method, slit die coating method, screen printing method, bar coater method, mold method, printing transfer method, immersion pulling method, and inkjet method. The temperature of the heat treatment of the coating film is preferably in the range of 100 to 300 ° C.

The gate insulating layer may be a single layer or a plurality of layers. Further, one layer may be formed from a plurality of insulating materials, or a plurality of insulating materials may be laminated to form a plurality of gate insulating layers.

(First semiconductor layer)
The first semiconductor layer contains CNT. The CNTs are a single-walled CNT in which one carbon film (graphene sheet) is wound in a cylindrical shape, a two-walled CNT in which two graphene sheets are wound concentrically, and a plurality of graphene sheets are concentric. Any of the multi-walled CNTs wound around the CNTs may be used, but it is preferable to use single-walled CNTs in order to obtain high semiconductor characteristics. CNTs can be obtained by an arc discharge method, a chemical vapor deposition method (CVD method), a laser ablation method, or the like.

Further, it is more preferable that the CNT contains 80% by weight or more of the semiconductor type CNT. More preferably, it contains 95% by weight or more of semiconductor-type CNTs. As a method for obtaining CNTs of 80% by weight or more of the semiconductor type, a known method can be used. For example, a method of ultracentrifugating in the presence of a density gradient agent, a method of selectively adhering a specific compound to the surface of a semiconductor-type or metal-type CNT and separating using the difference in solubility, a difference in electrical properties. There is a method of separating by electrophoresis or the like using the above. Examples of the method for measuring the content rate of the semiconductor type CNT include a method of calculating from the absorption area ratio of the visible-near infrared absorption spectrum, a method of calculating from the intensity ratio of the Raman spectrum, and the like.

The length of one CNT is preferably shorter than the distance between the source electrode and the drain electrode (hereinafter, simply referred to as “distance between electrodes”). The average length of CNTs is preferably 2 μm or less, although it depends on the distance between the electrodes.

The average length of CNTs is the average value of the lengths of 20 randomly picked CNTs. Examples of the method for measuring the average length of CNTs include a method of randomly picking up 20 CNTs from images obtained by an atomic force microscope and obtaining an average value of their lengths.

Generally, commercially available CNTs have a distribution in length and may contain CNTs longer than the distance between electrodes. Therefore, it is preferable to add a step of making the length of CNTs shorter than the distance between electrodes. For example, a method of cutting the CNT into short fibers by acid treatment with nitric acid, sulfuric acid or the like, ultrasonic treatment, freeze pulverization method or the like is effective. Further, it is more preferable to use the separation by a filter together in terms of improving the purity of CNTs.

The diameter of the CNT is not particularly limited, but is preferably 1 nm or more and 100 nm or less, and more preferably 50 nm or less. More preferably, it is 5 nm or less.

Further, as the CNT, it is preferable to use a CNT composite in which a conjugated polymer is attached to at least a part of the surface of the CNT. A conjugated polymer refers to a compound having a conjugated structure as a repeating unit and having a degree of polymerization of 2 or more.

The state in which the conjugated polymer is attached to at least a part of the surface of the CNT means a state in which a part or the whole of the surface of the CNT is covered with the conjugated polymer. It is presumed that the conjugated polymer can coat CNTs because the interaction occurs due to the overlap of the π-electron clouds derived from the conjugated structures of both. Whether or not the CNTs are coated with the conjugated polymer can be determined by the color of the coated CNTs approaching the color of the conjugated polymer from the color of the uncoated CNTs. Quantitatively, elemental analysis such as X-ray photoelectron spectroscopy (XPS) can identify the presence of deposits and the weight ratio of deposits to CNTs.

By adhering the conjugated polymer to at least a part of the surface of the CNT, the CNT can be uniformly dispersed in the solution without impairing the high electrical properties of the CNT. In addition, it becomes possible to form a uniformly dispersed CNT film from a solution in which CNTs are uniformly dispersed by a coating method. Thereby, high semiconductor characteristics can be realized.

The method of adhering the conjugated polymer to CNT is (I) a method of adding CNT to the molten conjugated polymer and mixing it, and (II) dissolving the conjugated polymer in a solvent and CNT in this. (III) Pre-dispersed in a solvent with a conjugated polymer by ultrasonic waves or the like, and then added and mixed a conjugated polymer there, (IV) With a conjugated polymer in a solvent. Examples thereof include a method in which CNT is added and the mixing system is irradiated with ultrasonic waves to mix. In the present invention, any method may be used, and a plurality of methods may be combined.

Examples of the conjugated polymer include polythiophene-based polymers, polypyrrole-based polymers, polyaniline-based polymers, polyacetylene-based polymers, poly-p-phenylene-based polymers, and poly-p-phenylene vinylene-based polymers. , Not particularly limited. As the above polymer, one in which a single monomer unit is lined up is preferably used, but one in which different monomer units are block-copolymerized or one in which different monomer units are randomly copolymerized is also used. Further, a graft-polymerized product can also be used.

Among the above polymers, in the present invention, a polythiophene-based polymer that easily adheres to CNTs and easily forms CNT complexes is preferably used. It is more preferable that the condensed heteroaryl unit and the thiophene unit having a nitrogen-containing double bond in the ring are contained in the repeating unit.

As the condensed heteroaryl unit having a nitrogen-containing double bond in the ring, a benzothiadiazole unit or a quinoxaline unit is particularly preferable. By having these units, the adhesion between the CNT and the conjugated polymer is increased, and the CNT can be more well dispersed in the semiconductor layer.

The semiconductor layer may further contain an organic semiconductor or an insulating material as long as it does not impair the electrical characteristics. The film thickness of the semiconductor layer is preferably 1 nm or more and 100 nm or less. Within this range, uniform thin film formation becomes easy. It is more preferably 1 nm or more and 50 nm or less, and further preferably 1 nm or more and 20 nm or less. The film thickness can be measured by an atomic force microscope.

As a method for forming the semiconductor layer, a dry method such as resistance heating vapor deposition, electron beam, sputtering, or CVD can be used, but it is preferable to use a coating method from the viewpoint of manufacturing cost and compatibility with a large area. .. Specifically, a spin coating method, a blade coating method, a slit die coating method, a screen printing method, a bar coater method, a mold method, a printing transfer method, a dipping pulling method, an inkjet method and the like can be preferably used to control the coating film thickness. The coating method can be selected according to the coating film characteristics to be obtained, such as or orientation control. Further, the formed coating film may be subjected to an annealing treatment in the atmosphere, under reduced pressure, or in an atmosphere of an inert gas such as nitrogen or argon.

(Second insulating layer)
The second insulating layer is formed on the side opposite to the semiconductor layer on which the gate insulating layer is formed. The side opposite to the side on which the gate insulating layer is formed with respect to the semiconductor layer refers to, for example, the upper side of the semiconductor layer when the gate insulating layer is provided on the lower side of the semiconductor layer. By forming the second insulating layer, CNT-FETs that normally exhibit p-type semiconductor characteristics can be converted into semiconductor elements that exhibit n-type semiconductor characteristics.

The second insulating layer preferably contains an organic compound containing a bond between a carbon atom and a nitrogen atom. Such an organic compound may be any organic compound, and examples thereof include amide compounds, imide compounds, urea compounds, amine compounds, imine compounds, aniline compounds, and nitrile compounds. Among them, the second insulating layer has a structure in which at least one group represented by the general formula (1) and the general formula (2) is bonded to (a) one carbon-carbon double bond or one conjugated system. It is preferable to contain a compound having (b) and (b) a polymer.

The compound (a) has one carbon-carbon double bond or one conjugated system having at least one group represented by the general formula (1) and the general formula (2) bonded thereto. The electron density of one carbon-carbon double bond or the π orbital of one conjugated system increases. Furthermore, since structures such as one carbon-carbon double bond or one conjugate system are likely to engage in π-π interaction and charge transfer interaction with CNTs, (a) compounds strongly and electronically interact with CNTs. It is presumed that CNT-FETs, which normally exhibit p-type semiconductor characteristics, can be converted into semiconductor devices exhibiting stable n-type semiconductor characteristics.

Further, since it is considered that the second insulating layer can keep the field where the compound and the CNT interact with each other stably by containing the polymer (b), more stable n-type semiconductor characteristics can be obtained. It is estimated to be.

In the general formulas (1) and (2), R ¹ represents a structure selected from a hydrogen atom, an alkyl group and a cycloalkyl group. R ^{2 to} R ⁴ each independently represent a structure selected from a hydrogen atom, an alkyl group, a cycloalkyl group, an alkenyl group, a cycloalkenyl group, an alkynyl group, an aryl group and a heteroaryl group. Further, a ring structure may be formed by any two of ^{R 1 to} R ^4. When two or more groups represented by the general formula (1) or the general formula (2) are included, R ^{1 to} R ⁴ may be the same or different from each other.

The alkyl group indicates a saturated aliphatic hydrocarbon group such as a methyl group, an ethyl group, an n-propyl group, an isopropyl group, an n-butyl group, a sec-butyl group and a tert-butyl group, and has a substituent. You may or may not have it. The number of carbon atoms of the alkyl group is not particularly limited, but is preferably 1 or more and 20 or less, and more preferably 1 or more and 8 or less, from the viewpoint of availability and cost.

The cycloalkyl group refers to a saturated alicyclic hydrocarbon group such as a cyclopropyl group, a cyclohexyl group, a norbornyl group, or an adamantyl group. The cycloalkyl group may or may not have a substituent. The number of carbon atoms of the cycloalkyl group is not particularly limited, but is preferably in the range of 3 or more and 20 or less.

The alkenyl group refers to an unsaturated aliphatic hydrocarbon group containing a double bond such as a vinyl group, an allyl group, or a butadienyl group, which may or may not have a substituent. The carbon number of the alkenyl group is not particularly limited, but is preferably in the range of 2 or more and 20 or less.

The cycloalkenyl group refers to an unsaturated alicyclic hydrocarbon group containing a double bond, such as a cyclopentenyl group, a cyclopentadienyl group, and a cyclohexenyl group. The cycloalkenyl group may or may not have a substituent. The number of carbon atoms of the cycloalkenyl group is not particularly limited, but is preferably in the range of 3 or more and 20 or less.

The alkynyl group refers to an unsaturated aliphatic hydrocarbon group containing a triple bond, such as an ethynyl group. The alkynyl group may or may not have a substituent. The carbon number of the alkynyl group is not particularly limited, but is preferably in the range of 2 or more and 20 or less.

The aryl group indicates, for example, an aromatic hydrocarbon group such as a phenyl group, a naphthyl group, a biphenyl group, an anthrasenyl group, a phenanthryl group, a terphenyl group, and a pyrenyl group. The aryl group may or may not have a substituent. The number of carbon atoms of the aryl group is not particularly limited, but is preferably in the range of 6 or more and 40 or less.

The heteroaryl group refers to an aromatic group having one or more atoms other than carbon in the ring, such as a furanyl group, a thiophenyl group, a benzofuranyl group, a dibenzofuranyl group, a pyridyl group, and a quinolinyl group. The heteroaryl group may or may not have a substituent. The number of carbon atoms of the heteroaryl group is not particularly limited, but is preferably in the range of 2 or more and 30 or less.

When a ring structure is formed by any two of ^{R 1 to} R ^{4 , for example, R 1} and R ² or R ¹ and R ³ are bonded to each other to form a conjugated or non-conjugated ring structure. Is the case of forming. As a constituent element of the ring structure, each atom of nitrogen, oxygen, sulfur, phosphorus and silicon may be contained in addition to the carbon atom. Further, the ring structure may be a structure condensed with another ring.

A conjugated system is a system in which two or more multiple bonds are conjugated, and the π electrons of the multiple bonds interact with each other through a single bond and are delocalized. For example, a double bond and / or a triple bond is a structure in which a single bond or an unshared electron pair or an atom having an empty p-orbital is connected, and specific examples thereof include the general formulas (3) to (5). Shown.

Further, examples in which at least one or more groups represented by the general formulas (1) and (2) are bonded to one conjugated system are represented by, for example, the general formulas (6) to (9). It is a compound to be used. The structure corresponding to one conjugated system is covered with a dotted line.

Examples of the compound (a) include tetrakis (dimethylamino) ethylene, 4-((2-dimethylamino) vinyl) -N, N-dimethylaniline, 1,2-phenylenediamine, 1,4-phenylenediamine, and 2 , 3,5,6-Tetramethyl-1,4-phenylenediamine, N, N-dimethyl-1,4-phenylenediamine, N, N-dimethyl-N', N'-diphenyl-1,4-phenylenediamine , N, N, N'-trimethyl-N'-phenyl-1,4-phenylenediamine, N, N, N'-trimethyl-1,4-phenylenediamine, N, N, N', N'-tetramethyl -1,4-phenylenediamine, N, N-bis (methoxymethyl) -N', N'-dimethyl-1,4-phenylenediamine, 5,10-dihydro-5,10-dimethylphenazine, benzidine, 3, 3', 5,5'-tetramethylbenzidine, N, N, N', N'-tetramethylbenzidine, 4- (pyrrolidin-1-yl) aniline, 4- (4-methylpiperidin-1-yl) aniline , 2,4-Dipiperidin-1-yl-phenylamine, tris [4- (diethylamino) phenyl] amine, N, N, N', N'-tetrakis [4- (diisobutylamino) phenyl] -1,4- Examples thereof include phenylenediamine, 1,5-diaminonaphthalene and 1,8-diaminonaphthalene. The compound may be used alone or in combination of two or more.

As a method for analyzing the compound (a) and the polymer (b) in the second insulating layer, a sample obtained by extracting the composition of the second insulating layer from the semiconductor element is subjected to nuclear magnetic resonance (NMR) or the like. Examples thereof include a method of analyzing and a method of analyzing the second insulating layer by XPS or the like.

The film thickness of the second insulating layer is preferably 500 nm or more, more preferably 1.0 μm or more, further preferably 3.0 μm or more, and particularly preferably 10 μm or more. By setting the film thickness in this range, the stability of the characteristics of the semiconductor element is further improved. The upper limit is not particularly limited, but is preferably 500 μm or less.

The film thickness of the second insulating layer was measured by measuring the cross section of the second insulating layer with a scanning electron microscope, and was randomly selected from the second insulating layer portion located on the semiconductor layer from the obtained images. Calculate the film thickness at 10 points and use it as the arithmetic average value.

The second insulating layer may contain other compounds in addition to the (a) compound and the (b) polymer. Examples of other compounds include thickeners and thixogens for adjusting the viscosity and rheology of the solution when the second insulating layer is formed by coating.

Further, the second insulating layer may be a single layer or a plurality of layers. In the case of a plurality of layers, at least one layer may contain the compound (a) and the polymer (b) as long as the layer containing the compound (a) is in contact with the semiconductor layer, or (a). ) Compound and (b) polymer may be contained in separate layers. For example, there is a configuration in which a first layer containing (a) a compound is formed on a semiconductor layer, and a second layer containing (b) a polymer is formed on the first layer.

The method for forming the second insulating layer is not particularly limited, and a dry method such as resistance heating vapor deposition, electron beam, sputtering, or CVD can be used, but from the viewpoint of manufacturing cost and compatibility with a large area. It is preferable to use a coating method. Specifically, as the coating method, a spin coating method, a blade coating method, a slit die coating method, a screen printing method, a bar coater method, a mold method, a printing transfer method, a dipping pulling method, an inkjet method, a drop casting method and the like are preferably used. be able to. The coating method can be selected according to the coating film characteristics to be obtained, such as coating film thickness control and orientation control.

(Protective layer)
The first semiconductor element may further have a protective layer on the second insulating layer. The role of the protective layer is to protect the semiconductor element from physical damage such as rubbing and moisture and oxygen in the atmosphere.

Examples of the protective layer material include inorganic materials such as silicon wafers, glass, sapphire, and alumina sintered bodies, polyimide, polyvinyl alcohol, polyvinyl chloride, polyethylene terephthalate, polyvinylidene fluoride, polysiloxane, polyvinylphenol, polyester, and polycarbonate. Examples thereof include organic materials such as polysulfone, polyethersulfone, polyethylene, polyphenylene sulfide, polyparaxylene, polyacrylonitrile, and cycloolefin polymer. Further, for example, a plurality of materials may be laminated, such as one having a polyvinylphenol film formed on a silicon wafer and one having an aluminum oxide film formed on polyethylene terephthalate.

In a semiconductor element, the current flowing between the source electrode and the drain electrode (source-drain current) can be controlled by changing the gate voltage. Then, the mobility μ (cm ² / V · s) of the semiconductor element can be calculated by using the following formula.

μ = (δId / δVg) L ・ D / (W ・ εr ・ ε ・ Vsd)
However, Id is the source-drain current (A), Vsd is the source-drain voltage (V), Vg is the gate voltage (V), D is the thickness of the gate insulating layer (m), and L is the channel length (m). W is the channel width (m), εr is the relative permittivity of the gate insulating layer (F / m), ε is the permittivity of the vacuum (8.85 × ^10-12 F / m), and δ is the amount of change in the corresponding physical quantity. Is shown.

Further, the threshold voltage of the semiconductor element can be obtained from the intersection of the extension line of the linear portion and the Vg axis in the Id-Vg graph.

A semiconductor device having a small absolute value of the threshold voltage and high mobility is a semiconductor device having high functionality and good characteristics.

<Second semiconductor element>
The second semiconductor element is provided on a substrate having an insulating surface, and includes a source electrode, a drain electrode, a gate electrode, a second semiconductor layer in contact with the source electrode and the drain electrode, and a second semiconductor layer. A gate insulating layer that insulates the semiconductor layer from the gate electrode is provided, and the second semiconductor layer contains CNT.

FIG. 2 shows a schematic cross-sectional view showing an example of the second semiconductor element. The semiconductor element 2 is provided between the gate electrode 21 formed on the substrate 20, the gate insulating layer 22 covering the gate electrode 21, the source electrode 23 and the drain electrode 24 provided on the gate electrode 21, and the electrodes thereof. It has a second semiconductor layer 25. The second semiconductor layer 25 contains CNT.

The structure of the second semiconductor element 2 is a bottom gate / bottom contact structure similar to the semiconductor element 1 shown in FIG. However, the structure of the second semiconductor element 2 is not limited to this, and may be a top gate structure or a top contact structure.

(Base material with an insulating surface)
Examples of the base material having the insulating surface of the second semiconductor element include the same base material having the insulating surface of the first semiconductor element described above.

From the viewpoint of manufacturing cost and process simplicity, the above-mentioned first semiconductor element and second semiconductor element are not formed on separate substrates, but are formed on substrates having the same insulating surface. It is preferable to do so.

(Source electrode, drain electrode, gate electrode)
Examples of the material used for the source electrode, drain electrode, and gate electrode of the second semiconductor element include the same materials as those used for the electrode of the first semiconductor element described above.

From the viewpoint of manufacturing cost, the electrode of the second semiconductor element is preferably formed of the same material as the electrode of the first semiconductor element described above, rather than being formed of a separate material. The fact that each electrode is formed of the same material means that the element having the highest molar content among the elements contained in each electrode is the same. The types and content ratios of the elements in the electrodes can be identified by elemental analysis such as X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectrometry (SIMS).

Further, the electrode of the second semiconductor element is preferably formed in the same process as each electrode of the above-mentioned semiconductor element from the viewpoint of process simplicity.

The distance 200 (Ln) between the source electrode and the drain electrode of the second semiconductor element is not particularly limited, but is preferably 1000 μm or less, more preferably 500 μm or less, still more preferably 100 μm or less. By setting the distance within this range, the characteristics of the semiconductor element are further improved. The distance between the electrodes can be measured with an optical microscope, a scanning electron microscope (SEM), or the like.

Further, wiring may be formed between a plurality of second semiconductor elements or electrically connecting the first semiconductor element and the second semiconductor element. The material used for wiring may be any conductive material that can be generally used as an electrode. For example, the same wiring as the wiring for electrically connecting the first semiconductor elements described above can be mentioned.

(Gate insulation layer)
The material used for the gate insulating layer of the second semiconductor element is not particularly limited, and examples thereof include the same materials as the gate insulating layer of the first semiconductor element described above.

From the viewpoint of manufacturing cost, the gate insulating layer of the second semiconductor element may be formed of the same material as the gate insulating layer of the first semiconductor element described above, instead of being formed of different materials. preferable. When these gate insulating layers are made of the same material, it means that the types and composition ratios of the elements contained in 1 mol% or more in the composition constituting each gate insulating layer are the same. Whether or not the types and composition ratios of the elements are the same can be identified by elemental analysis such as X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectrometry (SIMS).

Further, the gate insulating layer of the second semiconductor element is preferably formed in the same process as the gate insulating layer of the first semiconductor element described above from the viewpoint of process simplicity.

(Second semiconductor layer)
The second semiconductor layer contains CNT. The CNTs are the same as those of the first semiconductor layer described above.

From the viewpoint of manufacturing cost, the second semiconductor layer is preferably formed of the same material as the first semiconductor layer described above, rather than being formed of a different material. Further, the second semiconductor layer is preferably formed in the same process as the above-mentioned first semiconductor layer from the viewpoint of process simplicity.

In the semiconductor device according to the first embodiment, the total length (Cn) of CNTs existing per ^{1 μm 2 of} the first semiconductor layer is the total length (Cp) of CNTs existing per ^{1 μm 2 of the second semiconductor layer.} Is different. As a result, the electrical characteristics such as the on-current, off-current, and threshold voltage of the first semiconductor element and the second semiconductor element become the same, so that the semiconductor device has a wide noise margin.

Among them, the total length of the CNT present in the second semiconductor layer 1 [mu] m ² per (Cp) is preferably shorter than the total length of the CNT present in the first semiconductor layer 1 [mu] m ² per (Cn). This is preferable because the electrical characteristics of the first semiconductor element and the second semiconductor element become more equal. It is presumed that this is due to the following reasons. Normally, as can be seen from the fact that CNT-TFT exhibits p-type semiconductor characteristics, in CNT, the mobility of holes, which are carriers responsible for the electrical conductivity of p-type semiconductors, is higher than that of n-type semiconductors. It is larger than the mobility of electrons, which are carriers responsible for electrical conductivity. Therefore, in order to make the electrical characteristics of the p-type semiconductor element and the n-type semiconductor element equivalent, it is preferable that the carrier density of the n-type semiconductor element is denser than the carrier density of the p-type semiconductor element. Further, in order to make the electrical characteristics of the p-type semiconductor element and the n-type semiconductor element equivalent, the distance between the source electrode and the drain electrode of the n-type semiconductor element should be set to the source electrode and the drain electrode of the p-type semiconductor element. It is also preferable to make it shorter than the distance between the two.

More preferably, the total length of the CNT present in the second semiconductor layer 1 [mu] m ² per (Cp) is 0.2 times or more the total length of the CNT present in the first semiconductor layer 1 [mu] m ² per (Cn) 0. It is 8 times or less. The above numerical range is a range obtained by rounding off the last digit of significant figures of the limit value. That is, 0.8 times or less means 0.84 times or less, and 0.2 times or more means 0.15 times or more. Within this range, the mobility of the first semiconductor element and the second semiconductor element becomes high, the electrical characteristics become more equal, and the noise margin becomes wider.

The total length of the CNT present in the semiconductor layer 1 [mu] m ² per refers to the sum of the length of the CNT present in 1 [mu] m in ² randomly extracted in the semiconductor layer. ^{As a method for measuring the total length of CNTs, 1 μm 2} was randomly selected from the images of the semiconductor layer of the semiconductor element obtained by an atomic force microscope, and the lengths of all CNTs contained in the region were measured. There is a method of totaling. The total length of the CNTs is a value obtained by rounding off a number less than 1 μm. That is, the total length of CNTs of 1 μm is 0.5 μm or more and 1.4 μm or less.

The distance between the source electrode and the drain electrode of the semiconductor element means the shortest distance between the source electrode and the drain electrode. Examples of the method for measuring the distance between the source electrode and the drain electrode include a method for measuring the shortest distance between the source electrode and the drain electrode from an image of a semiconductor element obtained by an optical microscope, a scanning electron microscope (SEM), or the like. ..

(Third insulating layer)
The second semiconductor element may further form a third insulating layer on the side opposite to the side on which the gate insulating layer is formed with respect to the second semiconductor layer. The side opposite to the side on which the gate insulating layer is formed with respect to the second semiconductor layer refers to, for example, the upper side of the semiconductor layer when the gate insulating layer is provided below the second semiconductor layer. By further forming the third insulating layer of the present invention, the second semiconductor layer can be protected from the external environment such as oxygen and moisture and physical impact. Further, by forming the third insulating layer, the characteristics of the second semiconductor element can be adjusted.

By forming the third insulating layer, the CNT-FET that normally exhibits p-type semiconductor characteristics is not converted into a semiconductor element that exhibits n-type semiconductor characteristics. In this respect, the third insulating layer is different from the second insulating layer included in the first semiconductor element.

The difference between the third insulating layer and the second insulating layer means that the types and composition ratios of the elements contained in the third insulating layer and the composition constituting the second insulating layer in an amount of 1 mol% or more are different. .. The types and content ratios of the elements in the third insulating layer and the second insulating layer are determined by X-ray photoelectrons of a sample obtained by extracting the composition of the third insulating layer and the second insulating layer from the semiconductor element. It can be identified by elemental analysis such as spectroscopy (XPS) or secondary ion mass spectrometry (SIMS).

The material used for the third insulating layer is not particularly limited, but specifically, an inorganic material such as silicon oxide or alumina; polyimide or its derivative, polyvinyl alcohol, polyvinyl chloride, polyethylene terephthalate, polyvinylidene fluoride, polysiloxane, or the like. Examples thereof include organic polymer materials such as derivatives thereof, polyvinylphenol and derivatives thereof; or a mixture of an inorganic material powder and an organic polymer material, or a mixture of an organic low molecular weight material and an organic polymer material. Among these, it is preferable to use an organic polymer material that can be produced by a coating method. In particular, organic polymer materials selected from the group consisting of polyfluoroethylene, polynorbornene, polysiloxane, polyimide, polystyrene, polycarbonate and derivatives thereof, polyacrylic acid derivatives, polymethacrylic acid derivatives, and copolymers containing these. It is preferable to use it from the viewpoint of uniformity of the insulating layer. By using an organic polymer material selected from the group consisting of polysiloxane, polystyrene, polyvinylphenol and polymethylmethacrylate, it is possible to protect the second semiconductor layer without deteriorating the electrical characteristics of the second semiconductor element. Therefore, it is particularly preferable.

The film thickness of the third insulating layer is preferably 50 nm to 10 μm, more preferably 100 nm to 3 μm. The third insulating layer may be a single layer or a plurality of layers. Further, one layer may be formed from a plurality of insulating materials, or a plurality of insulating materials may be laminated and formed.

The method for forming the third insulating layer is not particularly limited, and a dry method such as resistance heating vapor deposition, electron beam, sputtering, or CVD can be used, but from the viewpoint of manufacturing cost and compatibility with a large area. It is preferable to use a coating method. Specifically, as the coating method, a spin coating method, a blade coating method, a slit die coating method, a screen printing method, a bar coater method, a mold method, a printing transfer method, a dipping pulling method, an inkjet method, a drop casting method and the like are preferably used. be able to. The coating method can be selected according to the coating film characteristics to be obtained, such as coating film thickness control and orientation control.

(Embodiment 2)
In the semiconductor device according to the second embodiment of the present invention, in the semiconductor device according to the first embodiment, the total length (Cn) of carbon nanotubes existing per ^{1 μm 2 of the first semiconductor layer is the second semiconductor layer.} the total length of the carbon nanotubes present per 1 [mu] m ² differs from the (Cp), in place of the feature that the source of the total length of the carbon nanotubes present in the first semiconductor layer 1 [mu] m ² per the (Cn) first semiconductor element The value (Cn / Ln) divided by the distance (Ln) between the electrode and the drain electrode is the total length (Cp) of carbon nanotubes existing per ^{1 μm 2 of the second semiconductor layer as the source of the second semiconductor element.} It has a feature that it is different from the value (Cp / Lp) divided by the distance (Lp) between the electrode and the drain electrode. Further, except for that point, the configuration is the same as that of the semiconductor device according to the first embodiment.

Since the semiconductor device according to the second embodiment has the above characteristics, the electrical characteristics of the first semiconductor element and the second semiconductor element, such as on-current, off-current, and threshold voltage, are the same. Therefore, the semiconductor device has a wide noise margin.

Above all, ^{a value (Cp / Lp) obtained by dividing the total length (Cp) of CNTs existing per 1 μm 2 of} the second semiconductor element by the distance (Lp) between the source electrode and the drain electrode of the second semiconductor element. Is the value (Cn / Ln) obtained by dividing the total length (Cn) of CNTs existing per 1 μm ² of the first semiconductor element by the distance (Ln) between the source electrode and the drain electrode of the first semiconductor element. Small is preferable. This is preferable because the electrical characteristics of the first semiconductor element and the second semiconductor element become more equal. It is presumed that this is due to the following reasons. Normally, as can be seen from the fact that CNT-TFT exhibits p-type semiconductor characteristics, in CNT, the mobility of holes, which are carriers responsible for the electrical conductivity of p-type semiconductors, is higher than that of n-type semiconductors. It is larger than the mobility of electrons, which are carriers responsible for electrical conductivity. Therefore, in order to make the electrical characteristics of the p-type semiconductor element and the n-type semiconductor element equivalent, it is preferable that the carrier density of the n-type semiconductor element is denser than the carrier density of the p-type semiconductor element. Further, in order to make the electrical characteristics of the p-type semiconductor element and the n-type semiconductor element equivalent, the distance between the source electrode and the drain electrode of the n-type semiconductor element should be set to the source electrode and the drain electrode of the p-type semiconductor element. It is also preferable to make it shorter than the distance between the two.

More preferably, the ^{total length (Cp) of CNTs present per 1 μm 2 of} the second semiconductor layer is divided by the distance (Lp) between the source electrode and the drain electrode of the second semiconductor element (Cp / Lp). ) Is ^{the value (Cn / Ln) obtained by dividing the total length (Cn) of CNTs existing per 1 μm 2} of the first semiconductor element by the distance (Ln) between the source electrode and the drain electrode of the first semiconductor element. 0.2 times or more and 0.8 times or less. The above numerical range is a range obtained by rounding off the last digit of significant figures of the limit value. That is, 0.8 times or less means 0.84 times or less, and 0.2 times or more means 0.15 times or more. Within this range, the mobility of the first semiconductor element and the second semiconductor element becomes high, the electrical characteristics become more equal, and the noise margin becomes wider.

The semiconductor device according to the second embodiment, further, the total length of the carbon nanotubes present in the first semiconductor layer 1 [mu] m ² per (Cn) is, the carbon nanotubes present in the second semiconductor layer 1 [mu] m ² per It may have a feature that it is different from the total length (Cp). Also, chromatic total length of the carbon nanotubes present in the second semiconductor layer 1 [mu] m ² per (Cp) is shorter than the total length of the carbon nanotubes present in the first semiconductor layer 1 [mu] m ² per (Cn), characterized in that It doesn't matter if you do. Further, the total length of the carbon nanotubes present in the second semiconductor layer 1 [mu] m ² per (Cp) is the total length of the carbon nanotubes present in the first semiconductor layer 1 [mu] m ² per (Cn) 0.2 times or more of It may have a feature that it is 0.8 times or less.

(Embodiment 3)
The semiconductor device according to the third embodiment of the present invention is a semiconductor device in which the first semiconductor layer in the first semiconductor element further contains an n-type modifier.

FIG. 3 shows a schematic cross-sectional view showing an example of the first semiconductor element in the semiconductor device according to the third embodiment of the present invention. The semiconductor element 3 is provided between the gate electrode 31 formed on the substrate 30, the gate insulating layer 32 covering the gate electrode 31, the source electrode 33 and the drain electrode 34 provided on the gate electrode 31, and the electrodes thereof. It has a first semiconductor layer 35. The first semiconductor layer 35 contains CNT and an n-type modifier.

<N-type modifier>
The n-type modifier is a material for converting a CNT-FET, which normally exhibits p-type semiconductor characteristics, into a semiconductor element that exhibits n-type semiconductor characteristics. When the first semiconductor layer contains CNT and an n-type modifier, the first semiconductor element becomes an n-type semiconductor element.

Examples of the method of incorporating the n-type modifier in the first semiconductor layer include a method of doping, adsorbing, and coating the CNT in the first semiconductor layer with the n-type modifier. Be done.

The n-type modifier is not particularly limited as long as it can convert a CNT-FET into a semiconductor element exhibiting n-type semiconductor characteristics, but provides electrons to an alkali metal such as potassium or a CNT such as phosphorus. Examples thereof include substances containing an electron donor atom, substances having a functional group serving as an electron donating group such as amines, alkyl halides, and alcohols.

In the semiconductor device according to the second embodiment, the first semiconductor element does not include the second insulating layer as an essential component, and instead, the first semiconductor layer contains the n-type modifier. Except for this, the configuration, manufacturing method, and the like are the same as those in the first embodiment.

Also in the semiconductor device according to the third embodiment, the total length (Cn) of CNTs existing per ^{1 μm 2 of} the first semiconductor layer is the total length (Cp) of CNTs existing per ^{1 μm 2 of the second semiconductor layer.} Is different. ^{Alternatively, the total length (Cn) of the carbon nanotubes existing per 1 μm 2 of} the first semiconductor layer divided by the distance (Ln) between the source electrode and the drain electrode of the first semiconductor element (Cn / Ln). ) Is ^{the value (Cp /) obtained by dividing the total length (Cp) of the carbon nanotubes existing per 1 μm 2} of the second semiconductor element by the distance (Lp) between the source electrode and the drain electrode of the second semiconductor element. It is different from Lp). As a result, the electrical characteristics such as the on-current, off-current, and threshold voltage of the first semiconductor element and the second semiconductor element become the same, so that the semiconductor device has a wide noise margin.

<Semiconductor device>
The semiconductor device of the present invention includes both a first semiconductor element and a second semiconductor element. An example of the semiconductor device according to the embodiment of the present invention is shown in FIG. 4A. Here, the first semiconductor element 41 is an n-type semiconductor element, and the second semiconductor element 42 is a p-type semiconductor element. The operation of the semiconductor device shown in FIG. 3A is shown below.

First, the input signal (V _in ) changes between low “L” (ground potential GND) and high “H” ( _VDD). When the input signal is “L”, the p-type semiconductor element conducts and the n-type semiconductor element is cut off, so that the output signal (V _out ) becomes “H”. On the contrary, when the input signal is "H", the n-type semiconductor element 41 conducts and the p-type semiconductor element 42 is cut off, so that the output signal becomes "L". An example of the transmission characteristics of this semiconductor device is shown in FIG. 4B.

For example, if the threshold voltage of the n-type semiconductor element and the threshold voltage of the p-type semiconductor element are different, the timing of conduction and interruption between the n-type semiconductor element and the p-type semiconductor element will be different, and the input signal will be affected. , The output signal may not be inverted and may not operate normally. Therefore, since the electrical characteristics of the n-type semiconductor element and the p-type semiconductor element are the same, the semiconductor device has good characteristics. For example, when the electrical characteristics of the n-type semiconductor element and the p-type semiconductor element are the same, the input signal whose output signal changes (V in FIG. 3B: the input signal whose output signal is _VDD / 2) is V. _It becomes DD / 2, and it becomes a high-performance semiconductor device with a wide noise margin. Further, in the curve (transmission characteristic curve) showing the output signal with respect to the input signal shown in FIG. 4B, the slope (gain) of the tangent line at Vin = V correlates with the mobility of each semiconductor element, and the semiconductor device having a large gain. Is high performance. In addition to the above-mentioned threshold voltage, the electrical characteristics include, for example, on-current, off-current, mobility, and the like.

(Applicability of semiconductor devices)
The semiconductor device according to the embodiment of the present invention includes ICs of various electronic devices, wireless communication devices such as RFID tags, wireless power supply devices, TFT arrays for displays such as active matrix-driven liquid crystal displays and electronic paper, sensors, and open detection. It can be applied to systems, etc.

<Manufacturing method of semiconductor devices>
In the method for manufacturing a semiconductor device according to the embodiment of the present invention, a semiconductor layer is applied and dried in a region between a source electrode and a drain electrode in a first semiconductor element and a second semiconductor element. It is preferable to include at least the step. Further, in this manufacturing method, the method for forming the electrodes, the gate insulating layer, the semiconductor layer, the second insulating layer, and the third insulating layer constituting the first semiconductor element and the second semiconductor element to be manufactured is as described above. Is. By appropriately selecting the order of these forming methods, the semiconductor device according to the present invention can be manufactured.

From the viewpoint of manufacturing cost and process simplicity, it is preferable to form the first semiconductor element and the second semiconductor element at the same time instead of forming them separately. Therefore, it is preferable that they have the same structure. In particular, it is preferable to form the first semiconductor layer and the second semiconductor layer by coating and drying in the same step.

Here, forming at the same time means forming two electrodes or layers together by performing the process necessary for forming the electrodes or layers once. Further, coating and drying in the same step means forming those layers by performing the coating and drying steps for forming the target layer once.

All of these steps can be applied even when the structures of the first semiconductor element and the second semiconductor element are different, but the application is easier when they have the same structure.

Hereinafter, an example of a method for manufacturing a semiconductor device according to the embodiment of the present invention will be specifically described. First, as shown in FIG. 5A, a gate electrode 510 is formed in the first semiconductor element region 500 on the substrate 50, and a gate electrode 511 is formed in the second semiconductor element region 501 by the method described above.

Next, as shown in FIG. 5B, the gate insulating layers 520 and 521 of the first semiconductor element 500 and the second semiconductor element 501 are formed.

Next, as shown in FIG. 5C, the source electrodes 540 and 541 and the drain electrodes 550 and 551 are made of the same material above the gate insulating layers 520 and 521 of the first semiconductor element 500 and the second semiconductor element 501. Is formed at the same time by the above-mentioned method using.

Next, as shown in FIG. 5D, the first semiconductor layers 560, 460, and the first semiconductor layers 560, 460, and the first semiconductor layers 560, 460, respectively, between the source electrodes 540 and 541 and the drain electrodes 550 and 551 of the first semiconductor element 500 and the second semiconductor element 501, respectively. The semiconductor layer 561 of 2 is formed by the above-mentioned method.

Next, as shown in FIG. 5 (e), the semiconductor device can be manufactured by forming the second insulating layer 5848 by the above-mentioned method so as to cover the first semiconductor layer 560 of the first semiconductor element 500.

It is preferable that the gate electrodes 510 and 511 of the first semiconductor element 400 and the second semiconductor element 501 are made of the same material because the efficiency of material use is improved and the number of material types is reduced. For the same reason, it is preferable that the composition used for forming the first semiconductor layer 560 and the composition used for forming the second semiconductor layer 561 are the same composition. The same composition means that the types and composition ratios of the elements contained in each composition in an amount of 1 mol% or more are the same. Whether or not the types and composition ratios of the elements are the same can be identified by elemental analysis such as X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectrometry (SIMS).

Further, it is preferable that the concentration of the composition used for forming the first semiconductor layer 560 and the concentration of the composition used for forming the second semiconductor layer 561 are different. Alternatively, it is preferable that the coating amount of the composition used for forming the first semiconductor layer 560 and the coating amount of the composition used for forming the second semiconductor layer 561 are different. It is preferable to use any of these methods because a semiconductor device having the same electrical characteristics of the first semiconductor element and the second semiconductor element can be easily manufactured.

The coating method in the coating step of the first semiconductor layer 560 and the second semiconductor layer 561 is not particularly limited, but is any one selected from the group consisting of an inkjet method, a dispenser method, and a spray method. Is preferable. Above all, the inkjet method is more preferable as the coating method from the viewpoint of raw material usage efficiency. In that case, for example, it is conceivable to adjust the coating amount by adjusting the number of shots, the solution extrusion pressure, and the like.

Hereinafter, the present invention will be described in more detail based on examples. The present invention is not limited to the following examples.

Semiconductor Solution Preparation Example 1; Semiconductor Solution A1, Semiconductor Solution A2
First, 1.0 mg of CNT1 (manufactured by CNI, single layer CNT, purity 95%) was added to a solution of 2.0 mg of poly (3-hexylthiophene) (P3HT) (manufactured by Aldrich Co., Ltd.) in 10 ml of chloroform, and the mixture was ice-cooled. While using an ultrasonic homogenizer (VCX-500 manufactured by Tokyo Rika Kikai Co., Ltd.), ultrasonic stirring was performed at an output of 20% for 4 hours to obtain a CNT dispersion liquid A (CNT complex concentration 0.96 g / l with respect to the solvent). .. Next, a semiconductor solution for forming the semiconductor layer was prepared. The CNT dispersion liquid A was filtered using a membrane filter (pore diameter 10 μm, diameter 25 mm, omnipore membrane manufactured by Millipore) to remove a CNT complex having a length of 10 μm or more. After adding 5 ml of o-DCB (manufactured by Wako Pure Chemical Industries, Ltd.) to the obtained filtrate, chloroform, which is a low boiling point solvent, was distilled off using a rotary evaporator, and the solvent was replaced with o-DCB. CNT dispersion liquid A'was obtained.
3 mL of o-DCB was added to 1 ml of the CNT dispersion liquid A'to obtain a semiconductor solution A1 (CNT complex concentration 0.033 g / l with respect to the solvent). Further, 1.5 mL of o-DCB was added to 1 ml of the CNT dispersion liquid A'to obtain a semiconductor solution A2 (CNT complex concentration 0.061 g / l with respect to the solvent).

Composition Example 1; Gate Insulation Layer Solution A
Methyltrimethoxysilane 61.29 g (0.45 mol), 2- (3,4-epoxycyclohexyl) ethyltrimethoxysilane 12.31 g (0.05 mol), and phenyltrimethoxysilane 99.15 g (0.5 mol). Mol) was dissolved in 203.36 g of propylene glycol monobutyl ether (boiling point: 170 ° C.), and 54.90 g of water and 0.864 g of phosphoric acid were added thereto with stirring. The obtained solution was heated at a bath temperature of 105 ° C. for 2 hours, the internal temperature was raised to 90 ° C., and a component mainly composed of methanol produced as a by-product was distilled off. Next, the bath temperature was heated at 130 ° C. for 2.0 hours, the internal temperature was raised to 118 ° C., components mainly composed of water and propylene glycol monobutyl ether were distilled off, and then cooled to room temperature, and the solid content concentration was 26.0. A weight% polysiloxane solution A was obtained. The weight average molecular weight of the obtained polysiloxane was 6000. 10 g of the obtained polysiloxane solution A was weighed, 54.4 g of propylene glycol monoethyl ether acetate (hereinafter referred to as PGMEA) was mixed, and the mixture was stirred at room temperature for 2 hours to obtain a gate insulating layer solution A.

Composition example 2; Solution A for preparing the second insulating layer
2.5 g of polymethylmethacrylate (manufactured by Fuji Film Wako Pure Chemical Industries, Ltd.) was dissolved in 7.5 g of N, N-dimethylformamide to prepare a polymer solution A. Next, 1 g of N, N, N', N'-tetramethyl-1,4-phenylenediamine (manufactured by Tokyo Chemical Industry Co., Ltd.) was dissolved in 9.0 g of N, N-dimethylformamide to prepare compound solution A. bottom. 0.30 g of the compound solution A was added to 0.68 g of the polymer solution A to obtain a solution A for preparing the second insulating layer.

Composition example 3; Solution B for preparing the second insulating layer
Composition except that N, N, N', N'-tetramethylbenzidine (manufactured by Tokyo Chemical Industry Co., Ltd.) was used instead of N, N, N', N'-tetramethyl-1,4-phenylenediamine. A solution B for preparing the second insulating layer was obtained in the same manner as in Production Example 2.

Composition Example 4; Third Insulating Layer Solution A
1.485 g of polymethylmethacrylate was dissolved in 8.5 g of cyclohexanone to prepare a third insulating layer solution A.

Composition Example 5; Third Insulating Layer Solution B
A third insulating layer solution in the same manner as in Preparation Example 4 of the composition except that an acrylic resin having a hydroxy group (manufactured by Kyoeisha Chemical Co., Ltd., product number "Oricox KC-7000") was used instead of polymethylmethacrylate. B was obtained.

Composition Example 6; Third Insulating Layer Solution C
A third insulating layer solution C was obtained in the same manner as in Preparation Example 4 of the composition except that ethyl cellulose (manufactured by Dow Chemical Co., Ltd., product number "Etocell STD-100CPS") was used instead of polymethylmethacrylate.

(Evaluation of semiconductor devices)
The semiconductor device shown in FIG. 3A, which is composed of the first semiconductor element and the second semiconductor element, produced in each Example and Comparative Example was evaluated. The _VDD was 10V and the GND terminal was grounded. The slope (gain) of the tangent line of the transmission characteristic of the _{output signal (V out} ) with respect to the change of the input signal (V _{in) from 0 to 10 V was measured.} In _{addition, V} in _{the V out} changes were measured _{(V out} is _{V in} which the _{V DD} / 2). The larger the gain, the higher the performance of the semiconductor device. Further, the closer Vin is to 5V (= V _DD / 2), the better the semiconductor characteristics of the n-type semiconductor element and the p-type semiconductor element are.

Example 1
First, on a glass substrate (thickness 0.7 mm), chrome was vacuum-deposited at 5 nm and gold at 50 nm through a mask by a resistance heating method, whereby the gate electrode 510 of the first semiconductor element shown in FIG. 5 was vapor-deposited. , The gate electrode 511 of the second semiconductor element was formed.

Next, the gate insulating layer solution A was spin-coated on the substrate (2000 rpm × 30 seconds) and heat-treated at 200 ° C. for 1 hour under a nitrogen stream to form a gate insulating layer 520 and 521 having a film thickness of 600 nm. ..

Next, gold is vacuum-deposited to a film thickness of 50 nm by the resistance heating method, and a photoresist (trade name "LC100-10cP", manufactured by Roam & Haas Co., Ltd.) is applied thereto by the spin coating method. (1000 rpm × 20 seconds), and dried by heating at 100 ° C. for 10 minutes. Then, the photoresist film prepared as described above is patterned and exposed through a mask using a parallel light mask aligner (manufactured by Canon Inc., PLA-501F), and then subjected to an automatic developing apparatus (manufactured by Takizawa Sangyo Co., Ltd.). Using AD-2000), shower develop with 2.38 wt% tetramethylammonium hydroxide aqueous solution (trade name "ELM-D", manufactured by Mitsubishi Gas Chemical Company, Inc.) for 70 seconds, and then wash with water for 30 seconds. bottom. Then, it was etched with an etching solution (trade name "AURUM-302", manufactured by Kanto Chemical Co., Inc.) for 5 minutes, and then washed with water for 30 seconds. Then, the electrode is peeled off by immersing it in a stripping solution (trade name "AZ Remover 100", manufactured by AZ Electronic Materials Co., Ltd.) for 5 minutes, washed with water for 30 seconds, and then heated and dried at 120 ° C. for 20 minutes. The source electrode 540 and drain electrode 550 of the semiconductor element 1 and the source electrode 541 and drain electrode 551 of the second semiconductor element were formed.

The width of the source electrode 540 and the drain electrode 550 of the first semiconductor element, the source electrode 541 of the second semiconductor element, and the drain electrode 551 was 100 μm, and the distance between these electrodes was 30 μm. On the substrate 1 on which each electrode was formed as described above, a 200 pl semiconductor solution A1 was applied to the first semiconductor element and a 100 pl semiconductor solution A1 was applied to the second semiconductor element by an inkjet method. After that, the first semiconductor layer 560 and the second semiconductor layer 561 were formed by performing heat treatment on a hot plate at 150 ° C. for 30 minutes under a nitrogen stream. Next, 5 μL of the solution A for producing the second insulating layer is dropped onto the first semiconductor layer 560 so as to cover the first semiconductor layer, and heat-treated at 110 ° C. for 30 minutes under a nitrogen stream to obtain a second. The insulating layer 58 was formed.

In this way, the semiconductor device of Example 1 was obtained. Next, an image of the first semiconductor layer was acquired using an atomic force microscope Dimension Icon (manufactured by Bruker AXS Co., Ltd.), and the lengths of all the CNT complexes existing per ^{1 μm 2 in the center of the first semiconductor layer.} When the shavings were measured and totaled, it was 16 μm. ^{Similarly, the total length of the CNT composites present per 1 μm 2} in the second semiconductor layer was measured and found to be 11 μm. In addition, when this semiconductor device were evaluated in the above-mentioned, the gain is _{V in} the _{29, V out} changes, it was 5.9V.

Example 2
On the second semiconductor layer 561 of the second semiconductor device, 10 μL of a 5 mass% propylene glycol 1-monomethyl ether 2-acetylate solution of polystyrene (manufactured by Aldrich, weight average molecular weight (Mw): 192000, hereinafter referred to as PS). Examples except that a second semiconductor element having a third insulating layer was formed by drop casting, air drying at 30 ° C. for 5 minutes, and then heat treatment at 120 ° C. for 30 minutes on a hot plate under a nitrogen stream. 1 A semiconductor device was manufactured in the same manner. Similarly to Example 1, the ^{total length of the CNT composites present per 1 μm 2} in the first semiconductor layer was measured and found to be 16 μm. Moreover, when the total length of the CNT composite existing per ^{1 μm 2} in the second semiconductor layer was measured, it was 11 μm. Moreover, when the semiconductor device was evaluated for the, _{V in} the gain which is _{30, V out} changes it was 5.7 V.

Example 3
Except that the first semiconductor layer of the first semiconductor element was formed by dropping 250 pl of the semiconductor solution A1 and the second semiconductor layer of the second semiconductor element was formed by 200 pl of the semiconductor solution A1. Made a semiconductor device in the same manner as in Example 1. Similarly to Example 1, the ^{total length of the CNT composites present per 1 μm 2} in the first semiconductor layer was measured and found to be 18 μm. Moreover, when the total length of the CNT composite existing per ^{1 μm 2} in the second semiconductor layer was measured, it was 16 μm. In addition, when this semiconductor device were evaluated in the above-mentioned, the gain is _{V in the 7, V out} changes, was 7.9V.

Example 4
Except that the first semiconductor layer of the first semiconductor element was formed by dropping 100 pl of the semiconductor solution A2, and the second semiconductor layer of the second semiconductor element was formed by 250 pl of the semiconductor solution A1. Made a semiconductor device in the same manner as in Example 1. Similarly to Example 1, the ^{total length of the CNT composites present per 1 μm 2} in the first semiconductor layer was measured and found to be 24 μm. Moreover, when the total length of the CNT composite existing per ^{1 μm 2} in the second semiconductor layer was measured, it was 18 μm. In addition, when this semiconductor device were evaluated in the above-mentioned, the gain is _{V in} the _{19, V out} changes, was 6.1V.

Example 5
Except that the first semiconductor layer of the first semiconductor element was formed by dropping 100 pl of the semiconductor solution A2, and the second semiconductor layer of the second semiconductor element was formed by 100 pl of the semiconductor solution A1. Made a semiconductor device in the same manner as in Example 1. Similarly to Example 1, the ^{total length of the CNT composites present per 1 μm 2} in the first semiconductor layer was measured and found to be 24 μm. Moreover, when the total length of the CNT composite existing per ^{1 μm 2} in the second semiconductor layer was measured, it was 11 μm. In addition, when this semiconductor device were evaluated in the above-mentioned, the gain is _{V in} the _{38, V out} changes, was 4.8V.

Example 6
A semiconductor device was produced in the same manner as in Example 5 except that the solution B for producing the second insulating layer was used instead of the solution A for producing the second insulating layer, and the first semiconductor was produced in the same manner as in Example 1. The total length of the CNT complex present per ^{1 μm 2} in the layer was measured and found to be 24 μm. Moreover, when the total length of the CNT composite existing per ^{1 μm 2} in the second semiconductor layer was measured, it was 11 μm. Also were evaluated in the above for the semiconductor device, the gain is _{V in} which _{34, V out} is changed, was 4.5V.

Example 7
Except that the first semiconductor layer of the first semiconductor element was formed by dropping 3000 pl of the semiconductor solution A1 and the second semiconductor layer of the second semiconductor element was formed by 100 pl of the semiconductor solution A2. Made a semiconductor device in the same manner as in Example 1. Similarly to Example 1, the ^{total length of the CNT composites present per 1 μm 2} in the first semiconductor layer was measured and found to be 80 μm. Moreover, when the total length of the CNT composite existing per ^{1 μm 2} in the second semiconductor layer was measured, it was 24 μm. In addition, when this semiconductor device were evaluated in the above-mentioned, the gain is _{V in} the _{18, V out} changes, was 3.8V.

Example 8
Except that the first semiconductor layer of the first semiconductor element was formed by dropping 1000 pl of the semiconductor solution A1 and the second semiconductor layer of the second semiconductor element was formed by 70 pl of the semiconductor solution A1. Made a semiconductor device in the same manner as in Example 1. Similarly to Example 1, the ^{total length of the CNT composites present per 1 μm 2} in the first semiconductor layer was measured and found to be 53 μm. Moreover, when the total length of the CNT composite existing per ^{1 μm 2} in the second semiconductor layer was measured, it was 7 μm. In addition, were evaluated in the above for the semiconductor device, the gain _{V in} which change is _{5, V out} was 1.9V.

Example 9
Except that the first semiconductor layer of the first semiconductor element was formed by dropping 3000 pl of the semiconductor solution A1 and the second semiconductor layer of the second semiconductor element was formed by 200 pl of the semiconductor solution A1. Made a semiconductor device in the same manner as in Example 1. Similarly to Example 1, the ^{total length of the CNT composites present per 1 μm 2} in the first semiconductor layer was measured and found to be 80 μm. Moreover, when the total length of the CNT composite existing per ^{1 μm 2} in the second semiconductor layer was measured, it was 16 μm. Moreover, when the semiconductor device was evaluated for the gain is _{V in} which changes _{15, V out,} was 3.2 V.

Examples 10-12
Same as in Example 2 except that the third insulating layer solutions A, B and C were used instead of the 5 mass% propylene glycol 1-monomethyl ether 2-acetate solution of PS as shown in Table 1. To produce a semiconductor device. ^{Similarly to Example 1, the total length of the CNT composites present per 1 μm 2} in the first and second semiconductor layers was measured, and the above evaluation was performed for each semiconductor device.

Example 13
A semiconductor device was manufactured in the same manner as in Example 1 except that the distance between the source electrode 541 and the drain electrode 551 of the second semiconductor element was 35 μm. ^{Similarly to Example 1, the total length of the CNT composites present per 1 μm 2} in the first and second semiconductor layers was measured, and the above evaluation was performed for each semiconductor device.

Example 14
Except that the second semiconductor layer of the second semiconductor element was formed by 200 pl of the semiconductor solution A1 and the distance between the source electrode 541 and the drain electrode 551 of the second semiconductor element was 60 μm. A semiconductor device was manufactured in the same manner as in Example 1. ^{Similarly to Example 1, the total length of the CNT composites present per 1 μm 2} in the first and second semiconductor layers was measured, and the above evaluation was performed for each semiconductor device.

Example 15
A semiconductor device was manufactured in the same manner as in Example 14 except that the distance between the source electrode 541 and the drain electrode 551 of the second semiconductor element was set to 130 μm. ^{Similarly to Example 1, the total length of the CNT composites present per 1 μm 2} in the first and second semiconductor layers was measured, and the above evaluation was performed for each semiconductor device.

Example 16
Except that the distance between the source electrode 540 and the drain electrode 550 of the first semiconductor element was 10 μm, and the distance between the source electrode 541 and the drain electrode 551 of the second semiconductor element was 100 μm. A semiconductor device was manufactured in the same manner as in Example 14. ^{Similarly to Example 1, the total length of the CNT composites present per 1 μm 2} in the first and second semiconductor layers was measured, and the above evaluation was performed for each semiconductor device.

Example 17
Except that the distance between the source electrode 540 and the drain electrode 550 of the first semiconductor element was 30 μm, and the distance between the source electrode 541 and the drain electrode 551 of the second semiconductor element was 35 μm. A semiconductor device was manufactured in the same manner as in Example 14. ^{Similarly to Example 1, the total length of the CNT composites present per 1 μm 2} in the first and second semiconductor layers was measured, and the above evaluation was performed for each semiconductor device.

Example 18
A semiconductor device was produced in the same manner as in Example 14 except that the second semiconductor layer of the second semiconductor element was formed with 100 pl of the semiconductor solution A2. ^{Similarly to Example 1, the total length of the CNT composites present per 1 μm 2} in the first and second semiconductor layers was measured, and the above evaluation was performed for each semiconductor device.

Example 19
10 μL of the third insulating layer solution A was dropcast onto the second semiconductor layer 561 of the second semiconductor element, air-dried at 30 ° C. for 5 minutes, and then air-dried at 30 ° C. for 5 minutes, and then on a hot plate under a nitrogen stream at 120 ° C. for 30 minutes. A semiconductor device was produced in the same manner as in Example 14 except that the second semiconductor element having the third insulating layer was formed by heat treatment. ^{Similarly to Example 1, the total length of the CNT composites present per 1 μm 2} in the first and second semiconductor layers was measured, and the above evaluation was performed for each semiconductor device.

Comparative Example 1
The semiconductor device is formed in the same manner as in the first embodiment except that the first semiconductor layer of the first semiconductor element and the second semiconductor layer of the second semiconductor element are both formed by dropping 100 pl of the semiconductor solution A1. Made. ^{Similarly to Example 1, the total length of the CNT composites present per 1 μm 2} in the first semiconductor layer and the second semiconductor layer was measured and found to be 11 μm. In addition, the semiconductor device was subjected to evaluation of the above, V _out for a change of 0 → 10V of V _in does not change only up to 10V → 4V, the operation of a complete semiconductor device could not be obtained.

10, 20, 30, 50 Substrate 11, 21, 31, 510, 511 Gate electrodes 12, 22, 32, 520, 521 Gate insulation layers 13, 23, 33, 540, 541 Source electrodes 14, 24, 34, 550, 551 Drain electrodes 15, 35, 560 First semiconductor layers 16, 58 Second insulating layers 100, 200 Distances between source and drain electrodes of semiconductor elements 25,561 Second semiconductor layers 41,500 First Semiconductor elements 42, 501 Second semiconductor element

Claims (14)

A semiconductor device having a first semiconductor element and a second semiconductor element provided on a substrate having an insulating surface.
The first semiconductor element is an n-type semiconductor element.
With the source electrode
With the drain electrode
With the gate electrode
A first semiconductor layer in contact with the source electrode and the drain electrode,
A gate insulating layer that insulates the first semiconductor layer from the gate electrode,
Including
The second semiconductor element is
With the source electrode
With the drain electrode
With the gate electrode
A second semiconductor layer in contact with the source electrode and the drain electrode,
A gate insulating layer that insulates the second semiconductor layer from the gate electrode,
Including
Both the first semiconductor layer and the second semiconductor layer contain carbon nanotubes, and the first semiconductor layer and the second semiconductor layer both contain carbon nanotubes.
A value (Cn / Ln) obtained by dividing the total length (Cn) of the carbon nanotubes existing per ^{1 μm 2 of} the first semiconductor layer by the distance (Ln) between the source electrode and the drain electrode of the first semiconductor element. ^{) Is the value obtained by dividing the total length (Cp) of the carbon nanotubes existing per 1 μm 2 of} the second semiconductor layer by the distance (Lp) between the source electrode and the drain electrode of the second semiconductor element (). A semiconductor device characterized by being different from Cp / Lp). It said second semiconductor layer 1μm total length of the carbon nanotubes present per ² divided by the distance (Lp) between the (Cp) a source electrode and a drain electrode of the second semiconductor element (Cp / Lp ^{) Is the value obtained by dividing the total length (Cn) of the carbon nanotubes existing per 1 μm 2 of} the first semiconductor layer by the distance (Ln) between the source electrode and the drain electrode of the first semiconductor element (). The semiconductor device according to claim 1, which is smaller than Cn / Ln). It said second semiconductor layer 1μm total length of the carbon nanotubes present per ² divided by the distance (Lp) between the (Cp) a source electrode and a drain electrode of the second semiconductor element (Cp / Lp ^{) Is the value obtained by dividing the total length (Cn) of the carbon nanotubes existing per 1 μm 2 of} the first semiconductor layer by the distance (Ln) between the source electrode and the drain electrode of the first semiconductor element (). The semiconductor device according to claim 1 or 2, wherein the semiconductor device is 0.2 times or more and 0.8 times or less of Cn / Ln). A semiconductor device having a first semiconductor element and a second semiconductor element provided on a substrate having an insulating surface.
The first semiconductor element is an n-type semiconductor element.
With the source electrode
With the drain electrode
With the gate electrode
A first semiconductor layer in contact with the source electrode and the drain electrode,
A gate insulating layer that insulates the first semiconductor layer from the gate electrode,
Including
The second semiconductor element is
With the source electrode
With the drain electrode
With the gate electrode
A second semiconductor layer in contact with the source electrode and the drain electrode,
A gate insulating layer that insulates the second semiconductor layer from the gate electrode,
Including
Both the first semiconductor layer and the second semiconductor layer contain carbon nanotubes, and the first semiconductor layer and the second semiconductor layer both contain carbon nanotubes.
The total length of the carbon nanotubes present in the first semiconductor layer 1 [mu] m ² per (Cn) is, the total length of the carbon nanotubes present in the second semiconductor layer 1 [mu] m ² per different from (Cp), characterized in that Semiconductor device. The total length of the carbon nanotubes present in the second semiconductor layer 1 [mu] m ² per (Cp) is shorter than the total length of the carbon nanotubes present in the first semiconductor layer 1 [mu] m ² per (Cn), according to claim 4 The semiconductor device described. The total length of the carbon nanotubes present in the second semiconductor layer 1 [mu] m ² per (Cp) is the total length of the carbon nanotubes (Cn) 0.2 times or more of that present in the first semiconductor layer 1 [mu] m ² per The semiconductor device according to claim 4 or 5, which is 0.8 times or less. Any of claims 1 to 6, wherein the first semiconductor element further includes a second insulating layer that is in contact with the first semiconductor layer on the side opposite to the gate insulating layer with respect to the first semiconductor layer. The semiconductor device described in Crab. The semiconductor device according to any one of claims 1 to 6, wherein the first semiconductor layer further contains an n-type modifier. The second semiconductor element has a third insulating layer different from the second insulating layer, and the third insulating layer is on the side opposite to the gate insulating layer with respect to the second semiconductor layer. The semiconductor device according to any one of claims 1 to 8, which is in contact with the semiconductor layer of the above. The method for manufacturing a semiconductor device according to any one of claims 1 to 9, wherein the method for manufacturing a semiconductor device includes a step of applying and drying the first semiconductor layer and the second semiconductor layer. The method for manufacturing a semiconductor device according to claim 10, wherein the first semiconductor layer and the second semiconductor layer are coated and dried in the same step. The semiconductor according to claim 10 or 11, wherein the composition used for forming the first semiconductor layer and the composition used for forming the second semiconductor layer are the same composition. Manufacturing method of the device. The invention according to any one of claims 10 to 12, wherein the concentration of the composition used for forming the first semiconductor layer is different from the concentration of the composition used for forming the second semiconductor layer. Manufacturing method of semiconductor devices. Any of claims 10 to 13, wherein the coating amount of the composition used for forming the first semiconductor layer and the coating amount of the composition used for forming the second semiconductor layer are different. The method for manufacturing a semiconductor device according to the above.

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