JP2021119610A - Photodetector and lidar device using the same - Google Patents

Abstract

To provide a photodetector having high detection sensitivity of light in a near infrared wavelength band, and a lidar device using the photodetector.SOLUTION: A photodetector according to an embodiment includes a photodetector equipped with an avalanche photodiode having a semiconductor layer having a first surface and a second surface facing the first surface and including a first conductive type first semiconductor region and a second conductive type second semiconductor region provided on the first semiconductor region, an element separation provided so as to surround the avalanche photodiode and penetrating the semiconductor layer, a reflective member provided on the first region of the first surface of the semiconductor layer via an insulating layer, and wiring that is electrically connected to a second region of the semiconductor layer, which is different from the first region of the first surface of the semiconductor layer provided with the reflective member.SELECTED DRAWING: Figure 1

Description

Embodiments of the present invention relate to a photodetector and a lidar device using the photodetector.

A silicon photomultiplier (hereinafter, also referred to as SiPM) is a photodetector in which an avalanche photodiode (hereinafter, APD) is two-dimensionally arranged in an array. The APD is operated by applying a reverse bias voltage higher than the yield voltage of the APD, and is driven in a region called Geiger mode. In APD gain is ^{105 to 106} the order of the Geiger mode, because very high, even a measurable with single photon weak light. Since SiPM is driven by a high reverse bias voltage, the thickness of the depletion layer of the APD is generally 2 μm to 3 μm, and the reverse bias voltage is generally 100 V or less. The spectral sensitivity characteristic of SiPM largely depends on the absorption characteristic of silicon, has a sensitivity peak in the range of 400 nm to 600 nm, and has almost no sensitivity in the near-infrared wavelength band of 800 nm or more.

On the other hand, in a photodetector using silicon, a device is known in which the depletion layer is made extremely thick so as to be several tens of μm to have sensitivity in the near infrared wavelength band. However, in this case, the drive voltage becomes extremely high at several hundreds of volts, and unlike SiPM, a fine array of APDs has not been realized.

Further, there is known a photodetector having a structure in which the back surface of a silicon substrate is made into a scattering surface having irregularities by a laser processing technique to reflect unabsorbed light. However, it is difficult to controlably form a structure that becomes a scattering reflection surface for light in the near infrared wavelength band. Further, in this case, a dedicated laser processing device and process are required, resulting in high cost. Further, mechanically processing the silicon layer forming the diode is equivalent to forming a defect layer, and there are problems in its stability, yield, and reproducibility as the electrical characteristics of the photodetector.

Japanese Unexamined Patent Publication No. 2008-153311 Japanese Unexamined Patent Publication No. 2013-065911

The present embodiment provides a photodetector having high detection sensitivity for light in the near-infrared wavelength band and a lidar device using the photodetector.

The photodetector according to the present embodiment has a first surface and a second surface facing the first surface, and is a first conductive type first semiconductor region and a second conductive type provided on the first semiconductor region. A photodetector having an avalanche photodiode having a semiconductor layer including a second semiconductor region, an element separation provided so as to surround the avalanche photodiode and penetrating the semiconductor layer, and the first surface of the semiconductor layer. A reflective member provided on the first region of the semiconductor layer via an insulating layer, and a second region of the semiconductor layer different from the first region of the first surface of the semiconductor layer provided with the reflective member are electrically charged. It is equipped with wiring to connect to the target.

FIG. 5 is a cross-sectional view showing a photodetector according to the first embodiment. The figure which shows the photodetector element array which arranged the photodetector element of 1st Embodiment in an array. The cross-sectional view which shows the manufacturing process of the photodetector by 1st Embodiment. The cross-sectional view which shows the manufacturing process of the photodetector by 1st Embodiment. The cross-sectional view which shows the manufacturing process of the photodetector by 1st Embodiment. The cross-sectional view which shows the manufacturing process of the photodetector by 1st Embodiment. The cross-sectional view which shows the manufacturing process of the photodetector by 1st Embodiment. The cross-sectional view which shows the manufacturing process of the photodetector by 1st Embodiment. The cross-sectional view which shows the manufacturing process of the photodetector by 1st Embodiment. The cross-sectional view which shows the manufacturing process of the photodetector by 1st Embodiment. FIG. 5 is a cross-sectional view showing another manufacturing process of the photodetector according to the first embodiment. FIG. 5 is a cross-sectional view showing another manufacturing process of the photodetector according to the first embodiment. The circuit diagram which shows an example of an active quench circuit. FIG. 2 is a cross-sectional view showing a photodetector according to the second embodiment. The block diagram which shows the rider apparatus according to 3rd Embodiment.

Hereinafter, embodiments will be described with reference to the drawings.

(First Embodiment)
A schematic cross section of the photodetector according to the first embodiment is shown in FIG. The photodetector 1 of the first embodiment is provided on an SOI (Silicon On Insulator) substrate 10 and comprises a plurality of (two in FIG. 1) photodetectors 20a and 20b that detect light and convert it into an electric signal. It has a photodetection region 30 provided, and a peripheral region 40 including a peripheral circuit (also referred to as a CMOS circuit) including transistors 50 and 60 that process electric signals converted by the photodetector elements 20a and 20b. .. The SOI substrate 10 has a laminated structure in which a silicon support substrate 11, an embedded oxide film (hereinafter, also referred to as BOX) 12, and an n-type semiconductor layer 13 as an active layer are laminated in this order.

The optical detection element 20a includes a part of the n-type semiconductor layer 13, a p ⁺ semiconductor layer 21a ^{provided on the part of the n-type semiconductor layer 13, a part of the p-} type semiconductor layer 22, and a p ^- type semiconductor layer 22. and ^{p +} semiconductor layer 23a provided on a portion of, ^{p +} and the light reflecting member 24a provided on the semiconductor layer 23a, a contact 25a which is provided on ^{p +} semiconductor layer 23a, wiring connected to the contact 25a A portion 26a and a quenching resistor 27a connected to the wiring portion 26a are provided. An impurity region (conductor region) 41 is provided on a part of ^{the p-} type semiconductor layer 22 provided with the photodetector 20a.

Further, the optical detection element 20b includes a part of the n-type semiconductor layer 13, a p ⁺ semiconductor layer 21b ^{provided on the part of the n-type semiconductor layer 13, a part of the p-} type semiconductor layer 22, and a p ^- type semiconductor. and ^{p +} semiconductor layer 23b provided on a portion of layer 22, and the light reflecting member 24b provided on the ^{p +} semiconductor layer 23b, and a contact 25b provided on ^{p +} semiconductor layer 23b, connected to the contact 25b It is provided with a wiring portion 26b to be connected and a quench resistor 27b connected to the wiring portion 26b. In this embodiment, the photodetectors 20a, 20b form a vertical photodiode.

The n-type semiconductor layer 13 penetrates the silicon support substrate 11 and the embedded insulating film 12 on the side opposite to the side where the photodetector elements 20a and 20b are provided with respect to the n-type semiconductor layer 13 in the light detection region 30. An opening 78 is provided that exposes a portion of the area. A transparent electrode 80 is provided on a part of the exposed n-type semiconductor layer 13. The transparent electrode 80 is formed of an electrode material that transmits a target near-infrared ray (for example, a wavelength of 850 nm), for example, ITO (Indium Tin Oxide), and serves as a common electrode for a plurality of light detection elements 20a and 20b.
Light enters the photodetector 1 from the side provided with the opening 78.

The transistor 50 is on the region (channel region) ^{of the p-} type semiconductor layer 22 between the source 52a and the drain 52b provided apart from each other in a part of ^{the p-type semiconductor layer 22 and the source 52a and the drain 52b.} The gate insulating film 54 provided in the gate insulating film 54 and the gate electrode 56 provided on the gate insulating film 54 are provided.

The transistor 60 is on the region (channel region) ^{of the p-} type semiconductor layer 22 between the source 62a and the drain 62b provided apart from each other in a part of ^{the p-type semiconductor layer 22 and the source 62a and the drain 62b.} The gate insulating film 64 provided in the gate insulating film 64 and the gate electrode 66 provided on the gate insulating film 64 are provided.

The quenching resistors 27a and 27b in the light detection region 30 and the transistors 50 and 60 in the peripheral region 40 are covered with an interlayer insulating film 72. Wiring 26a and 26b are provided on the interlayer insulating film 72 in the light detection region 30. ^{One end of the wiring 26a is connected to the p +} semiconductor layer 23a via the contact 25a provided in the interlayer insulating film 72, and the other end is connected to the quench resistor 27a via the contact 25c provided in the interlayer insulating film 72. do. ^{One end of the wiring 26b is connected to the p +} semiconductor layer 23b via the contact 25b provided in the interlayer insulating film 72, and the other end is connected to the quench resistor 27b via the contact 25d provided in the interlayer insulating film 72. do.

Wiring 46a, 46b, 46c is provided on the interlayer insulating film 72 in the peripheral region 40, and these wirings 46a, 46b, 46c are connected to the source 52a via the contacts 44a, 44b, 44c provided on the interlayer insulating film 72, respectively. , Drain 52b, and source 62a. The wiring 46b is connected to the impurity region 41 via the contact 42.

The wirings 26a and 26b in the light detection region 30 and the wirings 46a, 46b and 46c in the peripheral region 40 are covered with the interlayer insulating film 74. The interlayer insulating films 72 and 74 are provided with openings in the regions where the reflective members 24a and 24b of the photodetecting elements 20a and 20b are provided, and the reflective members 24a and 24b are exposed. ^{These reflective members 24a and 24b are provided on the p +} semiconductor layers 23a and 23b via thin insulating layers 77a and 77b, respectively. These reflecting members 24a and 24b are made of a material that reflects light in the wavelength range from visible light to near-infrared light.

An element separation 85a is provided between the photodetector 20a and the peripheral region 40 provided with the transistor 50, and an element separation 85b is provided between the photodetector 20b and the peripheral region 40 provided with the transistor 60. It is provided. These element separations 85a and 85b are made of DTI (Deep Trench Isolation). These element separations 85a and 85b are provided so as to penetrate the n-type semiconductor layer 13 and the p ^{-semiconductor layer 22.} Further, the element separations 85a and 85b may be formed so as to surround the light detection region 30.

Further, the interlayer insulating film 74 is provided with a first opening and a second opening. Pads 92 and 94 are provided in the first opening and the second opening, respectively. The pad 92 is connected to the through electrode 90. The pad 94 is connected to the drain 62b of the transistor 60 via the contact 44d provided in the interlayer insulating film 72.

As described above, the photodetectors 20a and 20b form vertical photodiodes. Therefore, the potential is applied at the upper and lower terminals of the photodetector elements 20a and 20b. The surface electrodes of the photodetectors 20a and 20b are connected to the anodes of the photodetectors 20a and 20b and the I / O terminals of the CMOS circuit. The back surface electrodes 80 corresponding to the cathodes of the photodetector elements 20a and 20b are separately formed. Here, a through electrode 90 is provided as wiring for making contact with the electrode 80, which will later become the cathode, and pulling it out to the surface. The end of the through electrode 90 is configured to connect to the surface of the photodetector 1.

That is, the through electrode 90 is an electrode that penetrates the interlayer insulating film 72, the p ^- semiconductor layer 22, and the n-type semiconductor layer 13 and leads to the electrode 80. The through electrode 90 has a structure in which the circumference of the conductor is covered with an insulator, and the n-type semiconductor layer 13 and the p ^- type semiconductor layer 22 and the conductor of the through electrode 90 are electrically insulated by this insulator. Will be done.

The photodetector 1 configured in this way has a plurality of photodetector elements. These photodetectors are generally arranged in an array as shown in FIG. FIG. 2 is a diagram schematically showing an upper surface when the photodetectors 20a, 20b, 20c, and 20d are arranged in a 2 × 2 array. As can be seen from FIG. 2, each of the photodetector elements 20a, 20b, 20c, and 20d is provided with quench resistors 27a, 27b, 27c, and 27d so as to surround a part of the periphery of each photodetector element. The photodetectors 20a, 20b, 20c, 20d and one ends of the quench resistors 27a, 27b, 27c, 27d are connected via wirings 26a, 26b, 26c, 26d, respectively. Further, as shown in FIG. 2, wiring 98 is provided between the photodetector elements 20a and 20b adjacent to each other in the row direction (horizontal direction of FIG. 2) and between the photodetector elements 20c and 20d adjacent to each other. The other ends of the quench resistors 26a, 26b, 26c, and 26d are connected to the wiring 98. That is, in the present embodiment, the plurality of photodetecting elements 20a, 20b, 20c, and 20d arranged in an array are connected in parallel.

The photodetector 1 configured in this way is a SiPM (Silicon Photomultiplier).
Further, each photodetector element 20a, 20b, 20c, 20d becomes an avalanche photodiode (hereinafter, also referred to as APD).

Next, the operation of the photodetector 1 of the present embodiment will be described with reference to FIG. A reverse bias is applied to each of the photodetector elements 20a and 20b. This reverse bias is applied between the pad 92 shown in FIG. 1 and the wiring 98 shown in FIG. The potential applied to the pad 92 is applied to the n-type semiconductor layer 13 via the through electrode 90 and the electrode 80, and the potential applied to the wiring 98 is the quench resistors 27a and 27b, the contacts 25c and 25d, and the wirings 26a and 26b. ^{, And applied to the p +} semiconductor layers 23a, 23b via the contacts 25a, 25b, respectively.

The light incident on the photodetector 1 via the electrode 80 is electron in the depletion layer near the interface between the ^{part of the n-type semiconductor layer 13 and the p + semiconductor layers 21a and 21b of the photodetector 20a and 20b, respectively.} A pair of a hole and a hole (electron-hole pair) is generated. Since the reverse bias is applied, the generated electrons flow to the n-type semiconductor layer 13, and the generated holes flow to the p ⁺ semiconductor layers 23a and 23b. However, some of the electrons and holes p ^- semiconductor layer 22 and the p ⁺ semiconductor layer 23a, the 23b collide with other atoms, new electronic - generating a hole pairs. A chain reaction occurs in which the newly generated electrons and holes collide with other atoms and a new electron-hole pair is generated. That is, an avalanche multiplication occurs in which the photocurrent generated by the incident light is multiplied. This multiplied photocurrent is detected by a readout circuit (not shown) via quenching resistors 27a, 27b and wiring 98. Further, ^{some of the holes flowing in the p +} semiconductor layers 23a and 23b are reflected by the reflecting members 24a and 24b ^{, flow in the p-} semiconductor layer 22, collide with other atoms, and generate new electron-hole pairs. Contribute to the outbreak. That is, by providing the reflective members 24a and 24b, the avalanche multiplication rate can be further increased. In this way, the p ⁺ semiconductor layers 23a and 23b are avalanche layers.

An analog front-end circuit including the above-mentioned readout circuit that processes a signal from the photodetector element, an active quench circuit that enables the Geiger discharge to be actively stopped, and the like are formed in the peripheral region 40.

(Production method)
Next, the method of manufacturing the photodetector of the first embodiment will be described with reference to FIGS. 3 to 11.

First, as shown in FIG. 3, the SOI substrate 10 is prepared. The SOI substrate 10 has a structure in which a Si support substrate 11, a BOX 12, and an active layer (n-type semiconductor layer) 13 are laminated in this order. ^{A p-} semiconductor layer 22 is formed on the n-type semiconductor layer 13 by epitaxial growth. Subsequently, element separations 85a and 85b that separate the light detection region 30 and the peripheral region 40 are formed. The element separations 85a and 85b are formed by DTI. This DTI is ^{formed by penetrating the p-} semiconductor layer 22 and the n-type semiconductor layer 13 to form an opening reaching the BOX, and oxidizing the side surface of the opening.

Next, impurities (for example, boron) are injected so ^{that a part of the p-} semiconductor layer 22, that is, the region where the photodetector is formed becomes p ^{+ semiconductor layers 21a and 21b. As a result, p +} semiconductor layers 21a and 21b forming a plurality of photodetector elements are formed on the active layer 13 portion of the SOI substrate 10 (FIG. 4). Then, as shown in FIG. 4, the element separation 29 is formed between the adjacent photodetecting elements so that the regions in which the respective photodetecting elements are formed do not interfere with each other. As the element separation 29, for example, a local oxidation element separation structure (LOCOS (Local Oxidation of Silicon)) can be used.

Further, as shown in FIG. 4, a ^{first mask (not shown) is formed on the p-} semiconductor layer 22, and an n-type impurity is injected using the first mask to form a p ^- semiconductor layer that becomes a peripheral region 40. A source 52a and a drain 52b, a source 62a and a drain 62b are formed on the 22 and an impurity region 41 is formed on the ^{p-semiconductor layer 22 serving as a photodetection region.}
After removing the first mask, a second mask (not shown) is formed on the ^{p-semiconductor layer 22.}
By implanting p-type impurity using the second mask, the photodetection region p ^- semiconductor layer 22 ^{p +} semiconductor layer 23a, to form a 23b. As a result, the photodetectors of the photodetectors 20a and 20b are formed. After removing the second mask, the gate insulating film 54 is formed on the ^p- semiconductor layer 22 that serves as a channel between the source 52a and the drain 52b, and p that serves as a channel between the source 62a and the drain 62b. ^- forming a gate insulating film 64 on the semiconductor layer 22. Subsequently, the gate electrodes 56 and 66 are formed on the gate insulating films 54 and 64, respectively.

After that, the quench resistors 27a and 27b connected in series with the photodetector elements 20a and 20b are formed in close proximity to a part of the periphery of the respective photodetector portions of the photodetector elements 20a and 20b.
The quenching resistors 27a and 27b are also formed on the element separation 29 as shown in FIG.

Subsequently, as shown in FIG. 4, an insulating film 72 is formed on the ^{p-semiconductor layer 22 so as to cover the quench resistors 27a and 27b.} Using lithography technology, holes are formed in the insulating film 72 to connect to the source 52a, the drain 52b, the impurity region 41, p ⁺ semiconductor layers 23a, 23b, the quench resistors 27a, 27b, the source 62a, and the drain 62b, respectively. These openings are embedded in a conductive material, such as tungsten, and contacts 44a, 44b, 42, 25a, 25b, 25c. 25d, 44c, 44d are formed. Further, using a lithography technique, ^{an opening is formed which penetrates the insulating film 72, the p-} semiconductor layer 22, and the n-type semiconductor layer 13 and reaches the BOX 12. After the side surface of the opening is oxidized to form an insulating film, the opening whose side surface is oxidized is embedded with a conductor material such as tungsten to form a through electrode 90.

Next, the wirings 46a, 46b, 26a, 26b, 46c, 46d and the pad 92 are formed on the insulating film 72 by using a lithography technique. After that, the insulating film 74 is formed so as to cover the wirings 46a, 46b, 26a, 26b, 46c, 46d and the pad 92.

Next, as shown in FIG. 5, a mask 75 made of, for example, a photoresist is formed on the insulating film 74. ^{Holes are formed in the mask 75 directly above the p +} semiconductor layers 23a and 23b of the photodetector elements 20a and 20b, respectively. For example, dry etching is used to form the openings in the mask 75. Using this mask 75, the insulating film 74 is _{etched with a reaction gas such as CF 4,} and holes 76a and 76b are formed in the insulating film 74.
At this time, thin insulating layers 77a and 77b having a thickness of, for example, 1 μm are left on the bottom surfaces of the holes 76a and 76b. The remaining insulating layers 77a and 77b are controlled by controlling the dry etching time.

Next, as shown in FIG. 6, the reflective members 24a and 24b are formed on the insulating layers 77a and 77b. For the reflective members 24a and 24b, at least one metal material selected from Ag, Al, Au, Cu, Ni, Pt, Ti, Cr, Mo and W is used. For example, sputtering is used to form the reflective members 24a and 24b. After the metal film is formed by sputtering or the like, the surface of the metal film may be etched or irradiated with a laser to form three-dimensional irregularities on the surfaces of the reflecting members 24a and 24b. By forming such irregularities, holes and the like can be more reflected.

Next, after removing the mask 75 shown in FIG. 6, for example, a photoresist is applied on the insulating film 74. A pore is formed in the photoresist using a photolithography technique, and a mask 120 is applied. The holes are located directly above the pad 94 for the front electrode and the pad 92 for the back electrode. The insulating film 74 is dry-etched using this mask 120 to expose the surfaces of the pad 94 and the pad 92 (FIG. 7). After that, the mask 120 is removed.

Next, as shown in FIG. 8, a protective material 122 made of a photoresist is formed on the surface on the side where the reflective member is formed, and a mask 124 made of a photoresist is formed on the support substrate side. The mask 124 has an opening in a region corresponding to the light detection region 30. The support substrate 11 is dry-etched using this mask 124. For this dry etching, for example, a reaction gas such as _{SF 6 can be used.} In this dry etching, when a reaction gas having an etching selectivity between the silicon 11 and the oxide film 12 is used, the BOX can be used as the etching stop film. When the silicon support substrate 11 is sufficiently thick, back grinding and a polishing process such as CMP (Chemical Mechanical Polishing), or wet etching may be used in combination. When wet etching is used, KOH or TMAH (Tetra-methyl-ammonium hydroxide) can be used as the etchant. As a result, an opening 78 is formed in the support substrate 11, and the BOX 12 is exposed.

Next, as shown in FIG. 9, the exposed BOX 12 is removed by etching to expose a part of the n-type semiconductor layer 13, that is, a part corresponding to the photodetection region 30. Wet etching with hydrofluoric acid or the like can be used for this etching. By using such wet etching, it is possible to secure a sufficient etching selection ratio with silicon and selectively remove the exposed BOX 12.

Next, as shown in FIG. 10, a transparent electrode 80 is formed on the surface of the exposed n-type semiconductor layer 13. For example, ITO is used as the material of the electrode 80, and the electrode 80 is formed by, for example, sputtering. The electrode 80 is electrically connected to the through electrode 90. Subsequently, the photodetector 1 shown in FIG. 1 is completed by removing the protective material 122.

By forming the transparent electrode 80 on the surface of the n-type semiconductor layer 13 in this way, it becomes possible to take an electric potential as a common cathode of the photodetector elements 20a and 20b, and light is transmitted to this cathode via the penetrating electrode 90. A structure capable of applying a bias from the surface side of the detection elements 20a and 20b can be formed.

Further, according to the above manufacturing method, the light detection region 30 and the CMOS circuit region 40 provided with the n-type semiconductor layer 13 and the p ^{-semiconductor layer region 22 can be mixedly mounted using the SOI substrate 10.}

In the above manufacturing method, the through electrodes 90 are formed at the same time when the photodetectors 20a and 20b and the CMOS circuit are formed. However, the manufacturing order of the through electrodes 90 is not limited to this, and may be formed after the photodetector elements 20a and 20b and the CMOS circuit are formed.

Further, in the above manufacturing method, as shown in FIGS. 5 and 6, after forming the photodetector elements 20a and 20b and the peripheral region 40, an opening is formed and a reflection made of metal is formed on the ultra-thin insulating layers 77a and 77b. Members 24a and 24b are formed. However, as shown in FIG. 11, the reflective members 24a and 24b may be formed when the light detection region 30 and the peripheral region 40 are formed. At this time, silicid materials such as WSi, TiSi, CoSi, and NiSi can be used as the reflective members 24a and 24b. Further, it may be formed so as to be opened by using a via opening process in a general multi-layer wiring process and a barrier metal such as Ti or W is embedded in the opening.

Further, as shown in FIG. 12, the reflective members 24a and 24b form openings after forming the photodetector elements 20a and 20b and the peripheral region 40, and form an uneven shape by etching or irradiating the ultrathin insulating film itself with a laser. After that, the materials of the reflective members 24a and 24b may be filled.
The reflective members 24a and 24b can be formed by Au plating or Cu plating. Further, at least one metal element selected from Ag, Al, Au, Cu, Ni, Pt, Ti, Cr, W and the like may be formed by sputtering.

Next, with reference to FIG. 13, an active quenching circuit that enables the Geiger discharge of the photodetector 20 to be actively stopped will be described. FIG. 13 is a circuit diagram showing an example of an active quench circuit. An amplifier circuit that amplifies the signal at the anode end of the photodetector 20 by connecting the photodetector 20 operating in Geiger mode and the quenching resistor 27 in series and the reset transistor 130 for active quenching in parallel. 140 is connected. The amplifier circuit 140 includes a transistor 142 and a current source 144 connected in series with the transistor 142.

The output end of the amplifier circuit 140 is connected to the gate of the reset transistor 130. Further, the source of the reset transistor 130 is connected between the anode terminal of the photodetector 20 and the amplifier circuit 140. On the other hand, the drain of the reset transistor 130 is connected between the output terminal of the low-speed analog path and the quench resistor 27. As a means for reading out a high-speed analog signal, a capacitor 150 for removing a DC component by AC coupling is provided at the anode terminal of the photodetector element 20.

The amplifier circuit 140 amplifies the potential of the anode terminal of the photodetector 20 and outputs a power supply level signal via a high-speed digital path. The output from the amplifier circuit 140 is fed back to the gate of the reset transistor 130. As a result, the reset transistor 130 is driven to perform a reset operation. When the discharge operation is completed, the anode terminal of the photodetector 20 reaches the reset level, and the output of the amplifier circuit 140 also resets to the GND level. As a result, the reset can be performed faster than the discharge time constant due to the capacitance between the quench resistor 27 and the depletion layer of the photodetector 20.

According to the photodetector of the first embodiment configured in this way, light that is not absorbed by the thickness of the conventional depletion layer is reflected on the surface of the substrate (the surface opposite to the incident surface of the light). It is possible to increase the execution optical path length by reflecting it with a member, and it is possible to increase the light absorption rate.

Further, since the light is incident from the back surface of the substrate, the aperture ratio can be significantly improved without being affected by the quench resistance, the signal wiring, and the like, which are conventionally provided on the incident side and restrict the aperture ratio.

Further, since the formation of the reflective member and the thinning by polishing the substrate are different from the conventional structure, not only the device driving conditions but also new device design and process development are not required. Therefore, the reproducibility of the process is high, and there is no concern that the cost will be high, and the sensitivity in the near-infrared wavelength band can be significantly improved by increasing the absorption ratio and the aperture ratio.

In addition, the diode is formed by providing the reflective member not on the silicon surface on which the diode (photodetector) is formed, but on the region of the silicon layer on which the diode is formed via an extremely thin insulating film or the like. It is possible to avoid the occurrence of crystal defects in the silicon. Further, by using SOI for the substrate on which SiPM is formed, it is possible to enable mixed loading of vertical APD and CMOS.

As described above, according to the present embodiment, it is possible to provide a photodetector having high detection sensitivity of light in the near infrared wavelength band.

(Second Embodiment)
A cross section of the photodetector according to the second embodiment is shown in FIG.

In the first embodiment, the light detection region 30 and the CMOS circuit region (peripheral region) are formed on one SOI substrate.

In the photodetector 1A of the second embodiment, the photodetector region 30 is formed on the first substrate, the CMOS circuit 40 is formed on the second substrate, and then the first substrate and the second substrate are formed by the photodetector region 30. It has a structure in which the formed surface and the surface on which the CMOS circuit 40 is formed are bonded so as to face each other. Therefore, unlike the first embodiment, a substrate other than the SOI substrate can be used as the first substrate on which the light detection region 30 is formed. In this second embodiment, the n-type semiconductor layer 13A is used as the first substrate, and the p-type semiconductor layer 200 is used as the second substrate.

The photodetector 1A of the second embodiment has a plurality of photodetectors 20a and 20b.

The optical detection element 20a includes a part of the n-type semiconductor layer 13A, a p ⁺ semiconductor layer 21a ^{provided on the part of the n-type semiconductor layer 13A, a part of the p-} type semiconductor layer 22, and a p ^- type semiconductor layer 22. and ^{p +} semiconductor layer 23a provided on a portion of, ^{p +} and the light reflecting member 24a provided on the semiconductor layer 23a, a contact 25a which is provided on ^{p +} semiconductor layer 23a, wiring connected to the contact 25a A portion 26a and a quenching resistor 27a connected to the wiring portion 26a are provided. An impurity region (conductor region) 41 is provided on a part of ^{the p-} type semiconductor layer 22 provided with the photodetector 20a.

Further, the optical detection element 20b includes a part of the n-type semiconductor layer 13A, a p ⁺ semiconductor layer 21b ^{provided on the part of the n-type semiconductor layer 13A, a part of the p-} type semiconductor layer 22, and a p ^- type semiconductor. and ^{p +} semiconductor layer 23b provided on a portion of layer 22, and the light reflecting member 24b provided on the ^{p +} semiconductor layer 23b, and a contact 25b provided on ^{p +} semiconductor layer 23b, connected to the contact 25b It is provided with a wiring portion 26b to be connected and a quench resistor 27b connected to the wiring portion 26b. In this embodiment, the photodetectors 20a and 20b each form a vertical photodiode.

A transparent electrode 80 is provided on the side opposite to the side where the photodetector elements 20a and 20b are provided with respect to the n-type semiconductor layer 13A in the light detection region 30. The transparent electrode 80 is formed of an electrode material that transmits a target near-infrared ray (for example, a wavelength of 850 nm), for example, ITO (Indium Tin Oxide), and serves as a common electrode for a plurality of light detection elements 20a and 20b. Light enters the photodetector 1A from the side where the transparent electrode 80 is provided. These plurality of photodetector elements 20a and 20b are connected in parallel as in the first embodiment.

The quenching resistors 27a and 27b in the photodetection region 30 and the impurity region (conductor region) 41 provided on a part of ^{the p-semiconductor layer 22 are covered with the interlayer insulating film 72.}
Wiring 26a and 26b are provided on the interlayer insulating film 72 in the light detection region 30. ^{One end of the wiring 26a is connected to the p +} semiconductor layer 23a via the contact 25a provided in the interlayer insulating film 72, and the other end is connected to the quench resistor 27a via the contact 25c provided in the interlayer insulating film 72. do. ^{One end of the wiring 26b is connected to the p +} semiconductor layer 23b via the contact 25b provided in the interlayer insulating film 72, and the other end is connected to the quench resistor 27b via the contact 25d provided in the interlayer insulating film 72. do.

The wiring 46 is provided on the interlayer insulating film 72 in the peripheral region 40. The wiring 46 is connected to the impurity region 41 via the contact 42.

The wirings 26a and 26b and the wiring 46 in the light detection region 30 are covered with the interlayer insulating film 74. The interlayer insulating films 72 and 74 are provided with openings in the regions where the reflective members 24a and 24b of the photodetecting elements 20a and 20b are provided, and the reflective members 24a and 24b are exposed.
^{These reflective members 24a and 24b are provided on the p +} semiconductor layers 23a and 23b via thin insulating layers 77a and 77b, respectively.

Further, the interlayer insulating film 74 is provided with an opening. A pad 92 is provided in this opening. The pad 92 is connected to the through electrode 90.

As described above, the photodetectors 20a and 20b form vertical photodiodes. Therefore, the potential is applied at the upper and lower terminals of the photodetector elements 20a and 20b. The surface electrodes of the photodetectors 20a and 20b are connected to the anodes of the photodetectors 20a and 20b and the I / O terminals of the CMOS circuit. The back surface electrodes 80 corresponding to the cathodes of the photodetector elements 20a and 20b are separately formed. Here, a through electrode 90 is provided as wiring for making contact with the electrode 80, which will later become the cathode, and pulling it out to the surface. The end portion of the through electrode 90 is configured to be connected to the surface of the photodetector 1.

That is, the through electrode 90 is an electrode that penetrates the interlayer insulating film 72, the p ^- semiconductor layer 22, and the n-type semiconductor layer 13 and leads to the electrode 80. The through electrode 90 has a structure in which the circumference of the conductor is covered with an insulator, and the n-type semiconductor layer 13A and the p ^- type semiconductor layer 22 and the conductor of the through electrode 90 are electrically insulated by this insulator. Will be done.

On the other hand, the CMOS circuit is provided in the p-type semiconductor layer 200, and includes, for example, n-channel MOS transistors 250, 260, and 270.

The transistor 250 is provided on the source 252a and the drain 252b provided apart from the p-type semiconductor layer 200, the gate insulating film 254 provided between the source 252a and the drain 252b, and the gate insulating film 254. It includes a gate electrode 256.
The transistor 260 is provided on the source 262a and the drain 262b provided apart from the p-type semiconductor layer 200, the gate insulating film 264 provided between the source 262a and the drain 262b, and the gate insulating film 264. It includes a gate electrode 266. The transistor 270 is provided on the source 272a and the drain 272b provided apart from the p-type semiconductor layer 200, the gate insulating film 274 provided between the source 272a and the drain 272b, and the gate insulating film 274. It includes a gate electrode 276 and.

The transistors 260 and 270 are provided in the region of the p-type semiconductor layer 200 corresponding to the region in which the plurality of photodetector elements 20a and 20b are provided, and are detected by, for example, the plurality of photodetector elements 20a and 20b to read a signal. Configure a read circuit. The transistor 250 constitutes a processing circuit that processes a signal read by the reading circuit. The region where the transistor 250 is provided and the region where the transistors 260 and 270 are provided are separated by element separation 285a and 285b made of DIT. The element separations 285a and 285b may be formed so as to surround the transistors 260 and 270.

The transistors 250, 260 and 270 are covered with an insulating film 220. Wiring 280, 282, 284 and the like connected to the sources and drains of the transistors 250, 260 and 270 are provided on the insulating film 220. These wires are connected to the source and drain via the contacts provided in the insulating film 22.

Further, the p-type semiconductor layer 200 is provided with a through electrode 230. The through electrode 230 is provided in an opening penetrating the p-type semiconductor layer 200 and the insulating film 220, and the side surface of the opening is oxidized, and the side surface of the oxidized opening is formed by embedding the oxidized opening with a conductor such as metal. .. The through silicon via 230 is electrically connected to the wiring 284 provided on the insulating film 220.

The wiring 282 of the CMOS circuit 40 and the wiring 46 of the light detection region 30 are connected by the connection wiring 290a. Further, the wiring 284 connected to the through electrode 230 of the CMOS circuit 40 and the pad 92 connected to the through electrode 90 in the light detection region 30 are connected by the connection wiring 290b.

In the second embodiment configured in this way, as in the first embodiment, light that is not absorbed by the thickness of the conventional depletion layer is provided on the surface of the substrate (the surface opposite to the incident surface of the light). It is possible to increase the effective optical path length by reflecting it with a reflective member, and it is possible to increase the light absorption rate.

Further, since the light is incident from the back surface of the substrate, the aperture ratio can be significantly improved without being affected by the quench resistance, the signal wiring, and the like, which are conventionally provided on the incident side and restrict the aperture ratio.

Further, by using different substrates for the substrate on which the light detection region is formed and the substrate on which the CMOS circuit is formed, not only the device driving conditions but also new device design and process development are not required. Therefore, the reproducibility of the process is high, and there is no concern that the cost will be high, and the sensitivity in the near-infrared wavelength band can be significantly improved by increasing the absorption ratio and the aperture ratio.

In addition, the diode is formed by providing the reflective member not on the silicon surface on which the diode (photodetector) is formed, but on the region of the silicon layer on which the diode is formed via an extremely thin insulating film or the like. It is possible to avoid the occurrence of crystal defects in the silicon.

As described above, according to the second embodiment, it is possible to provide a photodetector having high detection sensitivity of light in the near infrared wavelength band.

(Third Embodiment)
A Laser Imaging Detection and Ranging device according to a third embodiment is shown in FIG. The lidar device of the third embodiment is a distance image sensing system that employs an optical flight time distance measurement method (Time of Flight) that measures the time it takes for a laser beam to make a round trip to a target and converts it into a distance. In-vehicle drive-applied to assist systems, remote sensing, etc.

As shown in FIG. 15, the lidar device of the third embodiment includes a light emitting unit and a light receiving unit. The floodlight unit takes out a laser beam oscillator 300 that oscillates the laser beam, a drive circuit 310 that drives the oscillated laser beam, a part of the driven laser beam as reference light, and mirrors the other laser beam. It includes an optical system 320 that irradiates the object 400 via the 340, and a scanning mirror controller 330 that controls the scanning mirror 340 to irradiate the object 400 with laser light.

The light receiving unit is detected by a photodetector 350 for reference light that detects the reference light extracted by the optical system 320, a photodetector 380 that receives the reflected light from the object 400, and a photodetector 350 for reference light. A distance measurement circuit (also called a TOF (Time Of Flight) circuit) 370 and a distance measurement circuit that measure the distance to the object 400 based on the referenced light and the reflected light detected by the photodetector 380. It includes an image recognition system 360 that recognizes an object as an image based on the result of distance measurement by 370. In the present embodiment, as the photodetector 350 for reference light and the photodetector 380, the photodetector of the first or second embodiment is used.

The photodetectors of the first and second embodiments show good sensitivity in the near infrared region. Therefore, the rider device of the third embodiment can be applied to a light source in a wavelength band invisible to humans, and can be used, for example, for obstacle detection for automobiles.

Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other embodiments, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, as well as in the scope of the invention described in the claims and the equivalent scope thereof.

1, 1A Photodetector 10 SOI substrate 11 Support substrate 12 Embedded insulating film (BOX)
13, 13A n-type semiconductor layer 20a, 20b Photodetector 21a, 21b p ⁺ semiconductor layer ^{22p −} type semiconductor layer (epitaxial layer)
23a, 23b p ⁺ semiconductor layer 24a, 24b Reflective member 25a, 25b, 25c, 25d Contact 26a, 26b Wiring 27a, 27b Quench resistance 29 Insulation film (element separation)
30 Photodetection area 40 Peripheral area (CMOS circuit area)
50 Transistor 52a Source 52b Drain 54 Gate insulating film 56 Gate electrode 60 Transistor 62a Source 62b Drain 64 Gate insulating film 66 Gate electrode 72 Interlayer insulating film 74 Interlayer insulating film 77a, 77b Insulation layer 78 Opening 80 Electrode (transparent electrode)
85a, 85b element separation (DTI)
90 through silicon via

Claims (10)

A semiconductor layer having a first surface and a second surface facing the first surface and including a first conductive type first semiconductor region and a second conductive type second semiconductor region provided on the first semiconductor region. A photodetector equipped with an avalanche photodiode
An element separation provided so as to surround the avalanche photodiode and penetrating the semiconductor layer,
A reflective member provided on the first region of the first surface of the semiconductor layer via an insulating layer, and
Of the semiconductor layers, wiring that electrically connects to a second region of the semiconductor layer provided with the reflective member, which is different from the first region of the first surface of the semiconductor layer.
Photodetector equipped with. The photodetector according to claim 1, further comprising a first electrode penetrating the first semiconductor region and the second semiconductor region, and providing an insulator around the first electrode. The claim that the photodetector element is provided on the second surface of the semiconductor layer and further includes a second electrode electrically connected to the first electrode and a resistor electrically connected to the wiring. 2. The photodetector according to 2. The photodetector according to any one of claims 1 to 3, wherein the photodetector and a CMOS circuit for processing a signal from the photodetector are mixedly mounted. The photodetector according to any one of claims 1 to 4, wherein light is incident from the second surface side of the semiconductor layer. The photodetector further includes a second conductive type third semiconductor region provided between the first semiconductor region and the second semiconductor region, and the second semiconductor region includes the third semiconductor region. Covering The photodetector according to any one of claims 1 to 5, wherein the impurity concentration is lower than that of the third semiconductor region. Claims 1 to 1, wherein the photodetector is provided in the first region of the first surface of the semiconductor layer and further includes a second conductive type fourth semiconductor region having a higher impurity concentration than the second semiconductor region. The photodetector according to any one of 6. The photodetector according to any one of claims 1 to 7, wherein the reflecting member includes a material that reflects light in a wavelength range from visible light to near infrared light. Between a substrate provided in a third region other than the region provided with the second electrode on the second surface of the semiconductor layer and the substrate and the third region on the second surface of the semiconductor layer. The photodetector according to any one of claims 3 to 8, further comprising an insulating film provided. A laser beam oscillator that oscillates laser light and
The drive circuit that drives the oscillated laser beam and
Scanning mirror and
An optical system that extracts a part of the laser light driven by the drive circuit as reference light and irradiates the object with other laser light through the scanning mirror.
A controller that controls the scanning mirror to irradiate the object with laser light.
A first photodetector that detects the reference light extracted by the optical system,
A second photodetector that receives the reflected light from the object,
A distance measurement circuit that measures the distance to the object based on the reference light detected by the first photodetector and the reflected light detected by the second photodetector.
An image recognition system that recognizes the object as an image based on the result of distance measurement by the distance measurement circuit.
The second photodetector is a lidar device which is the photodetector according to any one of claims 1 to 9.

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