JP2021093697A - Solid state image sensor and electronic apparatus - Google Patents

Abstract

To provide a solid state image sensor capable of accurately removing a power supply noise caused by fluctuation of power supply, and an electronic apparatus.SOLUTION: The solid state image sensor comprises a power supply unit, pixels, a DAC circuit, a comparator, and a noise cancel device. Each pixel outputs a pixel signal including a power supply noise signal generated by SH processing of sampling and holding the voltage of the power supply unit. The DAC circuit outputs a ramp signal. The comparator receives the pixel signal and the ramp signal. The noise cancel device is provided between the power supply unit and the DAC circuit and with the timing of the SH processing by the pixel, superimposes a noise cancel signal generated by SH processing the voltage of the power supply unit, onto the ramp signal.SELECTED DRAWING: Figure 1

Description

The present disclosure relates to a solid-state image sensor and an electronic device.

Conventionally, in a CIS (CMOS (Complementary Metal Oxide Semiconductor) Image Sensor) circuit that performs line scanning, power supply fluctuations propagated to vertical signal lines appear as horizontal stripes in an image because the magnitude differs for each line. The conventional DC circuit (DAC (digital to analog converter) Compensation) as a countermeasure against PSRR (Power Supply Rejection Ratio) is used to correct the power fluctuation as a component (AC component) in which the power is constantly shaking during the AD period. (See, for example, Patent Document 1).

Japanese Unexamined Patent Publication No. 2017-200151

However, in the prior art, for example, the DC component sampled and held (hereinafter referred to as SH processing) by a pixel reset transistor or the like cannot be corrected. For example, in the case of CDS (correlated double sampling) drive, the DC component obtained by SH processing of the reset transistor can be canceled by being similarly superimposed on the P phase and D phase, so that it does not appear as horizontal stripes in the image. However, in the DDS (Double Data Sampling) drive of signal level (D phase) look-ahead, there is a possibility that this DC component cannot be canceled.

Therefore, the present disclosure proposes a solid-state image sensor and an electronic device capable of removing noise caused by power supply fluctuation with high accuracy.

In order to solve the above problems, the solid-state image sensor according to the present disclosure includes a power supply unit, pixels, a DAC circuit, a comparator, and a noise canceling device. The pixel outputs a pixel signal including a power supply noise signal generated by SH processing that samples and holds the voltage of the power supply unit. The DAC circuit outputs a lamp signal. The pixel signal and the lamp signal are input to the comparator. The noise canceling device is provided between the power supply unit and the DAC circuit, and a noise canceling signal generated by SH processing the voltage of the power supply unit in accordance with the timing of the SH processing of the pixel is used as the lamp signal. Superimpose on.

It is a figure which shows the schematic structure example of the solid-state image sensor which concerns on embodiment. It is a figure which shows the circuit concept of a noise canceling apparatus. It is a figure which shows the circuit structure of the noise canceling apparatus. It is a figure which shows the operation example of a noise canceling apparatus. It is a figure which shows the operation example of a noise canceling apparatus. It is a figure which shows the operation example of a noise canceling apparatus. It is a figure which shows the operation example of a noise canceling apparatus. It is a figure which shows the operation example of a noise canceling apparatus. It is a figure which shows the other circuit configuration of the noise canceling apparatus. It is a figure which shows the other circuit configuration of the noise canceling apparatus. It is a block diagram which shows the schematic configuration example of the electronic device which mounted the solid-state image sensor which concerns on embodiment. It is a block diagram which shows the schematic structure example of the vehicle control system which is an example of the mobile body control system to which the technique which concerns on this disclosure can apply. It is a figure which shows the example of the installation position of the imaging unit. It is a figure which shows an example of the schematic structure of the endoscopic surgery system to which the technique (the present technique) which concerns on this disclosure can be applied. It is a block diagram which shows an example of the functional structure of the camera head and CCU shown in FIG.

Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In each of the following embodiments, the same parts are designated by the same reference numerals, so that duplicate description will be omitted.

Further, in the present specification and the drawings, a plurality of components having substantially the same functional configuration may be distinguished by adding different numbers after the same reference numerals. However, if it is not necessary to distinguish each of the plurality of components having substantially the same functional configuration, only the same reference numerals are given.

(Outline of solid-state image sensor according to the embodiment)
FIG. 1 is a diagram showing a schematic configuration example of a solid-state image sensor according to an embodiment.

As shown in FIG. 1, the solid-state image sensor S according to the embodiment includes a noise canceling device 1, a power supply unit 10, pixels 11, a DAC circuit 100, capacitors C3 and C4, a comparator CM1, and a constant current source. It is equipped with V2. The pixel 11 shown in FIG. 1 indicates one of a plurality of pixels arranged in two dimensions.

The noise canceling device 1 samples and holds the voltage of the power supply unit 10 (hereinafter referred to as S / H), converts the DC component into a current, adjusts the gain, and then superimposes the DC component on the lamp signal output by the DAC circuit 100. By inputting to the comparator CM1, noise caused by power fluctuation (hereinafter referred to as power supply noise) is removed (cancelled). The specific circuit configuration and operation example of the noise canceling device 1 will be described later.

The power supply unit 10 is a power supply that supplies electric power to the pixels 11 via the power supply line 10a.

Pixel 11 includes transistors t1 to t5 which are MOSFETs (Metal-Oxide-Semiconductor-Field-Effect-Transistor), and capacitors C1 and C2. Of the transistors t1 to t5, the transistors t1 to t3 are P channels, and the transistors t4 and t5 are N channels. Transistors t1 to t3 may have N channels.

The source of the transistor t1 is connected to the power supply line 10a of the power supply unit 10, and the drain is connected to the connection point of the source of the transistor t2, the capacitor C1 and the constant current source V1. The drain of the transistor t2 is connected to the drain of the transistor t3, the gate of the transistor t4, and the connection point of the capacitor C2. The source of the transistor t3 is connected to the power supply line 10a. In the transistor t4, the drain is connected to the power supply line and the source is connected to the drain of the transistor t5. The source of the transistor t5 is connected to the capacitor C3 and the constant current source V2.

The DAC circuit 100 inputs a ramp signal to the negative input terminal of the comparator CM1. This lamp signal functions as a reference signal for A / D (Analog to Digital) conversion of the pixel signal output from the pixel 11. The DAC circuit 100 includes, for example, a constant voltage source V3 such as a Band Gap Reference, transistors t100 to t106, resistors R100 and R101, and an amplifier AMP1. Of the transistors t100 to t105, the transistors t100, t101, t104, and t105 are P channels, and the transistors t102, t103, and t106 are N channels.

In the transistor t100, the source is connected to a predetermined power supply line, and the drain is connected to the drain of the transistor t106. In the amplifier AMP1, the constant voltage source V3 is connected to the input terminal on the positive side, and one end of the resistor R100 and the source of the transistor t106 are connected to the negative side. Further, in the transistor t101, the source is connected to a predetermined power supply line, the drain is connected to the drain of the transistor t102, and the transistor t101 is connected between its own gate and the gate of the transistor t103. The source of the transistor t102 is connected to the ground wire. The transistor t103 has a source connected to a ground wire, a drain connected to the drain of the transistor t104, and a connection between the gate of the transistor t104 and the gate of the transistor t105. The source of the transistor t104 is connected to a predetermined power supply line. In the transistor t105, the source is connected to a predetermined power supply line, and the drain is connected between the comparator CM1 and the resistor R101.

The comparator CM1 inputs a positive input terminal (hereinafter referred to as a positive terminal) into which a pixel signal is input from the pixel 11 and a signal in which the noise canceling signal of the noise canceling device 1 is superimposed on the lamp signal of the DAC circuit 100. It has a negative input terminal (hereinafter referred to as a negative terminal).

That is, a pixel signal including power supply noise is input to the positive terminal of the comparator CM1, and a lamp signal on which the same signal as the power supply noise generated by the noise canceling device 1 is superimposed is input to the negative terminal. As a result, in the comparator CM, the power supply noise included in the pixel signal is canceled in phase.

Next, the circuit concept of the noise canceling device 1 will be described with reference to FIG. FIG. 2 is a diagram showing a circuit concept of the noise canceling device 1. In the circuit concept shown in FIG. 2, the noise canceling device 1 includes transistors t10 and t11, capacitors C10 and C11, switches S1 and S2, current sources V4 to V6, and a logic circuit 50.

The source of the transistor t10 (first transistor) is connected to the power supply line 10a, and the drain is connected to one end of the capacitor C10 (first capacitor) and the current source V4. That is, the transistor t10 and the capacitor C10 are connected in series. The other end of the capacitor C10 is connected to the ground. The source of the transistor t11 (second transistor) is connected to the power supply line 10a, and the drain is connected to one end of the capacitor C11 (second capacitor) and the current source V6. That is, the transistor t11 and the capacitor C11 are connected in series. The other end of the capacitor C11 is connected to the ground.

The current source V4 is connected to the positive terminal of the logic circuit 50 via the switch S1 and inputs the SH current (first current) described later to the logic circuit 50. The current source V5 is connected to the positive terminal of the logic circuit 50, and an offset current (third current) described later is input to the logic circuit 50. The current source V6 is connected to the negative terminal of the logic circuit 50, and a reference current (second current) described later is input to the logic circuit 50.

As shown in FIG. 2, an SH current is supplied from the current source V4 and an offset current is supplied from the current source V5 to the positive terminal of the logic circuit 50, and a reference current is supplied from the current source V6 to the negative terminal.

Then, the logic circuit 50 adjusts the gain of the current signal according to the result of the logical operation and outputs it as a noise canceling signal.

Next, a circuit configuration example and an operation example of the noise canceling apparatus 1 will be specifically described with reference to FIGS. 3 to 8.

First, the circuit configuration of the noise canceling device 1 will be described with reference to FIG. FIG. 3 is a diagram showing a circuit configuration of the noise canceling device 1. As shown in FIG. 3, the noise canceling device 1 includes transistors t10 to t56, capacitors C10 to C12, resistors R1 to R2, and amplifiers AMP2 and AMP3.

Then, these elements constitute an SH current generation unit 2, a cascode voltage generation unit 3a and 3b, a reference current generation unit 4, an offset current generation unit 5, and a gain adjustment unit 6.

The SH current generation unit 2 includes transistors t10, t12 to t15, a capacitor C10, a resistor R1, and an amplifier AMP2, and generates an SH current. The method of generating the SH current will be described later with reference to FIGS. 5 to 8.

The source of the transistor t12 is connected to the power supply line 10a, and the drain is connected to the source of the transistor t10. The drain of the transistor t10 is connected to one end of the capacitor C10 and the positive terminal (input terminal) of the amplifier AMP2. The other end of the capacitor C10 is connected to the ground wire GND. The negative terminal (input terminal) of the amplifier AMP2 is connected between the resistor R and the source of the transistor t13, and the output terminal is connected to the gate of the transistor t13.

The drain of the transistor t13 is connected to the drain of the transistor t14. Further, the drain of the transistor t13 is connected between the gates of the transistor t15 and the transistor t19. In the transistor t14, the source is connected to the drain of the transistor t15, and the gate is connected to the gate of the transistor t20.

The cascode voltage generation unit 3a includes transistors t16 to t18 and generates a cascode voltage. In the transistor t16, the source is connected to a predetermined power supply line, and the drain is connected to the drain of the transistor t17 and the gate of the transistors t14 and t20. Further, in the transistor t16, the gate and the drain are connected. The source of the transistor t17 is connected to the ground wire GND, and the gate is connected to the gate of the transistor t18. The source of the transistor t18 is connected to the ground wire GND. Further, the source and the gate of the transistor t18 are connected to each other, and a bias current is supplied.

The cascode voltage generation unit 3b includes transistors t49 to t51 and generates a cascode voltage. In the transistor t49, the source is connected to a predetermined power supply line, and the drain is connected to the drain of the transistor t50 and the gate of the transistors t41 and t53. Further, in the transistor t49, the gate and the drain are connected. The source of the transistor t50 is connected to the ground wire GND, and the gate is connected to the gate of the transistor t51. The source of the transistor t51 is connected to the ground wire GND. Further, the source and the gate of the transistor t51 are connected to each other, and a bias current is supplied.

The reference current generation unit 4 includes transistors t11, t52 to t56, capacitors C11 and C12, resistors R2 and R3, and an amplifier AMP3 to generate a reference current. The method of generating the reference current will be described later with reference to FIGS. 5 to 8.

One end of the resistor R3 is connected to the power supply line 10a, and the other end is connected to the source of the transistor t56 and one end of the capacitor C12. The other end of the capacitor C12 is connected to the ground wire GND. In the transistor t56, the gate is connected to the gate of the transistor t55, and the drain is connected between the transistor t55 and the transistor t11. The resistor R3, the capacitor C12, and the transistor t55 may be omitted.

The source of the transistor t55 is connected to the power supply line 10a, and the drain is connected to the source of the transistor t11. The drain of the transistor t11 is connected to one end of the capacitor C11 and the positive terminal (input terminal) of the amplifier AMP3. The other end of the capacitor C11 is connected to the ground wire GND. The negative terminal (input terminal) of the amplifier AMP3 is connected between the resistor R and the source of the transistor t54, and the output terminal is connected to the gate of the transistor t54.

In the transistor t54, the source is connected to one end of the resistor R2, and the drain is connected to the drain of the transistor t53. Further, the drain of the transistor t54 is connected between the gates of the transistor t52 and the transistor t40. The other end of the resistor R2 is connected to the ground wire GND. In the transistor t53, the source is connected to the drain of the transistor t52, and the gate is connected to the gate of each of the transistor t41 and the transistor t43. In the transistor t52, the source is connected to a predetermined power supply line, and the gate is connected to the gate of each of the transistor t40 and the transistor t42.

The offset current generation unit 5 includes transistors t36 to t39 and generates an offset current. The method of generating the offset current will be described later with reference to FIGS. 5 to 8. In the transistor t36, the drain is connected to the transistor t45, the transistor t27 and the transistor t30, the source is connected to the drain of the transistor t37, and the gate is connected to the gate of the transistor t38. The source of the transistor t37 is connected to the ground wire GND, and the gate is connected to the gate of the transistor t39. The transistor t38 has a drain connected to the transistor t41 and is connected between its own gate and the gate of the transistor t36. The transistor t39 has a drain connected to the transistor t38 and is connected between its own gate and the gate of the transistor t37. Further, the source of the transistor t39 is connected to the ground wire GND.

The gain adjusting unit 6 includes transistors t29 to t32, t34, and t35, and adjusts the gain of the combined current generated by the SH current generating unit 2, the reference current generating unit 4, and the offset current generating unit 5. It is output to the DAC circuit 100 as a noise canceling signal.

The source of the transistor t29 is connected to a predetermined power supply line, and the drain is connected to its own gate and the source of the transistor t30. The drain of the transistor t30 is connected to its own gate and the transistor t27, the transistor t36 and the transistor t45. In the transistor t31, the gate is connected to the gate of the transistor t29, the source is connected to a predetermined power supply line, and the drain is connected to the source of the transistor t32. In the transistor t32, the gate is connected to the gate of the transistor t30, and the drain is connected to the DAC circuit 100 (between the comparator CM1 and the comparator CM1). In the transistor t34, the source is connected to a predetermined power supply line, the gate is connected to the gate of the transistor t29, and the drain is connected to the source of the transistor t35. In the transistor t35, the gate is connected to the transistor t30 and the drain is connected to a predetermined monitor circuit.

In the transistor t19, the source is connected to a predetermined power supply line, the gate is connected to the gate of the transistor t15, and the drain is connected to the source of the transistor t20. In the transistor t20, the gate is connected to the gate of the transistor t14, and the drain is connected to the source of the transistor t21 and the source of the transistor t22. The drain of the transistor t21 is connected to the gate and drain of the transistor t23. The source of the transistor t23 is connected to the gate and drain of the transistor t24. The source of the transistor t24 is connected to the ground wire GND. The drain of the transistor t22 is connected to the gate and drain of the transistor t25. In the transistor t25, the gate is connected to the transistor t27, and the source is connected to the drain and the gate of the transistor t26. In the transistor t26, the gate is connected to the gate of the transistor t28, and the source is connected to the ground line GND. In the transistor t27, the drain is connected to the drain and the gate of the transistor t30, and the source is connected to the drain of the transistor t28. The source of the transistor t28 is connected to the ground wire GND.

In the transistor t42, the source is connected to a predetermined power supply line, the gate is connected to the gate of the transistor t52, and the drain is connected to the source of the transistor t43. In the transistor t43, the gate is connected to the gate of the transistor t53, and the drain is connected to the source of the transistor t45 and the source of the transistor t46. The drain of the transistor t46 is connected to the gate and drain of the transistor t47. The source of transistor t47 is connected to the gate and drain of transistor t48. The source of the transistor t48 is connected to the ground wire GND. The drain of the transistor t45 is connected between the transistor t27 and the transistor t30.

Next, an operation example of the noise canceling device 1 will be described with reference to FIGS. 4 to 8. 4 to 8 are diagrams showing an operation example of the noise canceling device 1. FIG. 4 shows a timing chart of the transistors t10, t11, t22, t45, t21, and t46 of the noise canceling device 1. As shown in FIG. 4, the noise canceling device 1 switches ON / OFF of the transistors t10, t11, t22, t45, t21, and t46 according to the following four modes (1) to (4).

(1) Reference voltage detection mode (2) Offset mode (3) SH voltage detection mode (4) Difference detection mode

(1) The reference voltage detection mode is a mode that operates at the timing when the charges of all the pixels are reset all at once. Specifically, in the reference voltage detection mode, the noise canceling device 1 generates a reference current by performing SH processing on the voltage of the power supply unit 10.

FIG. 5 shows an operation example in the reference voltage detection mode. As shown in FIG. 5, the noise canceling device 1 turns on the transistors t12, t55, t45 and t22 and turns off the transistors t10, t21, t46 and t56 in the reference voltage detection mode. Then, the noise canceling device 1 switches the transistor t11 from off to on in accordance with the timing when the charges of all the pixels are reset all at once, that is, the timing when each pixel 11 performs SH processing, and the voltage of the power supply unit 10 is changed. It is held (sampled) in the capacitor C11. Then, the noise canceling device 1 switches the transistor t11 from on to off after the voltage holding by the capacitor C11 is completed. As a result, the voltage indicating the power supply noise of the power supply unit 10 is held by the capacitor C11, the voltage is applied to the amplifier AMP3, and the reference current flows on the output terminal side.

Next, (2) the offset mode is a mode that operates at the timing when the D phase read is performed. Specifically, the noise canceling device 1 generates an offset current based on the reference current.

FIG. 6 shows an operation example in the offset mode. As shown in FIG. 6, the noise canceling device 1 turns on the transistors t12, t21, t46, and t55 and turns off the transistors t10, t22, t45, t11, and t56 in the offset mode. As a result, the reference current flowing through the transistors t52, t53, and t54 is copied to the transistors t42 and t43 by the current mirror circuit and flows through the transistors t46, t47, and t48. Further, the reference current flowing through the transistors t52, t53, and t54 is copied to the transistors t40 and t41 by the current mirror circuit and flows to the transistors t38 and t39. Then, the reference current flowing through the transistors t38 and t39 flows through the transistors t36 and t37 by the current mirror circuit. Then, the number of connections of the transistors t36 and t37 is adjusted so that the reference current becomes a predetermined current value. As a result, the reference current is converted into an offset current which is a predetermined current value. Then, the generated offset current is output to the DAC circuit 100 via the gain adjusting unit 6.

Next, (3) the SH voltage detection mode is a mode that operates at the timing when the charge of the pixel in each row is reset. Specifically, in the SH voltage detection mode, the noise canceling device 1 SH-processes the voltage of the power supply unit 10 and generates an SH current.

FIG. 7 shows an operation example in the SH voltage detection mode. As shown in FIG. 7, the noise canceling device 1 turns on the transistors t12, t55, t21, and t46 and turns off the transistors t22, t45, t11, and t56 in the SH voltage mode. Then, the noise canceling device 1 switches the transistor t10 from off to on in accordance with the timing at which the charge of the pixel in each row is reset, that is, the timing at which each pixel performs SH processing, and the voltage of the power supply unit 10 is made into a capacitor. Hold (sampling) at C10. Then, the noise canceling device 1 switches the transistor t10 from on to off after the voltage holding by the capacitor C10 is completed. As a result, the voltage indicating the power supply noise of the power supply unit 10 is held by the capacitor C10, the voltage is applied to the amplifier AMP2, and the SH current flows on the output terminal side.

Next, (4) the difference detection mode is a mode that operates at the timing when the P phase is read out. Specifically, in the difference detection mode, the noise canceling device 1 generates a difference current between the generated SH current and the reference current, that is, a noise canceling signal.

FIG. 8 shows an operation example in the difference detection mode. As shown in FIG. 8, the noise canceling device 1 turns on the transistors t12, t22, t45 and t55 and turns off the transistors t10, t21, t46, t11 and t56 in the difference detection mode. As a result, the SH current flowing through the transistors t15, t14, and t13 is copied to the transistors t19 and t20 by the current mirror circuit and flows through the transistors t22, t25, and t26. Then, the SH current flowing through the transistors t25 and t26 is copied to the transistors t27 and t28 by the current mirror circuit. As a result, the SH current flows through the gain adjusting unit 6.

Further, the reference current flowing through the transistors t52 and t53 is copied to the transistors t42 and t43 by the current mirror circuit and flows through the transistors t45. As a result, a reference current flows through the gain adjusting unit 6.

Further, as described above, since the offset current flows through the gain adjusting unit 6, an SH current-reference current + offset current = noise canceling signal flows, and the gain is obtained by switching the number of connections of the transistors t31 and t32. After adjustment, it is output to the DAC circuit 100.

As a result, a noise canceling signal including power supply noise is output from the gain adjusting unit 6, superimposed on the lamp signal of the DAC circuit 100, and input to the negative terminal of the comparator CM1 (see FIG. 1). Then, by inputting a pixel signal including power supply noise to the positive terminal of the comparator CM1, the power supply noise is canceled as in-phase noise in the comparator CM1.

The circuit configuration of the noise canceling device 1 shown in FIG. 3 is an example, and may be another circuit configuration as shown in FIGS. 9 and 10, for example.

9 and 10 are diagrams showing another circuit configuration of the noise canceling device 1.

For example, the noise canceling device 1 shown in FIG. 9 has a circuit configuration without amplifiers AMP2 and AMP3 (see FIG. 3) as compared with the circuit configuration shown in FIG. That is, as shown in FIG. 9, in the transistor t10, the drain is directly connected to the gate of the transistor t13. Further, in the transistor t11, the drain is directly connected to the gate of the transistor t54.

As described above, by omitting the amplifiers AMP2 and AMP3, the circuit area can be reduced and the power consumption of the circuit can be reduced.

Further, for example, in the noise canceling device 1 shown in FIG. 10, the SH current generation unit 2 and the reference current generation unit 4 (see FIG. 3) are standardized as compared with the circuit configuration shown in FIG. That is, in FIG. 3, the SH current generation unit 2 and the reference current generation unit 4 are connected to the power supply line 10a, so that the voltage of the power supply unit 10 is input from two locations. , There is one place where the voltage from the power supply unit 10 is input.

Specifically, in the noise canceling device 1 shown in FIG. 10, the source of the transistor t100 is connected to the power supply line 10a. The transistor t102 shown in FIG. 10 corresponds to the transistor t10 shown in FIG. 3, and the transistor t113 shown in FIG. 9 and the transistor t102 correspond to the transistor t11 shown in FIG. Further, the capacitor C101 shown in FIG. 10 corresponds to the capacitor C11 shown in FIG. The resistor R100, the capacitor C100, and the transistors t101 and t100 may be omitted.

An operation example of the circuit shown in FIG. 10 will be described.

First, in the reference voltage detection mode, the transistors t100, are turned on, and the transistors t101 and t116 are turned off. Then, the noise canceling device 1 switches the transistor t102 and the transistor t113 from off to on in accordance with the timing at which each pixel 11 performs SH processing, and samples the voltage of the power supply unit 10.

In this case, the sampled voltage is held by the capacitor C101, so that the reference current flows through the transistors t104 and t103. Then, the reference current flowing through the transistors t104 and t103 is copied to the transistors t109 to t112 by the current mirror circuit. Then, since the transistor t113 is turned on, as a result, the voltage is held in the capacitor C102. Then, when the holding of the voltage by the capacitor C102 is completed, the transistors t102 and t113 are switched from on to off.

Subsequently, in the offset mode, the reference current flowing through the transistors t111 and t112 in the reference voltage detection mode flows through the transistors t117 and t118 by the current mirror circuit. Then, the reference current is converted into a current value corresponding to the number of connections of the transistors t117 and t118, so that an offset current is generated.

Subsequently, in the SH voltage detection mode, the transistors t100 and t116 are turned on and the transistors t113 are turned off. Then, the noise canceling device 1 switches the transistor t102 from off to on according to the timing at which each pixel performs SH processing, samples the voltage of the power supply unit 10, and holds it in the capacitor C101. As a result, SH current flows through the transistors t103 and t104. Then, the SH current flowing through the transistors t103 and t104 flows through the transistors t114, t115 and t116 by the current mirror circuit. As a result, the SH current-reference current + offset current = noise canceling signal flows through the transistors t119 and t120, which are the gain adjusting units 6.

In this way, by inputting the voltage from the power supply unit 10 at one place, the circuit area can be reduced and the power consumption of the circuit can be reduced.

In the circuit configuration shown in FIG. 10, the amplifier AMP100 may be omitted.

Next, a configuration example of the electronic device 1000 having the solid-state image sensor S according to the embodiment will be described with reference to FIG. FIG. 11 is a block diagram showing a schematic configuration example of an electronic device 1000 equipped with the solid-state image sensor S according to the embodiment.

As shown in FIG. 11, the electronic device 1000 includes, for example, an image pickup lens 1010, a solid-state image pickup element S, a storage unit 1030, and a processor 1020.

The image pickup lens 1010 is an example of an optical system that collects incident light and forms an image on the light receiving surface of the solid-state image sensor S. The light receiving surface may be a surface on which the photoelectric conversion elements in the solid-state image sensor S are arranged. The solid-state image sensor S photoelectrically converts the incident light to generate image data. Further, the solid-state image sensor S executes predetermined signal processing such as noise removal and white balance adjustment on the generated image data.

The storage unit 1030 is composed of, for example, a flash memory, a DRAM (Dynamic Random Access Memory), a SRAM (Static Random Access Memory), or the like, and records image data or the like input from the solid-state image sensor S.

The processor 1020 may include, for example, an application processor configured by using a CPU (Central Processing Unit) or the like and executing an operating system, various application software, or the like, a GPU (Graphics Processing Unit), a baseband processor, or the like. The processor 1020 executes various processes as necessary for the image data input from the solid-state image sensor S, the image data read from the storage unit 1030, and the like, executes display to the user, and performs a predetermined network. It is sent to the outside via.

(Example of application to mobile)
The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure is realized as a device mounted on a moving body of any kind such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, and a robot. You may.

FIG. 12 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technique according to the present disclosure can be applied.

The vehicle control system 12000 includes a plurality of electronic control units connected via the communication network 12001. In the example shown in FIG. 12, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside information detection unit 12030, an in-vehicle information detection unit 12040, and an integrated control unit 12050. Further, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, an audio image output unit 12052, and an in-vehicle network I / F (Interface) 12053 are shown.

The drive system control unit 12010 controls the operation of the device related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 provides a driving force generator for generating the driving force of the vehicle such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting the driving force to the wheels, and a steering angle of the vehicle. It functions as a control device such as a steering mechanism for adjusting and a braking device for generating a braking force of a vehicle.

The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a keyless entry system, a smart key system, a power window device, or a control device for various lamps such as headlamps, back lamps, brake lamps, blinkers or fog lamps. In this case, the body system control unit 12020 may be input with radio waves transmitted from a portable device that substitutes for the key or signals of various switches. The body system control unit 12020 receives inputs of these radio waves or signals and controls a vehicle door lock device, a power window device, a lamp, and the like.

The vehicle exterior information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, the image pickup unit 12031 is connected to the vehicle exterior information detection unit 12030. The vehicle outside information detection unit 12030 causes the image pickup unit 12031 to capture an image of the outside of the vehicle and receives the captured image. The vehicle exterior information detection unit 12030 may perform object detection processing or distance detection processing such as a person, a vehicle, an obstacle, a sign, or a character on the road surface based on the received image.

The imaging unit 12031 is an optical sensor that receives light and outputs an electric signal according to the amount of the light received. The image pickup unit 12031 can output an electric signal as an image or can output it as distance measurement information. Further, the light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

The in-vehicle information detection unit 12040 detects information in the vehicle. For example, a driver state detection unit 12041 that detects the driver's state is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 determines the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041. It may be calculated, or it may be determined whether the driver is dozing.

The microcomputer 12051 calculates the control target value of the driving force generator, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and the drive system control unit. A control command can be output to 12010. For example, the microcomputer 12051 realizes ADAS (Advanced Driver Assistance System) functions including vehicle collision avoidance or impact mitigation, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane deviation warning, and the like. It is possible to perform cooperative control for the purpose of.

Further, the microcomputer 12051 controls the driving force generator, the steering mechanism, the braking device, and the like based on the information around the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, so that the driver can control the driver. It is possible to perform coordinated control for the purpose of automatic driving, etc., which runs autonomously without depending on the operation.

Further, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the vehicle exterior information detection unit 12030. For example, the microcomputer 12051 controls the headlamps according to the position of the preceding vehicle or the oncoming vehicle detected by the external information detection unit 12030, and performs coordinated control for the purpose of anti-glare such as switching the high beam to the low beam. It can be carried out.

The audio-image output unit 12052 transmits an output signal of at least one of audio and an image to an output device capable of visually or audibly notifying the passenger of the vehicle or the outside of the vehicle. In the example of FIG. 12, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as output devices. The display unit 12062 may include, for example, at least one of an onboard display and a heads-up display.

FIG. 13 is a diagram showing an example of the installation position of the imaging unit 12031.

In FIG. 13, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

The imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as, for example, the front nose, side mirrors, rear bumpers, back doors, and the upper part of the windshield in the vehicle interior of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the upper part of the windshield in the vehicle interior mainly acquire an image in front of the vehicle 12100. The imaging units 12102 and 12103 provided in the side mirrors mainly acquire images of the side of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or the back door mainly acquires an image of the rear of the vehicle 12100. The imaging unit 12105 provided on the upper part of the windshield in the vehicle interior is mainly used for detecting a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.

Note that FIG. 13 shows an example of the photographing range of the imaging units 12101 to 12104. The imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, the imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and the imaging range 12114 indicates the imaging range of the imaging units 12102 and 12103. The imaging range of the imaging unit 12104 provided on the rear bumper or the back door is shown. For example, by superimposing the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 as viewed from above can be obtained.

At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image pickup units 12101 to 12104 may be a stereo camera composed of a plurality of image pickup elements, or may be an image pickup element having pixels for phase difference detection.

For example, the microcomputer 12051 has a distance to each three-dimensional object within the imaging range 12111 to 12114 based on the distance information obtained from the imaging units 12101 to 12104, and a temporal change of this distance (relative velocity with respect to the vehicle 12100). By obtaining, it is possible to extract as the preceding vehicle a three-dimensional object that is the closest three-dimensional object on the traveling path of the vehicle 12100 and that travels in substantially the same direction as the vehicle 12100 at a predetermined speed (for example, 0 km / h or more). it can. Further, the microcomputer 12051 can set an inter-vehicle distance to be secured in front of the preceding vehicle in advance, and can perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), and the like. In this way, it is possible to perform cooperative control for the purpose of automatic driving or the like in which the vehicle travels autonomously without depending on the operation of the driver.

For example, the microcomputer 12051 converts three-dimensional object data related to a three-dimensional object into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on the distance information obtained from the imaging units 12101 to 12104. It can be classified and extracted and used for automatic avoidance of obstacles. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that can be seen by the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines the collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or higher than the set value and there is a possibility of collision, the microcomputer 12051 via the audio speaker 12061 or the display unit 12062. By outputting an alarm to the driver and performing forced deceleration and avoidance steering via the drive system control unit 12010, driving support for collision avoidance can be provided.

At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured image of the imaging units 12101 to 12104. Such pedestrian recognition includes, for example, a procedure for extracting feature points in an image captured by an imaging unit 12101 to 12104 as an infrared camera, and pattern matching processing for a series of feature points indicating the outline of an object to determine whether or not the pedestrian is a pedestrian. It is done by the procedure to determine. When the microcomputer 12051 determines that a pedestrian is present in the captured images of the imaging units 12101 to 12104 and recognizes the pedestrian, the audio image output unit 12052 outputs a square contour line for emphasizing the recognized pedestrian. The display unit 12062 is controlled so as to superimpose and display. Further, the audio image output unit 12052 may control the display unit 12062 so as to display an icon or the like indicating a pedestrian at a desired position.

The example of the vehicle control system to which the technique according to the present disclosure can be applied has been described above. The technique according to the present disclosure can be applied to the imaging unit 12031 and the like among the configurations described above. By applying the technique according to the present disclosure to the imaging unit 12031, it is possible to obtain a photographed image that is easier to see, and thus it is possible to reduce driver fatigue.

(Example of application to endoscopic surgery system)
The technology according to the present disclosure (the present technology) can be applied to various products. For example, the techniques according to the present disclosure may be applied to endoscopic surgery systems.

FIG. 14 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technique according to the present disclosure (the present technique) can be applied.

FIG. 14 shows a surgeon (doctor) 11131 performing surgery on patient 11132 on patient bed 11133 using the endoscopic surgery system 11000. As shown, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical tools 11110 such as an abdominal tube 11111 and an energy treatment tool 11112, and a support arm device 11120 that supports the endoscope 11100. , A cart 11200 equipped with various devices for endoscopic surgery.

The endoscope 11100 is composed of a lens barrel 11101 in which a region having a predetermined length from the tip is inserted into the body cavity of the patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the illustrated example, the endoscope 11100 configured as a so-called rigid mirror having a rigid barrel 11101 is illustrated, but the endoscope 11100 may be configured as a so-called flexible mirror having a flexible barrel. Good.

An opening in which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and the light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101 to be an objective. It is irradiated toward the observation target in the body cavity of the patient 11132 through the lens. The endoscope 11100 may be a direct endoscope, a perspective mirror, or a side endoscope.

An optical system and an image pickup element are provided inside the camera head 11102, and the reflected light (observation light) from the observation target is focused on the image pickup element by the optical system. The observation light is photoelectrically converted by the image sensor, and an electric signal corresponding to the observation light, that is, an image signal corresponding to the observation image is generated. The image signal is transmitted to the camera control unit (CCU: Camera Control Unit) 11201 as RAW data.

The CCU11201 is composed of a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), and the like, and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Further, the CCU 11201 receives an image signal from the camera head 11102, and performs various image processing on the image signal for displaying an image based on the image signal, such as development processing (demosaic processing).

The display device 11202 displays an image based on the image signal processed by the CCU 11201 under the control of the CCU 11201.

The light source device 11203 is composed of, for example, a light source such as an LED (light emitting diode), and supplies irradiation light for photographing an operating part or the like to the endoscope 11100.

The input device 11204 is an input interface to the endoscopic surgery system 11000. The user can input various information and input instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) by the endoscope 11100.

The treatment tool control device 11205 controls the drive of the energy treatment tool 11112 for cauterizing, incising, sealing a blood vessel, or the like of a tissue. The pneumoperitoneum device 11206 uses a gas in the pneumoperitoneum tube 11111 to inflate the body cavity of the patient 11132 for the purpose of securing the field of view by the endoscope 11100 and securing the work space of the operator. To send. The recorder 11207 is a device capable of recording various information related to surgery. The printer 11208 is a device capable of printing various information related to surgery in various formats such as text, images, and graphs.

The light source device 11203 that supplies the irradiation light to the endoscope 11100 when photographing the surgical site can be composed of, for example, an LED, a laser light source, or a white light source composed of a combination thereof. When a white light source is configured by combining RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high accuracy. Therefore, the light source device 11203 adjusts the white balance of the captured image. It can be carried out. Further, in this case, the laser light from each of the RGB laser light sources is irradiated to the observation target in a time-divided manner, and the drive of the image sensor of the camera head 11102 is controlled in synchronization with the irradiation timing to support each of RGB. It is also possible to capture the image in a time-divided manner. According to this method, a color image can be obtained without providing a color filter on the image sensor.

Further, the drive of the light source device 11203 may be controlled so as to change the intensity of the output light at predetermined time intervals. By controlling the drive of the image sensor of the camera head 11102 in synchronization with the timing of changing the light intensity to acquire an image in a time-divided manner and synthesizing the image, so-called high dynamic without blackout and overexposure. Range images can be generated.

Further, the light source device 11203 may be configured to be able to supply light in a predetermined wavelength band corresponding to special light observation. In special light observation, for example, by utilizing the wavelength dependence of light absorption in body tissue to irradiate light in a narrow band as compared with the irradiation light (that is, white light) in normal observation, the surface layer of the mucous membrane. So-called narrow band imaging, in which a predetermined tissue such as a blood vessel is photographed with high contrast, is performed. Alternatively, in the special light observation, fluorescence observation may be performed in which an image is obtained by fluorescence generated by irradiating with excitation light. In fluorescence observation, the body tissue is irradiated with excitation light to observe the fluorescence from the body tissue (autofluorescence observation), or a reagent such as indocyanine green (ICG) is locally injected into the body tissue and the body tissue is injected. It is possible to obtain a fluorescence image by irradiating excitation light corresponding to the fluorescence wavelength of the reagent. The light source device 11203 may be configured to be capable of supplying narrow band light and / or excitation light corresponding to such special light observation.

FIG. 15 is a block diagram showing an example of the functional configuration of the camera head 11102 and CCU11201 shown in FIG.

The camera head 11102 includes a lens unit 11401, an imaging unit 11402, a driving unit 11403, a communication unit 11404, and a camera head control unit 11405. CCU11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and CCU11201 are communicatively connected to each other by a transmission cable 11400.

The lens unit 11401 is an optical system provided at a connection portion with the lens barrel 11101. The observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and incident on the lens unit 11401. The lens unit 11401 is configured by combining a plurality of lenses including a zoom lens and a focus lens.

The image sensor constituting the image pickup unit 11402 may be one (so-called single plate type) or a plurality (so-called multi-plate type). When the image pickup unit 11402 is composed of a multi-plate type, for example, each image pickup element may generate an image signal corresponding to each of RGB, and a color image may be obtained by synthesizing them. Alternatively, the image pickup unit 11402 may be configured to have a pair of image pickup elements for acquiring image signals for the right eye and the left eye corresponding to 3D (dimensional) display, respectively. The 3D display enables the operator 11131 to more accurately grasp the depth of the biological tissue in the surgical site. When the image pickup unit 11402 is composed of a multi-plate type, a plurality of lens units 11401 may be provided corresponding to each image pickup element.

Further, the imaging unit 11402 does not necessarily have to be provided on the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101 immediately after the objective lens.

The drive unit 11403 is composed of an actuator, and moves the zoom lens and the focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. As a result, the magnification and focus of the image captured by the imaging unit 11402 can be adjusted as appropriate.

The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU11201. The communication unit 11404 transmits the image signal obtained from the image pickup unit 11402 as RAW data to the CCU 11201 via the transmission cable 11400.

Further, the communication unit 11404 receives a control signal for controlling the drive of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes, for example, information to specify the frame rate of the captured image, information to specify the exposure value at the time of imaging, and / or information to specify the magnification and focus of the captured image, and the like. Contains information about the condition.

The above-mentioned imaging conditions such as frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of CCU11201 based on the acquired image signal. Good. In the latter case, the so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function are mounted on the endoscope 11100.

The camera head control unit 11405 controls the drive of the camera head 11102 based on the control signal from the CCU 11201 received via the communication unit 11404.

The communication unit 11411 is composed of a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

Further, the communication unit 11411 transmits a control signal for controlling the drive of the camera head 11102 to the camera head 11102. Image signals and control signals can be transmitted by telecommunications, optical communication, or the like.

The image processing unit 11412 performs various image processing on the image signal which is the RAW data transmitted from the camera head 11102.

The control unit 11413 performs various controls related to the imaging of the surgical site and the like by the endoscope 11100 and the display of the captured image obtained by the imaging of the surgical site and the like. For example, the control unit 11413 generates a control signal for controlling the drive of the camera head 11102.

Further, the control unit 11413 causes the display device 11202 to display the captured image in which the surgical unit or the like is reflected, based on the image signal processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image by using various image recognition techniques. For example, the control unit 11413 detects the shape, color, and the like of the edge of an object included in the captured image to remove surgical tools such as forceps, a specific biological part, bleeding, and mist when using the energy treatment tool 11112. Can be recognized. When displaying the captured image on the display device 11202, the control unit 11413 may superimpose and display various surgical support information on the image of the surgical unit by using the recognition result. By superimposing and displaying the surgical support information and presenting it to the surgeon 11131, it is possible to reduce the burden on the surgeon 11131 and to allow the surgeon 11131 to proceed with the surgery reliably.

The transmission cable 11400 connecting the camera head 11102 and CCU11201 is an electric signal cable corresponding to electric signal communication, an optical fiber corresponding to optical communication, or a composite cable thereof.

Here, in the illustrated example, the communication is performed by wire using the transmission cable 11400, but the communication between the camera head 11102 and the CCU11201 may be performed wirelessly.

The example of the endoscopic surgery system to which the technique according to the present disclosure can be applied has been described above. The technique according to the present disclosure can be applied to, for example, the image pickup unit 11402 of the camera head 11102 among the configurations described above. By applying the technique according to the present disclosure to the camera head 11102, a clearer surgical site image can be obtained, so that the operator can surely confirm the surgical site.

Although the endoscopic surgery system has been described here as an example, the technique according to the present disclosure may be applied to other, for example, a microscopic surgery system.

Although the embodiments of the present disclosure have been described above, the technical scope of the present disclosure is not limited to the above-described embodiments as they are, and various changes can be made without departing from the gist of the present disclosure. In addition, components covering different embodiments and modifications may be combined as appropriate.

<Summary>
As described above, according to one embodiment of the present disclosure, the solid-state image sensor S according to the present embodiment includes a power supply unit 10, pixels 11, a DAC circuit 100, a comparator CM1, and a noise canceling device 1. To be equipped. The pixel 11 outputs a pixel signal including a power supply noise signal generated by SH processing that samples and holds the voltage of the power supply unit 10. The DAC circuit 100 outputs a lamp signal. A pixel signal and a lamp signal are input to the comparator CM1. The noise canceling device 1 is provided between the power supply unit 10 and the DAC circuit 100, and uses a noise canceling signal generated by SH processing the voltage of the power supply unit 10 as a lamp signal in accordance with the SH processing timing of the pixel 11. Superimpose.

As a result, power supply noise caused by power supply fluctuation can be removed with high accuracy.

Although each embodiment of the present disclosure has been described above, the technical scope of the present disclosure is not limited to each of the above-described embodiments as it is, and various changes can be made without departing from the gist of the present disclosure. is there. In addition, components covering different embodiments and modifications may be combined as appropriate.

Further, the effects in each of the embodiments described in the present specification are merely examples and are not limited, and other effects may be obtained.

The present technology can also have the following configurations.
(1)
Power supply and
A pixel that outputs a pixel signal including a power supply noise signal generated by SH processing that samples and holds the voltage of the power supply unit, and a pixel that outputs a pixel signal.
A DAC circuit that outputs a lamp signal and
A comparator to which the pixel signal and the lamp signal are input, and
A noise canceling device provided between the power supply unit and the DAC circuit, which superimposes a noise canceling signal generated by SH processing the voltage of the power supply unit on the lamp signal in accordance with the timing of the SH processing of the pixel. When,
A solid-state image sensor.
(2)
The noise canceling device is
An SH current generating unit that generates a first current by performing the SH processing in accordance with the SH processing when resetting the charge of the pixel in units of rows.
It has a reference current generating unit that generates a second current by performing the SH processing in accordance with the SH processing when resetting the charges of all pixels at once.
The noise canceling device is
The solid-state image sensor according to (1), wherein a current obtained by subtracting the second current from the first current is output as the noise canceling signal.
(3)
The noise canceling device is
Further provided with an offset current generator for generating a third current,
The noise canceling device is
The solid-state image sensor according to (2), wherein the current obtained by subtracting the second current from the current obtained by adding the third current to the first current is output as the noise canceling signal.
(4)
The offset current generator
The third current is generated by copying the second current generated by the reference current generator by a current mirror circuit and adjusting the current value of the copied current by switching the number of connections. Solid-state image sensor.
(5)
The SH current generator
A first transistor connected to the power supply line of the power supply unit and a first capacitor connected in series with the first transistor are provided, and the SH processing timing of the pixel is adjusted to match the timing of the SH processing. The first transistor is turned on, the voltage of the power supply unit is held in the first capacitor, and the first current is generated based on the held voltage.
The reference current generator
A second transistor connected to the power supply line of the power supply unit and a second capacitor connected in series with the second transistor are provided, and the SH processing timing of the pixel is adjusted to match the timing of the SH processing of the pixel. Any one of (2) to (4) above, in which the second transistor is turned on, the voltage of the power supply unit is held in the second capacitor, and the second current is generated based on the held voltage. The solid-state image sensor according to.
(6)
The SH current generator
A first transistor connected to the power supply line of the power supply unit and a first capacitor connected in series with the first transistor are provided, and the SH processing timing of the pixel is adjusted to match the timing of the SH processing. The first transistor is turned on, the voltage of the power supply unit is held in the first capacitor, and the first current is generated based on the held voltage.
The reference current generator
A second transistor connected between the first transistor and the second capacitor and a second capacitor connected in series with the second transistor are provided, and the timing of the SH processing of the pixel is provided. The first transistor and the second transistor are turned on in accordance with the above, the voltage of the power supply unit is held in the second capacitor, and the second current is generated based on the held voltage. 2) The solid-state imaging device according to any one of (5).
(7)
The SH current generator and the reference current generator
The solid-state image sensor according to (5) or (6), further comprising an amplifier in which an input terminal is connected between the transistor connected in series and the capacitor.
(8)
Power supply and
A pixel that outputs a pixel signal generated by SH processing that samples and holds the voltage of the power supply unit, and
A DAC circuit that outputs a lamp signal and
A comparator to which the pixel signal and the lamp signal are input, and
A noise canceling device provided between the power supply unit and the DAC circuit, which superimposes a noise canceling signal generated by SH processing the voltage of the power supply unit on the lamp signal in accordance with the timing of the SH processing of the pixel. When,
Electronic equipment equipped with.

1 Noise canceling device 2 SH current generator 3a, 3b Cascode voltage generator 4 Reference current generator 5 Offset current generator 6 Gain adjustment unit 10 Power supply unit 10a Power supply line 11 pixels 50 Logic circuit 100 DAC circuit 1000 Electronic equipment S Solid-state imaging element

Claims (8)

Power supply and
A pixel that outputs a pixel signal including a power supply noise signal generated by SH processing that samples and holds the voltage of the power supply unit, and a pixel that outputs a pixel signal.
A DAC circuit that outputs a lamp signal and
A comparator to which the pixel signal and the lamp signal are input, and
A noise canceling device provided between the power supply unit and the DAC circuit, which superimposes a noise canceling signal generated by SH processing the voltage of the power supply unit on the lamp signal in accordance with the timing of the SH processing of the pixel. When,
A solid-state image sensor. The noise canceling device is
An SH current generating unit that generates a first current by performing the SH processing in accordance with the SH processing when resetting the charge of the pixel in units of rows.
It has a reference current generating unit that generates a second current by performing the SH processing in accordance with the SH processing when resetting the charges of all pixels at once.
The noise canceling device is
The solid-state image sensor according to claim 1, wherein a current obtained by subtracting the second current from the first current is output as the noise canceling signal. The noise canceling device is
Further provided with an offset current generator for generating a third current,
The noise canceling device is
The solid-state image sensor according to claim 2, wherein the current obtained by subtracting the second current from the current obtained by adding the third current to the first current is output as the noise canceling signal. The offset current generator
The third aspect of claim 3, wherein the second current generated by the reference current generator is copied by a current mirror circuit, and the current value of the copied current is adjusted by switching the number of connections to generate the third current. Solid-state image sensor. The SH current generator
A first transistor connected to the power supply line of the power supply unit and a first capacitor connected in series with the first transistor are provided, and the SH processing timing of the pixel is adjusted to match the timing of the SH processing. The first transistor is turned on, the voltage of the power supply unit is held in the first capacitor, and the first current is generated based on the held voltage.
The reference current generator
A second transistor connected to the power supply line of the power supply unit and a second capacitor connected in series with the second transistor are provided, and the SH processing timing of the pixel is adjusted to match the timing of the SH processing of the pixel. The solid-state image sensor according to claim 2, wherein the second transistor is turned on, the voltage of the power supply unit is held in the second capacitor, and the second current is generated based on the held voltage. The SH current generator
A first transistor connected to the power supply line of the power supply unit and a first capacitor connected in series with the first transistor are provided, and the SH processing timing of the pixel is adjusted to match the timing of the SH processing. The first transistor is turned on, the voltage of the power supply unit is held in the first capacitor, and the first current is generated based on the held voltage.
The reference current generator
A second transistor connected between the first transistor and the second capacitor and a second capacitor connected in series with the second transistor are provided, and at the timing of the SH processing of the pixel. At the same time, the first transistor and the second transistor are turned on, the voltage of the power supply unit is held in the second capacitor, and the second current is generated based on the held voltage. The solid-state imaging device according to. The SH current generator and the reference current generator
The solid-state image sensor according to claim 5, further comprising an amplifier in which an input terminal is connected between the transistor connected in series and the capacitor. Power supply and
A pixel that outputs a pixel signal including a power supply noise signal generated by SH processing that samples and holds the voltage of the power supply unit, and a pixel that outputs a pixel signal.
A DAC circuit that outputs a lamp signal and
A comparator to which the pixel signal and the lamp signal are input, and
A noise canceling device provided between the power supply unit and the DAC circuit, which superimposes a noise canceling signal generated by SH processing the voltage of the power supply unit on the lamp signal in accordance with the timing of the SH processing of the pixel. When,
Electronic equipment equipped with.

Images