JP2021093075A - Information processing apparatus, method for controlling the same, and program - Google Patents

Abstract

To provide an information processing apparatus that can reduce the time required for rebuild processing.SOLUTION: An image forming apparatus 100 performs mirroring for storing the same data in the same address in an SSD 114 and an SSD 119. The image forming apparatus 100 performs rebuild processing for copying the data stored in the SSD 114 to the SSD 119. In a result of comparison of pieces of data in the same address in the SSD 114 and the SSD 119 in reverse order of the addresses from a final writing address of the SSD 114 in the mirroring, the image forming apparatus 100 copies, to the SSD 119, data of addresses in which pieces of data do not match each other.SELECTED DRAWING: Figure 6

Description

The present invention relates to an information processing device, a control method thereof, and a program.

An image forming apparatus is known as an information processing apparatus including a plurality of storages. The image forming apparatus performs mirroring for writing the same data to the same address of two storages connected to the storage control device of the image forming apparatus in order to improve the fault tolerance. The storage includes a non-volatile flash memory and a volatile cache memory. The storage temporarily holds the data to be written in the cache memory having a write speed faster than that of the flash memory according to the write command received from the storage control device. As a result, the storage control device can instruct the writing of the next data without waiting for the completion of writing to the flash memory having a relatively slow writing speed. The data held in the cache memory is written to the non-volatile flash memory at an arbitrary timing so that the data is held even when the power of the image forming apparatus is turned off.

When the data identity between the two storages is broken in mirroring, the storage control device performs a rebuild process (see, for example, Patent Document 1). In the rebuild process, all the data stored in one of the two storages is duplicated in the other storage.

Japanese Unexamined Patent Publication No. 2017-138781

However, in the conventional rebuild process, all the data stored in the storage is the target of the process, so it takes a long time to complete the process.

An object of the present invention is to provide an information processing apparatus, a control method thereof, and a program capable of shortening the time required to execute a rebuild process.

In order to achieve the above object, the information processing apparatus of the present invention is an information processing apparatus including a plurality of storages including a volatile holding means and a non-volatile recording medium, and the plurality of information processing devices according to a received write command. A write control means for controlling each of the storages to hold the data indicated by the write command in the holding means and write the held data to the address indicated by the write command in the recording medium, and the plurality of storages. A rebuild control means that controls execution of a rebuild process that replicates data stored in the first storage in the storage to the second storage in the plurality of storages, and the same address in the first storage and the second storage. The rebuild control means includes the comparison means for comparing the data of the data, and the rebuild control means has the first write address in which the data was last written to the first storage by the write control means in the reverse order of the addresses by the comparison means. It is characterized in that the data of the address having a difference in the result of comparing the data of the same address in the storage of 1 and the data of the same address in the second storage is duplicated in the second storage.

According to the present invention, the time required to execute the rebuild process can be shortened.

It is a block diagram which shows schematic structure of the image forming apparatus as an information processing apparatus which concerns on embodiment of this invention. It is a figure for demonstrating the drop in voltage in each SSD due to the occurrence of momentary power interruption. It is a figure for demonstrating the writing of data in the SSD set in the master storage. It is a figure for demonstrating the writing of data in the SSD set in the slave storage. It is a flowchart which shows the procedure of the shutdown process in the image forming apparatus of FIG. It is a flowchart which shows the procedure of the rebuild control process executed by the mirroring control part of FIG.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the present embodiment, the case where the present invention is applied to an image forming apparatus as an information processing apparatus will be described, but the present invention is not limited to the image forming apparatus, and the present invention is applied to a communication device such as a PC that executes a rebuild process. The invention may be applied.

FIG. 1 is a block diagram schematically showing a configuration of an image forming apparatus 100 as an information processing apparatus according to an embodiment of the present invention. In FIG. 1, the image forming apparatus 100 includes a main controller 101, a network I / F 104, an operation display unit 105, a scanner unit 106, a printer unit 107, a mirroring controller 108, an instantaneous interruption detection unit 112, an SSD 114, and an SSD 119. The main controller 101 is connected to the network I / F 104, the operation display unit 105, the scanner unit 106, the printer unit 107, and the mirroring controller 108. The mirroring controller 108 is connected to the momentary interruption detection unit 112, the SSD 114, and the SSD 119 in addition to the main controller 101.

The image forming apparatus 100 performs an image forming process such as a printing process. The main controller 101 includes a CPU 102 and a storage unit 103. The CPU 102 controls the entire image forming apparatus 100. The storage unit 103 is composed of a ROM (not shown) and a RAM (not shown). The ROM inside the storage unit 103 stores an operation procedure for setting and controlling the image forming apparatus 100. The CPU 102 performs various controls by executing a control program expanded in the RAM inside the storage unit 103. The network I / F 104 performs data communication with an external device. The operation display unit 105 displays information about the image forming apparatus 100, and also receives a job execution instruction or the like from the user. The scanner unit 106 reads the placed document and generates image data. The printer unit 107 prints the image data acquired by the network I / F 104 from the external device and the image data generated by the scanner unit 106 on the paper.

The mirroring controller 108 includes a mirroring control unit 109, an address storage unit 110, and an instantaneous interruption storage unit 111. The mirroring controller 108 controls mirroring to write the same data to the same address of a plurality of connected storages, for example, two storages. In the present embodiment, as an example, a configuration in which mirroring is performed using two storages connected to the mirroring controller 108 will be described, but the present embodiment is not limited to this configuration. For example, mirroring may be performed using three or more storages connected to the mirroring controller 108.

SSD 114 and SSD 119 are connected to the mirroring controller 108. In the present embodiment, as an example, it is assumed that SSD 114 is set as the master storage and SSD 119 is set as the slave storage. The mirroring control unit 109 transmits a write command indicating the same address and the same data to the SSD 114 and the SSD 119. The mirroring control unit 109 controls the address of the data at the time of writing and reading to the SSD 114 and the SSD 119 by the logical address. The address storage unit 110 stores addresses indicating data writing destinations in SSD 114 and SSD 119. The momentary interruption storage unit 111 is a non-volatile storage unit, and stores the AC momentary interruption detection signal received from the instantaneous interruption detection unit 112. When the momentary interruption detection unit 112 detects the momentary interruption of the AC power supply supplied to the image forming apparatus 100, the instantaneous interruption detection unit 112 transmits an AC instantaneous interruption detection signal indicating this to the mirroring controller 108. The momentary interruption of the AC power supply supplied to the image forming apparatus 100 occurs, for example, when a power failure occurs or when the user inadvertently unplugs the power socket of the image forming apparatus 100 from the outlet. The momentary interruption capacitor 113 (instantaneous interruption countermeasure means) is a large-capacity capacitor and is connected to the power supply of the SSD 114 that functions as a master storage. In the present embodiment, the momentary interruption capacitor 113 is connected only to the power supply of the master storage among the power supply of the master storage and the power supply of the slave storage. Therefore, when the AC power supply supplied to the image forming apparatus 100 is momentarily interrupted, the voltage + Vssd2 in the slave storage in which the momentary interruption capacitor 113 is not connected to the power supply source is the solid line 201 of FIG. As shown in, it drops sharply. On the other hand, the voltage + Vssd1 in the master storage in which the momentary interruption capacitor 113 is connected to the power supply serving as the power supply source gradually decreases as shown by the dotted line 202 in FIG.

The SSD 114 includes an SSD controller 115 and a non-volatile flash memory 118 (recording medium), and functions as a master storage of the image forming apparatus 100. The SSD controller 115 includes an SSD control unit 116 and a volatile cache memory 117. The SSD control unit 116 controls to write data to the flash memory 118 according to a write command received from the mirroring control unit 109.

The SSD 119 includes an SSD controller 120 and a non-volatile flash memory 123 (recording medium), and functions as a slave storage of the image forming apparatus 100. The SSD controller 120 includes an SSD control unit 121 and a volatile cache memory 122. The SSD control unit 121 controls to write data to the flash memory 123 according to a write command received from the mirroring control unit 109.

FIG. 3 is a diagram for explaining the writing of data in the SSD 114 set in the master storage. When the SSD controller 115 of the SSD 114 receives a write command from the mirroring control unit 109, the SSD controller 115 of the SSD 114, for example, writes the data A to E of FIG. Temporarily hold at ~ 117e. As a result, the mirroring control unit 109 can instruct the next writing process without waiting for the completion of writing to the flash memory 118, which has a relatively slow writing speed. The data A to E held in the cache memory 117 are written to the non-volatile flash memory 118 at an arbitrary timing according to the address order. Specifically, the data A to E held in the cache memory 117 are written to the storage areas 118a to 118e corresponding to the addresses indicated by the write commands in the non-volatile flash memory 118, respectively. The arbitrary timing is, for example, the timing at which the image forming apparatus 100 is shut down.

FIG. 4 is a diagram for explaining the writing of data in the SSD 119 set in the slave storage. The mirroring control unit 109 transmits to the SSD 119 a write command indicating the same address and the same data as the write command transmitted to the SSD 114. The SSD controller 120 of the SSD 119 performs the same write control as the SSD controller 115 described above according to the write command received from the mirroring control unit 109 (see, for example, FIG. 4A). As a result, in the present embodiment, the same data is written to the same address in each flash memory of the master storage and the slave storage.

FIG. 5 is a flowchart showing a procedure of shutdown processing in the image forming apparatus 100 of FIG. In FIG. 5, the mirroring control unit 109 transmits a write command indicating the same address and the same data to the SSD 114 and SSD 119 (step S501), and stores the logical address indicated by this write command in the address storage unit 110. Next, when the shutdown instruction from the user is received, the main controller 101 starts the shutdown process (step S502). In the shutdown process, the mirroring control unit 109 does not set the momentary interruption detection flag described later. In the shutdown process, the main controller 101 ends the process in the middle before the power supply unit (not shown) of the image forming apparatus 100 is turned off. Next, the mirroring control unit 109 causes the master storage and the slave storage to write all the data held in the cache memory to the flash memory (step S503). Next, the main controller 101 turns off the power supply unit (not shown) of the image forming apparatus (step S504), and ends this process.

For example, when a momentary interruption of the power supply in the image forming apparatus 100 occurs during execution of the mirroring process, the voltage of the SSD 114 in which the momentary interruption capacitor 113 is connected to the power supply of the power supply source gradually decreases as described above. To do. Therefore, in the SSD 114, it is possible to secure a grace period for writing the data held in the cache memory 117 to the flash memory 118 before the voltage drops completely. As a result, it is possible to prevent the data held in the cache memory 117 from being lost due to the momentary interruption of the power supply. On the other hand, the voltage of the SSD 119 in which the momentary interruption capacitor 113 is not connected to the power supply of the power supply source drops sharply as described above. Therefore, in SSD 119, it is not possible to secure a grace period for writing the data held in the cache memory 122 to the flash memory 123 before the voltage drops completely. As a result, some of the data held in the cache memory 122, for example, as shown in FIG. 4B, is lost without being written to the flash memory 123. As a technique for duplicating lost data, the mirroring control unit 109 executes a rebuild process for replicating all the data stored in the master storage to the slave storage. However, if all the data stored in the master storage is targeted for processing, it will take a long time to complete the processing.

On the other hand, in the present embodiment, the data of the address having a difference in the result of comparing the data of the same address in the SSD 114 and the SSD 119 in the reverse order of the address from the last write address of the SSD 114 is duplicated in the SSD 119.

FIG. 6 is a flowchart showing a procedure of the rebuild control process executed by the mirroring control unit 109 of FIG. In the process of FIG. 6, it is premised that the mirroring process in which data is written to each flash memory of the master storage and the slave storage in the order of addresses is performed.

In FIG. 6, the mirroring control unit 109 transmits a write command indicating the same address and the same data to the SSD 114 and SSD 119 (step S601), and stores the logical address indicated by this write command in the address storage unit 110. When the mirroring control unit 109 detects a momentary power interruption in the image forming apparatus 100 based on the AC momentary interruption detection signal transmitted from the momentary interruption detection unit 112 (step S602), the momentary interruption storage unit 111 detects the AC momentary interruption. The signal is stored, and a momentary interruption detection flag indicating that the momentary interruption of the power supply in the image forming apparatus 100 is detected is set (step S603). When the momentary interruption of the power supply in the image forming apparatus 100 is restored and the power supply to the image forming apparatus 100 is restarted (step S604), the mirroring control unit 109 confirms the instantaneous interruption detection flag (step S605). When the momentary interruption detection flag is set, the mirroring control unit 109 starts the rebuild process of copying the data stored in the SSD 114, which is the master storage, to the SSD 119 (step S606). Next, the mirroring control unit 109 specifies the address last stored by the address storage unit 110, that is, the final write address which is the address to which the data last instructed to be written is written to the SSD 114 and the SSD 119 (the last write address). Step S607). Next, the mirroring control unit 109 compares the data stored in the storage area corresponding to the specified address in the SSD 114 and the SSD 119 (step S608). For example, in SSD 114, the data E stored in the storage area 118e of FIG. 3 of the flash memory 118 corresponding to the specified final write address, and in SSD 119, FIG. 4 (a) of the flash memory 123 corresponding to the final write address. Compare with the data E stored in the storage area 123e of. Next, the mirroring control unit 109 determines whether or not the data match in the comparison result (step S609). For example, as shown in FIG. 4B, in SSD 119, when the data E to be written to the final write address is lost due to the momentary interruption of the power supply, in step S609, the mirroring control unit 109 , It is determined that the data do not match in the comparison result.

As a result of the determination in step S609, when the data do not match in the comparison result, the mirroring control unit 109 replicates the data stored in the storage area corresponding to the specified address in the SSD 114 to the SSD 119 (step S610). ). In step S610, the mirroring control unit 109 causes the data to be written in the storage area corresponding to the specified address in SSD 119. Next, the mirroring control unit 109 identifies the address immediately before the specified address (step S611), and returns to the process of step S608. In this way, the mirroring control unit 109 duplicates the data of the addresses where the data does not match in the result of comparing the data from the last write address in the reverse order of the addresses to the SSD 119.

As a result of the determination in step S609, when the data match in the comparison result, the mirroring control unit 109 ends the rebuild process (step S612). If the data match in the comparison results, it means that the data at the specified address in the slave storage has not been lost due to the occurrence of a momentary power interruption. Further, in the present embodiment, since the data is written to each flash memory of the master storage and the slave storage in the order of the addresses, the data of the specified address is lost due to the occurrence of the momentary power interruption. If not, it means that the data of the address before the address is not lost due to the momentary power interruption. Therefore, in the present embodiment, if the data match in the comparison results so that the rebuild process is continued and unnecessary duplication process of the data that has not been lost is not performed, the mirroring control unit 109 ends the rebuild process. After that, the mirroring control unit 109 ends this process.

According to the above-described embodiment, the data at the address where the data does not match in the result of comparing the data of the same address in the SSD 114 and the SSD 119 in the reverse order of the address from the last write address of the SSD 114 is duplicated in the SSD 119. As a result, the target of the process in the rebuild process can be narrowed down to the minimum data that needs to be duplicated, and thus the time required to execute the rebuild process can be shortened.

Further, in the above-described embodiment, if there is no difference in the results of comparing the data of the same address in SSD 114 and SSD 119 in the reverse order of the address from the last write address, the rebuild process ends. As a result, it is possible to suppress the execution of the duplication process of the data that has not been lost.

In the above-described embodiment, the instantaneous interruption capacitor 113 that suppresses a sudden drop in the voltage of the SSD 114 due to the occurrence of the instantaneous interruption of the power supply in the image forming apparatus 100 is connected to the power supply of the SSD 114 that is the master storage. As a result, the lost data can be efficiently duplicated in the SSD 119 in a configuration in which the risk of data loss in the slave storage SSD 119 due to the occurrence of a momentary power interruption in the image forming apparatus 100 is extremely high.

Although the present invention has been described above with reference to the above-described embodiments, the present invention is not limited to the above-described embodiments. For example, the storage connected to the mirroring controller 108 is not limited to SSD, and may be HDD or other types of storage.

Further, in the above-described embodiment, the configuration including the instantaneous interruption capacitor 113 has been described, but the configuration is not limited to this configuration, and the configuration may not include the instantaneous interruption capacitor 113.

Further, in the above-described embodiment, the case where the momentary interruption capacitor is connected only to the power supply of SSD 114 has been described, but it may be connected to at least one power supply of SSD 114 and SSD 119.

The present invention supplies a program that realizes one or more functions of the above-described embodiment to a system or device via a network or storage medium, and one or more processors in the computer of the system or device read the program. It can also be realized by the processing to be executed. The present invention can also be realized by a circuit (for example, ASIC) that realizes one or more functions.

100 Image forming device 109 Mirroring control unit 113 Instantaneous interruption capacitor 114,119 SSD
117,122 cache memory 118,123 flash memory

Claims (7)

An information processing device including a plurality of storages including volatile holding means and a non-volatile recording medium.
According to the received write command, each of the plurality of storages is controlled to hold the data indicated by the write command in the holding means and write the held data to the address indicated by the write command in the recording medium. Write control means to perform and
A rebuild control means for controlling execution of a rebuild process for replicating data stored in the first storage in the plurality of storages to the second storage in the plurality of storages.
It is provided with a comparison means for comparing data of the same address in the first storage and the second storage.
The rebuild control means has the same address in the first storage and the second storage in the reverse order of the address by the comparison means from the last write address in which the data was last written to the first storage by the write control means. An information processing apparatus characterized in that the data of addresses having a difference in the result of comparing the data of the above is duplicated in the second storage. When there is no difference in the result of comparing the data of the same address in the first storage and the second storage in the reverse order of the addresses from the last write address by the comparison means, the rebuild control means performs the rebuild process. The information processing apparatus according to claim 1, wherein the information processing apparatus is terminated. The information processing apparatus according to claim 1 or 2, further comprising an instantaneous interruption countermeasure means for suppressing a sudden drop in the voltage of the first storage caused by the occurrence of a momentary interruption of the power supply in the information processing apparatus. .. The information processing device according to claim 3, wherein the momentary interruption countermeasure means is a large-capacity capacitor. The information processing apparatus according to any one of claims 1 to 4, wherein the information processing apparatus is an image forming apparatus that performs an image forming process. A control method for an information processing apparatus including a plurality of storages including a volatile holding means and a non-volatile recording medium.
According to the received write command, each of the plurality of storages is controlled to hold the data indicated by the write command in the holding means and write the held data to the address indicated by the write command in the recording medium. Write control steps to perform and
A rebuild control step that controls execution of a rebuild process that replicates data stored in the first storage in the plurality of storages to the second storage in the plurality of storages, and a rebuild control step.
It has a comparison step of comparing data of the same address in the first storage and the second storage.
The rebuild control step is performed in the first storage and the second storage in the reverse order of the address in the comparison step from the last write address in which the data was last written to the first storage in the write control step. A control method for an information processing device, which comprises replicating data of addresses having a difference in the result of comparing data of the same address to the second storage. A program that causes a computer to execute a control method for an information processing apparatus having a plurality of storages including a volatile holding means and a non-volatile recording medium.
The control method of the information processing device is
According to the received write command, each of the plurality of storages is controlled to hold the data indicated by the write command in the holding means and write the held data to the address indicated by the write command in the recording medium. Write control steps to perform and
A rebuild control step that controls execution of a rebuild process that replicates data stored in the first storage in the plurality of storages to the second storage in the plurality of storages, and a rebuild control step.
It has a comparison step of comparing data of the same address in the first storage and the second storage.
The rebuild control step is performed in the first storage and the second storage in the reverse order of the address in the comparison step from the last write address in which the data was last written to the first storage in the write control step. A program characterized by replicating data of addresses having a difference in the result of comparing data of the same address to the second storage.

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