JP2021074141A5

JP2021074141A5 -

Info

Publication number: JP2021074141A5
Application number: JP2019201919A
Authority: JP
Filing date: 2019-11-07
Publication date: 2021-11-11
Anticipated expiration: 2039-11-07

Description

従来、中継基板を介して主制御基板を試験装置に接続可能な遊技機が特許文献１に提案されている（例えば、特許文献１参照）。 Conventionally, a gaming machine capable of connecting a main control board to a test device via a relay board has been proposed in Patent Document 1 (see, for example, Patent Document 1).

特開２００３−２１０７９６号公報Japanese Unexamined Patent Publication No. 2003-210996

上述したような従来の遊技機のように、遊技機と試験装置とを接続する場合、中継基板を介して接続するのが一般的だが、遊技性等の遊技機の仕様に応じた中継基板を用意する必要がある。When connecting a gaming machine and a test device like the conventional gaming machine as described above, it is common to connect via a relay board, but a relay board according to the specifications of the gaming machine such as game playability is used. You need to prepare.

本発明は、遊技機の仕様が変わったとしても、中継基板を変更することなく、また、最低限の変更により試験装置と接続することが可能な遊技機を提供することを目的とする。An object of the present invention is to provide a gaming machine that can be connected to a test device without changing the relay board and with a minimum change even if the specifications of the gaming machine change.

本発明に係る遊技機は、The gaming machine according to the present invention
主制御部（主制御回路６１００）と、Main control unit (main control circuit 6100) and
前記主制御部に接続された払出制御部（払出・発射制御回路６３００）と、The payout control unit (payout / launch control circuit 6300) connected to the main control unit and
前記主制御部又は前記払出制御部に接続された複数の入出力装置（各種スイッチ類、各種ソレノイド類等）と、を備え、A plurality of input / output devices (various switches, various solenoids, etc.) connected to the main control unit or the payout control unit are provided.
前記主制御部及び前記払出制御部は、接続中継部（試験中継端子板７００１）を介して試験装置に接続可能であり、The main control unit and the payout control unit can be connected to the test device via the connection relay unit (test relay terminal board 7001).
前記接続中継部は、The connection relay unit
前記主制御部から出力される試験信号が入力されるバッファ回路（試験中継端子板７００１のＢＵＦ１）と、A buffer circuit (BUF1 of the test relay terminal board 7001) into which a test signal output from the main control unit is input, and
前記バッファ回路から出力される試験信号が入力されるゲート回路（試験中継端子板７００１のＧＡＴＥ１〜６）と、を有し、It has a gate circuit (GATE 1 to 6 of the test relay terminal board 7001) into which a test signal output from the buffer circuit is input.
前記ゲート回路から出力される試験信号は、スイッチ回路（試験中継端子板７００１のＳＳＷ１〜ＳＳＷ６）を経由し、前記試験装置に接続するためのコネクタ（試験中継端子板７００１のコネクタＣＮ２〜４）から出力可能に構成され、The test signal output from the gate circuit passes through the switch circuit (SSW1 to SSW6 of the test relay terminal board 7001) and is connected to the test device from the connector (connectors CN2 to 4 of the test relay terminal board 7001). Configured for output,
前記スイッチ回路は、前記ゲート回路から出力される複数の試験信号に応じた入力端子と前記入力端子に対応する出力端子との間で前記コネクタの複数の試験信号に対して、グランド接地することが可能であり、The switch circuit may be grounded to a plurality of test signals of the connector between an input terminal corresponding to a plurality of test signals output from the gate circuit and an output terminal corresponding to the input terminal. It is possible and
前記主制御部は、ＣＰＵ（メインＣＰＵ６１０１）、ＲＡＭ（メインＲＡＭ６１０３）及びＲＯＭ（メインＲＯＭ６１０２）を内蔵したマイクロプロセッサを有し、The main control unit has a microprocessor incorporating a CPU (main CPU 6101), a RAM (main RAM 6103), and a ROM (main ROM 6102).
前記マイクロプロセッサに設けられた複数のデータバス端子（Ｄ０〜Ｄ７）に接続された配線は、前記コネクタとは異なるコネクタ（試験中継端子板７００１のコネクタＣＮ１）を経由して前記ゲート回路の入力端子に接続されているThe wiring connected to the plurality of data bus terminals (D0 to D7) provided in the microprocessor passes through a connector different from the connector (connector CN1 of the test relay terminal board 7001) and is an input terminal of the gate circuit. It is connected to the
構成を有している。It has a configuration.

本発明は、遊技機の仕様が変わったとしても、中継基板を変更することなく、また、最低限の変更により試験装置と接続することが可能な遊技機を提供することができる。The present invention can provide a gaming machine that can be connected to a test device without changing the relay board and with a minimum of changes even if the specifications of the gaming machine change.

各ＳＳＷ１〜６は、入力端子Ｉ１〜Ｉ８と、出力端子Ｏ１〜Ｏ８とを有する。各ＳＳＷ１〜６の入力端子Ｉ１〜Ｉ８は、各ＧＡＴＥ１〜６の出力端子Ｑ１〜Ｑ８にそれぞれ接続されている。各ＳＳＷ１〜６は、スライドスイッチ又はディップスイッチにより構成され、各入力端子Ｉ１〜Ｉ８と各出力端子Ｑ１〜Ｑ８との間を個別に接続及び切断（グランド接地）することができる。 Each SSW1 to 6 has input terminals I1 to I8 and output terminals O1 to O8. The input terminals I1 to I8 of the SSWs 1 to 6 are connected to the output terminals Q1 to Q8 of the GATEs 1 to 6, respectively. Each SSW1 to 6 is composed of a slide switch or a DIP switch, and can individually connect and disconnect (ground ground) between each input terminal I1 to I8 and each output terminal Q1 to Q8.

Claims

Main control unit and
The payout control unit connected to the main control unit and
A plurality of input / output devices connected to the main control unit or the payout control unit are provided.
The main control unit and the payout control unit can be connected to the test device via the connection relay unit.
The connection relay unit
A buffer circuit into which a test signal output from the main control unit is input, and
It has a gate circuit into which a test signal output from the buffer circuit is input, and
The test signal output from the gate circuit is configured to be output from a connector for connecting to the test device via a switch circuit.
The switch circuit may be grounded to a plurality of test signals of the connector between an input terminal corresponding to a plurality of test signals output from the gate circuit and an output terminal corresponding to the input terminal. It is possible and
The main control unit has a CPU, RAM, and a microprocessor with a built-in ROM.
A gaming machine characterized in that wiring connected to a plurality of data bus terminals provided in the microprocessor is connected to an input terminal of the gate circuit via a connector different from the connector.