JP2021065073A - Protective relay device - Google Patents

Abstract

To provide a protective relay device that can determine the presence or absence of a bus bar failure at a higher speed.SOLUTION: The protective relay device includes an input unit that receives input of line currents flowing in each of a plurality of lines branched from a bus bar, a change rate calculation unit that calculates a change rate of each line current and a change rate of a differential current in each line current based on data of each line current sampled at a sampling period shorter than a relay operation period, and a fault determination unit that determines whether a fault has occurred in the bus bar based on the polarity and magnitude of the change rate of each line current and the polarity and magnitude of the change rate of the differential current.SELECTED DRAWING: Figure 10

Description

The present disclosure relates to a protection relay device.

In order to stabilize the operation of the power system, a digital protection relay device that detects a failure that occurs in the power system is used. The protection relay device samples the amount of electricity (for example, current and voltage) of the power system in a specified sampling cycle, converts the amount of electricity into digital data in each sampling cycle, and protects the power system using the digital data. Perform a relay operation to do this.

Japanese Patent Application Laid-Open No. 2013-31306 (Patent Document 1) is a digital protection relay that protects the power system by transmitting and receiving the amount of electricity acquired from the power system between the self-end device and the mating end device via a transmission line. The device is disclosed. Patent Document 1 discloses that after sampling an amount of electricity at an electric angle of 3.75 °, data at 3.75 ° is converted to obtain new data at 7.5 °, 15 °, and 30 °. ing.

Japanese Unexamined Patent Publication No. 2013-31306

In the current differential relay used as a protection means for the bus, the signal from the power system is sampled at an electric angle of 3.75 °. However, in general, the cycle of the relay operation for fault detection performed using the sampled data is longer than the sampling cycle, for example, the electric angle is 30 °. Therefore, the time required for failure detection is required to be the time obtained by multiplying the electric angle of 30 ° by the number of confirmations, and there is a demand for shortening this time.

An object of an aspect of the present disclosure is to provide a protection relay device capable of determining the presence or absence of a bus failure at a higher speed.

According to certain embodiments, a protection relay device for protecting the bus is provided. The protection relay device is based on the input unit that receives the input of the line current flowing through each of the plurality of lines branched from the bus and the data of each line current sampled in a sampling cycle shorter than the relay calculation cycle. The rate of change calculation unit that calculates the rate of change of the current and the rate of change of the differential current in each line current, the polarity and magnitude of the rate of change of each line current, and the polarity and magnitude of the rate of change of the differential current. Based on this, it is provided with a failure determination unit that determines whether or not a failure has occurred on the bus.

According to the present disclosure, in a protection relay device for protecting a bus, it is possible to determine at a higher speed whether or not there is a failure of the bus.

It is a figure which shows the electric power system to which the protection relay device for protecting a bus is applied. It is a block diagram which shows an example of the hardware composition of the protection relay device. It is a figure for demonstrating the calculation method of the current change rate of each line. It is a figure which shows the electric power system when a failure occurs inside a bus. It is a figure which shows the waveform of each line current and differential current at the time of an internal failure. It is a figure which shows the waveform of the current change rate of each line current and differential current at the time of an internal failure. It is a figure which shows the electric power system when the failure occurs outside the bus. It is a figure which shows the waveform of each line current and differential current at the time of an external failure. It is a figure which shows the waveform of the current change rate of each line current and differential current at the time of an external failure. It is a block diagram which shows an example of the functional structure of a protection relay device. It is a flowchart which shows an example of the processing procedure of the failure determination of a protection relay device.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following description, the same parts are designated by the same reference numerals. Their names and functions are the same. Therefore, the detailed description of them will not be repeated.

<Overall configuration>
FIG. 1 is a diagram showing a power system to which a protection relay device for protecting a bus is applied. The power system shown in FIG. 1 is a three-phase power system including a bus 2 and a plurality of lines (for example, feeder lines) branched from the bus 2. FIG. 1 shows an example in which lines L1 to L3 are provided as a plurality of lines.

Behind power supplies 91 and 92 of the bus 2 are connected to the lines L1 and L2, respectively. The back power sources 91, 92 are, for example, generators or transformers. A load, a transmission line, and the like are connected to the line L3.

Circuit breakers 71 to 73 are inserted into the lines L1 to L3, respectively. Information regarding the open / closed state of the circuit breakers 71 to 73 is taken into the inside of the protection relay device 100 via an interface portion (not shown).

Further, current transformers (CT: Current Transformers) 61 to 63 are provided on the lines L1 to L3, respectively. An air-core transformer may be provided instead of the current transformer. The information of the current value of each phase flowing through the lines L1 to L3 detected by the current transformers 61 to 63 is taken into the inside of the protection relay device 100. Specifically, the CTs 61 to 63 output each phase current of the lines L1 to L3, respectively.

A voltage transformer (VT: Voltage Transformer) 8 is provided on the bus 2. The information of the voltage value of each phase of the bus 2 detected by the voltage transformer 8 is taken into the inside of the protection relay device 100.

The protection relay device 100 is a digital protection relay device for protecting the bus 2 of the power system. The protection relay device 100 determines whether or not a failure has occurred inside the bus 2 based on the current value of each line detected by CT 61 to 63.

Although the details will be described later, the protection relay device 100 according to the present embodiment has a sampling period (for example, an electric angle of 3.75 °) shorter than the relay calculation period (for example, an electric angle of 30 °) for each line. Using the time series data of the current, the rate of change of the current of each line and the rate of change of the differential current are calculated. The protection relay device 100 detects a failure in the bus 2 based on these rate of change. Therefore, the protection relay device 100 can determine the presence or absence of a failure of the bus 2 at a higher speed than the protection calculation using the current of each line for each relay calculation cycle.

FIG. 2 is a block diagram showing an example of the hardware configuration of the protection relay device 100. With reference to FIG. 2, the protection relay device 100 includes an input conversion unit 31, an AD (Analog to Digital) conversion unit 35, an arithmetic processing unit 40, an interface unit 50, and a determination circuit 80.

The input conversion unit 31 inputs the current signal of each phase output from CT61 to 63 of FIG. 1 and the voltage signal of each phase output from VT8 of FIG. That is, the input conversion unit 31 functions as an input unit that receives the input of the current flowing through each of the plurality of lines L1 to L3 branched from the bus 2.

Specifically, the input converter 31 includes a plurality of input converters 32 (for example, input converters 32_1, 32_2, ...). A transformer as an input converter 32 is provided for each channel, and a current signal of each phase and a voltage signal of each phase are input to each channel. In FIG. 2, only two channels are typically shown. The input conversion unit 31 converts the current signal from CT61 to 63 and the voltage signal from VT8 into a voltage level signal suitable for signal processing by the A / D conversion unit 35 and the arithmetic processing unit 40.

The AD conversion unit 35 includes an analog filter (AF: Analog Filter) 36, a sample hold circuit (SH: Sample and Hold Circuit) 37, a multiplexer (MPX: Multiplexer) 38, and an AD converter 39. Each analog filter 36 (for example, analog filter 36_1, 36_2, ...) And each SH circuit 37 (for example, SH circuit 37_1, 37_2, ...) Are provided for each channel corresponding to the input converter 32.

Each analog filter 36 is a filter provided for removing a folding error at the time of AD conversion. Each SH circuit 37 samples and holds a signal that has passed through the corresponding analog filter 36 at a predetermined sampling frequency. For example, when obtaining sampling data having an electric angle of 3.75 ° shorter than the relay calculation period (for example, an electric angle of 30 °), the sampling frequency is 4800 Hz when the system frequency is 50 Hz. The multiplexer 38 sequentially selects the voltage signals held in each SH circuit 37. The AD converter 39 converts the signal selected by the multiplexer into a digital value.

The arithmetic processing unit 40 includes a CPU (Central Processing Unit) 41, a RAM (Random Access Memory) 42, and a ROM (Read Only Memory) 43. Each of these elements is connected to each other via a bus 44. The hardware may be an FPGA (Field Programmable Gate Array) other than the CPU, an ASIC (Application Specific Integrated Circuit), or a circuit having other arithmetic functions.

The arithmetic processing unit 40 may include an electrically rewritable non-volatile memory such as a flash memory. The RAM 42 and the ROM 43 are used as the main storage device of the CPU 41. The CPU 41 controls the operation of the protection relay device 100 according to the programs enabled in the ROM 43 and the non-volatile memory.

Typically, the CPU 41 reads a plurality of sampling data sampled in the period corresponding to the relay calculation cycle from the buffer memory for each relay calculation cycle (for example, an electric angle of 30 °), performs digital filtering, and then performs digital filtering. Performs relay operations based on digitally filtered data. The CPU 41 determines whether or not there is a failure in the protection section based on the relay calculation result. When the CPU 41 determines that a failure has occurred, it outputs a trip signal to the circuit breakers 71 to 73 via the interface unit 50.

The interface unit 50 includes a DO (Digital output) circuit 51 and a DI (Digital input) circuit 52. The DO circuit 51 outputs a trip signal to the circuit breakers 71 to 73 provided in the lines L1 to L3 of FIG. 1 in accordance with the command of the CPU 41. The DI circuit 52 receives, for example, an input of a contact signal from the circuit breakers 71 to 73.

The determination circuit 80 is based on the rate of change of each current calculated from the time series data of the currents of the lines L1 to L3 sampled in a sampling period shorter than the relay calculation period (for example, an electric angle of 3.75 °). Detects an internal failure of the bus 2. The method for determining the internal failure of the bus 2 by the determination circuit 80 will be described later. Typically, the determination circuit 80 is composed of a circuit such as FPGA, but may be composed of a CPU or the like.

<Failure judgment method>
(Overview)
FIG. 3 is a diagram for explaining a method of calculating the current change rate of each line. With reference to FIG. 3, the waveform 300 shows an analog waveform of the input current captured by the input converter 32. Times t _{05 to t 06} , t _{10 to t 17} , and t _{20 to t 22} indicate sampling times. The values Z _{5 to} Z ₇ are sampling values at time t _{05 to t 07} , respectively, and the values A _{0 to} A ₇ are sampling values at time t _{10 to t 17} , respectively, and the values B _{0 to} B ₂ Are sampling values at times t _{20 to t 22, respectively.} It is assumed that the sampling period Ts has an electric angle of 3.75 °. Each value Z _{5 to} Z ₇ , A _{0 to} A ₇ , and B _{0 to} B ₂ are sequentially stored in the memory as digital values.

Judging circuit 80 at time _{t 10,} the value _{A 0} corresponding to the current sampling time, based on the value _{Z 7} corresponding to the last sample time, and calculates the current change rate [Delta] I ₁₀ at time _{t 10.} Specifically, ΔI ₁₀ = (A ₀ −Z ₇ ) / Ts. Further, the determination circuit 80 calculates the current change rate ΔI ₁₁ (= (A ₁ −A ₀ ) / Ts) at _{time t 11.} Similarly, the determination circuit 80 calculates the current change rate ΔI ₁₂ ~ΔI ₂₂ at each time _t 12 _{~t 22.} From the above, the current change rate ΔI of the line current of each line L1 to L3 corresponds to the amount of change of the line current per sampling interval (that is, time Ts). The determination circuit 80 calculates the current change rate ΔI in each of the lines L1 to L3 for each sampling period Ts.

Further, the determination circuit 80 also calculates the current change rate ΔId of the differential current Id in the currents of the lines L1 to L3 for each sampling period Ts. Let the currents of the lines L1 to L3 be the line currents I1 to I3, respectively. In this case, the differential current Id is represented by the vector sum of the line currents I1 to I3. Specifically, Id = I1 + I2 + I3. For example, the differential current at time _{t 11, t 12} and _Id 11, _{Id 12} respectively, the current change rate at the time _{t 12} to .DELTA.Id _12. In this case, ΔId ₁₂ = (Id ₁₂ −Id ₁₁ ) / Ts. Similarly, the determination circuit 80 calculates the current change rates ΔId _{13 to ΔId 22 at each time t 13 to t 22.}

The determination circuit 80 of the bus 2 is based on the polarity and magnitude (that is, absolute value) of the current change rate ΔI of each of the line currents I1 to I3 and the polarity and magnitude of the current change rate ΔId of the differential current Id. Determine if a failure has occurred. Hereinafter, the reasons for using these polarities and sizes will be described with reference to FIGS. 4 to 9.

FIG. 4 is a diagram showing a power system when a failure occurs inside the bus 2. With reference to FIG. 4, it is assumed that a failure (for example, a ground fault) occurs at the failure point Fi inside the bus 2. In this case, the line currents I1 to I3 flow toward the failure point Fi.

FIG. 5 is a diagram showing waveforms of each line current and differential current at the time of internal failure. With reference to FIG. 5, the waveforms 401, 402, and 403 show the current waveforms of the line currents I1, I2, and I3, respectively. The waveform 404 shows the current waveform of the differential current Id calculated from the line currents I1, I2, and I3.

As shown in the waveforms 401, 402, and 404, the line currents I1 and I2 of the lines L1 and L2 connected to the back power supplies 91 and 92 have increased since the occurrence of the internal failure, and the differential currents I1 and I2 have increased accordingly. The current Id is also increasing. On the other hand, as shown in the waveform 403, there is no change in the line current I3 of the line L3 to which the back power supply is not connected.

FIG. 6 is a diagram showing waveforms of current change rates of each line current and differential current at the time of internal failure. Specifically, FIG. 6A is a diagram showing a waveform of the current change rate of each current shown in FIG. FIG. 6B is an enlarged view of a portion of region 430 in FIG. 6A.

With reference to FIG. 6A, the waveforms 411, 421 and 413 show the waveforms of the current change rates ΔI1 to ΔI3 of the line currents I1 to I3 at the time of internal failure, respectively. The waveform 414 shows the waveform of the current change rate ΔId of the differential current Id at the time of internal failure. As shown in the waveforms 411, 421 and 414, the current change rates ΔI1, ΔI2 and ΔId rapidly increase immediately after the occurrence of the internal failure. On the other hand, as shown in the waveform 413, no change is observed in the current change rate ΔI3.

More specifically, as can be understood from the waveforms 411, 421 and 414 of FIG. 6 (b), immediately after the occurrence of the internal failure, the current change rates ΔI1, ΔI2, ΔId all suddenly move in the negative direction. It's getting bigger. Therefore, it can be seen that the absolute values of the current change rates ΔI1, ΔI2, ΔId are large and the polarities of the current change rates ΔI1, ΔI2, ΔId are the same immediately after the occurrence of the internal failure of the bus 2.

FIG. 7 is a diagram showing a power system when a failure occurs outside the bus 2. With reference to FIG. 7, it is assumed that a failure (for example, a ground fault) occurs at a failure point Fо outside the bus 2. In this case, the line currents I1 to I3 flow toward the failure point Fо.

FIG. 8 is a diagram showing waveforms of each line current and differential current at the time of an external failure. With reference to FIG. 8, the waveforms 501, 502, and 503 show the current waveforms of the line currents I1, I2, and I3, respectively. The waveform 504 shows the current waveform of the differential current Id calculated from the line currents I1, I2, and I3. As shown in the waveforms 501, 502, and 503, the line currents I1, I2, and I3 have increased since the occurrence of the external failure. On the other hand, as shown in the waveform 504, there is no change in the differential current Id.

FIG. 9 is a diagram showing waveforms of current change rates of each line current and differential current at the time of an external failure. Specifically, FIG. 9A is a diagram showing a waveform of the current change rate of each current shown in FIG. 9 (b) is an enlarged view of the region 530 of FIG. 9 (a).

With reference to FIG. 9A, the waveforms 511, 512, and 513 show the waveforms of the current change rates ΔI1 to ΔI3 of the line currents I1 to I3 at the time of an external failure, respectively. The waveform 514 shows the waveform of the current change rate ΔId of the differential current Id at the time of an external failure. As shown in the waveforms 511 and 512, 513, the current change rates ΔI1, ΔI2 and ΔI3 rapidly increase immediately after the occurrence of the external failure. On the other hand, as shown in the waveform 514, no change is observed in the current change rate ΔId.

More specifically, as can be understood from the waveforms 511, 512, 513 of FIG. 9B, the current change rates ΔI1 and ΔI2 suddenly change in the negative direction immediately after the occurrence of the external failure. , The current change rate ΔI3 is rapidly changing in the positive direction. From this, immediately after the occurrence of an external failure of the bus 2, the absolute values of the current change rates ΔI1, ΔI2, ΔI3 are large, and the polarities of the current change rates ΔI1, ΔI2 and the polarities of the current change rate ΔI3 are not the same.

As can be understood from the above description of FIGS. 4 to 9, there are differences in the polarities and absolute values of the current change rates ΔI1 to ΔI3 and ΔId between the time of internal failure and the time of external failure. Further, since the current change rates ΔI1 to ΔI3 and ΔId do not change abruptly when no failure occurs, the absolute values of these current change rates are small. Therefore, by paying attention to the polarities and absolute values of the current change rates ΔI1 to ΔI3 and ΔId, it is possible to determine whether or not an internal failure of the bus 2 has occurred.

(Specific example of judgment method)
The current change rate ΔIn (t) calculated at time t is expressed by the following equation (1).

ΔIn (t) = {In (t) -In (t-1)} / {t- (t-1)} ... (1)
In (t) is the current value of the line Ln sampled at the current sampling time (that is, time t), and In (t-1) is the previous sampling time (that is, time (t-1)). It is the current value of the sampled line Ln. The time (t-1) corresponds to a time retroactive by the time Ts from the time t. n corresponds to the number of lines branched from the bus 2, and n ≧ 2. From the equation (1), the current change rate ΔIn (t) is the amount of change in the line current In (t) per unit time (that is, the time corresponding to the sampling period Ts). Here, the threshold value for the magnitude of ΔIn (t) is Th1 (> 0), and the polarity determination value indicating the determination value for the polarity of ΔIn (t) is In_P (t).

The polarity determination value In_P (t) is “+1” when ΔIn (t) ≧ + Th1 is satisfied, is “-1” when ΔIn (t) ≦ −Th1 is satisfied, and −Th1 <. When ΔIn (t) <+ Th1 holds, it is assumed to be "0".

The differential current Id (t) at time t is expressed by the following equation (2), and the current change rate ΔId (t) of the differential current Id (t) is expressed by the following equation (3).

Id (t) = (I1 + I2 + ... + In) ... (2)
ΔId (t) = {Id (t) -Id (t-1)} / {t- (t-1)} ... (3)
Id (t) is a differential current value calculated at the current sampling time (that is, time t), and Id (t-1) is a differential current value calculated at the previous sampling time. From the equation (3), the current change rate ΔId (t) is the amount of change in the differential current Id (t) per unit time. Here, the threshold value for the magnitude of ΔId (t) is Th2, and the polarity determination value indicating the determination value for the polarity of ΔId (t) is Id_P (t).

The polarity determination value Id_P (t) is “+1” when ΔId (t) ≧ + Th2 is satisfied, “-1” when ΔId (t) ≦ −Th2 is satisfied, and −Th2 <. When ΔId (t) <+ Th2 holds, it is assumed to be "0".

Here, it is assumed that an internal failure as shown in FIG. 4 has occurred. In this case, n is "3". As described with reference to FIG. 6, the current change rates ΔI1, ΔI2, and ΔId sharply increase in the negative direction side, but no change is observed in the current change rate ΔI3. Therefore, immediately after the occurrence of the internal failure, I1_P (t) is "-1", I2_P (t) is "-1", I3_P (t) is "0", and Id_P (t) is "-". 1 ”.

Next, the addition value Isom_P (t) of the polarity determination value is obtained. When the value of In_P (t) is "0", the In_P (t) is excluded from the addition target. Id_P (t) is subject to addition regardless of the value. In the example of FIG. 6, since I3_P (t) is “0”, I3_P (t) is excluded from the addition target. Therefore, the following equation (4) holds.

Isum_P (t) = I1_P (t) + I2_P (t) + Id_P (t) = -1-1-1 = -3 ... (4)
Then, when the absolute value of the addition value Isum_P (t) and the number of addition targets are the same, it is determined that an internal failure of the bus 2 has occurred. If these values are not the same, it is determined that no internal failure has occurred in the bus 2. In the example of FIG. 6, since the absolute value of Isum_P (t) is "3" and "I1_P (t)", "I2_P (t)" and "Id_P (t)" are added, the number to be added is added. Is also "3". Therefore, since the absolute value of Isum_P (t) and the number to be added are the same, it is determined that an internal failure has occurred.

Next, it is assumed that an external failure as shown in FIG. 7 occurs. In this case, n is "3". As described with reference to FIG. 9, the current change rates ΔI1 and ΔI2 sharply increase in the negative direction side, the current change rate ΔI3 sharply increases in the positive direction side, and no change is observed in the current change rate ΔId. Therefore, immediately after the occurrence of an external failure, I1_P (t) is "-1", I2_P (t) is "-1", I3_P (t) is "1", and Id_P (t) is "0". ".

Next, the addition value Isom_P (t) of the polarity determination value is obtained. In the example of FIG. 9, since none of In_P (t) is “0”, there is no polarity determination value excluded from the addition target. Therefore, the following equation (5) holds.

Isum_P (t) = I1_P (t) + I2_P (t) + I3_P (t) + Id_P (t) =-1-1 + 1-1 = -2 ... (5)
In the example of FIG. 9, the absolute value of Isum_P (t) is "2", and "I1_P (t)", "I2_P (t)", "I3_P (t)" and "Id_P (t)" are added. Therefore, the number to be added is "4". Therefore, since the absolute value of Isum_P (t) is different from the number to be added, it is determined that no internal failure has occurred.

(Modified example of judgment method)
In order to improve the reliability of internal failure determination, not only the current change rate between time t and time (t-1) but also the current change rate between time t and time (t-2) is confirmed. It may be a configuration.

The current change rate ΔIn * (t) of the line current calculated at time t is expressed by the following equation (6).

ΔIn * (t) = {In (t) -In (t-2)} / {t- (t-2)} ... (6)
In (t-2) is the current value of the line Ln sampled at the sampling time two times before (that is, the time (t-2)). The time (t-2) corresponds to a time 2 Ts back from the time t. From the equation (6), the current change rate ΔIn * (t) is the amount of change in the line current In (t) per unit time between the time t and the time (t-2).

Let In * _P (t) be a polarity determination value indicating a determination value regarding the polarity of ΔIn * (t). The polarity determination value In * _P (t) is “+1” when ΔIn * (t) ≧ + Th1 is satisfied, and is “-1” when ΔIn * (t) ≦ −Th1 is satisfied. , -Th1 <ΔIn * (t) <+ Th1 is satisfied as "0".

The current change rate ΔId * (t) of the differential current calculated at time t is expressed by the following equation (7).

ΔId * (t) = {Id (t) -Id (t-2)} / {t- (t-2)} ... (7)
Id (t-2) is a differential current value calculated at the sampling time two times before. From the equation (7), the current change rate ΔId * (t) is the amount of change in the differential current Id (t) per unit time between the time t and the time (t-2). Here, the polarity determination value indicating the determination value regarding the polarity of ΔId * (t) is defined as Id * _P (t). The polarity determination value Id * _P (t) is “+1” when ΔId * (t) ≧ + Th2 is satisfied, and is “-1” when ΔId * (t) ≦ −Th2 is satisfied. , -Th2 <ΔId * (t) <+ Th2 is satisfied as “0”.

Here, it is assumed that an internal failure as shown in FIG. 4 has occurred. As described with reference to FIG. 6, the current change rates ΔI1, ΔI2, and ΔId sharply increase in the negative direction side, but no change is observed in the current change rate ΔI3. Therefore, immediately after the occurrence of the internal failure, I1_P (t) and I1 * _P (t) are "-1", I2_P (t) and I2 * _P (t) are "-1", and I3_P (t). And I3 * _P (t) is "0", and Id_P (t) and Id * _P (t) are "-1".

Next, the addition value Isom * _P (t) of the polarity determination value is obtained. When the values of In_P (t) and In * _P (t) are "0", the In_P (t) and In * _P (t) are excluded from the addition target. Id_P (t) and Id * _P (t) are subject to addition regardless of their values. In the example of FIG. 6, since I3_P (t) and I3 * _P (t) are “0”, they are excluded from the addition target. Therefore, the following equation (8) holds.

Isum * _P (t) = {I1_P (t) + I2_P (t) + Id_P (t)} + {I1 * _P (t) + I2 * _P (t) + Id * _P (t)} = (-1-1-1 ) + (-1-1-1) = -6 ... (8)
Then, when the absolute value of the addition value Isum * _P (t) and the number of addition targets are the same, it is determined that an internal failure of the bus 2 has occurred. If these values are not the same, it is determined that no internal failure has occurred in the bus 2. From equation (8), the absolute value of Isum * _P (t) is "6", and I1_P (t), I2_P (t), Id_P (t), I1 * _P (t), I2 * _P (t) and Since Id * _P (t) is added, the number to be added is also "6". Therefore, since the absolute value of Isum * _P (t) and the number to be added are the same, it is determined that an internal failure has occurred.

Even when an external failure as shown in FIG. 7 occurs, the same determination as above is performed. Specifically, when an external failure occurs, the absolute value of the addition value Iso * _P (t) is "4", and the number of addition targets is "8". Therefore, since the absolute value of Isum * _P (t) is different from the number to be added, it is determined that no internal failure has occurred.

In the above description, the configuration for further confirming the current change rate between the time t and the time (t-2) has been described, but the configuration is not limited to this configuration. For example, the current change rate between the time t and the time (t-3) may be further confirmed, or between the time t and the time further past the time (t-3). The configuration may be such that the current change rate is confirmed.

<Functional configuration>
FIG. 10 is a block diagram showing an example of the functional configuration of the protection relay device 100. With reference to FIG. 10, the protection relay device 100 includes a rate of change calculation unit 152, a failure determination unit 154, a differential relay calculation unit 156, and an output control unit 158 as main functional configurations. Typically, the rate of change calculation unit 152 and the failure determination unit 154 are realized by the determination circuit 80, the differential relay calculation unit 156 is realized by the CPU 41 of the calculation processing unit 40, and the output control unit 158 is the CPU 41 and the DO circuit. It is realized by 51. It should be noted that some or all of these functions may be configured to be implemented by other different hardware.

The rate of change calculation unit 152 determines the rate of change of each line current (for example, line currents I1 (t) to I3 (t)) based on the data of each line current (for example, line currents I1 (t) to I3 (t)) sampled in a sampling cycle shorter than the relay calculation cycle. For example, the current change rates ΔI1 (t) to ΔI3 (t)) are calculated. Here, the rate of change of the line current is the amount of change of the line current per unit time (for example, the time corresponding to the sampling period Ts). The amount of change is, for example, the amount of change in the line current between the current sampling time (for example, time t) and the previous sampling time (for example, time (t-1)).

Further, the rate of change calculation unit 152 calculates the rate of change of the differential current in each line current (for example, the rate of change of current ΔId (t)) based on the data of each line current. Specifically, the rate of change of the differential current is the amount of change of the differential current per unit time. The amount of change is, for example, the amount of change in the differential current between the current sampling time (for example, time t) and the previous sampling time (for example, time (t-1)).

The failure determination unit 154 determines whether or not a failure has occurred in the bus 2 based on the polarity and magnitude of the rate of change of each line current and the polarity and magnitude of the rate of change of the differential current. The failure determination unit 154 determines whether or not the failure has occurred according to the determination method described above.

As a specific example, in FIG. 4, each line branched from the bus 2 is a line L1 connected to the back power supply 91, a line L2 connected to the back power supply 92, and a line L3 not connected to the back power supply 92. And include. In this case, since the line currents I1 and I2 in the lines L1 and L2 change rapidly, what is the magnitude of the current change rate ΔI1 (t) of the line current I1 and the magnitude of the current change rate ΔI2 (t) of the line current I2? The threshold value is Th1 or higher. On the other hand, since the current change rate ΔI3 does not change, the magnitude of the current change rate ΔI3 (t) is less than the threshold Th1. Therefore, the polarity of the current change rate ΔI3 (t) is not taken into consideration in the failure determination on the bus 2.

Therefore, the magnitude of the current change rate ΔId (t) of the differential current Id is equal to or greater than the threshold value Th2, and the polarity of the current change rate ΔI1 (t), the polarity of the current change rate ΔI2 (t), and the differential current Id. When the polarity of the current change rate ΔId (t) of (t) is the same, the failure determination unit 154 determines that a failure has occurred in the bus 2.

Here, it is assumed that each line branched from the bus 2 includes a line L1 connected to the back power supply 91 and lines L2 and L3 not connected to the back power supply 91. In this case, the line current I1 in the line L1 changes abruptly, but the line currents I2 and I3 in the lines L2 and L3 do not change abruptly. Therefore, the magnitude of the current change rate ΔI1 (t) is equal to or greater than the threshold value Th1, but the magnitude of the current change rates ΔI2 (t) and ΔI3 (t) is less than the threshold value Th1. Therefore, the polarities of the current change rates ΔI2 (t) and I3 (t) are not taken into consideration in the failure determination on the bus 2. Specifically, the magnitude of the current change rate ΔId (t) of the differential current Id is equal to or greater than the threshold value Th2, and the polarity of the current change rate ΔI1 (t) and the current change rate of the differential current Id (t). When the polarity of ΔId (t) is the same, the failure determination unit 154 determines that a failure has occurred in the bus 2.

The amount of change in the line current per unit time is the amount of change in the line current per unit time between the current sampling time and the previous sampling time K1 (for example, ΔIn (t)) and the current sampling time. It may include the amount of change K2 (for example, ΔIn * (t)) of the line current per unit time between the sampling time and the sampling time two times before the previous time. In this case, the amount of change in the differential current per unit time is the amount of change in the differential current per unit time K3 (for example, ΔId (t)) between the current sampling time and the previous sampling time, and this time. Includes the amount of change K4 (for example, ΔId * (t)) of the differential current per unit time between the sampling time of the above and the sampling time of the previous two times.

In the example of FIG. 4, the line currents I1 and I2 in the lines L1 and L2 change rapidly, but the line currents I3 do not change. Therefore, the magnitude of the change amount K1 and K2 of the line current I1 (for example, the current change rate ΔI1 (t), ΔI1 * (t)) and the change amount K1 and K2 of the line current I2 (for example, the current change rate ΔI2 (t)) ), ΔI2 * (t)) is the threshold Th1 or more. On the other hand, the magnitude of the change amounts K1 and K2 of the line current I3 (for example, the current change rates ΔI3 (t) and ΔI3 * (t)) is less than the threshold Th1. Therefore, the polarities of the current change rates ΔI3 (t) and ΔI3 * (t) are not taken into consideration in the failure determination on the bus 2.

Therefore, the magnitudes of the differential current changes K3 and K4 are equal to or greater than the threshold value Th2, and the polarities of the changes K1 and K2 of the line current I1 and the polarities of the changes K1 and K2 of the line current I2. When the polarities of the change amounts K3 and K4 of the differential current Id are the same, the failure determination unit 154 determines that a failure has occurred in the bus 2.

The differential relay calculation unit 156 detects a failure in the bus 2 by a differential relay calculation based on sampling data of each line current for each predetermined relay calculation cycle (for example, an electric angle of 30 °).

Specifically, the differential relay calculation unit 156 calculates the vector sum of the line currents I1 to I3 of each line L1 to L3 detected by CT61 to 63, and determines the magnitude of the calculated vector sum as the differential current ID. Calculate as. The differential relay calculation unit 156 calculates the line current I1 to I3 having the largest magnitude as the suppression current IR. A scalar sum suppression method may be used instead of the maximum value suppression method. Specifically, the differential relay calculation unit 156 may calculate the scalar sum of the detected line currents I1 to I3 as the suppression current IR.

Subsequently, the differential relay calculation unit 156 determines whether or not the relationship between the suppression current IR and the differential current ID satisfies a predetermined relationship. Specifically, the differential relay calculation unit 156 multiplies the suppression current IR by the constant α, and whether or not the differential current ID is larger than the value obtained by adding the constant β (that is, ID> α × IR + β is established. Whether or not to do) is determined. When ID> α × IR + β is established, the differential relay calculation unit 156 determines that the bus 2 has a failure.

The differential relay calculation unit 156 may make a determination using only the differential current ID without using the suppression current IR. Specifically, the differential relay calculation unit 156 determines whether or not the differential current ID is larger than the threshold IP (that is, whether or not ID> IP is satisfied). When ID> IP is established, the differential relay calculation unit 156 determines that the bus 2 has a failure.

The output control unit 158 receives the input of the determination result by the failure determination unit 154 and the determination result by the differential relay calculation unit 156. The output control unit 158 outputs an operation signal (for example, a trip signal) to the circuit breakers 71 to 73 when the failure determination unit 154 determines that a failure has occurred in the bus 2. The output control unit 158 may output an operation signal to the circuit breakers 71 to 73 when the differential relay calculation unit 156 determines that a failure has occurred in the bus 2.

However, as described above, the failure determination unit 154 executes the failure determination of the bus 2 by using the current change rate obtained for each sampling cycle shorter than the relay calculation cycle. For example, when the relay calculation cycle is 30 ° and the sampling cycle is 3.75 °, the failure determination unit 154 performs eight failure determinations while the differential relay calculation unit 156 performs one failure determination. Can be done. Therefore, in view of reliability, even if a trip signal is output when the failure determination unit 154 determines that a failure has occurred in the bus 2 a plurality of times (for example, four times) in a row, the conventional relay calculation cycle The trip signal can be output faster than that.

A trip signal is also output when the differential relay calculation unit 156 determines that a failure has occurred in the bus 2. Therefore, even if the failure determination unit 154 does not detect the failure of the bus 2 for some reason, the trip signal can be output when the failure of the bus 2 is detected by the differential relay calculation.

FIG. 11 is a flowchart showing an example of a failure determination processing procedure for the protection relay device 100. With reference to FIG. 11, the protection relay device 100 calculates the rate of change of each line current (for example, the rate of change of current ΔI1 (t), ΔI2 (t), ΔI3 (t)) (step S10). The protection relay device 100 calculates the rate of change of the differential current at each line current (for example, the rate of change of current ΔId (t)) (step S12).

The protection relay device 100 extracts the rate of change of the line current having a magnitude of the threshold Th1 or more from the rate of change of each line current (step S14). In the protection relay device 100, the magnitude of the rate of change of the differential current is equal to or greater than the threshold value Th2, and the rate of change of the extracted line current (for example, the rate of change of current ΔI1 (t), ΔI2 (t)). It is determined whether or not the polarity and the polarity of the rate of change of the differential current are the same (step S16).

If they are the same (YES in step S16), the protection relay device 100 determines that an internal failure has occurred in the bus 2 (step S18), and outputs a trip signal (step S20). If this is not the case (NO in step S16), the protection relay device 100 determines whether or not an internal failure of the bus 2 has occurred based on the differential relay calculation (step S22). When an internal failure occurs (YES in step S22), the protection relay device 100 outputs a trip signal (step S22). If no internal failure has occurred, the protection relay device 100 ends the process without outputting a trip signal.

<Advantage>
According to this embodiment, the failure determination of the bus 2 is executed using the current change rate obtained for each sampling cycle shorter than the relay calculation cycle. Therefore, the failure determination can be performed at a higher speed than the failure determination by the normal relay calculation, and the protection relay device 100 can be operated at a higher speed.

Other embodiments.
The configuration exemplified as the above-described embodiment is an example of the configuration of the present invention, can be combined with another known technique, and a part thereof is omitted as long as the gist of the present invention is not deviated. , Can be modified and configured. Further, in the above-described embodiment, the processing and configuration described in the other embodiments may be appropriately adopted and carried out.

It should be considered that the embodiments disclosed this time are exemplary in all respects and not restrictive. The scope of the present invention is shown not by the above description but by the scope of claims, and is intended to include all modifications within the meaning and scope equivalent to the scope of claims.

2 bus, 8 voltage transformer, 31 input converter, 32 input converter, 35 AD converter, 36 analog filter, 37 SH circuit, 38 multiplexer, 39 AD converter, 40 arithmetic processing unit, 41 CPU, 42 RAM, 43 ROM, 44 bus, 50 interface section, 51 DO circuit, 52 DI circuit, 61, 63 current transformer, 71, 73 breaker, 80 judgment circuit, 91, 92 back power supply, 100 protection relay device, 152 rate of change calculation 154 Fault determination unit, 156 differential relay calculation unit, 158 output control unit.

Claims (8)

A protection relay device to protect the bus
An input unit that receives the input of the line current flowing through each of the plurality of lines branched from the bus, and
Change rate calculation unit that calculates the rate of change of each line current and the rate of change of differential current in each line current based on the data of each line current sampled in a sampling cycle shorter than the relay calculation cycle. When,
A protection relay device including a failure determination unit that determines whether or not a failure has occurred in the bus based on the polarity and magnitude of the rate of change of the line current and the polarity and magnitude of the rate of change of the differential current. .. The plurality of lines include a first line and a second line.
When the magnitude of the rate of change of the first line current flowing through the first line and the magnitude of the rate of change of the second line current flowing through the second line are equal to or greater than the first threshold value, the rate of change of the differential current When the magnitude is equal to or greater than the second threshold value, and the polarity of the rate of change of the first line current, the polarity of the rate of change of the second line current, and the polarity of the polarity of the rate of change of the differential current are the same. The protection relay device according to claim 1, wherein the failure determination unit determines that a failure has occurred in the bus. When the magnitude of the rate of change of the first line current is equal to or greater than the first threshold value and the magnitude of the rate of change of the second line current is less than the first threshold value, the magnitude of the rate of change of the differential current is large. When the value is equal to or higher than the second threshold value and the polarity of the rate of change of the first line current and the polarity of the rate of change of the differential current are the same, the failure determination unit causes the bus to fail. The protection relay device according to claim 2, wherein it is determined that the current has occurred. The rate of change of the line current is the amount of change of the line current per unit time.
The rate of change of the differential current is the amount of change of the differential current per unit time.
The protection relay device according to claim 2 or 3, wherein the unit time is a time corresponding to the sampling cycle. The amount of change in the line current per unit time is the amount of change in the line current between the current sampling time and the previous sampling time.
The protection relay device according to claim 4, wherein the amount of change in the differential current per unit time is the amount of change in the differential current between the current sampling time and the previous sampling time. The amount of change in the line current per unit time is the first change amount of the line current per unit time between the current sampling time and the previous sampling time, and the sampling time of this time and the sampling two times before. Including the second change amount of the line current per unit time with respect to the time.
The amount of change in the differential current per unit time is the amount of change in the differential current per unit time between the current sampling time and the previous sampling time, and the current sampling time. The protection relay device according to claim 4, which includes a fourth change amount of the differential current per unit time between the sampling time and the sampling time two times before the previous time. The protection relay device according to any one of claims 1 to 6, further comprising an output control unit that outputs an operation signal when the failure determination unit determines that a failure has occurred in the bus. A calculation processing unit that executes a protection relay calculation in the relay calculation cycle based on the sampling data of each line current is further provided.
The protection relay device according to claim 7, wherein when the calculation processing unit detects a failure of the bus based on the result of the protection relay calculation, the output control unit outputs the operation signal.

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