JP2021063978A - Liquid crystal display device and electronic apparatus - Google Patents

Abstract

To suppress variations in the optimum Vcom in a display surface of a liquid crystal display device in a lateral electric field mode.SOLUTION: A liquid crystal display device 100 includes: an active matrix substrate 10; a liquid crystal panel 110 having a counter substrate 20 and a liquid crystal layer 30; and a backlight 120. The active matrix substrate 10 includes: an orientation film 13 for defining the initial orientation direction of liquid crystal molecules; a pixel electrode 11 for generating a lateral electric field that orients the liquid crystal molecules to a direction which is not the initial orientation direction; and a common electrode 12. The orientation film 13 has a specific resistance in the range between 1.5×1013 Ω cm and 4.0×1014 Ω cm, both inclusive, when the backlight is emitting light.SELECTED DRAWING: Figure 1

Description

The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device that displays in a lateral electric field mode. The present invention also relates to an electronic device provided with such a liquid crystal display device.

In recent years, the Fringe Field Switching (FFS) mode has been widely adopted as a display mode for small and medium-sized liquid crystal display devices used in tablets, notebook PCs, and smartphones. The FFS mode is a kind of horizontal electric field mode in which display is performed using a horizontal electric field. An FFS mode liquid crystal display device is disclosed in, for example, Patent Document 1.

In the FFS mode liquid crystal display device, a pair of electrodes for generating a lateral electric field is provided on one of a pair of substrates sandwiching a horizontally oriented liquid crystal layer. The pair of electrodes is typically a pixel electrode in which a plurality of slits are formed and a common electrode arranged under the pixel electrode via an insulating layer. When a voltage is applied between the pixel electrode and the common electrode, a transverse electric field is generated, and the orientation regulating force of this transverse electric field changes the orientation direction of the liquid crystal molecules.

As described above, in the FFS mode liquid crystal display device, the orientation state of the liquid crystal molecules is controlled by using the transverse electric field. In the FFS mode, the liquid crystal molecules rotate in a plane parallel to the display plane, so that high viewing angle characteristics can be obtained. The lateral electric field generated by the electrode structure in the FFS mode is sometimes called a "fringe electric field".

Until now, the alignment film of the FFS mode liquid crystal display device was often subjected to a rubbing treatment, but recently, a photoalignment treatment is performed to reduce alignment unevenness (that is, a photoalignment film as an alignment film). Is proposed).

Further, the active matrix substrate of the liquid crystal display device includes a thin film transistor (hereinafter, “TFT”) as a switching element for each pixel. As such a TFT, a TFT using an oxide semiconductor layer as an active layer (hereinafter, referred to as "oxide semiconductor TFT") is known. Patent Document 2 discloses a liquid crystal display device using InGaZnO (an oxide composed of indium, gallium, and zinc) as an active layer of a TFT.

Oxide semiconductor TFTs can be operated at a higher speed than amorphous silicon TFTs. Further, since the oxide semiconductor film is formed by a simpler process than the polycrystalline silicon film, it can be applied to an apparatus requiring a large area. Therefore, the oxide semiconductor TFT is expected as a high-performance active element that can be manufactured while suppressing the number of manufacturing steps and the manufacturing cost.

Further, since the oxide semiconductor TFT has excellent off-leakage characteristics, it is possible to use a drive method for displaying by reducing the frequency of image rewriting. For example, when displaying a still image, the image data can be rewritten at a frequency of once per second. Such a drive system is called a dormant drive or a low frequency drive, and can significantly reduce the power consumption of the liquid crystal display device.

JP-A-2002-182230 Japanese Unexamined Patent Publication No. 2012-134475

In a liquid crystal display device in a transverse electric field mode such as the FFS mode, a difference may occur in the display surface (inside the panel surface) in the optimum common voltage (hereinafter referred to as "optimum Vcom"). FIG. 8 is a diagram showing how the optimum Vcom varies in the display surface of the liquid crystal display device 900. The liquid crystal display device 900 shown in FIG. 8 has a display area DR and a peripheral area (frame area) FR located around the display area DR. In the example shown in FIG. 8, the gate driver is mounted (or monolithically formed) in the portion FR1 located on the right side of the display region DR of the peripheral region FR, and the source driver is mounted in the portion FR2 located below the display region DR. Is implemented (or formed monolithically).

In FIG. 8, the optimum Vcom value of each of the nine regions A to I in the display region DR is shown as a relative value with the optimum Vcom value of the central region E set to zero. As shown in FIG. 8, it can be seen that the optimum Vcom varies within the display area DR (that is, within the display surface).

The variation in the optimum Vcom is due to the difference in the distance from the gate driver to each region. The degree of accent of the gate waveform varies depending on the distance from the gate driver to each region. Therefore, a difference occurs in the lead-in voltage in the display surface, and a difference also occurs in the optimum Vcom. Further, even when the thickness of the passivation film is uneven in the display surface, a difference in the pull-in voltage may occur and a difference in the optimum Vcom may occur.

Since the common voltage setting value (Vcom setting value) cannot be different for each pixel or for each area of a certain size, if the optimum Vcom varies within the display surface, there is a region where the optimum Vcom deviates from the Vcom setting value. Will be done. As a result, in such an area, an adverse effect on the display such as seizure and flicker occurs. Further, when low frequency driving using the characteristics of the oxide semiconductor TFT is performed, flicker tends to become more prominent.

The present invention has been made in view of the above problems, and an object of the present invention is to suppress variations in the optimum Vcom in the display surface of a liquid crystal display device in a transverse electric field mode.

This specification discloses the liquid crystal display device and the electronic device described in the following items.

[Item 1]
A liquid crystal display panel having a plurality of pixels, the liquid crystal display having an active matrix substrate, an opposing substrate facing the active matrix substrate, and a liquid crystal layer provided between the active matrix substrate and the opposing substrate. With the panel
A backlight arranged on the back side of the liquid crystal display panel and
It is a liquid crystal display device equipped with
The active matrix substrate is
An alignment film provided so as to be in contact with the liquid crystal layer, which defines an initial orientation film which is an orientation direction of liquid crystal molecules when an electric field is not applied to the liquid crystal layer.
Pixel electrodes and common electrodes that generate a transverse electric field that orients the liquid crystal molecules in an orientation different from the initial orientation orientation, and are provided on each of the plurality of pixels and a common electrode to which a common voltage is applied. When,
Have,
The alignment film is a liquid crystal display device having a specific resistance of 1.5 × 10 ¹³ Ω · cm or more and 4.0 × 10 ^{14 Ω · cm or less when the backlight is lit.}

[Item 2]
The liquid crystal display device according to item 1, wherein the specific resistance of the alignment film when the backlight is lit is 2.2 × 10 ^{14 Ω · cm or less.}

[Item 3]
The liquid crystal display device according to item 1 or 2, wherein the specific resistance of the alignment film when the backlight is lit is 2.5 × 10 ^{13 Ω · cm or more.}

[Item 4]
The liquid crystal according to any one of items 1 to 3, wherein the opposed substrate has a second substrate and a further alignment film provided on the liquid crystal layer side of the second substrate and defining the initial orientation orientation of the liquid crystal molecules. Display device.

[Item 5]
The liquid crystal according to item 4, wherein the further alignment film is an alignment film having a specific resistance of 1.5 × 10 ¹³ Ω · cm or more and 4.0 × 10 ^{14 Ω · cm or less when the backlight is lit.} Display device.

[Item 6]
The liquid crystal display device according to item 5, wherein the specific resistance of the further alignment film when the backlight is lit is 2.2 × 10 ^{14 Ω · cm or less.}

[Item 7]
The liquid crystal display device according to item 5 or 6, wherein the specific resistance of the further alignment film when the backlight is lit is 2.5 × 10 ^{13 Ω · cm or more.}

[Item 8]
A liquid crystal display panel having a plurality of pixels, the liquid crystal display having an active matrix substrate, an opposing substrate facing the active matrix substrate, and a liquid crystal layer provided between the active matrix substrate and the opposing substrate. With the panel
A backlight arranged on the back side of the liquid crystal display panel and
It is a liquid crystal display device equipped with
The active matrix substrate is
An alignment film provided so as to be in contact with the liquid crystal layer, which defines an initial orientation film which is an orientation direction of liquid crystal molecules when an electric field is not applied to the liquid crystal layer.
Pixel electrodes and common electrodes that generate a transverse electric field that orients the liquid crystal molecules in an orientation different from the initial orientation orientation, and are provided on each of the plurality of pixels and a common electrode to which a common voltage is applied. When,
Have,
A liquid crystal display device in which the amount of increase in the optimum common voltage when the highest gradation display is performed for 1 hour by setting the common voltage to a value obtained by adding 100 mV to the optimum common voltage is 50 mV or more.

[Item 9]
The liquid crystal display device according to item 8, wherein the amount of increase in the optimum common voltage when the highest gradation display is performed for 1 hour by setting the common voltage to a value obtained by adding 100 mV to the optimum common voltage is 60 mV or more.

[Item 10]
The liquid crystal display device according to any one of items 1 to 9, which displays in the fringe field switching mode.

[Item 11]
The liquid crystal display device according to any one of Items 1 to 10, wherein the liquid crystal molecule has a negative dielectric anisotropy.

[Item 12]
The liquid crystal display device according to any one of items 1 to 11, which can be driven at a drive frequency of 40 Hz or less.

[Item 13]
The liquid crystal display device according to any one of items 1 to 12, wherein the alignment film is a photoalignment film.

[Item 14]
The liquid crystal display device according to item 13, wherein the photoalignment film is an isomerization type, decomposition type, or dimerization type photoalignment film.

[Item 15]
The liquid crystal display device according to any one of items 1 to 14, wherein the pixel electrode is provided on the common electrode via an insulating layer.

[Item 16]
The liquid crystal display device according to item 15, wherein the insulating layer includes a silicon nitride layer, a silicon oxide layer, or a silicon oxide nitride layer.

[Item 17]
The liquid crystal display device according to item 16, wherein the insulating layer has a laminated structure including two layers of the silicon nitride layer, the silicon oxide layer, and the silicon oxide layer.

[Item 18]
The liquid crystal display device according to any one of items 1 to 17, wherein the opposed substrate has a second substrate and a color filter layer provided on the liquid crystal layer side of the second substrate.

[Item 19]
The liquid crystal display device according to item 18, wherein the opposed substrate further includes an overcoat layer that covers the color filter layer.

[Item 20]
The liquid crystal display device according to any one of items 10 to 19, wherein the further alignment film directly or indirectly cites any of items 4 to 7 and items 4 to 7 which are photo-alignment films.

[Item 21]
The liquid crystal display device according to item 20, wherein the further alignment film is an isomerized, decomposed or dimerized photoaligned film.

[Item 22]
The liquid crystal display device according to any one of Items 1 to 21, wherein each of the pixel electrode and the common electrode is formed of indium tin oxide or indium zinc oxide.

[Item 23]
The liquid crystal display device according to any one of items 1 to 22, wherein the active matrix substrate further includes a TFT electrically connected to the pixel electrode.

[Item 24]
The liquid crystal display device according to item 23, wherein the TFT includes an oxide semiconductor layer.

[Item 25]
The liquid crystal display device according to item 24, wherein the oxide semiconductor layer includes an In-Ga-Zn-O-based semiconductor.

[Item 26]
The liquid crystal display device according to item 25, wherein the In-Ga-Zn-O-based semiconductor includes a crystalline portion.

[Item 27]
An electronic device provided with the liquid crystal display device according to any one of items 1 to 26.

According to the embodiment of the present invention, it is possible to suppress the variation of the optimum Vcom in the display surface of the liquid crystal display device in the lateral electric field mode.

It is sectional drawing which shows typically the liquid crystal display device 100 by embodiment of this invention. It is a figure which shows the region A to I which evaluated the transition of the optimum Vcom. It is a graph which shows the evaluation result of the transition of the optimum Vcom in regions A to I about sample 1. It is a graph which shows the evaluation result of the transition of the optimum Vcom in regions A to I about sample 2. It is a graph which shows the evaluation result of the transition of the optimum Vcom in the region E about samples 3-6. For Samples 3 to 6, the horizontal axis is the specific resistance ρ_BLon of the alignment film when the backlight is lit, and the vertical axis is the value of the optimum Vcom in the region E after 1 hour. It is sectional drawing which shows the example of the oxide semiconductor TFT. It is a figure which shows the appearance that the optimum Vcom varies in the display surface in a liquid crystal display device 900.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. The present invention is not limited to the following embodiments.

The liquid crystal display device 100 according to the embodiment of the present invention will be described with reference to FIG. FIG. 1 is a cross-sectional view schematically showing a liquid crystal display device 100.

As shown in FIG. 1, the liquid crystal display device 100 includes a liquid crystal display panel 110 and a backlight 120. The liquid crystal display device 100 displays in the FFS mode.

The liquid crystal display panel 110 has an active matrix substrate 10, an opposing substrate 20 facing the active matrix substrate 10, and a liquid crystal layer 30 provided between the active matrix substrate 10 and the opposing substrate 20. Further, the liquid crystal display panel 110 has a plurality of pixels. The plurality of pixels are arranged in a matrix including a plurality of rows and a plurality of columns.

The active matrix substrate (sometimes referred to as a “TFT substrate”) 10 has a transparent substrate 10a, a pixel electrode 11, a common electrode 12, and an alignment film 13.

The transparent substrate (first substrate) 10a is, for example, a glass substrate or a plastic substrate. The pixel electrode 11, the common electrode 12, and the alignment film 13 are provided on the liquid crystal layer 30 side of the transparent substrate 10a and are supported by the transparent substrate 10a.

The alignment film 13 is provided so as to be in contact with the liquid crystal layer 30 (that is, it is located on the outermost surface of the active matrix substrate 10 on the liquid crystal layer 30 side). The alignment film 13 defines the initial orientation of the liquid crystal molecules. The initial orientation orientation is the orientation orientation of the liquid crystal molecules when no electric field is applied to the liquid crystal layer 30.

The pixel electrode 11 and the common electrode 12 are provided between the transparent substrate 10a and the alignment film 13, and are sometimes called a transverse electric field (sometimes called a “fringe electric field”” that orients the liquid crystal molecules in an orientation different from the initial orientation orientation. ) Is generated. The pixel electrode 11 and the common electrode 12 are each formed of a transparent conductive material (for example, indium tin oxide (ITO) or indium zinc oxide (IZO)).

The pixel electrode 11 is provided for each of the plurality of pixels. On the other hand, the common electrode 12 is provided in common to a plurality of pixels. The pixel electrode 11 is provided on the common electrode 12 via the insulating layer 14. The insulating layer 14 is, for example, a silicon nitride (SiNx) layer, a silicon oxide (SiO ₂ ) layer, or a silicon oxide (SiNxOy) layer. Alternatively, the insulating layer 14 may have a laminated structure including two of these layers. The pixel electrode 11 has at least one (here, two) slits 11a. The direction of the lateral electric field generated by the pixel electrode 11 and the common electrode 12 is a direction orthogonal to the direction in which the slit 11a extends.

Although not shown here, the active matrix substrate 10 further includes a thin film transistor (TFT) provided for each pixel, a scanning line (gate bus line) for supplying a scanning signal (gate signal) to the TFT, and a display signal to the TFT. It has a signal line (source bus line) that supplies (source signal). The scanning line, the signal line, and the pixel electrode 11 are electrically connected to the gate electrode, the source electrode, and the drain electrode of the TFT, respectively. As the TFT, an oxide semiconductor TFT can be preferably used. A TFT other than the oxide semiconductor TFT may be used.

A display signal voltage is applied to the pixel electrode 11 via the TFT. A voltage (common voltage) Vcom common to all pixels is applied to the common electrode 12. The common voltage is set to an optimum value (optimum Vcom) from the viewpoint of reducing flicker.

The facing substrate (sometimes referred to as a "color filter substrate") 20 has a transparent substrate 20a and an alignment film 23.

The transparent substrate (second substrate) 20a is, for example, a glass substrate or a plastic substrate. The alignment film 23 is provided on the liquid crystal layer 30 side of the transparent substrate 20a and is supported by the transparent substrate 20a.

The alignment film 23 is provided so as to be in contact with the liquid crystal layer 30 (that is, it is located on the outermost surface of the facing substrate 20 on the liquid crystal layer 30 side). The alignment film 23 defines the initial orientation of the liquid crystal molecules, similarly to the alignment film 13 of the active matrix substrate 10. The orientation of the liquid crystal molecules defined by the alignment film 23 is parallel or antiparallel to the orientation of the liquid crystal molecules defined by the alignment film 13.

In the illustrated example, the opposing substrate 20 further includes a light-shielding layer (black matrix) 24, a color filter layer 25, an overcoat layer 26, and a transparent conductive layer 27.

The light-shielding layer 24 and the color filter layer 25 are provided on the liquid crystal layer 30 side of the transparent substrate 20a. The color filter layer 25 includes, for example, a red color filter, a green color filter, and a blue color filter.

The overcoat layer 26 covers the light-shielding layer 24 and the color filter layer 25. The overcoat layer 26 is formed of, for example, a transparent resin material. An alignment film 23 is provided on the overcoat layer 26.

The transparent conductive layer 27 is provided on the side of the transparent substrate 20a opposite to the liquid crystal layer 30 (on the observer side). The transparent conductive layer 27 is formed of a transparent conductive material (for example, ITO or IZO). The transparent conductive layer 27 can prevent static electricity from charging. The transparent conductive layer 27 may be omitted.

In this embodiment, the liquid crystal layer 30 contains liquid crystal molecules having negative dielectric anisotropy. That is, the liquid crystal layer 30 is formed of a negative liquid crystal material. When the liquid crystal molecules have negative dielectric anisotropy, the orientation regulating force due to the transverse electric field changes the orientation direction of the liquid crystal molecules so as to approach the orientation orthogonal to the direction of the transverse electric field.

The alignment films 13 and 23 arranged on both sides of the liquid crystal layer 30 are horizontal alignment films, respectively. Therefore, the liquid crystal molecules are oriented substantially parallel to the surfaces of the active matrix substrate 10 and the opposing substrate 20. In the present embodiment, the alignment films 13 and 23 are subjected to photoalignment treatment. That is, the alignment films 13 and 23 are photo-alignment films. The photoalignment film may be an isomerized type, a decomposed type, or a dimerized type. The isomerized, decomposed and dimerized photoalignment films are formed of materials (polymers containing such functional groups) that undergo isomerization, decomposition and dimerization reactions upon light irradiation, respectively. In the following, the alignment film 13 of the active matrix substrate 10 may be referred to as a “first alignment film”, and the alignment film 23 of the opposing substrate 20 may be referred to as a “second alignment film”.

The backlight 120 is arranged on the back side (opposite side to the observer) of the liquid crystal display panel 110. The backlight 120 irradiates the liquid crystal display panel 110 with light used for display. As the backlight 120, various known lighting devices can be used.

Although not shown here, the liquid crystal display device 100 further includes a pair of polarizing plates facing each other via at least the liquid crystal layer 30. A pair of polarizing plates are arranged on the cross Nicol. One transmission axis of the pair of polarizing plates is substantially parallel to the initial orientation of the liquid crystal molecules, and the other transmission axis is substantially orthogonal to the initial orientation. One polarizing plate is arranged, for example, on the back side of the transparent substrate 10a of the active matrix substrate 10. The other polarizing plate is arranged, for example, on the front side of the transparent substrate 20a of the opposing substrate 20.

The first alignment film 13 is an alignment film having a specific resistance of 4.0 × 10 ¹⁴ Ω · cm or less when the backlight 120 is lit. Further, here, the second alignment film 23 is also an alignment film having a specific resistance of 4.0 × 10 ¹⁴ Ω · cm or less when the backlight 120 is lit. In the following, the specific resistance when the backlight 120 is lit may be referred to as “specific resistance ρ_BLon”.

As described above, in the liquid crystal display device 100 of the present embodiment, the active matrix substrate 10 has an alignment film 13 having ^{a specific resistance ρ_BLon of 4.0 × 10 14 Ω · cm or less when the backlight 120 is lit.} Have. As a result, it is possible to suppress variations in the optimum Vcom within the display surface (inside the panel surface). The reason for this will be described below.

When a voltage is applied to the liquid crystal layer in the FFS mode liquid crystal display device, a charge bias having a polarity opposite to the applied voltage occurs inside the alignment film or on the surface of the alignment film. When AC drive is performed and there is a difference in the absolute value of the applied voltage between when the positive voltage is applied and when the negative voltage is applied, the polarity is opposite to the polarity of the applied voltage with the larger absolute value. Charge bias occurs. Therefore, the optimum Vcom shifts so that the absolute values of the positive and negative effective voltages are equal (when the positive voltage application time and the negative voltage application time are equal, the polarity opposite to the polarity of the larger voltage). This is because the charge is biased quickly). As a result, the optimum Vcom at each location on the display surface approaches the set Vcom value, and the variation of the optimum Vcom within the display surface becomes smaller. However, according to the study by the inventor of the present application, it was found that the speed at which the variation in the optimum Vcom becomes small greatly depends on the value of the specific resistance ρ_BLon of the alignment film when the backlight is lit. Furthermore, it was also found that the lower the resistivity ρ_BLon of the alignment film, the faster and smaller the variation of the optimum Vcom in the display surface.

Here, the result of verification that the variation of the optimum Vcom can be suppressed by setting the specific resistance ρ_BLon of the alignment film to a predetermined size will be described.

[Sample preparation]
First, two FFS modules (FFS mode liquid crystal display devices) were prepared as samples 1 and 2. Sample 1 has an alignment film having a specific resistance ρ_BLon of 3.8 × 10 ¹⁵ Ω · cm as a first alignment film and a second alignment film. Sample 2 has an alignment film having a specific resistance ρ_BLon of 7.2 × 10 ¹³ Ω · cm as a first alignment film and a second alignment film.

Sample 1 and Sample 2 have the same structure except that the specific resistance ρ_BLon of the alignment film is different. Samples 1 and 2 have the electrode structure shown in FIG. 1 (a structure in which a common electrode, an insulating layer, and a pixel electrode are laminated in this order from the lower layer side). The liquid crystal layer is formed of a negative liquid crystal material having a dielectric anisotropy of Δε of -3.4. The brightness of the backlight is about ^{10000 cd / m 2.}

[Evaluation of transition of optimal Vcom]
For Samples 1 and 2, the transition of the optimum Vcom was evaluated by the following procedure.

(1) The display screen of each module is switched to a frame inversion screen having a drive frequency of 60 Hz and 128 gradations. Then, using the optical characteristic evaluation device CA-310 (manufactured by Konica Minolta Co., Ltd.), the flicker level of a plurality of regions on the display screen of the module is measured while changing the set value (Vcom set value) of the common voltage Vcom. .. The flicker level was specifically measured in the nine regions A to I shown in FIG. As shown in FIG. 2, the module has a display area DR and a peripheral area (frame area) FR located around the display area DR. Of the peripheral area FR, the gate driver is mounted (or monolithically formed) on the portion FR1 located on the right side of the display area DR, and the source driver is mounted (or monolithically formed) on the portion FR2 located below the display area DR. ). The Vcom set value when the flicker level is minimized is regarded as the optimum Vcom in each of the regions A to I. The "N gradation" in the specification of the present application refers to the N gradation in the case of displaying in 0 gradation to 255 gradation (that is, in the case of 256 gradation display). Therefore, "128 gradation" refers to 128 gradation in 256 gradation display, and "255 gradation" refers to 255 gradation (highest gradation) in 256 gradation display.

(2) The optimum Vcom of the area E located in the center of the display screen is set as the write Vcom value of each module.

(3) The display screen of each module is switched to a lighting screen having a drive frequency of 60 Hz and 255 gradations, and is left to stand (aging) for a certain period of time.

(4) After a certain period of time has elapsed on the lighting screen of 255 gradations, (1) is performed again to determine the optimum Vcom of each of the regions A to I at that time.

After (5), (3) and (4) are repeated. While the lighting screen of 255 gradations is being displayed, the Vcom value determined in (2) is set as the writing Vcom value.

3 and 4 show the evaluation results of the transition of the optimum Vcom in the regions A to I for the samples 1 and 2. In FIGS. 3 and 4, as the optimum Vcom, a relative value with the optimum Vcom (writing Vcom value) in the initial (0h) region E as a reference (zero) is shown.

As can be seen from FIGS. 3 and 4, the optimum Vcom in the initial stage (0h) of each of Samples 1 and 2 has a variation of about 100 mV within the display surface (between regions A to I). Further, as can be seen from FIG. 3, in Sample 1, the variation of the optimum Vcom hardly changed even after the lapse of 3 hours. On the other hand, as can be seen from FIG. 4, in Sample 2, the variation of the optimum Vcom is greatly reduced to about 10 mV after 3 hours have passed.

As described above, the speed at which the optimum Vcom in each region in the display surface approaches the value of the writing Vcom differs depending on the magnitude of the specific resistance ρ_BLon of the alignment film, and more specifically, the specific resistance ρ_BLon of the alignment film. It was confirmed that the lower the value, the faster the speed.

[Sample preparation]
Subsequently, four FFS modules (FFS mode liquid crystal display devices) were prepared as samples 3 to 6. Sample 3 has an alignment film having a specific resistance ρ_BLon of 3.8 × 10 ¹⁵ Ω · cm as a first alignment film and a second alignment film. Sample 4 has an alignment film having a specific resistance ρ_BLon of 1.5 × 10 ¹⁴ Ω · cm as a first alignment film and a second alignment film. Sample 5 has an alignment film having a specific resistance ρ_BLon of 7.2 × 10 ¹³ Ω · cm as a first alignment film and a second alignment film. Sample 6 has an alignment film having a specific resistance ρ_BLon of 2.5 × 10 ¹³ Ω · cm as a first alignment film and a second alignment film.

Samples 3 to 6 have the same structure except that the specific resistance ρ_BLon of the alignment film is different. Samples 3 to 6 have the electrode structure shown in FIG. 1 (a structure in which a common electrode, an insulating layer, and a pixel electrode are laminated in this order from the lower layer side). The liquid crystal layer is formed of a negative liquid crystal material having a dielectric anisotropy of Δε of -3.4. The brightness of the backlight is about ^{10000 cd / m 2.}

[Evaluation of transition of optimal Vcom]
For Samples 3 to 6, the transition of the optimum Vcom was evaluated by the following procedure.

(1) The display screen of each module is switched to a frame inversion screen having a drive frequency of 60 Hz and 128 gradations. Then, using the optical characteristic evaluation device CA-310 (manufactured by Konica Minolta Co., Ltd.), the flicker level of the region E (see FIG. 2) located at the center of the display screen of the module is set to the set value (Vcom setting) of the common voltage Vcom. Measure while changing the value). The Vcom setting value when the flicker level becomes the minimum is regarded as the optimum Vcom.

(2) A value obtained by adding 100 mV to the optimum Vcom value determined in (1) is set as the write Vcom value of each module.

(3) The display screen of each module is switched to a lighting screen having a drive frequency of 60 Hz and 255 gradations, and is left to stand (aging) for a certain period of time.

(4) After a certain period of time has elapsed on the lighting screen of 255 gradations, (1) is performed again to determine the optimum Vcom of the region E at that time.

After (5), (3) and (4) are repeated. While the lighting screen of 255 gradations is being displayed, the Vcom value determined in (2) is set as the writing Vcom value.

FIG. 5 shows the evaluation results of the transition of the optimum Vcom in the region E for the samples 3 to 6. In FIG. 5, as the optimum Vcom, a relative value with the write Vcom value (optimal Vcom value in the initial (0 h) region E + 100 mV) as a reference (zero) is shown.

From FIG. 5, it can be seen that the lower the resistivity ρ_BLon of the alignment film, the faster the transition of the optimum Vcom and the closer to the written Vcom value in a shorter time. That is, even if the optimum Vcom varies within the display surface and flicker is a concern, if the specific resistance ρ_BLon of the alignment film is sufficiently low, the Vcom value in each region becomes constant immediately after lighting. The variation of the optimum Vcom in the display surface is eliminated.

Here, when the write Vcom value is set to a value obtained by adding 100 mV to the initial optimum Vcom value, if the optimum Vcom one hour later increases by 50 mV or more (that is, the difference between the write Vcom value and the optimum Vcom value is (If it is 50 mV or less), it can be considered that the speed at which the variation is eliminated is sufficient.

FIG. 6 is a graph in which the horizontal axis is the resistivity ρ_BLon of the alignment film and the vertical axis is the value of the optimum Vcom in the region E after 1 hour. When the logarithmic approximation is performed in the graph of FIG. 6, an approximate straight line represented by y = -17.81 ln (x) + 548.24 is obtained (x is the specific resistance ρ_BLon of the alignment film, and y is the optimum Vcom value after 1 hour. Is). Substituting y = 50 into the above equation gives x = 3.87 × 10 ¹⁴ . Therefore, if the specific resistance ρ_BLon of the alignment film is approximately 4.0 × 10 ¹⁴ Ω · cm or less, the amount of increase in the optimum Vcom after 1 hour is 50 mV or more, so that the optimum Vcom varies within the display surface. It can be said that it is resolved quickly enough.

The liquid crystal display device 100 of the present embodiment includes two alignment films (first alignment film 13 and second alignment film 23), but for the behavior of the optimum Vcom, the alignment film on the active matrix substrate 10 side. It is considered that the influence of (first alignment film) 13 is dominant. Therefore, when the specific resistance ρ_BLon of the first alignment film 13 when the backlight 120 is lit is 4.0 × 10 ¹⁴ Ω · cm or less, the variation of the optimum Vcom in the display surface is suppressed. be able to.

The specific resistance ρ_BLon of the first alignment film 13 when the backlight 120 is lit ^{is preferably 1.5 × 10 13} Ω · cm or more. If the specific resistance ρ_BLon of the first alignment film 13 is too small, the light in the visible region may be absorbed and the display light may be colored. Coloring of the display light causes a decrease in transmittance and a color shift (chromaticity shift). Further, if the specific resistance ρ_BLon of the first alignment film 13 is too small, the electric charge tends to be accumulated instantly, which may adversely affect the display. The effect of such charging tends to be noticeable when the specific resistance ρ_BLon is approximately 1 × 10 ¹³ Ω · cm or less. From the viewpoint of preventing coloring and charging of the display light as described above, the specific resistance ρ_BLon of the first alignment film 13 ^{is preferably 1.5 × 10 13} Ω · cm or more.

As described above, since the specific resistance ρ_BLon of the first alignment film 13 is 4.0 × 10 ¹⁴ Ω · cm or less, the common voltage is set to the value obtained by adding 100 mV to the optimum common voltage to display the highest gradation. The amount of increase in the optimum common voltage after 1 hour can be set to 50 mV or more, and the variation in the optimum Vcom within the display surface can be suppressed.

From the viewpoint of further suppressing the variation in the optimum Vcom in the display surface, the resistivity ρ_BLon of the first alignment film 13 when the backlight 120 is lit is 2.2 × 10 ¹⁴ Ω · cm or less. It is preferable to have. If the optimum Vcom value after 1 hour is increased by 60 mV or more when the write Vcom value is set to the value obtained by adding 100 mV to the initial optimum Vcom value (that is, the difference between the write Vcom value and the optimum Vcom value is 40 mV or less). If this is the case), it is considered that the speed of eliminating the variation in the optimum Vcom can be further improved (flicker and the like can be further suppressed). Substituting y = 60 into the above equation (y = -17.81 ln (x) + 548.24) yields x = 2.21 × 10 ¹⁴ . Therefore, if the specific resistance ρ_BLon of the first alignment film 13 is approximately 2.2 × 10 ¹⁴ Ω · cm or less, the amount of increase in the optimum Vcom after 1 hour is 60 mV or more, and therefore the optimum Vcom in the display surface. Variations are eliminated even faster.

Further, from the viewpoint of preventing the display light from being colored by the first alignment film 13 and charging of the first alignment film 13, the specific resistance ρ_BLon of the first alignment film 13 when the backlight 120 is lit is 2. .5 × 10 ¹³ Ω · cm or more is more preferable. When the specific resistance ρ_BLon of the first alignment film 13 is 2.5 × 10 ¹³ Ω · cm or more, it is possible to more reliably prevent coloring and charging of the display light.

From the viewpoint of suppressing the variation of the optimum Vcom in the display surface, the specific resistance ρ_BLon of the alignment film (second alignment film) 23 on the opposite substrate 20 side when the backlight 120 is lit is 4.0. preferably × it is 10 ¹⁴ Ω · cm or less, and more preferably less 2.2 × 10 ¹⁴ Ω · cm. Further, from the viewpoint of preventing the display light from being colored by the second alignment film 23 and charging of the second alignment film 23, the specific resistance ρ_BLon of the second alignment film 23 when the backlight 120 is lit is 1. It is preferably .5 × 10 ¹³ Ω · cm or more, and more preferably 2.5 × 10 ¹³ Ω · cm or more.

Although the configuration in which the first alignment film 13 and the second alignment film 23 are photo-alignment films is illustrated here, the first alignment film 13 and the second alignment film 23 do not have to be photo-alignment films, for example. It may be a rubbing-treated alignment film. Since the above-mentioned phenomenon is considered to depend only on the specific resistance ρ_BLon regardless of the details such as the components of the alignment film, the first alignment film 13 regardless of whether the rubbing treatment or the photoalignment treatment is used as the alignment treatment. It is considered that the same effect can be obtained by setting the specific resistance ρ_BLon of the second alignment film 23 to the range already described.

Further, although the case where the liquid crystal molecules of the liquid crystal layer 30 have negative dielectric anisotropy (that is, the liquid crystal layer 30 is formed of a negative liquid crystal material) is illustrated, the liquid crystal molecules of the liquid crystal layer 30 are positively dielectric. It may have anisotropy (that is, the liquid crystal layer 30 may be formed of a positive liquid crystal material).

Further, as already described, since the flicker is remarkably visually recognized when driven at a low frequency, the embodiment of the present invention has great significance when driven at a relatively low driving frequency, and specifically, it is significant. It is of great significance to use it when it is driven at a drive frequency of 40 Hz or less.

Although the liquid crystal display device 100 that displays in the FFS mode is illustrated here, the embodiment of the present invention is a liquid crystal that displays in a lateral electric field mode (for example, an IPS (In-Plane Switching) mode) other than the FFS mode. It may be a display device. In the FFS mode, the pixel electrode and the common electrode are formed in different layers, whereas in the IPS mode, the pixel electrode and the common electrode are formed in the same layer.

The liquid crystal display device according to the embodiment of the present invention is suitably used for various electronic devices such as smartphones and tablets.

<Oxide semiconductor>
The oxide semiconductor TFT includes an oxide semiconductor layer as an active layer. The oxide semiconductor contained in the oxide semiconductor layer may be an amorphous oxide semiconductor or a crystalline oxide semiconductor having a crystalline portion. Examples of the crystalline oxide semiconductor include a polycrystalline oxide semiconductor, a microcrystalline oxide semiconductor, and a crystalline oxide semiconductor in which the c-axis is oriented substantially perpendicular to the layer surface.

The oxide semiconductor layer may have a laminated structure of two or more layers. When the oxide semiconductor layer has a laminated structure, the oxide semiconductor layer may include an amorphous oxide semiconductor layer and a crystalline oxide semiconductor layer. Alternatively, it may contain a plurality of crystalline oxide semiconductor layers having different crystal structures. Further, a plurality of amorphous oxide semiconductor layers may be contained. When the oxide semiconductor layer has a two-layer structure including an upper layer and a lower layer, the energy gap of the oxide semiconductor contained in the upper layer is preferably larger than the energy gap of the oxide semiconductor contained in the lower layer. However, when the difference between the energy gaps of these layers is relatively small, the energy gap of the oxide semiconductor in the lower layer may be larger than the energy gap of the oxide semiconductor in the upper layer.

The materials, structures, film forming methods, configurations of oxide semiconductor layers having a laminated structure, etc. of the amorphous oxide semiconductor and each of the above crystalline oxide semiconductors are described in, for example, JP-A-2014-007399. .. For reference, all the disclosure contents of Japanese Patent Application Laid-Open No. 2014-007399 are incorporated herein by reference.

The oxide semiconductor layer may contain, for example, at least one metal element of In, Ga and Zn. In the present embodiment, the oxide semiconductor layer 18 includes, for example, an In—Ga—Zn—O-based semiconductor (for example, indium gallium zinc oxide). Here, the In-Ga-Zn-O-based semiconductor is a ternary oxide of In (indium), Ga (gallium), and Zn (zinc), and the ratio of In, Ga, and Zn (composition ratio). Is not particularly limited, and includes, for example, In: Ga: Zn = 2: 2: 1, In: Ga: Zn = 1: 1: 1, In: Ga: Zn = 1: 1: 2, and the like. Such an oxide semiconductor layer can be formed from an oxide semiconductor film containing an In—Ga—Zn—O based semiconductor.

The In-Ga-Zn-O-based semiconductor may be amorphous or crystalline. As the crystalline In-Ga-Zn-O-based semiconductor, a crystalline In-Ga-Zn-O-based semiconductor in which the c-axis is oriented substantially perpendicular to the layer surface is preferable.

The crystal structure of crystalline In-Ga-Zn-O-based semiconductors is disclosed in, for example, JP-A-2014-007399, JP-A-2012-134475, JP-A-2014-209727, and the like described above. ing. For reference, all the disclosure contents of JP2012-134475 and JP2014-209727 are incorporated herein by reference. Since a TFT having an In-Ga-Zn-O semiconductor layer has high mobility (more than 20 times that of a-SiTFT) and low leakage current (less than 1/100 of that of a-SiTFT). , Drive TFTs (for example, TFTs included in a drive circuit provided on the same substrate as the display area around a display area including a plurality of pixels) and pixel TFTs (TFTs provided in pixels).

The oxide semiconductor layer may contain another oxide semiconductor instead of the In-Ga-Zn-O-based semiconductor. For example, an In-Sn-Zn-O semiconductor (for example, In ₂ O _{3- SnO 2-} ZnO; InSnZnO) may be included. The In-Sn-Zn-O semiconductor is a ternary oxide of In (indium), Sn (tin) and Zn (zinc). Alternatively, the oxide semiconductor layer is an In-Al-Zn-O-based semiconductor, an In-Al-Sn-Zn-O-based semiconductor, a Zn-O-based semiconductor, an In-Zn-O-based semiconductor, or a Zn-Ti-O-based semiconductor. Semiconductors, Cd-Ge-O semiconductors, Cd-Pb-O semiconductors, CdO (cadmium oxide), Mg-Zn-O semiconductors, In-Ga-Sn-O semiconductors, In-Ga-O semiconductors, Zr-In-Zn-O semiconductor, Hf-In-Zn-O semiconductor, Al-Ga-Zn-O semiconductor, Ga-Zn-O semiconductor, In-Ga-Zn-Sn-O semiconductor, etc. May include.

An example of the configuration of the oxide semiconductor TFT is shown in FIG. The oxide semiconductor TFT 50 shown in FIG. 7 has a gate electrode 51, a gate insulating layer 52, an oxide semiconductor layer 53, a source electrode 54, and a drain electrode 55. The oxide semiconductor TFT 50 shown in FIG. 7 is a “channel etch type”, but the oxide semiconductor TFT may be a “etch stop type”.

<Channel etch>
In the "channel etch type TFT", for example, as shown in FIG. 7, an etch stop layer is not formed on the channel region, and the lower surface of the end portion of the source and drain electrodes on the channel side is an oxide semiconductor layer. It is arranged so as to be in contact with the upper surface. The channel-etched TFT is formed by, for example, forming a conductive film for a source / drain electrode on an oxide semiconductor layer and performing source / drain separation. In the source / drain separation step, the surface portion of the channel region may be etched.

<Etch stop>
On the other hand, in a TFT (etch stop type TFT) in which an etch stop layer is formed on a channel region, the lower surface of the end portion of the source and drain electrodes on the channel side is located, for example, on the etch stop layer. In the etch stop type TFT, for example, after forming an etch stop layer covering a portion of the oxide semiconductor layer that becomes a channel region, a conductive film for a source / drain electrode is formed on the oxide semiconductor layer and the etch stop layer. , Formed by performing source / drain separation.

According to the embodiment of the present invention, it is possible to suppress the variation of the optimum Vcom in the display surface of the liquid crystal display device in the lateral electric field mode.

10 Active matrix substrate 10a Transparent substrate 11 Pixel electrode 11a Slit 12 Common electrode 13 Alignment film 14 Insulation layer 20 Opposing substrate 20a Transparent substrate 23 Alignment film 24 Light-shielding layer 25 Color filter layer 26 Overcoat layer 27 Transparent conductive layer 30 Liquid crystal layer 100 Liquid crystal Display device 110 Liquid crystal display panel 120 Backlight DR Display area FR Peripheral area

Claims (27)

A liquid crystal display panel having a plurality of pixels, the liquid crystal display having an active matrix substrate, an opposing substrate facing the active matrix substrate, and a liquid crystal layer provided between the active matrix substrate and the opposing substrate. With the panel
A backlight arranged on the back side of the liquid crystal display panel and
It is a liquid crystal display device equipped with
The active matrix substrate is
An alignment film provided so as to be in contact with the liquid crystal layer, which defines an initial orientation film which is an orientation direction of liquid crystal molecules when an electric field is not applied to the liquid crystal layer.
Pixel electrodes and common electrodes that generate a transverse electric field that orients the liquid crystal molecules in an orientation different from the initial orientation orientation, and are provided on each of the plurality of pixels and a common electrode to which a common voltage is applied. When,
Have,
The alignment film is a liquid crystal display device having a specific resistance of 1.5 × 10 ¹³ Ω · cm or more and 4.0 × 10 ^{14 Ω · cm or less when the backlight is lit.} The liquid crystal display device according to claim 1, wherein the specific resistance of the alignment film when the backlight is lit is 2.2 × 10 ^{14 Ω · cm or less.} The liquid crystal display device according to claim 1 or 2, wherein the specific resistance of the alignment film when the backlight is lit is 2.5 × 10 ^{13 Ω · cm or more.} The liquid crystal display device according to claim 1 or 2, wherein the opposed substrate has a second substrate and a further alignment film provided on the liquid crystal layer side of the second substrate and defining the initial orientation orientation of the liquid crystal molecules. .. The further alignment film according to claim 4, wherein the further alignment film is an alignment film having a specific resistance of 1.5 × 10 ¹³ Ω · cm or more and 4.0 × 10 ¹⁴ Ω · cm or less when the backlight is lit. Liquid crystal display device. The liquid crystal display device according to claim 5, wherein the specific resistance of the further alignment film when the backlight is lit is 2.2 × 10 ^{14 Ω · cm or less.} The liquid crystal display device according to claim 5 or 6, wherein the specific resistance of the further alignment film when the backlight is lit is 2.5 × 10 ^{13 Ω · cm or more.} A liquid crystal display panel having a plurality of pixels, the liquid crystal display having an active matrix substrate, an opposing substrate facing the active matrix substrate, and a liquid crystal layer provided between the active matrix substrate and the opposing substrate. With the panel
A backlight arranged on the back side of the liquid crystal display panel and
It is a liquid crystal display device equipped with
The active matrix substrate is
An alignment film provided so as to be in contact with the liquid crystal layer, which defines an initial orientation film which is an orientation direction of liquid crystal molecules when an electric field is not applied to the liquid crystal layer.
Pixel electrodes and common electrodes that generate a transverse electric field that orients the liquid crystal molecules in an orientation different from the initial orientation orientation, and are provided on each of the plurality of pixels and a common electrode to which a common voltage is applied. When,
Have,
A liquid crystal display device in which the amount of increase in the optimum common voltage when the highest gradation display is performed for 1 hour by setting the common voltage to a value obtained by adding 100 mV to the optimum common voltage is 50 mV or more. The liquid crystal display device according to claim 8, wherein the amount of increase in the optimum common voltage when the highest gradation display is performed for 1 hour by setting the common voltage to a value obtained by adding 100 mV to the optimum common voltage is 60 mV or more. The liquid crystal display device according to claim 1, 2, 5, 6, 8 or 9, which displays in a fringe field switching mode. The liquid crystal display device according to claim 1, 2, 5, 6, 8 or 9, wherein the liquid crystal molecule has a negative dielectric anisotropy. The liquid crystal display device according to claim 1, 2, 5, 6, 8 or 9, which can be driven at a drive frequency of 40 Hz or less. The liquid crystal display device according to claim 1, 2, 5, 6, 8 or 9, wherein the alignment film is a photoalignment film. The liquid crystal display device according to claim 13, wherein the photoalignment film is an isomerization type, decomposition type, or dimerization type photoalignment film. The liquid crystal display device according to claim 1, 2, 5, 6, 8 or 9, wherein the pixel electrode is provided on the common electrode via an insulating layer. The liquid crystal display device according to claim 15, wherein the insulating layer includes a silicon nitride layer, a silicon oxide layer, or a silicon oxide nitride layer. The liquid crystal display device according to claim 16, wherein the insulating layer has a laminated structure including two layers of the silicon nitride layer, the silicon oxide layer, and the silicon oxide layer. The liquid crystal display device according to claim 1, 2, 5, 6, 8 or 9, wherein the opposed substrate has a second substrate and a color filter layer provided on the liquid crystal layer side of the second substrate. The liquid crystal display device according to claim 18, wherein the opposed substrate further includes an overcoat layer that covers the color filter layer. The liquid crystal display device according to claim 4, wherein the further alignment film is a photoalignment film. The liquid crystal display device according to claim 20, wherein the further alignment film is an isomerized, decomposed or dimerized photoaligned film. The liquid crystal display device according to claim 1, 2, 5, 6, 8 or 9, wherein each of the pixel electrode and the common electrode is formed of indium tin oxide or indium zinc oxide. The liquid crystal display device according to claim 1, 2, 5, 6, 8 or 9, wherein the active matrix substrate further includes a TFT electrically connected to the pixel electrode. The liquid crystal display device according to claim 23, wherein the TFT includes an oxide semiconductor layer. The liquid crystal display device according to claim 24, wherein the oxide semiconductor layer includes an In-Ga-Zn-O-based semiconductor. The liquid crystal display device according to claim 25, wherein the In-Ga-Zn-O-based semiconductor includes a crystalline portion. An electronic device comprising the liquid crystal display device according to claim 1, 2, 5, 6, 8 or 9.

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