JP2021040195A - Radiation imaging apparatus, radiation imaging system, and processing method of radiation imaging apparatus - Google Patents

Abstract

To provide a technology that can suppress the degradation of sharpness in a radiation imaging apparatus that can be used by switching feedback capacitance of an integrating amplifier.SOLUTION: The imaging apparatus includes a pixel array in which a plurality of pixel PIX is arranged, a readout circuit 103, and a correction unit. The readout circuit includes a holding circuit 324 that holds a plurality of signals read out via an integrating amplifier 302 that includes a feedback capacitance 312 that can change a plurality of capacitance values. The correction unit corrects radiation image data based on the plurality of signals held in the holding circuit 324. The correction unit corrects an effect of a first signal on a second signal held in the holding circuit 324 after the first signal among the plurality of signals.SELECTED DRAWING: Figure 3

Description

The present invention relates to a radiation imaging device, a radiation imaging system, and a processing method of the radiation imaging device.

Patent Document 1 proposes a radiation imaging device that generates an image signal related to a subject by being irradiated with radiation such as X-rays transmitted through the subject. This radiation imaging device includes a pixel array in which a plurality of pixels including a conversion element that converts radiation into electric charges are arranged in a two-dimensional matrix. The charges generated by the plurality of pixels are transferred to an integrator amplifier provided for each column of the pixel array and integrated. This integral amplifier has a configuration in which the gain (amplification rate) can be changed by switching the capacitance value of the feedback capacitance. This radiation imaging device uses a sample hold circuit to sample and hold the output signal of the integrating amplifier. The radiation imaging apparatus can also perform correlated double sampling (CDS) on the output signal of the integrating amplifier using two sample hold circuits in order to remove low frequency noise from the output signal of the integrating amplifier. Then, in this radiation imaging device, the output signal held in the sample hold circuit is subjected to parallel series conversion processing (multiplex processing) and analog-to-digital conversion processing (A / D conversion processing) to obtain image data for one frame. Can be obtained.

Japanese Unexamined Patent Publication No. 2015-198263

When switching the feedback capacitance of the integrator amplifier, when switching to the second capacitance value Cf2 whose feedback capacitance is smaller than the first capacitance value Cf1 mainly used, the charge-voltage conversion in the integrator amplifier is compared with the case of the first capacitance value Cf1. Requires a larger current.

Therefore, in the case of the second capacitance value Cf2, a longer time is required for sampling in the sample hold circuit than in the case of the first capacitance value Cf1. Due to the rate-determining of the charge / discharge capacity and the rate-determining of the sampling time, the output signal cannot be completely sampled in the sample hold circuit, and as a result, the output signal immediately before being read by the same sample hold circuit is superimposed on the next output signal. The problem of being discharged can occur. By superimposing the output signal, the MTF (Modulation Transfer Function), which is an index of the sharpness of the image, can be lowered. In particular, when performing an operation of transferring a charge-based signal from a pixel in a row to be scanned next to an integral amplifier while performing a parallel-series conversion process of an output signal based on the charge from a pixel in a row, one row is performed. The time allotted around is shortened. In such cases, the above problems may occur more prominently.

Therefore, an object of the present invention is to provide a technique capable of suppressing a decrease in sharpness in a radiation imaging apparatus in which the feedback capacitance of an integrating amplifier can be switched and used.

The radiation imaging apparatus of the present invention holds a plurality of signals read from the plurality of pixels via a pixel array in which a plurality of pixels are arranged and an integrating amplifier including a feedback capacitance capable of changing a plurality of capacitance values. A radiation imaging device including a read circuit including a holding circuit and a correction unit for correcting radiation image data based on a plurality of signals held in the holding circuit, wherein the correction unit is a correction unit for the plurality of signals. It is characterized in that the influence of the first signal on the second signal held in the holding circuit after the first signal is corrected.

INDUSTRIAL APPLICABILITY According to the present invention, it is possible to provide a technique capable of suppressing a decrease in sharpness in a radiation imaging apparatus that can be used by switching the feedback capacitance of an integrating amplifier.

Block diagram showing a configuration example of a radiation imaging device and a radiation imaging system Schematic equivalent circuit diagram showing a configuration example of a radiation imaging device Schematic equivalent circuit diagram showing a configuration example of a radiation imaging device Timing chart showing an operation example of a radiation imaging device Flowchart for explaining the processing of the embodiment Conceptual diagram for explaining pixel signals in radiographic image data Conceptual diagram for explaining the processing of the embodiment Flowchart for explaining the processing of the embodiment

Hereinafter, an exemplary embodiment of the present invention will be described with reference to the accompanying drawings. However, the details of the structure shown in each embodiment are not limited to those shown in the text and the drawings. In addition to X-rays, radiation also includes α-rays, β-rays, γ-rays, and various particle beams.

FIG. 1 shows the configuration of a radiological imaging system RIS (Radiology Information System) according to an embodiment of the present invention. The radiation imaging system RIS obtains a radiographic image of a subject by irradiating the subject with radiation such as X-rays and detecting X-rays that have passed through the subject. The radiation imaging system RIS may include, for example, a radiation source 112, an exposure control device 113, a control device 111, and a radiation imaging device 100. The exposure control device 113 generates radiation to the radiation source 112 in response to an exposure command by the operator. The control device 111 functions as an image processing device that controls the radiation imaging device 100 and processes an image that acquires a radiation image from the radiation imaging device 100 and displays it on a display device (not shown). Further, the control device 111 controls the exposure control device 113.

The radiation imaging device 100 includes an imaging unit 104 that captures a radiation image, a communication unit 107 that communicates with a control device 111, a control unit 106 that controls the imaging unit 104, and a power supply unit 108 that supplies power to the imaging unit 104. sell. Further, the radiation imaging apparatus 100 may include an analysis unit 109 that analyzes an image output from the imaging unit 104, and a processing unit 105 that performs arithmetic processing of the image. Some of the components of the radiation imaging device 100 may be incorporated in the control device 111, or the radiation imaging device 100 and the control device 111 may be integrated. For example, in the example shown in FIG. 1, the analysis unit 109 and the processing unit 105 are incorporated in the radiation imaging device 100, but the analysis unit 109 and the processing unit 105 may be incorporated in the control device 111.

The imaging unit 104 may include, for example, a pixel array 101, a scanning circuit 102, and a reading circuit 103. The pixel array 101 is configured by arranging a plurality of pixels so as to form a plurality of rows and a plurality of columns. The scanning circuit 102 scans a plurality of rows of the pixel array 101 according to a mode selected from the plurality of modes (shooting modes). The read circuit 103 reads a signal from the pixel array 101. More specifically, the reading circuit 103 reads the signal of the pixel of the row selected by the scanning circuit 102 among the plurality of rows of the pixel array 101. Reading a signal from the pixel array 101 means processing the signal output from the pixel array 101 and outputting the signal corresponding to the signal.

FIGS. 2 and 3 illustrate the equivalent circuit of the imaging unit 104. The pixel PIX may include, for example, a conversion element 201 that converts radiation or light into an electric charge, and a switch element 202 that outputs an electric signal corresponding to the electric charge. In one example, the conversion element 201 is a photoelectric conversion element that converts the light irradiated to the conversion element 201 into electric charges, and is a PIN-type photodiode or a PIN-type photodiode whose main material is amorphous silicon and is arranged on an insulating substrate such as a glass substrate. It is a MIS type photodiode. Further, as the conversion element 201, an indirect type conversion element provided with a wavelength converter that converts radiation into light in a wavelength band that can be detected by the photoelectric conversion element, and a direct type conversion element that directly converts radiation into electric charge are used. Can be adopted.

As the switch element 202, a transistor having a control terminal and two main terminals, for example, a thin film transistor (TFT) can be adopted. One electrode of the conversion element 201 is electrically connected to one of the two main terminals of the switch element 202, and the other electrode is electrically connected to the power supply unit 108 via a common bias line Vs. In FIG. 2, in order to distinguish the conversion elements 201 from each other, the conversion elements 201 are designated by Sij (i indicates a row number and j indicates a column number). Further, in order to distinguish the switch elements 202 from each other, the switch elements 202 are designated by Tij (i indicates a row number and j indicates a column number).

The control terminals of the switch elements 202 of the plurality of pixels PIX constituting one row are connected to the drive line Gi (i is the row number) of the row. For example, the control terminals of the switch elements T11 to T1n of the plurality of pixels PIX constituting the first row are electrically connected to the drive line G1 of the first row. Therefore, the minimum unit for driving the plurality of pixel PIXs of the pixel array 101 by the scanning circuit 102 is the pixel PIXs constituting one row.

The other main terminal of the switch element 202 of the plurality of pixels PIX constituting one row is connected to the signal line Sigma (j is the row number) of the row. For example, the main terminals of the switch elements T11 to Tm1 of the plurality of pixels PIX constituting the first row are electrically connected to the signal line Sigma1 in the first row. While the switch element 202 is in the conductive state, an electric signal corresponding to the electric charge of the conversion element 201 is output to the read circuit 103 via the signal line Sigma. The plurality of signal lines Sign1 to Sign are electrically connected to the read circuit 103.

The read circuit 103 includes a plurality of amplifier circuits 300 for amplifying a plurality of electric signals output in parallel from the pixel array 101 via the plurality of signal lines Sign1 to Sign. Each amplifier circuit 300 may include, for example, an integrator amplifier 302, a sample hold circuit 303, and a buffer amplifier 304 or 305. The integrator amplifier 302 amplifies the electric signal output via the signal line Sigma. The sample hold circuit 303 samples and holds an electric signal from the integrator amplifier 302. The buffer amplifier 304 and the buffer amplifier 305 buffer the electric signal from the sample hold circuit 303.

The integrator amplifier 302 may include, for example, an operational amplifier 311 and a feedback capacitance 312 and a reset switch 313. The operational amplifier 311 has an inverting input terminal that receives an electric signal provided via the signal line Sigma, a non-inverting input terminal that receives a reference voltage Vref from a reference power supply, and an output terminal. The feedback capacitance 312 and the reset switch 313 are arranged in parallel between the inverting input terminal and the output terminal. The feedback capacitance 312 may have a variable capacitance value Cf. The sample hold circuit 303 includes a first CDS circuit 341 and a second CDS circuit 342 that perform correlated double sampling (CDS). The first CDS circuit 341 includes a first holding circuit 323 and a second holding circuit 324, and performs correlated double sampling based on an electric signal provided via the signal line Sigj. The buffer amplifier 304 is composed of a differential amplifier, and differentially amplifies and outputs the output from the first holding circuit 323 and the output from the second holding circuit 324. The second CDS circuit 342 includes a first holding circuit 333 and a second holding circuit 334, and performs correlated double sampling based on an electric signal provided via the signal line Sigma. The buffer amplifier 305 is composed of a differential amplifier, and differentially amplifies and outputs the output from the first holding circuit 333 and the output from the second holding circuit 334.

The first holding circuit 323 may include a resistance element 322, a switch 325 and a capacitor 326. The first holding circuit 323 holds the electric signal from the integrating incremental amplifier 302 after being subjected to a low-pass filter process by the resistance element 322 and the capacitor 326. Further, the resistance element 322 can be selectively enabled or disabled by the switch 321.

The second holding circuit 324 may include a resistance element 322, a switch 327 and a capacitor 326. The second holding circuit 323 holds the electric signal from the integrating incremental amplifier 302 after being subjected to a low-pass filter process by the resistance element 322 and the capacitor 328. Further, the resistance element 322 can be selectively enabled or disabled by the switch 321.

The read circuit 103 may further include a multiplexer 306, a buffer amplifier 307, and an A / D converter 308. The multiplexer 306 sequentially selects and outputs electrical signals output in parallel from a plurality of amplifier circuits 300, and outputs them as image signals. The buffer amplifier 307 impedance-converts the image signal output from the multiplexer 306 and outputs an analog electric signal as the image signal Vout. The A / D converter 308 converts the image signal Vout output from the buffer amplifier 307 into digital image data and provides it to the processing unit 105 and the analysis unit 109.

The above-mentioned image signal detection is performed for each read circuit connected to Sign, and one line of image signal is detected. By scanning and repeating this operation up to Gm, the digital image signal on the entire surface of the radiation imaging device is finally detected.

Next, the operation of the image pickup apparatus will be described with reference to FIG. 4 (a) and 4 (b) are timing charts for explaining the imaging operation of the imaging apparatus. In the present embodiment, the radiation imaging apparatus 100 performs a pixel output operation on a line-by-line basis. Here, the one-frame period includes a storage period and a read period. The storage period is a period during which a plurality of pixel PIXs perform a storage operation in which signals corresponding to the irradiated radiation are stored. The read period is a period during which the scan circuit 102 scans a plurality of rows and the read circuit 103 reads a signal for one frame from the pixel array 101.

The radiation imaging device 100 repeatedly performs a pixel reset operation until the exposure switch is pressed and radiation (X-rays) is emitted. The pixel reset operation is an operation of resetting the pixels on the entire surface of the radiation imaging apparatus by repeating scanning line by line by the scanning circuit 102 in the same manner as the reading operation performed during the reading period.

When the exposure switch is pressed and radiation (X-rays) is emitted, the pixel array 101 is irradiated with radiation or light, and each conversion element S11 to S1n is generated with an electric charge corresponding to the irradiated radiation or light. Will be done. Next, the radiation imaging apparatus 100 starts the reset operation shown below. The feedback capacitance 312 is reset by the reset switch 313 to which the control signal RST is given from the control unit 106, and the integrating amplifier 302 which is the transmission path is reset. Then, when the reset switch 313 becomes non-conducting, the reset operation ends. Here, the reset operation is an operation of maintaining the continuity state of the reset switch, and is an operation of returning the potential of the transmission path to a specified initial value.

Next, the radiation imaging apparatus 100 starts the noise component sample hold operation shown below. The control signal ODDCDS1 is given from the control unit 106 to the sample hold circuit unit 303. As a result, the switch 325 of the first holding circuit 323 of the first CDS circuit 341 is conducted, and the noise component of the integrated amplifier 302 is transferred from the reset integrator amplifier 302 to the capacitor 326. The switch 325 is made non-conducting and the noise component is held in the capacitor 326. Then, when the switch 325 becomes non-conducting, the noise component sample hold operation ends. Here, the noise component sample hold operation is an operation of maintaining the conduction state of the switch 325 or the switch 335.

Next, the radiation imaging apparatus 100 starts the output operation of the first line shown below. Here, the start of the output operation of the first line is defined by the rising edge of the drive signal given to the drive wiring G1 of the first line from the scanning circuit 102, and the switch elements T11 to T1n of the pixel PIX of the first line are conducted. To. As a result, analog electric signals (pixel signals) based on the electric charges generated by the conversion elements S11 to S1n on the first line are output from each pixel to the first read circuit 103 in parallel via the signal wirings Sign1 to Sign. To. Then, due to the falling edge of the drive wiring G1, the switch elements T11 to T1n of the pixel PIX in the first row are brought into a non-conducting state, and the output operation from the pixel is completed. In the present invention, the output operation refers to an operation of maintaining the conduction state of the switch element 202 of the pixel PIX. In the following, the pixel signal of the pixel in the mth row and the nth column is referred to as S (m, n).

Next, the radiation imaging device 100 starts the signal sample hold operation shown below. The control signal ODDCDS2 is given from the control unit 106 to the sample hold circuit unit 303, and the switch 327 of the second hold circuit 324 of the first CDS circuit 341 is conducted. The pixel signal of the pixel PIX of the first row read by this is transferred to the capacitor 328 via the integrator amplifier 302. At this time, the noise component of the integrating amplifier 302 is added to the pixel signal. Then, the switch 327 is made non-conducting and the pixel signal to which the noise component is added is held in the capacitor 328. Then, when the switch 327 becomes non-conducting, the signal sample hold operation ends. Here, the signal sample hold operation is an operation of maintaining the conduction state of the switch 327 or the switch 337.

Next, the radiation imaging apparatus 100 starts the signal processing operation shown below. The noise component held in the capacitor 326 and the pixel signal of the pixel in the first row to which the noise component held in the capacitor 328 is added are input to the buffer amplifier 304, which is a differential amplifier, respectively. Then, a signal from which the noise component of each integrating amplifier 302 is removed is output. Then, the signal from which the noise component selectively transferred by the multiplexer 306 is removed is output to the A / D converter 308 via the buffer amplifier 307. The A / D converter 308 converts the output pixel signal into digital data S (1,1) and outputs it to the processing unit 105 that processes the digital data. The output operation of the second row is performed in parallel with the output operation of the first row, and after the A / D conversion of the first row is performed, it is selectively transferred by the multiplexer 306, as in the first row. Digital data S (1, 2) is output from the A / D converter 308 to the processing unit 105. After that, similarly, the pixel data output operation for the third column to the nth column is sequentially performed. As a result, the digital data S (1,3) to S (1, n) are output to the processing unit 105, respectively, and the signal processing operation ends. Here, this signal processing operation is performed between the start of the reset operation of a certain line and the start of the reset operation of the line next to the line. That is, the signal processing operation for the pixels of a certain row is performed in parallel with the output operation of the pixels of the row that is operated next to the row in time.

Similarly to the first line, the reset operation, the noise component sample hold operation, the output operation, the signal sample hold operation, and the signal processing operation of the second line are performed. The same processing is sequentially repeated row by row in the third and subsequent rows, and pixel signals corresponding to all the pixels of the pixel array 101 are output.

From the above, the noise component obtained by the first holding circuit 323 of the first CDS circuit 341 and the signal component including the noise component obtained by the second holding circuit 324 of the first CDS circuit 341. The difference becomes an image signal obtained by the read circuit 103. Further, the difference between the noise component obtained by the first holding circuit 333 of the second CDS circuit 342 and the signal component including the noise component obtained by the second holding circuit 334 of the second CDS circuit 342. Is the image signal obtained by the read circuit 103. In addition, each holding circuit also operates as a low-pass filter by the resistance element 322 and each capacitor. Therefore, the voltage of the electric signal held in the capacitor of each CDS circuit shows a transient response. Therefore, the time (sampling time) for the noise component sample hold operation and the signal sample hold operation can be set so that the output from the integrating amplifier 302 is sufficient in consideration of the transient response of the low-pass filter.

However, depending on the capacitance value of the feedback capacitance 312, the sampling time becomes insufficient, the transfer of the signal to be held in each second holding circuit becomes insufficient, and the image sharpness (MTF) in the column direction decreases. I found that it would end up. This is because when the capacitance value of the feedback capacitance 312 becomes small, a large current is required for the fluctuation of the output voltage of the integrator amplifier 302, but the current that can be passed through the path when sampling each holding circuit is constant. Therefore, it is considered that the cause may be that the capacity required to fluctuate the voltage of each capacitor may be insufficient. This means that, for example, when a radiation image is acquired in an operation mode having different frame rates with feedback capacities 312 that can be changed to a plurality of different capacitance values, the sampling time is set to a large operation mode with a feedback capacitance 312. It can happen when it is set together. If the capacitance value of the feedback capacitance 312 is increased in response to this insufficient capacity, noise increases, which is disadvantageous in terms of the signal-to-noise ratio (SNR). Further, if the sampling time is increased, the time required for one line (one line time) increases, which is disadvantageous from the viewpoint of the frame rate. Therefore, it is required to provide a technique capable of securing MTF and SNR even if the frame rate having a trade-off relationship is set to a desired value even in a shooting mode in which the capacitance value of the feedback capacitance 312 is small. ..

Therefore, the inventor of the present application has found the following solutions as a result of diligent studies. The process according to the embodiment of the present invention will be described with reference to the flowchart shown in FIG. If the transfer of the signal to be held by each first holding circuit is insufficient, the effect will appear as a mixture of the signal to be held next by the first holding circuit, and it will be in the column direction. It is considered that the image sharpness (MTF) is lowered. Therefore, in step S51, first, the relationship between the affected pixels, such as which pixel is affected by the output of which pixel, is specified. Specifically, it is desirable to obtain it from the number of each first holding circuit and the reading operation by the reading circuit 103. For example, the read circuit 103 has a first CDS circuit 341 and a second holding circuit 324 for each column as shown in FIG. 3, and the signal processing operation alternately performs read processing of odd-numbered rows and even-numbered rows. Think about the case. In this case, the signal held in the capacitor 328 of the second holding circuit 324 by the signal sample holding operation of the pixel signal S (1,1) is the next pixel that performs the signal sample holding operation using the same capacitance 328. The effect can occur so as to be mixed in the signal S (3, 1). That is, assuming that the pixel signal S (1,1) is the first signal and the pixel signal S (3,1) is the second signal, with respect to the second signal held in the second holding circuit 324 after the first signal. Therefore, the influence of the first signal may occur. Similarly, the effect of S (1, n) can occur on S (3, n) and the effect of S (m-2, n) can occur on S (m, n). Therefore, it is required that the pixel positions where the influence occurs can be generated one row apart in the column direction (direction parallel to the signal line Sigma) in FIG. 6A. The above case is obtained from the number of CDS circuits and the signal processing operation (when the even-numbered columns and the odd-numbered columns are read out alternately), and is not limited to the above case. For example, when the number of CDS circuits is three and the sequences are read out one by one in order, the influence of S (m-3, n) may appear in S (m, n).

Next, in step S52, the correction coefficient α is calculated. Here, the correction coefficient α is for reducing the above-mentioned influence generated in the CDS circuit, and can be an index indicating how much the influence is. Here, as the mechanism of the above influence, the signal held in the capacitor 328 of the second holding circuit 324 is integrated with the next pixel signal read by using the same capacitor 328 of the second holding circuit 324. Is assumed. Therefore, the correction coefficient α for reducing the above influence can be determined according to the signal amount of the pixel signal previously held in the capacitor 326 of the first holding circuit 323. Here, in calculating this correction coefficient, it is preferable to use the pixel signal of the correction pixel having no sensitivity to the incident radiation. As the correction pixel, for example, it is preferable to use a so-called OB (Optical Black) pixel having a light-shielding layer that shields light incident from the scintillator to the photoelectric conversion element. Since the correction pixel does not have sensitivity to radiation, that is, does not generate a signal corresponding to radiation, the above effect can be directly obtained. In the example shown in FIG. 6B, the influence of the pixel signals S (1, 2) appears on the pixel signals S (3, 2) of the OB pixel. At this time, the correction coefficient α can be expressed by the ratio of the pixel signal S (3,2), which is the pixel signal of the OB pixel, to the pixel signal S (1,2), which is the pixel signal of the normal pixel. The correction coefficient α in this case indicates the ratio of the influence of the pixel signal read by the same CDS circuit on the pixel signal read next. The correction coefficient α may be defined not only by the ratio of the pixel signal and the influence but also by the difference as long as it indicates the relationship between the pixel signals, and the derivation method is not limited to the above. For example, it may be derived by measuring a correction coefficient at which the MTF that can be reduced by this phenomenon becomes a normal value (for example, a characteristic in the row direction). Alternatively, it may be derived by numerically reproducing the degree of influence by numerical analysis such as simulation. Further, the correction coefficient α may be the same for all the pixels of the pixel array 101, or may be set for each pixel in consideration of the in-plane distribution, or the same correction coefficient may be applied in the CDS circuit. ..

Next, in step S53, the correction amount is derived. Although the details will be described later, in this correction, the derived correction amount is corrected by performing a predetermined process on the radiographic image. The correction amount is derived based on the correction coefficient α calculated in step S52 and the pixel signal read out by the CDS circuit. Hereinafter, a case where the ratio of the pixel signal, which is the pixel signal of the OB pixel, to the pixel signal, which is the pixel signal of the normal pixel, is used as the correction coefficient α is illustrated. In this case, the correction amount is derived by multiplying the correction coefficient α and the pixel signal read by the CDS circuit. Here, it is desirable that the target for which the correction amount is obtained is a radiation image corresponding to the irradiated radiation. For example, it is preferably applied to a radiation image before offset correction, a radiation image after offset correction, and a radiation image for gain correction used for gain correction on the radiation image. However, it may be applied to an image for offset correction used for offset correction for a radiation image. Here, if the same correction coefficient α is used for all the pixel signals in one frame without considering the in-plane distribution, the correction amount can be obtained by each pixel signal × α. Even when the in-plane distribution is taken into consideration and a unique correction value is derived for each pixel, the correction amount can be calculated by multiplying the output of each corresponding pixel by the correction coefficient set for each coordinate. Is. Here, the correction amount is derived by multiplying, but if it is a numerical calculation, it is not limited to multiplication. For example, the correction coefficient may be divided for each pixel of the captured image, or the correction amount may be derived by addition or subtraction. Further, due to its nature, the correction amount may be held as a numerical value for each pixel, or may be held as an image.

Then, in step S54, a correction process for correcting the radiation image using the correction amount derived in step S53 is performed. The correction amount derived in step S53 is regarded as a signal amount superimposed on the image signal of the pixel on which the influence specified in step S51 is generated by the pixel signal read out to the CDS circuit. Then, in step S54, the correction process is performed by subtracting the correction amount derived from the image signal of the specified pixel. This correction process makes it possible to correct the influence of the previously held pixel signal on the later held pixel signal in each first holding circuit. Here, in the example of alternately reading the odd-numbered rows and the even-numbered rows using the first CDS circuit 341 and the second CDS circuit 342, the correction amount is the correction amount from the pixel signal of the pixel shifted in the two-pixel column direction. By subtracting, the effect can be corrected.

The correction made in steps S51 to S54 can be performed by the correction unit 114, but the present invention is not limited thereto, and the correction may be performed by the analysis unit 109 and the processing unit 105. Further, the correction unit 114, the analysis unit 109, and the processing unit 105 may be incorporated in the control device 111 and performed by the control device 111.

Next, an example in which the above-mentioned influence is corrected by using a numerical example will be described with reference to FIG. 7. Here, an example in which odd-numbered rows and even-numbered rows are alternately read by using the first CDS circuit 341 and the second CDS circuit 342 will be described. Therefore, in step S51, it is required that the pixel position where the influence occurs can be generated by leaving one row in the column direction.

FIG. 7A shows each pixel signal (8 rows and 2 columns) in a normal case that is not affected by the above. FIG. 7B shows a pixel signal when it is affected. In FIGS. 7 (a) and 7 (b), the pixel S32 that outputs the pixel signal S (3, 2) is an OB pixel as in FIG. 6 (b). Here, in FIG. 7B, the correction coefficient α = 0.2 is calculated in step S52. This can be obtained from the values of the pixel signals S (1, 2) and the pixel signals S (3, 2). Here, an example in which a common correction coefficient α is applied to all pixels is shown.

Next, as shown in FIG. 7C, the correction amount is derived in step S53. Here, it can be derived by multiplying each pixel signal by the correction coefficient α.

Then, in step S54, a correction process for correcting the influence is performed using the correction amount derived in step S53. First, based on the position information specified in step S51, the correction amount obtained in step S53 is applied to the pixels shifted in the two-pixel row direction as shown in FIG. 7 (d). Shift in the pixel column direction (two rows). Then, by subtracting the pixel signal using the shifted correction amount, it is possible to obtain an image signal whose influence has been corrected, as shown in FIG. 7 (e).

Next, the image processing flow used in the present invention will be described with reference to the flowchart shown in FIG. First, in step S81, digital image data (radiation image data) of the radiation image is acquired.

Here, the image data acquired from the imaging unit 104 may include fixed pattern noise (Fixed Pattern Noise) FPN caused by dark current variation of the conversion element 201 and the switch element 202. Therefore, offset correction for correcting fixed pattern noise can be performed. This offset correction is performed by subtracting the image data for offset correction acquired without irradiation from the image data of the radiation image. Further, in the image data acquired from the imaging unit 104, in-plane sensitivity variation may occur due to the variation in the sensitivity of the conversion element 201 for each pixel. Therefore, gain correction for correcting this in-plane variation can be performed. This gain correction is performed by dividing the image data for gain correction acquired by irradiating the image data of the radiation image with radiation in the absence of a subject. Further, in the pixel array 101, there may be pixels whose output is abnormal, which is inevitably generated in manufacturing, or pixels whose output is abnormal due to an external factor, so-called missing pixels. Therefore, the image data acquired from the imaging unit 104 may include an abnormal output (abnormal pixel signal) from the missing pixel. Therefore, the missing pixel correction that corrects the abnormal output from the missing pixel by using the peripheral normal output pixel signal can be performed. This missing pixel correction can be performed, for example, by performing interpolation processing such as replacing the pixel signal of the missing pixel with the average value of the pixel signals from the eight pixels around the missing pixel.

Next, in step S82, offset correction is performed on the image data acquired in step S81.

Next, in step S83, the above-mentioned influence is corrected for the image data that has been offset-corrected. Here, the correction of the influence can be performed by performing each step of steps S51 to S54 on the image data to which the offset correction has been made.

Next, in step S83, gain correction is performed on the image data corrected in step S83. Then, in step S84, the missing pixel is corrected for the image data for which the gain is corrected. Here, it is desirable that the correction performed in steps S51 to S54 is performed on the image data before the gain correction is performed. When the image data is subjected to gain correction, each pixel signal is divided by a unique value, and the degree of influence changes. Therefore, the correction accuracy of the result proposal is also chained. This is because it drops to.

The present invention supplies a program that realizes one or more functions of the above-described embodiment to a system or device via a network or storage medium, and one or more processors in the computer of the system or device reads and executes the program. It can also be realized by the processing to be performed. It can also be realized by a circuit (for example, ASIC) that realizes one or more functions. The correction described in the embodiment for carrying out the invention may be performed by the correction unit 114, but the present invention is not limited thereto, and may be performed by the analysis unit 109 and the processing unit 105. Further, the correction unit 114, the analysis unit 109, and the processing unit 105 may be incorporated in the control device 111 and performed by the control device 111.

The invention is not limited to the above embodiments, and various modifications and modifications can be made without departing from the spirit and scope of the invention. Therefore, a claim is attached to make the scope of the invention public.

100 Radiation Imaging Device 101 Pixel Array 103 Read Circuit 114 Correction Unit 302 Integral Amplifier 312 Feedback Capacity 324 Second Holding Circuit

Claims (12)

A pixel array in which multiple pixels are arranged and
A reading circuit including a holding circuit for holding a plurality of signals read from the plurality of pixels via an integrator amplifier including a feedback capacitance capable of changing a plurality of capacitance values.
A correction unit that corrects radiographic image data based on a plurality of signals held in the holding circuit, and a correction unit.
It is a radiation imaging device including
The correction unit is a radiation imaging device that corrects the influence of the first signal on the second signal held in the holding circuit after the first signal among the plurality of signals. The correction unit identifies the relationship between the pixels in which the influence occurs, calculates a correction coefficient based on the first signal and the second signal, derives a correction amount based on the correction coefficient, and obtains the correction amount. The radiation imaging apparatus according to claim 1, wherein the effect is corrected by subtracting the correction amount from the two signals. The radiation imaging apparatus according to claim 2, wherein the correction unit specifies a relationship between the number of holding circuits and pixels in which the influence is generated from the reading operation by the reading circuit. The plurality of pixels include correction pixels that are insensitive to incident radiation.
The radiation imaging apparatus according to claim 3, wherein the correction unit calculates a correction coefficient using a signal from the correction pixel as the second signal. The correction pixel has a light-shielding layer that shields the incident from the scintillator that converts radiation into light to the photoelectric conversion element.
The radiation imaging apparatus according to claim 4, wherein the correction coefficient is calculated as indicating the ratio of the influence of the first signal on the second signal. The radiation imaging apparatus according to any one of claims 3 to 5, wherein the pixel array is arranged with a plurality of pixels so as to form a plurality of rows and a plurality of columns. The read circuit is read through the integrator amplifier provided for each of the plurality of rows, a first holding circuit for holding the noise component of the integrator amplifier, and the integrator amplifier as the holding circuit. The radiation imaging apparatus according to claim 6, further comprising a CDS circuit including a second holding circuit for holding the signal. The read circuit corresponds to a first CDS circuit corresponding to an odd number row among the plurality of rows and an even number row among the plurality of rows as the CDS circuit provided for each of the plurality of columns. The radiation imaging apparatus according to claim 7, further comprising a second CDS circuit. 8. The reading circuit includes a multiplexer that selectively transfers signals from the plurality of CDS circuits and an A / D converter that converts the signals from the multiplexer into analog-to-digital, according to claim 8. The radiographic imaging apparatus described. A scanning circuit that scans the plurality of rows of the pixel array so that the signal is output from the plurality of pixels to the reading circuit for each of the plurality of rows is further included.
The signal processing operation in which the multiplexer and the A / D converter process the signal output from the pixel of the first row of the plurality of rows, and the next of the first row of the plurality of rows. The radiation imaging apparatus according to claim 9, wherein the output operation of outputting the signal from the second row pixel scanned by the scanning circuit to the reading circuit is performed in parallel in time. The radiation imaging apparatus according to any one of claims 1 to 10.
An image processing device that processes a radiation image acquired from the radiation imaging device and displayed on the display device, and an image processing device.
Radiation imaging system including. A pixel array in which a plurality of pixels are arranged, and a reading circuit including a holding circuit for holding a plurality of signals read from the plurality of pixels via an integrating amplifier including a feedback capacitance capable of changing a plurality of capacitance values. A processing method of a radiation imaging device including a correction unit for correcting radiation image data based on a plurality of signals held in the holding circuit.
A processing method characterized in that the correction unit performs control for correcting the influence of the first signal on a second signal held in the holding circuit after the first signal among the plurality of signals.

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