JP2021019449A - Control ic of wireless power reception device, electronic apparatus, and modulation method in wireless power reception device - Google Patents

Abstract

To provide a control IC for receiving power in a wireless power delivery with reduced additional parts and pins.SOLUTION: A reception antenna 301 is connected to an AC1 terminal and an AC2 terminal of a control IC 400. A synchronous rectifier circuit 420 includes a plurality of transistors constituting a bridge circuit 422 and a synchronous rectifier controller 424 controlling the plurality of transistors, and is configured to rectify an electric current ICOIL(RX) flowing through the reception antenna 301 to be output from an RCT terminal. A modulation processing unit 414 switches a parameter for switching control executed by the synchronous rectifier controller 424 in accordance with a modulation signal MOD.SELECTED DRAWING: Figure 3

Description

The present invention relates to wireless power feeding technology.

In recent years, wireless power supply has shown signs of widespread use as a power supply method for electronic devices. There are two types of wireless power supply, electromagnetic induction (MI: Magnetic Induction) method and magnetic resonance (MR: Magnetic Resonance) method. The MI method is currently the standard "WPC (Wireless Power Consortium) established". "Qi" is the mainstream.

FIG. 1 is a diagram showing a configuration of a wireless power supply system 100R conforming to the Qi standard. The power feeding system 100R includes a power transmitting device 200R (TX, Power Transmitter) and a power receiving device 300R (RX, Power Receiver). The power receiving device 300R is mounted on electronic devices such as mobile phone terminals, smartphones, audio players, game devices, and tablet terminals.

The power transmission device 200R includes a transmission coil (primary coil) 202, a driver 204, a controller 206, and a demodulator 208. The driver 204 includes an H-bridge circuit (full-bridge circuit) or a half-bridge circuit, applies a drive signal S1 to the transmission coil 202, specifically, an AC drive signal, and receives a drive current flowing through the transmission coil 202 to transmit the transmission coil. A power signal S2 of an electromagnetic field is generated in 202. The controller 206 controls the entire power transmission device 200R in an integrated manner. Specifically, the controller 206 changes the transmission power by controlling the switching frequency of the driver 204, the duty ratio of switching, the phase, and the like.

The power receiving device 300R includes a receiving antenna 301, a rectifier circuit 304, a smoothing capacitor 306, a power supply circuit 308, a modulator 310, and a controller 312. The receiving antenna 301 includes a receiving coil 302 and a resonant capacitor 303 connected in series, receives the power signal S2 from the transmitting coil 202, and transmits the control signal S3 to the transmitting coil 202. Rectifier circuit 304 and smoothing capacitor 306, a current _{I RX} that is induced in the reception coil 302 is rectified, smoothed in response to the power signal S2, and converted into a DC voltage _{V RCT.}

The power supply circuit 308 boosts or steps down the DC voltage _VRCT and supplies it to the controller 312 and other loads 502. Alternatively, the load 502 may include a secondary battery and the power supply circuit 308 may include a charger that charges the secondary battery.

In the Qi standard (or PMA standard), a communication protocol is defined between the power transmission device 200R and the power reception device 300R, and information can be transmitted from the power reception device 300R to the power transmission device 200R by the control signal S3. There is. This control signal S3 is transmitted from the receiving coil 302 (secondary coil) to the transmitting coil 202 by ASK (Amplitude Shift Keying) using backscatter modulation.

The control signal S3 includes, for example, power control data (also referred to as a packet) instructing the amount of power supplied to the power receiving device 300R, data indicating unique information of the power receiving device 300R, and the like. The demodulator 208 demodulates the control signal S3 included in the current or voltage of the transmission coil 202. The controller 206 controls the driver 204 based on the power control data included in the demodulated control signal S3.

FIG. 2 is a circuit diagram showing the periphery of the modulator 310. The modulator 310 includes a pair of capacitors C ₁₁ and C ₁₂ and a pair of transistors M ₁₁ and M ₁₂ . One end of the capacitor C ₁₁ is connected to one end E1 of the receiving antenna 301, and the other end of the capacitor C ₁₁ is connected to the drain of the transistor M ₁₁ . Similarly, one end of the capacitor C ₁₂ is connected to the other end E2 of the receiving antenna 301, and the other end of the capacitor C ₁₂ is connected to the drain of the transistor M ₁₂ . By switching the transistors M ₁₁ and M ₁₂ according to the modulated signal, the resonance frequency of the receiving antenna 301 can be changed, and the control signal S3 can be transmitted.

Japanese Unexamined Patent Publication No. 2013-038854 Japanese Unexamined Patent Publication No. 2014-107971

As a result of examining the modulator 310 of FIG. 2, the present inventor has come to recognize the following problems.

Of the modulators 310, the transistors M ₁₁ and M ₁₂ are integrated in an IC (Integrated Circuit), but the capacitors C ₁₁ and C ₁₂ use external chip components, which is a factor in increasing costs. .. Further, in order to connect the drains of the transistors M ₁₁ and M ₁₂ to the outside, two pins (terminals) COM1 and COM2 are required. It is desirable to reduce the number of pins as much as possible because the pins are a factor that restricts the package size and causes mounting defects.

The present invention has been made in view of such a problem, and one of the exemplary purposes of the embodiment is to provide a control IC for power reception in wireless power feeding with reduced additional parts and pins.

One aspect of the present invention relates to a control IC (Integrated Circuit) of a wireless power receiving device. The control IC includes a first AC terminal and a second AC terminal to which the receiving antenna is connected, a rectifying terminal, and a synchronous rectifying circuit that rectifies the current flowing through the receiving antenna and outputs it from the rectifying terminal. The synchronous rectifier circuit includes a plurality of transistors forming a bridge circuit and a synchronous rectifier controller that controls the plurality of transistors. A synchronous rectifier circuit that rectifies the current flowing through the receiving antenna and outputs it from the rectifier terminal, and a synchronous rectifier circuit according to the modulated signal. , A modulation processing unit that switches the parameters of switching control by the synchronous rectification controller.

It should be noted that any combination of the above components and those in which the components and expressions of the present invention are mutually replaced between methods, devices, systems and the like are also effective as aspects of the present invention.

According to certain aspects of the invention, the number of peripheral components can be reduced, or the number of terminals can be reduced.

It is a figure which shows the structure of the wireless power supply system conforming to the Qi standard. It is a circuit diagram which shows the periphery of a modulator. It is a block diagram of the power receiving device provided with the control IC which concerns on embodiment. It is an operation waveform diagram of the power receiving device of FIG. It is a circuit diagram which shows the structural example of the synchronous rectifier circuit. It is an operation waveform diagram of the synchronous rectifier circuit of FIG. It is a waveform diagram of the rectified voltage _VRCT when the off delay time is fixed. It is a figure which shows the relationship between the off delay time and a rectified voltage _VRCT in a steady state. It is a waveform diagram when the off delay time is switched. It is a figure which shows the electronic device which includes the power receiving device which concerns on embodiment.

(Outline of Embodiment)
One embodiment disclosed herein relates to a control IC (Integrated Circuit) of a wireless power receiving device (simply referred to as a power receiving device). The control IC includes a first AC terminal and a second AC terminal to which the receiving antenna is connected, a rectifying terminal, and a synchronous rectifying circuit that rectifies the current flowing through the receiving antenna and outputs it from the rectifying terminal. The synchronous rectifier circuit includes a plurality of transistors forming a full bridge circuit and a synchronous rectifier controller that controls the plurality of transistors, rectifies the current flowing through the receiving antenna, outputs the rectifier terminal, and responds to the modulated signal. It also includes a modulation processing unit that switches the parameters of switching control by the synchronous rectification controller.

As a result, the substantial impedance of the rectifier circuit connected to the receiving antenna can be switched, and the ASK-modulated signal can be transmitted from the receiving antenna.

The synchronous rectification controller includes a first comparator that generates a first comparison signal showing a comparison result between the voltage of the first AC terminal and a first threshold voltage near zero, and a second comparator that generates a first comparison signal of the voltage of the second AC terminal and near zero. It may include a second comparator that generates a second comparison signal indicating a comparison result with the two threshold voltages, and a logic circuit that controls a plurality of transistors based on the first comparison signal and the second comparison signal. ..

Of the plurality of transistors, one provided between the rectifying terminal and the first AC terminal is the first high-side transistor, and one provided between the rectifying terminal and the second AC terminal is the second high-side transistor, the first. One provided between the AC terminal and the ground is a first low-side transistor, and one provided between the second AC terminal and the ground is a second low-side transistor. The logic circuit turns on the first pair consisting of the second high-side transistor and the first low-side transistor in response to one edge of the first comparison signal, and the first off delay time from the other edge of the first comparison signal. After that, the first pair is turned off, the second pair consisting of the first high-side transistor and the second low-side transistor is turned on in response to one edge of the second comparison signal, and the other edge of the second comparison signal is turned on. Therefore, the operation of turning off the second pair may be repeated after the lapse of the second off delay time.

The first off delay time and the second off delay time may be parameters that the modulation processing unit switches. That is, ASK modulation is possible by switching the combination of the first off delay time and the second off delay time between a relatively large state and a small state according to the modulation signal.

The first threshold voltage and the second threshold voltage may be parameters to be switched by the modulation processing unit. That is, by shifting the threshold voltage according to the modulated signal, the edge timing of the first comparison signal and the second comparison signal can be shifted.

(Embodiment)
Hereinafter, the present invention will be described with reference to the drawings based on preferred embodiments. The same or equivalent components, members, and processes shown in the drawings shall be designated by the same reference numerals, and redundant description will be omitted as appropriate. Further, the embodiment is not limited to the invention but is an example, and all the features and combinations thereof described in the embodiment are not necessarily essential to the invention.

In the present specification, the "state in which the member A is connected to the member B" means that the member A and the member B are physically directly connected, and that the member A and the member B are electrically connected to each other. It also includes the case of being indirectly connected via other members, which does not substantially affect the connection state, or does not impair the functions and effects performed by the combination thereof.

Similarly, "a state in which the member C is provided between the member A and the member B" means that the member A and the member C, or the member B and the member C are directly connected, and their electricity. It also includes the case of being indirectly connected via other members, which does not substantially affect the connection state, or does not impair the functions and effects performed by the combination thereof.

FIG. 3 is a block diagram of a power receiving device 300 including the control IC 400 according to the embodiment.

The power receiving device 300 mainly includes a receiving antenna 301, a control IC 400, and other peripheral circuit components. The control IC 400 contains the main parts of the power receiving device 300 in one package.

The receiving antenna 301 includes a receiving coil 302 and a resonant capacitor 303 connected in series. The receiving antenna 301 is connected between the AC terminals AC1 and AC2 of the control IC 400.

The control IC 400 includes a controller 410, a synchronous rectifier circuit 420, a power supply circuit 430, and a current detection circuit 432.

The controller 410 controls the power receiving device 300 in an integrated manner. The controller 410 may be implemented by a combination of a processor core and a software program, or may be implemented by hardware. The controller 410 has various functions. For example, it generates a packet to be transmitted to a wireless power transmission device, and superimposes an AM modulation signal on a coil current (coil voltage) based on this packet. As a result, the current (or voltage) of the transmission coil shifts, and the packet is transmitted to the power transmission device 200. The modulation function will be described later.

The controller 410 has a monitor an electrical state of each part of the control IC 400, or to calculate the reception power _{P RX,} controls the target voltage of the power supply circuit 430 functions. For example, an A / D converter 412 is provided along with the controller 410. The A / D converter 412 converts the rectified voltage _VRCT , the current I _OUT flowing through the power supply circuit 430, and the like into a digital signal, and supplies the rectified voltage to the controller 410.

The synchronous commutator circuit 420 is connected to the AC1 terminal and the AC2 terminal, rectifies the current I _{COIL (RX)} flowing through the receiving antenna 301, and outputs the full-wave rectifier to the RCT terminal. A smoothing capacitor 306 is connected to the RCT terminal. The voltage generated at the RCT terminal is called the rectified voltage V _RCT . The synchronous rectifier circuit 420 includes a bridge circuit 422 composed of a plurality of transistors and a synchronous rectifier controller 424 for driving the plurality of transistors of the bridge circuit 422. The synchronous rectifier controller 424 controls a plurality of transistors of the bridge circuit 422 based on the voltages V _AC1 and V _AC2 of the AC1 terminal and the AC2 terminal.

Of the plurality of transistors, one provided between the RCT terminal and the AC1 terminal is the first high-side transistor MH1, and one provided between the RCT terminal and the AC2 terminal is grounded with the second high-side transistor MH2, the AC1 terminal. The one provided between them is referred to as a first low-side transistor ML1, and the one provided between the AC2 terminal and the ground is referred to as a second low-side transistor ML2.

The power supply circuit 430 is a linear regulator (LDO: also referred to as Low Drop Output), receives a rectified voltage _VRCT , and generates an output voltage V _OUT stabilized at a predetermined target level. The output voltage V _OUT is output from the OUT terminal to the load 502. The load 502 may typically include a battery and its charging circuit.

A current detection circuit 432 is provided along with the power supply circuit 430. The current detection circuit 432 detects the current I _OUT flowing through the power supply circuit and generates a current detection signal Vcs indicating the amount of the current. The A / D converter 412 described above converts the current detection signal Vcs into a digital value.

The control IC 400 is provided with a modulation processing unit 414. The modulation processing unit 414 may be mounted as a part of the controller 410. The modulation processing unit 414 switches the parameters of the switching control by the synchronous rectification controller 424 according to the modulation signal based on the data (packet) to be transmitted.

The above is the configuration of the control IC 400. Next, the operation will be described.

FIG. 4 is an operation waveform diagram of the power receiving device 300 of FIG. The modulation processing unit 414 converts the transmission data (bit stream) into a modulation signal MOD by differential Manchester coding (also referred to as Bi-phase-M or Differential Bi-phase encoding). This modulated signal MOD is input to the synchronous rectification controller 424.

The timing of switching control of the synchronous rectifier controller 424 is defined based on at least one parameter PARAM. This parameter PARAM varies two-state phi _1, phi ₂ in accordance with the modulation signal MOD.

The impedance of the bridge circuit 422 fluctuates due to the fluctuation of this parameter PARAM. In other words, the load impedance of the receiving antenna 301 fluctuates. This impedance fluctuation appears as a change in the amplitude of the voltage V _{COIL (TX)} of the transmission coil 202.

The above is the operation of the control IC 400. According to this control IC 400, it is possible to transmit a signal from the power receiving device 300 to the power transmitting device 200 by changing the impedance of the bridge circuit 422 instead of shifting the resonance frequency of the receiving antenna 301 as in the conventional case. It becomes.

Since the control IC 400 does not require the capacitors C ₁₁ and C _{12 of} FIG. 2, the number of external chip components can be reduced, and the mounting area and cost can be reduced. Further, since the transistors M ₁₁ and M _{12 of} FIG. 2 and the pads for pulling out their drains are not required, the cost and size of the control IC 400 can be reduced. Since the number of physical connections between parts and wiring is reduced, the risk of disconnection failure can also be reduced.

Subsequently, an example of the parameter in the synchronous rectification controller 424 controlled by the modulation processing unit 414 will be described. The parameters are not particularly limited as long as they affect the impedance of the bridge circuit 422, and examples thereof include the following.

FIG. 5 is a circuit diagram showing a configuration example of the synchronous rectifier circuit 420. The synchronous rectifier controller 424 includes a first comparator COMP1, a second comparator COMP2, a logic circuit 426, and a plurality of drivers DR1 to DR4.

The first comparator COMP1 generates a first comparison signal indicating the comparison result between the first threshold voltage _{V ZC1} voltage _{V AC1} and zero near the AC1 terminal (V1GDET signal). The second comparator COMP2 generates a second comparison signal (V2GDET signal) indicating a comparison result between the voltage V _{AC2 of the} AC2 terminal and the second threshold voltage V _ZC2 near zero. The first comparator COMP1, the second comparator COMP2 may be used a hysteresis comparator, in this case, the first threshold voltage _{V ZC1 is} V _ZC1H, transitions two levels of _{V ZC1L.} Similarly, the second threshold voltage V _ZC2 transitions at two levels, V _ZC2H and V _ZC2L . The logic levels (high / low) of the V1GDET signal and the VG2DET signal are examples, and can be replaced by the polarity of the comparator or the logic inversion by the inverter.

The logic circuit 426 generates gate control signals H1G, H2G, L1G, and L2G for controlling four transistors MH1, MH2, ML1, and ML2 based on the V1GDET signal and the V2GDET signal. The four drivers DR1 to DR4 drive four transistors MH1, MH2, ML1 and ML2 based on the gate control signals H1G, H2G, L1G and L2G.

FIG. 6 is an operation waveform diagram of the synchronous rectifier circuit 420 of FIG. The coil current I _{COIL (RX)} is positive in the direction of the arrow in FIG. When the voltage V _AC1 drops to the threshold value V _ZC1L at time t ₀ , the V1GDET signal transitions to a high level. In response to one edge of the V1GDET signal (e.g. positive edge), for example, at time _{t 0} from the first on-delay time tau _ON1 after time _{t 1,} the second high-side transistor MH2 pair of the first low-side transistor ML1 Turns on.

To time _{t 2, the} when the voltage _{V AC1} rises to the threshold _{V ZC1H,} transitions V1GDET signal is at a low level. From the other edge of the V1GDET signal (negative edge), the time _{t 3} after the elapse of the first off-delay time tau _OFF1, and a second high-side transistor MH2 the first low-side transistor ML1 pair is turned off.

At time _{t 4} when followed, when the voltage _{V AC2} drops to the threshold _{V ZC2L,} V2GDET signal transitions to a high level. In response to one edge of the V2GDET signal (e.g. positive edge), for example, from the time _{t 4} second on delay time tau _ON2 after lapse time _{t 5,} the first high-side transistor MH1 pair of second low-side transistor ML2 Turns on.

At time _{t 6,} when the voltage _{V AC2} rises to the threshold _{V ZC2H,} transitions V2GDET signal is at a low level. From the other edge of the V2GDET signal (negative edge), the second off-delay time τ time _{t 7} after a lapse of _OFF2, the first high-side transistor MH1 of the second low-side transistor ML1 pair is turned off. The synchronous rectifier circuit 420 repeats this operation.

Pairs of diagonal transistors do not necessarily have to turn off (turn on) at the same time, they may turn off (turn on) at some time lag. Specifically, the low-side (lower arm) transistor may be turned off (turn-on) in advance, and the high-side (upper arm) transistor may be turned off (turn-on) later.

Here, the first off delay time τ _OFF1 and the second off delay time τ _OFF2 are used as parameters for matching the turn-off timing of the transistor with the zero cross timing (current zero cross point) of the coil current I _{COIL (RX).} In some cases.

In one embodiment, the modulation processing unit 414 changes the first off delay time τ _OFF1 and the second off delay time τ _OFF2 by two values according to the modulation signal MOD. From another point of view, it can be understood that the modulation processing unit 414 controls the switching phase of the synchronous rectifier circuit 420. The impedance of the synchronous rectifier circuit 420 can be changed by changing the first off delay time τ _OFF1 and the second off delay time τ _OFF2 . Here, the degree of modulation can be set according to the change width of the off delay time τ _OFF1 (τ _OFF2 ). For example, the first off delay time τ _OFF1 and the second off delay time τ _OFF2 may be switched between a first value in the range of 0 to 200 ns and a second value in the range of 500 n to 1000 ns.

Figure 7 is a waveform diagram of the rectified voltage _{V RCT} when off-delay time tau _OFF1, the tau _OFF2 fixed. The waveforms when the off delay times τ _OFF1 and τ _OFF2 are 125 ns, 250 ns, 750 ns, 1000 ns, and 1250 ns are shown.

FIG. 8 is a diagram showing the relationship between the off delay time and the rectified voltage _{VRCT in} a steady state (load current I _OUT = 1A). It can be seen that the rectified voltage _VRCT decreases as the delay amount increases.

FIG. 9 is a waveform diagram when the off delay time is switched. Here, the off delay times τ _OFF1 and τ _OFF2 are changed by two values of 125 ns and 750 ns. FIG. 9 shows the AC1 terminal, the AC2 terminal voltages V _AC1 and V _AC2 , the current I _{COIL (TX)} flowing through the transmitting coil, the current I _{COIL (RX)} flowing through the receiving coil 302, and the rectified voltage V _RCT . As can be seen from this waveform diagram, the current I _{COIL (TX)} of the transmission coil can be modulated by switching the off delay times τ _OFF1 and τ _OFF2 .

According to those skilled in the art, it is understood that there are other control parameters capable of changing the impedance (or switching phase) of the bridge circuit 422.

For example, the first off-delay time tau _OFF1, the second off-delay time tau _OFF2 fixed, the threshold voltage _V ZC1 applied to the comparator COMP1, _{COMP2, V ZC2} (hence _{V ZC1H, V ZC2H)} and the modulation signal MOD It may be changed accordingly.

Alternatively, the response times (delay times) of the comparators COMP1 and COMP2 may be variably configured, and the delay times may be changed according to the modulation signal MOD. For example, the response speed of the comparator can be changed according to the amount of bias current.

Alternatively, the first on-delay time tau _ON1, the second on-delay time tau _ON2, may be changed in accordance with the modulation signal MOD.

The impedance of the bridge circuit 422 may be changed by switching a plurality of parameters in a complex manner.

In the above description, the case where the synchronous rectifier circuit 420 is built in the control IC 400 has been described, but the present invention is not limited to this, and the transistors constituting the bridge circuit 422 may be discrete components.

Further, the function of the controller 410 may be implemented as a microcontroller externally attached to the control IC 400.

(Use)
Finally, an example of an electronic device using the wireless power receiving device 300 according to the embodiment will be described. FIG. 10 is a diagram showing an electronic device 500 including the power receiving device 300 according to the embodiment. The electronic device 500 of FIG. 10 is a smartphone, a tablet computer, a portable game machine, a portable audio player, and the housing 501 includes a receiving coil 302, a rectifier circuit 304, a smoothing capacitor 306, a power supply circuit 308, and the like. The device 300 is built in. FIG. 10 shows a charging circuit 504, a secondary battery 506, and other electronic circuits 508 as the load 502. The electronic circuit 508 may include a radio frequency (RF) unit, a baseband processor, an application processor, an audio processor, and the like.

Although the present invention has been described using specific terms based on the embodiments, the embodiments merely indicate the principles and applications of the present invention, and the embodiments are defined in the claims. Many modifications and arrangement changes are permitted without departing from the ideas of the present invention.

100 Power supply system 200 Transmission device 202 Transmission coil 204 Driver 206 Controller 208 Demodulator 300 Power reception device 301 Receiving antenna 302 Receiving coil 303 Resonant capacitor 304 Rectifier circuit 306 Smoothing capacitor 308 Power supply circuit 400 Control IC
410 Controller 412 A / D converter 414 Modulation processing unit 420 Rectifier circuit 422 Bridge circuit 424 Synchronous rectifier controller COMP1 1st comparator COMP2 2nd comparator 426 Logic circuit 430 Power supply circuit 432 Current detection circuit 500 Electronic equipment 501 Housing 502 Load

Claims (9)

It is a control IC (Integrated Circuit) of a wireless power receiving device.
The first AC terminal and the second AC terminal to which the receiving antenna is connected,
Rectifier terminal and
A synchronous rectifier circuit that includes a plurality of transistors forming a bridge circuit and a synchronous rectifier controller that controls the plurality of transistors, rectifies the current flowing through the receiving antenna, and outputs the current from the rectifier terminal.
A modulation processing unit that switches the parameters of switching control by the synchronous rectification controller according to the modulation signal, and
A control IC characterized by being provided with. The synchronous rectification controller
A first comparator that generates a first comparison signal indicating a comparison result between the voltage of the first AC terminal and the first threshold voltage near zero, and
A second comparator that generates a second comparison signal indicating a comparison result between the voltage of the second AC terminal and the second threshold voltage near zero, and
A logic circuit that generates a plurality of gate control signals for controlling the plurality of transistors based on the first comparison signal and the second comparison signal.
The control IC according to claim 1, wherein the control IC comprises. Of the plurality of transistors, one provided between the rectifying terminal and the first AC terminal is a first high-side transistor, and one provided between the rectifying terminal and the second AC terminal is a second high-side transistor. When a transistor, one provided between the first AC terminal and the ground is a first low-side transistor, and one provided between the second AC terminal and the ground is a second low-side transistor.
The logic circuit
In response to one edge of the first comparison signal, the pair of the second high-side transistor and the first low-side transistor is turned on.
After the lapse of the first off delay time from the other edge of the first comparison signal, the pair of the second high-side transistor and the first low-side transistor is turned off.
In response to one edge of the second comparison signal, the pair of the first high-side transistor and the second low-side transistor is turned on.
After the lapse of the second off delay time from the other edge of the second comparison signal, the operation of turning off the pair of the first high-side transistor and the second low-side transistor is repeated.
The control IC according to claim 2, wherein the first off delay time and the second off delay time are the parameters to be switched by the modulation processing unit. The control IC according to claim 2 or 3, wherein the first threshold voltage and the second threshold voltage are the parameters to be switched by the modulation processing unit. It is a control IC (Integrated Circuit) of a wireless power receiving device.
The first AC terminal and the second AC terminal to which the receiving antenna is connected,
Rectifier terminal and
A synchronous rectifier circuit that includes a plurality of transistors forming a bridge circuit and a synchronous rectifier controller that controls the plurality of transistors, rectifies the current flowing through the receiving antenna, and outputs the current from the rectifier terminal.
A modulation processing unit that switches the switching phase of the synchronous rectifier circuit according to the modulation signal, and
A control IC characterized by being provided with. The control IC
Output terminal and
A power supply circuit that receives the rectified voltage of the rectified terminal, stabilizes it to a predetermined voltage level, and outputs it from the output terminal.
The control IC according to any one of claims 1 to 5, further comprising. With the receiving antenna
The control IC according to any one of claims 1 to 6 and
An electronic device characterized by being equipped with. It is a modulation method in a wireless power receiving device.
The step of rectifying the current flowing through the receiving antenna using a synchronous rectifier circuit containing multiple transistors,
A step of changing parameters related to the timing of switching control of the plurality of transistors according to the modulated signal, and
A modulation method characterized by comprising. The modulation method according to claim 8, wherein the parameter includes a delay time that defines switching of the plurality of transistors.