JP2020202342A - Multilayer semiconductor package substrate and manufacturing method thereof - Google Patents

Abstract

To provide a semiconductor package substrate and a manufacturing method thereof that can handle the miniaturization of via holes while avoiding the deterioration of insulation due to the miniaturization of wiring and fine pitch.SOLUTION: In a multilayer semiconductor package substrate having a multilayer wiring layer in which wiring layers 2 and insulating layers 1 are alternately laminated and upper and lower wiring layers are connected via vias provided in the insulating layer, in the wiring layer, in an adjacent wiring of the same wiring layer, a gap 5 is formed between one or both wirings and the insulating layer, and the insulating layer is a resin layer obtained by photocuring a photosensitive insulating resin, and the vias are photo vias.SELECTED DRAWING: Figure 4

Description

The present invention relates to a multilayer semiconductor package substrate, and more particularly to a multilayer semiconductor package substrate having high density, miniaturization, and multilayer wiring, and a method for manufacturing the same.

In recent years, semiconductor devices have tended to have higher integration and higher densities, and along with this, input / output pins provided in semiconductor devices have tended to have more pins and finer pitches. For example, for a multilayer semiconductor package substrate for mounting a semiconductor element, the wiring is further increased in order to cope with such multi-pin and fine pitch and to improve the electrical characteristics of the semiconductor element. There is a strong demand for densification, miniaturization and multi-layering.

The laminated structure of the multilayer semiconductor package substrate for mounting a semiconductor element mainly includes a plurality of patterned wiring layers, a plurality of insulating layers for electrically isolating each wiring layer, and a predetermined wiring layer. It is composed of multiple vias penetrating an insulating layer for electrical connection.

A method of forming via holes by irradiating an ultraviolet laser (for example, UV-YAG laser), a carbon dioxide gas laser, or the like is used for forming these vias (Patent Document 1), but in recent years, a multilayer semiconductor package substrate has been used. In order to meet higher performance, it is required to stably form finer via holes. For this reason, a method of forming via holes by photolithography using a photosensitive insulating resin in the insulating layer has been proposed (Patent Document 2).

However, with the technique described in Patent Document 1, it is difficult to stably form fine via holes, and it is considered difficult to cope with further fine pitching in the future. Further, in the technique described in Patent Document 2, there is a concern that the photosensitive agent contained in the photosensitive insulating resin adversely affects the insulating property, and it becomes difficult to obtain good insulating property when the fine pitch is further advanced. It is considered to be.

Japanese Unexamined Patent Publication No. 11-342485 Japanese Unexamined Patent Publication No. 2004-39867

In view of the above circumstances, it is an object of the present invention to provide a semiconductor package substrate and a method for manufacturing the same, which can avoid the deterioration of the insulating property due to the miniaturization of wiring and the fine pitch, and can cope with the miniaturization of via holes. To do.

As a means for solving the above problems, in the invention according to claim 1 of the present invention, the wiring layer and the insulating layer are alternately laminated, and the upper and lower wiring layers are connected via vias provided in the insulating layer. In a multi-layer semiconductor package substrate provided with a multi-layer wiring layer
In the wiring layer, gaps are formed in at least a part between at least one of the wirings and the insulating layer in the adjacent wirings of the same wiring layer.
The insulating layer is a resin layer obtained by photocuring a photosensitive insulating resin.

The invention according to claim 2 is a multilayer semiconductor having a multilayer wiring layer in which wiring layers and insulating layers are alternately laminated and the upper and lower wiring layers are connected via vias provided in the insulating layer. In the package substrate
The wiring layer is
In the wiring of the adjacent upper wiring layer and lower wiring layer, a gap is formed in at least a part between at least one surface of the upper wiring layer and the opposite surface of the lower wiring layer and the insulating layer. Wiring
The insulating layer is a resin layer obtained by photocuring a photosensitive insulating resin.
The via is a multilayer semiconductor package substrate characterized by being a photo via.

The invention according to claim 3 is the multilayer semiconductor package substrate according to claim 1 or 2, wherein the wiring layer is made of copper.

The invention according to claim 4 is the multilayer semiconductor package substrate according to claim 3, wherein at least a copper oxide film is formed on the surface of the wiring layer facing the void.

The invention according to claim 5 is characterized in that the photosensitive agent of the photosensitive insulating resin contains any one or more selected from naphthoquinone diazide, a photoradical generator and a photobase generator. The multilayer semiconductor package substrate according to any one of 1 to 4.

Further, the invention according to claim 6 includes a multilayer wiring layer in which copper wiring layers and insulating layers are alternately laminated, and upper and lower copper wiring layers are connected via a photovia provided in the insulating layer. A method for manufacturing a multilayer semiconductor package substrate.
A copper hydroxide coating is formed around the copper wiring layer on the anode side or the copper wiring by applying a voltage in a high temperature and high humidity environment between a pair of copper wiring layers or copper wirings insulated by the insulating layer. Process and
A method for manufacturing a multilayer semiconductor package substrate, which comprises a step of changing a copper hydroxide film into a copper oxide film by heating and drying a substrate on which a copper hydroxide film is formed.

The invention according to claim 7 is a treatment in which the voltage at the time of applying the voltage is 1.3 V or more and the temperature of the substrate at the time of heating and drying is 60 ° C. to 90 ° C., one or both of them. The method for manufacturing a multilayer semiconductor package substrate according to claim 6, wherein the conditions are applied.

According to the multilayer semiconductor package substrate of the present invention, which includes a multilayer wiring layer in which wiring layers and insulating layers are alternately laminated and the upper and lower wiring layers are connected via vias provided in the insulating layer, the same. In the wiring adjacent to the wiring layer, a gap is formed between one of the wirings and the insulating layer. Alternatively, in the wiring of different adjacent wiring layers, a gap is formed between the upper surface or the lower surface of the wiring of either wiring layer and the insulating layer. Therefore, even if a photosensitive insulating resin having a disadvantage in insulating properties is used as the insulating layer, it is good even if the wiring is made finer and finer in pitch due to the formation of gaps between the wiring layers or between the wirings. Insulation can be provided. Further, since a photosensitive insulating resin is used to form the insulating layer, photo vias are possible, so that miniaturization can be achieved compared to laser vias.

Further, according to the method for manufacturing a multilayer semiconductor package substrate of the present invention, copper is used as the material of the wiring layer, and in a high temperature and high humidity environment between the copper wiring layers or between the copper wirings insulated by the insulating layer. By applying a voltage in the above, a step of forming a copper hydroxide film around the copper wiring layer or the copper wiring on the anode side, and by heating and drying the substrate on which the copper hydroxide film is formed, the copper hydroxide film is formed. It is provided with a step of changing to a copper oxide film. Therefore, after a copper hydroxide coating is formed on the copper wiring layer or the copper surface on the anode side of the copper wiring, the volume of the coating becomes larger when the copper hydroxide changes to copper oxide by heating and drying. Decrease. As a result, a gap is formed between the copper wiring layer or the copper wiring and the insulating layer. Due to the formation of the voids, good insulating properties can be ensured even if a photosensitive insulating resin having inferior insulating properties is used for the insulating layer.

FIG. 6 is a schematic cross-sectional view showing an example of a method for forming voids between copper wiring / insulating layers of a multilayer semiconductor package substrate of the present invention. FIG. 6 is a schematic cross-sectional view showing an example of a method for forming voids between copper wiring / insulating layers of a multilayer semiconductor package substrate of the present invention. FIG. 6 is a schematic cross-sectional view showing an example of a method for forming voids between copper wiring / insulating layers of a multilayer semiconductor package substrate of the present invention. FIG. 6 is a schematic cross-sectional view showing an example of a method for forming voids between copper wiring / insulating layers of a multilayer semiconductor package substrate of the present invention. FIG. 5 is a schematic cross-sectional view showing an example of a copper wiring forming process in the wiring forming method of the multilayer semiconductor package substrate of the present invention. FIG. 5 is a schematic cross-sectional view showing an example of a gap forming step between copper wiring / insulating layers in the wiring forming method of the multilayer semiconductor package substrate of the present invention.

The multilayer semiconductor package substrate of the present invention and the manufacturing method thereof will be described.

<Multilayer semiconductor package substrate>
The semiconductor package substrate of the present invention is a multilayer semiconductor package substrate having a multilayer wiring layer in which wiring layers and insulating layers are alternately laminated and the upper and lower wiring layers are connected via vias provided in the insulating layer. is there.

In the semiconductor package substrate of the present invention, the wiring layer has voids formed in at least a part between at least one of the wirings and the insulating layer in the adjacent wirings of the same wiring layer. Due to this gap, the wiring becomes finer and the pitch becomes finer, and even if the adjacent wirings are close to each other, the insulation between the wirings can be well maintained.

Alternatively, in the wiring of the adjacent upper wiring layer and the lower wiring layer, there is a gap in at least a part between at least one surface of the upper wiring layer and the opposite surface of the lower wiring layer and the insulating layer. It is formed. Due to this gap, even if the insulating layer becomes thin, the insulating property between the wiring layers of the upper layer and the lower layer can be well maintained.

As described above, a gap may be provided between the wiring and the insulating layer in the same wiring layer, and at the same time, a gap may be provided between the wiring and the insulating layer of the upper and lower wiring layers.

Further, the insulating layer is composed of a resin layer obtained by photocuring a photosensitive insulating resin. Therefore, the via can be a photo via using a photosensitive insulating resin. Photo vias are more compatible with miniaturization than laser vias.

Further, the material constituting the wiring layer is preferably copper. By using copper, when a voltage of 1.3 V or more is applied in a high temperature and high humidity environment, copper hydroxide is formed around the surface of the copper on the anode side. Then, the copper hydroxide is changed to copper oxide by heating at 60 ° C. to 90 ° C. At that time, since the volume is reduced, a gap is formed between the wiring layer and the insulating layer in contact with the wiring layer. In this way, a copper oxide film is formed on the surface of the wiring of the wiring layer on the anode side. However, when a barrier layer such as a titanium thin film is formed on the surface of the copper wiring in advance, no copper hydroxide film is formed on that portion, so no voids are formed.

<Manufacturing method of multilayer semiconductor package substrate>
The method for manufacturing a multilayer semiconductor package substrate of the present invention includes a multilayer wiring layer in which copper wiring layers and insulating layers are alternately laminated, and upper and lower copper wiring layers are connected via a photovia provided in the insulating layer. This is a method for manufacturing a multilayer semiconductor package substrate.

In the method for manufacturing a multilayer semiconductor package substrate of the present invention, a copper wiring layer on the anode side or a copper wiring layer on the anode side is formed by applying a voltage between a pair of copper wiring layers or copper wirings insulated by an insulating layer in a high temperature and high humidity environment. It is provided with a step of forming a copper hydroxide film around the copper wiring and a step of changing the copper hydroxide film into a copper oxide film by heating and drying the substrate on which the copper hydroxide film is formed. Is a feature. It is desirable that the voltage when the voltage is applied is 1.3 V or more at which copper hydroxide (Cu (OH) ₂ ) is formed, and the temperature of the substrate during heat drying is copper hydroxide (Cu (OH) ₂ ). It is desirable that the temperature is 60 ° C. to 90 ° C., which corresponds to the temperature at which is changed to copper oxide (CuO).

Hereinafter, embodiments according to the present invention will be described in more detail with reference to FIGS. 1 to 6.
FIG. 1A is a schematic cross-sectional view of a part of the wiring in the multilayer semiconductor package substrate produced by the method of Patent Document 2. Copper (copper wiring 2) can be used for wiring, and naphthoquinone diazide can be used as the photosensitive agent for the photosensitive insulating resin forming the insulating layer 1. However, the photosensitive agent of the photosensitive insulating resin may not be a photoacid generator alone, but may contain one or more selected from naphthoquinonediazide, a photoradical generator and a photobase generator.

Next, as shown in FIG. 1B, a voltage is applied between the adjacent copper wirings 2 in the multilayer semiconductor package substrate under high temperature and high humidity. Specifically, this treatment can be carried out at a temperature of 130 ° C., a humidity of 85%, a voltage of 3.3 V, and 200 hours, but the present invention is not limited to this, and the surface of the copper wiring 2 is hydroxylated. The voltage may be 1.3 V or more at which the copper 3 coating can be formed, and the copper coating may be formed at a desired thickness for a period of time. In this way, a film of copper hydroxide 3 is formed around the copper wiring 2 which is the anode.

Next, copper hydroxide can be converted to copper oxide by taking out the multilayer semiconductor package substrate to which a voltage is applied under the high temperature and humidity and drying it. Specifically, the water droplets adhering to the multilayer semiconductor package substrate can be wiped off and carried out in an oven at 80 ° C., but the present invention is not limited to this. It may be 60 ° C. to 90 ° C. As shown in FIG. 1 (c), by this treatment, the coating film of copper hydroxide 3 formed around the copper wiring 2 is changed to copper oxide 4, and the coating film of copper hydroxide 3 shrinks accordingly. However, as the volume decreases, a gap 5 is formed between the copper oxide 4 and the insulating layer 1.

Next, FIG. 2A shows copper in which the barrier metal 6 is similarly formed on the multilayer semiconductor package substrate in the case where the barrier metal 6 is formed on the lower surface and the side surface of the copper wiring 2 in FIG. 1A. An example shows a case where the wiring 2 is laminated via the insulating layer 1. Titanium can be used as the barrier metal, and naphthoquinone diazide can be used as the photosensitive agent of the photosensitive insulating resin forming the insulating layer. However, the photosensitive agent of the photosensitive insulating resin may not be a photoacid generator alone, but may contain one or more selected from naphthoquinone diazide, a photoradical generator and a photobase generator. Further, the barrier metal 6 may be made of a metal other than titanium.

Next, as shown in FIG. 2B, the lower copper wiring 2'is an anode between the upper copper wiring 2 and the lower copper wiring 2'in the multilayer semiconductor package substrate under high temperature and humidity. Voltage was applied to. This treatment can be carried out at a temperature of 130 ° C., a humidity of 85%, a voltage of 3.3 V, and 200 hours, but the present invention is not limited to this, and a copper hydroxide 3 coating is formed on the surface of the copper wiring 2. The voltage may be 1.3 V or more, and the voltage may be such that the desired thickness can be formed. In this way, a coating film of copper hydroxide 3 is formed on the upper portion (the portion not covered with the barrier metal) of the lower layer copper wiring 2'corresponding to the anode.

Next, the copper hydroxide 3 can be converted to copper oxide by taking out the multilayer semiconductor package substrate to which a voltage is applied under the high temperature and humidity and drying it. Specifically, the drying can be carried out in an oven at 80 ° C. by wiping off water droplets adhering to the multilayer semiconductor package substrate, but the drying is not limited thereto. It may be 60 ° C. to 90 ° C. As shown in FIG. 2 (c), by this treatment, the copper 3 hydroxide coating formed on the upper part of the lower copper wiring 2'changes to copper oxide 4, and the copper hydroxide 3 coating shrinks accordingly. As the volume decreases, a gap 5 is formed between the copper wiring 2'/ the insulating layer 1.

Next, FIG. 3A is a schematic cross-sectional view of a part of the wiring in the multilayer semiconductor package substrate manufactured by the semi-additive method. Copper (copper wiring 2) was used for the wiring, and naphthoquinone diazide was used as the photosensitizer of the photosensitive insulating resin forming the insulating layer 1. However, the photosensitive agent of the photosensitive insulating resin may not be a photoacid generator alone, but may contain one or more selected from naphthoquinone diazide, a photoradical generator and a photobase generator.

Next, as shown in FIG. 3B, a voltage is applied between the adjacent copper wirings 2 in the multilayer semiconductor package substrate under high temperature and high humidity. Specifically, this treatment can be carried out at a temperature of 130 ° C., a humidity of 85%, a voltage of 3.3 V, and 200 hours, but is not limited thereto. The voltage may be 1.3 V or more at which the copper hydroxide 3 coating can be formed on the surface of the copper wiring 2, and the time may be such that the copper wiring 2 can be formed to a desired thickness. By this treatment, a film of copper hydroxide 3 is formed around the copper wiring 2 which is the anode.

Next, copper hydroxide can be converted to copper oxide by taking out the multilayer semiconductor package substrate to which a voltage is applied under the high temperature and humidity and drying it. Specifically, the drying method is carried out in an oven at 80 ° C. by wiping off water droplets adhering to the multilayer semiconductor package substrate, but the drying method is not limited to this. It may be 60 ° C. to 90 ° C. As shown in FIG. 3C, by this treatment, the copper hydroxide 3 coating formed around the copper wiring 2 corresponding to the anode is changed to copper oxide 4, and the copper hydroxide 3 coating shrinks accordingly. By doing so, a gap 5 is formed between the copper wiring 2 and the insulating layer 1.

Next, FIG. 4A is a schematic cross-sectional view of a part of the wiring in the multilayer semiconductor package substrate when the barrier metal 6 is formed on the lower surface of the wiring of FIG. 3A. Copper (copper wiring 2) can be used for wiring, titanium can be used for the barrier metal 6, and naphthoquinone diazide can be used as the photosensitive agent for the photosensitive insulating resin forming the insulating layer 1. However, the photosensitive agent of the photosensitive insulating resin may not be a photoacid generator alone, but may contain one or more selected from naphthoquinone diazide, a photoradical generator and a photobase generator. Further, the barrier metal 6 may be made of a metal other than titanium.

Next, as shown in FIG. 4B, a voltage is applied between the adjacent copper wirings 2 in the multilayer semiconductor package substrate under high temperature and high humidity. Specifically, this treatment can be carried out at a temperature of 130 ° C., a humidity of 85%, a voltage of 3.3 V, and 200 hours, but is not limited thereto. The voltage may be 1.3 V or more at which the copper hydroxide 3 coating can be formed on the surface of the copper wiring 2, and the time may be such that the copper wiring 2 can be formed to a desired thickness. By this treatment, a coating film of copper hydroxide 3 is formed around the area other than the barrier metal 6 of the copper wiring 2 corresponding to the anode.

Next, copper hydroxide can be changed to copper oxide by taking out the multilayer semiconductor package substrate to which a voltage is applied under the high temperature and humidity and drying it. Specifically, the drying method can be carried out in an oven at 80 ° C. by wiping off water droplets adhering to the multilayer semiconductor package substrate, but the drying method is not limited to this. It may be 60 ° C. to 90 ° C. As shown in FIG. 4 (c), by this treatment, the copper 3 hydroxide coating formed around the copper wiring 2 is changed to copper oxide 4, and the copper 3 hydroxide coating is shrunk accordingly. As the volume is reduced, a gap 5 is formed between the copper wiring 2 and the insulating layer 1.

Next, FIG. 6A is a schematic cross-sectional view of a part of the wiring of the lowermost layer of the multilayer wiring circuit module using glass as the substrate. Copper (copper wiring 2) can be used for wiring, titanium can be used for the barrier metal 6, and naphthoquinone diazide can be used as the photosensitive agent for the photosensitive insulating resin forming the insulating layer 1. However, the photosensitive agent of the photosensitive insulating resin may not be a photoacid generator alone, but may contain one or more selected from naphthoquinone diazide, a photoradical generator and a photobase generator. Further, a barrier metal 6 other than titanium may be used, and a substrate other than glass may be used.

Next, as shown in FIG. 6B, a voltage is applied between the adjacent copper wirings 2 in the multilayer semiconductor package substrate under high temperature and high humidity. Specifically, this treatment can be carried out at a temperature of 130 ° C., a humidity of 85%, a voltage of 3.3 V, and 200 hours, but is not limited thereto. The voltage may be 1.3 V or more at which the copper hydroxide 3 coating can be formed on the surface of the copper wiring 2, and the time may be such that the copper wiring 2 can be formed to a desired thickness. By this treatment, a film of copper hydroxide 3 is formed around the copper wiring 2 which is the anode.

Next, copper hydroxide can be converted to copper oxide by taking out the multilayer semiconductor package substrate to which a voltage is applied under the high temperature and humidity and drying it. Specifically, the drying method can be carried out in an oven at 80 ° C. by wiping off water droplets adhering to the multilayer semiconductor package substrate, but the drying method is not limited thereto. It may be 60 ° C. to 90 ° C. As shown in FIG. 6 (g), by this treatment, the copper hydroxide 3 coating formed around the wiring is changed to copper oxide 4, and the copper hydroxide 3 coating shrinks accordingly, and the volume is reduced. By doing so, a gap 5 is formed between the copper wiring 2 and the insulating layer 1.

The invention according to the present embodiment has the following effects.
Fine via holes can be formed by using a photosensitive insulating resin in the insulating layer 1 of the multilayer semiconductor package substrate. On the other hand, even if the photosensitive insulating resin is inferior in insulating to the non-photosensitive insulating resin, the insulating property between the copper wirings 2 can be improved by forming the gap 5 between the copper wiring 2 and the insulating layer 1. It becomes good, and due to this effect, it is possible to avoid deterioration of the insulating property between the copper wirings 2 even if the wirings are made finer and finer in pitch. Further, even if the insulating layer 1 becomes thin, the same effect can be exhibited by forming a gap in at least one of the facing surfaces of the upper layer and the lower wiring layer in the same manner.

Examples of the present invention will be described below with reference to FIGS. 5 and 6, but the present invention is not limited to these examples.

FIG. 5A is a schematic cross-sectional view in which a titanium film barrier metal 6 and a copper sputter film 8 are formed as a seed layer on a glass substrate 7 in this order. The thickness of the titanium film was 50 nm, and the film thickness of the copper sputter film was 200 nm.

Then, as shown in FIG. 5B, a photoresist was applied onto the copper sputtered film 8 to form a photoresist pattern 9, which is the reverse pattern of the wiring, by photolithography.
The photoresist film thickness was 5 μm, and the photoresist was exposed and developed to form a pattern.

Then, as shown in FIG. 5C, electrolytic copper plating was formed on the copper sputter film 8 with a thickness of 3 μm by a semi-additive method.

Then, as shown in FIG. 5 (d), the copper wiring 2 was formed by removing the photoresist pattern 9 and the seed layer of the unnecessary portion. The L & S (line / space) value of the finest wiring portion could be 2 μm / 2 μm.

After that, as shown in FIG. 6A, a photosensitive insulating resin is applied, and an insulating layer 1 having an opening of a wiring terminal portion (not shown) for interlayer connection is formed by photolithography to complete a wiring board. I let you. Naftquinone diazide was used as the photosensitive agent of the photosensitive insulating resin, and the film thickness of the insulating layer 1 was 5 μm.

Then, as shown in FIG. 6B, a voltage was applied between the wirings adjacent to the wiring terminal portion (not shown) of the wiring board under high temperature and high humidity. Specifically, this treatment was carried out at a temperature of 130 ° C., a humidity of 85%, and a voltage of 3.3 V for 200 hours. By this treatment, a coating film of copper hydroxide 3 was formed around the wiring corresponding to the anode.

Then, as shown in FIG. 6C, the wiring board to which a voltage was applied under high temperature and high humidity was taken out, water droplets were wiped off, and then dried in an oven at 80 ° C. By this treatment, the copper hydroxide 3 coating formed around the copper wiring 2 is changed to copper oxide 4, and the copper hydroxide 3 coating shrinks accordingly, and the volume is reduced, so that the copper wiring 2 / insulation Voids 5 were formed between the layers 1.

By electron microscope observation, a gap 5 was confirmed between the copper wiring 2 wire corresponding to the anode and the insulating layer 1, and when the insulation resistance value between the copper wiring 2 was measured, it was confirmed that good insulation was obtained. ..

Similarly, as illustrated in FIG. 2C, the gap 5 could be formed in the portion where the barrier metal 6 was not formed in the copper wiring 2'in the lower layer as well.
In this way, it was possible to form a gap between the copper wiring and the insulating layer in one of the adjacent copper wirings insulated by the insulating layer. It was confirmed that by forming the voids in this way, better insulating properties can be obtained than in the case where the voids are not formed.

According to the present invention, by using a photosensitive insulating resin in the insulating layer of the multilayer semiconductor package substrate, fine via holes can be formed, and the photosensitive insulating resin is inferior in insulating property to the non-photosensitive insulating resin. However, by forming a gap between the wiring and the insulating layer, the insulation between the wiring is improved, and due to these effects, a multilayer semiconductor capable of forming fine via holes while maintaining the insulation between the wiring. It becomes possible to provide a package substrate and a method for manufacturing the same.

1 ... Insulation layer 2 ... Wiring layer or copper Wiring layer 3 ... Copper hydroxide 4 ... Copper oxide 5 ... Void 6 ... Barrier metal 7 ... Glass substrate 8 ... Copper (of) sputter film 9 ... photoresist pattern

Claims (7)

In a multilayer semiconductor package substrate having a multilayer wiring layer in which wiring layers and insulating layers are alternately laminated and upper and lower wiring layers are connected via vias provided in the insulating layer.
In the wiring layer, gaps are formed in at least a part between at least one of the wirings and the insulating layer in the adjacent wirings of the same wiring layer.
The insulating layer is a multilayer semiconductor package substrate characterized by being a resin layer obtained by photocuring a photosensitive insulating resin. In a multilayer semiconductor package substrate having a multilayer wiring layer in which wiring layers and insulating layers are alternately laminated and upper and lower wiring layers are connected via vias provided in the insulating layer.
The wiring layer is
In the wiring of the adjacent upper wiring layer and lower wiring layer, a gap is formed in at least a part between at least one surface of the upper wiring layer and the opposite surface of the lower wiring layer and the insulating layer. Wiring
The insulating layer is a resin layer obtained by photocuring a photosensitive insulating resin.
The via is a multilayer semiconductor package substrate characterized by being a photo via. The multilayer semiconductor package substrate according to claim 1 or 2, wherein the wiring layer is made of copper. The multilayer semiconductor package substrate according to claim 3, wherein at least a copper oxide film is formed on the surface of the wiring layer facing the voids. The multilayer semiconductor according to any one of claims 1 to 4, wherein the photosensitive agent of the photosensitive insulating resin contains any one or more selected from naphthoquinone diazide, a photoradical generator and a photobase generator. Package board. A method for manufacturing a multilayer semiconductor package substrate having a multilayer wiring layer in which copper wiring layers and insulating layers are alternately laminated and an upper layer and a lower copper wiring layer are connected via a photovia provided in the insulating layer.
A copper hydroxide coating is formed around the copper wiring layer on the anode side or the copper wiring by applying a voltage in a high temperature and high humidity environment between a pair of copper wiring layers or copper wirings insulated by the insulating layer. Process and
A method for manufacturing a multilayer semiconductor package substrate, which comprises a step of changing a copper hydroxide film into a copper oxide film by heating and drying a substrate on which a copper hydroxide film is formed. The claim is characterized in that the processing conditions of either or both of the voltage at the time of applying the voltage is 1.3 V or more and the temperature of the substrate at the time of heating and drying is 60 ° C. to 90 ° C. are applied. 6. The method for manufacturing a multilayer semiconductor package substrate according to 6.

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