JP2020184123A - Circuit design device, circuit design method and program - Google Patents

Abstract

To provide a circuit design device capable of allowing circuit design to be completed in a short period of time without depending on knowledge and a subjective view of a designer, and a circuit design method and a program thereof.SOLUTION: The circuit design device 100 includes an operation unit 102 for inputting a circuit configuration of a design object circuit, item names of the circuit characteristics of the design object circuit, and names of components composing the design object circuit; a storage unit 104; a simulation unit 105 for generating characteristic values of the respective circuit components and corresponding circuit characteristic items by performing simulation for the design object circuit while changing the component values of respective circuit components; and a design processing unit 106 which performs, in a learning mode, deep learning by using the component values of the circuit components and characteristic values of the corresponding circuit characteristic items, and in a design mode, generates at least one of the component values corresponding to the characteristic values and the characteristic values corresponding to the component values by a regression analysis.SELECTED DRAWING: Figure 1

Description

The present invention relates to a circuit design device for designing a circuit of a semiconductor integrated circuit, a circuit design method, and a circuit design program for constructing the circuit design device by causing a computer to execute the circuit design device.

Conventionally, integrated circuit design methods such as LSI (Large Scale Integration) have been developed.
For example, as a conventional design method, a method has been developed in which a characteristic equation of a circuit is defined, a designer having abundant knowledge about the circuit assembles a design policy, and an integrated circuit having desired characteristics is designed. In this method, since the quality of the circuit obtained by the design depends on the knowledge and experience of the designer, there is a problem that it is difficult for the designer with little knowledge and experience to design a high quality circuit.

On the other hand, assuming the configuration of the target circuit (target circuit), and optimizing by simulating SPICE or the like for each transistor constituting the circuit, a transistor having desired characteristics, and eventually the transistor A design method has been developed so as to obtain a target circuit having desired characteristics configured by the above (see, for example, Patent Document 1).

However, in the simulation using a genetic algorithm or the like, the randomness is high and the search is wasteful. Therefore, if the number of circuit elements constituting the circuit is large, the simulation takes time and the design work takes a long time. In addition, there is a problem that there is no reproducibility because the design does not have a learning function.

Japanese Unexamined Patent Publication No. 2011-065281

The present invention has been made in view of the above problems, and an object of the present invention is to enable circuit design to be easily performed in a short time without depending on the knowledge and subjectivity of the designer.

According to the first aspect of the present invention
An input unit for inputting the circuit configuration of the circuit to be designed, the circuit characteristic item name of the circuit to be designed, and the element name of the circuit element constituting the circuit to be designed.
A simulation unit that generates the element value of the circuit element and the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element by simulating the circuit to be designed while changing the element value of the circuit element.
In the learning mode, deep learning is performed using the element value of the circuit element and the characteristic value of the corresponding circuit characteristic item, and in the design mode, the element value of the circuit element corresponding to the characteristic value of the circuit characteristic item and the element value of the circuit element. Provided is a circuit design apparatus including a design processing unit that generates at least one of the characteristic values of the circuit characteristic item corresponding to the element value of the circuit element by regression analysis.

Further, according to the second viewpoint of the present invention,
The input unit inputs the circuit configuration of the design target circuit, the circuit characteristic item name of the design target circuit, and the element name of the circuit element constituting the design target circuit.
The simulation unit generates the element value of the circuit element and the characteristic value of the circuit characteristic item corresponding thereto by simulating the design target circuit while changing the element value of the circuit element.
The design processing unit performs deep learning using the element value of the circuit element and the characteristic value of the corresponding circuit characteristic item in the learning mode, and the circuit element corresponding to the characteristic value of the circuit characteristic item in the design mode. A circuit design method is provided, characterized in that at least one of the element value of the above and the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element is generated by regression analysis.

Further, according to the third viewpoint of the present invention, a circuit design program for causing a computer to construct the circuit design device is provided.

According to the circuit design device and the circuit design method of the present invention, the circuit design can be easily performed in a short time without depending on the knowledge and subjectivity of the designer.

Further, by executing the circuit design program of the present invention by a computer, it is possible to construct a circuit design device capable of easily performing circuit design in a short time without depending on the knowledge and subjectivity of the designer. it can.

It is a block diagram of the circuit design apparatus which concerns on embodiment of this invention. It is a flowchart of the circuit design apparatus which concerns on embodiment of this invention. It is a circuit block diagram of the design target circuit in embodiment of this invention. It is explanatory drawing of the circuit design apparatus which concerns on embodiment of this invention. It is a partial circuit block diagram of the circuit design apparatus which concerns on embodiment of this invention. It is explanatory drawing of the circuit design apparatus which concerns on embodiment of this invention. It is a partial circuit block diagram of the circuit design apparatus which concerns on embodiment of this invention. It is explanatory drawing of the circuit design apparatus which concerns on embodiment of this invention. It is a circuit block diagram of the design target circuit in another embodiment of this invention. It is explanatory drawing of the circuit design apparatus which concerns on other embodiment of this invention.

Hereinafter, a circuit design device, a circuit design method, and a circuit design program for being executed by a computer to construct the circuit design device according to the embodiment of the present invention will be described with reference to the drawings.
In the embodiment described below, an example of an analog circuit will be described, but it can also be applied to a digital circuit. Further, in each figure, parts having the same function are designated by the same reference numerals.

FIG. 1 is a block diagram of a circuit design device 100 according to an embodiment of the present invention.
In FIG. 1, the circuit design device 100 includes a data processing unit 101, an operation unit 102, a display unit 103, and a storage unit 104.
The circuit design device 100 can be configured by a computer including an operation unit such as a keyboard and a mouse, a display unit, a central processing unit (CPU), a storage unit, and an input / output unit such as a USB port. By causing the computer to execute the circuit design program stored in the program storage area 116 of the storage unit 104, the computer can function as the circuit design device 100.

The operation unit 102 is for the user to operate and input data and commands, and is composed of a mouse, a keyboard, and the like. The operation unit 102 inputs and designs data such as the circuit configuration of the circuit to be designed (design target circuit), the circuit characteristic item name of the design target circuit, and the element name of the circuit element constituting the design target circuit. It is used to instruct the execution of processing.
The data processing unit 101 includes a simulation unit 105 and a design processing unit 106. The simulation unit 105 has a function of generating the element values of the circuit elements and the characteristic values of the corresponding circuit characteristic items by simulating the design target circuit while changing the element values of the circuit elements constituting the design target circuit. have.

The design processing unit 106 performs deep learning using the element value of the circuit element and the characteristic value of the corresponding circuit characteristic item in the learning mode, and in the design mode, the design processing unit 106 of the circuit element corresponding to the characteristic value of the circuit characteristic item. It has a function of generating at least one of the element value and the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element by regression analysis.
Further, the design processing unit 106 includes a dimensionless unit 107 that makes the characteristic values of the circuit characteristic items generated by the simulation unit 105 and the element values of the circuit elements dimensionless.

Further, the design processing unit 106 performs deep learning in the learning mode using the non-dimensionalized characteristic value and the corresponding non-dimensionalized element value, and in the design mode, the characteristic value of the circuit characteristic item. The generation processing unit 108 is provided to generate at least one of the element value corresponding to the element value and the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element as a non-dimensional value by regression analysis.

Further, the design processing unit 106 has the original dimension of the element value corresponding to the characteristic value of the non-dimensionalized circuit characteristic item from the generation processing unit 108 and the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element. It is provided with a restoration unit 109 that restores and outputs to.
In the present embodiment, the dimensionless unit 107 normalizes the characteristic values of the circuit characteristic items generated by the simulation unit 105 and standardizes the element values of the circuit elements, thereby thereby normalizing the characteristic values of the circuit characteristic items and the circuit elements. It has a function to make the element value of.

The normalization of the characteristic value of the circuit characteristic item is performed by the relational expression [Yi = (Xi-Xmin) / (Xmax-Xmin)]. Here, Xi is the characteristic value of the circuit characteristic item, Xmin is the minimum value of the characteristic value of the circuit characteristic item, Xmax is the maximum value of the characteristic value of the circuit characteristic item, and Yi is the characteristic value of the circuit characteristic item. Is the normalized value.

Further, the element value of the circuit element is standardized by the relational expression [standardized element value = (the element value of the circuit element) / (initial value of the element value of the circuit element)].
In this way, the characteristic values are normalized and the element values are standardized to make them dimensionless, and as will be described later, the accuracy is improved.

The characteristic values and element values restored to the original dimensions by the restoration unit 109 are displayed by the display unit 103 and stored in the storage device 104.
The storage unit 104 has a data storage area 110 for storing various data, and a program storage area 116 for storing various programs such as a circuit design program according to the present embodiment.

The data storage area 110 includes circuit configuration data 111, which is data of the circuit topology of the circuit to be designed, circuit item data 112, which is data of items related to the circuit to be designed, and data for learning, which is data for the generation processing unit 108 to learn. Data 115 is stored at any time or in advance.
The circuit item data 112 includes circuit characteristic item name data 113, which is the name of each circuit characteristic of the circuit to be designed, and circuit element name data 114, which is the name of circuit elements such as MOS transistors and resistors constituting the circuit to be designed. It has been.

FIG. 2 is a flowchart showing the processing of the circuit design device 100 according to the embodiment of the present invention, and mainly shows the processing of the data processing unit 101.
FIG. 3 is a circuit configuration diagram of a design target circuit 301 to be designed in the embodiment of the present invention, and shows an example of an operational amplifier in which a differential input unit is composed of a NMOS transistor.

In FIG. 3, the transistors M1 and M2 are MOSFET transistors having the same characteristics. Further, the transistors M3 and M4 are NMOS transistors having the same characteristics. It is composed of six types of MOS transistors M1 to M8 having different characteristics and one resistor R, and the number of element values of the circuit elements is substantially seven.

In the present embodiment, there are 13 circuit characteristic items of the design target circuit 301 of FIG. The circuit characteristic item names are current consumption (Idis), power consumption (Pdis), DC gain (DCgain), phase margin (PM), gain bandwidth product (GBP), through rate (SR), and total harmonic distortion (THD). ), Common mode rejection ratio (CMRR), power supply voltage fluctuation elimination ratio (PSRR), output voltage range (OVR), common mode input range (CMIR), output resistance (OR), input conversion noise (IRN).

FIG. 4 is a diagram showing a probability distribution used by the simulation unit 105 to change the characteristics of the transistors M1 to M8 when simulating the design target circuit 301.
The horizontal axis is the rate of change of the variable M, and the vertical axis is the number of occurrences of the variable M. Here, the variable M is a value obtained by a predetermined integer multiple of the gate width W of the transistor. It is a characteristic that there are two peaks around the time when the variable M is 1.

The gate width W and the gate length L of the transistors M1 to M8 are fixed, and the gate width W is substantially changed by changing the value of the variable M. As a result, the element values of the transistors M1 to M8 are changed by the probability distribution shown in FIG. 4, and the simulation conditions are changed accordingly. Transistors M1 and M2 are changed to the same value, and transistors M3 and M4 are changed to the same value. The resistance value of the resistor R is changed to a plurality of predetermined values for simulation.

FIG. 5 is a diagram showing the configuration of the generation processing unit 108. The generation processing unit 108 is configured by using a regression analysis model of a feedforward neural network.
In each unit of the intermediate layer (interlayer), the activation function Z uses the ReLU (Rectified Linear Unit) (ramp) function. The activation function Z of the output layer performs regression analysis using an identity function.
The relationship and output between layers are expressed by the following equation (1). However, x is an input, W is a weight, b is a bias, and u is a total input to each unit.
u = Wx + b, Z = f (u) ... (1)

As the operation mode of the generation processing unit 108, there are a learning mode for learning by deep learning and a design mode for performing circuit design processing. In the learning mode and the design mode, the configuration itself of the generation processing unit 108 shown in FIG. 5 does not change, but the learning mode and the design mode are switched to perform learning and design.

When functioning to design element values based on characteristic values, in the learning mode, the characteristic values obtained by simulation (characteristic values of 13 types of characteristic items in this embodiment) are input to the corresponding element values (element values). In the present embodiment, the weight w and the bias b are updated so that substantially 7 element values) are output. In the design mode after learning, when a characteristic value is input, it functions to generate and output the element value of each circuit element corresponding to the characteristic value.

When functioning to design the characteristic value based on the element value, in the learning mode, the weight w and the bias b are updated so that the element value obtained by the simulation becomes the input and the corresponding characteristic value becomes the output. In the design mode after learning, when the element value of each circuit element is input, it functions to generate and output the corresponding characteristic value.

The example of FIG. 5 is an example in which the element value is designed based on the characteristic value. In the learning mode, the characteristic value obtained by the simulation is input and the corresponding element value is output. It works to learn. In the design mode after learning, when a new characteristic value is input, it functions to generate and output the element value of each circuit element corresponding to the new characteristic value.

FIG. 6 is an explanatory diagram of the circuit design device 100 according to the embodiment of the present invention, and is a chart showing the results when the element values are designed based on the characteristic values.
Hereinafter, the operation of the embodiment of the present invention will be described in detail with reference to FIGS. 1 to 6.

First, the user operates the operation unit 102 and inputs the circuit configuration of the design target circuit, the circuit characteristic item name of the design target circuit, and the circuit element name constituting the design target circuit as the processing target (FIG. 2). Processing step S201). At this time, the operation unit 102 selects and inputs the circuit configuration of the design target circuit from the plurality of circuit configurations included in the circuit configuration data 111 of the storage unit 104, and is included in the circuit characteristic item name data 113. The circuit characteristic item name of the design target circuit is selected and input from a plurality of circuit characteristic item names, and the circuit element name of the design target circuit is input from the plurality of circuit element names included in the circuit element name data 114. Select and enter.

Here, the operation unit 102 and the storage unit 104 form an input unit. The input unit can be configured to include an input interface such as a USB (Universal Serial Bus) port, and can be configured to input various data by using the input interface.
The circuit configuration of the circuit to be designed may be configured so that data necessary for creating the circuit configuration such as a netlist and constraint data is stored in the storage unit 104 in advance and generated using these. ..

In the processing target input step of the processing step S201, the operational amplifier of FIG. 3 is input as the design target circuit 301. Further, the circuit characteristic item names of the above-mentioned 13 items are input as the circuit characteristic item names of the circuit 301 to be designed, and the element names (names of 9 elements) of the MOS transistors M1 to M8 and one resistor R are input. To.

The simulation unit 105 performs simulation of the design target circuit 301 while changing the element values of the circuit elements (MOS transistors M1 to M8 and the resistor R) constituting the design target circuit 301, thereby corresponding to each element value. Learning data including the characteristic values of each circuit characteristic item is generated (step S202).

The simulation unit 105 uses the probability distribution of FIG. 4 to perform simulation while changing the characteristics of the transistors M1 to M8 by changing the variable M. At this time, the transistors M1 and M2 are changed to the same value, and the transistors M3 and M4 are also changed to the same value. Further, the resistance value of the resistor R is changed to a plurality of predetermined values for simulation.

(1) When performing simulation, the simulation unit 105 generates a new element value of each transistor M1 to M8 by multiplying a predetermined initial value by the rate of change of the variable M, and also has a predetermined resistance value R. A new resistance element value is generated by changing a predetermined amount from the initial value, and a circuit configuration for simulation of the design target circuit 301 is generated. By performing the above processing while changing the element value of each circuit element, a predetermined number of circuit configurations for simulation of the design target circuit 301 are created.

(2) The simulation unit 105 executes simulations for each of the created predetermined number of circuit configurations, evaluates each circuit configuration based on a predetermined evaluation formula, and sets the element values of the circuit configurations satisfying the predetermined criteria and the element values thereof. Save the corresponding characteristic value as training data.
(3) The simulation unit 105 updates the highest evaluated element value in the generated circuit configuration as a new initial value.

The simulation unit 105 repeatedly executes the simulation processes (1) to (3) above to generate learning data.
The learning data generated as described above is stored as the learning data 115 of the storage unit 104. As a result, learning data 115 consisting of the element value of each circuit element and the characteristic value of each circuit characteristic item corresponding thereto is collected.

In this way, the gate width W and the gate length L of the transistors M1 to M8 are fixed, and the element values of the transistors M1 to M8 are changed by changing the value of the variable M, thereby changing the simulation conditions. Therefore, learning data can be collected efficiently. Further, the learning data can be efficiently collected by changing the characteristics of the transistors M1 to M8 by changing the variable M by using the probability distribution of the two-mountain characteristic.

Next, when the design processing unit 106 is put into the learning mode by the operation of the operation unit 102, the design processing unit 106 learns the collected learning data 115 by deep learning (step S203).
At this time, when the element value of the circuit element corresponding to the characteristic value of the circuit characteristic item is generated in the later design mode, the characteristic value of the circuit characteristic item is input in the learning mode and the characteristic value of the circuit characteristic item is input. An instruction is input from the operation unit 102 to perform deep learning so that the element value of the circuit element corresponding to the above is output.

Further, when the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element is generated in the design mode, the element value of the circuit element is input in the learning mode and the circuit characteristic corresponding to the element value of the circuit element. An instruction is input from the operation unit 102 to perform deep learning so that the characteristic value of the item is output.

The dimensionless unit 107 dimensionlessizes the characteristic value corresponding to the element value and inputs it to the generation processing unit 108 by using the learning data 115 composed of the element value and the corresponding characteristic value. As described above, the dimensionless unit 107 performs dimensionlessization by normalizing the characteristic values and standardizing the element values.

The generation processing unit 108 performs deep learning using the dimensionless element values and the corresponding characteristic values from the dimensionless unit 107.
At this time, when the generation processing unit 108 generates the element value corresponding to the characteristic value in the design mode, the characteristic value is input in the learning mode and the element value corresponding to the characteristic value is output. Perform deep learning. Further, when the generation processing unit 108 generates the characteristic value corresponding to the element value in the design mode, the generation processing unit 108 takes the element value as an input and outputs the characteristic value corresponding to the element value in the learning mode. Perform learning.

Next, when designing the design target circuit 301, the operation unit 102 sets the design processing unit 106 to the design mode, and the characteristic value of the new circuit characteristic item of the design target circuit 301 stored in the storage unit 104, Alternatively, the element value of the new circuit element is input to the design processing unit 106, and the circuit design processing is performed as follows (step S204).

Here, when generating the element value of the circuit element corresponding to the characteristic value of the circuit characteristic item, a new characteristic value of the circuit characteristic item is input to the design processing unit 106 input unit, and corresponds to the element value of the circuit element. When generating the characteristic value of the circuit characteristic, a new element value of the circuit element is input.
The dimensionless unit 107 dimensionlessizes the input characteristic value or element value and inputs it to the generation processing unit 108.

When the generation processing unit 108 generates the element value corresponding to the characteristic value in the design mode, the generation processing unit 108 generates the element value corresponding to the characteristic value input from the dimensionless unit 107 and inputs it to the restoration unit 109. The restoration unit 109 restores the dimensionless element value from the generation processing unit 108 to the value of the original unit and outputs it to the display unit 103.
The display unit 103 displays the element value of each circuit element corresponding to the characteristic value of each circuit characteristic item of the circuit to be designed. Further, the element value of each circuit element corresponding to the characteristic value of each circuit characteristic item of the design target circuit is stored in the data area 110 of the storage unit 104.

When the generation processing unit 108 generates the characteristic value corresponding to the element value in the design mode, the generation processing unit 108 generates the characteristic value corresponding to the element value input from the dimensionless unit 107 and inputs it to the restoration unit 109. .. The restoration unit 109 restores the dimensionless characteristic value from the generation processing unit 108 to the value of the original unit and outputs it to the display unit 103.
On the display unit 103, the characteristic value of each circuit characteristic item corresponding to the element value of each circuit element of the design target circuit is displayed. Further, the characteristic value of each circuit characteristic item corresponding to the element value of each circuit element of the design target circuit is stored in the data area 110 of the storage unit 104.

In the present embodiment, the simulation, the instruction of the learning mode and the design mode, the input of data, etc. are performed by the instruction of the operation unit 102, but a series of processes from the simulation to the end of the design mode are automatically performed. It is possible to change such as. In either case, the design processing unit 106 performs deep learning using the element value of the circuit element and the characteristic value of the corresponding circuit characteristic item in the learning mode, and sets the characteristic value of the circuit characteristic item in the design mode. A process of automatically generating at least one of the element value of the corresponding circuit element and the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element is performed by regression analysis.

By the way, in the embodiment of the present invention, the generation processing unit 108 uses the value made dimensionless by normalizing the characteristic value by the dimensionless unit 107 and standardizing the element value, and using the element value and the characteristic value. It is configured to perform the generation process of.
FIG. 6 shows both the error rate (right column) of the element value obtained when the characteristic value is normalized and the element value is standardized and the design process is performed as in the present embodiment, and both the characteristic value and the element value. It is a chart comparing the error rates (center column) of the element values obtained when the above-mentioned formula is normalized and the design process is performed. As is clear from FIG. 6, it can be seen that the accuracy is improved by the dimensionless processing in the embodiment of the present invention.

This is presumed to be due to the following reasons.
That is, normalization is a calculation for judging the quality of data groups having different units (different size ranges) on the same scale. When normalizing the circuit characteristics,
(1) When the data with a large value indicates good performance, the data with the largest value is 1 and the data with the smallest value is 0.
(2) When the data with a small value indicates that the performance is good, the data with the smallest value is 1 and the data with the largest value is 0.
Normalize each. Thereby, the circuit characteristics can be evaluated.

On the other hand, in the case of the element value, if the element value is normalized by defining as in (1) above, it will be judged that the performance is good when the value is large. However, in the case of the element value, it is not always good that the value is large. Therefore, if it is made dimensionless by normalization, it cannot be judged whether it is good or bad.

In addition, standardization is dimensionless by using the difference from the reference value, and it is not judged whether it is good or bad, so it is suitable for dimensionless element value. Therefore, in the embodiment of the present invention, the element value is dimensionless by using standardization.
In addition, the standardization used in neural networks is generally processed so that the average of the input data is 0 and the variance is 1, and the data is generally limited to the range of -1 to 1, but this time (learning). Good results were obtained by setting (the relevant value of the data) / (initial value of the training data), so this is used.

FIG. 7 is a diagram showing the configuration of the generation processing unit 108 corresponding to FIG. 5, and is an example of a case where the characteristic value is designed based on the element value.
In the learning mode, the generation processing unit 108 updates the weight w and the bias b so that the element value obtained in the simulation is input and the corresponding characteristic value is output. In the design mode after learning, when the element value of each circuit element is input, it functions to generate and output the corresponding characteristic value. Other processes such as dimensionless process and restoration process are the same as the above-mentioned processes.

FIG. 8 is a chart showing the average matching rate of the characteristic values generated based on the element values by making the generation processing unit 108 function as shown in FIG.
When calculating the average match rate, (1) the characteristic value A of the test data not used for learning is input to the design processing unit 106 to generate the corresponding element value, and (2) the element value is designed. It is input to the part 106 to generate the corresponding characteristic value B, and (3) the matching rate of the characteristic value B with respect to the characteristic value A is calculated.

The above (1) to (3) are performed on a predetermined number of test data, and the average value of the obtained match rates is defined as the average match rate. An average accuracy of 90% or more is achieved, and good results are obtained.
By using the model that has been trained, the learning time is not required in the next design process, so that the design process can be performed only in the time required for the desired characteristic value and element value generation process.

FIG. 9 is a circuit configuration diagram showing an example of another design target circuit 901, and shows an example of an operational amplifier whose input unit is composed of an NMOS transistor. In FIG. 9, the transistors M1 and M2 are NMOS transistors having the same characteristics, and the transistors M3 and M4 are MOSFET transistors having the same characteristics. It is composed of six types of MOS transistors M1 to M8 having different characteristics and one resistor R.

FIG. 10 is a chart showing the average matching rate of the characteristic values obtained in the same manner as described above by making the generation processing unit 108 function as shown in FIG. In this example as well, an accuracy of 90% or more is achieved on average, and good results are obtained.

As described above, in the embodiment of the present invention, an input unit (operation) for inputting the circuit configuration of the design target circuit, the circuit characteristic item name of the design target circuit, and the element name of the circuit element constituting the design target circuit. Unit 102, storage unit 104),
A simulation unit 105 that generates an element value of the circuit element and a characteristic value of the circuit characteristic item corresponding to the element value of the circuit element by simulating the circuit to be designed while changing the element value of the circuit element.
In the learning mode, deep learning is performed using the element value of the circuit element and the characteristic value of the corresponding circuit characteristic item, and in the design mode, the element value of the circuit element corresponding to the characteristic value of the circuit characteristic item and the element value of the circuit element. It is characterized by including a design processing unit 106 that generates at least one of the characteristic values of the circuit characteristic item corresponding to the element value of the circuit element by regression analysis.

Here, when the design processing unit 106 generates the element value of the circuit element corresponding to the characteristic value of the circuit characteristic item in the design mode, the design processing unit 106 inputs the characteristic value of the circuit characteristic item in the learning mode. Deep learning is performed so that the element value of the circuit element corresponding to the characteristic value of the circuit characteristic item is output, and the characteristic value of the circuit characteristic item is input to the characteristic value of the circuit characteristic item in the design mode. It can be configured to generate the element value of the corresponding circuit element.

Further, when the design processing unit 106 generates the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element in the design mode, the element value of the circuit element is input and the circuit is input in the learning mode. Deep learning is performed so that the characteristic value of the circuit characteristic item corresponding to the element value of the element is output, and the element value of the circuit element is input in the design mode, and the circuit corresponding to the element value of the circuit element is input. It can be configured to generate characteristic values for characteristic items.

Therefore, the circuit design can be easily performed in a short time without depending on the knowledge and subjectivity of the designer.
Further, by executing the circuit design program according to the embodiment of the present invention on the computer, the circuit design device can easily perform the circuit design in a short time without depending on the knowledge and subjectivity of the designer. Becomes possible to build.

It can be used for inventions related to circuit design of analog integrated circuits and digital integrated circuits.

100 ... Circuit design device 101 ... Data processing unit 102 ... Operation unit 103 ... Display unit 104 ... Storage unit 105 ... Simulation unit 106 ... Design processing unit 107 ... None Dimensioning unit 108 ... Generation processing unit 109 ... Restoration unit 110 ... Data area 111 ... Circuit configuration data 112 ... Circuit item data 113 ... Circuit characteristic item name data 114 ... Circuit element name data 115 ... Learning data 116 ... Programs 301, 901 ... Design target circuits M1 to M8 ... MOS transistor R ... Resistance

Claims (5)

An input unit for inputting the circuit configuration of the circuit to be designed, the circuit characteristic item name of the circuit to be designed, and the element name of the circuit element constituting the circuit to be designed.
A simulation unit that generates the element value of the circuit element and the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element by simulating the circuit to be designed while changing the element value of the circuit element.
In the learning mode, deep learning is performed using the element value of the circuit element and the characteristic value of the corresponding circuit characteristic item, and in the design mode, the element value of the circuit element corresponding to the characteristic value of the circuit characteristic item and the element value of the circuit element. A circuit design apparatus including a design processing unit that generates at least one of the characteristic values of the circuit characteristic item corresponding to the element value of the circuit element by regression analysis. The design processing unit
When the element value of the circuit element corresponding to the characteristic value of the circuit characteristic item is generated in the design mode, the characteristic value of the circuit characteristic item is input and the characteristic value of the circuit characteristic item is corresponded to in the learning mode. Deep learning is performed so that the element value of the circuit element is output, and the element value of the circuit element corresponding to the characteristic value of the circuit characteristic item is input in the design mode by inputting the characteristic value of the circuit characteristic item. Generate and
When the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element is generated in the design mode, the element value of the circuit element is input and the element value of the circuit element corresponds to the element value of the circuit element in the learning mode. Deep learning is performed so that the characteristic value of the circuit characteristic item is output, and the element value of the circuit element is input in the design mode to generate the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element. The circuit design apparatus according to claim 1. The input unit inputs the circuit configuration of the design target circuit, the circuit characteristic item name of the design target circuit, and the element name of the circuit element constituting the design target circuit.
The simulation unit generates the element value of the circuit element and the characteristic value of the circuit characteristic item corresponding thereto by simulating the design target circuit while changing the element value of the circuit element.
The design processing unit performs deep learning using the element value of the circuit element and the characteristic value of the corresponding circuit characteristic item in the learning mode, and the circuit element corresponding to the characteristic value of the circuit characteristic item in the design mode. A circuit design method, characterized in that at least one of the element value of the above and the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element is generated by regression analysis. The design processing unit
When the element value of the circuit element corresponding to the characteristic value of the circuit characteristic item is generated in the design mode, the characteristic value of the circuit characteristic item is input and the characteristic value of the circuit characteristic item is corresponded to in the learning mode. Deep learning is performed so that the element value of the circuit element is output, and the element value of the circuit element corresponding to the characteristic value of the circuit characteristic item is input in the design mode by inputting the characteristic value of the circuit characteristic item. Generate and
When the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element is generated in the design mode, the element value of the circuit element is input and the element value of the circuit element corresponds to the element value of the circuit element in the learning mode. Deep learning is performed so that the characteristic value of the circuit characteristic item is output, and the element value of the circuit element is input in the design mode to generate the characteristic value of the circuit characteristic item corresponding to the element value of the circuit element. The circuit design method according to claim 3, characterized in that. A circuit design program for causing a computer to construct the circuit design device according to claim 1 or 2.

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