JP2020072254A - Sub-mount and method for manufacturing the same - Google Patents

Abstract

To provide a sub-mount that has good accuracy in dimensions.SOLUTION: A sub-mount 100 comprises a substrate 110 that has a first surface 101 on which a device is mounted. The substrate 110 has a second surface 102 that is arranged in a first direction D1 in an in-plane direction of the first surface 101; a third surface 103; a fourth surface 104; a fifth surface 105; a sixth surface 106; a first notch part 113a that is formed at a portion where the second surface 102 and third surface 103 are adjacent to each other; a second notch part 113b that is formed at a portion where the second surface 102 and fourth surface 104 are adjacent to each other; a first metal film 121 that is arranged on the first surface 101; and a second metal film 122 that is arranged on the second surface 102. The second metal film 122 is not arranged in the first notch part 113a and second notch part 113b.SELECTED DRAWING: Figure 1

Description

  The present disclosure relates to a submount and a manufacturing method thereof.

  Conventionally, a submount including a substrate for mounting an element such as a semiconductor laser chip has been used. Such a submount is generally formed by dividing a plate-shaped substrate with a dicing blade or the like. In the submount formed in this way, burrs may occur at the time of division. Therefore, a technique for solving the problem of burrs that occurs in the submount has been proposed (see, for example, Patent Document 1).

  In the method of manufacturing a submount disclosed in Patent Document 1, a burr is generated in the divided surface by forming a cutout portion in the divided surface of the submount and a ridge line portion of a surface adjacent to the divided surface. Even in this case, the burr is trying to fit in the cutout.

JP, 2016-103564, A

  However, in the method of manufacturing a submount disclosed in Patent Document 1, when applied to a submount for mounting a small semiconductor laser chip of about 0.3 mm square, blade dicing deteriorates the accuracy of the cross section. In addition, the shapes of the left and right dividing planes may be asymmetrical, and there is a problem that a desired external dimension cannot be obtained. Also, when stealth dicing is applied, individualizing is performed by sheet expanding in a state where the metal film is formed on the entire one side surface of the submount, but at this time, although the substrate forming the submount is divided, There is a problem that the metal film on one side surface of the submount remains connected without being divided, and the submount is not individually divided.

  The present disclosure has been made in order to solve such a problem, and an object thereof is to provide a submount or the like having good external dimension accuracy.

  In order to achieve the above object, a submount according to the present disclosure is a submount including a substrate having a first surface on which an element is mounted, and the substrate has a first surface in the in-plane direction of the first surface. A second surface that is disposed in one direction and that is substantially perpendicular to the first surface, a third surface that is substantially perpendicular to the first surface and the second surface, the first surface and the A fourth surface which is substantially perpendicular to the second surface and which opposes the third surface, and which is substantially perpendicular to the second surface, the third surface and the fourth surface, and A fifth surface that faces the first surface and a sixth surface that faces the second surface, and the third surface is a seventh surface adjacent to the sixth surface. And a ninth surface substantially parallel to the seventh surface located closer to the fourth surface than the seventh surface on the second surface side than the seventh surface, Face 2 and front It has a first notch formed in a portion adjacent to the ninth surface.

  According to the present disclosure, it is possible to provide a submount or the like having good external dimension accuracy.

FIG. 1 is a perspective view showing an outline of a submount according to the first or second embodiment. FIG. 2 is a perspective view showing an outline of the semiconductor laser device according to the first or second embodiment. FIG. 3 is a schematic diagram showing an outline of the heat-assisted hard disk device according to the first embodiment. FIG. 4 is a plan view showing a state after the etching process of the silicon wafer according to the first embodiment. FIG. 5A is a plan view showing a state after the metal film is formed on the silicon wafer according to the first embodiment. FIG. 5B is a sectional view showing a state after the metal film is formed on the silicon wafer according to the first embodiment. FIG. 6 is a plan view showing a state after forming the concave portion of the silicon wafer according to the first embodiment. FIG. 7 is a plan view showing a modified region of the silicon wafer according to the first embodiment. FIG. 8 is a cross-sectional view showing a silicon wafer singulation step according to the first embodiment. FIG. 9 is a plan view showing the shape of the silicon wafer according to the first embodiment. FIG. 10 is a plan view showing a force applied to the silicon wafer when the silicon wafer having the modified region according to the first embodiment is cut. FIG. 11 is a plan view showing a state in which the silicon wafer according to the first embodiment is cut into substrates. FIG. 12 is a perspective view showing the configuration of the submount according to the first embodiment. FIG. 13 is a plan view showing a state after the etching process of the silicon wafer according to the second embodiment. FIG. 14 is a plan view showing a state after a protective film is formed on the concave portion of the silicon wafer according to the second embodiment. FIG. 15 is a plan view showing a state after the metal film is formed on the silicon wafer according to the second embodiment. FIG. 16 is a plan view showing a state after removing the protective film in the concave portion of the silicon wafer according to the second embodiment. FIG. 17 is a perspective view showing the outline of the submount according to the third embodiment. FIG. 18 is a perspective view showing an outline of the semiconductor laser device according to the third embodiment. FIG. 19 is a plan view showing a state after the etching process of the silicon wafer according to the third embodiment. FIG. 20 is a plan view showing a state after the film formation of the silicon wafer according to the third embodiment. FIG. 21 is a plan view showing a modified region of the silicon wafer according to the third embodiment. FIG. 22 is a cross-sectional view showing a silicon wafer singulation step according to the third embodiment. FIG. 23 is a plan view showing the shape of the silicon wafer according to the third embodiment. FIG. 24 is a plan view showing a force applied to a silicon wafer when the silicon wafer having a modified region according to the third embodiment is divided. FIG. 25 is a plan view showing a state in which the silicon wafer according to the third embodiment is cut into substrates. FIG. 26 is a perspective view showing the configuration of the submount according to the third embodiment.

  Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. It should be noted that each of the embodiments described below shows a specific example of the present disclosure. Therefore, numerical values, shapes, materials, constituent elements, arrangement positions and connection forms of constituent elements, steps (processes) and order of steps, and the like shown in the following embodiments are examples and limit the present disclosure. It is not the intention to do. Therefore, among the constituent elements in the following embodiments, the constituent elements that are not described in the independent claims indicating the highest concept of the present disclosure will be described as arbitrary constituent elements.

  In addition, each drawing is a schematic view and is not necessarily strictly illustrated. Therefore, the scales and the like do not necessarily match in each drawing. In each drawing, the same reference numerals are given to substantially the same configurations, and overlapping description will be omitted or simplified.

(Embodiment 1)
[1-1. Submount overview]
First, the outline of the submount according to Embodiment 1 will be described with reference to the drawings.

  FIG. 1 is a perspective view showing an outline of a submount 100 according to this embodiment.

  The submount 100 according to this embodiment is a member including a substrate 110 on which an element such as a semiconductor laser chip is mounted.

  The substrate 110 is a rectangular parallelepiped member, and is a Si substrate in the present embodiment. The dimension of each side of the substrate 110 is, for example, about 0.1 mm or more and about 1 mm or less.

  As shown in FIG. 1, the substrate 110 includes a first surface 101, a second surface 102, a third surface 103, a fourth surface 104, a fifth surface 105, and a sixth surface. It has a surface 106, a first notch 113a, and a second notch 113b.

  The first surface 101 is a surface on which an element such as a semiconductor laser chip is mounted. The second surface 102 is arranged in the first direction D1 which is an in-plane direction of the first surface 101, and is a surface substantially perpendicular to the first surface 101. The third surface 103 is a surface that is substantially perpendicular to the first surface 101 and the second surface 102. The fourth surface 104 is a surface that is substantially perpendicular to the first surface 101 and the second surface 102 and that faces the third surface 103. The fifth surface 105 is a surface that is substantially perpendicular to the second surface 102, the third surface 103, and the fourth surface 104 and that faces the first surface 101. The sixth surface 106 is a surface facing the second surface 102. The size of the substrate 110 is such that the distance between the third surface 103 and the fourth surface 104 (width Wsub of the substrate) is about 250 μm or more and about 350 μm or less, and the distance between the second surface 102 and the sixth surface 106 ( The substrate length Lsub) may be 200 μm or more and 300 μm or less, and the distance between the first surface 101 and the fifth surface 105 (substrate height Hsub) may be 100 μm or more and 200 μm or less.

  Here, “substantially vertical” means almost vertical, for example, about 85 ° or more and 95 ° or less.

  In the present embodiment, the first surface 101 is a Si (100) surface. Whether the second surface 102 is the Si (011) surface, the third surface 103 is the Si (0-11) surface, and the fourth surface 104 is the Si (01-1) surface. The surface 102 is a (010) surface of Si, the third surface 103 is a (001) surface of Si, and the fourth surface 104 is a (00-1) surface of Si.

  The first notch 113a is a concave portion formed in a portion where the second surface 102 and the third surface 103 are adjacent to each other. The second cutout portion 113b is a concave portion formed in a portion where the second surface 102 and the fourth surface 104 are adjacent to each other. In other words, the first notch portion 113a is formed at the ridge line between the second surface 102 and the third surface 103, and the second notch portion 113b is formed at the second surface 102 and the fourth surface. Is formed on the ridge line with the surface 104 of the. The first notch 113a and the second notch 113b have a curved surface 115a and a flat surface 107a, and a curved surface 115b and a flat surface 107b, respectively.

  In the present embodiment, the submount 100 has the first metal film 121 and the solder film 116 arranged on the first surface 101. The solder film 116 is disposed on the first metal film 121. Thereby, an element such as a semiconductor laser chip can be joined via the solder film 116.

  The structure of the first metal film 121 is not particularly limited. The first metal film 121 is, for example, a metal film in which Ti, Pt, and Au are stacked from the substrate 110 side. The film thickness of each layer of Ti, Pt, and Au is, for example, about 0.05 μm or more and about 1 μm or less. More specifically, Ti may be about 0.1 μm, Pt may be about 0.2 μm, and Au may be about 0.2 μm or more and 0.5 μm or less. Each layer of Ti, Pt, and Au functions as an adhesion film, a diffusion prevention film, and an electrode film, respectively. The thickness of the solder film may be, for example, about 2.0 μm. TiN may be formed between the first surface 101 and the first metal film 121.

  Further, in the present embodiment, the first metal film 121 is provided with a strip-shaped metal film removal portion 117 extending in the first direction D1. The metal film removal part 117 is a part where a part of the first metal film 121 is removed. In the present embodiment, in the metal film removing section 117, the Au layer of the first metal film 121 is removed. The solder film 116 is arranged on the fourth surface 104 side with respect to the metal film removal portion 117 on the first metal film 121. Accordingly, when the solder film 116 is melted to bond the element to the submount 100, it is possible to suppress the solder film 116 from flowing over the metal film removal portion 117 to the third surface 103 side.

  Further, the solder film 116 is arranged on the first surface 101 at a position on the fourth surface 104 side. In other words, the first surface R1 and the fourth surface 104 on the side of the third surface 103, which are obtained by dividing the first surface 101 by line segments perpendicular to the second surface 102, have an equal area. In the second region R2 on the side, more solder film 116 is arranged in the second region R2 than in the first region R1. This allows the elements to be arranged on the submount 100 in an offset manner.

  In addition, the submount 100 has a second metal film 122 arranged on the second surface 102. This allows the second surface 102 of the substrate 110 to be joined to another member via solder or the like. The second metal film 122 is not formed on the first notch portion 113a and the second notch portion 113b. In other words, the first notch portion 113a and the second notch portion 113b are not formed. The surface of the substrate 110 is exposed from the second metal film 122. The configuration of the second metal film 122 is not particularly limited. The second metal film 122 may have the same configuration as the first metal film 121, for example.

  The first cutout portion 113a and the second cutout portion 113b of the substrate 110 will be described in detail later.

  In the following description, the first surface 101, the second surface 102, the third surface 103, the fourth surface 104, the fifth surface 105, the sixth surface 106, and the first cutting surface of the submount will be described. Even when described as the notch 113a or the second notch 113b, the first surface 101, the second surface 102, the third surface 103, the fourth surface 104, the fifth surface 105, The sixth surface 106, the first cutout portion 113a, or the second cutout portion 113b indicates the structure of the substrate included in the submount.

[1-2. Outline of semiconductor laser device]
Next, an outline of the semiconductor laser device according to the present embodiment will be described. Hereinafter, a semiconductor laser device using the submount 100 will be described with reference to the drawings.

  FIG. 2 is a perspective view showing an outline of the semiconductor laser device 151 according to this embodiment. As shown in FIG. 2, the semiconductor laser device 151 according to the present embodiment includes a submount 100 and a semiconductor laser chip 152 bonded to the first surface 101 of the submount 100 via a solder film 116. Equipped with.

The semiconductor laser chip 152 is an example of an element mounted on the first surface of the submount 100. The semiconductor laser chip 152 is a known semiconductor laser chip containing gallium arsenide or a nitride semiconductor, for example. In the present embodiment, the length L _LD of the semiconductor laser chip 152 in the first direction D1 is about 200 μm or more and 300 μm or less. The width W _LD of the semiconductor laser chip in the in-plane direction of the first surface 101 of the submount 100 and in the direction perpendicular to the first direction D1 is about 100 μm or more and 200 μm or less. The height H _LD of the semiconductor laser chip 152 in the direction normal to the first surface 101 of the submount 100 and perpendicular to the first direction D1 is about 100 μm or more and 200 μm or less. The emission surface 153 of the semiconductor laser chip 152 is arranged on the second surface 102 side of the submount 100.

[1-3. Overview of heat-assisted hard disk drive]
Next, an outline of the heat-assisted hard disk device according to the present embodiment will be described with reference to the drawings.

  FIG. 3 is a schematic diagram showing an outline of the heat-assisted hard disk device 600 according to this embodiment.

  A thermally assisted hard disk device 600 according to this embodiment includes the semiconductor laser device 151 and a slider 602. Further, as shown in FIG. 3, the heat-assisted hard disk device 600 includes a suspension 603 and a disk 604. Although not shown in FIG. 3 for simplification, the semiconductor laser device 151 is mounted on the slider 602.

  The slider 602 is a plate-shaped member for stabilizing the gap between the disk 604 and a recording head or the like (not shown) arranged on the slider 602. The slider 602 includes a near-field light generating element (not shown in FIGS. 3 and 4) that guides a laser to generate near-field light.

  The suspension 603 is a member that supports the slider 602. The disk 604 is a disk-shaped recording medium containing a magnetic material for recording.

  In the thermally assisted hard disk device 600 according to the present embodiment, the magnetic material contained in the disk 604 is heated by irradiating the disk 604 with the laser light output from the semiconductor laser device 151. This can assist recording on the magnetic material.

[1-4. First Submount Manufacturing Method]
Next, a first method of manufacturing the submount 100 according to this embodiment described above will be described. Hereinafter, a method of manufacturing the submount 100 using a silicon wafer as a base material will be described with reference to the drawings.

  First, the silicon wafer 201 is prepared. The silicon wafer 201 is subjected to ordinary photolithography and dry etching to form a plurality of through grooves 202 as shown in FIG. FIG. 4 is a plan view showing a state of the silicon wafer 201 according to the present embodiment after the etching process. The through-grooves 202 each have a flat side surface, and the groove width Wg is about 200 μm or more and 300 μm or less. The distance (corresponding to the length of the substrate 110 after singulation) Lsub between adjacent through grooves 202 is about 200 μm or more and 300 μm or less. The through groove 202 forms the second surface 102 and the sixth surface 106 of the substrate 110 of the submount 100. After forming the through groove 202, a first metal film 121 and a second metal film 122 are formed on the upper surface of the silicon wafer 201 and one side surface of the through groove 202 as shown in FIGS. 5A and 5B. The first metal film 121 and the second metal film 122 are formed at desired positions with desired thickness by vapor-depositing or sputtering metal from the oblique direction of the through groove 202. The film thickness of the first metal film 121 and the second metal film 122 is about 0.2 μm or more and 1.0 μm or less.

  Subsequently, the solder film 116 having a film thickness of about 2.0 μm is formed on the first metal film 121. The first metal film 121, the second metal film 122, and the solder film 116 are formed by a sputtering method or an electron beam evaporation method.

  Next, as shown in FIG. 6, after the second metal film is formed, the silicon wafer is exposed on the side surface of the through groove 202 in which the second metal film 122 is formed by the ion milling method or the deep groove dry etching method. A recess 203 is formed in the. Specifically, in the region of the substrate 110 of the submount 100 where the first notch 113a and the second notch 113b are formed, the second metal film 122 is removed to partially remove the surface of the silicon wafer. By removing, the recess 203 is formed on one side surface of the through groove 202.

  Next, a step of dividing the silicon wafer 201 into individual pieces will be described. In this embodiment mode, the laser beam for processing is applied to the dividing position of the silicon wafer 201 to form the modified region, and then the silicon wafer 201 is expanded to divide the silicon wafer 201. That is, the silicon wafer 201 is divided by stealth dicing. Such an individualizing step according to the present embodiment will be described with reference to the drawings.

  FIG. 7 is a plan view showing the modified region 211 of the silicon wafer 201 according to this embodiment. FIG. 8 is a cross-sectional view showing a step of dividing the silicon wafer 201 according to the present embodiment into individual pieces. FIG. 8 shows an AA cross section of FIG. 7. Note that FIG. 8 shows a metal film 221 formed on the main surface of the silicon wafer 201. The metal film 221 includes the first metal film 121 and the solder film 116.

  As shown in FIG. 7, the modified region 211 is formed on a line that extends in the vertical direction from the region where the concave portion 203 is formed toward the adjacent through groove 202, at a position that is a dividing plane in the silicon wafer 201. .. More specifically, the modified region 211 including minute cracks is formed at a position corresponding to the third surface 103 and the fourth surface 104 on the substrate 110 of the submount 100.

  The modified region 211 is formed by irradiating the silicon wafer 201 with the processing laser 302 from the lower surface of the silicon wafer 201 (that is, the surface corresponding to the fifth surface of the substrate 110) as shown in FIG. It That is, the irradiation position 303 of the processing laser 302 becomes the modified region 211. The processing laser 302 is a laser having a wavelength that passes through the silicon wafer 201, and may have sufficient power to form the modified region 211. Further, the surface roughness (arithmetic mean roughness Ra) of the lower surface of the silicon wafer 201 in FIG. 8 corresponding to the fifth surface 105 is 0.2 μm or less, and silicon that is a material forming the substrate 110 is Exposed. As a result, it is possible to suppress the scattering of the processing laser on the incident surface of the silicon wafer 201, so that the cutting quality can be further improved.

  After forming the modified region 211 on the silicon wafer 201, the tape material 306 attached to the silicon wafer 201 is stretched. Here, since cracks are formed in the modified regions 211 by the processing laser 302, the silicon wafer 201 can be divided into the modified regions 211 when the tape material 306 is stretched. Since the second metal film does not exist on the dividing line, the silicon wafer 201 can be divided into individual pieces by extending the tape material 306, and the substrate 110 can be formed. As described above, each modified region 211 is formed on the third surface 103 and the fourth surface 104 of the substrate 110.

  Here, the operation and effect of the cutout portion in the method of manufacturing the submount 100 described above will be described with reference to the drawings.

  FIG. 9 is a plan view showing the shape of the silicon wafer 201 according to this embodiment. As shown in FIG. 9, the recess 203 of the silicon wafer 201 has a parallel surface 407 that is parallel to the surface that becomes the second surface 102 of the substrate 110, and a curved surface 408. The width a of the parallel surface 407 in the horizontal direction in FIG. 9 is larger than the variation width b of the irradiation position of the processing laser. The variation width b of the irradiation position of the processing laser is about 10 μm. A force applied to the silicon wafer 201 when the processing laser is irradiated onto the silicon wafer 201 having the recess 203 to divide the silicon wafer 201 will be described with reference to the drawings.

  FIG. 10 is a plan view showing a force applied to the silicon wafer 201 when the silicon wafer 201 on which the modified region 211 according to the present embodiment is formed is divided. FIG. 11 is a plan view showing a state where the silicon wafer 201 according to the present embodiment is divided into the substrates 110.

  As shown in FIG. 10, when the silicon wafer 201 on which the modified region 211 composed of the irradiation position 303 of the processing laser is formed is expanded in the horizontal direction (left and right directions along the paper surface) of FIG. 10, the silicon wafer 201 is expanded. A force is applied in the vicinity of the recess 203 in the direction indicated by the arrow. Here, since minute cracks are formed in the modified region 211, the silicon wafer 201 is divided along the modified region 211, as shown in FIG. In particular, in the present embodiment, as described above, in the concave portion 203, the width a of the parallel surface 407 is larger than the variation width b of the irradiation position of the processing laser, so that the silicon wafer 201 on the curved surface 408 other than the parallel surface 407 or the like. Can be suppressed from being divided. In addition, since the second metal film is not formed at all in the recess 203 and the parallel surface 407 and the curved surface 408 of the exposed substrate 110 are smoothly connected, the pulling force may be concentrated at a specific position. Suppressed. Therefore, the silicon wafer 201 can be divided along the surface along the modified region 211. That is, in the present embodiment, it is possible to realize the submount 100 in which the position accuracy of the dividing plane and the flatness of the dividing plane are good.

  In the present embodiment, the substrate 110 of the submount 100 has a first cutout 113a and a second cutout 113b corresponding to the recess 203 of the silicon wafer 201. The first notch 113a and the second notch 113b have flat surfaces 107a and 107b corresponding to the parallel surfaces 407 of the silicon wafer 201, respectively. That is, the submount 100 has the flat surface 107a that is substantially parallel to the second surface 102 in the vicinity of the third surface 103 in the first cutout portion 113a. Further, the submount 100 has a flat surface 107b that is substantially parallel to the second surface 102 in the vicinity of the fourth surface 104 in the second cutout portion 113b.

  Since the submount 100 has such flat surfaces 107a and 107b, even when the irradiation position of the processing laser is varied when the submount 100 is formed by dividing the silicon wafer 201, a surface other than the flat surfaces 107a and 107b is formed. It is possible to suppress the division at the position. That is, it is possible to realize the submount 100 in which the accuracy of the position of the dividing plane and the flatness of the dividing plane are good.

  In the present embodiment, the length of the planes 107a and 107b in the horizontal direction of FIG. 11 is about 10 μm. By setting the length to 5 μm or more, it is possible to more reliably prevent the silicon wafer 201 from being cut at positions other than the flat surfaces 107a and 107b when the silicon wafer 201 is cut.

  Further, the first notch 113a and the second notch 113b have curved surfaces 115a and 115b corresponding to the curved surface 408 of the silicon wafer 201, respectively. In the present embodiment, the curved surfaces 115a and 115b have an arc shape when viewed in plan from the first surface 101 side of the submount 100. That is, the shape of the cross section of the curved surfaces 115a and 115b parallel to the first surface 101 is an arc shape. In this embodiment, the curved surfaces 115a and 115b have a radius of about 10 μm. By setting the radius to 5 μm or more, it is possible to more reliably prevent the tensile force from being concentrated on the positions corresponding to the curved surfaces 115a and 115b when the silicon wafer 201 is divided.

  The submount 100 formed by the above steps will be described with reference to the drawings. FIG. 12 is a perspective view showing the configuration of the submount 100 according to this embodiment.

  In the third surface 103 of the submount 100 shown in FIG. 12, the outer edge portion 112 on the first notch portion 113a side, the fifth surface 105 side and the sixth surface 106 side is modified by the processing laser 302. It is an unquality area. On the other hand, on the third surface 103, the inner region 111 of the outer edge portion 112 is a region modified by the processing laser 302. Here, the surface roughness of the outer edge portion 112 not modified by the processing laser is smaller than the surface roughness of the inner region 111. In the present embodiment, the surface roughness (Ra) of inner region 111 is approximately 1.0 μm or less, and the surface roughness (Ra) of outer edge portion 112 is approximately 0.2 μm or less. As described above, according to the method of manufacturing the submount 100 according to the present embodiment, it is possible to reduce the surface roughness of the third surface 103 and the fourth surface 104, which correspond to the dividing surface in the individualization. .. Although not shown, the fourth surface 104 also has an outer edge portion 112 and an inner region 111, similar to the third surface 103.

  Further, the surface roughness of the third surface 103 and the fourth surface 104 divided by the stealth dicing as described above is rougher than the surface roughness of the second surface 102 formed by etching.

  In addition, in the present embodiment, the first surface 101 is a Si (100) surface. Whether the second surface 102 is the Si (011) surface, the third surface 103 is the Si (0-11) surface, and the fourth surface 104 is the Si (01-1) surface. The surface 102 is a (010) surface of Si, the third surface 103 is a (001) surface of Si, and the fourth surface 104 is a (00-1) surface of Si. Thereby, the dividing direction by the stealth dicing can be made to correspond to the crystal orientation of Si, which is the material of the substrate 110. Therefore, the dividing quality can be further improved.

(Embodiment 2)
Next, a second embodiment will be described with reference to the drawings. The shape of the submount 100 is the same as that of the first embodiment. The difference from the first embodiment is the method of manufacturing the submount 100. Hereinafter, the steps different from the manufacturing method of the first embodiment will be mainly described.

[2-1. Second Submount Manufacturing Method]
A silicon wafer 201 is prepared. The silicon wafer 201 is subjected to ordinary photolithography and dry etching to form a plurality of through grooves 202a as shown in FIG. FIG. 13 is a plan view showing a state of the silicon wafer 201 according to the present embodiment after the etching process. Each of the through-grooves 202a has a flat surface on one side surface and a recess 203 on the other side surface. The concave portion 203 is formed at a position corresponding to the cutout portion of the submount when the silicon wafer 201 is divided into individual pieces. The groove width Wg is about 200 μm or more and 300 μm or less. The distance Lsub between adjacent through-grooves 202a (corresponding to the length of the substrate 110 after singulation) is 200 μm or more and 300 μm or less. The second surface 102 and the sixth surface 106 of the substrate 110 of the submount 100 are formed by the through groove 202a. A recess 203 is formed on the side surface of the through groove 202a on the side that becomes the second surface 102. After forming the through groove 202a having the concave portion 203 on the side surface, the protective film 222 is formed by a normal photolithography technique so as to fill the entire concave portion 203 as shown in FIG. At this time, the protective film 222 is not formed on the flat surface of the sixth surface and the flat surface of the second surface.

  As shown in FIG. 15, a first metal film 121 and a second metal film 122 are formed on the upper surface of the silicon wafer 201 and the side surface of the through groove 202a on the side where the protective film 222 is formed. Similar to the first embodiment, the first metal film 121 and the second metal film 122 are formed at desired positions with desired thickness by vapor deposition or sputtering of metal from the oblique direction of the through groove 202a. The film thickness of the first metal film 121 and the second metal film 122 is about 0.2 μm or more and 1.0 μm or less.

  Subsequently, the solder film 116 having a film thickness of about 2.0 μm is formed on the first metal film 121. The first metal film 121, the second metal film 122, and the solder film 116 are formed by a sputtering method or an electron beam evaporation method.

  Next, as shown in FIG. 16, after the second metal film is formed, the protective film 222 is removed by the lift-off method, so that the second metal film is formed on the side surface of the through groove 202a in which the second metal film 122 is formed. The concave portion 203 of the silicon wafer 201 which is not covered with the above is exposed.

  After that, as in the first embodiment, the step of dividing the silicon wafer 201 into pieces is performed, and the individual submounts are obtained.

(Embodiment 3)
[3-1. Submount overview]
Next, the submount according to the third embodiment will be described with reference to the drawings.

  FIG. 17 is a perspective view showing an outline of the submount 100a according to this embodiment.

  Similar to the first embodiment, the submount 100a according to the present embodiment is a member including a substrate 110a for mounting an element such as a semiconductor laser chip.

  The substrate 110a is a rectangular parallelepiped member, and is a Si substrate in the present embodiment. The dimension of each side of the substrate 110a is, for example, about 0.1 mm or more and about 1 mm or less.

  As shown in FIG. 17, the substrate 110 a includes a first surface 101, a second surface 102, a third surface 103, a fourth surface 104, a fifth surface 105, and a sixth surface 105. It has a surface 106, a first notch 113a, and a second notch 113b. The arrangement of the first surface 101, the second surface 102, the third surface 103, the fourth surface 104, the fifth surface 105, and the sixth surface 106 is the same as that of the first embodiment. is there.

  The difference from the first embodiment is that the third surface 103 and the fourth surface 104 each have a step portion different from the first cutout portion 113a and the second cutout portion 113b. That is, it has two planes on the second surface side and the sixth surface side with the portion sandwiched therebetween.

  The third surface 103 has a seventh surface 103a connected to the sixth surface 106 on the sixth surface 106 side and a ninth surface connected to the first cutout 113a on the second surface 102 side. It has 103b. In other words, the first notch 113a is formed at the ridge of the second surface 102 and the ninth surface 103b. The seventh surface 103a and the ninth surface 103b are connected to each other with a step portion interposed therebetween, and the seventh surface 103a and the ninth surface 103b are substantially parallel flat surfaces. The ninth surface 103b is located closer to the fourth surface 104 than the seventh surface 103a.

  The fourth surface 104 has an eighth surface 104a connected to the sixth surface 106 on the sixth surface 106 side and a tenth surface connected to the second notch 113b on the second surface 102 side. It has 104b. In other words, the second cutout portion 113b is formed at the ridgeline between the second surface 102 and the tenth surface 104b. The eighth surface 104a and the tenth surface 104b are connected to each other across the step portion, and the eighth surface 104a and the tenth surface 104b are substantially parallel flat surfaces. The tenth surface 104b is located closer to the third surface 103 than the eighth surface 104a is.

  In the present embodiment, the first surface 101 is a Si (100) surface. The second surface 102 is the Si (011) surface, the seventh surface 103a is the Si (0-11) surface, the ninth surface 103b is the Si (0-11) surface, and the eighth surface 104a. Is the (01-1) plane of Si, the tenth surface 104b is the (01-1) plane of Si, the second surface 102 is the (010) plane of Si, and the seventh surface 103a is the ( The (001) plane and the ninth plane 103b are Si (001) planes, the eighth plane 104a is the (00-1) plane of Si, and the tenth plane 104b is the (00-1) plane of Si.

  The size of the substrate 110a is such that the distance between the seventh surface 103a and the eighth surface 104a (width Wsub of the substrate) is 250 μm or more and 350 μm or less, and the distance between the second surface 102 and the sixth surface 106 ( The substrate length Lsub) may be 200 μm or more and 300 μm or less, and the distance between the first surface 101 and the fifth surface 105 (substrate height Hsub) may be 100 μm or more and 200 μm or less.

  The first notch 113a is a concave portion formed in a portion where the second surface 102 and the ninth surface 103b are adjacent to each other. The second notch 113b is a concave portion formed in a portion where the second surface 102 and the tenth surface 104b are adjacent to each other. The first notch 113a and the second notch 113b have a curved surface 115a and a flat surface 107a, and a curved surface 115b and a flat surface 107b, respectively.

  In the present embodiment, the submount 100a has a first metal film 121 arranged on the first surface 101 and a solder film 116. A strip-shaped metal film removal portion 117 extending in the first direction D1 is formed on the first metal film 121. The first metal film 121, the solder film 116, and the metal film removing portion 117 have the same configurations as those in the first embodiment.

  In addition, the submount 100a has a second metal film 122 arranged on the second surface 102. This allows the second surface 102 of the substrate 110 to be joined to another member via solder or the like. The second metal film 122 is also formed on the first cutout portion 113a and the second cutout portion 113b, but is not formed on the ninth surface 103b and the tenth surface 104b. .. In other words, the surface of the substrate 110 of the first notch 113a and the second notch 113b is covered with the second metal film 122, but the ninth surface 103b and the tenth surface 104b are not covered. Are exposed from the second metal film 122. The configuration of the second metal film 122 is not particularly limited. The second metal film 122 may have the same configuration as the first metal film 121, for example.

[3-2. Outline of semiconductor laser device]
Next, an outline of the semiconductor laser device according to the present embodiment will be described. Hereinafter, a semiconductor laser device using the submount 100a will be described with reference to the drawings.

  FIG. 18 is a perspective view showing an outline of the semiconductor laser device 151a according to the present embodiment. As shown in FIG. 18, the semiconductor laser device 151a according to the present embodiment is bonded to the submount 100a and the first surface 101 of the submount 100a via the solder film 116 as in the first embodiment. Semiconductor laser chip 152.

  The semiconductor laser chip 152 is similar to the semiconductor laser chip used in the first embodiment. The emitting surface 153 of the semiconductor laser chip 152 is arranged on the second surface 102 side of the submount 100a.

[3-3. Submount manufacturing method]
Next, a method of manufacturing the submount 100a according to this embodiment described above will be described. Hereinafter, a method of manufacturing the submount 100a using a silicon wafer as a base material will be described with reference to the drawings.

  A silicon wafer 201 is prepared. Ordinary photolithography and dry etching are performed on the silicon wafer 201 to form a plurality of through grooves 202b as shown in FIG. FIG. 19 is a plan view showing a state of the silicon wafer 201 according to the present embodiment after the etching process. Each of the through-grooves 202b has a flat surface on one side surface, and a recess 203 is formed on the other side surface. The concave portion 203 is formed at a position corresponding to the cutout portion of the submount when the silicon wafer 201 is divided into individual pieces. The groove width Wg is about 200 μm or more and 300 μm or less. The distance (corresponding to the length of the submount after separation) Lsub between adjacent through grooves 202a is about 200 μm or more and 300 μm or less. The through-grooves 202b form the second surface 102 and the sixth surface 106 of the substrate 110 of the submount 100. A recess 203 is formed on the side surface of the through groove 202b on the side that becomes the second surface 102.

  What is different from the second embodiment is the shape of the concave portion 203. In the third embodiment, as shown in FIG. 23, the concave portion 203 is formed in the first concave portion 203a having the first opening width h on the side surface of the through groove 202b and the bottom portion of the first concave portion 203a. A second recess 203b having a second opening width c smaller than the first opening width h is provided.

  In the first recess 203a, the first opening width h on the side surface of the through groove 202b is about 80 μm, and the distance f from the side surface of the through groove 202b to the bottom surface of the first recess 203a is about 10 μm or more and about 20 μm or less. Is. In the second recess 203b, the second opening width c in the first recess 203a is about 10 μm or more and 30 μm or less, and the distance e from the bottom surface of the first recess 203a to the bottom surface of the second recess 203b is It is about four times the second opening width c. When the second opening width c is 20 μm, the distance g from the side surface of the through groove 202a (the second surface 102 of the submount) to the bottom surface of the second recess 203b is about 90 μm or more and 100 μm or less. The second opening width c and the distance e do not depend on the length Lsub of the submount after being divided into individual pieces.

  After forming the through groove 202b, as shown in FIG. 20, a first metal film 121 and a second metal film 122 are formed on the upper surface of the silicon wafer 201 and the side surface of the through groove 202b on the side where the recess 203 is formed. .. Similar to the first embodiment, the first metal film 121 and the second metal film 122 are formed at desired positions with desired thickness by vapor deposition or sputtering of metal from the oblique direction of the through groove 202b. The film thickness of the first metal film 121 and the second metal film 122 is about 0.2 μm or more and 1.0 μm or less. At this time, the second metal film 122 is formed on the surface of the first recess 203a, but is not formed on the surface of the second recess 203b. This is because the opening width c of the second recess 203b is designed to be sufficiently small so that the second metal film 122 does not enter the second recess 203b.

  Subsequently, the solder film 116 having a film thickness of about 2.0 μm is formed on the first metal film 121. The first metal film 121, the second metal film 122, and the solder film 116 are formed by a sputtering method or an electron beam evaporation method.

  Next, a step of dividing the silicon wafer 201 into individual pieces will be described. In this embodiment mode, the laser beam for processing is applied to the dividing position of the silicon wafer 201 to form the modified region, and then the silicon wafer 201 is expanded to divide the silicon wafer 201. That is, the silicon wafer 201 is divided by stealth dicing. Such an individualizing step according to the present embodiment will be described with reference to the drawings.

  FIG. 21 is a plan view showing the modified region 211 of the silicon wafer 201 according to this embodiment. FIG. 22 is a cross-sectional view showing a step of dividing the silicon wafer 201 according to this embodiment into individual pieces. In FIG. 22, the AA cross section of FIG. 21 is shown. Note that FIG. 22 shows the metal film 221 formed on the main surface of the silicon wafer 201. The metal film 221 includes the first metal film 121 and the solder film 116.

  As shown in FIG. 21, the modified region 211 is formed on the line that extends in the vertical direction from the region where the second concave portion 203b is formed toward the adjacent through groove 202b, at a position that is a dividing plane in the silicon wafer 201. It is formed. More specifically, the modified region 211 including minute cracks is formed at a position corresponding to the seventh surface 103a and the eighth surface 104a on the substrate 110a of the submount 100a.

  As shown in FIG. 22, the modified region 211 is formed by irradiating the silicon wafer 201 with the processing laser 302 from the lower surface of the silicon wafer 201 (that is, the surface corresponding to the fifth surface of the substrate 110a). It That is, the irradiation position 303 of the processing laser 302 becomes the modified region 211. The processing laser 302 is a laser having a wavelength that passes through the silicon wafer 201, and may have sufficient power to form the modified region 211. The surface roughness (arithmetic mean roughness Ra) of the lower surface of the silicon wafer 201 in FIG. 22 corresponding to the fifth surface 105 is 0.2 μm or less, and silicon that is a material forming the substrate 110a is Exposed. As a result, it is possible to suppress the scattering of the processing laser on the incident surface of the silicon wafer 201, so that the cutting quality can be further improved.

  After forming the modified region 211 on the silicon wafer 201, the tape material 306 attached to the silicon wafer 201 is stretched. Here, since cracks are formed in the modified regions 211 by the processing laser 302, the silicon wafer 201 can be divided into the modified regions 211 when the tape material 306 is stretched. Since the second metal film does not exist on the dividing line, the substrate 110a can be formed by extending the tape material 306. As described above, each modified region 211 is formed on the seventh surface 103a and the eighth surface 104a of the substrate 110a.

  FIG. 23 is a plan view showing the shape of the silicon wafer 201 according to this embodiment. As shown in FIG. 23, the first recess 203a of the silicon wafer 201 has a parallel surface 407 parallel to the surface of the substrate 110a which becomes the second surface 102, and a curved surface 408. The opening width c of the second recess 203b is larger than the variation width b of the irradiation position of the processing laser. The variation width b of the irradiation position of the processing laser is about 10 μm. The force applied to the silicon wafer 201 when the processing wafer is irradiated with the processing laser to divide the silicon wafer 201 having the first concave portion 203a will be described with reference to the drawings.

  FIG. 24 is a plan view showing a force applied to the silicon wafer 201 when the silicon wafer 201 on which the modified region 211 according to the present embodiment is formed is divided. FIG. 25 is a plan view showing a state where the silicon wafer 201 according to the present embodiment is divided into the substrates 110a.

  As shown in FIG. 24, when the silicon wafer 201 on which the modified region 211 composed of the irradiation position 303 of the processing laser is formed is expanded in the horizontal direction (left and right direction on the paper surface) of FIG. A force is applied to the vicinity of the first concave portion 203a and the second concave portion 203b in the direction indicated by the arrow. Here, since minute cracks are formed in the modified region 211, the silicon wafer 201 is divided along the modified region 211, as shown in FIG. Particularly, in the present embodiment, as described above, since the second recess 203b extending from the first recess 203a is formed, it is possible to prevent the silicon wafer 201 from being divided along the curved surface 408 other than the parallel surface 407. it can. Further, since the second metal film is not formed at all in the second recess 203b, it is possible to suppress the tensile force from being concentrated on a specific position. Therefore, the silicon wafer 201 can be divided along the surface along the modified region 211. That is, in the present embodiment, it is possible to realize the submount 100a in which the position accuracy of the dividing plane and the flatness of the dividing plane are good.

  In this embodiment, the substrate 110a of the submount 100a has a first cutout 113a and a second cutout 113b corresponding to the first recess 203a of the silicon wafer 201. The first notch 113a and the second notch 113b have flat surfaces 107a and 107b corresponding to the parallel surfaces 407 of the silicon wafer 201, respectively. That is, the submount 100a has a flat surface 107a that is substantially parallel to the second surface 102 in the vicinity of the third surface 103 in the first cutout portion 113a. Further, the submount 100a has a flat surface 107b that is substantially parallel to the second surface 102 in the vicinity of the fourth surface 104 in the second cutout portion 113b.

  When the submount 100a has the second concave portion 203b that is not covered with the second metal film, the irradiation position of the processing laser varies when the submount 100 is formed by dividing the silicon wafer 201. Moreover, it is possible to suppress the division at positions other than the planes 107a and 107b. That is, it is possible to realize the submount 100 in which the accuracy of the position of the dividing plane and the flatness of the dividing plane are good.

  In the present embodiment, the length of the planes 107a and 107b in the horizontal direction of FIG. 25 is about 10 μm. The length may be 5 μm or more. Further, the seventh surface 103a and the ninth surface 103b are parallel surfaces, and the distance d of the extension line thereof may be approximately 5 μm or more and 20 μm or less. The eighth surface 104a and the tenth surface 104b are parallel surfaces, and the distance d of the extended line may be about 5 μm or more and 20 μm or less.

  Further, the first notch 113a and the second notch 113b have curved surfaces 115a and 115b corresponding to the curved surface 408 of the silicon wafer 201, respectively. In the present embodiment, the curved surfaces 115a and 115b have an arc shape when viewed in plan from the first surface 101 side of the submount 100a. That is, the shape of the cross section of the curved surfaces 115a and 115b parallel to the first surface 101 is an arc shape.

  The submount 100a formed by the above steps will be described with reference to the drawings. FIG. 26 is a perspective view showing the configuration of the submount 100a according to this embodiment.

  In the seventh surface 103a of the submount 100a shown in FIG. 26, the outer edge portion 112 on the ninth surface 103b side, the fifth surface 105 side, and the sixth surface 106 side is modified by the processing laser 302. Not in the area. On the other hand, on the seventh surface 103a, the inner region 111 of the outer edge portion 112 is a region modified by the processing laser 302. Here, the surface roughness of the outer edge portion 112 not modified by the processing laser is smaller than the surface roughness of the inner region 111. In the present embodiment, the surface roughness (Ra) of inner region 111 is approximately 1.0 μm or less, and the surface roughness (Ra) of outer edge portion 112 is approximately 0.2 μm or less. As described above, according to the method of manufacturing the submount 100a according to the present embodiment, it is possible to reduce the surface roughness of the seventh surface 103a and the eighth surface 104a corresponding to the dividing plane in the individualization. .. Although not shown, the eighth surface 104a also has an outer edge portion 112 and an inner area 111, similarly to the seventh surface 103a.

  The surface roughness of the seventh surface 103a and the eighth surface 104a divided by the stealth dicing as described above is the same as the second surface 102, the ninth surface 103b, and the tenth surface formed by etching. Rougher than the surface roughness of 104b.

  In addition, in the present embodiment, the first surface 101 is a Si (100) surface. The second surface 102 is the Si (011) surface, the seventh surface 103a is the Si (0-11) surface, the ninth surface 103b is the Si (0-11) surface, and the eighth surface 104a. Is the (01-1) plane of Si, the tenth surface 104b is the (01-1) plane of Si, the second surface 102 is the (010) plane of Si, and the seventh surface 103a is the ( The (001) plane and the ninth plane 103b are Si (001) planes, the eighth plane 104a is the (00-1) plane of Si, and the tenth plane 104b is the (00-1) plane of Si. Thereby, the dividing direction by the stealth dicing can be made to correspond to the crystal orientation of Si, which is the material of the substrate 110. Therefore, the dividing quality can be further improved.

  Further, similarly to the first embodiment, the present disclosure also includes a thermally assisted hard disk device including the submount according to the third embodiment, the semiconductor laser chip 152, and the slider 602.

  Further, in each submount according to the above-described embodiment, the cross section of the first cutout portion 113a and the second cutout portion 113b that is parallel to the first surface 101 is from the first surface 101 side to the fifth surface. The shape is substantially similar to the surface 105 side. The shape of the curved surface in the notch structure is not necessarily limited to the arc shape in cross section. For example, the shape of the curved surface may be a curved surface having a parabolic cross section.

  Further, in each submount according to the above-described embodiment, the material forming the substrate 110 of the submount 100 is not limited to silicon. For example, the substrate 110 may be formed of silicon, glass, or silicon carbide.

  In addition, in the method of manufacturing each submount according to the above-described embodiment, the first metal film 121 and the second metal film 122 are formed at the same time, but the first metal film 121 is penetrated into the silicon wafer 201. After forming the grooves 202, 202a, and 202b, a second metal film may be formed separately from the first metal film 121. Further, the through grooves 202, 202a, 202b may be formed in the silicon wafer 201 on which the first metal film 121 and the solder film 116 are formed.

  The submount according to the present disclosure can be particularly used in a semiconductor laser device and a thermally assisted hard disk device that require a bonding strength with a semiconductor laser chip.

100, 100a Submount 101 1st surface 102 2nd surface 103 3rd surface 103a 7th surface 103b 9th surface 104 4th surface 104a 8th surface 104b 10th surface
105 fifth surface 106 sixth surface 107a, 107b flat surface 110, 110a substrate 111 inner region 112 outer edge portion 113a first cutout portion 113b second cutout portion 115a, 115b curved surface 116 solder film 117 metal film removal portion 121 first metal film 122 second metal film 151, 151a semiconductor laser device 152 semiconductor laser chip 153 emission surface 201 silicon wafer 202, 202a, 202b through groove 203 recess 203a first recess 203b second recess 211 modification Area 221 Metal film 222 Protective film 302 Processing laser 303 Irradiation position 306 Tape material 407 Parallel surface 408 Curved surface 600 Heat-assisted hard disk device 602 Slider 603 Suspension 604 Disk D1 First direction a Parallel surface width b Addition Of laser irradiation position c Opening width of second recess d Step e Depth of second recess f Depth of first recess g Distance from second surface to end of second recess h h Opening width of concave part 1

Claims (8)

A submount comprising a substrate having a first surface on which an element is mounted, the submount comprising:
The substrate is
A second surface that is arranged in a first direction that is an in-plane direction of the first surface and that is substantially perpendicular to the first surface;
A third surface substantially perpendicular to the first surface and the second surface,
A fourth surface which is substantially perpendicular to the first surface and the second surface and which faces the third surface;
A fifth surface that is substantially perpendicular to the second surface, the third surface, and the fourth surface, and that faces the first surface;
A sixth surface facing the second surface;
A first notch formed in a portion where the second surface and the third surface are adjacent to each other;
A second notch formed in a portion where the second surface and the fourth surface are adjacent to each other;
A first metal film disposed on the first surface;
A second metal film disposed on the second surface,
The submount, wherein the second metal film is not disposed on the first cutout portion and the second cutout portion. A method for manufacturing a submount having a cutout portion on a ridge line portion of a first surface and a second surface,
A first surface forming step of forming a first surface including the flat side surface by forming a groove having a flat side surface on the wafer substrate;
A metal film forming step of forming a metal film on the first surface after the first surface forming step,
A recess forming step of forming a recess on the first surface after the metal film forming step,
After the recess forming step, in the recess, a cutting step of cutting the wafer substrate,
In the cutting step, the second surface is formed, and the cutout portion exposed from the metal film is formed at the ridgeline portions of the first surface and the second surface. Method. A method for manufacturing a submount having a cutout portion on a ridge line portion of a first surface and a second surface,
A first surface forming step of forming a first surface including the flat side surface by forming a groove having a flat side surface and a concave portion recessed from the flat side surface on the wafer substrate;
A protective film forming step of exposing the flat side surface and forming a protective film in the recess after the first surface forming step;
A metal film forming step of forming a metal film on the flat side surface of the wafer substrate after the protective film forming step,
A protective film removing step of removing the protective film and exposing the recesses from the metal film after the metal film forming step;
After the protective film removing step, in the recess, a cutting step of cutting the wafer substrate,
In the cutting step, the second surface is formed, and the cutout portion exposed from the metal film is formed at the ridgeline portions of the first surface and the second surface. Method. A submount comprising a substrate having a first surface on which an element is mounted, the submount comprising:
The substrate is
A second surface that is arranged in a first direction that is an in-plane direction of the first surface and that is substantially perpendicular to the first surface;
A third surface substantially perpendicular to the first surface and the second surface,
A fourth surface which is substantially perpendicular to the first surface and the second surface and which faces the third surface;
A fifth surface that is substantially perpendicular to the second surface, the third surface, and the fourth surface, and that faces the first surface;
A sixth surface facing the second surface,
The third surface is located on the seventh surface adjacent to the sixth surface, and on the second surface side of the seventh surface on the fourth surface side of the seventh surface. A ninth surface substantially parallel to the seventh surface,
A submount having a first notch formed in a portion where the second surface and the ninth surface are adjacent to each other.   The 1st film | membrane is arrange | positioned at the said 1st surface, and the 2nd film | membrane is arrange | positioned at the said 2nd surface and the said 1st notch part, The claim 4 characterized by the above-mentioned. Submount.   The surface mount of the said 7th surface is larger than the surface roughness of the said 9th surface, The submount of Claim 4 or 5 characterized by the above-mentioned. The fourth surface is located on the eighth surface adjacent to the sixth surface, and on the second surface side of the eighth surface on the third surface side of the eighth surface. Has a tenth surface substantially parallel to the eighth surface,
The submount according to any one of claims 4 to 6, wherein the submount has a second notch formed in a portion where the second surface and the tenth surface are adjacent to each other. A method for manufacturing a submount having a cutout portion on a ridge line portion of a first surface and a second surface,
A first surface forming step of forming a first surface including the flat side surface by forming a groove having a flat side surface and a concave portion recessed from the flat side surface on the wafer substrate;
A metal film forming step of forming a metal film on the flat side surface after the first surface forming step;
After the metal film forming step, in the recess, a cutting step of cutting the wafer substrate,
The recess includes a first recess having a first opening width formed on the flat side surface and a second recess having a second opening width smaller than the first opening width formed at the bottom of the first recess. Have,
The method of manufacturing a submount, wherein the first surface is the flat side surface and the second surface is a side surface of the second recess.