JP2020037000A - Game machine - Google Patents

Abstract

To provide a game machine capable of suitably performing each kind of control.SOLUTION: Processing corresponding to specific control for progressing a game by utilizing a specific control program and specific control data stored in a main-side ROM 64 is performed by a main-side CPU 63, and processing corresponding to non-specific control for managing a game history by utilizing a non-specific control program and non-specific control data stored in the main-side ROM 64 is performed by the main-side CPU 63. The main-side RAM 65 includes: a specific control work area and a specific control stack area utilized when processing corresponding to specific control is executed; and a non-specific control work area and a non-specific control stack area utilized when processing corresponding to non-specific control is executed. When processing corresponding to non-specific control is started, a flag register in the main-side CPU 63 is cleared to "0".SELECTED DRAWING: Figure 6

Description

  The present invention relates to a gaming machine.

  Pachinko game machines and slot machines are known as game machines. For example, a pachinko game machine has a dish storage section for storing game balls given to a player on the front of the game machine, and the game balls stored in the dish storage section are guided to a game ball launching device. The game is fired toward the game area in accordance with the shooting operation of the player. Then, for example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the dish storage unit, for example. Also, in a pachinko gaming machine, a configuration having an upper dish storage section and a lower dish storage section as dish storage sections is known, and in this case, game balls stored in the upper dish storage section are used to launch game balls The game balls guided by the device and surplus in the upper dish storage section are discharged to the lower dish storage section (for example, see Patent Document 1).

  Further, in the slot machine, when a new game is started by operating the start lever while a medal is bet, a lottery process is executed by the control means. Further, when the lottery process is executed, the rotation of the reel is started by the rotation start control being executed by the control means, and when the stop button is operated during the rotation of the reel, the control means executes the rotation start control. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the rotation stop of the reels corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

JP 2009-261415 A

  Here, in the gaming machine as exemplified above, it is necessary to appropriately perform various controls, and there is still room for improvement in this regard.

  The present invention has been made in view of the above-described circumstances and the like, and has as its object to provide a gaming machine capable of suitably performing various controls.

In order to solve the above problems, the invention according to claim 1 includes a control unit that executes various processes and temporarily stores information in an internal storage unit when the processes are executed,
The control means,
A first predetermined process executing means for executing a first predetermined process among the various processes;
A second predetermined process executing means for executing a second predetermined process among the various processes;
A flag register provided in the internal storage means when the situation where the first predetermined processing is being executed is changed to the situation where the second predetermined processing is executed, or when the situation where the second predetermined processing is executed is changed. State setting means for setting the state of the specified state to a specific state;
It is characterized by having.

  According to the present invention, various controls can be suitably performed.

It is a perspective view showing the pachinko machine in a 1st embodiment. FIG. 2 is an exploded perspective view showing a main configuration of the pachinko machine. It is a front view showing the composition of a game board. It is an explanatory view for explaining a configuration related to discharge of a game ball flowing down a game area. It is a front view of a main control device. FIG. 2 is a block diagram illustrating an electrical configuration of the pachinko machine. It is explanatory drawing for demonstrating the content of various counters used for a success / failure lottery. FIG. 4 is an explanatory diagram for explaining various tables stored in a main ROM. 9 is a flowchart illustrating a main process executed by a main CPU. 9 is a flowchart illustrating a setting value update process executed by a main CPU. 9 is a flowchart illustrating a timer interrupt process executed by a main CPU. It is a flowchart which shows the special figure special electric power control processing performed by a main side CPU. It is a flowchart which shows the special figure fluctuation | variation start process performed by a main side CPU. FIG. 9 is an explanatory diagram for describing a configuration in which a detection result of a ball-input detection sensor is input to a main CPU. It is a flowchart which shows the incoming ball detection process performed by the main side CPU. It is a block diagram for explaining an electrical configuration of a payout control device and various devices that communicate with the payout control device. It is a flowchart which shows the timer interruption process performed by a payout side CPU. FIG. 3 is a block diagram for describing an electrical configuration of a management IC. FIG. 3 is an explanatory diagram for describing a configuration of an input port of a management-side I / F. FIG. 4 is an explanatory diagram for describing a configuration of a correspondence memory. FIG. 4 is an explanatory diagram for describing a configuration of a history memory. 9 is a flowchart illustrating a recognition process executed by a main CPU. 9 is a flowchart illustrating a management process executed by the management CPU. (A)-(d) It is a time chart which shows a mode that the information of the correspondence of the 1st-15th buffer and the kind of signal is stored in the memory for correspondence. 9 is a flowchart illustrating a management output process executed by a main CPU. 9 is a flowchart illustrating a history setting process executed by the management CPU. 6A to 6E are time charts showing how history information is stored in a history memory. 9 is a flowchart illustrating a process of outputting a set value update signal executed by a main CPU. 9 is a flowchart illustrating a setting update recognition process executed by a management CPU. 9 is a flowchart illustrating a display output process executed by the management CPU. 9 is a flowchart illustrating a display process executed by the management CPU. It is a flowchart which shows the processing for data output performed by (a) main CPU, and (b) is a flowchart which shows the processing for external output performed by management side CPU. FIG. 11 is an explanatory diagram for describing various tables stored in a main ROM according to the second embodiment. It is an explanatory view for explaining the composition of the memory for another storage in a 3rd embodiment. 9 is a flowchart illustrating a setting update recognition process executed by a management CPU. 9 is a flowchart illustrating a repetitive change monitoring process executed by a management CPU. It is a flowchart which shows the monitoring process of the repetition change performed by the main CPU in 4th Embodiment. It is a flowchart which shows the process for setting update recognition performed by the management side CPU in 5th Embodiment. It is an explanatory view for explaining the composition of the memory for the history in a 6th embodiment. 9 is a flowchart illustrating a history setting process executed by the management CPU. 9 is a flowchart illustrating a setting update recognition process executed by a management CPU. It is an explanatory view for explaining the composition of the history memory in a 7th embodiment. 9 is a flowchart illustrating a setting update recognition process executed by a management CPU. It is an explanatory view for explaining the composition of the memory for history in an 8th embodiment. 9 is a flowchart illustrating a setting update recognition process executed by a management CPU. 9 is a flowchart illustrating a history setting process executed by the management CPU. 9 is a flowchart illustrating a display output process executed by the management CPU. It is an explanatory view for explaining the composition of the input port of the management side I / F in a ninth embodiment. 9 is a flowchart illustrating a recognition process executed by a main CPU. 9 is a flowchart illustrating a management process executed by the management CPU. (A)-(h) It is a time chart which shows a mode that the information of the correspondence of the 1st-12th buffer and the kind of signal is stored in the memory for correspondence. It is a block diagram for explaining composition of a signal path which transmits a detection result of each ball detection sensor in a 10th embodiment to a main CPU and a management IC. It is a front view of the main control unit in an eleventh embodiment. FIG. 5 is a block diagram for explaining an electrical configuration for performing various displays on first to fourth notification display devices based on control of an MPU. 9 is a flowchart illustrating a display process executed by the management CPU. 9 is a flowchart illustrating a setting value update process executed by a main CPU. (A) It is explanatory drawing for demonstrating the display mode of the 1st-4th notification display apparatus when the management result of a game history is displayed, (b) When the setting state of a pachinko machine is changed It is explanatory drawing for demonstrating the display mode of the display apparatus for 1st-4th information. (A)-(h) It is a time chart which shows a mode that the 1st-4th information display apparatuses are in a display state. (A) It is explanatory drawing for demonstrating the structure of the 1st notification display apparatus in 12th Embodiment, (b) It is explanatory drawing for demonstrating the structure of a 2nd notification display device. A first notification display device for displaying the management result of the game history on the first to fourth notification display devices and displaying a changeable state in which the setting state of the pachinko machine can be changed. FIG. 7 is an explanatory diagram for explaining display contents of a second notification display device. 9 is a flowchart illustrating a setting value update process executed by a main CPU. It is an explanatory view for explaining composition of an abnormal display area in a 13th embodiment. 9 is a flowchart illustrating an abnormality setting process executed by the main CPU. 9 is a flowchart illustrating an abnormality display process executed by the main CPU. It is a flowchart which shows the output process for management performed by the main side CPU in 14th Embodiment. It is a flowchart which shows the main process performed by the main CPU in another form. FIG. 41 is an explanatory diagram for describing a setting mode of a program and data of a main ROM in a fifteenth embodiment. FIG. 4 is an explanatory diagram for explaining a setting mode of each area in a main RAM. 9 is a flowchart illustrating a timer interrupt process executed by a main CPU. 9 is a flowchart illustrating management processing executed by a main CPU. It is a flowchart which shows the management execution process performed by the main CPU. It is an explanatory view for explaining various areas of a work area for non-specific control used for managing a game history. 9 is a flowchart illustrating a check process executed by a main CPU. It is a flowchart which shows the normal ball entry management process performed by the main CPU. 9 is a flowchart illustrating a result calculation process executed by a main CPU. 6 is a flowchart illustrating a display process executed by a main CPU. It is a flow chart which shows the processing for management performed by the main side CPU in a 16th embodiment. It is a flow chart which shows management execution processing performed by main side CPU in a 17th embodiment. It is a flow chart which shows management execution processing performed by main side CPU in an 18th embodiment. It is a flow chart which shows management execution processing performed by a main side CPU in a 19th embodiment. It is a flow chart which shows the processing for management performed by the main side CPU in a 20th embodiment. It is a flowchart which shows the management execution process performed by the main CPU. FIG. 41 is an explanatory diagram for describing an electrical configuration in a twenty-first embodiment. It is a flow chart which shows the main processing performed by the main side CPU in a 22nd embodiment. 9 is a flowchart illustrating a setting value update process executed by a main CPU. 9 is a flowchart illustrating a timer interrupt process executed by a main CPU. 9 is a flowchart illustrating a setting confirmation process executed by a main CPU. 9 is a flowchart illustrating a RAM monitoring process executed by a main CPU. It is a flowchart which shows the main process performed by the main CPU in another form. It is a flowchart which shows the setting value update process performed by the main side CPU in another form. It is a flow chart which shows the main processing performed by the main side CPU in a 23rd embodiment. It is a flowchart showing a RAM monitoring process executed by the main CPU according to the twenty-fourth embodiment. 35 is a flowchart illustrating a RAM monitoring process executed by the main CPU according to the twenty-fifth embodiment. It is a flowchart which shows the management execution process performed by the main CPU. 9 is a flowchart illustrating another monitoring process executed by the main CPU. 35 is a flowchart illustrating a management process executed by the main CPU according to the twenty-sixth embodiment. It is a flow chart which shows the processing for management performed by the main side CPU in a 27th embodiment. It is a flow chart which shows the processing for management performed by the main side CPU in a 28th embodiment. It is a flow chart which shows the processing for management performed by the main side CPU in a 29th embodiment. It is a flow chart which shows the main processing performed by the main side CPU in a 30th embodiment. It is a flowchart which shows the power failure information storage processing performed by the main CPU. 2A is a block diagram for explaining the configuration of the MPU, and FIG. 2B is a time chart showing a state of outputting a reset signal by a reset signal output unit. 9 is a flowchart illustrating a timer interrupt process executed by a main CPU. 9 is a flowchart illustrating a setting monitoring process executed by a main CPU. 9 is a flowchart illustrating management processing executed by a main CPU. It is a flowchart which shows the management execution process performed by the main CPU. 9 is a flowchart illustrating another monitoring process executed by the main CPU. It is a flow chart which shows the main processing performed by the main side CPU in a 31st embodiment. It is a flowchart which shows the clear process at the time of abnormality performed by a main side CPU. 9 is a flowchart illustrating a clear process for non-specific control executed by a main CPU. It is a flow chart which shows power failure information storage processing performed by the main side CPU in a 32nd embodiment. 9 is a flowchart showing a checksum monitoring process executed by the main CPU. 9 is a flowchart illustrating a clear process for non-specific control executed by a main CPU. It is a flow chart which shows the main processing performed by the main side CPU in a 33rd embodiment. 9 is a flowchart illustrating a setting confirmation process executed by a main CPU. 9 is a flowchart illustrating a setting value update process executed by a main CPU. 9 is a flowchart illustrating a first timer interrupt process executed by a main CPU. 9 is a flowchart illustrating a setting monitoring process executed by a main CPU. FIG. 3 is a block diagram for describing a configuration for controlling display of various display circuits by a main CPU. (A) It is explanatory drawing for demonstrating the various buffers provided in the work area for specific control, (b) It is explanatory drawing for demonstrating the various storage areas provided in the work area for non-specific control. is there. FIG. 3 is an explanatory diagram for describing an electrical configuration of a display IC. (A) to (g) show that the type data and the display data are transmitted from the main CPU to the display IC, and the display data transmitted from the display IC is received by the first display circuit or the second display circuit. It is a time chart. 9 is a flowchart illustrating a second timer interrupt process executed by the main CPU. (A) It is explanatory drawing for demonstrating the display content of the 1st-4th notification display apparatus in the situation in which a setting value is updated, (b) The 1st-4th notification in the situation in which a setting value is confirmed. FIG. 4 is an explanatory diagram for explaining display contents of a display device for use. It is a flow chart which shows the setting value update processing performed by the main side CPU in a 34th embodiment.

<First embodiment>
Hereinafter, a first embodiment of a pachinko gaming machine (hereinafter, referred to as a “pachinko machine”) that is a type of gaming machine will be described in detail with reference to the drawings. FIG. 1 is a perspective view of the pachinko machine 10, and FIG. 2 is an exploded perspective view showing a main configuration of the pachinko machine 10. 2, the configuration of the pachinko machine 10 in the game area PA is omitted for convenience.

  As shown in FIG. 1, the pachinko machine 10 includes an outer frame 11 forming an outer shell of the pachinko machine 10, and a gaming machine main body 12 rotatably attached to the outer frame 11 forward. Have. The outer frame 11 is formed by connecting a wooden plate to four sides, and has a rectangular frame shape. The pachinko machine 10 is installed in a game hall by attaching and fixing the outer frame 11 to island facilities. In the pachinko machine 10, the outer frame 11 is not an indispensable configuration, but may be a configuration in which the outer frame 11 is provided in an island facility of a game hall.

  As shown in FIG. 2, the gaming machine main body 12 includes an inner frame 13, a front door frame 14 arranged in front of the inner frame 13, and a back pack unit 15 arranged behind the inner frame 13. ing. The inner frame 13 of the gaming machine main body 12 is rotatably supported by the outer frame 11. More specifically, the inner frame 13 is rotatable forward with the left side being a rotation base end side and the right side being a rotation end side in a front view.

  A front door frame 14 is rotatably supported by the inner frame 13. The front door frame 14 is rotatable forward with the left side being a rotation base end side and the right side being a rotation tip side in a front view. A back pack unit 15 is rotatably supported by the inner frame 13, and is rotatable rearward with the left side as the rotation base end side and the right side as the rotation front end side in front view.

  The gaming machine main body 12 is provided with a locking device at the tip end of its rotation, and has a function of locking the gaming machine main body 12 so that it cannot be opened with respect to the outer frame 11. The door frame 14 has a function of locking the inner frame 13 so that the door frame 14 cannot be opened. Each of these locked states is released by performing an unlocking operation using an unlocking key on a cylinder lock 17 provided to be exposed on the front of the pachinko machine 10.

  Next, the configuration of the front side of the gaming machine main body 12 will be described.

  The inner frame 13 is mainly composed of a resin base 21 whose outer shape is substantially the same as the outer frame 11. A substantially elliptical window hole 23 is formed in the center of the resin base 21. A game board 24 is detachably attached to the resin base 21. The game board 24 is made of plywood, and a game area PA formed on the front face of the game board 24 is exposed to the front side of the inner frame 13 through the window hole 23 of the resin base 21.

  Here, the configuration of the game board 24 will be described with reference to FIG. FIG. 3 is a front view of the game board 24.

  An inner rail portion 25 and an outer rail portion 26 are attached to the game board 24 so as to partition a part of an outer edge of the game area PA, and the inner rail portion 25 and the outer rail portion 26 provide guidance means. As a guide rail. A game ball fired from a game ball firing mechanism 27 (see FIG. 2) attached below the window hole 23 in the resin base 21 is guided to an upper portion of the game area PA by a guide rail.

  Incidentally, the game ball launching mechanism 27 includes a launch rail 27a extending toward the guide rail, a ball feeder 27b that supplies game balls stored in an upper plate 55a to be described later onto the launch rail 27a, and a launch rail 27a. And a solenoid 27c which is an electric actuator for firing the game ball supplied to the guide rail toward the guide rail. When the firing operation device (or operation handle) 28 provided on the front door frame 14 is rotated, the drive of the solenoid 27c is controlled, and a game ball is fired.

  The game board 24 has a plurality of large and small openings penetrating in the front-rear direction. Each opening is provided with a general winning opening 31, a special electric winning device 32, a first operating opening 33, a second operating opening 34, a through gate 35, a variable display unit 36, a special drawing unit 37, a general drawing unit 38, and the like. ing. A total of four general winning ports 31 are provided, and one each other is provided.

  Even if a ball enters the through gate 35, the payout of the game ball is not executed. On the other hand, when balls enter the general winning opening 31, the special power winning device 32, the first operating opening 33, and the second operating opening 34, a predetermined number of game balls are paid out. More specifically, the number of prize balls is determined when one game ball enters the first operation port 33 or when one game ball enters the second operation port 34. In the case where one prize ball is paid out and one game ball enters the general winning opening 31, 10 prize balls are paid out and the special electric prize winning device 32 is executed. When one of the game balls enters, the payout of 15 prize balls is executed.

  The number of prize balls is arbitrary. For example, the second operation port 34 may have a smaller number of prize balls than the first operation port 33, and the second operation port 34 may have the first operation port. The number of award balls may be larger than 33.

  In addition, an out port 24a is provided at the lowermost portion of the game board 24, and game balls that have not entered various winning ports are discharged from the game area PA through the out port 24a. In addition, a large number of nails 24b are planted on the game board 24 for appropriately dispersing and adjusting the falling direction of the game ball, and various members such as a windmill are provided.

  Here, entering the ball means that the game ball passes through a predetermined opening, and is not limited to the mode of being discharged from the game area PA after passing through the opening, but also from the game area PA after passing through the opening. A mode in which the game area PA continues to flow down without being discharged is also included. However, in the following description, the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34, and the through gate 35 are distinguished from each other in order to clearly distinguish game balls from entering the out opening 24a. Entering a game ball into is also referred to as winning.

  The first operation port 33 and the second operation port 34 are unitized as operation port devices and installed on the game board 24. The first operation port 33 and the second operation port 34 are both open upward. The two working ports 33 and 34 are arranged in the vertical direction such that the first working port 33 faces upward. The second operating port 34 is provided with a general electric part 34a as a guide piece composed of a pair of left and right movable pieces. The game ball cannot enter the second operation port 34 in the closed state of the general electric role object 34a, and the prize in the second operation port 34 becomes possible when the general electric role object 34a is opened.

  A through gate 35 is provided upstream of the second operation port 34 in the downflow direction of the game ball. The through gate 35 has a through hole (not shown) penetrating in the vertical direction, and a game ball that has won the through gate 35 flows down the game area PA after winning. Thereby, the game ball that has won the through gate 35 can win the second operating port 34.

  On the basis of the winning in the through gate 35, the general-purpose part 34a of the second operating port 34 is switched from the closed state to the open state. Specifically, an internal lottery is performed with a winning in the through gate 35 as a trigger, and a general-purpose display of a general-purpose unit 38 provided in a lower right corner which is an area where the game ball does not pass in the game area PA. The display of the pattern is changed in the section 38a. Then, when the result of the internal lottery is the electrification opening winning and the stop result corresponding to the result is displayed and the variable display on the ordinary figure display section 38a is ended, the state shifts to the ordinary electricity opening state. In the normal-power open state, the general-purpose part 34a is opened in a predetermined manner.

  In addition, the general-purpose display unit 38a is configured by a segment display in which a plurality of display segments by LEDs are arranged in a predetermined manner, but is not limited thereto. It may be constituted by other types of display devices such as a display device, a CRT or a dot matrix display. Further, as the pattern variably displayed on the ordinary figure display unit 38a, a configuration in which a plurality of types of characters are variably displayed, a configuration in which a plurality of types of symbols are variably displayed, a configuration in which a plurality of types of characters are variably displayed, or A configuration in which a plurality of types of colors are switched and displayed may be considered.

  In the general-purpose unit 38, a general-purpose display display 38b is provided at a position adjacent to the general-purpose display 38a. The number of awarded game balls to the through gate 35 is retained up to a maximum of four, and the number of reserved balls is displayed by lighting the general-purpose reservation display section 38b.

  A lottery is performed with a winning in the first operating port 33 or the second operating port 34 as a trigger. The lottery result is clearly shown through the display effects on the symbol display device 41 of the special figure unit 37 and the variable display unit 36.

  More specifically, the special figure unit 37 is provided with a special figure display section 37a. The display area of the special figure display section 37a is smaller than the display surface 41a of the symbol display device 41. In the special figure display unit 37a, a change in the pattern or a predetermined display is performed by performing a lottery with a winning in the first operating port 33 or a winning in the second operating port 34 as a trigger. Then, a result corresponding to the lottery result is displayed. In addition, the special figure display unit 37a is configured by a segment display in which a plurality of display segments by LEDs are arranged in a predetermined mode, but is not limited thereto. It may be constituted by other types of display devices such as a display device, a CRT or a dot matrix display. Further, as a pattern displayed on the special figure display section 37a, a configuration in which a plurality of types of characters are displayed, a configuration in which a plurality of types of symbols are displayed, a configuration in which a plurality of types of characters are displayed, or a plurality of types of colors May be displayed.

  In the special figure unit 37, a special figure reservation display section 37b is provided at a position adjacent to the special figure display section 37a. The number of game balls winning in the first operation port 33 or the second operation port 34 is retained up to a maximum of four, and the reserved number is displayed by lighting the special figure reservation display section 37b.

  More specifically, the symbol display device 41 is configured as a liquid crystal display device having a liquid crystal display, and the display content is controlled by a display control device described later. The symbol display device 41 is not limited to a liquid crystal display device, but may be another display device having a display screen such as a plasma display device, an organic EL display device, or a CRT, and may be a dot matrix display device. You may.

  In the symbol display device 41, when a variable display or a predetermined display of a pattern is performed on the special figure display unit 37a based on a winning in the first operating port 33 or a winning in the second operating port 34, the symbol is displayed in accordance with the display. A variable display or a predetermined display is performed. For example, on the display surface 41a of the symbol display device 41, three symbol columns of an upper row, a middle row, and a lower row are set as a plurality of display areas, and a main number with “1” to “9” in each symbol row. The symbols are scrolled and displayed in an ascending or descending order. In this scroll display, first, scroll display in all the symbol rows is started, and the display is switched from the scroll display to the standby display in the order of the upper symbol row → the lower symbol row → the middle symbol row. The process is terminated in a state where the symbol is statically displayed. Then, in the game time in which the game result is a jackpot result, a predetermined combination of symbols is stopped and displayed on an active line set in advance on the display surface 41a of the symbol display device 41. Specifically, the same odd symbol combination is stopped and displayed when the most advantageous big hit result to be described later is obtained, and the same even symbol combination is stopped and displayed when the low-probability big hit result to be described later. When the winning combination is a low winning winning probability big hit result, the combination of the symbols which is not the same symbol combination but is not stopped and displayed when the result is not the low winning winning high probability big hit result is stopped and displayed.

  In addition, in the symbol display device 41, not only the display effect triggered by winning in the first operation port 33 or the second operation port 34, but also the display effect in the opening / closing execution mode to which the process shifts after winning is performed. Will be In addition, based on the winning of one of the operating ports 33, 34, the display is started on the special figure display unit 37a and the symbol display device 41, and a predetermined result is displayed and ended until one game is played. Equivalent to times. In addition, the mode of the variable display of the symbol in the symbol display device 41 is not limited to the above-mentioned one, and is arbitrary. The number of symbol columns, the direction of the variable display of the symbol in the symbol column, the number of symbols in each symbol column, etc. Can be changed as appropriate. Further, the pattern variably displayed on the symbol display device 41 is not limited to the above-described symbol, and for example, a configuration in which only numbers are variably displayed as the symbol may be employed.

  If a win is won by a lottery based on a prize in the first operating port 33 or a prize in the second operating port 34, the mode is shifted to an open / close execution mode in which a prize in the special electric prize device 32 is enabled. The special electric winning device 32 has a large winning opening (not shown) communicating with the back side of the game board 24 and an opening / closing door 32a for opening and closing the large winning opening. The opening / closing door 32a is arranged in one of a closed state and an open state. Specifically, the opening / closing door 32a is normally in a closed state in which game balls cannot be won, and is switched to an open state in which game balls can be won when a transition to the open / close execution mode is won in the internal lottery. It has become. Incidentally, the open / close execution mode is a mode to which a shift is made when a winning result is obtained. In the closed state, a prize is not impossible, but a prize may be less likely to occur than in the open state.

  FIG. 4 is an explanatory diagram for describing a configuration related to discharge of game balls flowing down the game area PA.

  As described above, a game ball that has entered any of the general winning opening 31, the special power winning device 32, the first operating opening 33, the second operating opening 34, and the out opening 24a is discharged from the gaming area PA. In other words, the game ball fired from the game ball firing mechanism 27 and flowing into the game area PA is one of the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34, and the out opening 24a. Is discharged from the game area PA by entering the ball. A game ball that has entered one of the general winning port 31, the special power winning device 32, the first operating port 33, the second operating port 34, and the out port 24a is guided to the back side of the gaming board 24.

  On the back surface of the game board 24, discharge passage portions 42 to 48 are formed corresponding to the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34, and the out opening 24a, respectively. . The game balls that have flowed into the discharge passages 42 to 48 flow down the discharge passages 42 to 48 that flow in, and are guided to the lower end of the game board 24 on the back side of the game board 24, and are discharged to a discharge ball collection unit (not shown). Collected. The game balls collected by the discharge ball collection unit are discharged to the ball circulation device of the island facility where the pachinko machine 10 is installed in the game hall.

  Various detection sensors 42a to 48a for detecting game balls are provided in the respective discharge passages 42 to 48. The discharge passages 42 to 48 and the detection sensors 42a to 48a will be described below. Since the four general winning openings 31 are provided as described above, there are discharge passage portions 42 to 44 corresponding to each of the four. In this case, one detection sensor 42a is provided for each of the first discharge passage 42 corresponding to the leftmost general winning opening 31 and the second discharge passage 43 corresponding to the general winning opening 31 adjacent to the right. 43a is provided. Specifically, the first winning opening detection sensor 42a is provided so that the detection range exists in the middle position of the first discharge passage portion 42, and the detection range is provided in the middle position of the second discharge passage portion 43. The second winning opening detection sensor 43a is provided so as to be present. The game ball that has entered the leftmost general winning opening 31 is detected by the first winning opening detection sensor 42a while passing through the first discharge passage section 42, and the game has entered the general winning opening 31 adjacent to the right. The ball is detected by the second winning opening detection sensor 43a while passing through the second discharge passage portion 43. Further, a third discharge passage portion 44 formed so as to join the two general winning openings 31 on the right side at an intermediate position is provided. The third discharge passage portion 44 has an entrance-side area corresponding to each of the two general winning openings 31 and has one exit-side area by merging the entrance-side areas in the middle. are doing. The third winning opening detection sensor 44a is provided so that the detection range exists at a position in the middle of the exit side region in the third discharge passage portion 44. A game ball entering one of the two right winning holes 31 on the right side is detected by the third winning opening detection sensor 44a while passing through the third discharge passage portion 44.

  A fourth discharge passage portion 45 is provided corresponding to the special electric winning device 32. A special power detection sensor 45a is provided so that a detection range exists at an intermediate position of the fourth discharge passage portion 45, and a game ball that has entered the special power winning device 32 passes through the fourth discharge passage portion 45. It is detected by the special electricity detection sensor 45a. A fifth discharge passage 46 is provided corresponding to the first operation port 33. The first working port detection sensor 46a is provided so that a detection range exists at an intermediate position of the fifth discharge passage section 46, and a game ball entering the first working port 33 passes through the fifth discharge passage section 46. It is detected by the first working port detection sensor 46a during the passage. A sixth discharge passage portion 47 is provided corresponding to the second operation port 34. A second operating port detection sensor 47a is provided so that a detection range exists at an intermediate position of the sixth discharging path section 47, and a game ball entering the second operating port 34 passes through the sixth discharging path section 47. In the middle of the passage, it is detected by the second working port detection sensor 47a. A seventh discharge passage portion 48 exists corresponding to the out port 24a. An out-mouth detection sensor 48a is provided so that a detection range exists at an intermediate position of the seventh discharge passage portion 48. A game ball that has entered the out-open portion 24a passes through the seventh discharge passage portion 48. It is detected by the out mouth detection sensor 48a.

  The game ball detected by any one of the various detection sensors 42a to 48a is not detected by any of the other detection sensors 42a to 48a. A gate detection sensor 49a is also provided for the through gate 35, and a game ball passing through the through gate 35 while flowing down the game area PA is detected by the gate detection sensor 49a.

  As each of the various detection sensors 42a to 49a, an electromagnetic induction type proximity sensor is used, but any sensor can be used as long as it can individually detect game balls. The various detection sensors 42a to 49a are electrically connected to a main control device 60 described later, and the detection results of the various detection sensors 42a to 49a are output to the main control device 60. Specifically, each of the detection sensors 42a to 49a outputs a LOW level signal when a game ball is not detected, and outputs an HI level signal when a game ball is detected. Note that the present invention is not limited to this, and the relationship between HI and LOW may be reversed.

  As shown in FIG. 2, the front door frame 14 is provided so as to cover the entire front side of the inner frame 13 in which the game board 24 having the above configuration is attached to the resin base 21. As shown in FIG. 1, the front door frame 14 is formed with a window portion 51 so that substantially the entire game area PA can be visually recognized from the front. The window 51 has a substantially elliptical shape, and a window panel 52 is fitted therein. The window panel 52 is formed of glass to be colorless and transparent, but is not limited to this. The window panel 52 may be formed of colorless and transparent by synthetic resin, and the game area PA is formed through the window panel 52 from the front of the pachinko machine 10. It may be formed colored and transparent as long as it is visible.

  Above the window 51, a display light emitting section 53 is provided. Further, a pair of left and right speaker units 54 for outputting a sound effect or the like according to a game state is provided. Below the window 51, an upper swelling portion 55 and a lower swelling portion 56 swelling toward the near side are vertically arranged side by side. An upper plate 55a that opens upward is provided inside the upper bulging portion 55, and a lower plate 56a that also opens upward is provided inside the lower bulging portion 56. The upper plate 55a has a function of temporarily storing game balls paid out from a payout device described later, and guiding the game balls to the game ball firing mechanism 27 side while aligning them in a line. The lower plate 56a has a function of storing surplus game balls in the upper plate 55a.

  Next, the configuration of the back side of the gaming machine main body 12 will be described.

  As shown in FIG. 2, a main control device 60 for controlling a main game is mounted on the back of the inner frame 13 (specifically, the game board 24). FIG. 5 is a front view of main controller 60.

  As shown in FIG. 5, the main control device 60 includes a main control board 61 housed in a board box 60a. An MPU 62 is mounted on an element mounting surface, which is one plate surface of the main control board 61. The board box 60a is formed transparent so that the MPU 62 housed in the board box 60a can be viewed from outside the board box 60a. Although the substrate box 60a is formed to be colorless and transparent, the substrate box 60a may be formed to be colored and transparent as long as the MPU 62 accommodated in the substrate box 60a can be viewed from the outside of the substrate box 60a. The main control device 60 is mounted on the back surface of the resin base 21 such that the opposing wall portion 60b facing the element mounting surface of the main control substrate 61 in the substrate box 60a faces the rear of the pachinko machine 10. Therefore, by opening the gaming machine main body 12 to the front of the pachinko machine 10 with respect to the outer frame 11 and exposing the back surface of the resin base 21, the opposing wall portion 60b of the board box 60a can be visually observed, and The MPU 62 can be viewed through the opposing wall 60b.

  The substrate box 60a is formed by combining a plurality of case bodies 60c in front and back. The plurality of case bodies 60c prevent the case bodies 60c from being separated from each other. Is provided. The plurality of coupling portions 60e are arranged in parallel on one side of the substantially rectangular parallelepiped substrate box 60a. Accordingly, even if the case body 60c is separated by breaking the part joint part 60e in a state in which the separation of the case body 60c is prevented using the part joint part 60e, another case By setting the portion 60e in the coupled state, it is possible to prevent the case body 60c from being separated again. Also, when the case body 60c is separated, the joint 60e is broken and traces thereof remain, so that it is possible to visually check the joint 60e to determine whether or not the case body 60c is illegally separated. It becomes possible. In addition, a sealing seal 60f is attached to one side of the substrate box 60a opposite to the side on which the connecting portions 60e are arranged side by side so as to straddle the boundary between the case bodies 60c. When the sealing seal 60f is peeled off, the adhesive layer remains on the case body 60c. This makes it possible to leave a trace of the sealing seal 60f peeled off when the case body 60c is separated.

  In the main control device 60 having the above configuration, the main control board 61 is owned by the administrator of the gaming hall to generate an opportunity to change the setting state of the pachinko machine 10 in the range from “Setting 1” to “Setting 6”. A setting key insertion section 68a in which a setting key is inserted and turned on; an update button 68b operated to sequentially change the setting state of the pachinko machine 10 after the setting key insertion section 68a is turned on; A reset button 68c operated to clear data in a main RAM 65 described later provided in the MPU 62 of the 60, a first to third notification display devices 69a to 69c for notifying the management result of the game history. , Are provided. A connection terminal of the external device is connected to the MPU 62 mounted on the main control board 61 so that the management result of the game history or the information (program and data) stored in the main ROM 64 is read by the external device. Terminal 68d for reading is provided. In addition, the setting state of the pachinko machine 10 is not limited to six stages of “Setting 1” to “Setting 6”, and is arbitrary as long as it is a plurality of stages.

  The setting key insertion section 68a, the update button 68b, the reset button 68c, the reading terminal 68d (that is, the MPU 62), and the first to third notification display devices 69a to 69c are all provided on the element mounting surface of the main control board 61. ing. The element mounting surface of the main control board 61 faces the facing wall 60b of the board box 60a as described above, but the setting key insertion section 68a, the update button 68b, the reset button 68c, and the reading terminal 68d face each other. It is not covered by the wall 60b. That is, areas facing the setting key insertion section 68a, the update button 68b, the reset button 68c, and the reading terminal 68d are formed as individual openings in the opposing wall section 60b. Thus, the setting key can be inserted into the setting key insertion portion 68a without the need to open the substrate box 60a, the update button 68b can be pressed, and the reset button 68c is pressed. It is possible to connect a connection terminal of an external device to the reading terminal 68d.

  When the setting key is inserted into the setting key insertion section 68a and rotated in a predetermined direction, the setting key insertion section 68a is turned on. By starting the supply of operating power to the pachinko machine 10 in that state (that is, by starting the supply of operating power to the MPU 62 of the main control device 60), the setting state of the pachinko machine 10 can be changed. It becomes a state that can be changed. Then, each time the update button 68b is pressed once in this state, the setting state of the pachinko machine 10 is changed one step at a time in the range of "Setting 1" to "Setting 6" in ascending order. When the update button 68b is operated in the state of "setting 6," the setting is updated to "setting 1." Further, the setting key inserted in the setting key insertion portion 68a is rotated from the ON operation position in the direction opposite to the predetermined direction to return to the initial position, thereby setting the setting key insertion portion 68a to the OFF position. Become. When the setting key insertion portion 68a is turned off, the changeable state ends, and the game can be performed with the state of the set value at that time. That is, even if the update button 68b is operated after the changeable state ends, the set value cannot be changed.

  The ON operation on the setting key insertion section 68a is valid only when the supply of operating power to the pachinko machine 10 is started (that is, when the supply of operating power to the MPU 62 of the main control device 60 is started). Therefore, even if the MPU 62 of the main control device 60 performs an ON operation on the setting key insertion section 68a after the processing at the start of the supply of the operating power is completed, the setting value cannot be changed.

  The setting state of the pachinko machine 10 determines the advantage per unit time in the pachinko machine 10, and the larger the value of “setting n” (n is an integer of “1” to “6”), the larger the value of n (that is, the larger the setting). The higher the value, the greater the advantage. Although details will be described later, there are a low probability mode in which the winning probability is relatively low and a high probability mode in which the winning probability is relatively high as the winning / rejecting lottery mode for determining the winning probability of the jackpot result, and the setting value is It is set so that the higher the value, the higher the winning probability of the jackpot result in the low probability mode. On the other hand, the winning probability of the jackpot result in the high probability mode is constant regardless of the setting value.

  The reset button 68c is operated to clear the data in the main RAM 65 as described above. However, in order to cause the data to be cleared, the operation power is supplied to the pachinko machine 10 while the reset button 68c is pressed. (That is, it is necessary to start supplying operating power to the MPU 62 of the main controller 60). The ON operation on the reset button 68c is valid only when the supply of operating power to the pachinko machine 10 is started (that is, when the supply of operating power to the MPU 62 of the main controller 60 is started). Therefore, even if the reset button 68c is pressed after the processing at the start of the supply of the operating power is completed in the MPU 62 of the main control device 60, the data in the main RAM 65 cannot be cleared.

  As described above, the connection terminal of the external device is connected to the read terminal 68d for reading the management result of the game history or the information (program and data) stored in the main ROM 64 by the external device. In order to perform external output to the pachinko machine 10, it is necessary to start supplying operating power to the pachinko machine 10 with the connection terminal of the external device connected to the reading terminal 68d (ie, the operation of the main control device 60 to the MPU 62). It is necessary to start supplying power). The connection of the external device to the reading terminal 68d is valid only when the supply of the operating power to the pachinko machine 10 is started (that is, when the supply of the operating power to the MPU 62 of the main controller 60 is started). Therefore, even if an external device is connected to the reading terminal 68d after the process at the start of supply of the operating power is completed in the MPU 62 of the main control device 60, no external output to the external device is performed.

  Each of the first to third notification display devices 69a to 69c is a segment display in which seven LED display segments are arranged. However, the present invention is not limited to this. It may be a light emitter, a liquid crystal display device, or an organic EL display. Each of the first to third notification display devices 69a to 69c is installed so that its display surface faces the direction in which the element mounting surface of the main control board 61 faces, and the first to third notification display devices 69a to 69c are formed by the opposed wall portion 60b of the board box 60a. Covered. In this case, since the substrate box 60a is formed to be transparent, the display surfaces of the first to third notification display devices 69a to 69c housed in the substrate box 60a can be viewed from outside the substrate box 60a. It becomes possible. Further, as described above, the main control device 60 is mounted on the back surface of the resin base 21 such that the opposing wall portion 60b facing the element mounting surface of the main control substrate 61 faces the rear of the pachinko machine 10 in the board box 60a. Therefore, when the gaming machine body 12 is opened to the front of the pachinko machine 10 with respect to the outer frame 11 and the back surface of the resin base 21 is exposed to the front of the pachinko machine 10, the first to third notification via the opposing wall 60b. The display surfaces of the display devices 69a to 69c can be visually observed.

  On the display surface of the first notification display device 69a, not only the numbers "0" to "9" but also various characters including alphabetic characters are displayed. On the other hand, in the second notification display device 69b and the third notification display device 69c, numbers “0” to “9” are displayed. The management results of the game history are notified using the first to third notification display devices 69a to 69c, and the notification contents will be described later in detail. In a changeable state where the setting state of the pachinko machine 10 can be changed, a value corresponding to the current setting value is displayed on the third notification display device 69c. Note that a value corresponding to the set value may be displayed on the first notification display device 69a, or may be displayed on the second notification display device 69b. The set value before the changeable state is displayed on one of the first to third notification display devices 69a to 69c, and the current set value is displayed in the first to third notification. It is good also as a structure displayed on the other display device for notification among the display devices 69a-69c for display.

  As shown in FIG. 2, the back pack unit 15 is installed so as to cover the rear side of the inner frame 13 including the main control device 60. The back pack unit 15 includes a back pack 72 formed of a transparent synthetic resin, and a payout mechanism 73 and a control device assembling unit 74 are attached to the back pack 72.

  The payout mechanism 73 includes a tank 75 to which game balls supplied from the island facilities of the game hall are sequentially replenished, and a payout device 76 for paying out the game balls stored in the tank 75. The game balls paid out from the payout device 76 are discharged to the upper plate 55a or the lower plate 56a through a payout passage provided on the downstream side of the payout device 76. The dispensing mechanism 73 is supplied with a main power of, for example, 24 volts AC, and is mounted with a back pack substrate having a power switch for performing an ON operation and an OFF operation of the power.

  The control device assembling unit 74 includes a payout control device 77 having a function of controlling the payout device 76, a predetermined power required by various control devices and the like is generated and output, and the control device unit 74 is operated by the player operating the firing operation device 28. And a power supply / launch control device 78 for controlling launch of the game ball. The payout control device 77 and the power supply / firing control device 78 are arranged one on top of the other so that the payout control device 77 is located behind the pachinko machine 10.

<Electrical configuration of pachinko machine 10>
FIG. 6 is a block diagram showing an electrical configuration of the pachinko machine 10. As shown in FIG.

  The main control device 60 includes a main control board 61 for controlling a main game, and a power failure monitoring board 67 for monitoring a power supply. The MPU 62 is mounted on the main control board 61. The MPU 62 includes a main-side ROM 64, a main-side RAM 65, and a management IC 66 in addition to the main-side CPU 63, which is an arithmetic processing device including a control unit and an operation unit. The MPU 62 includes, in addition to the above elements, an interrupt circuit, a timer circuit, a data input / output circuit, various counter circuits as a random number generator, and the like.

  The main ROM 64 is a memory such as a NOR flash memory and a NAND flash memory that does not require an external power supply for storing and storing data (that is, a nonvolatile storage unit), and is used as a read-only memory. The main ROM 64 stores various control programs executed by the main CPU 63 and fixed value data.

  The main RAM 65 is a memory such as an SRAM and a DRAM that requires an external power supply for storing and storing data (that is, volatile storage means), and is used for both reading and writing. The main RAM 65 is capable of random access and has a shorter read time than the main ROM 64 when compared with the same data capacity. The main RAM 65 temporarily stores various data and the like when the control program stored in the main ROM 64 is executed.

  The management IC 66 is a management device that manages a game history based on information supplied from the main CPU 63. Although details will be described later, while the management IC 66 grasps the history of the ball entry to the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34, and the out opening 24a, Based on the grasped ball entry history, the frequency of ball entry to the general winning port 31, the special power winning device 32, the first operating port 33, and the second operating port 34 is determined. Further, the occurrence frequency of the open / close execution mode and the high-frequency support mode, which will be described later, is grasped by the management IC 66.

  The MPU 62 is provided with an input port and an output port. A power failure monitoring board 67 and a payout control device 77 provided in the main control device 60 are connected to the input side of the MPU 62. A power supply / emission control device 78 having a function of supplying operating power is connected to the power failure monitoring board 67, and the MPU 62 is supplied with operating power via the power failure monitoring board 67.

  Various sensors such as the incoming ball detection sensors 42a to 49a are connected to the input side of the MPU 62. As described above, the ball detection sensors 42a to 49a include the first winning opening detection sensor 42a, the second winning opening detection sensor 43a, the third winning opening detection sensor 44a, the special power detection sensor 45a, and the first operating opening detection. A sensor 46a, a second working port detection sensor 47a, an out port detection sensor 48a, and a gate detection sensor 49a are included. On the basis of the detection results of the incoming ball detection sensors 42a to 49a, the main CPU 63 determines whether or not to enter each incoming ball portion. In addition, the main CPU 63 executes various lotteries based on winning in the first operating port 33 and executes various lotteries based on winning in the second operating port 34.

  On the input side of the MPU 62, a setting key insertion section 68a, an update button 68b, and a reset button 68c provided on the main control board 61 are provided. A sensor (not shown) is provided in the setting key insertion section 68a, and the sensor detects whether the setting key insertion section 68a is located at the ON operation position or the OFF operation position. Then, the main CPU 63 specifies whether the setting key insertion section 68a is located at the ON operation position or the OFF operation position based on the detection result from the sensor. The update button 68b is provided with a sensor (not shown), which detects whether or not the update button 68b is pressed. Then, the main CPU 63 specifies whether or not the update button 68b is pressed based on the detection result from the sensor. The reset button 68c is provided with a sensor (not shown), and the sensor detects whether or not the reset button 68c is pressed. Then, the main CPU 63 specifies whether or not the reset button 68c is pressed based on the detection result from the sensor.

  The output side of the MPU 62 is connected to a power failure monitoring board 67, a payout control device 77, and a sound emission control device 81. The payout control device 77 outputs, for example, a prize ball command based on the fact that a game ball has entered the prize ball corresponding entry portion corresponding to the payout of a game ball in the entry portion of the above entry portion. You. Various commands such as a change command, a type command, and an opening command are output to the sound emission control device 81.

  On the output side of the MPU 62, a driving unit 32b for a special power supply for opening and closing the opening / closing door 32a of the special power winning device 32, a driving unit 34b for a general power use for opening and closing the general purpose object 34a of the second operating port 34, The drawing unit 37 and the general drawing unit 38 are connected. Incidentally, the special figure unit 37 is provided with a special figure display section 37a and a special figure reservation display section 37b, all of which are connected to the output side of the MPU 62. Similarly, the general-purpose unit 38 is provided with a general-purpose display unit 38a and a general-purpose reservation display unit 38b, all of which are connected to the output side of the MPU 62. The main control board 61 is provided with various driver circuits, and the MPU 62 controls the driving of various drive units and various display units through the driver circuits.

  That is, in the open / close execution mode, the drive control of the drive unit 32b for the special power is executed in the main CPU 63 so that the special power winning device 32 is opened and closed. In addition, in a case where the open state of the general electric part 34a is won, the main CPU 63 controls the driving of the general electric drive unit 34b so that the general electric part 34a is opened and closed. In addition, at the time of each game, the main CPU 63 executes display control of the special figure display section 37a. In addition, when the lottery result indicating whether or not to bring the general electric handpiece 34a to the open state is specified, the main CPU 63 executes the display control of the general-purpose display unit 38a. Further, when a prize occurs in the first operating port 33 or the second operating port 34, or when the variable display is started in the special figure display section 37a, the main CPU 63 controls the display of the special figure reservation display section 37b. Is executed, and when the winning in the through gate 35 occurs, or when the variable display is started on the general-purpose display unit 38a, the display control of the general-purpose reservation display unit 38b is executed by the main CPU 63.

  First to third notification display devices 69a to 69c are connected to the output side of the MPU 62. In addition, the management result of the game history in the management IC 66 is notified through the display on the first to third notification display devices 69a to 69c. When the setting state of the pachinko machine 10 is changed, the current setting value is displayed on the third notification display device 69c. In this case, the first notification display device 69a and the second notification display device 69b are display-controlled by the management IC 66 and are not display-controlled by the main CPU 63, whereas the third notification display device 69c is controlled by the main CPU 63. The display is controlled and the display is controlled by the management IC 66. In the display of the third notification display device 69c, the display control by the main CPU 63 has priority over the display control by the management IC 66.

  However, the present invention is not limited to this, and the display of the third notification display device 69c may be controlled by the management IC 66 and may not be controlled by the main CPU 63. In this case, when the current setting value is displayed on the third notification display device 69c when the setting state of the pachinko machine 10 is changed, the main CPU 63 instructs the management IC 66 to display the setting value. Good.

  The MPU 62 is provided with a reading terminal 68d. A sensor (not shown) is provided at the reading terminal 68d, and the sensor detects whether a connection terminal of an external device is connected to the reading terminal 68d. Then, the main CPU 63 specifies whether or not the connection terminal of the external device is connected to the reading terminal 68d based on the detection result from the sensor. When an external device is connected to the reading terminal 68d, the management result of the game history in the management IC 66 or the information (program and data) stored in the main ROM 64 is externally output to the external device.

  The power failure monitoring board 67 relays between the main control board 61 and the power supply / emission control device 78, and monitors a DC stable 24 volt voltage which is the maximum voltage output from the power supply / emission control device 78. The payout control device 77 controls the payout of the prize ball and the loaned ball by the payout device 76 based on the prize ball command received from the main control device 60.

  The power supply / launch control device 78 is connected to, for example, a commercial power supply (external power supply) in a game hall or the like. Then, based on the external power supplied from the commercial power supply, it generates the necessary operating power for the main control board 61, the payout control device 77, and the like, and supplies the generated operating power. Incidentally, the power supply / emission control device 78 is provided with a power supply unit at the time of power failure such as a backup capacitor. Power for storing and storing is supplied to the main RAM 65 and the payout control device 77 of the control device 60. The power supply / launch control device 78 is responsible for controlling the launch of the game ball launching mechanism 27, and the game ball launching mechanism 27 is driven when predetermined launch conditions are met. The payout mechanism 73 is provided with a power switch as described above. When the power switch is turned on, the supply of operating power to the pachinko machine 10 is started, and the power switch is turned off. As a result, the supply of the operation power to the pachinko machine 10 is stopped.

  The audio light emission control device 81 controls the display light emission unit 53 and the speaker unit 54 provided on the front door frame 14 based on various commands received from the main control device 60, and controls the display control device 82. It is. The display control device 82 executes display control of the symbol display device 41 based on the command received from the audio light emission control device 81.

<Electrical configuration for performing various lotteries in the main CPU 63>
Next, an electrical configuration for performing various lotteries in the main CPU 63 will be described with reference to FIG.

  The main CPU 63 uses the various counter information during the game to perform a jackpot occurrence lottery, the setting of the display of the special figure display unit 37a, the setting of the symbol display of the symbol display device 41, the setting of the display of the general symbol display unit 38a, and the like. More specifically, as shown in FIG. 7, a random number counter C1 used for a lottery of a winning occurrence, a large hit type counter C2 used for determining a big hit type, and a symbol display device 41 The reach random number counter C3 used for the reach generation lottery at the time of execution, the random number initial value counter CINI used for setting the initial value of the hit random number counter C1, and the display duration on the special figure display unit 37a and the symbol display device 41 are determined. And a variation type counter CS. In addition, a general-purpose part opening counter C4 used for a lottery to determine whether or not the general-purpose part 34a of the second operating port 34 is in the general-state open state is used. The counters C1 to C3, CINI, CS, and C4 are provided in various counter areas 65b of the main RAM 65.

  Each of the counters C1 to C3, CINI, CS, and C4 is a loop counter in which 1 is added to the previous value every time the counter is updated, and returns to “0” after reaching the maximum value. Each counter is updated at short time intervals. Information corresponding to the hit random number counter C1, the jackpot type counter C2, and the reach random number counter C3 is provided as acquisition information storage means in the main RAM 65 when a prize occurs in the first operating port 33 or the second operating port. Is stored in the reserved storage area 65a.

  The hold storage area 65a includes a hold area RE and an execution area AE. The holding area RE includes a first holding area RE1, a second holding area RE2, a third holding area RE3, and a fourth holding area RE4, and stores a winning history to the first operating port 33 or the second operating port. At the same time, a combination of each numerical information of the winning random number counter C1, the big hit type counter C2, and the reach random number counter C3 is stored as the holding information in any of the holding areas RE1 to RE4.

  In this case, in the first reserved area RE1 to the fourth reserved area RE4, when a prize to the first working port 33 or the second working port 34 occurs continuously plural times, the first reserved area RE1 → the second reserved area RE4. Each numerical information is stored in chronological order in the order of the reserved area RE2 → the third reserved area RE3 → the fourth reserved area RE4. By providing the four holding areas RE1 to RE4 in this manner, up to four winning histories of game balls to the first operating port 33 or the second operating port 34 are stored on hold. .

  It should be noted that the number of items that can be held and stored is not limited to four, but may be any number, such as two, three, five or more, or a single number.

  The execution area AE is an area for moving each numerical information stored in the first holding area RE1 of the holding area RE when starting the variable display of the special figure display unit 37a. At this time, a determination as to whether or not a hit is made is made based on various numerical information stored in the execution area AE.

  Each of the above counters will be described in detail.

  First, the general-purpose object opening counter C4 will be described. For example, the general electric appliance open counter C4 is configured to be incremented by one in the range of 0 to 250, and to return to “0” after reaching the maximum value. The general-purpose item release counter C4 is updated periodically, and is stored in the general-purpose holding area 65c of the main RAM 65 at the timing when the game ball has won the through gate 35. Then, at a predetermined timing, a lottery is performed to determine whether or not to control the general purpose electronic part 34a to the open state according to the stored value of the general purpose electronic part opening counter C4.

  In the present pachinko machine 10, a plurality of types of support modes are set so that the modes of support by the general purpose electric appliance 34a are different from each other. In detail, in the support mode, when compared with a situation where the launch of the game ball is continued in the same manner in the game area PA, the general-purpose electric appliance 34a of the second operating port 34 is opened per unit time. The high frequency support mode and the low frequency support mode are set so that the frequency of the state becomes relatively high and low.

  In the high-frequency support mode and the low-frequency support mode, the probability of winning in the full-power open state in the full-power open lottery using the general-purpose accessory opening counter C4 is the same (for example, both are 4/5). In the high-frequency support mode, the number of times that the general-purpose part 34a is opened when the general-purpose open state is elected is set to be larger than in the low-frequency support mode, and one open time is set longer. Have been. In this case, in the high frequency support mode, when the open state is elected and the open state of the common electric role object 34a occurs a plurality of times, the state from the end of one open state to the start of the next open state is started. The closing time is set shorter than one opening time. Furthermore, in the high-frequency support mode, the minimum securing time (ie, the time required for the general-purpose opening lottery to be performed after the one general-purpose opening lottery is performed) is smaller than that in the low-frequency support mode. The duration of one display on the display unit 38a) is set short.

  As described above, in the high-frequency support mode, the probability that a winning in the second operating port 34 will occur is higher than in the low-frequency support mode. In other words, in the low-frequency support mode, the probability of winning a prize to the first operating port 33 is higher than in the second operating port 34, but in the high-frequency support mode, the second operating port 33 is more likely to win. The probability that the winning in the mouth 34 will occur increases. In the case where a prize is generated in the second operating port 34, a predetermined number of game balls are paid out. Therefore, in the high-frequency support mode, the player plays a game while not reducing the number of balls held. It can be carried out.

  The configuration for increasing the frequency in which the high frequency support mode is set to the normal power open state per unit time than the low frequency support mode is not limited to the above-described configuration. It is good also as a structure which raises the probability of becoming a normal electric power open state winning. In addition, a securing time to be secured after one general-purpose opening lottery is performed and then the next general-purpose opening lottery is performed (for example, executed in the general-purpose display unit 38a based on winning in the through gate 35). In a configuration in which a plurality of types of variable display time are prepared, a setting is made such that a shorter securing time is more easily selected or the average securing time is shorter in the high frequency support mode than in the low frequency support mode. Is also good. Further, increasing the number of times of opening, lengthening the opening time, shortening the securing time that is secured after one general power opening lottery is performed after one general power opening lottery is performed, such securing time, By shortening the average time and increasing the probability of winning, one of the conditions or an arbitrary combination of conditions may be applied to increase the advantage of the high frequency support mode over the low frequency support mode.

  Here, as described above, the pachinko machine 10 has the setting states of “Setting 1” to “Setting 6”, but the opening frequency and the opening mode of the general purpose accessory 34a in the low frequency support mode are not limited. The setting value is the same, and the opening frequency and the opening mode of the general purpose accessory 34a in the high frequency support mode are the same regardless of the setting value. However, the present invention is not limited to this. At least one of the low frequency support mode and the high frequency support mode, at least one of the opening frequency and the opening mode of the general purpose electrical appliance 34a fluctuates according to the setting state of the pachinko machine 10. It may be configured. For example, the higher the set value, the higher the frequency of opening the general purpose electrical item 34a in the low frequency support mode may be. The second operation when the general electrical accessory 34a is opened once in the low frequency support mode. A configuration in which the probability of entering a game ball into the mouth 34 is increased may be adopted. In addition, the higher the set value, the higher the frequency of opening the common electrical object 34a in the high-frequency support mode may be configured to be higher. A configuration in which the probability of entering a game ball into the operating port 34 may be increased.

  Next, the hit random number counter C1 will be described. The hit random number counter C1 is configured to be added one by one in the range of, for example, 0 to 599, and to return to “0” after reaching the maximum value. In particular, when the hit random number counter C1 makes one round, the value of the random number initial value counter CINI at that time is read as the initial value of the hit random number counter C1. The random number initial value counter CINI is a loop counter similar to the hit random number counter C1 (value = 0 to 599). The winning random number counter C1 is periodically updated, and is stored in the holding storage area 65a of the main RAM 65 at the timing when the game ball wins the first operation port 33 or the second operation port 34.

  The value of the random number for winning the jackpot is stored in the main ROM 64 as a winning / failing table. FIG. 8 is an explanatory diagram for explaining various tables stored in the main ROM 64. As the success / failure table, a low probability / failure table 64a to 64f for the low probability mode and a high probability / failure table 64g for the high probability mode are stored.

  The low-probability tables 64a to 64f are provided in one-to-one correspondence with the setting states of “Setting 1” to “Setting 6”. In other words, the low-probability table 64a for setting 1 referred to when the setting state of the pachinko machine 10 is “setting 1”, and the setting referred to when the setting state of the pachinko machine 10 is “setting 2” The low-accuracy table 64b for the second, the low-accuracy table 64c for the setting 3 referred to when the setting state of the pachinko machine 10 is “setting 3”, and the setting state of the pachinko machine 10 is “setting 4” , A low-probability table 64d for setting 4 referred to when the pachinko machine 10 is set, a low-probability table 64e for setting 5 referred to when the setting state of the pachinko machine 10 is “setting 5”, and a pachinko machine 10 And a low-probability table 64f for setting 6 that is referred to when the setting state of “setting 6” is “setting 6”.

  These low-probability tables 64a to 64f are set such that the higher the set value, the higher the probability of winning the jackpot result. Specifically, when the low-probability table 64a for the setting 1 is referred to, the jackpot results at about 1/320, and when the low-probability table 64b for the setting 2 is referred, about 1/310. The result is a jackpot, and when the low-probability table 64c for the setting 3 is referred to, the jackpot results at about 1/300. When the low-probability table 64d for the setting 4 is referred to, the result is about 1/290. , A jackpot result is obtained, and when the low-probability table 64e for setting 5 is referred to, the jackpot result is about 1/280, and when the low-probability table 64f for setting 6 is referred to, about 1/270. The result is a jackpot. As a result, when the setting state of the pachinko machine 10 has a higher setting value, a jackpot result is more likely to occur in the low probability mode, which is advantageous for the player.

  On the other hand, only one type of the high probability rejection table 64g is provided so as to be common in any of the setting states of “Setting 1” to “Setting 6”. The high probability of success / failure table 64g is set such that the winning probability of the big hit result is higher than that of the low probability of success / failure tables 64a to 64f regardless of the setting state of “Setting 1” to “Setting 6”. Specifically, when the high-accuracy determination table 64g is referred to, the jackpot results at about 1/30. This makes it possible to make the high probability mode more advantageous than the low probability mode regardless of the setting state of the pachinko machine 10. Also, even in the lowest setting state “Setting 1”, the high probability mode makes it possible to increase the probability of the jackpot result as compared with the lowest setting state “Setting 6” low probability mode. Becomes In addition, in the high probability mode, it is possible to prevent the advantage or disadvantage caused by the setting state of the pachinko machine 10 from occurring, and to reduce the storage capacity for storing the high accuracy / non-permission table 64g in the main ROM 64 in advance. It becomes possible.

  The jackpot type counter C2 is configured to be added one by one in the range of 0 to 29, and to return to “0” after reaching the maximum value. The jackpot type counter C2 is updated periodically, and is stored in the hold storage area 65a at the timing when the game ball wins the first operation port 33 or the second operation port 34.

  In this pachinko machine 10, a plurality of jackpot results are set. The plurality of jackpot results are (1) the mode of opening / closing control of the special power winning device 32 in the opening / closing execution mode, (2) the lottery mode in the winning / rejecting lottery means after the end of the opening / closing execution mode, and (3) the third mode after the end of the opening / closing execution mode. A plurality of jackpot results are set by providing a difference in the three conditions of the support mode of the general-purpose accessory 34a of the second operation port 34.

  The opening / closing control of the special power prize device 32 in the open / close execution mode is performed such that the frequency of winning of the special power prize device 32 between the start and the end of the open / close execution mode is relatively high or low. A frequency winning mode and a low frequency winning mode are set. Specifically, in any of the high frequency winning mode and the low frequency winning mode, the game is executed with a predetermined number of round games as an upper limit.

  The round game is a game in which a predetermined upper limit duration time elapses and a predetermined upper limit number of game balls continue to be won in the special power winning device 32 until one of the conditions is satisfied. That is. In addition, the number of round games in the opening and closing execution mode triggered by the jackpot result is the same as the fixed round number regardless of the type of the jackpot result triggered by the shift. More specifically, the upper limit number of round games is set to 15 rounds regardless of which jackpot result is obtained.

  Further, in the pachinko machine 10, a plurality of types of open modes of the special power winning device 32 are set so as to have different opening continuation times from when the special power winning device 32 is opened until when the special power winning device 32 is closed. In detail, a long time mode in which the opening duration is set to a long time of 29 seconds, a short time mode in which the opening duration is set to a short time shorter than the long time of 0.06 seconds, Is set.

  In the present pachinko machine 10, when the shooting operation device 28 is operated by the player, the game ball firing mechanism 27 is driven so that one game ball is fired toward the game area PA every 0.6 seconds. Controlled. In the round game, the upper limit number of the end conditions is set to nine. Then, in the long-time mode of the above-described open modes, the open continuation time longer than the product of the launch cycle of the game ball and one round game is set. On the other hand, in the short-time mode, the open duration is set to a time shorter than the product of the launch cycle of the game ball and one round game, more specifically, a shorter time than the launch cycle of the game ball. Therefore, when one opening is performed in the long-time mode, it is expected that the maximum number of winnings in one round game will occur in the special power winning device 32, and 1 in the short-time mode. When the number of times has been opened, it is expected that no prize will be generated in the special power prize winning device 32, or that even if a prize is generated, the number will be about one.

  In the high frequency winning mode, the special power winning device 32 is opened once in a long time mode in each round game. On the other hand, in the low frequency winning mode, the special power winning device 32 is opened once in a short time mode in each round game.

  In addition, the number of times of opening and closing of the special power winning device 32 in the high frequency winning mode and the low frequency winning mode, the number of round games, the opening duration for one opening, and the upper limit number in one round game are higher than those in the high frequency winning mode. Is not limited to the above value as long as the frequency of winning in the special power winning device 32 during the period from the start to the end of the open / close execution mode to the end thereof is higher than that in the low frequency winning mode. It is.

  The distribution destination of the jackpot result to the jackpot type counter C2 is stored in the main ROM 64 as an assignment table 64h as shown in FIG. In the distribution table 64h, a low-probability big-hit result, a low-prize-high-probability big-hit result, and a most-favorable-big-hit result are set as distribution destinations of the big-hit result when the big-hit result is obtained.

  The low-probability jackpot result is a jackpot result in which the opening / closing execution mode becomes the high-frequency winning mode, and after the end of the opening / closing execution mode, the success / failure lottery mode becomes the low probability mode, and the support mode becomes the high frequency support mode. However, the high frequency support mode shifts to the low frequency support mode when the number of games reaches the end reference number (specifically, 100 times) after the shift.

  The low winning high probability big hit result is a big hit result in which the opening and closing execution mode becomes the low frequency winning mode, and after the opening and closing execution mode ends, the winning / rejecting lottery mode becomes the high probability mode and the support mode becomes the high frequency support mode. is there. The high probability mode and the high frequency support mode are continued until the lottery result in the winning / non-winning lottery becomes a big hit state and the state shifts to a big hit state.

  The most advantageous jackpot result is a jackpot result in which the opening / closing execution mode becomes the high frequency winning mode, and after the opening / closing execution mode ends, the success / failure lottery mode becomes the high probability mode and the support mode becomes the high frequency support mode. The high probability mode and the high frequency support mode are continued until the lottery result in the winning / non-winning lottery becomes a big hit state and the state shifts to a big hit state.

  Note that, in relation to the above-mentioned respective game states, the normal game state is not the open / close execution mode, but the state in which the success / failure lottery mode is the low probability mode and the support mode is the low frequency support mode. In addition, a configuration may be adopted in which a low winning high probability big hit result is not set as a game result. Further, in the opening / closing execution mode in the low winning high probability big hit result, the number of round games may be smaller than that in the case of the low probability big hit result and the most advantageous big hit result.

  In the distribution table 64h, among the values of the jackpot type counter C2 of “0 to 29”, “0 to 9” corresponds to the low winning jackpot result, and “10 to 14” corresponds to the low winning high jackpot result. "15-29" corresponds to the most advantageous jackpot result.

  Only one type of distribution table 64h is provided so as to be common in any of the setting states of “Setting 1” to “Setting 6”. This makes it possible to avoid the advantage or disadvantage caused by the setting state of the pachinko machine 10 in the distribution mode of the jackpot result, and to store the distribution table 64h in the main ROM 64 in advance. Can be suppressed.

  In addition, the distribution mode of the jackpot results may be different depending on the setting state of the pachinko machine 10. For example, a configuration may be adopted in which the higher the set value, the higher the probability of being allocated to the most advantageous big hit result, and the higher the set value, the higher the probability of being allocated to the most advantageous big hit result or low winning high probability big hit result. In this case, the higher the set value, the higher the probability of the high probability mode after the jackpot result is achieved. Also, the higher the setting value, the lower the probability of being distributed to the low prize winning jackpot result. The higher the setting value, the lower the probability of being distributed to the high prize winning jackpot result, whereas the lower the setting value, the lower the winning probability. It is good also as composition which can be distributed to a jackpot result. In this case, it is possible to increase the probability that the open / close execution mode of the high-frequency winning mode will occur as the set value increases.

  Next, the reach random number counter C3 will be described. The reach random number counter C3 is configured to be incremented by one, for example, in the range of 0 to 238, and to return to “0” after reaching the maximum value. In the pachinko machine 10, an expected effect is set as a type of display effect on the symbol display device 41. The expected effect is provided with a symbol display device 41 capable of performing variable display of symbols, and in a gaming machine in which a final stop result is an assignment corresponding result in a game time in which a predetermined jackpot result is obtained, the symbol display device 41 is provided. This is a display state for making the player think that the variable display state is likely to be the above-mentioned provision result at the stage before the stop result is derived and displayed after the start of the variable display of the symbol. It should be noted that, specifically, the combination of symbols with the same numeral attached to one of the activated lines is stopped and displayed.

  Two types of expected effects are set: a reach display, and a preview display for expecting the occurrence of the reach display and the generation of the assignment correspondence result at a stage before the reach display occurs.

  In the reach display, a combination of reach symbols is displayed by stopping and displaying symbols in some of the symbol columns among a plurality of symbol columns displayed on the display surface 41a of the symbol display device 41, and displaying the remaining combinations in that state. A display state in which a symbol is fluctuated in the symbol row is included. In addition, in the state where the combination of the reach symbols is displayed as described above, while performing the variation display of the symbols in the remaining symbol rows, and performing a reach effect by displaying a predetermined character or the like as a moving image on the background screen, , A combination of reach symbols is reduced or displayed, and a reach effect is displayed by displaying a predetermined character or the like as a moving image on substantially the entire display surface 41a.

  In the notice display, a state in which symbols are variably displayed in all the symbol rows after the symbol variable display is started on the display surface 41a of the symbol display device 41, or a plurality of symbols in some symbol rows. In a situation in which symbols are variably displayed in the symbol row, a mode in which a character is displayed separately from the symbols on the symbol row is included. Further, the background screen may have a predetermined mode different from the previous mode, and the symbol on the symbol row may have a predetermined mode different from the previous mode. Such a notice display may occur at any of the game times when the reach display is performed and when the reach display is not performed, but the display when the reach display is performed is higher than when the reach display is not performed. It is set to occur with probability.

  The reach display is executed irrespective of the value of the reach random number counter C3 in the game cycle in which the same symbol combination is finally stopped and displayed. Further, in the game times corresponding to the jackpot result in which the same symbol combination is not stopped and displayed, the combination is not executed regardless of the value of the reach random number counter C3. In addition, the game time corresponding to the result of departure is executed when the reach random number counter C3 acquired at a predetermined timing with reference to the reach table stored in the main ROM 64 corresponds to the occurrence of the reach display. .

  On the other hand, the determination as to whether or not to display the advance notice is made not by the main control device 60 but by the sound emission control device 81. In this case, the sound emission control device 81 indicates that the notice display is more likely to occur in the game times corresponding to any one of the jackpot results than in the game times corresponding to the missed result, and that the notice display with a low appearance rate is performed. A lottery process for displaying a notice is executed so as to satisfy at least one of the conditions of easy occurrence. Incidentally, this lottery result is reflected when the effect for the game round is executed on the symbol display device 41.

  Here, the probability of occurrence of the reach display in the game times resulting in the departure is the same regardless of the setting state of “Setting 1” to “Setting 6”. Thereby, it becomes possible to prevent the advantage or disadvantage caused by the setting state of the pachinko machine 10 with respect to the probability that the reach display is generated in the game time that results in the departure. However, the present invention is not limited to this, and a configuration may be adopted in which the higher the set value, the higher the probability of occurrence of the reach display in a game time that results in a deviation.

  Next, the variation type counter CS will be described. The fluctuation type counter CS is configured to be incremented by one in order within a range of, for example, 0 to 198, and to return to “0” after reaching the maximum value. The variation type counter CS is used by the main CPU 63 to determine the display duration on the special figure display unit 37a and the display duration on the symbol on the symbol display device 41. The fluctuation type counter CS is updated once each time a timer interrupt process, which will be described later, is executed once, and is repeatedly updated even within the remaining time until the next timer interrupt process is executed. Then, the buffer value of the variation type counter CS is acquired at the time of determining the variation pattern at the time of starting the variation display on the special figure display unit 37a and at the time of starting the symbol variation by the symbol display device 41.

<About the processing configuration of the main CPU 63>
Next, each process executed by the main CPU 63 to advance the game will be described. The processing of the main CPU 63 is roughly classified into a main processing started when the power is turned on, and a timer interrupt processing started periodically (in a cycle of 4 milliseconds in the present embodiment).

<Main processing>
First, the main processing will be described with reference to the flowchart of FIG.

  First, power-on wait processing is executed (step S101). In the power-on wait process, for example, the process waits without advancing to the next process until a predetermined time for wait (specifically, one second) elapses after the main process is started. In the execution period of the power-on wait processing, the operation start and the initial setting of the symbol display device 41 are completed. Thereafter, access to the main RAM 65 is permitted (step S102).

  Thereafter, it is determined whether or not the setting key insertion unit 68a has been turned ON (step S103). If the setting key insertion section 68a has not been turned ON (step S103: NO), it is determined whether the reset button 68c has been pressed (step S104). When the reset button 68c is pressed (step S104: YES), each area of the main RAM 65 is set to "except for the area in which the setting value information indicating the setting state of the pachinko machine 10 is set in the main RAM 65. "0" is cleared, and an initial setting is performed for the area cleared to "0" (step S105). In other words, when the supply of the operating power to the pachinko machine 10 is started while the reset button 68c is pressed and operated without the ON operation of the setting key insertion section 68a, the operation of the pachinko machine 10 is The clear processing of the main RAM 65 is executed while maintaining the state before the power supply is stopped, and the initial setting is performed on the storage area where the clear processing is executed. Thus, it is possible to initialize another area of the main RAM 65 without changing the set value. In step S105, initialization is performed after various registers of the main CPU 63 are also cleared to "0".

  If the reset button 68c has not been pressed (step S104: NO), it is determined whether the power failure flag is set to "1" (step S106). The power failure flag is provided in the main RAM 65, and when the supply of the operating power to the main CPU 63 is stopped and the predetermined power failure processing is normally executed, the power failure flag is set to “1”. Is set. If "1" is set in the power failure flag, it is determined whether or not the calculation result of the checksum matches the checksum stored when the power is turned off, that is, the validity of the stored data is determined (step S107). . When the process in step S105 is executed or when the affirmative determination is made in step S107, it is determined whether the set value of the pachinko machine 10 is normal by checking the main RAM 65 (step S108). Specifically, when the setting value is any one of “Setting 1” to “Setting 6”, it is determined to be normal, and when it is “0” or 7 or more, it is determined to be abnormal.

  If a negative determination is made in any of steps S106 to S108, an operation prohibition process is executed. In the operation prohibition process, after an error notification process for notifying the hole manager or the like of the occurrence of an error is performed (step S109), an infinite loop is performed. The operation prohibition processing is released by executing the later-described all clear processing (step S117).

  If an affirmative determination is made in all of steps S106 to S108, a power-on setting process is executed (step S110). In the power-on setting process, a predetermined area of the main RAM 65 such as initialization of a power failure flag is set to an initial value, and a command corresponding to the current game state is transmitted to the sound emission control device 81. After executing the process of step S110, a recognition process for causing the management IC 66 to recognize various information (step S111) and various data are output to an external device connected to the reading terminal 68d of the MPU 62. A data output process is performed (step S112). Details of the recognition processing and the data output processing will be described later.

  Although the main CPU 63 is configured to periodically execute the timer interrupt process, the occurrence of the timer interrupt process is prohibited when the main process is started. The state in which the generation of the timer interrupt processing is prohibited is released at a timing before the processing in step S113 is executed after the processing in step S112 is completed, and the execution of the timer interrupt processing is permitted. As a result, when the supply of the operating power to the main CPU 63 is started, the data output process of step S112 is completed, and the timer interrupt process is not executed until the process of step S113 is started. Therefore, the processing for advancing the game by the main CPU 63 is not started until the situation is reached.

  After that, the process proceeds to the remaining process of steps S113 to S116. That is, the main CPU 63 is configured to periodically execute the timer interrupt process, but a remaining time is generated between one timer interrupt process and the next timer interrupt process. The remaining time varies in accordance with the processing completion time of each timer interrupt process, but the remaining process of steps S113 to S116 is repeatedly executed using the irregular time. In this regard, it can be said that the remaining processes in steps S113 to S116 are irregular processes that are executed irregularly.

  In the remaining process, first, in step S113, interrupt prohibition is set to prohibit the occurrence of the timer interrupt process. In the following step S114, a random number initial value updating process for updating the random number initial value counter CINI is executed, and in step S115, a fluctuation counter updating process for updating the fluctuation type counter CS is executed. In these updating processes, the current numerical information is read from the corresponding counter of the main RAM 65, a process of adding 1 to the read numerical information is executed, and then a process of overwriting the counter of the read source is executed. In this case, when the counter value exceeds the maximum value, each is cleared to “0”. After that, in step S116, an interrupt permission setting for switching from a state in which the occurrence of the timer interrupt processing is prohibited to a state in which the timer interrupt processing is permitted is performed. When the process in step S116 has been performed, the process returns to step S113, and the processes in steps S113 to S116 are repeated.

  On the other hand, when the setting key insertion section 68a is turned ON (step S103: YES), the main RAM 65 includes an area in which information of the setting value indicating the setting state of the pachinko machine 10 is set. All areas are cleared to "0" and initial settings are made for the areas cleared to "0" (step S117). That is, when an operation for changing the setting state of the pachinko machine 10 is being performed, all areas of the main RAM 65 are cleared to “0” and cleared even when the reset button 68c is not pressed. Initial setting is performed for the storage area where the processing has been executed. In step S117, initialization is performed after various registers of the main CPU 63 are also cleared to "0". The present invention is not limited to this, and even if an operation for changing the setting state of the pachinko machine 10 is performed, if the reset button 68c is not pressed, the entire main RAM 65 is not operated. The clearing process may not be executed, and the entire clearing process may be executed when the operation for changing the setting state of the pachinko machine 10 is performed and the reset button 68c is pressed.

  Thereafter, in step S118, a set value update process is executed, and in step S119, a process of outputting a set value update signal is executed. Then, the process proceeds to step S110. Hereinafter, the setting value update processing will be described. The output processing of the set value update signal will be described later in detail. FIG. 10 is a flowchart showing the setting value updating process.

  First, "1" is set to a set value counter provided in the main RAM 65 (step S201). The set value counter is a counter for the main CPU 63 to specify which set value the setting state of the pachinko machine 10 is. When the set value counter is set to “1”, when the set value updating process is executed, the set value becomes “set 1” regardless of the set value up to that time.

  Thereafter, a setting value display start process is executed (step S202). In the setting value display start processing, the display of the third notification display device 69c is controlled so that the number “1” corresponding to “setting 1” is displayed. When changing the set value, the manager of the gaming hall can check the current setting state of the pachinko machine 10 by checking the third notification display device 69c.

  Thereafter, on condition that the setting key insertion section 68a has not been turned OFF (step S203: NO), it is determined whether or not the update button 68b has been pressed once (step S204). Specifically, it is determined whether or not the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S204, the process returns to step S203, and it is determined whether the setting key insertion unit 68a has been turned off.

  When the update button 68b is pressed once (step S204: YES), the value of the set value counter of the main RAM 65 is incremented by 1 (step S205). If the value of the set value counter after adding 1 exceeds “6” (step S206: YES), “1” is set to the set value counter (step S207). Thus, each time the update button 68b is pressed once, the setting value is updated to the next higher level, and when the update button 68b is pressed once in the situation of “setting 6,” the setting is changed to “setting 1.” I will return.

  If a negative determination is made in step S206, or if the process in step S207 is performed, a display update process of the set value is performed (step S208). In the display update processing of the set value, the display control of the third notification display device 69c is performed so that the number corresponding to the value of the set value counter of the main RAM 65 is displayed. The administrator of the gaming hall can check the setting state of the pachinko machine 10 after pressing the update button 68b by checking the third notification display device 69c.

  After executing the processing in step S208, the process returns to step S203, and it is determined whether or not the setting key insertion unit 68a has been turned OFF. If the OFF operation has not been performed (step S203: NO), the processing after step S204 is executed again. If the operation has been turned off (step S203: YES), display end processing of the set value is executed (step S209). In the display end processing of the set value, the display of the set value on the third notification display device 69c is ended.

<Timer interrupt processing>
Next, the timer interrupt processing will be described with reference to the flowchart of FIG. The timer interrupt processing is executed periodically (for example, at a period of 4 milliseconds).

  First, power outage information storage processing is executed (step S301). In the power failure information storage processing, it is monitored whether or not a power failure signal corresponding to the occurrence of the power interruption has been received from the power failure monitoring board 67. Become. In the process at the time of power failure, the power failure flag in the main RAM 65 is set to “1”, a checksum is calculated, and the calculated checksum is stored.

  After that, a random number updating process for lottery is executed (step S302). In the random number updating process for lottery, the winning random number counter C1, the big hit type counter C2, the reach random number counter C3, and the general public goods open counter C4 are updated. Specifically, the current numerical information is sequentially read out from the hit random number counter C1, the big hit type counter C2, the reach random number counter C3, and the general public goods open counter C4, and a process of adding one to each of the read numerical information is executed. Thereafter, a process of overwriting the counter of the read source is executed. In this case, when the counter value exceeds the maximum value, each is cleared to “0”. After that, in step S303, a random number initial value updating process is executed as in step S114, and in step S304, a fluctuation counter updating process is executed as in step S115.

  Thereafter, a fraud detection process is performed to monitor whether a predetermined event set as a fraud monitoring target has occurred (step S305). In the fraud detection processing, the occurrence of a plurality of types of events is monitored, and by confirming that a predetermined event has occurred, the game stop flag provided in the main RAM 65 is set to “1”. In the following step S306, it is determined whether or not the game is stopped by determining whether or not the game stop flag is set to "1". If a negative determination is made in step S306, the processing from step S307 is executed.

  In step S307, a port output process is performed. In the port output process, when output information has been set in the previous timer interrupt process, a process for outputting an output corresponding to the output information to the various drive units 32b and 34b is executed. For example, when the information to switch the special power winning device 32 to the open state is set, the output of the drive signal to the special power driver 32b is started, and when the information to switch to the closed state is set. Stops the output of the drive signal. If the information to switch the general-purpose part 34a of the second operating port 34 to the open state is set, the output of the drive signal to the general-purpose driving unit 34b is started and the state is switched to the closed state. When the information is set, the output of the drive signal is stopped.

  After that, a reading process is executed (step S308). In the reading processing, signals other than the power failure signal and the winning signal are read, and the read information is stored for use in future processing.

  After that, a ball entry detection process is executed (step S309). In the incoming ball detection process, the signals received from the incoming ball detection sensors 42a to 49a are read, and based on the read result, the out port 24a, the general winning port 31, the special power winning device 32, the first operating port 33. The presence or absence of a ball entering the second operation port 34 and the through gate 35 is specified. The details of the incoming ball detection process will be described later.

  Thereafter, a timer update process for updating numerical information of a plurality of types of timer counters provided in the main RAM 65 is executed (step S310). In this case, the timer counter that is updated by subtracting the stored numerical information is collectively handled, but both the update of the subtraction timer counter and the update of the addition timer counter are collectively performed. It may be configured.

  After that, a launch control process for performing launch control of the game ball is executed (step S311). In a situation where the firing operation to the firing operation device 28 is continued, one game ball is fired in a predetermined firing cycle of 0.6 seconds. In subsequent step S312, as input state monitoring processing, based on the information read in the reading processing in step S308, disconnection confirmation of each of the incoming ball detection sensors 42a to 49a and confirmation of opening of the gaming machine main body 12 and the front door frame 14 are performed. I do.

  Then, a special figure special power control process for performing the execution control of the game times and the execution control of the open / close execution mode is executed (step S313). The special figure special power control processing will be described later in detail.

  After that, the general-purpose power control process is executed (step S314). In the general-purpose general-purpose control process, a process for acquiring general-purpose side hold information is performed when a prize has occurred in the through gate 35, and when general-purpose side hold information is stored. Then, a release determination is made for the hold information, and a process for performing an effect for ordinary drawing is executed with the release determination as an opportunity. In addition, based on the result of the opening determination, a process of opening and closing the general purpose accessory 34a of the second operating port 34 is executed. In this case, if the support mode is the low frequency support mode, the corresponding process is executed, and if the support mode is the high frequency support mode, the corresponding process is executed. Further, in the case of the opening / closing execution mode, even if the immediately preceding support mode is the high frequency support mode, the low frequency support mode is set.

  In the following step S315, based on the processing results of the immediately preceding steps S313 and S314, output information for reflecting the increase / decrease number of the hold information related to the special figure display section 37a in the special figure hold display section 37b is set. Then, the output information for reflecting the increase / decrease number of the hold information related to the general-purpose display section 38a on the general-purpose display section 38b is set. In step S315, based on the processing results of the immediately preceding steps S313 and S314, output information for updating the display contents of the special figure display unit 37a is set, and the display contents of the general figure display unit 38a are changed. Set the output information to be updated.

  Thereafter, the contents of the command and the signal received from the payout control device 77 are confirmed, and a payout state receiving process for performing a process corresponding to the confirmation result is executed (step S316). In addition, a payout output process for setting the prize ball command as an output target is executed (step S317). Further, an external information setting process for controlling the start and end of the output of the external signal according to the processing result of the various processes executed in the current timer interrupt process is executed (step S318). Thereafter, a management output process for outputting information corresponding to the ball entry result of the game ball in the game area PA to the management IC 66 is executed (step S319). Details of the management output process will be described later.

  Next, the special figure special power control processing in step S313 will be described with reference to the flowchart in FIG.

  First, a process of acquiring hold information is executed (step S401). In the process of acquiring the hold information, it is determined whether or not a prize has occurred in the first operating port 33 or the second operating port 34, and if a prize has occurred, the number of holds in the hold storage area 65a is limited to an upper limit. It is determined whether the value is less than the value (“4” in the present embodiment). If the number of reservations is less than the upper limit, the number of reservations is incremented by one, and the numerical information of the hit random number counter C1, the big hit type counter C2, and the reach random number counter C3 updated in the previous step S302 are used for the hold. It is stored in the first reserved area among the empty reserved areas RE1 to RE4 of the area RE. When the winning in the first operating port 33 and the second operating port 34 occurs simultaneously, the processing for acquiring the suspension information is performed within a range in which the acquisition processing of the suspension information is performed once. Execute multiple times. When a new acquisition of the hold information is performed, a corresponding acquisition command is transmitted to the sound emission control device 81. When receiving the command, the sound emission control device 81 updates the display of the image indicating the number of pieces of hold information on the symbol display device 41 to display content corresponding to the increase of the hold information.

  Thereafter, the information of the special figure special power counter provided in the main RAM 65 is read (step S402), and the special figure special power address table provided in the main ROM 64 is read (step S403). Then, a start address corresponding to the information of the special figure special power counter is acquired from the special figure special power address table (step S404), and the processing jumps to the processing indicated by the obtained start address among the processing of steps S406 to S412 (step S405). ). The special figure special power counter is a counter for the main CPU 63 to know which of the various processes of steps S406 to S412 should be executed. The special figure special power address table stores the special figure special power counter. A start address of a program for executing the processing of steps S406 to S412 is set in association with the numerical information.

  In step S406, a special figure change start process is executed. FIG. 13 is a flowchart showing the special figure change start processing.

  In the special figure change start processing, the data setting processing is executed (step S502) on the condition that the number of pieces of hold information stored in the hold area RE is one or more (step S501: YES). In the data setting process, first, the number of holds is decremented by one, and the data stored in the first hold area RE1 of the hold area RE is moved to the execution area AE. Thereafter, a process of shifting the data stored in each of the holding areas RE1 to RE4 of the holding area RE is executed. This data shift process is a process for sequentially shifting data stored in the first to fourth holding areas RE1 to RE4 to the lower area side. Specifically, the second shifting area RE2 → the first holding area RE1 Then, the data in each area is shifted, for example, from the third reserved area RE3 to the second reserved area RE2 and from the fourth reserved area RE4 to the third reserved area RE3, and then the fourth reserved area RE4 is cleared to "0". At this time, a shift-time command for recognizing that the data in the holding area has been shifted is transmitted to the sound emission control device 81. When receiving the command, the voice light emission control device 81 updates the display of the image indicating the number of pieces of hold information on the symbol display device 41 to display content corresponding to the decrease of the hold information.

  After executing the data setting process, the success / failure table is read from the main ROM 64 (step S503). Specifically, first, the information indicating the current winning / rejecting lottery mode is read out from the main RAM 65 to grasp the current winning / rejecting lottery mode. In the case of the high probability mode, the high probability correct / non-permissible table 64g is read from the main ROM 64. On the other hand, in the case of the low probability mode, the setting state of the pachinko machine 10 is grasped by reading the value of the setting value counter of the main RAM 65. Then, the low-probability tables 64a to 64f corresponding to the set values that have been grasped are read from the main ROM 64.

  After that, it executes a hit / fail judgment process with reference to the hit / fail tables 64a to 64g read in step S503 (step S504). In the success / failure determination process, the information for success / failure determination among the information stored in the execution area AE, that is, the numerical information related to the hit random number counter C1, is the big hit numerical information set in the success / failure tables 64a to 64g read in step S503. It is determined whether or not they match.

  If the result of the success / failure determination process is a jackpot winning result (step S505: YES), the distribution determination process is executed (step S506). In the distribution determination processing, information for distribution determination, that is, numerical information related to the jackpot type counter C2 is read out of the information stored in the execution area AE. Then, referring to the distribution table 64h provided in the main-side ROM 64, it identifies which of the jackpot results the read-out numerical information on the jackpot type counter C2 corresponds to. Specifically, it specifies which jackpot result corresponds to the low jackpot result, the low winning jackpot result, or the most advantageous jackpot result.

  After that, a stop result setting process for the jackpot result is executed (step S507). Specifically, in the game time related to the start of the fluctuation, the information of the pattern form to be finally stopped and displayed on the special figure display unit 37a is obtained from the stop result table for the jackpot result stored in the main ROM 64 in advance. The specified information is written to the main RAM 65. In the stop result table for the jackpot result, information on the mode of the pattern stopped and displayed on the special figure display unit 37a is set differently for each type of the jackpot result.

  Thereafter, a flag setting process corresponding to the distribution determination result is executed (step S508). Specifically, the main RAM 65 is provided with a flag corresponding to each type of the jackpot result. "1" is set to the flag corresponding to the result.

  On the other hand, if it is determined in step S505 that the result is not a jackpot winning result, a stop result setting process for a miss result is executed (step S509). Specifically, the information of the pattern form to be finally stopped and displayed on the special figure display unit 37a in the game time related to the start of the fluctuation is obtained from the stop result table for the departure result stored in the main ROM 64 in advance. The specified information is written to the main RAM 65. In this case, the information on the pattern aspect selected is different from the information on the pattern aspect selected in the case of the jackpot result.

  After executing any of the processes of step S508 and step S509, a process of grasping the duration of the game times is executed (step S510). In this process, numerical information of the variation type counter CS is obtained. Further, it is determined whether or not the reach display is generated on the symbol display device 41 in the current game round. Specifically, when the game time related to the start of the current fluctuation is the low-probability jackpot result or the most advantageous jackpot result, it is determined that the reach display is generated. If none of the jackpot results is found and the numerical information on the reach random number counter C3 stored in the execution area AE is numerical information corresponding to the occurrence of the reach, it is determined that the reach display is generated.

  When it is determined that the reach display is generated, the duration of the game corresponding to the numerical information of the current fluctuation type counter CS is acquired by referring to the reach generation duration table stored in the main ROM 64. . On the other hand, when it is determined that the reach display does not occur, the continuation of the game times corresponding to the numerical information of the current fluctuation type counter CS is referred to by referring to the reach non-occurrence continuation period table stored in the main ROM 64. Get the period. Incidentally, the duration of the game times that can be acquired by referring to the reach non-occurrence duration table is different from the duration of the game times that can be acquired by referring to the reach occurrence duration table.

  Note that the duration of the game times when no reach occurs is set such that the duration of the game times becomes shorter as the number of pieces of hold information stored in the hold area RE increases. Also, in the situation where the support mode is the high frequency support mode, compared to the case where the number of pending information is the same, the duration of the short game round is selected compared to the case where the number of the hold information is the same. A REACH non-occurrence duration table is set. However, the present invention is not limited to this. The configuration may be such that the duration of the game times does not fluctuate according to the number of hold information and the support mode, and the above relationship may be reversed. Further, the above-described configuration may be applied to a continuation period of a game round when a reach occurs. In addition, a duration table may be individually set for each of the various jackpot results, the case of the out-of-reach reach, and the case of the out-of-reach non-occurrence result. In this case, the distribution of the continuation period of the game times according to each game result is performed.

  Thereafter, the information on the duration of the game times acquired in step S510 is set in a special figure special power timer counter provided in the main RAM 65 (step S511). Updating of the numerical information set in the special figure special power timer counter is executed in a timer updating process (step S310). By the way, as the effect for the game round, the variable display of the pattern on the special figure display section 37a and the variable display of the symbol on the symbol display device 41 are performed. Is displayed over the final stop period (for example, 0.5 seconds) in a state where the stop result is displayed (a state in which a predetermined combination of symbols is on the activated line in the symbol display device 41). In this case, the duration of the game times acquired in step S510 is the total time for one game time.

  Thereafter, the change command and the type command are transmitted to the sound emission control device 81 (step S512). The change command includes information on the duration of the game. Here, as described above, the duration of the game times acquired with reference to the reach non-occurrence duration table is different from the duration of the game times acquired with reference to the reach occurrence duration table. Even if the fluctuation command does not include information on whether or not reach has occurred, the sound emission control device 81 can specify whether or not reach has occurred from the information on the duration of the game times. In this regard, it can be said that the fluctuation command includes information indicating whether or not the reach has occurred. Note that the fluctuation command may include information directly indicating whether or not the reach has occurred. The type command includes information on the game result.

  When the voice light emission control device 81 receives the change command and the type command from the main CPU 63, the display light emitting unit 53, the speaker unit 54, and the symbol display device 41 execute a game effect. In this case, the effect for the game round is performed in a mode corresponding to the contents of the change command and the type command. In addition, in the symbol display device 41, a symbol variation display is performed as an effect for the game round, and when the effect for the game round ends, a combination of symbols corresponding to the results of the hit / fail determination processing and the distribution determination processing is displayed. Stopped and displayed.

  After that, the variation display of the picture on the special figure display section 37a is started (step S513). Then, the special figure special power counter is incremented by 1 (step S514). In this case, since the numerical information of the special figure special power counter when the special figure fluctuation start processing is executed is “0”, the numerical information of the special figure special power counter is “1”. Thereafter, "1" is set to the eleventh output flag provided in the main RAM 65 (step S515). The eleventh output flag is a flag for specifying by the main CPU 63 that information output indicating that the game round has been started is to be executed to the management IC 66.

  Returning to the description of the special figure special power control processing (FIG. 52), the special figure changing processing is executed in step S407. In the special figure changing process, it is determined whether or not the timing is during the continuation time of the game times and before the final stop display, and if it is before the final stop display, the display mode of the pattern on the special figure display unit 37a is regulated. A process for changing the target is executed. When the timing to display the final stop is reached, the numerical information of the special figure special power counter is incremented by one, so that the numerical information of the counter is changed from the processing corresponding to the special figure changing processing to the special figure fixing processing. Update to something. In this embodiment, the final stop command is not transmitted from the main CPU 63 to the sound emission control device 81.

  In step S408, a special figure fixing process is executed. In the special figure determination process, the display mode of the picture on the special figure display section 37a is set to a display mode corresponding to the lottery result of the current game. In the special figure determination process, it is determined whether or not the final stop period has elapsed. If the final stop period has elapsed, it is determined whether or not a shift to the open / close execution mode occurs. If the shift to the open / close execution mode does not occur, the numerical information of the special figure special power counter is cleared to “0”. When the shift to the open / close execution mode occurs, the numerical information of the special figure special power counter is incremented by one to change the numerical information of the counter from the one corresponding to the special figure fixing processing to the one corresponding to the special power starting processing. Update.

  In step S409, a special power starting process is executed. In the special power start process, if the process for starting the opening period in the current open / close execution mode has not been executed yet, the opening period setting process is executed. Further, an opening command is transmitted to the sound emission control device 81. Upon receiving the opening command, the voice light emission control device 81 causes the display light emitting unit 53, the speaker unit 54, and the symbol display device 41 to execute the opening effect. If the opening period has elapsed, start processing for starting the first round game is executed. In the start processing, the special power winning device 32 is set to the open state, and the end condition of the round game is set. In setting the end condition, an upper limit continuation time when the special power winning device 32 is kept open in the current first round game is set, and the special power winning device 32 can be won in the current first round game. The upper limit number of the game balls is set in a winning counter provided in the main RAM 65.

  In step S410, a special power opening process is executed. In the special power opening process, it is determined whether or not the end condition of the round game is satisfied. If the end condition is satisfied, the special power winning device 32 is closed. If the round game that has been completed this time is not the last round game, the numerical information of the special figure special power counter is incremented by one to change the numerical information of the counter from the processing corresponding to the special power open processing to the special power close processing. If the round game ended this time is the last run round game, the numerical information of the special figure special power counter is added by 2, and the numerical information of the counter corresponds to the special power open processing. It is updated from the one corresponding to the special power termination processing.

  In step S411, a special power closing process is executed. In the special power closing process, it is determined whether or not an interval period between round games has elapsed. The interval period is set when the previous round game ends. When the interval period has elapsed, the special power winning device 32 is set in an open state, and an end condition of the round game is set. Then, by subtracting 1 from the numerical information of the special figure special power counter, the numerical information of the counter is updated from the one corresponding to the special power closing processing to the one corresponding to the special power opening processing.

  In step S412, a special power termination process is performed. In the special power ending process, if the process for starting the ending period in the current open / close execution mode has not been executed, the ending period (for example, 5 seconds) is set, and the ending command is transmitted to the sound emission control device 81. . Upon receiving the ending command, the voice light emission control device 81 causes the display light emitting unit 53, the speaker unit 54, and the symbol display device 41 to execute an ending effect. When the ending period has elapsed, each of the success / failure lottery mode and the support mode after the end of the opening / closing execution mode is set to a mode corresponding to the jackpot result that triggered the start of the current opening / closing execution mode.

  Next, in the main CPU 63, based on the detection results of the incoming ball detection sensors 42a to 49a, the out port 24a, the general prize port 31, the special power prize device 32, the first operation port 33, the second operation port 34, and the through port. A configuration for specifying whether or not a game ball has entered the gate 35 will be described. FIG. 14 is an explanatory diagram for describing a configuration in which the detection results of the incoming ball detection sensors 42 a to 49 a are input to the main CPU 63.

  The main CPU 63 is provided with an input port 63a. The input port 63a is configured as an 8-bit parallel interface so that eight types of signals can be handled simultaneously. An area in which information of “0” or “1” is stored according to the voltage of each signal is provided in one-to-one correspondence with each terminal. That is, the area includes the 0th bit D0 to the 7th bit D7. Also, more than eight types of signals are input to the input port 63a. In order to limit the number of simultaneously input targets to eight types, a signal group to be input to the input port 63a is determined by the driver IC. It is switched through the switching control.

  In the incoming ball detection process (step S309) of the timer interrupt process (FIG. 11), a signal group to be input to the input port 63a is set to a signal group from each of the incoming ball detection sensors 42a to 49a. In such a setting, the 0th bit D0 stores information corresponding to the detection signal from the first winning opening detection sensor 42a, and the first bit D1 corresponds to the detection signal from the second winning opening detection sensor 43a. The second bit D2 stores information corresponding to the detection signal from the third winning opening detection sensor 44a, and the third bit D3 stores information corresponding to the detection signal from the special power detection sensor 45a. , The fourth bit D4 stores information corresponding to the detection signal from the first working port detection sensor 46a, and the fifth bit D5 stores information corresponding to the detection signal from the second working port detection sensor 47a. Six bits D6 store information corresponding to the detection signal from the out mouth detection sensor 48a, and the seventh bit D7 stores information corresponding to the detection signal from the gate detection sensor 49a. It is.

  Each of the above-mentioned incoming ball detection sensors 42a to 49a outputs a LOW level signal indicating that detection is not being performed as a detection signal when the passage of a game ball is not detected, and detects the passage of the game ball. In this case, an HI level signal indicating that detection is being performed is output as a detection signal. The input port 63a stores “0” information for a corresponding bit when a LOW level signal is received, and stores “1” for a corresponding bit when a HI level signal is received. The information of is stored. In other words, in the situation where the passing of the game ball is not detected by the ball detection sensors 42a to 49a, information of "0" corresponding to the information indicating that the ball is not detected is stored in the corresponding bit, and the passage of the game ball is determined. In the detected state, the information of “1” corresponding to the information indicating that the bit is being detected is stored for the corresponding bit.

  FIG. 15 is a flowchart showing the incoming ball detection process executed in step S309 of the timer interrupt process (FIG. 11).

  When it is confirmed that the state where the information of “0” is stored in the 0th bit D0 is changed to the state where the information of “1” is stored, one first winning opening detection sensor 42a detects one switch. It is determined that a game ball has been detected (step S601: YES). In this case, the first output flag provided in the main RAM 65 is set to "1" (step S602), and the value of the ten prize ball counter provided in the main RAM 65 is incremented by 1 (step S603). . The first output flag is used by the main CPU 63 to specify that information output indicating that one game ball has been detected by the first winning opening detection sensor 42a should be executed to the management IC 66. This is a flag. The ten prize ball counter is a counter for specifying the number of times that the payout of ten game balls should be executed by the main CPU 63. When the value of the ten-prize-ball counter is 1 or more, the ten-prize-ball command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (FIG. 11), and the ten-prize-ball command is output. When the command is output once, the value of the ten prize balls counter is decremented by one. When receiving the ten prize ball commands, the payout control device 77 drives and controls the payout device 76 so that ten game balls are paid out.

  When it is confirmed that the state where the information of “0” is stored in the first bit D1 is changed to the state where the information of “1” is stored, one second winning opening detection sensor 43a detects one state. It is determined that a game ball has been detected (step S604: YES). In this case, "1" is set to the second output flag provided in the main RAM 65 (step S605), and the value of the ten prize ball counter provided in the main RAM 65 is incremented by 1 (step S606). . The second output flag is used by the main CPU 63 to specify that information output indicating that one game ball has been detected by the second winning opening detection sensor 43a should be executed to the management IC 66. It is a flag.

  When it is confirmed that the state where the information of “0” is stored in the second bit D2 is switched to the state where the information of “1” is stored, one third winning opening detection sensor 44a detects one switch. It is determined that a game ball has been detected (step S607: YES). In this case, "1" is set to the third output flag provided in the main RAM 65 (step S608), and the value of the ten prize ball counter provided in the main RAM 65 is incremented by 1 (step S609). . The third output flag is used by the main CPU 63 to specify that the information output indicating that one game ball has been detected by the third winning opening detection sensor 44a should be executed to the management IC 66. It is a flag.

  When it is confirmed that the state where the information of “0” is stored in the third bit D3 is changed to the state where the information of “1” is stored, one game ball is detected by the special power detection sensor 45a. It is determined that it has been detected (step S610: YES). In this case, the special power winning flag provided in the main RAM 65 is set to "1" (step S611), and the fourth output flag provided in the main RAM 65 is set to "1" (step S612). The value of the 15 award ball counter provided in the main RAM 65 is incremented by 1 (step S613). The special power winning flag is a flag for the main CPU 63 to specify that one game ball has entered the special power winning device 32 in the round game in the open / close execution mode. In the special figure special power control processing (step S313) of the timer interrupt processing (FIG. 11), by confirming that the special power winning flag is set to "1", one game ball is inserted into the special power winning apparatus 32. It is determined that a ball has been generated, and the remaining number of balls that can enter the special power winning device 32 in the round game is decremented by one. When the process of subtracting 1 from the number of possible balls is executed, the special power winning flag is cleared to “0”. The fourth output flag is a flag for specifying by the main CPU 63 that information output indicating that one game ball has been detected by the special power detection sensor 45a should be executed to the management IC 66. . The 15 prize ball counter is a counter for specifying the number of times the payout of 15 game balls should be executed by the main CPU 63. If the value of the 15-prize-ball counter is 1 or more, the 15-prize-ball command is output to the payout control device 77 in the payout output processing of step S317 in the timer interrupt processing (FIG. 11), and the 15-prize-ball is output. When the command is output once, the value of the 15 prize ball counter is decremented by one. When receiving the 15 prize ball commands, the payout control device 77 drives and controls the payout device 76 so that 15 game balls are paid out.

  When it is confirmed that the state where the information of “0” is stored in the fourth bit D4 is changed to the state where the information of “1” is stored, one first opening detection sensor 46a detects one switch. It is determined that a game ball has been detected (step S614: YES). In this case, the first operation winning flag provided in the main RAM 65 is set to "1" (step S615), and the fifth output flag provided in the main RAM 65 is set to "1" (step S616). Further, the value of the one-prize-ball counter provided in the main RAM 65 is incremented by 1 (step S617). The first operation winning flag is a flag for the main CPU 63 to specify that one game ball has entered the first operation port 33. In the special figure special power control processing (step S313) of the timer interrupt processing (FIG. 11), by confirming that the first operation winning flag is set to "1", the first operation winning flag is stored in the hold area RE of the hold storage area 65a. On the condition that the number of pieces of pending information stored is less than the upper limit number of four, a process of newly storing the pending information is executed. It is confirmed that the first operation winning flag is set to "1" in the special electric power controlling process (step S313), and when the processing corresponding to the confirmation is executed, the first operation winning flag is cleared to "0". I do. The fifth output flag is used by the main CPU 63 to specify that information output indicating that one game ball has been detected by the first operating port detection sensor 46a should be executed to the management IC 66. This is a flag. The one prize ball counter is a counter for specifying the number of times that one game ball should be paid out by the main CPU 63. When the value of the one-prize-ball counter is 1 or more, the one-prize-ball command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (FIG. 11), and the one-prize-ball is also provided. When the command is output once, the value of the one prize ball counter is decremented by one. When receiving the one prize ball command, the payout control device 77 drives and controls the payout device 76 so that one game ball is paid out.

  When it is confirmed that the state where the information of “0” is stored in the fifth bit D5 is changed to the state where the information of “1” is stored, one second opening detection sensor 47a detects one switch. It is determined that a game ball has been detected (step S618: YES). In this case, "1" is set to the second operation winning flag provided in the main RAM 65 (step S619), and "1" is set to the sixth output flag provided in the main RAM 65 (step S620). Then, the value of the one prize ball counter provided in the main RAM 65 is incremented by 1 (step S621). The second operation winning flag is a flag for specifying by the main CPU 63 that one game ball has entered the second operation port 34. In the special figure special electric power control processing (step S313) of the timer interrupt processing (FIG. 11), by confirming that the second operation winning flag is set to "1", it is stored in the holding area RE of the holding storage area 65a. On the condition that the number of pieces of pending information stored is less than the upper limit number of four, a process of newly storing the pending information is executed. It is confirmed that "1" is set in the second operation winning flag in the special electric power controlling process (step S313), and when the process corresponding to the confirmation is executed, the second operation winning flag is cleared to "0". I do. The sixth output flag is used by the main CPU 63 to specify that information output indicating that one game ball has been detected by the second operating port detection sensor 47a should be executed to the management IC 66. It is a flag.

  When it is confirmed that the state where the information of "0" is stored in the sixth bit D6 is changed to the state where the information of "1" is stored, one game ball is detected by the out-mouth detection sensor 48a. Is detected (step S622: YES). In this case, "7" is set to the seventh output flag provided in the main RAM 65 (step S623). The seventh output flag is a flag for specifying by the main CPU 63 that information output indicating that one game ball has been detected by the out-mouth detection sensor 48a should be executed to the management IC 66. is there.

  When it is confirmed that the state where the information of “0” is stored in the seventh bit D7 is changed to the state where the information of “1” is stored, one game ball is detected by the gate detection sensor 49a. It is determined that it has been detected (step S624: YES). In this case, "1" is set to the gate winning flag provided in the main RAM 65 (step S625). The gate winning flag is a flag for the main CPU 63 to specify that one game ball has entered the through gate 35. In the general-purpose power control process (step S314) of the timer interrupt process (FIG. 11), by confirming that the gate winning flag is set to "1", the general-purpose power stored in the general-power holding area 65c is confirmed. Processing of storing the current numerical information of the general-purpose accessory opening counter C4 in the general-purpose holding area 65c as the general-purpose side holding information, provided that the number of hold information on the side is less than the upper limit number of four. Execute It is confirmed that "1" is set in the gate winning flag in the ordinary figure general control process (step S314), and when the process corresponding to the confirmation is executed, the gate winning flag is cleared to "0".

  Since the timer interrupt process (FIG. 11) is started at a cycle of 4 milliseconds as described above, when one of the ball detection sensors 42a to 49a starts detecting one game ball, the timer interrupt process (FIG. 11) is started. In the situation where the detection of one game ball is continued by the ball detection sensors 42a to 49a, the main CPU 63 determines that one game ball has been detected by the ball detection sensors 42a to 49a. It is performed in. Therefore, it is sufficient that the first to seventh output flags are provided one by one.

  Next, the contents of processing executed by the payout control device 77 will be described. First, the electrical configuration of the payout control device 77 and various devices that communicate with the payout control device 77 will be described with reference to the block diagram of FIG.

  The payout control device 77 includes an MPU 91. The MPU 91 incorporates a payout ROM 93, a payout RAM 94, an interrupt circuit, a timer circuit, a data input / output circuit, and the like, in addition to the payout CPU 92 which is an arithmetic processing device including a control unit and a calculation unit.

  The payout side ROM 93 is a memory such as a NOR type flash memory and a NAND type flash memory which does not require an external power supply for storage (that is, a non-volatile storage unit), and is used as a read-only memory. The payout ROM 93 stores various control programs executed by the payout CPU 92 and fixed value data.

  The payout side RAM 94 is a memory such as an SRAM and a DRAM that requires an external power supply for storing and storing data (that is, volatile storage means), and is used for both reading and writing. The payout RAM 94 is capable of random access and has a shorter read time than the payout ROM 93 when compared with the same data capacity. The payout RAM 94 temporarily stores various data and the like for the execution of the control program stored in the payout ROM 93.

  The payout CPU 92 is capable of performing bidirectional communication with the main CPU 63. Upon receiving the prize ball command from the main CPU 63, the payout CPU 92 drives and controls the payout device 76 so that the number of game balls corresponding to the prize ball command is paid out. The payout-side CPU 92 monitors whether or not the game balls can be normally paid out. If the payout-side CPU 92 specifies that the game balls cannot be normally paid out, the payout-side RAM 94 is stored in the payout RAM 94. The payout device 76 is stopped even in a situation where the unpaid prize ball number information is stored. In addition, the payout-side CPU 92 transmits a payout restriction command to the main-side CPU 63 indicating that the payout is not normally performed. When the main CPU 63 receives the payout restriction command, the symbol display device 41, the display light emitting unit 53, and the speaker unit 54 execute a notification indicating that the payout of the game balls is not normally performed. The notification command is transmitted to the voice light emission control device 81 so as to be executed. As a state where it is not possible to normally pay out the game balls, a full state where the lower plate 56a is full of the game balls, a state where the game balls are not refilled in the tank 75, and a state where the ball is not replenished, the payout device 76 There is an abnormal payout state in which does not operate normally, a main body open state in which the gaming machine main body 12 is opened from the outer frame 11, and a front door open state in which the front door frame 14 is opened from the inner frame 13. .

  A full tank detection sensor (not shown) is provided at an intermediate position of the game ball passage leading from the payout device 76 to the lower plate 56a, and the detection result of the full tank detection sensor is input to the payout CPU 92. The payout-side CPU 92 specifies that the game ball is in the full state when the game ball is continuously detected by the full tank detection sensor, and the state in which the game ball is continuously detected by the full tank detection sensor is released. In this case, it is specified that the full state has been released.

  A ball non-detection sensor (not shown) is provided at an intermediate position of the game ball passage leading from the tank 75 to the payout device 76, and the detection result of the ball non-detection sensor is input to the payout CPU 92. The payout side CPU 92 specifies that the game ball is not detected when the game ball is not continuously detected by the ball non-detection sensor, and when the state that the game ball is not continuously detected by the ball non-detection sensor is released. Specifies that the ballless state has been released.

  The payout device 76 is provided with a payout detection sensor (not shown) for detecting a game ball paid out from the payout device 76, and the detection result of the payout detection sensor is input to the payout CPU 92. The payout-side CPU 92 specifies that one game ball has been paid out from the payout device 76 when the game ball is detected by the payout detection sensor. Further, the payout-side CPU 92 identifies that the payout is abnormal when the payout detection sensor does not continuously detect the game ball despite the drive control of the payout device 76 so that the game ball is paid out. When the state where the game ball is not continuously detected by the payout detection sensor is released, it is specified that the abnormal payout state has been released.

  A front door opening sensor 95 is provided on the front surface of the inner frame 13 (see FIG. 2), and the detection result of the front door opening sensor 95 is input to the payout CPU 92. In this case, when the front door frame 14 is closed with respect to the inner frame 13, the front door open sensor 95 transmits a close detection signal to the payout side CPU 92, and the front door frame 14 is opened with respect to the inner frame 13. In this case, the front door opening sensor 95 transmits an opening detection signal to the payout side CPU 92. The payout-side CPU 92 specifies that the front door frame 14 is in the closed state when receiving the closing detection signal from the front door opening sensor 95, and determines when the opening detection signal is received from the front door opening sensor 95. It is specified that the front door frame 14 is in the open state. Further, the payout-side CPU 92 transmits a front door opening command to the main CPU 63 at the timing when the front door frame 14 specifies that the front door frame 14 has changed from the closed state to the open state, and specifies that the front door frame 14 has changed from the open state to the closed state. At this timing, a front door closing command is transmitted to the main CPU 63. The main CPU 63 specifies that the front door frame 14 has been opened when the front door opening command is received, and specifies that the front door frame 14 is closed when the front door closing command is received.

  A main body opening sensor 96 is provided on the front surface of the back pack unit 15 (see FIG. 2), and the detection result of the main body opening sensor 96 is input to the payout side CPU 92. In this case, when the gaming machine main body 12 is in the closed state with respect to the outer frame 11, the main body opening sensor 96 transmits a closing detection signal to the payout side CPU 92, and the gaming machine main body 12 is opened with respect to the outer frame 11. In some cases, the body opening sensor 96 transmits an opening detection signal to the payout CPU 92. The payout CPU 92 determines that the gaming machine main body 12 is in the closed state when receiving the closing detection signal from the main body opening sensor 96, and determines that the gaming machine main body 12 is closed when receiving the opening detection signal from the main body opening sensor 96. It is specified that the main body 12 is in the open state. Further, the payout CPU 92 transmits a main body opening command to the main CPU 63 at a timing that specifies that the gaming machine main body 12 has changed from the closed state to the open state, and specifies that the gaming machine main body 12 has changed from the open state to the closed state. A main body closing command is transmitted to the main CPU 63 at the timing. The main CPU 63 specifies that the gaming machine main body 12 has been opened when the main body opening command is received, and specifies that the gaming machine main body 12 is closed when the main body closing command is received.

  The timer interrupt process executed by the payout CPU 92 will be described with reference to the flowchart of FIG. The timer interrupt process is started repeatedly at a predetermined cycle (for example, 2 milliseconds).

  First, a full tank process is executed (step S701). In the full tank process, as described above, it is determined whether or not the tank is full based on the detection result of the full tank detection sensor. And sends a command indicating that the tank is full to the main CPU 63. When the full state is released, a process for enabling the payout of the game ball is executed, and a command indicating that the full state is released is transmitted to the main CPU 63.

  After that, the ball unnecessary process is executed (step S702). In the ball-free process, as described above, it is determined whether or not the ball is in a state without a ball based on the detection result of the ball-absence detection sensor. At the same time as executing the command, a command indicating that there is no ball is transmitted to the main CPU 63. When the absence of ball state is released, a process for enabling the payout of game balls is executed, and a command indicating that the absence of ball state is released is transmitted to the main CPU 63.

  After that, a payout abnormality monitoring process is executed (step S703). In the payout abnormality monitoring processing, as described above, it is specified whether or not the payout is abnormal based on the detection result of the payout detection sensor, and in the case of the payout abnormal state, the processing of stopping the payout of the game ball is executed. At the same time, a command indicating the abnormal payout state is transmitted to the main CPU 63. Further, when the abnormal payout state is released, a process for enabling the payout of the game balls is executed, and a command indicating that the abnormal payout state is released is transmitted to the main CPU 63.

  Thereafter, a front door opening monitoring process is executed (step S704). In the front door opening monitoring process, as described above, it is determined whether or not the front door frame 14 is open based on the detection result of the front door opening sensor 95, and if the front door frame 14 is open, A process of stopping the payout of game balls is executed, and a front door opening command is transmitted to the main CPU 63. When the front door frame 14 is closed, a process for enabling payout of game balls is executed, and a front door closing command is transmitted to the main CPU 63.

  Thereafter, the main body opening monitoring process is executed (step S705). In the main body opening monitoring process, as described above, it is specified whether or not the gaming machine main body 12 is in an open state based on the detection result of the main body opening sensor 96. The processing for stopping the payout is executed, and the main body release command is transmitted to the main CPU 63. When the gaming machine main body 12 is closed, the processing for enabling the payout of gaming balls is executed, and a main body closing command is transmitted to the main CPU 63.

  After that, a command reading process is executed (step S706). In the command reading process, the main CPU 63 executes a process of reading a prize ball command transmitted, and stores the prize ball command in the payout RAM 94. Then, after executing the prize ball setting process for adding the number corresponding to the received prize ball command to the unpaid prize ball number information in the payout RAM 94 (step S707), the payout device 76 pays out the game balls. A payout control process for performing the execution control is executed (step S708). In the payout control process, when the information on the number of unpaid prize balls stored in the payout RAM 94 is 1 or more, the drive control of the payout device 76 is performed, and one game ball is detected by the payout detection sensor. In this case, the value of the winning ball number information is decremented by one. When the value of the prize ball number information becomes “0”, the drive control of the payout device 76 is stopped. Thereafter, an external information setting process for controlling the start and end of the output of the external signal according to the processing result of the various processes executed in the current timer interrupt process is executed (step S709).

  Next, a configuration for externally outputting information from the pachinko machine 10 to the hall computer HC provided in the game hall will be described.

  As shown in FIG. 2, the back pack unit 15 is provided with an external terminal plate 97. The external terminal plate 97 is provided with a large number of external terminals, some of which are electrically connected to the main CPU 63 and some of which are external terminals. A plurality of external terminals are electrically connected to the payout CPU 92. Since each of the main CPU 63 and the payout CPU 92 is electrically connected to the external terminal plate 97 as described above, the main CPU 63 and the payout CPU 92 transmit information to the hall computer HC as shown in FIG. It is possible to output.

  One external terminal of the external terminal plate 97 is electrically connected to the front door opening sensor 95, and one external terminal of the external terminal plate 97 is electrically connected to the main body opening sensor 96. More specifically, a signal relay board 98 is provided at an intermediate position of a signal path from the front door opening sensor 95 to the payout side CPU 92. The signal relay board 98 is provided with a branch path SL2 branched from a signal path SL1 from the front door opening sensor 95 to the payout side CPU 92. The branch path SL2 is connected to an external terminal for opening the front door of the external terminal plate 97. Therefore, the electric signal corresponding to the detection result of the front door opening sensor 95 is input not only to the payout side CPU 92 but also to the front door opening external terminal of the external terminal board 97. Accordingly, a signal indicating whether or not the front door frame 14 is in an open state can be output to the hall computer HC without the control of the payout CPU 92.

  More specifically, the main body opening sensor 96 is provided on the signal relay board 98 with a branch path SL4 that branches off from the signal path SL3 from the main body opening sensor 96 to the payout side CPU 92. The branch path SL4 is connected to an external terminal for opening the main body of the external terminal plate 97. Therefore, an electric signal corresponding to the detection result of the main body opening sensor 96 is input not only to the payout side CPU 92 but also to an external terminal for opening the main body in the external terminal board 97. As a result, a signal indicating whether or not the gaming machine main body 12 is in an open state can be output to the hall computer HC without the control of the payout CPU 92.

  Next, the contents of information externally output from the main CPU 63 and the payout CPU 92 to the hall computer HC will be described. First, the contents of information externally output from the main CPU 63 to the hall computer HC will be described.

  In the external information setting process (step S318) in the timer interrupt process (FIG. 11), the main CPU 63 sets the output of information to each external terminal assigned to the main CPU 63 on the external terminal board 97. As information output from the main CPU 63 to the external terminal board 97, information indicating that the open / close execution mode is in progress, information indicating that the support mode is in the high frequency support mode, and one game round has ended. And a predetermined number (for example, 100) of game balls from the game area PA through one of the out port 24a, the general winning port 31, the special power winning device 32, the first operating port 33, and the second operating port 34. Information indicating that the game ball has been ejected, information indicating that a game ball has entered the first operating port 33, and information indicating that a game ball has entered the second operating port 34 are included. .

  In the external information setting process (step S709) in the timer interrupt process (FIG. 17), the payout CPU 92 performs output setting of information to each external terminal assigned to the payout CPU 92 on the external terminal board 97. The information output from the payout-side CPU 92 to the external terminal board 97 includes information indicating that ten game balls have been paid out.

In accordance with various information received from the pachinko machine 10 through the external terminal board 97, the hall computer HC can grasp the execution mode of the payout of the game balls in the pachinko machine 10, and the like. For example,
A payout rate, which is a percentage of the number of game balls paid out until 100 game balls are discharged from the game area PA of the pachinko machine 10; a payout rate in an open / close execution mode; Ball rate (hereinafter, this ball rate is referred to as "B")
The payout rate in the open / close execution mode, the payout rate in the high-frequency support mode, the number of game times executed until 100 game balls are discharged from the game area PA of the pachinko machine 10 (hereinafter, this ratio is referred to as ("S")
・ BS × “Number of prize balls for winning in the first operating port 33 and the second operating port 34”
The number of game balls entering the first operation port 33 generated until 100 game balls are discharged from the game area PA of the pachinko machine 10 (hereinafter, this ratio is referred to as “S1”)
The number of game balls entering the second operating port 34 generated until 100 game balls are discharged from the game area PA of the pachinko machine 10 (hereinafter, this ratio is referred to as “S2”)
B- (S1 × “the number of winning balls for winning the first operating port 33” + S2 × “the number of winning balls for winning the second operating port 34”)
The occurrence probability of the open / close execution mode per unit game time, the occurrence probability of the high frequency support mode per unit game time, and the like are calculated. As a result, it becomes possible for the hall computer HC to manage the ball entry mode in the game area PA of the pachinko machine 10. The number of prize balls is the number of game balls paid out when one game ball enters the corresponding ball entry section.

<Configuration for managing winning modes of gaming balls>
Next, a configuration for managing the game history using the management IC 66 will be described. First, the electrical configuration of the management IC 66 will be described with reference to the block diagram of FIG.

  As described above, the MPU 62 of the main control device 60 includes the main CPU 63, the main ROM 64, the main RAM 65, and the management IC 66. In addition, the MPU 62 includes the I / F 101 in addition to the above, and also includes the reading terminal 68d described above.

  The I / F 101 is an interface for transmitting and receiving signals to and from a device external to the MPU 62. The I / F 101 is electrically connected to the main CPU 63 via the internal bus 103. Detection results from sensors such as the ball detection sensors 42a to 49a and commands from the payout CPU 92 are input to the MPU 62 through input ports of the I / F 101, and based on the input detection results and the contents of the commands. Various processes are executed by the main CPU 63 as described above. When a signal is output to a device such as a special power drive unit 32b as a result of various processes performed by the main CPU 63, the signal is output through an output port of the I / F 101, and As a result of execution of various processes by the CPU 63, when a command is output to the payout-side CPU 92 and the sound emission control device 81, the command is output through an output port of the I / F 101.

  The management IC 66 includes a management I / F 111, a management CPU 112, a management ROM 113, a management RAM 114, an RTC 115, a correspondence memory 116, a history memory 117, a calculation result memory 131, It has. These devices are connected via an internal bus 66a provided in the management IC 66 so as to be capable of bidirectional communication.

  The management-side I / F 111 receives various signals from the main-side CPU 63 via the one-way communication signal path group 118 built in the MPU 62, and also controls the one-way communication signal path group 119 built in the MPU 62. This is an interface for transmitting various signals to the reading terminal 68d through the interface. Various signals from the main CPU 63 are input to an input port of the management I / F 111, and various signals to the reading terminal 68d are output from an output port of the management I / F 111. The main CPU 63 is electrically connected to the reading terminal 68d via a signal path group 120 for bidirectional communication built in the MPU 62.

  The management CPU 112 is an arithmetic processing device including a control unit and an arithmetic unit. The management-side ROM 113 is a memory such as a NOR flash memory and a NAND flash memory that does not require an external power supply for storing and storing data (that is, a nonvolatile storage unit), and is used as a read-only memory. The management ROM 113 stores various control programs executed by the management CPU 112 and fixed value data. The management-side RAM 114 is a memory such as an SRAM and a DRAM that requires an external power supply for storing and storing data (that is, a volatile storage unit), and is used for both reading and writing. The management-side RAM 114 allows random access, and has a shorter read time than the management-side ROM 113 when compared with the same data capacity. The management-side RAM 114 temporarily stores various data and the like when the control program stored in the management-side ROM 113 is executed.

  The RTC 115 is a real-time clock that constantly measures date / time information and time information, and outputs the measured date / time information and time information (hereinafter, also referred to as date / time information) according to an instruction from the management CPU 112. It is a configuration that can be used. The RTC 115 is provided with a backup power supply, so that the date and time information and the time information can be measured even while the power of the pachinko machine 10 is shut off.

  The correspondence memory 116 is a memory such as an SRAM and a DRAM that requires an external power supply for storage and storage (that is, volatile storage means), and is used for both reading and writing. The correspondence memory 116 stores information on the correspondence between the buffers 122a to 122p provided at the input port 121 of the management-side I / F 111 and the types of signals input to the buffers 122a to 122p. Used for Details of the contents of the correspondence memory 116 will be described later.

  The history memory 117 is a memory such as a NOR flash memory and a NAND flash memory that does not require an external power supply for storing and storing data (that is, a nonvolatile storage unit), and is used for both reading and writing. The history memory 117 is used to store information about the game history received from the main CPU 63 through the management I / F 111. Details of the contents of the history memory 117 will be described later.

  The operation result memory 131 is a memory such as a NOR flash memory and a NAND flash memory that does not require an external power supply for storing and holding (that is, a nonvolatile storage unit), and is used for both reading and writing. The calculation result memory 131 is used to sequentially store various parameters calculated by the management-side CPU 112 using the history information stored in the history memory 117. The contents of various parameters stored in the calculation result memory 131 are sequentially displayed on the first to third notification display devices 69a to 69c, and are output to an external device connected to the reading terminal 68d.

  Next, the configuration of the input port 121 provided in the management-side I / F 111 will be described. FIG. 19 is an explanatory diagram for explaining the configuration of the input port 121 of the management-side I / F 111.

  The input port 121 is provided with a plurality of buffers 122a to 122p. Specifically, first to sixteenth buffers 122a to 122p are provided. One type of signal can be input to each of the first to sixteenth buffers 122a to 122p through signal paths 118a to 118p, and each of the first to sixteenth buffers 122a to 122p is a signal to be input. When the signal is at the LOW level, information of "0" is stored as the first data, and when the signal to be input is at the HI level, the information of "1" is stored as the second data. Note that the relationship between the LOW and HI and the first data and the second data may be reversed.

  The first signal corresponding to the detection result of the first winning opening detection sensor 42a is input to the first buffer 122a. In this case, the main CPU 63 outputs a LOW level first signal when no new gaming ball is detected by the first winning opening detection sensor 42a, and one game is output by the first winning opening detection sensor 42a. When a ball is detected, a first signal at the HI level is output for a specific period. This specific period is a period sufficient for the management-side CPU 112 to specify that the first signal at the HI level is being input to the first buffer 122a.

  A second signal corresponding to the detection result of the second winning opening detection sensor 43a is input to the second buffer 122b. In this case, the main CPU 63 outputs a LOW level second signal when no new gaming ball is detected by the second winning opening detection sensor 43a, and one game is output by the second winning opening detection sensor 43a. When a ball is detected, a second signal at the HI level is output for a specific period. This specific period is a period sufficient for the management-side CPU 112 to specify that the second signal at the HI level is being input to the second buffer 122b.

  A third signal corresponding to the detection result of the third winning opening detection sensor 44a is input to the third buffer 122c. In this case, the main CPU 63 outputs a LOW level third signal when no new game ball is detected by the third winning opening detection sensor 44a, and one game is output by the third winning opening detection sensor 44a. When a ball is detected, a third signal at the HI level is output for a specific period. This specific period is a period sufficient for the management-side CPU 112 to specify that the third signal at the HI level is being input to the third buffer 122c.

  A fourth signal corresponding to the detection result of the special power detection sensor 45a is input to the fourth buffer 122d. In this case, the main CPU 63 outputs a LOW level fourth signal when no new game ball is detected by the special power detection sensor 45a, and when one game ball is detected by the special power detection sensor 45a. And outputs a HI level fourth signal for a specific period. This specific period is a period sufficient for the management-side CPU 112 to specify that the HI-level fourth signal is being input to the fourth buffer 122d.

  The fifth signal corresponding to the detection result of the first working port detection sensor 46a is input to the fifth buffer 122e. In this case, the main CPU 63 outputs a LOW level fifth signal when no new game ball is detected by the first operation port detection sensor 46a, and one game is output by the first operation port detection sensor 46a. When a ball is detected, a fifth signal at the HI level is output for a specific period. This specific period is a period sufficient for the management-side CPU 112 to specify that the fifth signal at the HI level is being input to the fifth buffer 122e.

  A sixth signal corresponding to the detection result of the second working port detection sensor 47a is input to the sixth buffer 122f. In this case, the main CPU 63 outputs a sixth signal at the LOW level in a situation where a new game ball is not detected by the second operation port detection sensor 47a, and one game is output by the second operation port detection sensor 47a. When a ball is detected, a sixth signal at the HI level is output for a specific period. This specific period is a period sufficient for the management-side CPU 112 to specify that the sixth signal at the HI level is being input to the sixth buffer 122f.

  A seventh signal corresponding to the detection result of the out-mouth detection sensor 48a is input to the seventh buffer 122g. In this case, the main CPU 63 outputs a LOW level seventh signal when no new game ball is detected by the out-mouth detection sensor 48a, and one game ball is detected by the out-mouth detection sensor 48a. In this case, the HI-level seventh signal is output for a specific period. This specific period is a period sufficient for the management-side CPU 112 to specify that the seventh signal at the HI level is being input to the seventh buffer 122g.

  An eighth signal corresponding to whether or not the open / close execution mode is in progress is input to the eighth buffer 122h. In this case, the main CPU 63 continuously outputs the LOW level eighth signal in a state other than the open / close execution mode, and continuously outputs an HI level eighth signal in the state of the open / close execution mode.

  A ninth signal corresponding to whether or not the high-frequency support mode is in progress is input to the ninth buffer 122i. In this case, the main CPU 63 continuously outputs the LOW-level ninth signal in a situation other than the high-frequency support mode, and continuously outputs a HI-level ninth signal in the situation of the high-frequency support mode.

  A tenth signal corresponding to whether or not the front door frame 14 is open is input to the tenth buffer 122j. In this case, the main CPU 63 continuously outputs the LOW level tenth signal when the front door frame 14 is closed, and continues the HI level tenth signal when the front door frame 14 is open. And output.

  An eleventh signal corresponding to whether or not the game round has been started is input to the eleventh buffer 122k. In this case, the main CPU 63 continuously outputs the LOW level eleventh signal until the game round is started, and outputs the HI level eleventh signal for a specific period when the game round is started. I do. This specific period is a period sufficient for the management-side CPU 112 to specify that the HI-level eleventh signal is being input to the eleventh buffer 122k.

  A setting value update signal for causing the management-side CPU 112 to recognize that the setting of the pachinko machine 10 has been newly set by the main-side CPU 63 is input to the fifteenth buffer 122o. In this case, the main CPU 63 outputs a LOW level set value update signal in a situation where a new setting of the setting state of the pachinko machine 10 has not been performed. And outputs a pulse signal in which the set value update signal of the HI level is maintained for a specific period for a number corresponding to the newly set value. This specific period is a period sufficient for the management-side CPU 112 to specify that the HI level set value update signal has been input to the fifteenth buffer 122o.

  In the sixteenth buffer 122p, an output instruction signal for causing the management CPU 112 to recognize a trigger for outputting the history information stored in the history memory 117 and various parameters stored in the operation result memory 131 to the reading terminal 68d is provided. Will be entered. In this case, the main CPU 63 outputs a LOW level output instruction signal when there is no need to output history information, and outputs an HI level output instruction signal for a specific period when it is necessary to output history information. I do. This specific period is a period sufficient for the management-side CPU 112 to specify that the HI-level output instruction signal has been input to the sixteenth buffer 122p.

  Although the twelfth buffer 122l, the thirteenth buffer 122m, and the fourteenth buffer 122n can input a signal from the main CPU 63, the pachinko machine 10 is blank in which a normal signal is not input. As described above, the number of buffers 122a to 122p larger than the types of signals output from the main CPU 63 to the management IC 66 in the pachinko machine 10 is provided as the input port 121 of the management I / F 111, The management IC 66 can be used for a model different from the pachinko machine 10. Thereby, the versatility of the management IC 66 can be improved. Incidentally, signal paths 118a to 118p are formed between the main CPU 63 and each of the first to sixteenth buffers 122a to 122p so as to correspond to the first to sixteenth buffers 122a to 122p on a one-to-one basis. However, the present invention is not limited to this, and the signal paths 118l to 118n may not be formed between the buffers 122l to 122n to be blanked.

  The input of the set value update signal to the fifteenth buffer 122o and the input of the output instruction signal to the sixteenth buffer 122p have been determined at the design stage of the management IC 66, and have received an instruction from the main CPU 63. Instead, the management-side CPU 112 can specify that the set value update signal is input to the fifteenth buffer 122o and that the output instruction signal is input to the sixteenth buffer 122p. On the other hand, what types of signals are input to the first to fourteenth buffers 122a to 122n is not determined in the design stage of the management IC 66, and the types of these signals are received from the main CPU 63. This is specified by the management CPU 112. The details of the identification of these signal types in the management CPU 112 will be described later. Is transmitted by transmitting the type identification command. In this case, the information on the type of various signals provided by the type identification command is stored in the correspondence memory 116, and when the type of various signals is specified by the management CPU 112 while operating power is being supplied, The information stored in the correspondence memory 116 is referred to.

  FIG. 20 is an explanatory diagram for describing the configuration of the correspondence memory 116. The correspondence memory 116 has first to fourteenth correspondence areas 123a to 123n in one-to-one correspondence with the first to fourteenth buffers 122a to 122n provided in the input port 121 of the management-side I / F 111. Is provided.

  In the first correspondence area 123a, information indicating the general winning opening 31 is stored as information for specifying the type of signal input to the first buffer 122a by the management-side CPU 112. In addition, in the first correspondence area 123a, information indicating the number of game balls to be paid out when one game ball enters the general winning opening 31 (10 pieces) together with information indicating that the general winning opening 31 is used. Is stored. Information indicating the general winning opening 31 is stored in the second correspondence area 123b as information for specifying the type of signal input to the second buffer 122b by the management-side CPU 112. In addition, in the second correspondence area 123b, information indicating the general winning opening 31 and information on the number of game balls to be paid out when one game ball enters the general winning opening 31 (10 pieces) together with information indicating the general winning opening 31. Is stored. In the third correspondence area 123c, information indicating the general winning opening 31 is stored as information for specifying the type of signal input to the third buffer 122c by the management-side CPU 112. In addition, in the third correspondence area 123c, information indicating the number of the game balls to be paid out when one game ball enters the general winning opening 31 (10 pieces) together with the information indicating that the game is the general winning opening 31. Is stored.

  In the fourth correspondence area 123d, information indicating the special power-winning device 32 is stored as information for specifying the type of signal input to the fourth buffer 122d by the management-side CPU 112. In addition, in the fourth correspondence area 123d, information (15) of the number of game balls to be paid out when one game ball enters the special power prize device 32 together with information indicating that the device is the special prize device 32. Is stored. In the fifth correspondence area 123e, information indicating the first operation port 33 is stored as information for specifying the type of signal input to the fifth buffer 122e by the management-side CPU 112. In addition, the fifth correspondence area 123e includes information indicating the first operating port 33 and information on the number of game balls to be paid out when one game ball enters the first operating port 33 (one piece). ) Is also stored. In the sixth correspondence area 123f, information indicating the second operation port 34 is stored as information for specifying the type of signal input to the sixth buffer 122f by the management-side CPU 112. Also, in the sixth correspondence area 123f, information indicating the number of game balls to be paid out when one game ball enters the second operation port 34 (1 piece) ) Is also stored. In the seventh correspondence area 123g, information indicating that the signal is the out port 24a is stored as information for the management-side CPU 112 to specify the type of signal input to the seventh buffer 122g.

  In the eighth correspondence area 123h, information indicating the open / close execution mode is stored as information for the management-side CPU 112 to specify the type of signal input to the eighth buffer 122h. In the ninth correspondence area 123i, information indicating the high-frequency support mode is stored as information for the management-side CPU 112 to specify the type of signal input to the ninth buffer 122i. In the tenth correspondence area 123j, information indicating the front door frame 14 is stored as information for the management-side CPU 112 to specify the type of signal input to the tenth buffer 122j. In the eleventh correspondence area 123k, information indicating the start of a game round is stored as information for the management-side CPU 112 to specify the type of signal input to the eleventh buffer 122k.

  In the twelfth correspondence area 123l, information indicating blanks that do not correspond to any of them is stored as information for specifying the type of signal input to the twelfth buffer 122l by the management-side CPU 112. In the thirteenth correspondence area 123m, information indicating blanks that do not correspond to any of them is stored as information for the management-side CPU 112 to specify the type of signal input to the thirteenth buffer 122m. In the fourteenth correspondence area 123n, information indicating blanks that do not correspond to any of them is stored as information for specifying the type of signal input to the fourteenth buffer 122n by the management-side CPU 112.

  As described above, what kind of signal is input to the first to fourteenth buffers 122a to 122n is specified by the management CPU 112 by receiving an instruction from the main CPU 63. The management IC 66 can be used for a model different from the pachinko machine 10. Thereby, the versatility of the management IC 66 can be improved.

  Also, each time a signal corresponding to storage of history information is output to the first to fourteenth buffers 122a to 122n, information for recognizing the type of the signal is not output, but the type of the signal is recognized in advance. And information for specifying the type of signal input to the first to fourteenth buffers 122a to 122n by the management CPU 112 based on the output information is stored in the correspondence memory 116. Configuration. Thus, as compared with a configuration in which the signal for recognizing the type of the signal is output to the first to fourteenth buffers 122a to 122n each time the signal corresponding to the storage of the history information is output, the main output of each signal is mainly performed. It is possible to reduce the amount of information output from the side CPU 63 to the management CPU 112.

  Output of information for specifying the type of signal input to the first to fourteenth buffers 122a to 122n by the management-side CPU 112 is performed at the start of supply of operating power. Thus, in the situation where the game is started in the pachinko machine 10, the types of signals input to the first to fourteenth buffers 122a to 122n can be specified by the management CPU 112.

  Further, the information setting that the set value update signal is input to the fifteenth buffer 122o and the information setting that the output instruction signal is input to the sixteenth buffer 122p are performed in the design stage of the management IC 66. As a result, the setting value update signal and the output instruction signal to be surely used not only by the pachinko machine 10 but also by another type of pachinko machine using the management IC 66, the fifteenth buffer 122o and the sixteenth buffer 122p. It is possible to omit the process for specifying the type of signal input to the. Therefore, it is possible to reduce the processing load of the processing for specifying the type of the signal.

  Next, the history memory 117 of the management IC 66 will be described. FIG. 21 is an explanatory diagram for describing the configuration of the history memory 117.

  The history memory 117 is provided with a history area 124 for sequentially storing history information. In the history area 124, a plurality of pieces of pointer information are sequentially set, and a history information storage area 125 is set in one-to-one correspondence with each piece of pointer information. The history information storage area 125 can store a combination of RTC information and correspondence information. In this case, each history information storage area 125 has a 2-byte data capacity, a 1-byte data capacity is allocated as an area for storing RTC information, and an area for storing correspondence information. One byte data capacity is allocated. When it is necessary to store correspondence information according to signals input to the first to fourteenth buffers 122a to 122n (actually, in the case of the present pachinko machine 10, the first to eleventh buffers 122a to 122k). First, the date and time information measured by the current RTC 115 is stored in an area for storing RTC information in the history information storage area 125 corresponding to the pointer information to be currently written. After that, the correspondence information corresponding to the buffers 122a to 122n that triggered the current information storage is read from the correspondence areas 123a to 123n corresponding to the buffers 122a to 122n in the correspondence memory 116, and the read correspondence information is read. Is stored in the area for storing the correspondence information of the history information storage area 125 corresponding to the pointer information to be currently written.

  Regarding the correspondence information stored in the history information storage area 125, specifically, signals corresponding to the detection results of the ball input detection sensors 42a to 48a are input to the first to seventh buffers 122a to 122g as described above. For this reason, information corresponding to the type of the ball entry detection sensors 42a to 48a is stored in the first to seventh correspondence areas 123a to 123g in the correspondence memory 116. More specifically, information corresponding to the types of the incoming ball portions corresponding to each of the incoming ball detection sensors 42a to 48a is stored in the first to seventh correspondence areas 123a to 123g. In the pachinko machine 10, as described above, the first to third winning opening detection sensors 42a to 44a all detect a game ball that has entered the general winning opening 31. In each of the first to third correspondence areas 123a to 123c corresponding to the detection sensors 42a to 44a, information indicating that the opening is the general winning opening 31 is stored. The fourth correspondence area 123d stores information indicating the special power winning device 32, and the fifth correspondence area 123e stores information indicating the first operating port 33. In the sixth correspondence area 123f, information indicating the second operation port 34 is stored, and in the seventh correspondence area 123g, information indicating the out port 24a is stored. If the buffers 122a to 122n that triggered the information storage this time are any of the first to seventh buffers 122a to 122g, the information on the type of the ball entry section corresponding to the buffers 122a to 122g is The information is read from any of the seventh correspondence areas 123a to 123g, and the read information of the type of the entering ball portion is stored as it is in the area for storing the correspondence information in the history information storage area 125.

  On the other hand, a signal indicating whether or not the open / close execution mode is being input to the eighth buffer 122h, a signal indicating whether or not the high frequency support mode is being input to the ninth buffer 122i, and the tenth buffer 122j being input A signal indicating whether or not the front door frame 14 is being opened is input, and a signal indicating whether or not the game round has been started is input to the eleventh buffer 122k. Therefore, information indicating the open / close execution mode is stored in the eighth correspondence area 123h, information indicating the high-frequency support mode is stored in the ninth correspondence area 123i, and the tenth correspondence area is stored. Information indicating that it is the front door frame 14 is stored in 123j, and information indicating that it is a game time is stored in the eleventh correspondence area 123k.

  As described above, the main CPU 63 continuously outputs the eighth signal at the LOW level in the state other than the open / close execution mode, and continuously outputs the eighth signal at the HI level in the state of the open / close execution mode. The side CPU 112 specifies that the open / close execution mode has been started when the eighth signal changes from the LOW level to the HI level, and specifies that the open / close execution mode has ended when the eighth signal changes from the HI level to the LOW level. It becomes possible. In both cases where the eighth signal changes from the LOW level to the HI level and when the eighth signal changes from the HI level to the LOW level, the management-side CPU 112 generates a trigger for storing the correspondence information in the history information storage area 125. Identify that you have done it. That is, when the eighth signal changes from the LOW level to the HI level, not only the information indicating the open / close execution mode read out from the eighth correspondence area 123h but also the start information, together with the history information storage area 125. Is stored in an area for storing the corresponding relationship information. When the eighth signal changes from the HI level to the LOW level, not only the information indicating the open / close execution mode read from the eighth correspondence area 123h but also the end information, together with the history information storage area 125. Is stored in an area for storing the corresponding relationship information.

  As described above, the main CPU 63 continuously outputs the LOW-level ninth signal in a situation other than the high-frequency support mode, and continuously outputs the HI-level ninth signal in a situation of the high-frequency support mode. When the ninth signal changes from the LOW level to the HI level, the management-side CPU 112 specifies that the high frequency support mode has been started, and when the ninth signal has changed from the HI level to the LOW level, the high frequency support mode ends. Can be specified. When the ninth signal changes from the LOW level to the HI level and when the ninth signal changes from the HI level to the LOW level, the management-side CPU 112 generates a trigger for storing the correspondence information in the history information storage area 125. Identify that you have done it. That is, when the ninth signal changes from the LOW level to the HI level, not only the information indicating the high-frequency support mode read from the ninth correspondence area 123i but also the start information is stored together with the history information storage area. 125 are stored in an area for storing the correspondence information. When the ninth signal changes from the HI level to the LOW level, not only the information indicating the high-frequency support mode read from the ninth correspondence area 123i but also the end information, together with the end information. 125 are stored in the area for storing the correspondence information.

  As described above, the main CPU 63 continuously outputs the LOW level tenth signal when the front door frame 14 is closed, and outputs the HI level tenth signal when the front door frame 14 is open. To output continuously, the management-side CPU 112 specifies that the front door frame 14 has been opened when the tenth signal changes from the LOW level to the HI level, and when the tenth signal changes from the HI level to the LOW level. Can specify that the front door frame 14 has been closed. When the tenth signal changes from the LOW level to the HI level or when the HI level changes to the LOW level, the management-side CPU 112 generates a trigger for storing the correspondence information in the history information storage area 125. Identify that you have done it. That is, when the tenth signal changes from the LOW level to the HI level, not only the information indicating the front door frame 14 read from the tenth correspondence area 123j but also the opening start information is stored together with the history information. It is stored in an area for storing the correspondence information of the area 125. When the tenth signal changes from the HI level to the LOW level, not only the information indicating the front door frame 14 read from the tenth correspondence area 123j but also the opening end information is stored together with the history information. It is stored in an area for storing the correspondence information of the area 125.

  As described above, the main CPU 63 continuously outputs the eleventh signal at the LOW level until the timing for starting the game, and when the timing for starting the game is reached, outputs the eleventh signal at the HI level for a specific period. Output a signal. Therefore, when the eleventh signal changes from the LOW level to the HI level, the management-side CPU 112 specifies that the game has been started. That is, when the eleventh signal changes from the LOW level to the HI level, the information indicating the game number read out from the eleventh correspondence area 123k is stored in the history information storage area 125 to store the correspondence information. Store in area.

  The history information storage area 125 can store all the history information generated during the business day in which the pachinko machine 10 is continuously firing game balls from the opening to the closing of the store even if the business day continues for 10 consecutive days. Are provided for several times. For example, if history information is generated 60,000 times in one day, more than 600,000 history information storage areas 125 are provided. As a result, all the history information can be stored and held in the history memory 117 for at least 10 days.

  The history memory 117 is provided with a pointer area 126 separately from the history area 124. The pointer area 126 stores information for the management CPU 112 to specify the current pointer information to be written in the history memory 117. Specifically, at the stage of shipment of the pachinko machine 10, information for designating the pointer information “0” as a writing target is set in the pointer area 126. Each time one piece of history information is newly stored in the history information storage area 125, the information in the pointer area 126 is updated so that the value of the pointer information to be written is incremented by one. If the last order pointer information is to be written and the history information is stored in the history information storage area 125 corresponding to the last order pointer information, the pointer information is set so that the pointer information of “0” becomes the write object. The information in the service area 126 is updated. Thus, when a history information storage trigger occurs that exceeds the number of storable history information, new history information is sequentially overwritten from the history information storage area 125 in which old history information is stored. Become.

  When the history information is read from the history memory 117 by the external device, all the history information storage areas 125 are cleared to “0”, and the pointer information of “0” is set as a writing target. The information in the pointer area 126 is updated. This makes it possible to prevent the history information that has once been read from being read again.

  Next, a specific processing configuration for managing the game history using the management IC 66 will be described. First, a processing configuration for storing information on the correspondence between the first to fourteenth buffers 122a to 122n provided in the input port 121 of the management-side I / F 111 and the signal type in the correspondence memory 116 will be described. FIG. 22 is a flowchart showing a recognition process executed by the main CPU 63. The recognition process is executed in step S111 in the main process (FIG. 9).

  First, "14" is set to a recognition output counter provided in the main RAM 65 (step S801). The recognition output counter is a remaining information output for causing the management CPU 112 to recognize which type of signal the first to fourteenth buffers 122a to 122n of the input port 121 in the management I / F 111 correspond to. Is a counter for the main CPU 63 to specify the required number of times. As described above, since 14 of the first to fourteenth buffers 122a to 122n are to be recognized as signal types, "14" is set in the recognition output counter.

  After that, an output process of the identification start command is executed (step S802). The main CPU 63 outputs various commands to the management CPU 112 so that the management CPU 112 recognizes which type of signal the first to fourteenth buffers 122a to 122n correspond to. In outputting this command, first to eighth signals input to the first to eighth buffers 122a to 122h are used. That is, the first to eighth buffers 122a are used by using the first to eighth signals (that is, the first to eighth signal paths 118a to 118h) used to instruct the management-side CPU 112 when the history information is stored. A command is output for causing the management-side CPU 112 to recognize which type of signal corresponds to .about.122n. This reduces the number of signal paths as compared to a configuration in which the signal paths for performing the command output are provided separately from the signal paths 118a to 118p for outputting signals to the first to sixteenth buffers 122a to 122p. And the configuration can be simplified. The identification start command has an 8-bit data capacity, and the data of each bit is input to the first to eighth buffers 122a to 122h as first to eighth signals, respectively. In the process of outputting the identification start command, the output state of the ninth signal is switched to the HI level at the timing when the output of the identification start command is started so that the management CPU 112 recognizes that a new command has been transmitted. The output period of the identification start command and the period during which the output state of the ninth signal is maintained at the HI level are set to periods that are sufficient for the management CPU 112 to recognize the output state of the identification start command and the ninth signal. Have been. Upon receiving the identification start command, the management-side CPU 112 starts processing for storing information on the correspondence between the first to fourteenth buffers 122a to 122n and the type of signal in the correspondence memory 116. Identify.

  Thereafter, a type identification command corresponding to the current value of the recognition output counter of the main RAM 65 is read from the main ROM 64 (step S803). In this case, the first buffer 122a corresponds to the first to fourteenth buffers 122a to 122n so that the signal type is set first, and then the (n + 1) th buffer is set to the signal type after the nth buffer. Recognition setting of the signal type to be performed is performed. Therefore, if the output counter for recognition is "14" to "12", the type identification command indicating the general winning opening 31 and the number of the winning balls is read out, and if the output counter for recognition is "11", the special prize winning is obtained. The type identification command indicating the device 32 and the number of winning balls is read out. If the recognition output counter is “10”, the type identification command indicating the first operating port 33 and the number of winning balls is read out. If the output counter for recognition is "9", it is determined that the input port is the second operation port 34 and a type identification command indicating the number of winning balls is read out. If the output counter for recognition is "8", it is the output port 24a. The type identification command is read out, and if the recognition output counter is "7", the type identification command indicating the open / close execution mode is read out. If "6", the type identification command indicating the high frequency support mode is read, and if the output counter for recognition is "5", the type identification command indicating the front door frame 14 is read, and the output counter for recognition is read. If the value is "4", the type identification command indicating that it is a game time is read, and if the output counter for recognition is "3" to "1", the type identification command indicating that it is blank is read.

  Thereafter, output processing of the read type identification command is executed (step S804). The type identification command has an 8-bit data capacity like the identification start command, and data of each bit is input to the first to eighth buffers 122a to 122h as first to eighth signals, respectively. In the output processing of the identification type command, the output state of the ninth signal is switched to the HI level at the timing when the output of the identification type command is started so that the management CPU 112 recognizes that a new command has been transmitted. The output period of the identification type command and the period during which the output state of the ninth signal is maintained at the HI level are set to a period sufficient for the management-side CPU 112 to recognize the output state of the identification type command and the ninth signal. Have been. Upon receiving the identification type command, the management-side CPU 112 responds to the identification type command in the corresponding relationship areas 123a to 123n corresponding to the buffer to be set this time among the first to fourteenth buffers 122a to 122n. Store information to be performed.

  Thereafter, the value of the recognition output counter of the main RAM 65 is decremented by 1 (step S805), and it is determined whether or not the value of the recognition output counter after the subtraction is “0” (step S806). When the value of the recognition output counter is 1 or more (step S806: NO), a process for outputting a type identification command corresponding to the value of the recognition output counter after subtracting 1 is executed (steps S803 and S803). Step S804).

  On the other hand, if the value of the recognition output counter is “0” (step S806: YES), the output processing of the identification end command is executed (step S807). The identification end command has an 8-bit data capacity, and the data of each bit is input to the first to eighth buffers 122a to 122h as first to eighth signals, respectively. In the output processing of the identification end command, the output state of the ninth signal is switched to the HI level at the timing when the output of the identification end command is started so that the management-side CPU 112 recognizes that a new command has been transmitted. The output period of the identification end command and the period during which the output state of the ninth signal is maintained at the HI level are set to a period sufficient for the management-side CPU 112 to recognize the output state of the identification end command and the ninth signal. Have been. Upon receiving the identification end command, the management-side CPU 112 specifies that the processing for storing the information on the correspondence between the first to fourteenth buffers 122a to 122n and the signal type in the correspondence memory 116 has been completed. I do.

  Next, management processing executed by the management CPU 112 will be described with reference to the flowchart in FIG. The management process is started when the supply of the operation power to the management-side CPU 112 is started. The processing speed of the management-side CPU 112 is faster than the processing speed of the main-side CPU 63. After the timer interrupt processing of one time (FIG. 11) is started in the main-side CPU 63, the next timer interrupt processing (FIG. 11) Until is started, the combination of the processes in step S908 and subsequent steps in the management process is executed 16 times or more.

  First, it is determined whether an identification start command has been received from the main CPU 63 (step S901). If the identification start command has not been received (step S901: NO), the process returns to step S901 after executing the setting update recognition process (step S902). In the setting update recognition process, when the main CPU 63 sets a new setting state of the pachinko machine 10 as will be described in detail later, a corresponding process is executed.

  When the identification start command is received from the main CPU 63 (step S901: YES), the value of the setting target counter provided in the management RAM 114 is cleared to “0” (step S903). The setting target counter is a counter for specifying the type of the buffers 122a to 122n for which the signal type is to be set by the management CPU 112. The first buffer 122a is first set for the signal type, and thereafter the (n + 1) th buffer is set for the signal type after the n-th buffer.

  Thereafter, on condition that the type identification command has been received from the main CPU 63 (step S904: YES), a correspondence setting process is executed (step S905). In the correspondence setting processing, the type identification received this time is stored in the correspondence area corresponding to the current value of the setting target counter of the management-side RAM 114 among the first to fourteenth correspondence relation areas 123a to 123n of the correspondence memory 116. The information of the signal type set in the command is stored. Thereafter, the value of the setting target counter of the management-side RAM 114 is incremented by 1 (step S906).

  When a negative determination is made in step S904 or when the process of step S906 is performed, it is determined whether an identification end command has been received from the main CPU 63 (step S907). If the identification end command has not been received (step S907: NO), the process returns to step S904, and if a new type identification command is received from the main CPU 63 (step S904: YES), the process returns to step S905 and step S906. Execute the process again.

  If the identification end command has been received from the main CPU 63 (step S907: YES), the processing of steps S908 to S910 is repeatedly executed. In step S908, a history setting process for storing history information corresponding to the type of the signal received from the main CPU 63 in the history memory 117 will be described later. In step S909, although details will be described later, various parameters are calculated using the history information stored in the history memory 117, and the calculation results are reported on the first to third notification display devices 69a to 69c. To perform display output processing. In step S910, an external output process for outputting the history information stored in the history memory 117 and the various parameters stored in the calculation result memory 131 to the reading terminal 68d is executed, which will be described in detail later.

  FIG. 24 is a time chart showing how the information on the correspondence between the first to fourteenth buffers 122a to 122n and the types of signals input to these buffers 122a to 122n is stored in the correspondence memory 116. FIG. 24A illustrates a period in which a command is output from the main CPU 63 to the management CPU 112 using the first to eighth signals (that is, the first to eighth signal paths 118a to 118h). FIG. 24B shows a period during which the output state of the ninth signal is at the HI level. FIG. 24C shows the first to fourteenth buffers 122a to 122n and the types of signals input to these buffers 122a to 122n. FIG. 24D shows a timing at which the correspondence setting process (step S905) is executed by the management-side CPU 112 in which the process for identifying the correspondence is executed.

  When the supply of the operating power to the main CPU 63 and the management CPU 112 is started, the output of the identification start command using the first to eighth signals is started at the timing of t1, as shown in FIG. You. Further, at the timing of the time t1, the output state of the ninth signal is changed from the LOW level to the HI level as shown in FIG. Thereafter, at a timing t2 when the output of the identification start command is continued, the output state of the ninth signal is changed from the HI level to the LOW level as shown in FIG. The management-side CPU 112 confirms that the output state of the ninth signal has been changed from the HI level to the LOW level, thereby specifying that the command is transmitted from the main-side CPU 63, and the first to eighth buffers 122a to 122h. By confirming this information, the contents of the command received from the main CPU 63 are grasped. In this case, since the identification start command has been received, the management-side CPU 112 enters the identification state by making an affirmative determination in step S901 of the management processing (FIG. 23). Thereafter, at the timing of t3, the output of the identification start command is stopped as shown in FIG.

  Thereafter, at the timing of t4, as shown in FIG. 24A, the output of the first type identification command using the first to eighth signals is started. Further, at the timing of the time t4, the output state of the ninth signal is changed from the LOW level to the HI level as shown in FIG. Thereafter, at the timing t5 when the output of the type identification command is continued, the output state of the ninth signal is changed from the HI level to the LOW level as shown in FIG. The management-side CPU 112 confirms that the command state has been transmitted from the main-side CPU 63 by confirming that the output state of the ninth signal has been changed from the HI level to the LOW level. By confirming the information, the contents of the command received from the main CPU 63 are grasped. In this case, since the first type identification command has been received, the management-side CPU 112 executes the correspondence setting process at the timing of t5 as shown in FIG. In the correspondence setting processing, information indicating the general winning opening 31 and information on the number of winning balls are stored in the first correspondence area 123a of the correspondence memory 116. Thereafter, at the timing of t6, the output of the type identification command is stopped as shown in FIG.

  Thereafter, at the timings of t7 to t9, the timings of t10 to t12, the timings of t13 to t15, and the timings of t16 to t18, the main timings are the same as the timings of t4 to t6. A correspondence setting process corresponding to the type identification command output from the side CPU 63 is executed by the management CPU 112. In this case, the correspondence setting processing corresponding to the fourteenth type identification command is completed from timing t16 to timing t18.

  Then, at the timing of t19, the output of the identification end command using the first to eighth signals is started as shown in FIG. Further, at the timing of the time t19, the output state of the ninth signal is changed from the LOW level to the HI level as shown in FIG. Thereafter, at the timing t20 when the output of the identification end command is continued, the output state of the ninth signal is changed from the HI level to the LOW level as shown in FIG. The management-side CPU 112 confirms that the command state has been transmitted from the main-side CPU 63 by confirming that the output state of the ninth signal has been changed from the HI level to the LOW level. By confirming the information, the contents of the command received from the main CPU 63 are grasped. In this case, since the identification end command has been received, the identification state of the management-side CPU 112 ends at the timing of t20, as shown in FIG. Thereafter, at the timing of t21, the output of the identification end command is stopped as shown in FIG.

  Since the management CPU 112 recognizes whether or not the command is being output using the ninth signal as described above, it is possible to instruct the management CPU 112 when to store history information. Even if the command is output using the first to eighth signals (that is, the first to eighth signal paths) to be used, it is clear to the management-side CPU 112 that the command is being output. It becomes possible to make them recognize.

  Next, a processing configuration for storing the history information in the history memory 117 will be described. FIG. 25 is a flowchart showing a management output process executed by the main CPU 63. Note that the management output process is executed in step S319 in the timer interrupt process (FIG. 11).

  First, “11” is set to a management target counter provided in the main RAM 65 (step S1001). The management target counter specifies in the main CPU 63 whether or not there is a management target that is not a target of specifying whether or not the signal output state to the management CPU 112 should be changed in the current management output process. In addition, it is a counter for the main CPU 63 to specify which of the management targets should change the signal output state to the management CPU 112. In one management output process, the main CPU 63 specifies whether or not the signal output state to the management CPU 112 should be changed. The management target includes seven ball entry detection sensors 42a to 48a, There are a total of eleven of the presence / absence of execution of the open / close execution mode, the presence / absence of execution of the high-frequency support mode, the presence / absence of opening / closing of the front door frame 14, and the presence / absence of start of the game. Therefore, "11" is first set to the management target counter.

  Thereafter, it is determined whether the output state of the signal to the management-side CPU 112 for the management target corresponding to the current value of the management target counter is at the HI level (step S1002). If it is not the HI level (step S1002: NO), it is determined whether or not the value of the management target counter is 5 or more, so that the number of the ball detection sensors 42a corresponding to the management target counter is seven. To 48a (step S1003).

  If an affirmative determination is made in step S1003, it is determined whether or not “1” is set in the output flag of the main RAM 65 corresponding to the value of the management target counter (step S1004). Specifically, when the value of the management target counter is “11” and corresponds to the first winning opening detection sensor 42a, it is determined whether the first output flag is set to “1”, When the value of the management target counter is “10” and corresponds to the second winning opening detection sensor 43a, it is determined whether or not “1” is set in the second output flag, and the value of the management target counter is determined. Is "9" and corresponds to the third winning opening detection sensor 44a, it is determined whether or not the third output flag is set to "1", and if the value of the management target counter is "8" If it corresponds to the special electric power detection sensor 45a, it is determined whether or not the fourth output flag is set to "1", and the value of the management target counter is "7", and the first operation port detection sensor 46a , The fifth output flag is set to “1”. It is determined whether or not the sixth output flag is set to “1” when the value of the management target counter is “6” and corresponds to the second working port detection sensor 47a. If the value of the management target counter is “5” and corresponds to the out port 24a, it is determined whether the seventh output flag is set to “1”. As described above, “1” is set in the first to seventh output flags in the ball entry detection process (FIG. 15).

  If “1” is set in the output flag corresponding to the value of the management target counter (step S1004: YES), the output state of the signal corresponding to the value of the management target counter among the first to seventh signals is set to the HI level. (Step S1005). After that, the output flag corresponding to the value of the management target counter is cleared to “0” (step S1006).

  If a negative determination is made in step S1003, it is determined whether or not an opportunity has occurred to switch the output state of the signal corresponding to the value of the management target counter to the HI level (step S1007). Specifically, when the value of the management target counter is “4”, it is determined whether or not the shift to the open / close execution mode has occurred. When the value of the management target counter is “3”, the high level is determined. It is determined whether or not the shift to the frequency support mode has occurred. If the value of the management target counter is “2”, it is determined whether or not the front door frame 14 has been opened. When the value is “1”, it is determined whether or not the game round has been started by determining whether or not “1” is set in the eleventh output flag. If an affirmative determination is made in step S1007, the output state of the signal corresponding to the value of the management target counter is set to the HI level (step S1008). When the process of step S1008 is performed when the value of the management target counter is “1”, the eleventh output flag is cleared to “0”.

  If an affirmative determination is made in step S1002, it is determined whether or not an opportunity to switch the output state of the signal corresponding to the value of the management target counter to the LOW level has occurred (step S1009). Specifically, if the value of the management target counter is 5 or more or “1” and the current management target is any of the incoming ball detection sensors 42a to 48a or the start of the game, the first to seventh signals Then, it is determined whether or not the HI output continuation period (specifically, 10 milliseconds) has elapsed since the output state of the signal corresponding to the value of the management target counter among the eleventh signals is switched from the LOW level to the HI level. . This HI output continuation period is set to a period longer than the longest processing interval of the history setting process (step S908) of the management process (FIG. 23) in the management-side CPU 112, and the output of the signal switched from the LOW level to the HI level is performed. This is a period during which the state can be reliably specified by the management-side CPU 112. Further, when the value of the management target counter is “4” and the current management target is the open / close execution mode, it is determined whether the open / close execution mode has ended, and the value of the management target counter is “3”. If the current management target is the high frequency support mode, it is determined whether or not the high frequency support mode has ended. The value of the management target counter is “2”, and the current management target is the front door frame 14. In this case, it is determined whether the front door frame 14 is in the closed state. When the output of the signal corresponding to the value of the management target counter has been switched to the low level (step S1009: YES), the output state of the signal corresponding to the value of the management target counter is set to the low level (step S1009). Step S1010).

  If a negative determination is made in step S1004, if the process in step S1006 is performed, if a negative determination is made in step S1007, if the process in step S1008 is performed, if a negative determination is made in step S1009, or When the process of S1010 is executed, the value of the management target counter of the main RAM 65 is decremented by 1 (step S1011). Then, it is determined whether or not the value of the management target counter after the subtraction of “1” is “0” (step S1012). If the value of the management target counter is 1 or more (step S1012: NO), the processes from step S1002 are executed for the management target corresponding to the new management target counter value.

  Next, the history setting process executed by the management-side CPU 112 will be described with reference to the flowchart in FIG. The history setting process is executed in step S908 of the management process (FIG. 23).

  First, the number of buffers to be checked by the management CPU 112 among the first to fourteenth buffers 122a to 122n is set in a check target counter provided in the management RAM 114 (step S1101). Specifically, the number of corresponding areas in the first to fourteenth corresponding areas 123a to 123n in the corresponding memory 116 in which information other than the information indicating the blank is stored is specified. Set the number of pieces of information in the check target counter. In the pachinko machine 10, as described above, since information other than the information indicating blank is stored in the first to eleventh correspondence areas 123a to 123k, "11" is set in the check target counter in step S1101. I do.

  After that, it is checked whether the numerical information stored in the buffer corresponding to the current value of the check target counter among the first to fourteenth buffers 122a to 122n has been changed from “0” to “1”. Then, it is determined whether or not the output state of the input signal from the main CPU 63 to the buffer has been switched from the LOW level to the HI level (step S1102). When the value of the check target counter is “n”, the n-th buffers 122 a to 122 n are to be checked for numerical information. For example, if the value of the check target counter is "11", the eleventh buffer 122k is a check target of numerical information, and if the value of the check target counter is "5", the fifth buffer 122e is a check target of numerical information. .

  If an affirmative determination is made in step S1102, RTC information that is year / month / day information and time information is read from the RTC 115 (step S1103). Then, a writing process to the history memory 117 is executed (step S1104). In the writing process, the pointer information of the history area 124 that is the current writing target is specified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the writing target pointer information is specified. The RTC information read in step S1103 is written in the history information storage area 125 of the history area 124. In addition, the corresponding relationship information is read from the corresponding relationship areas 123a to 123n corresponding to the current value of the check target counter, and the corresponding relationship information is written to the history information storage area 125 corresponding to the pointer information to be written. When the correspondence information is any one of the information indicating the open / close execution mode, the information indicating the high-frequency support mode, and the information indicating the front door frame 14, The start information as well as the correspondence information is written in the history information storage area 125 corresponding to the pointer information to be written. When the value of the check target counter is “n”, the n-th correspondence areas 123 a to 123 n are to be read from the correspondence information. For example, if the value of the check target counter is “11”, the eleventh correspondence area 123 k is a target of reading the correspondence information, and if the value of the check target counter is “5”, the fifth correspondence area 123 e is the correspondence. It becomes a target of reading information.

  By executing the writing process as described above, the value of the check target counter is changed to any one of the out port 24a, the general winning port 31, the special power winning device 32, the first operating port 33, the second operating port 34, and the game times. , The RTC information, the out port 24a, the general winning port 31, the special power winning device 32, the first operating port 33, the second operating port 33 are stored in the history information storage area 125 corresponding to the pointer information to be written. The combination of the operating port 34 and the corresponding relationship information indicating that the game port is one of the game times is stored as the history information. When the value of the check target counter is any of the open / close execution mode, the high frequency support mode, and the front door frame 14, the RTC information is stored in the history information storage area 125 corresponding to the pointer information to be written. In this state, a combination of the opening / closing execution mode, the high-frequency support mode, and the correspondence information indicating one of the front door frame 14 and the start information is stored as the history information.

  Thereafter, the target pointer is updated (step S1105). In the updating process, the numerical information stored in the pointer area 126 of the history memory 117 is read and 1 is added. It is determined whether or not the pointer information after the addition exceeds the maximum value of the pointer information in the history area 124. If it does not exceed the maximum value, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new write target pointer information. If it exceeds the maximum value, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

  If a negative determination is made in step S1102 or if the process in step S1105 is performed, it is determined whether the signal output has been switched to the LOW level in the corresponding relationship areas 123a to 123n corresponding to the current value of the check target counter. It is determined whether correspondence information to be checked is stored (step S1106). Specifically, when the current value of the check target counter is “8” to “10”, information indicating the open / close execution mode and the high-frequency support mode are displayed in the corresponding correspondence areas 123h to 123j. Since either one of the information indicating the presence and the information indicating the front door frame 14 is stored, an affirmative determination is made in step S1106.

  If an affirmative determination is made in step S1106, the numerical information stored in the buffer corresponding to the current value of the check target counter among the first to fourteenth buffers 122a to 122n is changed from “1” to “0”. It is determined whether or not the output state of the input signal from the main CPU 63 to the buffer has been switched from the HI level to the LOW level (step S1107). If an affirmative determination is made in step S1107, RTC information is read out in the same manner as in step S1103 (step S1108), and a process of writing to the history memory 117 is executed (step S1109). In the writing process, the RTC information read in step S1108 is written to the history information storage area 125 of the history area 124 corresponding to the pointer information to be written. In addition, the corresponding relationship information is read from the corresponding relationship areas 123a to 123n corresponding to the current value of the check target counter, and the corresponding relationship information is written to the history information storage area 125 corresponding to the pointer information to be written. Further, not only the correspondence information but also end information is written in the history information storage area 125 corresponding to the pointer information to be written. By executing the writing process in this manner, when the value of the check target counter is any of the open / close execution mode, the high frequency support mode, and the front door frame 14, it corresponds to the pointer information to be written. The history information storage area 125 stores, as history information, a combination of RTC information, correspondence information indicating one of the open / close execution mode, the high frequency support mode, and the front door frame 14, and end information. It will be in the state that was done. Then, the target pointer is updated as in step S1105 (step S1110).

  If a negative determination is made in step S1106, if a negative determination is made in step S1107, or if the process of step S1110 is performed, the value of the check target counter in the management-side RAM 114 is decremented by one (step S1111). Then, it is determined whether or not the value of the check target counter after the subtraction of 1 is “0” (step S1112). If the value of the check target counter is equal to or greater than 1 (step S1112: NO), the processes from step S1102 are executed for the check target corresponding to the new check target counter value.

  Next, how the history information is stored in the history memory 117 will be described with reference to the time chart of FIG. FIG. 27A shows a period in which an HI level signal is being input to one of the first to seventh and eleventh buffers 122a to 122g and 122k, and FIG. 27C illustrates a period in which a HI level signal is input to the ninth buffer 122i, and FIG. 27D illustrates a period in which the HI level signal is input to the tenth buffer 122j. FIG. 27 (e) shows the timing of writing the history information to the history memory 117.

  At the timing of t1, the output state of the signal input to any of the first to seventh and eleventh buffers 122a to 122g and 122k is switched from the LOW level to the HI level as shown in FIG. Therefore, at the timing of the t1, the history information is written into the history memory 117 as shown in FIG. Thereafter, at the timing of t2, the signal switched to the HI level at the timing of t1 as shown in FIG. 27A is switched to the LOW level. However, the signal is a signal that has been input to any of the first to seventh and eleventh buffers 122a to 122g and 122k, and the switching of the LOW level is not to be stored in the history information. At the timing, the writing of the history information is not executed as shown in FIG.

  Then, at the timing of t3, the timing of t5, the timing of t6, the timing of t9, the timing of t10, the timing of t13, and the timing of t14, as shown in FIG. The output state of the signal input to any of the 11 buffers 122a to 122g and 122k is switched from the LOW level to the HI level. Therefore, at each of these timings, history information is written as shown in FIG.

  As shown in FIG. 27B, the output state of the signal input to the eighth buffer 122h becomes the HI level from the timing t4 to the timing t7. The eighth buffer 122h corresponds to whether or not the open / close execution mode has occurred. Accordingly, as shown in FIG. 27 (e), the timing at which the output state of the signal input to the eighth buffer 122h switches to the HI level at timing t4, and the timing at which the output state of the signal switches to the LOW level At each timing of t7, the history information is written. In this case, the history information written at the timing of t4 includes start information, and the history information written at the timing of t7 includes end information. Thus, the execution period of the open / close execution mode can be grasped by checking the history information in the history memory 117.

  Further, history information is written into the history memory 117 in the order of elapse of time. Therefore, whether the history information indicating that a ball has entered the out port 24a, the general winning port 31, the special power winning device 32, the first operating port 33, or the second operating port 34 is in the open / close execution mode. It is possible to distinguish whether or not. In addition, since the history information includes the RTC information, by comparing the RTC information, any one of the out opening 24a, the general winning opening 31, the special electric winning device 32, the first operating opening 33, and the second operating opening 34 can be obtained. It is possible to determine whether or not the history information indicating that the ball has entered is in the open / close execution mode.

  As shown in FIG. 27C, the output state of the signal input to the ninth buffer 122i becomes the HI level from the timing t8 to the timing t11. The ninth buffer 122i corresponds to whether or not the high-frequency support mode has occurred. Accordingly, as shown in FIG. 27 (e), the timing at which the output state of the signal input to the ninth buffer 122i switches to the HI level, and the timing at which the output state of the signal switches to the LOW level At each timing of t11, the history information is written. In this case, the history information written at the timing t8 includes start information, and the history information written at the timing t11 includes end information. Thus, the execution period of the high frequency support mode can be grasped by checking the history information in the history memory 117.

  Further, history information is written into the history memory 117 in the order of elapse of time. Therefore, the history information indicating that a ball has been entered into any one of the out port 24a, the general winning port 31, the special power winning device 32, the first operating port 33, and the second operating port 34 is displayed even in the high frequency support mode. It is possible to distinguish whether or not. In addition, since the history information includes the RTC information, by comparing the RTC information, any one of the out opening 24a, the general winning opening 31, the special electric winning device 32, the first operating opening 33, and the second operating opening 34 can be obtained. It is possible to determine whether or not the history information indicating that the ball has entered is in the high-frequency support mode.

  As shown in FIG. 27D, the output state of the signal input to the tenth buffer 122j becomes the HI level from the timing t12 to the timing t15. The tenth buffer 122j corresponds to whether or not the front door frame 14 is open. Accordingly, as shown in FIG. 27 (e), the timing at which the output state of the signal input to the tenth buffer 122j switches to the HI level is t12, and the timing at which the output state of the signal switches to the LOW level. At each timing of t15, the history information is written. In this case, the history information written at the timing t12 includes start information, and the history information written at the timing t15 includes end information. Thus, by confirming the history information in the history memory 117, it is possible to grasp the period in which the front door frame 14 is in the open state.

  Further, history information is written into the history memory 117 in the order of elapse of time. Therefore, the history information indicating that a ball has been entered into any one of the out port 24a, the general winning port 31, the special power winning device 32, the first operating port 33, and the second operating port 34 is generated while the front door frame 14 is being opened. Or not. In addition, since the history information includes the RTC information, by comparing the RTC information, any one of the out opening 24a, the general winning opening 31, the special electric winning device 32, the first operating opening 33, and the second operating opening 34 can be obtained. It is possible to distinguish whether or not the history information indicating that the ball has entered is that the front door frame 14 is being opened.

  Next, an output process of a set value update signal executed when the setting state of the pachinko machine 10 is set by the main CPU 63 will be described. FIG. 28 is a flowchart showing the output processing of the set value update signal executed by the main CPU 63. The output processing of the set value update signal is executed in step S119 in the main processing (FIG. 9).

  A value corresponding to the set value of the pachinko machine 10 set this time is set in a pulse number counter provided in the main RAM 65 (step S1201). Specifically, the value of the set value counter of the main RAM 65 is set to the pulse number counter. Thereafter, it is determined whether the set value update signal directed to the management CPU 112 is at the HI level (step S1202). As described above, the set value update signal has been input to the fifteenth buffer 122o of the input port 121 of the management IC 66. Here, the output processing of the set value update signal is processing for causing the management-side CPU 112 to specify the types of signals input to the first to fourteenth buffers 122a to 122n of the input port 121 in the main processing (FIG. 9). It is executed at a timing before a certain recognition process. On the other hand, the input of the set value update signal to the fifteenth buffer 122o is set in the management IC 66 in the design stage of the pachinko machine 10, so that the output of the set value update signal is performed before the recognition processing. Even if the processing is executed, the management-side CPU 112 can specify that the signal input to the fifteenth buffer 122o is the set value update signal.

  If a negative determination is made in step S1202, the value of the LOW level counter provided in the main RAM 65 is subtracted by 1 (step S1203), and whether or not the value of the LOW level counter after the subtraction is "0" is determined. Is determined (step S1204). The LOW level counter is a counter for specifying by the main CPU 63 whether or not the set value update signal is maintained at the LOW level for a predetermined period while outputting a plurality of pulses at which the set value update signal is at the HI level. It is. When the value of the LOW level counter is “0” (step S1204: YES), it means that it is time to set the set value update signal to the HI level, and thus the set value update signal is set to the HI level. It is set (step S1205).

  Thereafter, “20” is set to the HI level counter provided in the main RAM 65 (step S1206). The HI level counter is a counter for the main CPU 63 to specify a period during which the set value update signal is maintained at the HI level. Since the value set in the HI level counter is decremented by 1 at a period of about 10 microseconds, the output of the set value update signal is maintained at the HI level for 200 microseconds when one pulse is output. The HI level maintenance period is a period sufficient for the management-side CPU 112 to specify that the set value update signal has been changed from the LOW level to the HI level.

  If the set value update signal is at the HI level (step S1202: YES), the value of the HI level counter of the main RAM 65 is decremented by 1 (step S1207), and the value of the HI level counter after the subtraction is set to "0". It is determined whether or not it is set (step S1208). If the value of the HI level counter is “0” (step S1208: YES), it means that it is time to set the set value update signal to the LOW level, so that the set value update signal is set to the LOW level. It is set (step S1209).

  Thereafter, the value of the pulse number counter of the main RAM 65 is decremented by 1 (step S1210), and it is determined whether or not the value of the pulse number counter after the subtraction is "0" (step S1211). If the value of the pulse number counter is not "0" (step S1211: NO), the output of the pulse signals by the set value update signals for the number corresponding to the set value of the pachinko machine 10 set this time has been completed. In order to mean that there is no data, "20" is set to the LOW level counter of the main RAM 65 (step S1212). Since the value set in the LOW level counter is decremented by 1 in a cycle of about 10 microseconds, the value is maintained at the LOW level for 200 microseconds between a plurality of pulse outputs by the set value update signal. The LOW level maintaining period is a period sufficient for the management-side CPU 112 to specify that the set value update signal has been changed from the HI level to the LOW level.

  When the value of the pulse number counter is "0" (step S1211: YES), the output of the pulse signals by the set value update signals for the number corresponding to the set value of the pachinko machine 10 set this time is completed. Therefore, the output process of the set value identification end command is executed (step S1213). The set value identification end command is a command for causing the management CPU 112 to recognize that the output of the set value update signal for causing the management CPU 112 to recognize the set value of the pachinko machine 10 set this time is completed. When outputting the set value identification end command, the first to eighth signals input to the first to eighth buffers 122a to 122h are used similarly to the identification start command, the type identification command, and the identification end command. However, the signal pattern of the set value identification end command is different from the identification start command, type identification command, and identification end command.

  As described above, in the output processing of the set value update signal, a pulse signal of the set value update signal corresponding to the set value of the pachinko machine 10 set at the start of the supply of the operating power this time is output to the management IC 66. I do. By executing the setting update recognition process, the management-side CPU 112 grasps the number of pulse signals due to the set value update signal, and grasps the set value of the pachinko machine 10 set this time based on the number.

  FIG. 29 is a flowchart showing a setting update recognition process executed by the management CPU 112. The setting update recognition process is executed in step S902 of the management process (FIG. 23).

  It is determined whether the set value update signal input to the fifteenth buffer 122o of the input port 121 has been switched from the LOW level to the HI level (step S1301). If an affirmative determination is made in step S1301, the value of the set value grasp counter provided in the management-side RAM 114 is set to "1" (step S1302). The set value grasp counter is a counter for specifying the set value of the pachinko machine 10 by the management CPU 112. For example, if the value of the set value grasp counter is “1”, it means “setting 1”, If the value of the set value grasp counter is “6”, it means “set 6”.

  Thereafter, it is determined whether or not the set value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level again (step S1303). If an affirmative determination is made in step S1303, the value of the set value grasp counter of the management-side RAM 114 is incremented by 1 (step S1304). As a result, the set value of the pachinko machine 10 specified by the management CPU 112 increases by one step.

  If a negative determination is made in step S1303, or if the process of step S1304 is performed, based on the input state of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. It is determined whether a set value identification end command has been received from the main CPU 63 (step S1305). If a negative determination is made in step S1305, the process returns to step S1303.

  If an affirmative determination is made in step S1305, RTC information that is year / month / day information and time information is read from the RTC 115 (step S1306). Then, a writing process to the history memory 117 is executed (step S1307). In the writing process, the pointer information of the history area 124 that is the current write target is specified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the write target pointer information is specified. The RTC information read in step S1306 is written to the history information storage area 125 of the history area 124. Further, both the information for identifying the setting value and the information of the value of the setting value grasp counter are written in the history information storage area 125 corresponding to the pointer information to be written. Thereby, the information indicating that the setting state of the pachinko machine 10 has been newly set, the RTC information corresponding to the date and time when the setting has been performed, and the information of the setting value when the setting has been performed are included. The combination is stored as history information.

  After that, the target pointer is updated (step S1308). In the updating process, the numerical information stored in the pointer area 126 of the history memory 117 is read and 1 is added. It is determined whether or not the pointer information after the addition exceeds the maximum value of the pointer information in the history area 124. If it does not exceed the maximum value, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new write target pointer information. If it exceeds the maximum value, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

  When the setting update recognition process is executed as described above, when the setting state of the pachinko machine 10 is newly set, the setting is performed, the date and time when the setting is performed, and the The combination of the set values when the setting is made is stored in the history area 124 as history information. Thus, by reading and analyzing the information stored in the history memory 117 using an external device connected to the reading terminal 68d, the date and time when the setting state of the pachinko machine 10 is newly set and the setting are changed. It is possible to grasp the contents of the set value when the setting is performed.

  Here, even if the setting state of the pachinko machine 10 is newly set, the information stored in the history memory 117 is maintained as it is. As a result, even if the setting state of the pachinko machine 10 is newly set, it is possible to prevent the history information in the history memory 117 from being erased, and various parameters to be described later are changed when the setting state of the pachinko machine 10 is changed. Is calculated using history information that exists across the front and back of. In this case, since the date and time when the setting state of the pachinko machine 10 is newly set as described above is stored in the history memory 117, the external device is connected to the reading terminal 68d and stored in the history memory 117. By reading the information, it becomes possible to calculate various parameters after the timing when the setting state of the pachinko machine 10 is newly set and during the period when the setting state is maintained.

  Next, the display output processing executed by the management CPU 112 will be described with reference to the flowchart in FIG. The display output process is executed in step S909 of the management process (FIG. 23).

  First, it is determined whether it is a calculation timing (step S1401). If 51 seconds have elapsed since the start of the supply of the operating power to the management-side CPU 112, or if 51 seconds have elapsed since the previous affirmative determination in step S1401, an affirmative determination is made in step S1401. If an affirmative determination is made in step S1401, the various numbers of entering balls at normal times are calculated (step S1402). Specifically, first, the number of the history information storage areas 125 in which the correspondence information indicating the out port 24a is stored in the history area 124 of the history memory 117 is counted, so that the number of the out port 24a is counted. Calculate the number of incoming balls. Further, by counting the number of the history information storage areas 125 in which the correspondence information indicating the general winning opening 31 is stored in the history area 124 of the history memory 117, the ball is entered into the general winning opening 31. Calculate the number. Also, by counting the number of history information storage areas 125 in the history area 124 of the history memory 117 in which the correspondence information indicating that the device is the special prize winning device 32 is stored, the ball is entered into the special prize winning device 32. Calculate the number. Further, by counting the number of history information storage areas 125 in which the correspondence information indicating the first operation port 33 is stored in the history area 124 of the history memory 117, the number of the first operation port 33 is increased. Calculate the number of incoming balls. Further, by counting the number of history information storage areas 125 in which the correspondence information indicating the second operation port 34 is stored in the history area 124 of the history memory 117, Calculate the number of incoming balls.

  Thereafter, in the history area 124 of the history memory 117, a history information storage area 125 in which correspondence information indicating the front door frame 14 and start information are stored, and a correspondence relationship indicating the front door frame 14. By referring to the history information storage area 125 existing in a period between the history information storage area 125 in which the information and the end information are stored, the out port generated in the situation where the front door frame 14 is in the open state is referred to. 24a, the general winning opening 31, the special power winning device 32, the first working opening 33, and the second working opening 34, the number of balls entering each is calculated (step S1403). In the history area 124 of the history memory 117, a history information storage area 125 in which correspondence information indicating the front door frame 14 and start information are stored, and correspondence information indicating the front door frame 14 and The period from the history information storage area 125 in which the end information is stored is calculated from the RTC information stored in the history information storage area 125. In addition, in the entirety of the pointer information that is a serial number, a history information storage area 125 in which correspondence information indicating the front door frame 14 and start information are stored, and a correspondence relationship indicating the front door frame 14. When there are a plurality of sections with the history information storage area 125 in which the information and the end information are stored, the number of entering balls for the total of the sections is calculated. Further, although there is a history information storage area 125 in which correspondence information and start information indicating the front door frame 14 are stored, RTC information corresponding to a time later than the history information storage area 125 is present. If the correspondence information indicating the front door frame 14 and the end information are not stored in the history information storage area 125 in which is stored the correspondence information indicating the front door frame 14 and the start information are stored. The history information in the history information storage area 125 in which the RTC information corresponding to the time after the stored history information storage area 125 is stored is treated as if the front door frame 14 is in the open state.

After that, various parameters are calculated using the calculation results of steps S1402 and S1403 (step S1404). Specifically, first, the number of incoming balls calculated during the opening of the front door frame 14 calculated in step S1403 is subtracted from the number of incoming balls calculated in step S1402. Then, the following first to eighth parameters are calculated using the respective numbers of entered balls after the subtraction. Note that the difference between the number of balls in the out port 24a calculated in step S1402 and the number of balls in the out port 24a calculated in step S1403 is defined as the number of incoming balls K1, and the number of balls in the general winning port 31 calculated in step S1402 is calculated. The difference between the number of balls in the general winning opening 31 calculated in step S1403 with respect to the number of balls is defined as the number of balls K2, and the special prize winning device calculated in step S1403 with respect to the number of balls in the special prize device 32 calculated in step S1402. The difference in the number of incoming balls of the first operating port 33 calculated in step S1403 with respect to the number of incoming balls of the first operating port 33 calculated in step S1402 is the incoming ball. The number K4 is set as the number K4, and the second number calculated in step S1403 with respect to the number of entering balls of the second operating port 34 calculated in step S1402. The difference between the ball entrance number of Doguchi 34 and ball entrance number K5.
First parameter: total number of game balls to be paid out (K2 × “number of prize balls for prize to general prize port 31” + K3 × “number of prize balls for prize to special electric prize device 32” + K4 × “first operation port 33” + K5 × “Number of prize balls for winning to the second operating port 34”) / the ratio of the total number of game balls ejected from the skill area PA (K1 + K2 + K3 + K4 + K5) (hereinafter, this ratio is referred to as “ D1 ”)
2nd parameter: ratio of total number K2 of game balls entering general winning opening 31 / total number of game balls ejected from game area PA (K1 + K2 + K3 + K4 + K5) Third parameter: game ball to special power winning device 32 Ratio of the total number of game balls K3 / the total number of game balls discharged from the game area PA (K1 + K2 + K3 + K4 + K5) .Fourth parameter: the total number of game balls entering the first operating port 33 K4 / the discharge from the game area PA. Of the total number of game balls (K1 + K2 + K3 + K4 + K5) (hereinafter, this ratio is referred to as "D2")
Fifth parameter: the ratio of the total number K5 of game balls entering the second operation port 34 / the total number of game balls discharged from the game area PA (K1 + K2 + K3 + K4 + K5) (hereinafter, this ratio is referred to as "D3").
Sixth parameter: D1− (D2 × “the number of winning balls for winning the first operating port 33” + D3 × “the number of winning balls for winning the second operating port 34”)
Seventh parameter: (K3 × “the number of winning balls for winning in the special power winning device 32” + K5 × “the number of winning balls for winning in the second operating port 34”) / the total payout number of game balls (K2 × “general”) Number of prize balls for winning in the winning opening 31 "+ K3 ×" Number of prize balls for winning in the special electric winning device 32 "+ K4 ×" Number of prize balls for winning in the first operating opening 33 "+ K5 ×" Second operating opening 34 Eighth parameter: K3 × “the number of prize balls for winning to the special electric prize device 32” / the total number of game balls paid out (K2 × “the winning number to the general winning opening 31”) Number of prize balls "+ K3 ×" Number of prize balls for winning in the special power winning device 32 "+ K4 ×" Number of prize balls for winning in the first operating port 33 "+ K5 ×" Number of prize balls for winning in the second operating port 34 )) Ratio Step S1404 Which stores the first to eighth parameter is the operation result to the normal storage area for the time of the operation result memory 131. The first to eighth parameters stored in the normal time storage area are stored and held until the next step S1404 is executed. In other words, when the next step S1404 is executed and the first to eighth parameters are calculated, the newly calculated first to eighth parameters are stored in the normal-time storage area. Up to this time, the previous calculation results of the first to eighth parameters stored in the normal time storage area are overwritten.

  After that, in the history area 124 of the history memory 117, the history information storage area 125 storing the correspondence information indicating the open / close execution mode and the start information, the correspondence information indicating the open / close execution mode, and the like. By referring to the history information storage area 125 existing in the period between the end information and the history information storage area 125, the out port 24a and the general prize port 31 generated in the open / close execution mode are referred to. Then, the number of balls entering each of the special winning award device 32, the first operating port 33, and the second operating port 34 is calculated (step S1405). In a history area 124 of the history memory 117, a history information storage area 125 storing correspondence information and start information indicating the open / close execution mode, and correspondence information and end information indicating the open / close execution mode. Is calculated from the RTC information stored in the history information storage area 125. In addition, in the entirety of the pointer information that is a serial number, the history information storage area 125 in which the correspondence information indicating the open / close execution mode and the start information are stored, the correspondence information indicating the open / close execution mode, and When there are a plurality of sections with the history information storage area 125 in which the end information is stored, the number of incoming balls for the total of the sections is calculated. In addition, although there is a history information storage area 125 in which the correspondence information indicating the opening / closing execution mode and the start information are stored, RTC information corresponding to a time later than the history information storage area 125 is stored. If the stored history information storage area 125 does not store the correspondence information indicating the open / close execution mode and the end information, the correspondence information indicating the open / close execution mode and the start information are stored. Any history information in the history information storage area 125 in which RTC information corresponding to a time later than the history information storage area 125 is stored is handled in the open / close execution mode.

  Thereafter, during the period of the opening / closing execution mode specified in step S1405, the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the outgoing port 24a generated when the front door frame 14 is in the open state. The number of balls entering each of the second operation ports 34 is calculated (step S1406). The method of calculating the number of entered balls is the same as that of step S1403 except that the period of the open / close execution mode specified in step S1405 is assumed.

After that, various parameters are calculated using the calculation results of steps S1405 and S1406 (step S1407). Specifically, first, the number of incoming balls generated during opening of the front door frame 14 calculated in step S1406 is subtracted from the number of incoming balls calculated in step S1405. Then, the following eleventh to eighteenth parameters are calculated using the respective numbers of entered balls after the subtraction. The difference between the number of balls in the out port 24a calculated in step S1405 and the number of balls in the out port 24a calculated in step S1406 is referred to as the number of balls K11, and the number of balls in the general winning port 31 calculated in step S1405 is calculated. The difference between the number of balls in the general winning opening 31 calculated in step S1406 with respect to the number of balls is defined as the number of balls K12, and the special prize winning device calculated in step S1406 with respect to the number of balls in the special prize winning device 32 calculated in step S1405. The difference between the number of incoming balls of 32 is the number of incoming balls K13, and the difference between the number of incoming balls of the first operating port 33 calculated in step S1406 and the number of incoming balls of the first operating port 33 calculated in step S1405 is entered In step S1406, the number K14 is set as the number K14 and the number of balls in the second working port 34 calculated in step S1405. The difference between the ball entrance number of the second actuating port 34 and ball entrance number K15 was.
Eleventh parameter: the total number of game balls to be paid out (K12 × “the number of prize balls for winning into the general winning opening 31” + K13 × “the number of prize balls for winning to the special electric winning device 32” + K14 × “the first operating port 33” + K15 × “Number of prize balls for winning to the second operating port 34”) / Ratio of the total number of game balls ejected from the game area PA (K11 + K12 + K13 + K14 + K15) (hereinafter, this ratio is referred to as “ D11 ”)
The twelfth parameter: the ratio of the total number of game balls K12 to the general winning opening 31 / the total number of game balls discharged from the game area PA (K11 + K12 + K13 + K14 + K15). The thirteenth parameter: the game balls to the special power prize device 32. Of the total number of game balls K13 / the total number of game balls ejected from the game area PA (K11 + K12 + K13 + K14 + K15). Fourteenth parameter: Total number of game balls entering the first operating port 33 K14 / discharge from the game area PA. Of the total number of game balls (K11 + K12 + K13 + K14 + K15) (hereinafter, this ratio is referred to as "D12")
A fifteenth parameter: a ratio of the total number K15 of game balls entering the second operation port 34 / the total number of game balls discharged from the game area PA (K11 + K12 + K13 + K14 + K15) (hereinafter, this ratio is referred to as “D13”).
Sixteenth parameter: D11− (D12 × “the number of winning balls for winning the first operating port 33” + D13 × “the number of winning balls for winning the second operating port 34”)
Seventeenth parameter: (K13 × “the number of winning balls for winning in the special power winning device 32” + K15 × “the number of winning balls for winning in the second operating port 34”) / total payout number of game balls (K12 × “general” Number of prize balls for winning in the prize opening 31 "+ K13 ×" Number of prize balls for winning in the special electric winning device 32 "+ K14 ×" Number of prize balls for winning in the first operating port 33 "+ K15 ×" Second operating port 34 18th parameter: K13 × “Number of prize balls for prize to special electric prize device 32” / total number of game balls paid out (K12 × “for prize to general prize port 31”) Number of prize balls ”+ K13 ד Number of prize balls for winning in the special power winning device 32 ”+ K14 ד Number of prize balls for winning in the first operating port 33 ”+ K15 ד Number of prize balls for winning in the second operating port 34 ” ") In step S1407, the first to eighteenth parameters, which are the calculation results, are stored in the open / close execution mode storage area of the calculation result memory 131. The first to eighteenth parameters stored in the open / close execution mode storage area are stored and held until the next step S1407 is executed. In other words, when the next step S1407 is executed to calculate the 11th to 18th parameters, the newly calculated 11th to 18th parameters are stored in the open / close execution mode storage area. Then, the previous calculation results of the first to eighteenth parameters stored in the opening / closing execution mode storage area are overwritten.

  Thereafter, in the history area 124 of the history memory 117, a history information storage area 125 in which correspondence information indicating the high frequency support mode and start information are stored, and a correspondence relationship indicating the high frequency support mode. By referring to the history information storage area 125 existing in the period between the information and the end information stored in the history information storage area 125, the out port 24a generated in the high frequency support mode, The number of balls entered into each of the winning opening 31, the special electric winning device 32, the first operating opening 33, and the second operating opening 34 is calculated (step S1408). In the history area 124 of the history memory 117, the history information storage area 125 storing the correspondence information indicating the high frequency support mode and the start information, the correspondence information indicating the high frequency support mode, and the like. The period from the history information storage area 125 in which the end information is stored is calculated from the RTC information stored in the history information storage area 125. In addition, in the entirety of the pointer information that is a serial number, the history information storage area 125 in which the correspondence information indicating the high frequency support mode and the start information are stored, and the correspondence indicating the high frequency support mode. When there are a plurality of sections with the history information storage area 125 in which the information and the end information are stored, the number of entering balls for the total of the sections is calculated. Further, although there is a history information storage area 125 in which correspondence information indicating the high frequency support mode and start information are stored, RTC information corresponding to a time later than the history information storage area 125 is present. Is stored in the history information storage area 125 in which the high-frequency support mode is not stored, the correspondence information and the start information indicating the high-frequency support mode are stored. The history information in the history information storage area 125 in which RTC information corresponding to a time later than the stored history information storage area 125 is stored is treated as that in the high frequency support mode.

  Thereafter, during the period of the high-frequency support mode specified in step S1408, the out opening 24a, the general winning opening 31, the special winning opening device 32, and the first operating opening 33 generated when the front door frame 14 is open. Then, the number of balls entering each of the second working ports 34 is calculated (step S1409). The method of calculating the number of entered balls is the same as that in step S1403 except that the period of the high frequency support mode specified in step S1408 is assumed.

After that, various parameters are calculated using the calculation results of steps S1408 and S1409 (step S1410). Specifically, first, the number of incoming balls generated during opening of the front door frame 14 calculated in step S1409 is subtracted from the number of incoming balls calculated in step S1408. Then, the following 21st to 26th parameters are calculated using the numbers of each ball after the subtraction. The difference between the number of balls in the out port 24a calculated in step S1408 and the number of balls in the out port 24a calculated in step S1409 is referred to as the number of balls K21, and the number of balls in the general winning port 31 calculated in step S1408. The difference between the number of balls in the general winning opening 31 calculated in step S1409 with respect to the number of balls is defined as the number of balls K22, and the special prize winning device calculated in step S1409 with respect to the number of balls in the special prize device 32 calculated in step S1408. The difference between the number of incoming balls of 32 is the number of incoming balls K23, and the difference between the number of incoming balls of the first operating port 33 calculated in step S1409 and the number of incoming balls of the first operating port 33 calculated in step S1408 is entered. In step S1409, the number is set to K24, and the number of balls in the second working port 34 calculated in step S1408 is calculated in step S1409. The difference between the ball entrance number of the second actuating port 34 and ball entrance number K25 was.
21st parameter: total payout number of game balls (K22 × “number of prize balls for winning to general prize port 31” + K23 × “number of prize balls for winning to special electric prize device 32” + K24 × “first operating port 33” + K25 × “Number of prize balls for winning to the second operating port 34”) / Ratio of the total number of game balls ejected from the game area PA (K21 + K22 + K23 + K24 + K25) (hereinafter, this ratio is referred to as “ D11 ”)
22nd parameter: ratio of the total number of game balls K22 to the general winning opening 31 / total number of game balls ejected from the game area PA (K21 + K22 + K23 + K24 + K25). 23rd parameter: game balls to the special prize winning device 32. Ratio of the total number of game balls K23 / the total number of game balls discharged from the game area PA (K21 + K22 + K23 + K24 + K25). Twenty-fourth parameter: the total number of game balls entering the first operating port 33 K24 / the discharge from the game area PA. Of the total number of game balls (K21 + K22 + K23 + K24 + K25) (hereinafter, this ratio is referred to as "D22")
• Twenty-fifth parameter: the ratio of the total number K25 of game balls entering the second operation port 34 / the total number of game balls discharged from the game area PA (K21 + K22 + K23 + K24 + K25) (hereinafter, this ratio is referred to as "D23").
26th parameter: D21− (D22 × “the number of winning balls for winning the first operating port 33” + D23 × “the number of winning balls for winning the second operating port 34”)
In step S1410, the 21st to 26th parameters, which are the operation results, are stored in the high-frequency support mode storage area of the operation result memory 131. The 21st to 26th parameters stored in the high frequency support mode storage area are stored and held until the next step S1410 is executed. In other words, when the next step S1410 is executed and the 21st to 26th parameters are calculated, the newly calculated 21st to 26th parameters are stored in the high-frequency support mode storage area. Thus, the previous calculation results of the 21st to 26th parameters previously stored in the high frequency support mode storage area are overwritten.

Thereafter, the frequency of occurrence of the open / close execution mode is calculated and stored (step S1411). Specifically, by counting the number of the history information storage areas 125 in which the correspondence information indicating the open / close execution mode and the start information are stored in the history area 124 of the history memory 117, the open / close execution mode is counted. Is calculated. Further, the number of occurrences of the game times is calculated by counting the number of history information storage areas 125 in the history area 124 of the history memory 117 in which the correspondence information indicating the start of the game times is stored. . Then, the number of occurrences of the open / close execution mode per unit game time is calculated. Note that the number of occurrences of the open / close execution mode is referred to as the number of occurrences K31, and the number of occurrences of the game times is referred to as the number of occurrences K32.
31st parameter: K31 / K32
In step S1411, the 31st parameter, which is the calculation result, is stored in the open / close execution mode frequency storage area in the calculation result memory 131. The 31st parameter stored in the open / close execution mode frequency storage area is stored and held until the next step S1411 is executed. In other words, when the next step S1411 is executed and the 31st parameter is calculated, the newly calculated 31st parameter is stored in the opening / closing execution mode frequency storage area, so that the opening / closing execution mode is not changed until then. The previous calculation result of the 31st parameter stored in the frequency storage area is overwritten.

Thereafter, the frequency of occurrence of the high frequency support mode is calculated and stored (step S1412). Specifically, in the history area 124 of the history memory 117, by counting the number of the history information storage areas 125 in which the correspondence information indicating the high-frequency support mode and the start information are stored, Calculate the number of occurrences of support mode. Further, the number of occurrences of the game times is calculated by counting the number of history information storage areas 125 in the history area 124 of the history memory 117 in which the correspondence information indicating the start of the game times is stored. . Then, the number of occurrences of the high-frequency support mode per unit game time and the ratio of the number of occurrences of the high-frequency support mode to the number of occurrences of the open / close execution mode are calculated. The number of occurrences of the high-frequency support mode is set to the number of occurrences K41, the number of occurrences of the game times is set to the number of occurrences K42, and the number of occurrences of the open / close execution mode calculated in step S1411 is set to the number of occurrences K43.
-41st parameter: K41 / K42
-42nd parameter: K41 / K43
In step S1412, the 41st to 42nd parameters, which are the calculation results, are stored in the high-frequency support mode frequency storage area in the calculation result memory 131. The 41st to 42nd parameters stored in the high-frequency support mode frequency storage area are stored and held until the next step S1412 is executed. That is, when the 41st to 42nd parameters are calculated by executing the next step S1412, the newly calculated 41st to 42nd parameters are stored in the high-frequency support mode frequency storage area. Thus, the previous calculation results of the 41st to 42nd parameters stored in the high-frequency support mode frequency storage area are overwritten.

  When a negative determination is made in step S1401, or when the process of step S1412 is performed, a display process is performed (step S1413). FIG. 31 is a flowchart showing the display processing.

  First, the value of the update timing counter provided in the management side RAM 114 is decremented by 1 (step S1501). The update timing counter is a counter for specifying by the management-side CPU 112 that it is time to update the display contents of the management result of the game history on the first to third notification display devices 69a to 69c. The management-side CPU 112 controls the display of the first to third notification display devices 69a to 69c to thereby control the first to eighth parameters, the 11th to 18th parameters, the 21st to 26th parameters, and the 31st parameter. The parameter and the calculation results of the 41st to 42nd parameters are reported. In this case, the information corresponding to the type of the parameter to be notified is displayed on the first notification display device 69a. Also, of the value obtained by multiplying the parameter to be notified by 100, the number corresponding to the tens place is displayed on the second notification display device 69b, and the number corresponding to the ones place is displayed on the third notification display. It is displayed on the device 69c. In the first to third notification display devices 69a to 69c, the first to eighth parameters, the 11th to 18th parameters, the 21st to 26th parameters, the 31st parameter, and the 41st to 41st parameters The display corresponding to the calculation result of the forty-second parameter is sequentially switched according to a predetermined order, and after the calculation result of the forty-second parameter, which is the display object of the last order, is displayed, the display object of the first order is displayed. The calculation result of one parameter is displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is 2 seconds.

  Here, the calculation cycle of the various parameters in the management CPU 112 is 51 seconds. On the other hand, the number of various parameters is 25, and the period in which the calculation result of one parameter is continuously displayed is 2 seconds. Therefore, various parameters calculated by the management-side CPU 112 are displayed at least once on the first to third notification display devices 69a to 69c.

  When the process of step S1501 is performed, the display contents of the first to third notification display devices 69a to 69c are updated by determining whether or not the value of the update timing counter after subtracting 1 is “0”. It is determined whether or not it is time to perform (step S1502). If an affirmative determination is made in step S1502, the value of the display target counter provided in the management-side RAM 114 is incremented by 1 (step S1503). Then, when the value of the display target counter after adding 1 exceeds the maximum value “24” (step S1504: YES), the value of the display target counter is cleared to “0” (step S1505).

  The display target counter is a counter for the management-side CPU 112 to specify the type of parameter to be displayed on the first to third notification display devices 69a to 69c. The first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, the fourteenth to forty-second parameters, and the display target counters “0” to “24” The possible values correspond one-to-one. For example, when the value of the display target counter is “0”, the first parameter to be displayed first is the display target of the first to third notification display devices 69a to 69c, and the value of the display target counter is “24”. In the case of, the 42nd parameter which is the last display target is the display target of the first to third notification display devices 69a to 69c.

  If a negative determination is made in step S1504, or if the process of step S1505 is performed, the first notification display device 69a is displayed so that information corresponding to the type of parameter corresponding to the value of the display target counter is displayed. It controls (step S1506). In addition, a parameter corresponding to the value of the display target counter is read from the calculation result memory 131, the read parameter is multiplied by 100, and a number corresponding to the tens place is displayed on the second notification display device 69b. The number corresponding to the ones digit is displayed on the third notification display device 69c (step S1507). The contents displayed on the first to third notification display devices 69a to 69c in steps S1506 and S1507 are continued until the next update timing or until the supply of the operating power to the management CPU 112 is stopped. You. Thereafter, a value corresponding to 2 seconds is set as a value corresponding to the next update timing in the update timing counter of the management side RAM 114 (step S1508).

  When the supply of the operating power to the management-side CPU 112 is started by executing the display processing as described above, the management result of the game history is displayed on the first to third notification display devices 69a to 69c. Is done. The display of the management result of the game history is performed irrespective of whether the game is continued or not, and the main control device 60 is opened from the front of the pachinko machine 10 by opening the gaming machine main body 12 with respect to the outer frame 11. This is performed regardless of whether it is visible. As described above, the display control of the first to third notification display devices 69a to 69c is performed regardless of the state of the game and the state of the pachinko machine 10, thereby the first to third notification display devices 69a. It is possible to simplify the processing configuration for controlling the display of .about.69c.

  The display of the management result of the game history on the first to third notification display devices 69a to 69c is started after the supply of the operation power to the management CPU 112 is started and after the identification end command is received from the main CPU 63. Is done. In this case, similarly to the information stored in the history memory 117, the information stored in the operation result memory 131 is stored and held even when the supply of the operation power to the pachinko machine 10 is stopped. Therefore, when the supply of the operation power to the management CPU 112 is started, the management result of the game history calculated before the supply of the operation power to the management CPU 112 is stopped is displayed.

  When the setting of the setting state of the pachinko machine 10 is performed when the supply of the operating power to the main CPU 63 is started, information corresponding to the set value being changed is displayed on the third notification display device 69c. That is, the information corresponding to the set value is displayed before the identification end command is transmitted from the main CPU 63, whereas the game history on the first to third notification display devices 69a to 69c is displayed. Is started after the main CPU 63 transmits the identification end command. Accordingly, even when the third notification display device 69c is configured to also serve as a display device for displaying information corresponding to the set value and displaying a management result of the game history, the display of these displays is performed. Periods can be prevented from overlapping.

  When the information corresponding to the set value is displayed, the first notification display device 69a and the second notification display device 69b are not displayed. On the other hand, when the management result of the game history is displayed, the first notification display device 69a and the second notification display device 69b are not hidden. This makes it possible to identify which of the display of the information corresponding to the set value and the display of the management result of the game history is performed on the third notification display device 69c.

  Next, a processing configuration for outputting history information stored in the history memory 117 and various parameters stored in the operation result memory 131 to an external device electrically connected to the reading terminal 68d of the MPU 62. explain. FIG. 32A is a flowchart showing a data output process executed by the main CPU 63. The data output process is executed in step S112 in the main process (FIG. 9).

  In the data output processing, first, it is determined whether or not a connection signal indicating that an external device is electrically connected to the reading terminal 68d is received from the reading terminal 68d (step S1601). If a negative determination is made in step S1601, the present data output process ends. In this case, it is necessary to restart the supply of the operating power to the main CPU 63 in order to execute the data output processing. Thereby, in order to externally output the history information and various parameters, the supply of the operating power to the main CPU 63 is started while the external device is electrically connected to the reading terminal 68d. Need to be The power switch for performing the operation of stopping and starting the supply of the operating power to the main CPU 63 is provided in the dispensing mechanism 73 mounted on the back surface of the back pack unit 15. To do so, it is necessary to open the gaming machine main body 12 to the outer frame 11 to expose the back surface of the back pack unit 15. In such a situation, in order to externally output the history information and various parameters, the supply of the operating power to the main CPU 63 is started while the external device is electrically connected to the reading terminal 68d. By adopting a configuration in which it is necessary to perform the operation for reading the history information and various parameters, even if a person other than the administrator of the gaming hall attempts to perform the operation, it is possible to make it difficult.

  If an affirmative determination is made in step S1601, it is determined whether a signal for confirming control information has been received from the reading terminal 68d. It is determined whether or not the confirmation of the control information (program and data) is supported (step S1602). The external device is capable of performing both the confirmation of the control information and the confirmation of the history information and various parameters. When the confirmation of the control information is selected by a manual operation on the external device, the external device transmits the information. A signal for control information confirmation is transmitted, and when confirmation of history information and various parameters is selected by manual operation on the external device, a signal for history confirmation is transmitted from the external device. The configuration is not limited to this, and the external device for confirming control information and the external device for confirming history may be different. In this case, if an external device for control information confirmation is electrically connected to the read terminal 68d, a signal for control information confirmation is transmitted from the external device, and an external device for history confirmation is transmitted to the read terminal 68d. When the device is electrically connected, a signal for history confirmation is transmitted from the external device.

  If an affirmative determination is made in step S1602, an output process for confirming control information is executed (step S1603). In the output process, a program and data are read as control information from the main ROM 64, and the read control information is output to the reading terminal 68d. As a result, the control information can be read by an external device that is electrically connected to the reading terminal 68d, and whether the control information is correct or not is checked. Can be performed.

  If a negative determination is made in step S1602, an output instruction signal is transmitted to the management CPU 112 (step S1604). Specifically, the output state of the output instruction signal is switched from the LOW level to the HI level. This HI level output state is continued for a specific period. This specific period is a period sufficient for the management-side CPU 112 to specify that the HI-level output instruction signal has been input to the sixteenth buffer 122p. When the output state of the output instruction signal is switched to the HI level, the management-side CPU 112 executes processing for outputting history information.

  Specifically, as shown in the flowchart of FIG. 32B, the management-side CPU 112 switches the output state of the output instruction signal input to the sixteenth buffer 122p of the input port 121 from the LOW level to the HI level. (Step S1701: YES), the history information stored in the history memory 117 and the various parameters stored in the calculation result memory 131 are read, and the read history information and various parameters are output to the reading terminal 68d. (Step S1702). As a result, history information and various parameters can be read by an external device that is electrically connected to the reading terminal 68d, and information on the management result of the game history can be analyzed. In addition, when the management-side CPU 112 outputs the history information to the reading terminal 68d, the history memory 117 is cleared to "0" (step S1703). The history information in the history memory 117 is deleted only when the history information is read by the external device.

  Returning to the description of the data output processing (FIG. 32A), when the processing of step S1603 or the processing of step S1604 is performed, the electrical connection of the external device to the reading terminal 68d is continued. It is determined whether or not it has been performed (step S1605). If continued (step S1605: YES), the process stands by at step S1605. This makes it possible to prevent the processing set in the execution order after the data output processing from being executed until the connection of the external device to the reading terminal 68d is released. When the connection of the external device to the reading terminal 68d is released (step S1605: NO), the data output processing ends.

  According to the embodiment described in detail above, the following excellent effects can be obtained.

  When a game ball enters any one of the general winning opening 31, the special electric winning device 32, the first operating opening 33, and the second operating opening 34, the game ball is paid out. The game is played while expecting the game ball to enter the ball. In this configuration, a game ball enters any one of the out port 24a, the general winning port 31, the special power winning device 32, the first operating port 33, and the second operating port 34 (hereinafter, also referred to as a history target input section). Occurs, the corresponding history information is stored in the history memory 117 of the management IC 66. This allows the pachinko machine 10 to store and hold information for managing the number or frequency of game balls entering each history target entry section, and uses the managed information. This makes it possible to appropriately manage the manner in which game balls enter each history target entry section. In addition, since the history information is stored and held in the pachinko machine 10 itself, it is possible to prevent unauthorized access to the history information and unauthorized modification.

  All the ball entry sections for ejecting game balls from the game area PA are subjected to storage processing of the history information and are also managed using the history information. As a result, it is possible to manage the ball entry frequency for an arbitrary history target entry section using the history information. In addition, it is possible to manage the ratio of the number of game balls entering each history target entry section to the number of game balls ejected from the game area PA using the history information.

  The history information includes RTC information that is information corresponding to the timing at which a game ball entered the history target entry section that triggered the storage of the history information. Thus, by using the history information, it is possible to grasp in detail the ball entry history of the game ball in the entry section for the history.

  In the history memory 117, not only history information corresponding to a game ball having entered the history target ball entry unit, but also history information indicating whether or not the opening / closing execution mode is being performed, and the high frequency support mode. History information indicating whether or not the front door frame 14 is being opened is stored. This makes it possible to manage the state of entry of the game ball into the history entry section, distinguishing whether or not each of these situations is present.

  The history information stored in the history memory 117 can be output to an external device that is an external device of the pachinko machine 10. This makes it possible to read the history information with the external device and analyze the manner in which the game ball enters the history target ball entry section using the read history information.

  The MPU 62 is provided with a reading terminal 68d, and a program can be read from the main ROM 64 by an external device electrically connected to the reading terminal 68d. Thereby, it is possible to confirm whether or not the program is normal. In this configuration, the history information stored in the history memory 117 is externally output using the reading terminal 68d for externally outputting the program. This makes it possible to externally output the history information while preventing the configuration from becoming complicated.

  The information to be output from the reading terminal 68d is specified as either the program or the history information, and the information corresponding to the specified result is externally output through the reading terminal 68d. Thus, in the configuration in which the history information is externally output using the reading terminal 68d for externally outputting the program, the pachinko machine 10 determines whether the information to be externally output is the program or the history information. Side, and the specified information is output to the outside. Therefore, only the necessary information can be read even in a configuration in which the reading terminal 68d is also used.

  Based on information received from an external device electrically connected to the reading terminal 68d, it is specified which of the program and the history information the information to be output from the reading terminal 68d is. This makes it possible to prevent the configuration for selecting information to be output from the outside from becoming complicated.

  An MPU 62 having a main ROM 64 that stores a program in advance has a management IC 66 and a reading terminal 68d. As a result, the signal paths for the reading terminal 68d can be integrated in the MPU 62. Therefore, it is possible to obtain the above-described excellent effects while making it difficult to perform unauthorized access to the signal path to the reading terminal 68d.

  A main CPU 63 that executes processing for paying out game balls based on the entry of game balls into any of the general winning opening 31, the special electric winning device 32, the first operating opening 33, and the second operating opening 34. In addition, a management CPU 112 is provided, and the management CPU 112 executes processing for storing history information in the history memory 117. This makes it possible to manage the manner in which game balls enter each history target entry section while preventing the processing load on the main CPU 63 from becoming extremely large.

  The main CPU 63 and the management CPU 112 are provided on the same chip as the MPU 62. This makes it possible to prevent unauthorized access to the communication path between the main CPU 63 and the management CPU 112.

  The main-side CPU 63 transmits information corresponding to the detection results of the ball detection sensors 42a to 48a to each buffer of the input port 121 of the management IC 66 using signal paths corresponding to the ball detection sensors 42a to 48a. It transmits to 122a-122g. As a result, the type of information transmitted from the main CPU 63 corresponds to each of the buffers 122a to 122g (that is, each signal path), and the configuration for distinguishing each type of information in the management CPU 112 is simplified. It is possible to do.

  The main CPU 63 has information corresponding to whether the open / close execution mode is being performed, information corresponding to whether the high frequency support mode is being performed, information corresponding to whether the front door frame 14 is being opened, Then, information corresponding to the start of the game round is transmitted to each of the buffers 122h to 122k of the input port 121 of the management IC 66 by using signal paths corresponding to each of these situations. As a result, the types of information corresponding to these situations correspond to the buffers 122h to 122k (that is, the respective signal paths), and the configuration for distinguishing the types of information in the management-side CPU 112 is simplified. It becomes possible.

  The main CPU 63 transmits to the management CPU 112 correspondence information indicating which type of information the buffers 122a to 122k (that is, the signal paths 118a to 118k) correspond to. This eliminates the need to store the correspondence information in the management IC 66 in advance. Therefore, the versatility of the management IC 66 can be improved.

  When the supply of the operating power to the main CPU 63 is started, the correspondence information is transmitted from the main CPU 63 to the management IC 66. Thereby, in a situation where a game ball can enter the history target ball entry part, the correspondence between the information transmitted from the main CPU 63 and the history target ball entry part can be specified by the management IC 66. It becomes possible to become.

  Correspondence information is transmitted from the main CPU 63 to the management IC 66 using the signal paths 118a to 118g for transmitting information indicating whether or not a game ball has entered the history target entry section. This makes it possible to simplify the configuration related to communication as compared with a configuration in which a dedicated signal path for transmitting the correspondence information is provided.

  The management IC 66 is provided with a correspondence memory 116, and the correspondence information transmitted from the main CPU 63 to the management IC 66 is stored in the correspondence memory 116. Thereby, every time the main CPU 63 transmits the information of the detection results of each of the ball detection sensors 42a to 48a, the information enabling the history target ball entry part corresponding to the information to be transmitted to be specified by the management IC 66 is transmitted. No need to provide. Therefore, it is possible to reduce the amount of information of the detection result of each of the incoming ball detection sensors 42a to 48a transmitted from the main CPU 63.

  When the output state of the output instruction signal output from the main CPU 63 to the management IC 66 is switched from the LOW level to the HI level, information is output from the management IC 66 to the reading terminal 68d. In this case, the fact that the signal path corresponding to the sixteenth buffer 122p corresponds to the output instruction signal can be specified by the management CPU 112 without receiving the correspondence information from the main CPU 63. . This makes it possible to prevent the configuration related to the transmission of the correspondence information from becoming extremely complicated.

  The management IC 66 is provided with buffers larger than the number of types of information that need to be transmitted from the main CPU 63 to the management IC 66, as buffers 122a to 122p capable of receiving information from the main CPU 63. Have been. Accordingly, even when the number of types of the information increases or decreases according to the type of the pachinko machine 10, it is possible to cope without changing the configuration regarding the buffers 122a to 122p. Therefore, the versatility of the management IC 66 can be improved.

  When the history information is transmitted from the management IC 66 to the reading terminal 68d, each piece of history information includes correspondence information indicating the type of the target ball entry unit corresponding to the history information. This makes it possible to specify the manner in which game balls enter each history target entry section using the read history information.

  By using the history information stored in the history memory 117 in the management IC 66, various parameters (first to eighth parameters, eleventh parameter, To 18th parameter, 21st to 26th parameter, 31st parameter, 41st to 42nd parameter) are calculated. Then, various parameters of these calculated results are sequentially displayed on the first to third notification display devices 69a to 69c. This allows the pachinko machine 10 to notify the pachinko machine 10 of various parameters obtained as a result of the calculation using the history information.

  Various parameters are calculated with the history information corresponding to the situation where the front door frame 14 is being opened excluded. This makes it possible to derive various parameters in a normal situation where the front door frame 14 is in the closed state. Also, various parameters corresponding to the open / close execution mode and the high-frequency support mode are calculated. As a result, it becomes possible for the manager of the game hall or the like to grasp the state of entering the game ball according to each situation.

  When the history information of the history memory 117 is output to the external device, the history memory 117 is initialized by executing the clearing process of the history memory 117. As a result, the history information that exceeds the storage capacity of the history memory 117 is to be stored in the history memory 117, and the history information that should be stored and retained is erased by overwriting. Is less likely to occur.

  In a configuration in which when a game ball enters the first operating port 33 or the second operating port 34, the corresponding external output is performed through the external terminal plate 97, and the history information is stored in the history memory 117. . Thus, the history and the number of game balls entering the first operation port 33 and the second operation port 34 can be easily grasped by utilizing the information externally output through the external terminal plate 97, and the history is obtained. By using the history information stored in the memory for use 117, it is possible to accurately grasp the number and frequency of game balls entering the history target entry section.

  The probability of the jackpot result in the low probability mode fluctuates according to the setting state of the pachinko machine 10 from “Setting 1” to “Setting 6”. This makes it possible to generate a situation where even a single pachinko machine 10 is advantageous or disadvantageous in the probability of a jackpot result in the low probability mode. Therefore, it is possible to improve the interest of the game.

  The probability of the jackpot result in the low probability mode fluctuates according to the setting state of the pachinko machine 10 in “Setting 1” to “Setting 6”, while the probability of the jackpot result in the high probability mode is set in the pachinko machine 10. Does not change according to the state. This makes it possible to limit the influence of the setting state of the pachinko machine 10 on the probability of the jackpot result to the situation in the low probability mode. Further, since the high probability table 64g referred to in the high probability mode can be made common regardless of the setting state of the pachinko machine 10, the probability table 64a to 64g is previously stored in the main ROM 64. It is possible to suppress an increase in storage capacity for storing.

  The probability of the jackpot result in the low probability mode fluctuates according to the setting state of the pachinko machine 10 from “Setting 1” to “Setting 6”, while the distribution mode of the type of the jackpot result is changed to the setting state of the pachinko machine 10. Does not fluctuate accordingly. This makes it possible to limit the influence of the setting state of the pachinko machine 10 to the situation in the low probability mode. In addition, since the distribution table 64h referred to when allocating the type of the jackpot result can be made common regardless of the setting state of the pachinko machine 10, the distribution table 64h in the main ROM 64 is used. Can be suppressed from increasing the storage capacity for pre-storing the information.

  Even if a new setting of the setting state of the pachinko machine 10 is performed, the history information stored in the history memory 117 is stored without being erased. As a result, even if a new setting of the setting state of the pachinko machine 10 is performed, it is possible to continuously store the history information up to that time in the history memory 117, and the history memory 117 can be stored for a long period of time. The management result of the game history can be specified using the history information accumulated in 117.

  Even if a new setting of the setting state of the pachinko machine 10 is performed, in a configuration in which the history information stored in the history memory 117 is stored and held without being erased, a new setting of the setting state of the pachinko machine 10 is performed. Is performed, the corresponding history information is stored in the history memory 117. This makes it possible to distinguish between the history information before the new setting of the setting state of the pachinko machine 10 and the history information after the new setting.

  When history information corresponding to the setting state of the pachinko machine 10 is newly stored in the history memory 117, information corresponding to the set value is included in the history information. This makes it possible to specify the contents of the setting values set in the past by referring to the history information.

  When various parameters are calculated at the calculation timing, the history information corresponding to the new setting of the setting state of the pachinko machine 10 in the history memory 117 is used as a reference, and the history information stored after that is used. To calculate various parameters. In this case, it becomes possible to derive the management result of the game history at the timing after the setting of the pachinko machine 10 is newly set as various parameters.

  In the case where various parameters are calculated at the calculation timing, the history information corresponding to the new setting of the setting state of the pachinko machine 10 in the history memory 117 and the history information corresponding to the change of the set value is used as a reference. Alternatively, the configuration may be such that various parameters are calculated using history information stored after that. In this case, the management result of the game history at the timing after the setting state of the pachinko machine 10 has been changed can be derived as various parameters.

  Further, although the opening for exposing the reading terminal 68d is provided in the board box 60a of the main control device 60, the opening is not provided, and the reading terminal 69d is provided on the opposing wall 60b. It is good also as composition covered with. In this case, it is necessary to open the substrate box 60a in order to connect an external device to the reading terminal 68d.

<Second embodiment>
In the present embodiment, the content of the hit / fail table corresponding to the setting state of the pachinko machine 10 is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

  FIG. 33 is an explanatory diagram for explaining various tables stored in the main ROM 64 in the present embodiment.

  As shown in FIG. 33, in the main ROM 64, a setting 1 area 161, a setting 2 area 162, a setting 3 area 163, a setting 4 area 164, a setting 5 area 165, and a setting 6 area 166 are provided. The setting 1 area 161 includes a low-accuracy winning / failing table 161a for setting 1 that is referred to when the setting state of the pachinko machine 10 is “setting 1” and the winning / rejecting lottery mode is the low probability mode. Is stored in the case where the setting state is “Setting 1” and the winning / rejecting lottery mode is the high probability mode. The setting 2 area 162 includes a low-accuracy winning / failing table 162a for setting 2, which is referred to when the setting state of the pachinko machine 10 is “setting 2” and the winning / rejecting lottery mode is the low probability mode. Is stored in the setting state of “setting 2” and the winning / rejecting lottery mode is the high probability mode. The setting 3 area 163 includes a low-accuracy winning / failing table 163a for setting 3 that is referred to when the setting state of the pachinko machine 10 is “setting 3” and the winning / rejecting lottery mode is the low probability mode. Is stored in the setting state of “setting 3”, and the high-accuracy winning / failing table 163b for setting 3 which is referred to when the winning / lottery mode is the high probability mode.

  The setting 4 area 164 includes a low-probability table 164a for setting 4, which is referred to when the setting state of the pachinko machine 10 is “setting 4” and the winning / rejecting lottery mode is the low probability mode. Is stored in the setting state of “Setting 4”, and the high-probability determination table 164b for setting 4 that is referred to when the winning / rejecting lottery mode is the high probability mode. The setting 5 area 165 includes a low-probability table 165a for setting 5, which is referred to when the setting state of the pachinko machine 10 is “setting 5” and the winning / rejecting lottery mode is the low probability mode. Is stored in the setting state of “setting 5”, and the high-probability determination table 165b for setting 5 which is referred to when the winning / rejecting lottery mode is the high probability mode. The setting 6 area 166 includes a low-probability table 166a for setting 6, which is referred to when the setting state of the pachinko machine 10 is “setting 6” and the winning / rejecting lottery mode is the low probability mode. Is stored in the case of the “setting 6” and the winning / rejecting lottery mode is the high probability mode.

  The winning probabilities of the jackpot results set in each of the low-probability tables 161a to 166a are different from each other. More specifically, when the low-probability table 161a for setting 1 is referred to, the jackpot results at about 1/320, and when the low-probability table 162a for setting 2 is referred, about 1/310. , A jackpot result is obtained. When the low-accuracy determination table 163a for setting 3 is referred to, a large-hit result is obtained at about 1/300, and when the low-accuracy determination table 164a for setting 4 is referred to, about 1/290. The result is a jackpot, and when the low-probability table 165a for the setting 5 is referred to, the result is about 1/280, and when the low-probability table 166a for the setting 6 is referred to, about 1/270. The result is a jackpot. As a result, when the setting state of the pachinko machine 10 has a higher setting value, a jackpot result is more likely to occur in the low probability mode, which is advantageous for the player.

  The winning probabilities of the jackpot results set in each of the high-probability tables 161b to 166b are different from each other. More specifically, when the high accuracy determination table 161b for the setting 1 is referred to, the jackpot result is about 1/45, and when the high accuracy determination table 162b for the setting 2 is referred to, the result is about 1/40. , A jackpot result is obtained. When the high-accuracy determination table 163b for the setting 3 is referred to, a large-hit result is obtained at about 1/35. , A jackpot result is obtained, and when the high-accuracy determination table 165b for the setting 5 is referred to, the jackpot result is about 1/25. When the high-accuracy determination table 166b for the setting 6 is referenced, about 1/20. The result is a jackpot. As a result, if the setting state of the pachinko machine 10 has a higher setting value, a jackpot result is more likely to occur in the high probability mode, which is advantageous for the player.

  That is, in the first embodiment, the winning probability of the jackpot result in the low probability mode is higher as the setting state of the pachinko machine 10 is higher, while the winning probability of the jackpot result in the higher probability mode is “setting 1”. Although the configuration is the same regardless of the setting state of “Setting 6”, in the present embodiment, both the winning probability of the jackpot result in the low probability mode and the winning probability of the jackpot result in the high probability mode are pachinko. The higher the setting state of the machine 10 is, the higher the setting value is. As a result, it is possible to increase the advantage of the player with respect to the setting of a high setting value.

  In addition, even if the winning probability of the jackpot result of the low probability mode in the case of the “setting 6” which is the highest setting state, the winning probability of the jackpot result of the high probability mode in the case of the “setting 1” which is the lowest setting state. It is set lower than the probability. This makes it possible to prevent the player's advantage when the setting state of the pachinko machine 10 is “setting 1” from becoming extremely low, and to change the setting state of the pachinko machine 10 to “setting 1”. In the case of "6", it is possible to prevent the advantage of the player from becoming extremely high.

  On the other hand, as in the first embodiment, only one type of distribution table 64h is provided so as to be common in any of the setting states of “Setting 1” to “Setting 6”. This makes it possible to avoid the advantage or disadvantage caused by the setting state of the pachinko machine 10 in the distribution mode of the jackpot result, and to store the distribution table 64h in the main ROM 64 in advance. Can be suppressed.

  The winning probability of the jackpot result in the low probability mode is higher when the setting state of the pachinko machine 10 is higher, whereas the winning state of the jackpot result in the higher probability mode is higher. The configuration may be such that the setting value is lower. In this case, in the low probability mode, the higher the setting state of the pachinko machine 10 is, the more advantageous the player is, and in the high probability mode, the lower the setting state of the pachinko machine 10 is, the more advantageous the player is. It becomes possible.

  The winning probability of the jackpot result in the high probability mode is higher when the setting state of the pachinko machine 10 is higher, while the winning probability of the jackpot result in the lower probability mode is “Setting 1” to “Setting 6”. May be constant in the setting state of "." In this case, in the high probability mode, the higher the set state of the pachinko machine 10 is, the more advantageous the player is in the setting value, and in the low probability mode, it is possible to prevent the advantage or disadvantage caused by the setting state of the pachinko machine 10 from occurring. Become.

<Third embodiment>
In the present embodiment, the handling of the management result of the game history when the setting state of the pachinko machine 10 is newly set is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

  The management IC 66 is provided with a separate storage memory 171 as a memory for storing information, in addition to the memories in the first embodiment. FIG. 34 is an explanatory diagram for explaining the separate storage memory 171. The separate storage memory 171 is a memory such as a NOR flash memory and a NAND flash memory that does not require an external power supply for storing and holding (that is, a nonvolatile storage unit), and is used for both reading and writing.

  The separate storage memory 171 includes a first storage area 172, a second storage area 173, a third storage area 174, a fourth storage area 175, and a fifth storage area 176. In the first to fifth storage areas 172 to 176, information on the management result of the game history calculated when the setting state of the pachinko machine 10 is newly set, more specifically, in the first embodiment. The various parameters described in (1) to (8th parameter, 11th to 18th parameter, 21st to 26th parameter, 31st parameter, 41st to 42nd parameter) are sequentially stored. In this case, when the setting state of the pachinko machine 10 is newly set, first, various parameters are stored in the first separate storage area 172, and thereafter, every time the setting state of the pachinko machine 10 is newly set, the n-th The areas to be stored are switched such that the storage areas 172 to 176 → the (n + 1) th storage areas 172 to 176. Then, when the setting state of the pachinko machine 10 is newly set after the various parameters are stored in the fifth separate storage area 176, the various parameters are stored again in the first separate storage area 172. At this time, the various parameters already stored in the first separate storage area 172 are deleted. As a result, the various parameters until the new setting of the setting state of the pachinko machine 10 is executed five times are stored in the separate storage memory 171, and the oldest various parameters are erased for more than five times. It is memorized by the thing.

  Various parameters stored in the first to fifth storage areas 172 to 176 can be read by the external device by connecting the external device to the reading terminal 68d. Thereby, it becomes possible to grasp the management result of the game history before the new setting of the setting state is performed in the pachinko machine 10.

  Next, a setting update recognition process according to the present embodiment executed by the management CPU 112 will be described with reference to the flowchart in FIG.

  When the set value update signal input to the fifteenth buffer 122o of the input port 121 is switched from the LOW level to the HI level (step S1801: YES), the value of the set value grasp counter of the management RAM 114 is set to “1”. It is set (step S1802). The set value grasp counter is a counter for specifying the set value of the pachinko machine 10 by the management CPU 112. For example, if the value of the set value grasp counter is “1”, it means “setting 1”, If the value of the set value grasp counter is “6”, it means “set 6”.

  Thereafter, it is determined whether or not the set value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level again (step S1803). If an affirmative determination is made in step S1803, the value of the set value grasp counter of the management-side RAM 114 is incremented by 1 (step S1804). As a result, the set value of the pachinko machine 10 specified by the management CPU 112 increases by one step.

  If a negative determination is made in step S1803, or if the process of step S1804 is performed, based on the input state of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. It is determined whether a set value identification end command has been received from the main CPU 63 (step S1805). If a negative determination is made in step S1805, the process returns to step S1803.

  If an affirmative determination is made in step S1805, monitoring processing for repeatedly changing is executed (step S1806). Although the details of the repetitive change monitoring process will be described later, when a new setting of the setting state of the pachinko machine 10 is repeatedly generated in a short period of time, a process for notifying it is executed. In a configuration in which various parameters are stored in the separate storage memory 171 each time a new setting of the setting state of the pachinko machine 10 is performed, the management result of the game history when the game is played for a predetermined period is intended. It is assumed that the new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time so that the pachinko machine 10 is erased. On the other hand, by executing the change monitoring process repeatedly, when such an action is performed, the corresponding notification is executed.

  After that, various calculation processes are executed (step S1807). In various arithmetic processes, the processes of steps S1402 to S1412 of the display output process (FIG. 30) in the first embodiment are executed. Thus, various parameters (first to eighth parameters, eleventh to eighteenth parameters, twenty-first to twenty-sixth parameters, thirty-first parameters, and forty-first parameters) are utilized using the history information stored in the history memory 117 at that time. To the forty-second parameter) are calculated.

  After that, the various parameters calculated in step S1807 are stored in the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 in the area to be stored this time (step S1808). In the separate storage memory 171, a pointer information area is set so that an area to be stored among the first to fifth separate storage areas 172 to 176 can be specified by the management-side CPU 112. The information in the pointer information area is changed so that the storage target is changed to the next area in the case where various parameters are stored in the storage target area among the first to fifth storage areas 172 to 176. Will be updated to By executing the processing in step S1808, various parameters at that time for the new setting of the setting state of the pachinko machine 10 are stored in the separate storage memory 171.

  Thereafter, the history memory 117 is cleared to "0" (step S1809). That is, in the present embodiment, the history memory is read not only when the history information is read by the external device connected to the reading terminal 68d but also when the setting state of the pachinko machine 10 is newly set. The history information of 117 is deleted.

  After that, the RTC 115 reads out the RTC information, which is year / month / day information and time information (step S1810). Then, a writing process to the history memory 117 is executed (step S1811). In the writing process, the pointer information of the history area 124 that is the current write target is specified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the write target pointer information is specified. The RTC information read in step S1810 is written in the history information storage area 125 of the history area 124. Further, both the information for identifying the setting value and the information of the value of the setting value grasp counter are written in the history information storage area 125 corresponding to the pointer information to be written. Thereby, the information indicating that the setting state of the pachinko machine 10 has been newly set, the RTC information corresponding to the date and time when the setting has been performed, and the information of the setting value when the setting has been performed are included. The combination is stored as history information.

  After that, the target pointer is updated (step S1812). In the updating process, the numerical information stored in the pointer area 126 of the history memory 117 is read and 1 is added. It is determined whether or not the pointer information after the addition exceeds the maximum value of the pointer information in the history area 124. If it does not exceed the maximum value, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new write target pointer information. If it exceeds the maximum value, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

  Next, the repetitive change monitoring process executed in step S1806 will be described with reference to the flowchart in FIG.

  First, it is determined whether or not the number of game times executed since the setting state of the pachinko machine 10 was last set is within a reference number (specifically, 100 times) (step S1901). Specifically, the pachinko machine 10 is set by counting the number of history information storage areas 125 in the history area 124 of the history memory 117 in which the correspondence information indicating the start of the game round is stored. The number of game times executed since the state was set last time is grasped, and it is determined whether or not the grasped number of game times is within the reference number (specifically, 100 times).

  If an affirmative determination is made in step S1901, the value of the repetition change counter provided in the separate storage memory 171 is incremented by 1 (step S1902). Since the separate storage memory 171 is a memory that does not require external power supply for storing and holding as described above, external power supply is not necessary for storing and holding the value of the repetition change counter.

  Thereafter, it is determined whether or not the value of the repetition change counter after one addition exceeds the notification reference value “5” (step S1903). The notification reference value corresponds to the number of the first to fifth separate storage areas 172 to 176 provided in the separate storage memory 171. Therefore, in step S1903, the number of times the new setting of the setting state of the pachinko machine 10 is repeated without intervening the execution of the game times exceeding the reference number is equal to the number of the first to fifth separate storage areas 172 to 176. It is determined whether or not it has exceeded.

  If an affirmative determination is made in step S1903, display processing for repeatedly changing is executed (step S1904). In the display process of the repetitive change, the display contents of the first to third notification display devices 69a to 69c correspond to the new setting of the setting state of the pachinko machine 10 being repeated a number of times exceeding the notification reference value in a short period of time. Display contents of repeated changes. The display content of the repeated change is a display content displaying “E” on all of the first to third notification display devices 69a to 69c, and this display content does not occur in other situations. The state in which the display contents of the repeated change are displayed on the first to third notification display devices 69a to 69c is continued until the repeated change flag provided in the separate storage memory 171 is cleared to "0". . The repetition change flag is a flag for the management side CPU 112 to specify that the display contents of the repetition change should be displayed on the first to third notification display devices 69a to 69c. When the repetition change flag is set to "1" and the display contents of the repetition change are displayed on the first to third notification display devices 69a to 69c, the display processing in the first embodiment is performed. (FIG. 31) is not executed. After that, “1” is set to the repetition change flag of the separate storage memory 171 (step S1905).

  If a negative determination is made in step S1901, the value of the repetition change counter in the separate storage memory 171 is cleared to "0" (step S1906). Thereafter, on condition that the repetition change flag of the separate storage memory 171 is set to "1" (step S1907: YES), the display contents of the repetition change on the first to third notification display devices 69a to 69c are displayed. The display is terminated (step S1908), and the repetition change flag is cleared to "0" (step S1909).

  According to the embodiment described in detail above, the following excellent effects can be obtained.

  When a new setting of the setting state of the pachinko machine 10 is performed, the history information stored in the history memory 117 is deleted. As a result, it becomes possible to leave history information of the game executed after the new setting of the setting state of the pachinko machine 10 is left in the history memory 117.

  When a new setting of the setting state of the pachinko machine 10 is performed, various parameters are calculated as management results of the game history using the history information of the history memory 117 at that time. Thereby, it becomes possible to grasp the management result of the game history in the situation before the new setting of the setting state is performed in the pachinko machine 10. Further, even if the history information in the history memory 117 is deleted when the setting state of the pachinko machine 10 is newly set, it is possible to grasp the management result of the game history based on the history information to be deleted. It becomes possible.

  When a new setting of the setting state is performed in the pachinko machine 10, various parameters are calculated using the history information of the history memory 117 at that time. 171 is stored. Thus, even if a new setting state is set in the pachinko machine 10, it is possible to grasp the management result of the game history in a situation before the setting is performed at an arbitrary timing thereafter.

  Since the separate storage memory 171 is provided with the plurality of separate storage areas 172 to 176, it is possible to store various parameters corresponding to the set timings of the set state for a plurality of times. Thereby, it becomes possible to grasp the management result of the game history in a plurality of periods with reference to the timing at which the new setting of the setting state is performed. Further, even if a new setting of the setting state of the pachinko machine 10 is repeated in a situation where the game is not performed, various parameters calculated using the history information of the situation where the game is substantially performed are not used. It is possible to increase the possibility of remaining in the separate storage memory 171.

  Various parameters stored in the first to fifth storage areas 172 to 176 can be read by the external device by connecting the external device to the reading terminal 68d. Thereby, it becomes possible to grasp the management result of the game history before the new setting of the setting state is performed in the pachinko machine 10.

  In a configuration in which various parameters are stored in the separate storage memory 171 each time a new setting of the setting state of the pachinko machine 10 is performed, the management result of the game history when the game is played for a predetermined period is intended. It is assumed that the new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time so that the pachinko machine 10 is erased. On the other hand, by executing the change monitoring process repeatedly, when such an action is performed, the corresponding notification is executed. Thereby, it is possible to notify the administrator or the like that the new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time.

  The notification that the new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period is performed on the first to third notification display devices 69a to 69c. Thus, the new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time using the first to third notification display devices 69a to 69c for notifying the management result of the game history. Notification can be performed.

  In a situation where it is necessary to notify that the new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time, the first to third notification display devices 69a to 69c continue to display the display contents of the repeated change. The notification of the management result of the game history at the normal time is not performed by the first to third notification display devices 69a to 69c. Thereby, it is possible to emphasize the notification that the new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time.

  In the case where the number of game executions performed after the new setting of the setting state of the pachinko machine 10 is performed is within the reference number and the event in which the new setting is performed continues beyond the notification reference value. The notification corresponding thereto is executed, but the present invention is not limited to this, and the total discharge of the game balls discharged from the game area PA after the new setting of the setting state of the pachinko machine 10 is performed. In the case where the number is within the reference number and the event in which the new setting is performed continues beyond the notification reference value, the corresponding notification may be executed. Further, after a new setting of the setting state of the pachinko machine 10 is performed, a predetermined ball entry portion (for example, any one of the out port 24a, the general winning port 31, the first operating port 33, the second operating port 34, or a predetermined Combination), when the total number of game balls discharged into the combination is within the reference number and the event in which the new setting is performed continues beyond the notification reference value, the corresponding notification is executed. Good. Further, when the total number of pieces of history information newly stored in the history memory 117 after the new setting of the setting state of the pachinko machine 10 is within the reference number, an event that the new setting is performed is notified. In the case where the number of consecutive times exceeds the reference value, the corresponding notification may be executed.

  In addition, when a new setting of the setting state of the pachinko machine 10 is performed within a monitoring reference period (for example, 600 seconds) exceeding a notification reference value, a notification corresponding thereto may be performed.

  Further, when the number of game executions performed after the new setting of the setting state of the pachinko machine 10 is performed is within the reference number and the event in which the new setting is performed continues beyond the notification reference value. The notification corresponding thereto is executed, but the setting value is changed in a situation where the number of times of execution is less than or equal to the reference number after the new setting of the setting state of the pachinko machine 10 is performed. When the event continues beyond the notification reference value, the corresponding notification may be executed.

  Further, when the number of game executions performed after the new setting of the setting state of the pachinko machine 10 is performed is within the reference number and the event in which the new setting is performed continues beyond the notification reference value. The notification corresponding thereto is executed, but the new setting of the setting state of the pachinko machine 10 is performed, and the new setting is triggered when the number of executed games is within the reference number of times. When the event in which the calculated various parameters are calculated continues beyond the notification reference value, the corresponding notification may be executed.

  Further, when the number of game executions performed after the new setting of the setting state of the pachinko machine 10 is performed is within the reference number and the event in which the new setting is performed continues beyond the notification reference value. Although the notification corresponding thereto is executed, a configuration in which the progress of the game is limited over a predetermined period (for example, one hour) may be additionally or alternatively.

<Fourth embodiment>
This embodiment is different from the third embodiment in that the monitoring process of the repetition change is executed by the main CPU 63. Hereinafter, a configuration different from the third embodiment will be described. The description of the same configuration as that of the third embodiment is basically omitted.

  FIG. 37 is a flowchart showing the monitoring process of the repetitive change executed by the main CPU 63. The repetitive change monitoring process is executed when the set value update process (step S118) is executed in the main process (FIG. 9). That is, when the setting state of the pachinko machine 10 is newly set, the change monitoring process is repeatedly performed. However, the present invention is not limited to this, and a configuration may be adopted in which, when a set value is changed, a monitoring process of the change is repeatedly performed.

  First, it is determined whether or not the number of game times executed since the setting state of the pachinko machine 10 was previously set is within a reference number (specifically, 100 times) (step S2001). The main RAM 65 is provided with a game number counter for counting the number of game times executed after the setting state of the pachinko machine 10 is newly set, and the main CPU 63 executes the game number newly. Every time the game counter is incremented by one. Even when the main RAM 65 is cleared (steps S105 and S117), the number-of-games counter is excluded from "0" clear targets.

  If an affirmative determination is made in step S2001, the value of the repetition change counter provided in the main RAM 65 is incremented by 1 (step S2002). Even when the main RAM 65 is cleared (steps S105 and S117), the repetition change counter is excluded from the target of “0” clear.

  Thereafter, it is determined whether or not the value of the repetition change counter after adding 1 exceeds the notification reference value “5” (step S2003). The notification reference value corresponds to the number of the first to fifth separate storage areas 172 to 176 provided in the separate storage memory 171. Therefore, in step S2003, the number of times the new setting of the setting state of the pachinko machine 10 is repeated without intervening the execution of the game times exceeding the reference number becomes equal to the number of the first to fifth separate storage areas 172 to 176. It is determined whether or not it has exceeded.

  If an affirmative determination is made in step S2003, “1” is set to the repetition change flag provided in the main RAM 65 (step S2004). The repetition change flag is a flag for the main CPU 63 to specify that the notification of the repetition change is to be made. Even if the main RAM 65 is cleared (steps S105 and S117), the repetition change flag is excluded from being cleared to "0".

  If a negative determination is made in step S2001, the value of the repetition change counter of the main RAM 65 is cleared to "0" (step S2005). Thereafter, on condition that the repetition change flag of the main RAM 65 is set to "1" (step S2006: YES), the repetition change flag is cleared to "0" (step S2007).

  In the repetition change monitoring process, when the repetition change flag of the main RAM 65 is set to "1" (step S2008: YES), a repetition change notification command is transmitted to the sound emission control device 81 (step S2009). When the voice light emission control device 81 receives the repetition change notification command, the symbol display device 41, the display light emitting unit 53, and the speaker unit 54 are repeatedly notified of the change. The notification of the repetitive change is continued until the supply of the operating power to the sound emission control device 81 is stopped.

  According to the above configuration, it is possible to notify that the new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time based on the control by the main CPU 63. In addition, since the notification is performed by the symbol display device 41, the display light-emitting unit 53, and the speaker unit 54, the setting state of the pachinko machine 10 can be set without opening the gaming machine body 12 to the outer frame 11 forward. It is possible for the administrator to recognize that the new setting has been repeatedly performed in a short period of time.

  In addition, when a new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time, in addition to or instead of the configuration in which the notification command of the repetition change is transmitted from the main CPU 63 to the sound emission control device 81, The corresponding external output may be performed.

  In addition, the main CPU 63 may execute the monitoring process of the repeated change in the present embodiment, and the management CPU 112 may execute the monitoring process of the repeated change in the third embodiment. Thereby, it is possible to strictly monitor whether or not the new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time.

<Fifth embodiment>
In the present embodiment, the processing configuration of the setting update recognition process in the management CPU 112 is different from that of the third embodiment. Hereinafter, a configuration different from the third embodiment will be described. The description of the same configuration as that of the third embodiment is basically omitted.

  FIG. 38 is a flowchart showing a setting update recognition process according to the present embodiment executed by the management CPU 112.

  When the set value update signal input to the fifteenth buffer 122o of the input port 121 switches from the LOW level to the HI level (step S2101: YES), the value of the set value grasp counter of the management side RAM 114 is set to “1”. It is set (step S2102). The set value grasp counter is a counter for specifying the set value of the pachinko machine 10 by the management CPU 112. For example, if the value of the set value grasp counter is “1”, it means “setting 1”, If the value of the set value grasp counter is “6”, it means “set 6”.

  Thereafter, it is determined whether or not the set value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level again (step S2103). If an affirmative determination is made in step S2103, the value of the set value grasp counter of the management-side RAM 114 is incremented by 1 (step S2104). As a result, the set value of the pachinko machine 10 specified by the management CPU 112 increases by one step.

  If a negative determination is made in step S2103, or if the process of step S2104 is performed, based on the input state of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. It is determined whether a set value identification end command has been received from the main CPU 63 (step S2105). If a negative determination is made in step S2105, the process returns to step S2103.

  If an affirmative determination is made in step S2105, it is determined whether or not a predetermined number or more of predetermined history information exists in the history memory 117 (step S2106). Specifically, the pachinko machine 10 is set by counting the number of history information storage areas 125 in the history area 124 of the history memory 117 in which the correspondence information indicating the start of the game round is stored. The number of game times executed since the state was set last time is grasped, and it is further determined whether or not the grasped number of game times exceeds a reference number (specifically, 100 times). However, the present invention is not limited to this, and the number of the history information storage areas 125 in which the correspondence information indicating that the game balls have been discharged from the game area PA is a reference number (specifically, 1000). Or not in step S2106. Correspondence information indicating that a game ball has entered a predetermined ball entry portion (for example, any one or a predetermined combination of the out port 24a, the general winning port 31, the first operation port 33, and the second operation port 34). May be determined in step S2106 as to whether or not the number of history information storage areas 125 in which is stored exceeds the reference number (specifically, 1000). Further, the configuration may be such that it is determined in step S2106 whether or not the total number of history information stored in the history memory 117 exceeds the reference number (specifically, 1000).

  In the case where the number of game executions performed after the new setting of the setting state of the pachinko machine 10 is performed is within the reference number and the event in which the new setting is performed continues beyond the notification reference value. The notification corresponding thereto is executed, but the present invention is not limited to this, and the total discharge of the game balls discharged from the game area PA after the new setting of the setting state of the pachinko machine 10 is performed. In the case where the number is within the reference number and the event in which the new setting is performed continues beyond the notification reference value, the corresponding notification may be executed. Further, after a new setting of the setting state of the pachinko machine 10 is performed, a predetermined ball entry portion (for example, any one of the out port 24a, the general winning port 31, the first operating port 33, the second operating port 34, or a predetermined Combination), when the total number of game balls discharged into the combination is within the reference number and the event in which the new setting is performed continues beyond the notification reference value, the corresponding notification is executed. Good. Further, when the total number of pieces of history information newly stored in the history memory 117 after the new setting of the setting state of the pachinko machine 10 is within the reference number, an event that the new setting is performed is notified. In the case where the number of consecutive times exceeds the reference value, the corresponding notification may be executed.

  If an affirmative determination is made in step S2106, various arithmetic processes are executed (step S2107). In various arithmetic processes, the processes of steps S1402 to S1412 of the display output process (FIG. 30) in the first embodiment are executed. Thus, various parameters (first to eighth parameters, eleventh to eighteenth parameters, twenty-first to twenty-sixth parameters, thirty-first parameters, and forty-first parameters) are utilized using the history information stored in the history memory 117 at that time. To the forty-second parameter) are calculated.

  After that, the various parameters calculated in step S2107 are stored in the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 in the area to be stored this time (step S2108). In the separate storage memory 171, a pointer information area is set so that an area to be stored among the first to fifth separate storage areas 172 to 176 can be specified by the management-side CPU 112. The information in the pointer information area is changed so that the storage target is changed to the next area in the case where various parameters are stored in the storage target area among the first to fifth storage areas 172 to 176. Will be updated to By executing the processing in step S2108, various parameters at that time are stored in the separate storage memory 171 for the new setting of the setting state of the pachinko machine 10 this time.

  If a negative determination is made in step S2106, or if the process in step S2108 is performed, the history memory 117 is cleared to "0" (step S2109). That is, in the present embodiment, the history memory is read not only when the history information is read by the external device connected to the reading terminal 68d but also when the setting state of the pachinko machine 10 is newly set. The history information of 117 is deleted.

  Then, RTC information, which is year / month / day information and time information, is read from the RTC 115 (step S2110). Then, a writing process to the history memory 117 is executed (step S2111). In the writing process, the pointer information of the history area 124 that is the current writing target is specified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the writing target pointer information is specified. The RTC information read in step S2110 is written to the history information storage area 125 of the history area 124. Further, both the information for identifying the setting value and the information of the value of the setting value grasp counter are written in the history information storage area 125 corresponding to the pointer information to be written. Thereby, the information indicating that the setting state of the pachinko machine 10 has been newly set, the RTC information corresponding to the date and time when the setting has been performed, and the information of the setting value when the setting has been performed are included. The combination is stored as history information.

  Thereafter, the target pointer is updated (step S2112). In the updating process, the numerical information stored in the pointer area 126 of the history memory 117 is read and 1 is added. It is determined whether or not the pointer information after the addition exceeds the maximum value of the pointer information in the history area 124. If it does not exceed the maximum value, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new write target pointer information. If it exceeds the maximum value, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

  According to the above configuration, when the setting state of the pachinko machine 10 is newly set, the pachinko machine 10 stores the information in the history memory 117 on condition that a predetermined number or more of history information is stored in the history memory 117. Various parameters are calculated using the history information, and the various parameters are stored in the separate storage memory 171. As a result, even if a new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time, the information of the management result of the game history as a result of substantially playing the game is stored in the separate storage memory 171. It can be stored.

  Note that the configuration may be such that the processing in step S2109 is executed on condition that the processing in steps S2107 and S2108 is executed. That is, the history information stored in the history memory 117 is deleted on condition that a predetermined number or more of history information is stored in the history memory 117. This makes it possible to prevent the history information in the history memory 117 from being erased even if a new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time.

<Sixth embodiment>
In the present embodiment, the configuration of the history memory 117 is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

  FIG. 39 is an explanatory diagram for describing the configuration of the history memory 117 in the present embodiment.

  The history memory 117 includes a total area 141, a first state area 142, a second state area 143, and a third state area 144. In each of these areas 141 to 144, first to fourteenth counters 141a to 141n, 142a to 142n, 143a to 143n, and 144a to 144n are provided. The first counters 141a to 144a in each of the areas 141 to 144 store information on the number of times that the output state of the first signal input to the first buffer 122a has changed from the LOW level to the HI level. In the second counters 141b to 144b of the areas 141 to 144, information on the number of times that the output state of the second signal input to the second buffer 122b has changed from the LOW level to the HI level is stored. The third counters 141c to 144c of the areas 141 to 144 store information on the number of times that the output state of the third signal input to the third buffer 122c has changed from the LOW level to the HI level. In the fourth counters 141d to 144d of the areas 141 to 144, information on the number of times the output state of the fourth signal input to the fourth buffer 122d has been changed from the LOW level to the HI level is stored. In the fifth counters 141e to 144e of the areas 141 to 144, information on the number of times the output state of the fifth signal input to the fifth buffer 122e has been changed from the LOW level to the HI level is stored. In the sixth counters 141f to 144f of the areas 141 to 144, information on the number of times the output state of the sixth signal input to the sixth buffer 122f has changed from the LOW level to the HI level is stored. In the seventh counters 141g to 144g of the areas 141 to 144, information on the number of times that the output state of the seventh signal input to the seventh buffer 122g has been changed from the LOW level to the HI level is stored. The eighth counters 141h to 144h of the areas 141 to 144 store information on the number of times that the output state of the eighth signal input to the eighth buffer 122h has changed from the LOW level to the HI level. The ninth counters 141i to 144i of the areas 141 to 144 store information on the number of times that the output state of the ninth signal input to the ninth buffer 122i has changed from the LOW level to the HI level. Information on the number of times the output state of the tenth signal input to the tenth buffer 122j has been changed from the LOW level to the HI level is stored in the tenth counters 141j to 144j of the areas 141 to 144. The eleventh counters 141k to 144k of the areas 141 to 144 store information on the number of times that the output state of the eleventh signal input to the eleventh buffer 122k has changed from the LOW level to the HI level. Information on the number of times that the output state of the twelfth signal input to the twelfth buffer 122l has changed from the LOW level to the HI level is stored in the twelfth counters 141l to 144l of the areas 141 to 144. The thirteenth counters 141m to 144m of the areas 141 to 144 store information on the number of times that the output state of the thirteenth signal input to the thirteenth buffer 122m has changed from the LOW level to the HI level. The fourteenth counters 141n to 144n of the areas 141 to 144 store information on the number of times that the output state of the fourteenth signal input to the fourteenth buffer 122n has changed from the LOW level to the HI level.

  FIG. 40 is a flowchart showing a history setting process in the present embodiment executed by the management CPU 112.

  First, the number of buffers to be checked by the management CPU 112 among the first to fourteenth buffers 122a to 122n is set in the check target counter of the management RAM 114 (step S2201). Specifically, the number of corresponding areas in the first to fourteenth corresponding areas 123a to 123n in the corresponding memory 116 in which information other than the information indicating the blank is stored is specified. Set the number of pieces of information in the check target counter. In this pachinko machine 10, since information other than the information indicating blank is stored in the first to eleventh correspondence areas 123a to 123k, "11" is set to the check target counter in step S2201.

  Thereafter, it is determined whether or not the buffers 122a to 122n corresponding to the current check target counters are buffers to which the state information signal is input (step S2202). Specifically, in the correspondence areas 123a to 123n corresponding to the current value of the check target counter, information indicating the open / close execution mode, information indicating the high frequency support mode, and It is determined whether any of the information indicating the front door frame 14 is stored.

  If an affirmative determination is made in step S2202, a state information setting process is executed (step S2203). In the setting process, when the output state of the eighth signal indicating whether the operation is in the open / close execution mode is switched from the LOW level to the HI level, the information of the first state indicating that the operation is in the open / close execution mode is stored on the management side. The information is stored in the RAM 114, and when the output state of the eighth signal is switched from the HI level to the LOW level, the information of the first state is deleted from the management-side RAM 114. When the output state of the ninth signal indicating whether or not the high-frequency support mode is switched from the LOW level to the HI level, the information of the second state indicating the high-frequency support mode is stored in the management-side RAM 114. When the output state of the ninth signal is switched from the HI level to the LOW level, the information of the second state is deleted from the management-side RAM 114. When the output state of the tenth signal indicating whether or not the front door frame 14 is being opened is switched from the LOW level to the HI level, the third state information indicating that the front door frame 14 is being opened. Is stored in the management side RAM 114, and when the output state of the tenth signal is switched from the HI level to the LOW level, the information of the third state is deleted from the management side RAM 114.

  If a negative determination is made in step S2202, or if the process in step S2203 is performed, the numerical information stored in the buffer corresponding to the current value of the check target counter among the first to fourteenth buffers 122a to 122n is , From "0" to "1", it is determined whether the output state of the input signal from the main CPU 63 to the buffer has been switched from the LOW level to the HI level ( Step S2204). If the numerical value information stored in the eighth buffer 122h is changed from “0” to “1” in a situation where the current value of the check target counter is a value corresponding to the eighth buffer 122h, the process proceeds to step S2203. The information of the first state is stored in the management-side RAM 114, and an affirmative determination is made in step S2204. If the current value of the check target counter is a value corresponding to the ninth buffer 122i and the numerical information stored in the ninth buffer 122i is changed from “0” to “1”, the process proceeds to step S2203. Thus, the information of the second state is stored in the management-side RAM 114, and an affirmative determination is made in step S2204. If the current value of the check target counter is a value corresponding to the tenth buffer 122j and the numerical information stored in the tenth buffer 122j is changed from “0” to “1”, the process proceeds to step S2203. The third state information is stored in the management-side RAM 114, and an affirmative determination is made in step S2204.

  When an affirmative determination is made in step S2204, the corresponding sum counter is added (step S2205). In this addition process, the value of the counter corresponding to the current value of the check target counter among the first to fourteenth counters 141a to 141n in the total area 141 of the history memory 117 is incremented by one. For example, if the value of the check target counter is "11", the total eleventh counter 141k is to be added, and if the value of the check target counter is "5", the total fifth counter 141e is to be added. If the value of the check target counter is “1”, the first counter for total 141 a is to be added.

  Thereafter, by referring to the state information of the management side RAM 114, it is determined whether or not the first state, that is, whether or not the open / close execution mode is being performed (step S2206). If the current state is the first state (step S2206: YES), the corresponding counter for the first state is added (step S2207). In the addition process, the value of the counter corresponding to the current value of the check target counter among the first to fourteenth counters 142a to 142n in the first state area 142 of the history memory 117 is incremented by one. . For example, if the value of the check target counter is “11”, the eleventh counter 142k for the first state is to be added, and if the value of the check target counter is “5”, the fifth counter 142e for the first state is If the value of the check target counter is "1", the first counter 142a for the first state is to be added.

  Thereafter, by referring to the state information in the management-side RAM 114, it is determined whether or not the state is the second state, that is, whether or not the high frequency support mode is being performed (step S2208). If the current state is the second state (step S2208: YES), the corresponding counter for the second state is added (step S2209). In the addition process, the value of the counter corresponding to the current value of the check target counter among the first to fourteenth counters 143a to 143n for the second state in the second state area 143 of the history memory 117 is incremented by one. . For example, if the value of the check target counter is "11", the eleventh counter 143k for the second state is to be added, and if the value of the check target counter is "5", the fifth counter 143e for the second state is If the value of the check target counter is "1", the first counter 143a for the second state is to be added.

  Thereafter, by referring to the state information in the management-side RAM 114, it is determined whether or not the state is the third state, that is, whether or not the front door frame 14 is being opened (step S2210). If the state is the third state (step S2210: YES), a corresponding third state counter is added (step S2211). In the addition processing, the value of the counter corresponding to the current value of the check target counter among the first to fourteenth counters 144a to 144n for the third state in the third state area 144 of the history memory 117 is incremented by one. . For example, if the value of the check target counter is “11”, the eleventh counter 144k for the third state is to be added, and if the value of the check target counter is “5”, the fifth counter 144e for the third state is If the value of the check target counter is "1", the first counter 144a for the third state is to be added.

  If a negative determination is made in step S2204, if a negative determination is made in step S2210, or if the process of step S2211 is performed, the value of the check target counter of the management-side RAM 114 is decremented by 1 (step S2212). Then, it is determined whether or not the value of the check target counter after the subtraction of 1 is “0” (step S2213). If the value of the check target counter is 1 or more (step S2213: NO), the processing from step S2202 is performed on the check target corresponding to the new check target counter value.

  By executing the history setting process as described above, the number of times the game ball enters the out port 24a, the general winning port 31, the special power winning device 32, the first operating port 33 and the second operating port 34, and the opening / closing execution The number of occurrences of the mode, the number of occurrences of the high-frequency support mode, and the number of occurrences of the game times are not stored as history information as in the first embodiment, but are stored as number information. As a result, the required storage capacity of the history memory 117 can be reduced as compared with a configuration in which each piece of history information is individually stored.

  With the configuration in which the information is stored not as the history information but as the frequency information, it is not necessary to execute the process of deriving the frequency information from the history information when calculating various parameters. This makes it possible to reduce the processing load for calculating various parameters.

  Next, a setting update recognition process according to the present embodiment, which is executed by the management CPU 112, will be described with reference to the flowchart in FIG.

  When the set value update signal input to the fifteenth buffer 122o of the input port 121 is switched from the LOW level to the HI level (step S2301: YES), the value of the set value grasp counter of the management RAM 114 is set to “1”. It is set (step S2302). The set value grasp counter is a counter for specifying the set value of the pachinko machine 10 by the management CPU 112. For example, if the value of the set value grasp counter is “1”, it means “setting 1”, If the value of the set value grasp counter is “6”, it means “set 6”.

  Thereafter, it is determined whether or not the set value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level again (step S2303). If an affirmative determination is made in step S2303, the value of the set value grasp counter in the management-side RAM 114 is incremented by 1 (step S2304). As a result, the set value of the pachinko machine 10 specified by the management CPU 112 increases by one step.

  If a negative determination is made in step S2303, or if the process in step S2304 is performed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. It is determined whether a set value identification end command has been received from the main CPU 63 (step S2305). If a negative determination is made in step S2305, the process returns to step S2303.

  If an affirmative determination is made in step S2305, the eleventh counter 141k for counting the number of game times executed in the total area 141 of the history memory 117, and the opening and closing of the total area 141 in the history memory 117 The eighth counter 141h for counting the number of occurrences of the mode and the ninth counter 141i for the total counting the number of occurrences of the high frequency support mode in the total area 141 in the history memory 117 are respectively shown. “0” is cleared (step S2306 to step S2308). As a result, the information on the number of times the game has been executed, the number of times the open / close execution mode has occurred, and the number of times the high frequency support mode has occurred is cleared to “0” when a new setting of the setting state of the pachinko machine 10 is performed. Is done. Therefore, the 31st parameter indicating the number of occurrences of the open / close execution mode per unit game, the 41st parameter indicating the number of occurrences of the high frequency support mode per unit game, and the high frequency support mode The calculation result of the forty-second parameter indicating the ratio of the number of occurrences corresponds to the game content after the new setting of the setting state of the pachinko machine 10 is performed. In the configuration in which the winning probability of the jackpot result is changed when the set value of the pachinko machine 10 is changed, the calculation result of the 31st parameter, the 41st parameter, and the 42nd parameter is changed to the setting state of the pachinko machine 10 as described above. , The calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter are appropriate based on the current setting value by making the setting correspond to the game content after the new setting is performed. It is possible to determine whether or not.

  On the other hand, even if the setting of the pachinko machine 10 is newly set, the counters other than the eighth counter 141h, the ninth counter 141i, and the eleventh counter 141k in the history memory 117 are “ "0" is not cleared. As a result, the management of the number or frequency of entering game balls into each history target ball entry unit is performed based on the long-term game history without being affected by the new setting of the setting state of the pachinko machine 10. It becomes possible.

  According to the above configuration, the number of game balls entering the out port 24a, the general prize port 31, the special prize winning device 32, the first operation port 33 and the second operation port 34, the number of times of opening / closing execution mode, high frequency support The number of mode occurrences and the number of game occurrences are not stored as history information as in the first embodiment, but are stored as frequency information. As a result, the required storage capacity of the history memory 117 can be reduced as compared with a configuration in which each piece of history information is individually stored.

  Further, since the configuration is stored as the frequency information instead of the history information, it is not necessary to execute the process of deriving the frequency information from the history information when calculating various parameters. This makes it possible to reduce the processing load for calculating various parameters.

  Information on the number of times the game has been executed, the number of times the open / close execution mode has occurred, and the number of times the high frequency support mode has occurred is cleared to “0” when the setting state of the pachinko machine 10 is newly set. Therefore, the 31st parameter indicating the number of occurrences of the open / close execution mode per unit game, the 41st parameter indicating the number of occurrences of the high frequency support mode per unit game, and the high frequency support mode The calculation result of the forty-second parameter indicating the ratio of the number of occurrences corresponds to the game content after the new setting of the setting state of the pachinko machine 10 is performed. In the configuration in which the winning probability of the jackpot result is changed when the set value of the pachinko machine 10 is changed, the calculation result of the 31st parameter, the 41st parameter, and the 42nd parameter is changed to the setting state of the pachinko machine 10 as described above. , The calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter are appropriate based on the current setting value by making the setting correspond to the game content after the new setting is performed. It is possible to determine whether or not.

  On the other hand, even if the setting of the pachinko machine 10 is newly set, the counters other than the eighth counter 141h, the ninth counter 141i, and the eleventh counter 141k in the history memory 117 are “ "0" is not cleared. As a result, the management of the number or frequency of entering game balls into each history target ball entry unit is performed based on the long-term game history without being affected by the new setting of the setting state of the pachinko machine 10. It becomes possible.

  Note that the configuration of the history memory 117 as in the present embodiment may be applied to the above-described first to fifth embodiments and the embodiments described after this embodiment. For example, when applied to the first embodiment, even if a new setting of the setting state of the pachinko machine 10 is performed, the information in the history memory 117 is maintained as it is. Further, when applied to the third embodiment, when a new setting of the setting state of the pachinko machine 10 is performed, the entire history memory 117 is cleared to “0”.

  In addition, when the set value of the pachinko machine 10 is changed, the processing of steps S2306 to S2308 may be executed in the setting update recognition processing (FIG. 41). Accordingly, even if a new setting of the setting state of the pachinko machine 10 is performed, if the set value is not changed before and after that, information on the number of times of execution of the game, information on the number of times of execution of the open / close execution mode, and high frequency support The information on the number of occurrences of the mode is not cleared to "0", and when the set value of the pachinko machine 10 is changed, information on the number of executions of the game, information on the number of occurrences of the open / close execution mode, and high frequency support mode Can be cleared to "0".

  In addition, before the processing of steps S2306 to S2308 is performed in the setting update recognition processing (FIG. 41), various parameters are calculated using the respective counters 141 to 144 of the history memory 117, and the calculated values are calculated. Various parameters may be stored in the calculation result memory 131.

<Seventh embodiment>
In the present embodiment, the configuration of the history memory 117 is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

  FIG. 42 is an explanatory diagram for describing the configuration of the history memory 117 in the present embodiment.

  As the history memory 117, history memories 181 to 186 corresponding to “setting 1” to “setting 6” which are the setting states of the pachinko machine 10 are provided. Specifically, a history memory 181 for setting 1 is provided corresponding to “setting 1”, and a history memory 182 for setting 2 is provided corresponding to “setting 2”. A history memory 183 for setting 3 is provided corresponding to “setting 3”, and a history memory 184 for setting 4 is provided corresponding to “setting 4”. A history memory 185 for setting 5 is provided, and a history memory 186 for setting 6 is provided corresponding to “setting 6”.

  Each of the history memories 181 to 186 for the settings 1 to 6 is provided with a combination of the history area 124 and the pointer area 126 of the history memory 117 in the first embodiment. As a result, it is possible to store the history information in correspondence with each of the setting states of the pachinko machine 10 of “Setting 1” to “Setting 6”. In this case, when a new setting of the setting state of the pachinko machine 10 is performed, the history memories 181 to 186 corresponding to the setting values for which the new setting is performed are to be stored as history information. In addition, when the setting state of the pachinko machine 10 is newly set, the history information can be stored for each set value without erasing the history information. Further, since various parameters are calculated using the history information corresponding to the currently set state of the pachinko machine 10, it is possible to appropriately derive various parameters corresponding to each set value.

  In the history memories 181 to 186 for the settings 1 to 6, respectively, the total area 141, the first state area 142, the second state area 143, and the third state area 144 in the sixth embodiment. May be configured.

  Next, a setting update recognition process according to the present embodiment executed by the management CPU 112 will be described with reference to the flowchart in FIG.

  When the set value update signal input to the fifteenth buffer 122o of the input port 121 switches from the LOW level to the HI level (step S2401: YES), the value of the set value grasp counter provided in the calculation result memory 131 Is set to “1” (step S2402). The set value grasp counter is a counter for specifying the set value of the pachinko machine 10 by the management CPU 112. For example, if the value of the set value grasp counter is “1”, it means “setting 1”, If the value of the set value grasp counter is “6”, it means “set 6”. Further, in the present embodiment, it is assumed that the supply of the operating power to the management IC 66 is stopped because the set value grasp counter is provided in the operation result memory 131 which is a memory that does not require external power supply for storing and holding. Also, the value stored in the set value grasp counter is stored and held.

  Thereafter, it is determined whether or not the set value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level again (step S2403). If an affirmative determination is made in step S2403, the value of the set value grasp counter of the calculation result memory 131 is incremented by 1 (step S2404). As a result, the set value of the pachinko machine 10 specified by the management CPU 112 increases by one step.

  If a negative determination is made in step S2403, or if the process in step S2404 is performed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. It is determined whether a set value identification end command has been received from the main CPU 63 (step S2405). If a negative determination is made in step S2405, the process returns to step S2403.

  If an affirmative determination is made in step S2405, the history memories 181 to 186 corresponding to the values of the set value grasp counters of the calculation result memory 131 are set as storage targets of history information and reference targets when calculating various parameters ( Step S2406). More specifically, if the value of the set value grasp counter is “1”, it means that the value is set to “Setting 1”. Therefore, the history memory 181 for Setting 1 stores the history information storage target and various parameters. Set as a reference target at the time of calculation. If the value of the set value grasping counter is "2", it means that the value is set to "Setting 2". Therefore, the history memory 182 for Setting 2 is used to store the history information storage target and various parameters. Set as a reference target. If the value of the set value grasp counter is "3", it means that the value has been set to "Setting 3". Therefore, the history memory 183 for Setting 3 is used to store the history information storage target and various parameters. Set as a reference target. If the value of the set value grasp counter is "4", it means that the value has been set to "setting 4". Therefore, the history memory 184 for setting 4 is used to store the history information storage target and various parameters. Set as a reference target. If the value of the set value grasp counter is "5", it means that the value has been set to "setting 5". Therefore, the history memory 185 for setting 5 is used to store the history information storage target and various parameters. Set as a reference target. If the value of the set value grasp counter is "6", it means that the value has been set to "setting 6". Therefore, the history memory 186 for setting 6 is used to store the history information storage target and various parameters. Set as a reference target.

  After that, the RTC 115 reads out the RTC information, which is year / month / day information and time information (step S2407). Then, a writing process to the history memory 117 is executed (step S2408). In the writing process, the history memories 181 to 186 set as the storage targets of the history information in step S2406 are selected from the history memories 181 to 186 for the settings 1 to 6. Then, by referring to the pointer area 126 in the history memories 181 to 186 to be stored, the pointer information of the history area 124 which is the current write target is specified, and the pointer information becomes the write target. The RTC information read in step S2407 is written to the history information storage area 125 of the history area 124 corresponding to the pointer information that is present. In addition, information for identifying a set value is written in the history information storage area 125 corresponding to the pointer information to be written. Thereby, the combination of the information indicating that the setting state of the pachinko machine 10 has been newly set and the RTC information corresponding to the date and time when the setting has been performed is stored as the history information.

  After that, the target pointer is updated (step S2409). In the updating process, the history memories 181 to 186 set as the storage targets of the history information in step S2406 are selected from the history memories 181 to 186 for the settings 1 to 6, and the history memories 181 to 186 are stored. The numerical information stored in the pointer area 126 is read out and added by one. It is determined whether or not the pointer information after the addition exceeds the maximum value of the pointer information in the history area 124. If it does not exceed the maximum value, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new write target pointer information. If it exceeds the maximum value, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

  According to the above configuration, the history memories 117 to 186 for the settings 1 to 6 are provided as the history memory 117 so as to correspond to “Setting 1” to “Setting 6”, respectively. Thereby, it is possible to store the game history corresponding to each of the setting states of the pachinko machine 10 of “Setting 1” to “Setting 6”. In this case, when a new setting of the setting state of the pachinko machine 10 is performed, the history memories 181 to 186 corresponding to the setting values for which the new setting is performed are to be stored as history information. In addition, when the setting state of the pachinko machine 10 is newly set, the history information can be stored for each set value without erasing the history information. Further, since various parameters are calculated using the history information corresponding to the currently set state of the pachinko machine 10, it is possible to appropriately derive various parameters corresponding to each set value.

  The history memory 117 is not limited to the configuration in which the six memories of the history memories 181 to 186 for the settings 1 to 6 are provided. Area corresponding to the history memory 181 for setting, the area corresponding to the history memory 182 for setting 2, the area corresponding to the history memory 183 for setting 3, and the history memory 184 for setting 4. An area, an area corresponding to the history memory 185 for setting 5, and an area corresponding to the history memory 186 for setting 6 may be set.

<Eighth embodiment>
In the present embodiment, the configuration of the history memory 117 is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

  FIG. 44 is an explanatory diagram for describing the configuration of the history memory 117 in the present embodiment.

  As the history memory 117, a first history memory 191 and a second history memory 192 are provided. Each of the first history memory 191 and the second history memory 192 is provided with a combination of the history area 124 and the pointer area 126 of the history memory 117 in the first embodiment. In this case, a new setting of the setting state of the pachinko machine 10 is performed in a situation where the history information is stored using one of the first history memories 191 and the second history memory 192. Is performed, the history information of the one history memory 191 or 192 is left without erasing until a predetermined number or more of history information is stored in the other history memories 191 and 192 after that. And history information can be newly stored in both of the history memories 191 and 192 until a predetermined number or more of history information is stored in the other history memories 191 and 192. Become.

  Next, a setting update recognition process according to the present embodiment, which is executed by the management-side CPU 112, will be described with reference to the flowchart in FIG.

  When the set value update signal input to the fifteenth buffer 122o of the input port 121 switches from the LOW level to the HI level (step S2501: YES), the value of the set value grasp counter provided in the management RAM 114 is set to “ 1 "(step S2502). The set value grasp counter is a counter for specifying the set value of the pachinko machine 10 by the management CPU 112. For example, if the value of the set value grasp counter is “1”, it means “setting 1”, If the value of the set value grasp counter is “6”, it means “set 6”.

  Thereafter, it is determined whether or not the set value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level again (step S2503). If an affirmative determination is made in step S2503, the value of the set value grasp counter of the management-side RAM 114 is incremented by 1 (step S2504). As a result, the set value of the pachinko machine 10 specified by the management CPU 112 increases by one step.

  If a negative determination is made in step S2503, or if the process in step S2504 is performed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. It is determined whether a set value identification end command has been received from the main CPU 63 (step S2505). If a negative determination is made in step S2505, the process returns to step S2503.

  If an affirmative determination is made in step S2505, "1" is set to the setting change occurrence flag provided in the calculation result memory 131 (step S2506). The setting change occurrence flag has been set as the storage target of the history information in the first history memory 191 and the second history memory 192 after the new setting of the setting state of the pachinko machine 10 is performed. Not only the history memories 191 and 192 but also the other history memories 191 and 192 are flags for the management-side CPU 112 to specify whether or not the situation is a history information storage target. Further, since a setting change occurrence flag is provided in the operation result memory 131, which is a memory that does not require external power supply for storage retention, even if the supply of operating power to the management IC 66 is stopped, a setting change occurs. The value stored in the flag is stored and held.

  Thereafter, RTC information, which is year / month / day information and time information, is read from the RTC 115 (step S2507). Then, a writing process to the history memories 191 and 192 is executed (step S2508). In the writing process, first, by referring to the pointer area 126 of the first history memory 191, the pointer information of the history area 124 that is the current writing target is specified, and the pointer information that is the writing target is specified. The RTC information read in step S2507 is written to the history information storage area 125 of the history area 124 corresponding to. Further, both the information for identifying the setting value and the information of the value of the setting value grasp counter are written in the history information storage area 125 corresponding to the pointer information to be written. Thereby, the information indicating that the setting state of the pachinko machine 10 has been newly set, the RTC information corresponding to the date and time when the setting has been performed, and the information of the setting value when the setting has been performed are included. The combination is stored in the first history memory 191 as history information. In the writing process, the pointer information of the history area 124 that is the current writing target is specified by referring to the pointer area 126 of the second history memory 192, and the pointer that is the writing target is specified. The RTC information read in step S2507 is written to the history information storage area 125 of the history area 124 corresponding to the information. Further, both the information for identifying the setting value and the information of the value of the setting value grasp counter are written in the history information storage area 125 corresponding to the pointer information to be written. Thereby, the information indicating that the setting state of the pachinko machine 10 has been newly set, the RTC information corresponding to the date and time when the setting has been performed, and the information of the setting value when the setting has been performed are included. The combination is stored in the second history memory 192 as history information.

  Thereafter, an update process of each target pointer is executed (step S2509). In the updating process, first, the numerical information stored in the pointer area 126 of the first history memory 191 is read and 1 is added. It is determined whether or not the pointer information after the addition exceeds the maximum value of the pointer information in the history area 124. If it does not exceed the maximum value, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new write target pointer information. If it exceeds the maximum value, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information. In the updating process, the numerical information stored in the pointer area 126 of the second history memory 192 is read and 1 is added. It is determined whether or not the pointer information after the addition exceeds the maximum value of the pointer information in the history area 124. If it does not exceed the maximum value, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new write target pointer information. If it exceeds the maximum value, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

  Next, a history setting process in the present embodiment executed by the management CPU 112 will be described with reference to the flowchart in FIG.

  If “1” is not set in the setting change occurrence flag of the operation result memory 131 (step S2601: NO), the storage target side of the first history memory 191 and the second history memory 192 is This means that the history information should only be stored. In this case, first, the history memories 191 and 192 to be currently stored are grasped (step S2602). The calculation result memory 131 is provided with a storage target flag. If the value of the storage target flag is “0”, the first history memory 191 is to be stored, and the value of the storage target flag is “1”. In this case, the second history memory 192 is to be stored. Note that the storage target flag is provided in the operation result memory 131 which is a memory that does not require external power supply for storage retention, so that even if the supply of operating power to the management IC 66 is stopped, the storage target flag is not stored. Is stored and held.

  Thereafter, a history setting execution process is executed for the history memories 191 and 192 to be stored (step S2603). Specifically, the processes of steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed on one of the history memories 191 and 192 to be stored. As a result, the history information is stored in the history memories 191 and 192 to be stored.

  On the other hand, when the setting change occurrence flag of the calculation result memory 131 is set to “1” (step S2601: YES), the memory is the storage target of the first history memory 191 and the second history memory 192. This means that the history information should be stored not only on the side but also on the other side. In this case, a history setting execution process is executed for both history memories 191 and 192 (step S2604). Specifically, first, the processes of steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed on the first history memory 191. As a result, the history information is stored in the first history memory 191. Thereafter, the processes of steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed on the second history memory 192. As a result, the history information is stored in the second history memory 192.

  When the processing of step S2603 or the processing of step S2604 is performed, it is determined whether or not the setting change occurrence flag of the calculation result memory 131 is set to “1” (step S2605). If an affirmative determination is made in step S2605, it is determined whether or not a predetermined number or more of ball discharge histories exist in the history memories 191 and 192 to be non-stored (step S2606). Specifically, when the value of the storage target flag of the operation result memory 131 is “0”, the first history memory 191 is to be stored, and the game area PA is stored in the second history memory 192. It is determined whether or not a predetermined number (specifically, “1000”) or more of history information indicating that a game ball has been discharged from is stored. When the value of the storage target flag of the calculation result memory 131 is “1”, since the second history memory 192 is to be stored, the game area is stored in the first history memory 191 from the game area PA. It is determined whether or not a predetermined number (specifically, “1000”) or more of history information indicating that is discharged is stored. It should be noted that it is not determined whether or not a predetermined number (specifically, “1000”) or more of history information indicating that game balls have been ejected from the game area PA is stored. It may be configured to determine whether or not a predetermined number (specifically, “100”) or more of history information indicating is stored.

  If an affirmative determination is made in step S2606, a storage object change process is executed (step S2607). In the process of changing the storage target, the value of the storage target flag of the operation result memory 131 is set to a value different from the current value between two values, so that the first history memory 191 and the second history memory 192 are set. Change the side to be stored. Specifically, if the value of the storage target flag is “0”, the storage target is changed from the first history memory 191 to the second history memory 192 by setting the storage target flag to “1”. If the value of the storage target flag is “1”, the storage target is changed from the second history memory 192 to the first history memory 191 by clearing the storage target flag to “0”. Thereby, the history memories 191 and 192 in which only the history information of the game executed after the new setting of the setting state of the pachinko machine 10 is stored are set as storage targets. Various parameters are calculated by using the history information of the newly stored history memories 191 and 192, and are executed after the new setting of the setting state of the pachinko machine 10 is performed. It is possible to derive various parameters depending on the game.

  After that, a clearing process is performed on the side of the first history memory 191 and the second history memory 192 which has been the storage target until then (step S2608). Specifically, if the value of the storage target flag is “0”, the second history memory 192 is cleared to “0”, and if the value of the storage target flag is “1”, the first history memory 191 is cleared to “0”. Clear "0". Then, the setting change occurrence flag of the operation result memory 131 is cleared to “0” (step S2609).

  Next, a display output process according to the present embodiment executed by the management-side CPU 112 will be described with reference to the flowchart in FIG.

  If it is the calculation timing (step S2701: YES), the storage target side of the first history memory 191 and the second history memory 192 is grasped (step S2702). Specifically, if the value of the storage target flag of the operation result memory 131 is “0”, the first history memory 191 is grasped as the storage target, and if the value of the storage target flag is “1”, the second history memory 191 is recognized. The history memory 192 is grasped as a storage target. Thereafter, steps S1402 to S1412 of the display output process (FIG. 30) in the first embodiment are executed using the history information stored in the history memories 191 and 192 to be stored, which is grasped in step S2702. Thus, various parameters (first to eighth parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameters, 41st to 42nd parameters) are calculated, and the calculated various parameters are calculated. The result is stored in the result memory 131 (step S2703). In this case, since the setting change occurrence flag of the operation result memory 131 is set to “1”, the history information is stored in both the first history memory 191 and the second history memory 192. Even if there is, various parameters are calculated by using one of the history memories 191 and 192 to be stored.

  If a negative determination is made in step S2701 or if the process of step S2703 is performed, a display process is performed (step S2704). The processing content of the display processing is the same as the display processing (FIG. 31) in the first embodiment.

  According to the above configuration, the first history memory 191 and the second history memory 192 are provided as the history memory 117. The history information is also stored in the history memories 191 and 192 on the side that is not the storage target, while the history memories 191 and 192 that are the storage targets are directly stored. When a predetermined number or more of history information corresponding to the ejection of the game ball from the game area PA is stored in the history memories 191 and 192 on the non-storage side, the history memory is not the storage target. The history memories 191 and 192 on the side are directly stored, and the history memories 191 and 192 on the side previously stored are cleared to “0”. Thereby, when a new setting of the setting state of the pachinko machine 10 is performed, it is possible to calculate various parameters using only the history information of the game performed at the newly set setting value. Become.

  On the other hand, according to the above configuration, even if a new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time in order to prevent the calculation of various parameters from being performed properly, the history for the history to be stored is stored. The memories 191 and 192 are maintained without being changed. As a result, even if a new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time, it is possible to appropriately derive the management result of the game history up to that time.

  Note that the configuration is not limited to the configuration in which the two memories, the first history memory 191 and the second history memory 192, are provided as the history memory 117. The first history area corresponding to the memory 191 and the second history area corresponding to the second memory 192 may be set.

  Further, a configuration in which only one history memory 117 is provided may be adopted. In this case, if the total number of game balls discharged from the game area PA exceeds a predetermined number after the setting of the pachinko machine 10 is newly set, the setting of the pachinko machine 10 is newly set. The history information before the set timing may be erased, and the history information after the timing at which the setting is performed may be stored and held without being erased. Thus, at the timing when a predetermined number or more of history information is accumulated after the new setting of the setting state of the pachinko machine 10 is performed, the history before the timing at which the new setting of the setting state of the pachinko machine 10 is performed is performed. Information can be erased. Also, by setting the history information corresponding to the new setting of the setting state of the pachinko machine 10 to be stored in the history memory 117, the new setting of the setting state in the history memory 117 is performed. It is possible to distinguish between the history information before the timing at which the is performed and the history information after.

  Further, the timing of deleting the history information is not limited to the case where the total number of game balls discharged from the game area PA has become equal to or more than a predetermined number after the new setting of the setting state of the pachinko machine 10 is performed. Alternatively, the number of game times executed after the new setting of the setting state of the pachinko machine 10 is performed may be equal to or more than a predetermined number.

  In addition, even if a new setting of the setting state of the pachinko machine 10 is performed, if the set value has not been changed before and after the change, the change of the history memories 191 and 192 to be stored as described above and the change of the history information are performed. The deletion is not performed, and when the setting of the pachinko machine 10 is newly set and the set value is changed before and after that, the history memories 191 and 192 to be stored as described above are used. May be changed and the history information may be deleted.

<Ninth embodiment>
In the present embodiment, among the first to sixteenth buffers 122a to 122p of the input port 121 in the management-side I / F 111, the type of the buffer whose input signal type is determined at the design stage of the management IC 66 is the above-described type. This is different from the first embodiment. Further, the processing configuration executed by the main CPU 63 to specify the type of input signal to the management CPU 112 is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

  FIG. 48 is an explanatory diagram illustrating the configuration of the input port 121 of the management-side I / F 111 according to the present embodiment.

  The same types of signals as those in the first embodiment are input to the first to seventh buffers 122a to 122g and the sixteenth buffer 122p. Specifically, a first signal corresponding to the detection result of the first winning opening detection sensor 42a is input to the first buffer 122a, and a second signal corresponding to the detection result of the second winning opening detection sensor 43a is input to the second buffer 122b. The second signal is input, the third buffer 122c receives the third signal corresponding to the detection result of the third winning opening detection sensor 44a, and the fourth buffer 122d receives the fourth signal corresponding to the detection result of the special electricity detection sensor 45a. A signal is input, a fifth buffer 122e receives a fifth signal corresponding to the detection result of the first working port detection sensor 46a, and a sixth buffer 122f receives a fifth signal corresponding to the detection result of the second working port detection sensor 47a. The sixth signal is input, a seventh signal corresponding to the detection result of the out-mouth detection sensor 48a is input to the seventh buffer 122g, and an output instruction is input to the sixteenth buffer 122p. No. is input.

  On the other hand, in the first embodiment, a signal corresponding to the open / close execution mode is input to the eighth buffer 122h as an eighth signal, a signal corresponding to the high frequency support mode is input to the ninth buffer 122i as a ninth signal, A signal corresponding to the front door frame 14 is input to the tenth buffer 122j as a tenth signal, a signal corresponding to the start of the game is input to the eleventh buffer 122k as an eleventh signal, and a set value update signal is input to the fifteenth buffer 122k. Although the configuration is such that these signals are input to the input terminal 122o, the buffers to which these signals are input are different in the present embodiment. Specifically, the signal corresponding to the start of the game round is input to the eleventh buffer 122k as the game round signal, the set value update signal is input to the twelfth buffer 122l, and the signal corresponding to the open / close execution mode is during the open / close execution mode. A signal corresponding to the high frequency support mode is input to the fourteenth buffer 122n as a signal during the high frequency support mode, and a signal corresponding to the front door frame 14 is input to the fifteenth buffer 122m as the signal during the door opening. The data is input to the buffer 122o.

  The game time signal is input to the eleventh buffer 122k, the set value update signal is input to the twelfth buffer 122l, the open / close execution mode signal is input to the thirteenth buffer 122m, and the fourteenth buffer 122n. The input of the high-frequency support mode signal, the input of the door opening signal to the fifteenth buffer 122o, and the input of the output instruction signal to the sixteenth buffer 122p are determined in the design stage of the management IC 66. Thus, without receiving an instruction from the main CPU 63, the management CPU 112 can specify that the corresponding signals are input to the eleventh to sixteenth buffers 122k to 122p. On the other hand, what types of signals are input to the first to tenth buffers 122a to 122j is not determined in the design stage of the management IC 66, and the types of these signals are received from the main CPU 63. This is specified by the management-side CPU 112. The process for specifying the type of the signal is executed when the supply of the operating power to the main CPU 63 and the management CPU 112 is started, as in the first embodiment.

  FIG. 49 is a flowchart showing the recognition processing of this embodiment executed by the main CPU 63. The recognition process is executed in step S111 in the main process (FIG. 9), as in the first embodiment.

  First, "10", which is the number of the first to tenth buffers 122a to 122j for signal type recognition, is set in the recognition output counter of the main RAM 65 (step S2801). After that, an output process of the identification start signal is executed (step S2802). In the output processing, the output state of each of the first signal input to the first buffer 122a, the open / close execution mode signal input to the thirteenth buffer 122m, and the high frequency support mode signal input to the fourteenth buffer 122n Is set to the HI level to start outputting the identification start signal. The period during which these signals are maintained at the HI level is set to a period sufficient for the management-side CPU 112 to recognize the output state of these signals.

  Thereafter, information on the number of outputs corresponding to the current value of the recognition output counter of the main RAM 65 is read from the main ROM 64, and the read information on the number of outputs is set in the output counter provided in the main RAM 65 ( Step S2803). The output number counter is a counter for specifying the number of times of output of the type identification signal by the main CPU 63.

  In the present embodiment, when the management CPU 112 recognizes the type of the signal input to the first buffer 122a to the tenth buffer 122j, the number of award balls set for the entry section corresponding to the type of the signal The type identification signal is output the same number of times as the above. The management-side CPU 112 stores information corresponding to the number of times the type identification signal is received for each of the first buffer 122a to the tenth buffer 122j in the first to tenth correspondence areas 123a to 123j of the correspondence memory 116. . That is, the type of signal input to the first buffer 122a to the tenth buffer 122j is grasped as the number of prize balls set for the entry section corresponding to the type of signal.

  In step S2803, when the value of the recognition output counter is any of "10", "9", and "8", "10" corresponding to the number of winning balls in the general winning opening 31 is set in the output number counter. . When the value of the recognition output counter is “7”, “15” corresponding to the number of winning balls of the special power winning device 32 is set in the output number counter. When the value of the recognition output counter is “6”, “1” corresponding to the number of winning balls in the first operation port 33 is set in the output number counter. If the value of the recognition output counter is “5”, “1” corresponding to the number of winning balls in the second operation port 34 is set in the output number counter. Also, when the value of the recognition output counter is "4", the payout of the game ball is not executed even if the game ball enters the out port 24a although it corresponds to the out port 24a. Is set to "0". When the value of the recognition output counter is any one of “3” to “1”, the corresponding ball entry portion does not exist and is blank, so “0” is set to the output number counter.

  After that, a process of outputting a start trigger signal is executed (step S2804). In the output processing, the output of the start trigger signal is started by setting the output state of the first signal input to the first buffer 122a to the HI level. The period during which the first signal is maintained at the HI level is set to a period that is sufficient for the management-side CPU 112 to recognize the output state of the first signal.

  Thereafter, on the condition that the value of the output number counter of the main RAM 65 is not "0" (step S2805: YES), that is, on condition that a value of 1 or more is set in the output number counter in step S2803. The process proceeds to step S2806. In step S2806, output processing of a type identification signal is performed. In the output processing, the output state of the type identification signal is started by setting the output state of the second signal input to the second buffer 122b to the HI level. The period during which the second signal is maintained at the HI level is set to a period sufficient for the management CPU 112 to recognize the output state of the second signal.

  Thereafter, the value of the output counter of the main RAM 65 is decremented by 1 (step S2807), and it is determined whether or not the value of the output counter after the subtraction is “0” (step S2808). If the value of the output number counter is 1 or more (step S2808: NO), the process returns to step S2806.

  If an affirmative determination is made in step S2805, or if an affirmative determination is made in step S2808, an end trigger signal output process is executed (step S2809). In the output processing, the output of the end trigger signal is started by setting the output state of the third signal input to the third buffer 122c to the HI level. The period during which the third signal is maintained at the HI level is set to a period sufficient for the management-side CPU 112 to recognize the output state of the third signal.

  Thereafter, the value of the recognition output counter of the main RAM 65 is decremented by 1 (step S2810), and it is determined whether or not the value of the recognition output counter after the subtraction is “0” (step S2811). If the value of the recognition output counter is 1 or more (step S2811: NO), the process returns to step S2803 to execute processing for recognizing the type of signal corresponding to the value of the recognition output counter after subtracting one. I do.

  On the other hand, when the value of the recognition output counter is “0” (step S2811: YES), the process of outputting the identification end signal is executed (step S2812). In the output processing, the output state of each of the third signal input to the third buffer 122c, the open / close execution mode signal input to the thirteenth buffer 122m, and the high frequency support mode signal input to the fourteenth buffer 122n Is set to the HI level to start outputting the identification end signal. The period during which these signals are maintained at the HI level is set to a period sufficient for the management-side CPU 112 to recognize the output state of these signals.

  Next, a management process according to the present embodiment executed by the management-side CPU 112 will be described with reference to the flowchart in FIG. The management process is started when the supply of the operating power to the management-side CPU 112 is started as in the first embodiment.

  First, it is determined whether the reception of the identification start signal from the main CPU 63 has been completed (step S2901). If the identification start signal has not been received, the processing of step S2901 is executed again after the processing for setting update recognition is executed in step S2902. The processing content of the setting update recognition processing is the same as that of the first embodiment.

  If the identification start signal has been received from the main CPU 63 (step S2901: YES), the value of the setting target counter in the management RAM 114 is cleared to "0" (step S2903). Thereafter, the process proceeds to step S2905 on condition that a start trigger signal has been received from the main CPU 63 (step S2904: YES). In step S2905, it is determined whether a type identification signal has been received from the main CPU 63. If the type identification signal has been received (step S2905: YES), the value of the number-of-receptions counter provided in the management-side RAM 114 is incremented by 1 (step S2906). The reception counter is a counter for specifying the number of times the type identification signal has been received from the main CPU 63 by the management CPU 112. The value of the reception counter is cleared to "0" when an affirmative determination is made in step S2904.

  If a negative determination is made in step S2905, or if the process in step S2906 is performed, it is determined whether an end trigger signal has been received from the main CPU 63 (step S2907). If the end trigger signal has not been received (step S2907: NO), the process returns to step S2905, and if the end trigger signal has been received (step S2907: YES), the correspondence setting process is executed (step S2908). In the correspondence setting process, the reception count counter is set in the correspondence area corresponding to the current value of the setting target counter of the management-side RAM 114 among the first to tenth correspondence relation areas 123a to 123j of the correspondence memory 116. Store the value that has been. In this case, “10” corresponding to the number of winning balls in the general winning opening 31 is set in the first correspondence area 123a, the second correspondence area 123b, and the third correspondence area 123c, and is set in the fourth correspondence area 123d. Is set to "15" corresponding to the number of prize balls of the special electric winning device 32, "1" corresponding to the number of prize balls of the first operation port 33 is set to the fifth correspondence area 123e, and the sixth correspondence relation is set. “1” corresponding to the number of winning balls in the second operation port 34 is set in the area 123f. Also, “0” is set in the seventh to twelfth correspondence areas 123g to 123l. After that, the value of the setting counter of the management-side RAM 114 is incremented by 1 (step S2909).

  If a negative determination is made in step S2904, or if the process of step S2909 is performed, it is determined whether the reception of the identification end signal from the main CPU 63 has been completed (step S2910). If the reception of the identification end signal has not been completed (step S2910: NO), the process returns to step S2904, and on condition that a start trigger signal is received from the main CPU 63 (step S2904: YES), the processing after step S2905 is performed. Execute. If the reception of the identification end signal from the main CPU 63 has been completed (step S2910: YES), the history setting processing in step S2911, the display output processing in step S2912, and the external output processing in step S2913 are repeatedly executed.

  FIG. 51 is a time chart showing how the information on the correspondence between the first to tenth buffers 122a to 122j and the types of signals input to these buffers 122a to 122j is stored in the correspondence memory 116. FIG. 51A shows a period in which the output state of the first signal is at the HI level, FIG. 51B shows a period in which the output state of the second signal is at the HI level, and FIG. ) Shows a period in which the output state of the third signal is at the HI level, FIG. 51D shows a period in which the output state of the signal during the open / close execution mode is at the HI level, and FIG. FIG. 51F shows a period during which the output state of the signal in the high frequency support mode is at the HI level. FIG. 51F shows the first to tenth buffers 122a to 122j and the types of signals input to these buffers 122a to 122j. FIG. 51 (g) shows a timing at which the value of the number-of-receptions counter of the management-side RAM 114 is incremented by 1, and FIG. 51 (h) shows a timing at which the process of identifying the correspondence is performed. Management CPU 112 Correspondence relationship setting Te processing (step S2908) shows a timing of the execution of.

  When the supply of the operating power to the main CPU 63 and the management CPU 112 is started, the first signal is output at the timing of t1, as shown in FIGS. 51 (a), 51 (d) and 51 (e). The output state of the open / close execution mode signal and the high frequency support mode signal is changed from the LOW level to the HI level. Thus, the output of the identification start signal from the main CPU 63 to the management CPU 112 is started. Thereafter, at the timing of t2, the output states of the first signal, the open / close execution mode signal, and the high frequency support mode signal are changed from the HI level to the LOW level. As a result, the output of the identification start signal from the main CPU 63 to the management CPU 112 is stopped. At the timing of the time t2, the management-side CPU 112 makes an affirmative determination in step S2901 of the management processing (FIG. 50), and enters the identification state as shown in FIG. 51 (f).

  Thereafter, the output state of the first signal is maintained at the HI level from the timing t3 to the timing t4, as shown in FIG. As a result, the start trigger signal is output to the management CPU 112. Then, the output state of the second signal is maintained at the HI level from the timing t5 to the timing t7, as shown in FIG. As a result, the type identification signal is output to the management-side CPU 112 once. In this case, the value of the reception counter of the management-side RAM 114 is incremented by one at the timing of t6 as shown in FIG.

  Thereafter, the output state of the third signal is maintained at the HI level from the timing t8 to the timing t10, as shown in FIG. 51 (c). As a result, the end trigger signal is output to the management-side CPU 112. In this case, at the timing of t9, the correspondence setting process is executed by the management-side CPU 112 as shown in FIG. Since the value of the number-of-receptions counter is “1” at the timing when the correspondence setting process is executed, “1” is set as the correspondence information in the correspondence areas 123a to 123j to be set this time in the correspondence memory 116. Is stored.

  Thereafter, the output state of the first signal is maintained at the HI level from the timing t11 to the timing t12, as shown in FIG. As a result, the start trigger signal is output to the management CPU 112. As shown in FIG. 51 (b), each of the timing from t13 to t15, the timing from t16 to t18, the timing from t19 to t21, and the timing from t22 to t24, as shown in FIG. The output state of the signal is maintained at the HI level. As a result, the type identification signal is output to the management-side CPU 112 once. In this case, at the timing of t14, the timing of t17, the timing of t20, and the timing of t23, as shown in FIG. 51 (g), the value of the reception counter of the management RAM 114 is incremented by one.

  Thereafter, the output state of the third signal is maintained at the HI level from the timing t25 to the timing t27, as shown in FIG. 51 (c). As a result, the end trigger signal is output to the management-side CPU 112. In this case, at the timing of t26, the management-side CPU 112 executes the correspondence setting process as shown in FIG. Since the value of the number-of-receptions counter is “10” at the timing when the correspondence setting process is executed, “10” is set as the correspondence information in the correspondence areas 123a to 123j to be set this time in the correspondence memory 116. Is stored.

  Thereafter, at the timing of t28, as shown in FIGS. 51 (c), 51 (d) and 51 (e), the output states of the third signal, the open / close execution mode signal and the high frequency support mode signal are set to LOW. The level is changed to the HI level. Thus, the output of the identification end signal from the main CPU 63 to the management CPU 112 is started. Thereafter, at the timing of t29, the output state of the third signal, the open / close execution mode signal and the high frequency support mode signal is changed from the HI level to the LOW level. Thus, the output of the identification end signal from the main CPU 63 to the management CPU 112 is stopped. At the timing of t29, the management-side CPU 112 makes an affirmative determination in step S2910 of the management process (FIG. 50), whereby the identification state is released as shown in FIG. 51 (f).

  In the present embodiment, since the information on the number of winning balls is stored as the correspondence information, the history information stored in the history memory 117 includes the winning ball corresponding to the ball entry unit that triggered the storage of the history information. Information on the number is included as correspondence information. In this configuration, when there are a plurality of types of ball entry portions having the same number of prize balls, the ball entry portions cannot be distinguished in the history information. More specifically, since the first operating port 33 and the second operating port 34 each have one prize ball, it is possible to distinguish the first operating port 33 and the second operating port 34 in the history information. Can not. Under such circumstances, the number of prize balls of the first operation port 33 and the second operation port 34 may be different. Thus, even in the configuration in which the history information is stored as in the present embodiment, the first operation port 33 and the second operation port 34 can be distinguished in the history information.

  According to the present embodiment described in detail above, not only the set value update signal and the output instruction signal, but also information corresponding to whether or not the game round has been started, information corresponding to whether or not the open / close execution mode is in progress, The information corresponding to whether or not the high frequency support mode is being performed and the information corresponding to whether or not the front door frame 14 is being opened are also determined by the main CPU 63 to be signal paths corresponding to these information. Can be specified by the management-side CPU 112 without receiving the correspondence information. In this case, only the information corresponding to the detection results of the incoming ball detection sensors 42a to 48a is the information that needs to cause the management CPU 112 to recognize the correspondence between the information and the signal paths 118a to 118j from the main CPU 63. Become. When the correspondence information is to be recognized by the management-side CPU 112, the same number of pulse signals as the number of prize balls corresponding to each of the incoming ball detection sensors 42a to 48a is transmitted from the main-side CPU 63 to the management-side CPU 112 using the second signal. Is output to This makes it possible to simplify the configuration related to the transmission of the correspondence information.

<Tenth embodiment>
This embodiment is different from the first embodiment in the configuration for providing information on each ball entry result to the management IC 66. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

  FIG. 52 is an explanatory diagram for explaining the configuration of a signal path for allowing the detection results of the incoming ball detection sensors 42a to 48a to be input to the main CPU 63 and the management IC 66.

  The detection result of the first winning opening detection sensor 42a is input to the main CPU 63 through the first signal path SL11. The detection result of the second winning opening detection sensor 43a is input to the main CPU 63 through the second signal path SL12. The detection result of the third winning opening detection sensor 44a is input to the main CPU 63 through the third signal path SL13. The detection result of the special power detection sensor 45a is input to the main CPU 63 through the fourth signal path SL14. The detection result of the first working port detection sensor 46a is input to the main CPU 63 through the fifth signal path SL15. The detection result of the second working port detection sensor 47a is input to the main CPU 63 through the sixth signal path SL16. The detection result of the out-mouth detection sensor 48a is input to the main CPU 63 through the seventh signal path SL17.

  A first branch path SL21 is formed so as to branch from a middle position of the first signal path SL11, and the first branch path SL21 is electrically connected to the management IC 66. Further, a second branch path SL22 is formed so as to branch from an intermediate position of the second signal path SL12, and the second branch path SL22 is electrically connected to the management IC 66. Further, a third branch path SL23 is formed so as to branch from an intermediate position of the third signal path SL13, and the third branch path SL23 is electrically connected to the management IC 66. Further, a fourth branch path SL24 is formed so as to branch from a middle position of the fourth signal path SL14, and the fourth branch path SL24 is electrically connected to the management IC 66. Further, a fifth branch path SL25 is formed so as to branch from a middle position of the fifth signal path SL15, and the fifth branch path SL25 is electrically connected to the management IC 66. Further, a sixth branch path SL26 is formed so as to branch from a middle position of the sixth signal path SL16, and the sixth branch path SL26 is electrically connected to the management IC 66. Further, a seventh branch path SL27 is formed so as to branch from a middle position of the seventh signal path SL17, and the seventh branch path SL27 is electrically connected to the management IC 66.

  With the above configuration, the detection results of the incoming ball detection sensors 42 a to 48 a are input to the management IC 66 without the intervention of the processing by the main CPU 63. As a result, the main CPU 63 executes processing for causing the management CPU 112 to recognize each ball entry result of the out port 24a, the general winning port 31, the special power winning device 32, the first operating port 33, and the second operating port 34. Therefore, the processing load on the main CPU 63 can be reduced.

  The branch points of the branch paths SL21 to SL27 from the signal paths SL11 to SL17 exist in the MPU 62. This makes it difficult to access the branch point and the branch routes SL21 to SL27 from the outside, thereby preventing an illegal act of inputting an abnormal ball entry result only to the management IC 66. .

<Eleventh embodiment>
In the present embodiment, the configuration of the display device for displaying the management result of the game history is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

  FIG. 53 is a front view of main controller 60 in the present embodiment.

  In the first embodiment, the main control device 60 is provided with the first notification display device 69a, the second notification display device 69b, and the third notification display device 69c. A display device 201, a second notification display device 202, a third notification display device 203, and a fourth notification display device 204 are provided. The first to fourth notification display devices 201 to 204 are provided side by side on the element mounting surface of the main control board 61.

  Each of the first to fourth notification display devices 201 to 204 is a segment display in which seven LED display segments are arranged. However, the present invention is not limited to this. It may be a light emitting body, a liquid crystal display device, or an organic EL display. Each of the first to fourth notification display devices 201 to 204 is installed so that the display surface faces in the direction in which the element mounting surface of the main control board 61 faces, and is formed by the opposed wall portion 60b of the board box 60a. Covered. In this case, since the substrate box 60a is formed to be transparent, the display surfaces of the first to fourth notification display devices 201 to 204 housed in the substrate box 60a can be viewed from outside the substrate box 60a. It becomes possible. The main control device 60 is mounted on the rear surface of the resin base 21 so that the opposing wall portion 60b facing the element mounting surface of the main control substrate 61 in the substrate box 60a faces the rear of the pachinko machine 10. When the main body 12 is opened to the front of the pachinko machine 10 with respect to the outer frame 11 and the back of the resin base 21 is exposed to the front of the pachinko machine 10, the first to fourth notification display devices 201 are provided through the facing wall portion 60b. To 204 can be visually observed.

  On the display surface of the first notification display device 201, alphabets such as "A", "E", "H", "L", and "O" are displayed. On the other hand, in the second notification display device 202, the third notification display device 203, and the fourth notification display device 204, numbers are displayed in a range of “0” to “9”. The management results of the game history are notified using the first to fourth notification display devices 201 to 204. In this case, the first notification display device 201 and the second notification display device 202 manage the management result of the game history to be notified (the first to eighth parameters, the eleventh to eighteenth parameters in the first embodiment described above). Parameters, the 21st to 26th parameters, the 31st parameter, and the 41st to 42nd parameters) are displayed, and the third notification display device 203 and the fourth notification display device 204 are notified. The display corresponding to the content of the management result of the game history of the type is performed.

  More specifically, the types of the management result of the game history are the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameters, and the fourteenth to forty-second parameters in the first embodiment. Exists. The first notification display device 201 performs a display corresponding to the type of the parameter group to be notified. Specifically, when any of the first to eighth parameters is to be notified, “A” is displayed on the first notification display device 201, and any of the first to eighteen parameters is notified. “E” is displayed on the first notification display device 201 when the notification is to be made, and the first notification display device is made when any of the 21st to 26th parameters is to be notified. "H" is displayed at 201, and if any of the 31st parameters is to be notified, "L" is displayed at the first notification display device 201, and the 41st to 42nd parameters are notified. If it is a target, “O” is displayed on the first notification display device 201.

  The second notification display device 202 displays the order corresponding to the type of the management result of the game history to be notified among the arrangement order of the management results of the game history in the parameter group to be notified. To explain by taking a parameter group of the first to eighth parameters as an example, when the first parameter is a notification target, “1” is displayed on the second notification display device 202, and the second parameter is displayed. "2" is displayed on the second notification display device 202 when the information is to be notified, and "3" is displayed on the second notification display device 202 when the third parameter is to be notified. Is displayed, and “4” is displayed on the second notification display device 202 when the fourth parameter is a notification target, and is displayed on the second notification display device when the fifth parameter is a notification target. "5" is displayed on the display device 202, and when the sixth parameter is a notification target, "6" is displayed on the second notification display device 202, and the seventh parameter is a notification target. The second notification display device 202 "7" is displayed Te, when the eighth parameter is a notification target "8" is displayed in the second notification for the display device 202. In addition, a parameter group of the 21st to 26th parameters will be described as an example. When the 21st parameter is a notification target, “1” is displayed on the second notification display device 202 and the 22nd parameter is displayed. When the parameter is to be notified, “2” is displayed on the second notification display device 202, and when the 23rd parameter is to be notified, “2” is displayed on the second notification display device 202. "3" is displayed, "4" is displayed on the second notification display device 202 when the twenty-fourth parameter is to be notified, and the second is displayed when the twenty-fifth parameter is to be notified. “5” is displayed on the notification display device 202, and “6” is displayed on the second notification display device 202 when the 26th parameter is to be notified.

  The display contents of the third notification display device 203 and the fourth notification display device 204 are described in detail. The number is displayed on the display device 203 and the digit corresponding to the ones digit is displayed on the fourth notification display device 204.

  In the first to fourth notification display devices 201 to 204, the first to eighth parameters, the 11th to 18th parameters, the 21st to 26th parameters, the 31st parameter, and the 41st to 42nd parameters The display corresponding to the calculation result of the parameter is sequentially switched in accordance with a predetermined order, and after the calculation result of the forty-second parameter, which is the display object of the last order, is displayed, the first parameter which is the display object of the first order is displayed. Is displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is 2 seconds. On the other hand, the calculation cycle of the various parameters in the management CPU 112 is 51 seconds, and the number of the various parameters is 25. Therefore, the various parameters calculated by the management CPU 112 are to be notified at least once by the first to fourth notification display devices 201 to 202.

  In the first to fourth notification display devices 201 to 204, similar to the first embodiment, not only the notification of the management result of the game history but also a changeable state in which the setting state of the pachinko machine 10 can be changed. In, a value corresponding to the current setting value is displayed. Specifically, in the changeable state, the first to third notification display devices 201 to 203 are turned off, whereas the first to fourth notification display devices 204 arranged side by side are located at the right end. The value corresponding to the current setting value is displayed on the fourth notification display device 204 that is operating. That is, when “setting 1” is selected in the changeable state, “1” is displayed on the fourth notification display device 204, and when “setting 2” is selected in the changeable state. “2” is displayed on the fourth notification display device 204, and “3” is displayed on the fourth notification display device 204 when “setting 3” is selected in the changeable state, and can be changed. When “setting 4” is selected in the state, “4” is displayed on the fourth notification display device 204, and when “setting 5” is selected in the changeable state, the fourth notification is displayed. “5” is displayed on the display device 204, and “6” is displayed on the fourth notification display device 204 when “setting 6” is selected in the changeable state.

  Next, an electrical configuration for performing various displays on the first to fourth notification display devices 201 to 204 based on the control of the MPU 62 will be described. FIG. 54 is a block diagram for explaining an electrical configuration for performing various displays on the first to fourth notification display devices 201 to 204 based on the control of the MPU 62.

  As described above, the main control board 61 is provided with the MPU 62 and the first to fourth notification display devices 201 to 204. The main control board 61 is provided with a first display IC 205, a second display IC 206, a third display IC 207, and a fourth display IC 208.

  The first display IC 205 is provided so as to correspond to the first notification display device 201, is electrically connected to the MPU 62 by a signal path SL31, and is electrically connected to the first notification display device 201 by a signal path SL32. It is connected. The first display IC 205 is provided with a storage buffer for storing display data received from the MPU 62, and controls display of the first notification display device 201 in accordance with the display data stored in the storage buffer. Control of the light emitting segment. The first display IC 205 can store and hold the display data stored in the storage buffer when the operation power is supplied, and displays the display content corresponding to the stored and held display data on the first notification display device. 201 is displayed continuously. When the display data is changed by the MPU 62, the display of the first notification display device 201 is changed to the display content corresponding to the changed display data. Further, after the supply of the operating power to the first display IC 205 is started and the display data is not set by the MPU 62, the display data becomes all “0” data. Means that the first notification display device 201 is in a non-display state, that is, a light-off state.

  However, the present invention is not limited to this configuration. Even when the supply of the operation power to the pachinko machine 10 is stopped by the backup power being supplied to the first display IC 205, the display is performed by the first display IC 205. A configuration capable of storing and holding data may be adopted. In this case, when the supply of the operation power to the pachinko machine 10 is started, the display performed on the first notification display device 201 immediately before the supply of the operation power of the pachinko machine 10 is stopped is displayed. The process is started by the first notification display device 201.

  The second display IC 206 is provided corresponding to the second notification display device 202, is electrically connected to the MPU 62 by a signal path SL33, and is electrically connected to the second notification display device 202 by a signal path SL34. It is connected. The second display IC 206 is provided with a storage buffer for storing the display data received from the MPU 62, and controls the display of the second notification display device 202 according to the display data stored in the storage buffer, that is, each display. Control of the light emitting segment. The second display IC 206 can store and hold the display data stored in the storage buffer when the operating power is supplied, and displays the display content corresponding to the stored and held display data on the second notification display device. 202 is displayed continuously. When the display data is changed by the MPU 62, the display of the second notification display device 202 is changed to the display content corresponding to the changed display data. Also, in a situation after the supply of the operating power to the second display IC 206 has been started and the display data has not been set by the MPU 62, the display data becomes all “0” data. Means that the second notification display device 202 is in a non-display state, that is, a light-off state.

  However, the present invention is not limited to this configuration. Even when the supply of the operating power to the pachinko machine 10 is stopped by supplying the backup power to the second display IC 206, the second display IC 206 displays the display. A configuration capable of storing and holding data may be adopted. In this case, when the supply of the operating power to the pachinko machine 10 is started, the display performed on the second notification display device 202 immediately before the supply of the operating power to the pachinko machine 10 is stopped is displayed. The process is started by the second notification display device 202.

  The third display IC 207 is provided corresponding to the third notification display device 203, is electrically connected to the MPU 62 by a signal path SL35, and is electrically connected to the third notification display device 203 by a signal path SL36. It is connected. The third display IC 207 is provided with a storage buffer for storing display data received from the MPU 62, and controls the display of the third notification display device 203 in accordance with the display data stored in the storage buffer, that is, each display. Control of the light emission segment. The third display IC 207 can store and hold the display data stored in the storage buffer when the operation power is supplied, and displays the display content corresponding to the stored and held display data in a third notification display device. 203 is displayed continuously. Then, when the display data is changed by the MPU 62, the display of the third notification display device 203 is changed to the display content corresponding to the changed display data. Further, after the supply of the operation power to the third display IC 207 is started and the display data is not set by the MPU 62, the display data becomes all “0” data. Indicates that the third notification display device 203 is in a non-display state, that is, a light-off state.

  However, the present invention is not limited to this configuration. Even when the supply of operation power to the pachinko machine 10 is stopped due to the supply of backup power to the third display IC 207, the third display IC 207 displays the display. A configuration capable of storing and holding data may be adopted. In this case, when the supply of the operating power to the pachinko machine 10 is started, the display performed on the third notification display device 203 immediately before the supply of the operating power to the pachinko machine 10 is stopped is displayed. The process is started by the third notification display device 203.

  The fourth display IC 208 is provided corresponding to the fourth notification display device 204, is electrically connected to the MPU 62 by a signal path SL37, and is electrically connected to the fourth notification display device 204 by a signal path SL38. It is connected. The fourth display IC 208 is provided with a storage buffer for storing the display data received from the MPU 62, and controls the display of the fourth notification display device 204 according to the display data stored in the storage buffer, that is, each display. Control of the light emitting segment. The fourth display IC 208 can store and hold the display data stored in the storage buffer when the operation power is supplied, and displays the display content corresponding to the stored and held display data in a fourth notification display device. 204 is displayed continuously. Then, when the display data is changed by the MPU 62, the display of the fourth notification display device 204 is changed to the display content corresponding to the changed display data. Further, after the supply of the operating power to the fourth display IC 208 is started and the display data is not set by the MPU 62, the display data becomes all “0” data. Means that the fourth notification display device 204 is in a non-display state, that is, in a light-off state.

  However, the present invention is not limited to this configuration. Even when the supply of the operating power to the pachinko machine 10 is stopped by the backup power being supplied to the fourth display IC 208, the display is displayed on the fourth display IC 208. A configuration capable of storing and holding data may be adopted. In this case, when the supply of the operation power to the pachinko machine 10 is started, the display performed on the fourth notification display device 204 immediately before the supply of the operation power to the pachinko machine 10 is stopped is displayed. The process is started by the fourth notification display device 204.

  Output of display data to the first to fourth display ICs 205 to 208 is performed by the MPU 62, and output setting of the display data is performed by the main CPU 63 and the management CPU 112. That is, the display control of the first to fourth notification display devices 201 to 204 is executed by the main CPU 63 and the display control of the first to fourth notification display devices 201 to 204 is executed by the management CPU 112. In this case, the period during which the output setting of the display data is performed is adjusted in each of the main CPU 63 and the management CPU 112 so that the output setting of the display data is not performed at the same time. Specifically, in the changeable state where the setting state of the pachinko machine 10 can be changed after the supply of the operating power to the MPU 62 is started, the output setting of the display data by the main CPU 63 is performed. However, the output setting of the display data by the management CPU 112 is not performed. On the other hand, in a state in which the setting value is not changeable, the output setting of the display data is performed by the main CPU 63 while the output setting of the display data is performed by the management CPU 112.

  If the output setting of the display data by the main CPU 63 and the output setting of the display data by the management CPU 112 are performed at the time of synchronization, the output setting of the display data by the main CPU 63 has priority. However, the present invention is not limited to this, and a configuration in which the output setting of the display data by the management CPU 112 is prioritized may be adopted.

  Next, a display process performed by the management-side CPU 112 in the present embodiment will be described with reference to the flowchart in FIG.

  First, the value of the update timing counter of the management side RAM 114 is decremented by 1 (step S3001). The update timing counter is a counter for specifying by the management-side CPU 112 that it is time to update the display content of the management result of the game history on the first to fourth notification display devices 201 to 204. Thereafter, it is determined whether or not the display content of the first to fourth notification display devices 201 to 204 has been updated by determining whether or not the value of the update timing counter after subtracting 1 is “0”. Is determined (step S3002).

  If an affirmative determination is made in step S3002, the value of the display target counter of the management-side RAM 114 is incremented by 1 (step S3003). Then, when the value of the display target counter after adding 1 exceeds the maximum value “24” (step S3004: YES), the value of the display target counter is cleared to “0” (step S3005). The display target counter is a counter for specifying the type of parameter to be displayed on the first to fourth notification display devices 201 to 204 by the management CPU 112. The first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, the fourteenth to forty-second parameters, and the display target counters “0” to “24” The possible values correspond one-to-one. For example, when the value of the display target counter is “0”, the first parameter to be displayed first is the display target of the first to fourth notification display devices 201 to 204, and the value of the display target counter is “24”. In the case of, the 42nd parameter, which is the last display target, is displayed on the first to fourth notification display devices 201 to 204.

  If a negative determination is made in step S3004 or if the process in step S3005 is executed, display data corresponding to the type of parameter corresponding to the value of the display target counter is read from the management-side ROM 113 (step S3006). Then, a process of setting display data corresponding to the first notification display device 201 is executed (step S3007), and a process of setting display data corresponding to the second notification display device 202 is executed (step S3008). For example, if the value of the display target counter is “0” and the first parameter is a display target, display data for displaying “A” on the first notification display device 201 is displayed on the first display IC 205. In addition to the output, display data for displaying “1” on the second notification display device 202 is output to the second display IC 206. For example, if the value of the display target counter is “24” and the forty-second parameter is to be displayed, the display data for displaying “O” on the first notification display device 201 is displayed on the first display. In addition to outputting to the IC 205, display data for displaying “2” on the second notification display device 202 is output to the second display IC 206.

  Thereafter, a parameter corresponding to the value of the display target counter is read out from the operation result memory 131, and display data corresponding to the tens place and display data corresponding to the ones place of the result of multiplying the read out parameter by 100 are read out. It is read from the management side ROM 113 (step S3009). Then, the display of the third notification display device 203 is controlled so that the number corresponding to the tens place is displayed (step S3010), and the fourth information is controlled so that the number corresponding to the ones place is displayed. The display of the notification display device 204 is controlled (step S3011). For example, if the result of multiplying by 100 is “53”, display data for displaying “5” on the third notification display device 203 is output to the third display IC 207, and the fourth notification display device 204 is displayed on the third notification IC 207. Display data for displaying “3” is output to the fourth display IC 208.

  Thereafter, a value corresponding to 2 seconds is set as a value corresponding to the next update timing in the update timing counter of the management-side RAM 114 (step S3012).

  By executing the display process as described above, the management results of the game history are displayed on the first to fourth notification display devices 201 to 204. The display of the management result of the game history is performed irrespective of whether the game is continued or not, and the main control device 60 is opened from the front of the pachinko machine 10 by opening the gaming machine main body 12 with respect to the outer frame 11. This is performed regardless of whether it is visible. As described above, the display control of the first to fourth notification display devices 201 to 204 is performed regardless of the state of the game and the state of the pachinko machine 10, thereby the first to fourth notification display devices 201. To 204 can be simplified.

  The display of the management result of the game history on the first to fourth notification display devices 201 to 204 starts after the supply of the operation power to the management CPU 112 is started and after the identification end command is received from the main CPU 63. Is done. In this case, similarly to the information stored in the history memory 117, the information stored in the operation result memory 131 is stored and held even when the supply of the operation power to the pachinko machine 10 is stopped. Therefore, when the supply of the operation power to the management CPU 112 is started, the management result of the game history calculated before the supply of the operation power to the management CPU 112 is stopped is displayed.

  The first to fourth display ICs 205 to 208 store and hold the display data output from the MPU 62 while the operating power is supplied, and correspond to the first to fourth notification display devices 201 to 204 according to the display data. Display control. Therefore, after the display of the management result of the game history is started, the first to fourth notification display devices 201 to 204 are not turned off (i.e., not displayed), and are turned on corresponding to some display ( That is, the display state).

  Next, a setting value update process according to the present embodiment, which is executed by the main CPU 63, will be described with reference to the flowchart in FIG.

  First, the first to third notification display devices 201 to 203 are turned off (step S3101). Specifically, display data that is all “0” is output to the first to third display ICs 205 to 207. Thereby, the display segments of the first to third notification display devices 201 to 203 are all turned off, and the first to third notification display devices 201 to 203 are set to the non-display state. Immediately after the supply of the operating power to the pachinko machine 10 is started, all of the display segments of the first to fourth notification display devices 201 to 204 are turned off, and the first to fourth notification display devices 201 are provided. 204 are non-display states. Therefore, step S3101 is a process of maintaining the first to third notification display devices 201 to 203 in the non-display state, and if any of the first to third notification display devices 201 to 203 is affected by some influence. If it is in the display state, it is a process of setting it to the non-display state.

  After that, “1” is set to the set value counter of the main RAM 65 (step S3102). The set value counter is a counter for the main CPU 63 to specify which set value the setting state of the pachinko machine 10 is. When the set value counter is set to “1”, when the set value updating process is executed, the set value becomes “set 1” regardless of the set value up to that time.

  Thereafter, a process of starting to display the set values in the fourth display notification device 204 is executed (step S3103). In the set value display start processing, display data for displaying “1” is output to the fourth display IC 208. As a result, the number “1” corresponding to “Setting 1” is displayed on the fourth notification display device 204.

  Thereafter, on condition that the setting key insertion section 68a has not been turned off (step S3104: NO), it is determined whether or not the update button 68b has been pressed once (step S3105). Specifically, it is determined whether or not the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S3105, the process returns to step S3104, and it is determined whether the setting key insertion unit 68a has been turned OFF.

  When the update button 68b is pressed once (step S3105: YES), the value of the set value counter of the main RAM 65 is incremented by 1 (step S3106). If the value of the set value counter after adding 1 exceeds “6” (step S3107: YES), “1” is set to the set value counter (step S3108). Thus, each time the update button 68b is pressed once, the setting value is updated to the next higher level, and when the update button 68b is pressed once in the situation of “setting 6,” the setting is changed to “setting 1.” I will return.

  If a negative determination is made in step S3107, or if the process in step S3108 is performed, a process of updating the display of the set values in the fourth notification display device 204 is performed (step S3109). In the setting value display update processing, display data for displaying a number corresponding to the value of the setting value counter of the main RAM 65 is output to the fourth display IC 208. As a result, a number corresponding to the current set value is displayed on the fourth notification display device 204. The manager of the gaming hall can check the setting state of the pachinko machine 10 after pressing the update button 68b by checking the fourth notification display device 204.

  After executing the processing of step S3109, the process returns to step S3104, and it is determined whether or not the setting key insertion unit 68a has been turned off. If the OFF operation has not been performed (step S3104: NO), the processing after step S3105 is executed again. If the OFF operation has been performed (step S3104: YES), display start processing of management results on the first to fourth notification display devices 201 to 204 is executed (step S3110).

  In the display start process, a display start command of the management result is transmitted from the main CPU 63 to the management CPU 112. The management-side CPU 112 that has received the management result display start command executes processing for displaying a first parameter among various parameters stored in the calculation result memory 131. The processing content in this case is the same as that in steps S3006 to S3012 in the display processing (FIG. 55). Thereby, the display corresponding to the first parameter calculated immediately before the operation power of the pachinko machine 10 was stopped last time is displayed on the first to fourth notification display devices 201 to 204.

  Next, display modes of the first to fourth notification display devices 201 to 204 when the management result of the game history is displayed and when the setting state of the pachinko machine 10 is updated will be described. FIG. 57A is an explanatory diagram for explaining a display mode of the first to fourth notification display devices 201 to 204 when the management result of the game history is displayed, and FIG. 57B is a pachinko machine. It is explanatory drawing for demonstrating the display aspect of the 1st-4th notification display apparatuses 201-204 when the setting state of 10 is changed.

  When the management result of the game history is displayed, at least one display segment in each of the first to fourth notification display devices 201 to 204 emits light as shown in FIG. That is, each of the first to fourth notification display devices 201 to 204 is in the display state. This is the same regardless of whether any of the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters is to be notified. . Thereby, the administrator of the game hall visually confirms that all of the first to fourth notification display devices 201 to 204 are in the display state, and thus the first to fourth notification display devices 201 to 204 are displayed. It is possible to grasp that the management result of the game history is displayed.

  On the other hand, when the setting state of the pachinko machine 10 is changed, as shown in FIG. 57B, all the display segments in the first to third notification display devices 201 to 203 are turned off. That is, each of the first to third notification display devices 201 to 203 is in a non-display state. Further, any one of "1" to "6" is displayed on the fourth notification display device 204. As described above, any one of “1” to “6” is displayed on the fourth notification display device 204 and each of the first to third notification display devices 201 to 203 is in the non-display state. The manager of the game hall can grasp that the display corresponding to the set value is being performed on the first to fourth notification display devices 201 to 204, and clearly grasp the current set value. It becomes possible.

  Next, the manner in which the first to fourth notification display devices 201 to 204 enter the display state will be described with reference to the time charts of FIGS. 58 (a) to 58 (h). FIG. 58A shows a period of a changeable state in which the setting state of the pachinko machine 10 can be changed, and FIG. FIG. 58C shows a period in which the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, and FIG. 58D shows the first to fourth notification display devices. FIG. 58 (e) shows a period in which the first notification display device 201 is in a display state, and FIG. 58 (f) shows a display update timing corresponding to the game history management results in 201 to 204. 58 (g) shows a period in which the third notification display device 203 is in the display state, and FIG. 58 (h) shows a period in which the third notification display device 203 is in the display state. During which the display unit 204 is in the display state It is shown.

  When the supply of operating power to the pachinko machine 10 is started while the setting key insertion section 68a is turned on, the setting state of the pachinko machine 10 is changed at the timing t1 as shown in FIG. Can be changed. At the time t1, the setting display is updated as shown in FIG. 58 (b), and the fourth notification display device 204 is brought into the display state as shown in FIG. 58 (h), and the display state is continued. In this case, since “Setting 1” is selected, “1” is displayed on the fourth notification display device 204. On the other hand, at the timing of t1, as shown in FIGS. 58 (e) to 58 (g), the first to third notification display devices 201 to 203 are in a non-display state, that is, in a state where all display segments are turned off. Will be maintained.

  After that, the operation of changing the set value by the operation of the update button 68b is performed at each of the timing of t2, the timing of t3, the timing of t4, and the timing of t5, and as shown in FIG. Is the timing for updating the set value display. In this case, as shown in FIG. 58 (h), in the fourth notification display device 204, at each of these timings, the display content is switched to a number corresponding to the set value after the change. The display device 204 for the fourth notification is maintained in the display state including the timings at which the operations are performed. On the other hand, as shown in FIG. 58 (e) to FIG. 58 (g), at each of these set value display update timings, the first to third notification display devices 201 to 203 are in a non-display state, that is, all display The segment is kept off.

  Thereafter, when the setting key insertion section 68a is turned off at the timing of t6, the changeable state is ended as shown in FIG. 58A. In this case, the display period of the management result of the game history is started at the timing of t6 as shown in FIG. 58 (c). Specifically, the display of the first parameter stored in the calculation result memory 131 is started. Accordingly, at the time t6, the first to third notification display devices 201 to 203 are switched from the non-display state to the display state as shown in FIGS. 58 (e) to 58 (g), and the fourth notification display is performed. Although the display contents are changed by the device 204, the display state is maintained.

  Thereafter, at the timing of t7, the timing of t8, the timing of t9, the timing of t10, the timing of t11, and the timing of t12, the timing of updating the display of the management result of the game history becomes as shown in FIG. 58D. In this case, as shown in FIGS. 58 (e) to 58 (h), the first to fourth notification display devices 201 to 204 change the display contents corresponding to the management result of the updated game history at each of these timings. The first to fourth notification display devices 201 to 204 are maintained in the display state including the timing at which the display contents are switched.

  According to the embodiment described in detail above, the following excellent effects can be obtained.

  In the configuration in which the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, in the changeable state where the setting state of the pachinko machine 10 can be changed, the corresponding display is displayed. This is performed by the first to fourth notification display devices 201 to 204. As a result, the first to fourth notification display devices 201 to 204 can be used not only for displaying the management result of the game history but also as a display device for performing a corresponding display in a changeable state. .

  This corresponds to the period during which the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, and the setting value changeable state of the first to fourth notification display devices 201 to 204. This is distinguished from the period in which the display is performed. As a result, by grasping the situation where the display is being performed on the first to fourth notification display devices 201 to 204, any display is performed on the first to fourth notification display devices 201 to 204. Can be specified.

  When the display corresponding to the changeable state of the set value is performed, the first to fourth notification display devices 201 to 204 are configured to have a display mode different from a display mode when the management result of the game history is displayed. The display is controlled. Thus, by grasping the display modes of the first to fourth notification display devices 201 to 204, which display is being performed on the first to fourth notification display devices 201 to 204 is specified. It becomes possible.

  A plurality of notification display devices 201 to 204 are provided. Thereby, various displays can be performed as the display corresponding to the management result of the game history. In addition, the presence of the plurality of notification display devices 201 to 204 increases the display mode between the case where the management result of the game history is displayed and the case where the display corresponding to the setting value changeable state is performed. It is possible to make them different.

  When the display corresponding to the changeable state of the set value is performed, the first to third notification display devices 201 to 203 which are not in the non-display state when the management result of the game history is displayed are in the non-display state. Thus, by simply checking whether the first to third notification display devices 201 to 203 are in the non-display state, the display of the management result of the game history and the display corresponding to the changeable state of the set value can be performed. It is possible to clearly specify which of these is performed by the first to fourth notification display devices 201 to 204.

  When the display corresponding to the set value changeable state is performed, the fourth notification display device 204 is in the display state, and the display content is the fourth notification display device 204 when displaying the management result of the game history. This is the display content that can be displayed. In this way, by allowing the display contents on the fourth notification display device 204 to overlap, each of the case where the management result of the game history is displayed and the case where the display corresponding to the set value changeable state is performed are performed. Is not restricted. Further, even if the display contents on the fourth notification display device 204 can be duplicated in this way, the first to third notification display devices are displayed when the display corresponding to the set value changeable state is performed. Since 201 to 203 are in the non-display state, it is possible to specify which display is being performed on the first to fourth notification display devices 201 to 204.

  When the management result of the game history is displayed, each of the first to fourth notification display devices 201 to 204 is in a display state. Thereby, the display modes of the first to fourth notification display devices 201 to 204 are clearly different between the case where the management result of the game history is displayed and the case where the display corresponding to the set value changeable state is performed. It becomes possible.

  When the management result of the game history is displayed, the first to fourth notification display devices 201 to 204 are not maintained in the non-display state even when the type of the management result of the game history to be displayed is changed. . Thereby, it becomes possible to specify the management result of the game history regardless of the timing at which the first to fourth notification display devices 201 to 204 are confirmed in the situation where the management result of the game history is displayed. Also, regardless of the timing at which the first to fourth notification display devices 201 to 204 are confirmed, the display of the management result of the game history and the change of the set value are enabled in the first to fourth notification display devices 201 to 204. It is possible to specify which of the corresponding displays is being performed.

  When the display corresponding to the setting value changeable state is performed, only one of the fourth notification display devices 204 is in the display state. This makes it easy to grasp whether or not the display corresponding to the set value changeable state is being performed.

  In the configuration in which the first to fourth notification display devices 201 to 204 are arranged in the horizontal direction, the display corresponding to the set value changeable state is performed using only the fourth notification display device 204 arranged at the right end. Done. This makes it easy to grasp whether or not the display corresponding to the set value changeable state is being performed.

  When the management result of the game history is displayed, the display corresponding to the type of the management result of the game history to be displayed is performed by using the first notification display device 201 and the second notification display device 202. Using the third notification display device 203 and the fourth notification display device 204, a display corresponding to the content of the management result of the game history is performed. Thereby, it becomes easy to grasp the management result of the game history. In this case, in the state in which the set value can be changed, both the first notification display device 201 and the second notification display device 202 on which the type of the management result of the game history is displayed are in the non-display state. As a result, the state in which the first and second notification display devices 201 and 202 for displaying the types are not displayed corresponds to the set value changeable state, and corresponds to the set value changeable state. It is easy to grasp that the display is being performed.

  When the display corresponding to the set value changeable state is performed, not only the first notification display device 201 and the second notification display device 202 on which the type of the management result of the game history is displayed, but also the game The third notification display device 203 on which the content of the history management result is displayed is also in a non-display state. This makes it easier to grasp that the display corresponding to the set value changeable state is being performed.

  Display data is output from the MPU 62 to the first to fourth display ICs 205 to 208, and the first to fourth display ICs 205 to 208 perform predetermined display on the first to fourth notification display devices 201 to 204 according to the display data. In such a configuration, display data is stored and held in the first to fourth display ICs 205 to 208. Accordingly, even when the main CPU 63 stops executing the processing for advancing the game due to, for example, the occurrence of the radio wave detection abnormality or the vibration detection abnormality (when an affirmative determination is made in step S306). The display of the management result of the game history on the first to fourth notification display devices 201 to 204 can be maintained.

  Note that, among the first to fourth notification display devices 201 to 204, the objects which are in the non-display state (all unlit state) in the changeable state in which the setting state of the pachinko machine 10 can be changed are the first to fourth notification apparatuses. The present invention is not limited to the third notification display devices 201 to 203, and may be first and second notification display devices 201 and 202. In this case, a predetermined display (for example, “5” is displayed) different from the content of the current setting value is displayed on the third notification display device 203, and the current setting value is displayed on the fourth notification display device 204. May be displayed, a predetermined display (for example, “5”) different from the content of the current set value is displayed on the fourth notification display device 204, and the third notification is displayed. The display device 203 may display a number corresponding to the current setting value. Also, a configuration in which the first notification display device 201 and the third notification display device 203 are in a non-display state (all unlit states) and the second notification display device 202 and the fourth notification display device 204 are in a display state. The first notification display device 201 and the fourth notification display device 204 may be in a non-display state (all unlit state), and the second notification display device 202 and the third notification display device 203 may be in the display state. The second notification display device 202 and the third notification display device 203 may be in a non-display state (all unlit state), and the first notification display device 201 and the fourth notification display device 204 may display. The second notification display device 202 and the fourth notification display device 204 may be in a non-display state (all unlit state), and the first notification display device 201 and the third notification display device 203 may be in a state. Is displayed. It may be configured.

  In the changeable state in which the setting state of the pachinko machine 10 can be changed, only the first notification display device 201 may be in a non-display state (all unlit state). Only the display device 202 may be in a non-display state (all-off state), or only the third notification display device 203 may be in a non-display state (all-off state). A configuration may be adopted in which only 204 is in a non-display state (all unlit state).

  In the changeable state where the setting state of the pachinko machine 10 can be changed, only the first notification display device 201 may be in the display state, and only the second notification display device 202 may be displayed. The third notification display device 203 may be in a display state.

<Twelfth embodiment>
In the present embodiment, the display contents of the first notification display device 201 and the second notification display device 202 in the setting value changeable state are different from those of the above-described eleventh embodiment. Hereinafter, a configuration different from the eleventh embodiment will be described. The description of the same configuration as the eleventh embodiment is basically omitted.

  FIG. 59 (a) is an explanatory diagram for explaining the configuration of the first notification display device 201, and FIG. 59 (b) is an explanatory diagram for explaining the configuration of the second notification display device 202.

  As shown in FIG. 59A, the first notification display device 201 includes seven first to seventh display segments 201a to 201g. Each of the first to seventh display segments 201a to 201g is formed in a rod shape, and has a light emitting body such as an LED inside. These seven first to seventh display segments 201a to 201g are arranged so that the first notification display device 201 becomes a so-called seven-segment display.

  As shown in FIG. 59 (b), the second notification display device 202 includes seven first to seventh display segments 202a to 202g. Each of the first to seventh display segments 202a to 202g is formed in a rod shape, and has a light emitting body such as an LED inside. These seven first to seventh display segments 202a to 202g are arranged such that the second notification display device 202 becomes a so-called seven-segment display.

  FIG. 60 shows a case where the management result of the game history is displayed on the first to fourth notification display devices 201 to 204 and a case where the setting state of the pachinko machine 10 is displayed as a changeable state. It is explanatory drawing for demonstrating the display content of the 1st alerting display device 201 and the 2nd alerting display device 202 in FIG.

  The display contents of the first notification display device 201 and the second notification display device 202 when the management result of the game history is displayed are the same as those in the eleventh embodiment. Therefore, any one of “A”, “E”, “H”, “L”, and “O” is displayed on the first notification display device 201, and “1” to “8” on the second notification display device 202. Is displayed.

  In this case, each of the first to seventh display segments 201a to 201g of the first notification display device 201 is “A”, “E”, “H”, “L”, In at least one type of the display of “O”, a light is emitted. That is, the display segments 201a to 201g that are not light-emitting targets even when any of “A”, “E”, “H”, “L”, and “O” are displayed on the first notification display device 201 Does not exist.

  Similarly, for the second notification display device 202, the first to seventh display segments 202a to 202g of the second notification display device 202 respectively have "1" to "8" in the second notification display device 202. Is a light emission target in at least one type of display among the above displays. That is, even when any of “1” to “8” is displayed on the second notification display device 202, there are no display segments 202a to 202g that are not light emission targets.

  In the changeable state where the setting state of the pachinko machine 10 can be changed, in the first notification display device 201, the second display segment 201b and the fifth display segment 201e are in a light emitting state. As described above, the second display segment 201b and the fifth display segment 201e can emit light when the management result of the game history is displayed on the first notification display device 201. Furthermore, the second display segment 201b and the fifth display segment 201e are in a light emitting state in any case where the management result of the game history is displayed on the first notification display device 201. On the other hand, among the first to seventh display segments 201a to 201g, only the second display segment 201b and the fifth display segment 201e emit light, and the display content of the first notification display device 201 is the management of the game history. Not present when displaying results. Thus, in the setting value changeable state, a display that is not displayed when the game history management result is displayed while using the display segments 201b and 201e that can be in a light emitting state when the game history management result is displayed. The mode can be displayed on the first notification display device 201. Therefore, it is possible to cause the first notification display device 201 to perform display corresponding to the set value changeable state while also using the display segments 201a to 201g used when displaying the management result of the game history. It becomes possible.

  In the state in which the set value can be changed, the third display segment 202c is in the light emitting state in the second notification display device 202. As described above, the third display segment 202c can emit light when the management result of the game history is displayed on the second notification display device 202. On the other hand, among the first to seventh display segments 202a to 202g, only the third display segment 202c emits light, and the display content of the second notification display device 202 exists when displaying the management result of the game history. I haven't. Thus, in the setting value changeable state, a display mode that is not displayed when the game history management result is displayed while using the display segment 202c that can be in a light emitting state when displaying the game history management result is displayed. It can be displayed on the second notification display device 202. Therefore, the display corresponding to the changeable state of the set value can be performed on the second notification display device 202, while also using the display segments 202a to 202g used when displaying the management result of the game history. It becomes possible.

  Next, a setting value update process according to the present embodiment, which is executed by the main CPU 63, will be described with reference to the flowchart in FIG.

  First, a process of starting display of set values in the first and second notification display devices 201 and 202 is executed (step S3201). Specifically, in the first notification display device 201, the second display segment 201b and the fifth display segment 201e emit light, and the other display segments 201a, 201c, 201d, 201f, and 201g turn off. Is output to the first display IC 205. Further, the second notification display device 202 outputs to the second display IC 206 display data in which the third display segment 202c emits light and the other display segments 202a, 202b, 202d to 202g turn off. As a result, the display for notifying that the setting state of the pachinko machine 10 can be changed is started on the first notification display device 201 and the second notification display device 202.

  Thereafter, the process of turning off the third notification display device 203 is executed (step S3202). Specifically, display data that is all “0” is output to the third display IC 207. As a result, all the display segments of the third notification display device 203 are turned off, and the third notification display device 203 is turned off.

  Thereafter, “1” is set to the set value counter of the main RAM 65 (step S3203). The set value counter is a counter for the main CPU 63 to specify which set value the setting state of the pachinko machine 10 is. When the set value counter is set to “1”, when the set value updating process is executed, the set value becomes “set 1” regardless of the set value up to that time.

  Thereafter, a process of starting to display the set values on the fourth notification display device 204 is executed (step S3204). In the set value display start processing, display data for displaying “1” is output to the fourth display IC 208. As a result, the number “1” corresponding to “Setting 1” is displayed on the fourth notification display device 204.

  Thereafter, on condition that the setting key insertion unit 68a has not been turned OFF (step S3205: NO), it is determined whether or not the update button 68b has been pressed once (step S3206). Specifically, it is determined whether or not the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S3206, the process returns to step S3205 to determine whether the setting key insertion unit 68a has been turned OFF.

  If the update button 68b is pressed once (step S3206: YES), the value of the set value counter of the main RAM 65 is incremented by 1 (step S3207). If the value of the set value counter after adding 1 exceeds “6” (step S3208: YES), “1” is set to the set value counter (step S3209). Thus, each time the update button 68b is pressed once, the setting value is updated to the next higher level, and when the update button 68b is pressed once in the situation of “setting 6,” the setting is changed to “setting 1.” I will return.

  If a negative determination is made in step S3208, or if the process in step S3209 is performed, a process of updating the display of the set values in the fourth notification display device 204 is performed (step S3210). In the setting value display update processing, display data for displaying a number corresponding to the value of the setting value counter of the main RAM 65 is output to the fourth display IC 208. As a result, a number corresponding to the current set value is displayed on the fourth notification display device 204. The manager of the gaming hall can check the setting state of the pachinko machine 10 after pressing the update button 68b by checking the fourth notification display device 204.

  After executing the processing in step S3210, the process returns to step S3205, and it is determined whether the setting key insertion unit 68a has been turned OFF. If the OFF operation has not been performed (step S3205: NO), the processing after step S3206 is executed again. If the OFF operation has been performed (step S3205: YES), display start processing of management results on the first to fourth notification display devices 201 to 204 is executed (step S3211).

  In the display start process, a display start command of the management result is transmitted from the main CPU 63 to the management CPU 112. The management-side CPU 112 that has received the management result display start command executes processing for displaying a first parameter among various parameters stored in the calculation result memory 131. The processing content in this case is the same as that in steps S3006 to S3012 in the display processing (FIG. 55). Thereby, the display corresponding to the first parameter calculated immediately before the operation power of the pachinko machine 10 was stopped last time is displayed on the first to fourth notification display devices 201 to 204.

  According to the embodiment described in detail above, the following excellent effects can be obtained.

  The setting value can be changed by setting the display segments 201a to 201g and 202a to 202g of the first and second notification display devices 201 and 202, which can be in the light emitting state when the management result of the game history is displayed, to the light emitting state. The display corresponding to the state is performed. Thereby, in diversifying the display of the management result of the game history, it is possible to minimize restrictions on the content of the display corresponding to the management result of the game history. On the other hand, for each of the first notification display device 201 and the second notification display device 202, the display segments 201a to 201g and 202a to be in the light emitting state when the display corresponding to the set value changeable state is performed. The combination of 202g is a combination that does not exist when the management result of the game history is displayed. Thereby, by grasping the combination of the display segments 201a to 201g and 202a to 202g that are in the light emitting state for each of the first notification display device 201 and the second notification display device 202, the display of the management result of the game history is performed. And which of the displays corresponding to the set value changeable state is being performed can be grasped.

  For each of the first notification display device 201 and the second notification display device 202, there are display segments 201a to 201g and 202a to 202g that do not emit light even if the display of the management result of the game history is performed in all patterns. I haven't. Thereby, in diversifying the display corresponding to the game history management result, it is possible to minimize the display content of the game history management result.

  When the display corresponding to the set value changeable state is performed, the third notification display device 203 that does not enter the non-display state when displaying the management result of the game history enters the non-display state. Thereby, not only the display contents of the first notification display device 201 and the second notification display device 202 but also whether the third notification display device 203 is in a non-display state is confirmed, and the game history is confirmed. It is possible to clearly specify which of the display of the management result and the display corresponding to the set value changeable state is being performed on the first to fourth notification display devices 201 to 204.

  It should be noted that the first and second notification display devices 201 and 202 are limited to a configuration in which only one type of display content corresponding to the changeable state in which the setting state of the pachinko machine 10 can be changed is set. However, a configuration in which a plurality of types are set may be adopted. In this case, the display order of the plurality of types of display contents may be determined in advance, and the display contents to be displayed may be changed according to the display order each time the changeable state is newly executed. As described above, even when there are a plurality of types of display contents corresponding to the set value changeable state, the display contents are set to the display segment 201a which becomes a light emitting state when the management result of the game history is displayed. The display contents are displayed by using the game history information 201 to 201g and 202a to 202g, and are not displayed when the management result of the game history is displayed.

  Also, in one of the case where the management result of the game history is displayed and the case where the display corresponding to the changeable state in which the setting state of the pachinko machine 10 can be changed is performed, the first and second notification display devices are provided. A blinking display may be performed in 201 and 202, and a display for maintaining lighting may be performed on the other. In this case, since the management of the game hall can specify which of the display of the management result of the game history and the display corresponding to the changeable state depending on which of the blinking display and the lighting display, the change is performed. The combination of the display segments 201a to 201g and 202a to 202g which are set to the light emitting state in the display corresponding to the possible state may be a combination used when displaying the management result of the game history, and the management of the game history. A combination that is not used when displaying the result may be used. Further, the lighting period and the turning-off period in the blinking display may be identical to each other in the first notification display device 201 and the second notification display device 202, or may be completely displaced. However, the configuration may be such that only a part thereof is overlapped.

<Thirteenth embodiment>
In the present embodiment, unlike the above-described eleventh embodiment, when an abnormal state occurs in the pachinko machine 10, a display corresponding thereto is performed using the first to fourth notification display devices 201 to 204. I have. Hereinafter, a configuration different from the eleventh embodiment will be described. The description of the same configuration as the eleventh embodiment is basically omitted.

  FIG. 62 is an explanatory diagram for describing the configuration of the abnormal display area 211 provided in the main RAM 65.

  The abnormality display area 211 is an area for storing information on an abnormal state to be displayed on the first to fourth notification display devices 201 to 204. The abnormal display area 211 is provided with a plurality of unit areas 211a to 211d. Specifically, a first unit area 211a, a second unit area 211b, a third unit area 211c, and a fourth unit area 211d are provided. Each of the first to fourth unit areas 211a to 211d can store information on an abnormal state of the pachinko machine 10 one by one. In other words, up to four pieces of information on the abnormal state of the pachinko machine 10 can be stored and held in the abnormal display area 211.

  Here, in the present embodiment, all information on the abnormal state occurring in the pachinko machine 10 is specified by the main CPU 63. For example, when an abnormality related to the payout of the game ball (for example, the lower plate 56a is full, the tank 75 is empty, or the payout device 76 causes a payout error), a command corresponding to the generated abnormality is issued to the payout CPU 92. From the main CPU 63. Further, the pachinko machine 10 is provided with a radio wave detection sensor and a vibration detection sensor (not shown). When an illegal radio wave is detected by the radio wave detection sensor, an abnormal signal corresponding thereto is transmitted to the main CPU 63 and an abnormal signal is transmitted. When the vibration is detected by the vibration detection sensor, a corresponding abnormal signal is transmitted to the main CPU 63. Further, based on the fact that normal signals are not transmitted from the respective ball-in detection sensors 42a to 49a, occurrence of disconnection abnormality in these ball-in detection sensors 42a to 49a is specified.

  The type of abnormal state specified by the main CPU 63 is larger than the maximum number of abnormal state information that can be stored in the abnormal display area 211. Then, when a large number of abnormal states occur at the same time, it is assumed that new abnormal information will be generated even though the information of the maximum number of abnormal states is already stored in the abnormal display area 211. On the other hand, the storage priority of the abnormal state information is set at the setting stage of the pachinko machine 10, and the information is newly stored in a state where the maximum number of abnormal state information is already stored in the abnormality display area 211. When an abnormal state occurs, information of an abnormal state having a high storage priority is left in the abnormal display area 211. Thereby, it becomes possible to give priority to the notification of an abnormal state having a high storage priority.

  Next, the abnormality setting processing executed by the main CPU 63 will be described with reference to the flowchart in FIG. The abnormality setting process is executed as the first process of the timer interrupt process (FIG. 11).

  First, it is determined whether an abnormal display target has occurred (step S3301). The types of the abnormal display target include the lower tray 56a being full, the tank 75 not having a ball, the dispensing device 76 dispensing abnormality, radio wave detection abnormality, vibration detection abnormality, and disconnection abnormality of each of the ball entry detection sensors 42a to 49a. The number of types of the abnormal display target is larger than the number of the first to fourth unit areas 211a to 211d provided in the abnormal display area 211.

  If an affirmative determination is made in step S3301, it is determined whether information on the abnormal state corresponding to the abnormality display target that has occurred this time has already been stored in any of the first to fourth unit areas 211a to 211d of the abnormal display area 211. Is determined (step S3302). If the information is already stored, the information of the abnormal state corresponding to the abnormality display target that has occurred this time is not stored in the abnormality display area 211. Thus, it is possible to prevent information of the same type of abnormal state from being redundantly stored in the abnormal display area 211.

  If a negative determination is made in step S3302, it is determined whether the value of the abnormality target counter provided in the main RAM 65 is the maximum value (specifically, "4") (step S3303). The abnormality target counter is a counter for specifying, by the main CPU 63, the number of areas in the first to fourth unit areas 211a to 211d in the abnormality display area 211 in which abnormal state information is stored.

  If the value of the abnormality target counter is the maximum value (step S3303: YES), a priority comparison process is executed (step S3304). In the priority comparison process, first, the abnormal state information having the lowest storage priority is specified from the abnormal state information stored in the first to fourth unit areas 211a to 211d of the abnormal display area 211. The storage priority is predetermined in the design stage of the pachinko machine 10, and specifically, the lower tray 56a is full → there is no ball in the tank 75 → vibration detection abnormality → payout abnormality by the payout device 76 → ball entry detection sensor 42a The storage priority increases in the order of disconnection abnormality to 49a → radio wave detection abnormality. In the priority comparison process, the information of the abnormal state having the lowest storage priority stored in the first to fourth unit areas 211a to 211d and the storage priority of the abnormality display target that has occurred this time are higher. Is determined by comparison.

  When the storage priority of the abnormality display target that has occurred this time is lower (step S3305: NO), the information of the abnormality state corresponding to the abnormality display target that has occurred this time is not stored in the abnormality display area 211. Accordingly, in a configuration in which the number of types of the abnormal display target is greater than the number of the first to fourth unit areas 211a to 211d provided in the abnormal display area 211, the information of the abnormal state having a high storage priority is stored. This can be left in the abnormality display area 211.

  If the storage priority of the abnormality display target that has occurred this time is higher (step S3305: YES), the processing for setting the abnormality display area 211 is executed (step S3306). In the setting process of the abnormality display area 211 performed when the affirmative determination is made in step S3305, the current generation is performed in the unit areas 211a to 211d specified as storing the information of the abnormal state having the lowest storage priority. Overwrites the abnormal status information corresponding to the abnormal display target.

  On the other hand, if the value of the abnormality target counter in the main RAM 65 has not reached the maximum value (step S3303: NO), the value of the abnormality target counter is incremented by 1 (step S3307), and then the setting processing of the abnormality display area 211 is performed. Is executed (step S3306). In the setting process, one area is selected from the unit areas 211a to 211d in which the abnormal state information is not stored in the abnormal display area 211, and the abnormal state corresponding to the abnormality display target that has occurred this time in the selected area. The information of is stored.

  In step S3306, if there is only one abnormal condition information stored in the abnormal display area 211, the abnormal condition information is stored in the first unit area 211a. In the case where there are a plurality of pieces of abnormal state information stored in the "n" area, the abnormal state information is stored in order from the area having the smaller value of "n" in the n-th unit areas 211a to 211b.

  In the abnormality setting process, it is determined whether or not a release event of the abnormality display target has occurred (step S3308). For example, it is determined whether or not a command indicating that the lower tray 56a has been fully filled, the absence of the ball in the tank 75 has been released, or that the dispensing device 76 has released a dispensing abnormality has been received from the dispensing-side CPU 92. judge. Also, it is determined whether an abnormality clearing operation has been performed for the occurrence of a radio wave detection abnormality, whether an abnormality clearing operation has been performed for the occurrence of a vibration detection abnormality, or whether an abnormality clearing operation has been performed for a disconnection abnormality. judge.

  If an affirmative determination is made in step S3308, a process of deleting the abnormal display area 211 is performed (step S3309). In the erasing process, it is specified whether or not the information of the abnormal state corresponding to the abnormal display target that has been canceled this time is stored in any of the first to fourth unit areas 211a to 211d of the abnormal display area 211. If it is stored, by clearing the stored area to "0", the abnormal state information is deleted. In this case, if there is only one abnormal state information stored in the abnormal display area 211 after the erasure, the abnormal state information is stored in the first unit area 211a. When there are a plurality of pieces of abnormal state information stored in the display area 211, the abnormal state information is stored in the nth unit areas 211a to 211b in order from the area having the smaller value of “n”. Further, the value of the abnormality target counter of the main RAM 65 is decremented by 1 (step S3310).

  In the abnormality setting process, it is determined whether or not an operation for starting an abnormality display has occurred (step S3311). The operation for starting the abnormal display is performed by pressing the update button 68b with the gaming machine main body 12 opened forward with respect to the outer frame 11 in a situation where the setting state of the pachinko machine 10 is not a changeable state. It is performed by operating.

  If an affirmative determination is made in step S3311, it is determined whether or not information on one or more abnormal states is stored in the abnormal display area 211 (step S3312). When the information on the abnormal state is not stored, the abnormal display on the first to fourth notification display devices 201 to 204 is not started. Thus, it is possible to prevent the abnormal display from being started even though there is no information on the abnormal state to be informed.

  If an affirmative determination is made in step S3312, “1” is set in the abnormality display flag provided in the main RAM 65 (step S3313). The abnormal display flag cancels the display corresponding to the management result of the game history and displays the display corresponding to the information of the abnormal state stored in the abnormal display area 211 on the first to fourth notification display devices 201 to 204. Is a flag for the main CPU 63 to specify that the situation is to be performed. It should be noted that a negative determination is made in step S3311 even if an abnormality display start operation is performed in a state where the abnormality display flag is already set to "1".

  After that, the process of setting the display of the management result is executed (step S3314). In the stop setting process, the display of the game history management results on the first to fourth notification display devices 201 to 204 is temporarily stopped by transmitting a display stop command to the management CPU 112. Upon receiving the display stop command, the management-side CPU 112 stops the execution of the display process (FIG. 55). However, the management-side CPU 112 does not set the display data that is all “0” data in the first to fourth display ICs 205 to 208 even if the display stop command is received. Therefore, until the display data is transmitted from the main CPU 63 to the first to fourth display ICs 205 to 208, the display of the management result of the game history at that time is continued on the first to fourth notification display devices 201 to 204. You.

  In the abnormality setting process, it is determined whether or not an operation for terminating the abnormality display has occurred (step S3315). The abnormal display ending operation is performed by pressing the reset button 68c with the gaming machine main body 12 opened forward with respect to the outer frame 11 in a situation where the setting state of the pachinko machine 10 is not a changeable state. It is performed by operating. If an affirmative determination is made in step S3315, the abnormality display flag in the main RAM 65 is cleared to "0" (step S3316). It should be noted that a negative determination is made in step S3315 even if the operation of terminating the abnormal display is performed in a situation where the value of the abnormal display flag is already “0”.

  After that, the cancellation of the display of the management result is executed (step S3317). In the cancellation release processing, the update of the display of the management result of the game history in the first to fourth notification display devices 201 to 204 is stopped by transmitting the cancellation release command to the management CPU 112. To release. The management-side CPU 112 resumes the execution of the display process (FIG. 55) by receiving the cancellation release command. However, the management-side CPU 112 does not set the display data that is all “0” data in the first to fourth display ICs 205 to 208 even if the cancellation release command is received. Therefore, until the display data is transmitted from the management-side CPU 112 to the first to fourth display ICs 205 to 208, the abnormal display at that time is continued in the first to fourth notification display devices 201 to 204. Further, the management-side CPU 112 continues to store the history information and calculate various parameters even when the update of the display of the management result of the game history is stopped, and the result of calculating the various parameters is calculated. It is stored in the result memory 131. Therefore, when the state in which the update of the display of the management result of the game history is stopped is released, the display of the management result of the latest game history is immediately displayed on the first to fourth notification display devices 201 to 204. It will be restarted.

  In the abnormality setting process, if “1” is set in the abnormality display flag of the main RAM 65 (step S3318: YES), an abnormality display process is executed (step S3319). FIG. 64 is a flowchart showing the abnormality display processing.

  First, the first and second notification display devices 201 and 202 are turned off (step S3401). Specifically, display data that is all “0” is output to the first and second display ICs 205 and 206. As a result, all the display segments of the first and second notification display devices 201 and 202 are turned off, and the first and second notification display devices 201 and 202 are not displayed.

  Thereafter, the value of the update timing counter provided in the main RAM 65 is decremented by 1 (step S3402). The update timing counter is a counter for specifying by the main CPU 63 that it is time to update the display content of the abnormal display on the first to fourth notification display devices 201 to 204. If the value of the update timing counter is already “0”, that state is maintained. Thereafter, it is determined whether or not the value of the update timing counter is “0” to determine whether or not it is time to update the display contents of the first to fourth notification display devices 201 to 204 ( Step S3403).

  If an affirmative determination is made in step S3403, a process of updating the display target counter provided in the main RAM 65 is executed (step S3404). In this update process, if the current time is the first time of the abnormality display process since the abnormality display flag of the main RAM 65 is set to “1”, the display target counter is set to “0”. The value of the display target counter corresponds to the first to fourth unit areas 211a to 211d of the abnormal display area 211. Specifically, the value of “0” of the display target counter corresponds to the first unit area 211a. The value of “1” of the display target counter corresponds to the second unit area 211b, the value of “2” of the display target counter corresponds to the third unit area 211c, and “3” of the display target counter. Corresponds to the fourth unit area 211d. In the updating process, when the abnormality display flag of the main RAM 65 is set to “1” this time and the first time of the abnormality display process is not performed, the value of the display target counter is incremented by one.

  After that, it is determined whether or not the abnormal state information is stored in the area corresponding to the current value of the display target counter among the first to fourth unit areas 211a to 211d (step S3405). Here, as described above, when only one piece of information on the abnormal state is stored, the information on the abnormal state is stored in the first unit area 211a, and a plurality of pieces of information on the abnormal state are stored. In this case, the abnormal state information is stored in the nth unit areas 211a to 211b in the order from the area having the smaller value of “n”. Therefore, if the abnormal state information is not stored in the area corresponding to the current value of the display target counter, the abnormal state information is also stored in the area corresponding to the value larger than the display target counter value. Will not be. If the value of the display target counter after 1 is added exceeds the maximum value of “3”, the corresponding area does not exist in the first place, so that the information of the abnormal state is not stored. .

  If an affirmative determination is made in step S3405, the value of the display target counter in the main RAM 65 is cleared to "0" (step S3406). Here, it is assumed that all the abnormal states targeted for the abnormal display are canceled in the situation where the abnormal display is being performed. In this case, even if the process for displaying an abnormality is performed, information on an abnormal state is not stored in the abnormality display area 211. In such a situation, a display indicating that the information of the abnormal state is not stored is displayed on the third and fourth notification display devices 203 and 204.

  If a negative determination is made in step S3405, or if the process of step S3406 is performed, display data of a display target corresponding to the value of the display target counter in the main RAM 65 is read from the main ROM 64 (step S3407). Specifically, the information stored in the area corresponding to the value of the display target counter of the main RAM 65 among the first to fourth unit areas 211a to 211d of the abnormal display area 211 is read. Then, display data corresponding to the information is read from the main ROM 64. The display data is set in one-to-one correspondence with the abnormal state information, and the display contents of the third and fourth notification display devices 203 and 204 based on the display data are set for each type of abnormal state information. Is different. In addition, there is display data corresponding to the absence of the abnormal state information, and this display data is different from the display data corresponding to the abnormal state information. Therefore, when the information on the abnormal state does not exist, the display contents of the third and fourth notification display devices 203 and 204 are different from the display contents when the information on the abnormal state exists.

  On the other hand, in the third and fourth notification display devices 203 and 204, the display contents corresponding to the abnormal state information and the display contents corresponding to the absence of the abnormal state information are the third and fourth notification contents. The display contents when the management result of the game history is displayed on the fourth notification display devices 203 and 204 and the display contents of the set values on the fourth notification display device 204 overlap. On the other hand, when displaying the management result of the game history, all of the first to fourth notification display devices 201 to 204 are in the display state, and the setting state of the pachinko machine 10 can be changed. In the state, the first to third notification display devices 201 to 203 are in the non-display state, and the fourth notification display device 204 is in the display state. When an abnormal display is performed, the first and second notification display devices are set. Since the display devices 201 and 202 are in the non-display state and the third and fourth notification display devices 203 and 204 are in the display state, even if the display contents are overlapped as described above, it corresponds to any situation. It becomes possible for the manager of the game hall to grasp whether the display is made.

  Thereafter, the display of the third notification display device 203 is controlled according to the display data read in step S3407 (step S3408), and the display of the fourth notification display device 204 is controlled (step S3409). In this case, the display device 203 for the third notification and the display device for the fourth notification are used regardless of whether the display corresponding to the information on the abnormal state is performed or the display corresponding to the absence of the information on the abnormal state. Each of the display devices 204 does not enter a non-display state (that is, does not enter a completely unlit state), and is in some display state.

  Thereafter, a value corresponding to 2 seconds is set as a value corresponding to the next update timing in the update timing counter of the main RAM 65 (step S3410).

  According to the embodiment described in detail above, the following excellent effects can be obtained.

  In the configuration in which the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, the display corresponding to the abnormal state of the pachinko machine 10 is displayed on the first to fourth notification display devices 201 to 204. Done. As a result, the first to fourth notification display devices 201 to 204 can be used not only for displaying the management result of the game history but also as a display device for performing a display corresponding to an abnormal state.

  In the case where the display corresponding to the abnormal state is performed on the first to fourth notification display devices 201 to 204 when the pachinko machine 10 does not have the abnormal state, the first to fourth notification display devices 201 to 204 A display corresponding to the fact that no abnormal condition has occurred is displayed. Thus, it is possible to clearly specify whether or not the pachinko machine 10 has an abnormal state by checking the first to fourth notification display devices 201 to 204.

  The period in which the management result of the game history is displayed on the first to fourth notification display devices 201 to 204 and the display corresponding to the abnormal state of the pachinko machine 10 are performed on the first to fourth notification display devices 201 to 204. Is different from the period of time. As a result, by grasping the situation where the display is being performed on the first to fourth notification display devices 201 to 204, any display is performed on the first to fourth notification display devices 201 to 204. Can be specified.

  When the display corresponding to the abnormal state of the pachinko machine 10 is performed, the first to fourth notification display devices 201 to 204 are configured to have a display mode different from a display mode when the management result of the game history is displayed. The display is controlled. Thus, by grasping the display modes of the first to fourth notification display devices 201 to 204, which display is being performed on the first to fourth notification display devices 201 to 204 is specified. It becomes possible.

  A plurality of notification display devices 201 to 204 are provided. Thereby, various displays can be performed as the display corresponding to the management result of the game history. In addition, the presence of the plurality of notification display devices 201 to 204 increases the display mode between the case where the management result of the game history is displayed and the case where the display corresponding to the abnormal state of the pachinko machine 10 is performed. It is possible to make them different.

  When the display corresponding to the abnormal state of the pachinko machine 10 is performed, the first and second notification display devices 201 and 202 which are not in the non-display state when the management result of the game history is displayed are in the non-display state. Thus, only by checking whether the first and second notification display devices 201 and 202 are in the non-display state, the display of the management result of the game history and the display corresponding to the abnormal state of the pachinko machine 10 are performed. It is possible to clearly specify which of these is being performed by the first to fourth notification display devices 201 to 204.

  When the display corresponding to the abnormal state of the pachinko machine 10 is performed, the third and fourth notification display devices 203 and 204 are in the display state, and the display content is the third in the case of displaying the management result of the game history. , The fourth notification display devices 203, 204. By allowing the display contents on the third and fourth notification display devices 203 and 204 to overlap in this manner, the display of the management result of the game history and the display corresponding to the abnormal state of the pachinko machine 10 are performed. It is possible not to impose restrictions on the respective display contents when they are performed. Further, even if the display contents on the third and fourth notification display devices 203 and 204 can be overlapped in this way, if the display corresponding to the abnormal state of the pachinko machine 10 is performed, the first and second notification devices are displayed. Since the second notification display devices 201 and 202 are in the non-display state, it is possible to specify which display is being performed on the first to fourth notification display devices 201 to 204.

  Note that, when the operation of starting the abnormal display is performed in a state where the information of the abnormal state is not stored in the abnormal display area 211, the information of the abnormal state is displayed on the first to fourth notification display devices 201 to 204 at that time. May be displayed corresponding to the fact that is not stored.

<Fourteenth embodiment>
In the present embodiment, the processing configuration of the management output process executed by the main CPU 63 is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

  FIG. 65 is a flowchart showing the management output process executed by the main CPU 63 in this embodiment.

  First, it is determined whether or not “1” is set in the management start flag provided in the main RAM 65 (step S3501). The management start flag is a flag for the main CPU 63 to specify whether or not the situation is such that history information should be stored in the history memory 117. In the present embodiment, the total number of game balls discharged from the game area PA after the supply of the operation power to the pachinko machine 10 is started (that is, after the supply of the operation power to the MPU 62 is started) is a management start reference. The history information is not stored in the history memory 117 until the total number of the game balls discharged from the game area PA becomes equal to or more than the number corresponding to the management start reference value until the number becomes equal to or more than the number corresponding to the value. The storage of the history information in the history memory 117 is started. At the shipping stage of the pachinko machine 10 or the like, the operation of the pachinko machine 10 may be checked before shipping. At that time, the game balls are put into each of the ball entry units, and the subsequent operation is checked. On the other hand, the history information is not stored in the history memory 117 until the total number of game balls discharged from the game area PA after the supply of the operating power to the pachinko machine 10 becomes equal to or more than the management start reference value. By doing so, it is possible to prevent the result of entering the ball at the time of the operation check as described above from being stored as history information.

  If a negative determination is made in step S3501, "7" is set to the start-time management counter provided in the main RAM 65 (step S3502). The start-time management counter determines which of the seven incoming ball detection sensors 42a to 48a is in a state in which the detection state of the game ball is to be specified when the management start flag is not set to "1". This is a counter specified by the main CPU 63.

  Thereafter, it is determined whether or not “1” is set in the output flag of the main RAM 65 corresponding to the value of the start-time management counter (step S3503). Specifically, when the value of the start-time management counter is “7” and corresponds to the first winning opening detection sensor 42a, it is determined whether or not “1” is set in the first output flag. If the value of the start management counter is "6" and corresponds to the second winning opening detection sensor 43a, it is determined whether or not the second output flag is set to "1". If the value of the counter is "5" and corresponds to the third winning opening detection sensor 44a, it is determined whether or not the third output flag is set to "1". When it is “4” and corresponds to the special power detection sensor 45a, it is determined whether or not “1” is set in the fourth output flag, and the value of the start management counter is “3” and the first output flag is “3”. In the case of corresponding to the working port detection sensor 46a, the fifth output flag is set. It is determined whether or not "1" is set. If the value of the start-time management counter is "2" and corresponds to the second working port detection sensor 47a, "1" is set to the sixth output flag. It is determined whether or not the seventh output flag is set to “1” if the value of the start management counter is “1” and corresponds to the out port 24a. . As described above, “1” is set in the first to seventh output flags in the ball entry detection process (FIG. 15).

  If an affirmative determination is made in step S3503, the output flag corresponding to the value of the starting management counter is cleared to "0" (step S3504). Thereafter, the value of the number-of-discharges counter provided in the main RAM 65 is incremented by 1 (step S3505). The discharge number counter is a counter for specifying the total number of game balls discharged from the game area PA by the main CPU 63 in a situation where the management start flag of the main RAM 65 is not set to “1”.

  Thereafter, it is determined whether or not the value of the discharge number counter is equal to or more than the management start reference value (step S3506). Although the management start reference value is set to “300”, the present invention is not limited to this, and may be configured to be smaller than “300” or configured to be larger than “300”. .

  If a negative determination is made in step S3503, or if a negative determination is made in step S3506, the value of the start management counter of the main RAM 65 is decremented by one (step S3507). Then, it is determined whether or not the value of the start-time management counter after the subtraction of 1 is “0” (step S3508). When a negative determination is made in step S3508, the process returns to step S3503, and when an affirmative determination is made in step S3508, the output processing for management is ended as it is.

  On the other hand, if the value of the discharge number counter of the main RAM 65 is equal to or larger than the management start reference value (step S3506: YES), “1” is set to the management start flag of the main RAM 65 (step S3509). Thereafter, a management process is executed (step S3510). Also, when the management start flag is set to “1” and an affirmative determination is made in step S3501, the management process is also executed (step S3510). The processing content of the management process is the same as Steps S1001 to S1012 of the management output process (FIG. 25) in the first embodiment.

  According to the above configuration, the total number of game balls discharged from the game area PA after the supply of the operation power to the pachinko machine 10 is started (that is, after the supply of the operation power to the MPU 62 is started) is managed. Until the number corresponding to the start reference value or more is reached, the total number of game balls discharged from the game area PA is equal to or greater than the number corresponding to the management start reference value without storing history information in the history memory 117. In this case, the storage of the history information in the history memory 117 is started. At the shipping stage of the pachinko machine 10 or the like, the operation of the pachinko machine 10 may be checked before shipping. At that time, the game balls are put into each of the ball entry units, and the subsequent operation is checked. On the other hand, the history information is not stored in the history memory 117 until the total number of game balls discharged from the game area PA after the supply of the operating power to the pachinko machine 10 becomes equal to or more than the management start reference value. By doing so, it is possible to prevent the result of entering the ball at the time of the operation check as described above from being stored as history information.

  Here, until the total number of game balls discharged from the game area PA after the supply of the operation power to the pachinko machine 10 is started as described above is equal to or more than the number corresponding to the management start reference value, the history ball is used. In the configuration in which the history information is not stored in the memory 117, the management result of the game history during that period cannot be calculated. Therefore, in such a situation, the first to fourth notification display devices 201 to 204 may be configured to perform display corresponding to the situation. For example, in each of the first to fourth notification display devices 201 to 204, all the display segments may be set to emit light. Since the display content is not displayed either when displaying the management result of the game history or when displaying the changeable state in which the setting state of the pachinko machine 10 can be changed, By checking the first to fourth notification display devices 201 to 204, it is possible to specify whether or not the history information is not stored as described above.

  The setting mode of the information of the management start flag of the main RAM 65 differs depending on whether or not the setting state of the pachinko machine 10 can be changed after the supply of the operation power to the pachinko machine 10 is started. It is good also as a structure which does. FIG. 66 is a flowchart showing a main process according to another embodiment executed by the main CPU 63. In steps S3601 to S3609, the same processing as steps S101 to S109 of the main processing (FIG. 9) in the first embodiment is executed, and in steps S3611 to S3620, the main processing (FIG. The same processing as in steps S110 to S119 of 9) is executed. On the other hand, in the present alternative embodiment, if an affirmative determination is made in step S3608, the management start flag in the main RAM 65 is cleared to "0" (step S3610), and after executing the processing in step S3620, the management start flag in the main RAM 65 is cleared. Is set to "1" (step S3621). According to this configuration, when the processing for newly setting the setting state of the pachinko machine 10 is not executed, the total number of game balls discharged from the game area PA after the start of the supply of the operating power to the pachinko machine 10 Is not stored in the history memory 117 until the value of the pachinko machine 10 is equal to or greater than the management start reference value. When processing for newly setting the setting state of the pachinko machine 10 is executed, The history information is stored in the history memory 117 irrespective of the number of game balls discharged after the start of the supply of the operating power. This makes it possible to manage the game history immediately after starting the supply of the operation power to the pachinko machine 10 in a situation where there is a high possibility that the operation check does not correspond to the operation check of the pachinko machine 10 at the shipping stage.

  Further, the history information is stored in the history memory 117 until the total number of the game balls discharged from the game area PA after the supply of the operating power to the pachinko machine 10 is equal to or more than the management start reference value. Instead of the structure having no history memory 117, an area for storing history information until the total number of game balls reaches the management start reference value or more may be provided separately from the history memory 117. Thereby, it is possible to specify the management result of the game history in the situation.

  Further, the history information is stored in the history memory 117 until the total number of the game balls discharged from the game area PA after the supply of the operation power to the pachinko machine 10 is equal to or more than the management start reference value. A condition may be added as a condition for the occurrence of a situation where no supply of operating power to the pachinko machine 10 is started in a situation where history information is not stored in the history memory 117. In this case, when the supply of the operation power to the pachinko machine 10 is started in a situation where the history information is already stored in the history memory 117, the total number of the game balls discharged from the game area PA is determined as the management start reference. The history information is stored in the history memory 117 from the beginning irrespective of whether the value is equal to or greater than the value.

  Further, the history information is stored in the history memory 117 until the total number of the game balls discharged from the game area PA after the supply of the operation power to the pachinko machine 10 is equal to or more than the management start reference value. In addition to or instead of the configuration without the above, when an abnormal state such as a radio wave detection abnormality or a vibration detection abnormality occurs, the history information may not be stored in the history memory 117 until the abnormal state is released. This makes it possible to prevent the history information from being stored for an event that has occurred in a situation where the state is abnormal.

  Further, the history information is stored in the history memory 117 until the total number of game balls discharged from the game area PA after the supply of the operation power to the pachinko machine 10 is equal to or more than the management start reference value. In addition to or in place of the non-existing configuration, the history information may not be stored in the history memory 117 when the gaming machine body 12 or the front door frame 14 is open. As a result, it is possible to prevent the history information from being stored for an event that has occurred while the gaming machine body 12 or the front door frame 14 is open.

<Fifteenth embodiment>
This embodiment is different from the first embodiment in the execution subject of the processing for managing the game history. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

  In the first embodiment, the MPU 62 is provided with the management IC 66. However, in this embodiment, the MPU 62 is not provided with the management IC 66. Instead of providing the management IC 66, in the present embodiment, processing for managing the game history is executed by the main CPU 63. Further, in the present embodiment, the main CPU 63 executes various controls while distinguishing between specific control and non-specific control. Specifically, the control related to the management of the game history is non-specific control, and the control other than the non-specific control including the control for advancing the game based on the game operation by the player is the specific control.

  More specifically, the specific control includes all the controls by the main process (FIG. 9) executed when the supply of the operating power to the main CPU 63 is started. In the present embodiment, the recognition process (step S111), the data output process (step S112), and the setting value update signal output process (step S119) of the main process (FIG. 9) in the first embodiment are performed. Not executed. Also in the present embodiment, the timer interrupt process is executed periodically so as to interrupt the processes of steps S113 to S116 in the main process (FIG. 9). Among them, the processes other than the management process described later are all included in the specific control. Part of the management processing is also included in the specific control.

  FIG. 67 is an explanatory diagram for explaining a setting mode of programs and data in the main ROM 64. Corresponding to the fact that the control executed by the main CPU 63 is discriminated between the specific control and the non-specific control, as shown in FIG. The addresses of the areas where the data and the non-specific control program and the non-specific control data are stored are clearly distinguished.

  Specifically, programs for specific control are collectively stored in an area of each continuous address in the range of addresses X (1) to X (k + 2). Further, addresses X (k + 3) to X (k + 5) which are continuous with addresses X (1) to X (k + 2) are addresses of unused areas in which no data is stored. Data for specific control is collectively stored in the area of each continuous address in the range of k + 6) to X (m + 2). Addresses X (m + 3) to X (m + 5) which are continuous with addresses X (k + 6) to X (m + 2) are addresses of unused areas where no data is stored. Non-specific control programs are collectively stored in the area of each continuous address in the range of (m + 6) to X (n + 2). Further, addresses X (n + 3) to X (n + 5) which are continuous with addresses X (m + 6) to X (n + 2) are addresses of unused areas in which no data is stored, and subsequently, addresses X ( Data for non-specific control is collectively stored in the area of each continuous address within the range of (n + 6) to X (p + 2). The relationship between the program and the data and the address as described above is set in both the physical address in the main ROM 64 and the logical address on the memory map recognized by the main CPU 63.

  As described above, the program for specific control and data for specific control, and the program for non-specific control and data for non-specific control, regardless of the execution order of the processing for executing the corresponding control, Since the information is stored in the area of the address in the different range, for example, when checking only the program for specific control and the data for specific control, the address where the program for specific control and the data for specific control are stored It is sufficient to check only the area of the range. For example, when checking only the non-specific control program and the non-specific control data, the address where the non-specific control program and the non-specific control data are stored. You only need to check the area of the range. Therefore, it is possible to efficiently perform the work of checking the program and data separately for the specific control and the non-specific control. In addition, it is possible to efficiently perform the work of correcting the program and the data separately for the specific control and the non-specific control.

  Any data is stored between the address range of the area where the specific control program and the specific control data are stored and the address range of the area where the non-specific control program and the non-specific control data are stored. By setting an address range of an unused area that has not been set, it becomes easy to grasp the boundary between the address range for specific control and the address range for non-specific control at the time of a check operation.

  In each of the address range for the specific control and the address range for the non-specific control, the program and the data are stored in the address areas of the different ranges irrespective of the execution order of the processing for executing the corresponding control. By doing so, it is possible to efficiently perform the work of checking separately for programs and data. Further, since the address range of an unused area where no data is stored is set between the address range of the area where the program is stored and the address range of the area where the data is stored, It becomes easy to grasp the boundary between the address range and the data address range in the checking operation.

  FIG. 68 is an explanatory diagram for describing a setting mode of each area in the main RAM 65. Corresponding to the fact that the control executed by the main CPU 63 is distinguished between the specific control and the non-specific control, as shown in FIG. The address range of the stack area 222 for non-specific control and the address range of the work area 223 for non-specific control and the stack area 224 for non-specific control are clearly distinguished.

  Specifically, an area of each continuous address within the range of addresses Y (1) to Y (r + 2) is set as a work area 221 for specific control. Addresses Y (r + 3) to Y (r + 5) that are continuous with addresses Y (1) to Y (r + 2) are addresses of unused areas, and subsequently, addresses Y (r + 6) to Y (s + 2). The area of each continuous address within the range of ()) is set as the stack area 222 for specific control. Addresses Y (s + 3) to Y (s + 5) that are continuous with addresses Y (r + 6) to Y (s + 2) are addresses of unused areas, and subsequently, addresses Y (s + 6) to Y (t + 2). The area of each continuous address within the range of ()) is set as a work area 223 for non-specific control. Addresses Y (t + 3) to Y (t + 5) that are continuous from addresses Y (s + 6) to Y (t + 2) are addresses of unused areas, and subsequently, addresses Y (t + 6) to Y (u + 2). The area of each continuous address within the range of ()) is set as a stack area 224 for non-specific control. The relationship between each area and the address as described above is set in both the physical address in the main RAM 65 and the logical address on the memory map recognized by the main CPU 63.

  As described above, since the work area 221 for the specific control and the work area 223 for the non-specific control are separately set, the main CPU 63 executes the specific control and the non-specific control. Thus, when executing various calculations, different areas of the main RAM 65 are used. As a result, when one of the specific control and the non-specific control is executed, it is possible to make it difficult to cause an event that information required in the main RAM 65 is erased on the other. Incidentally, when writing information to each of the work areas 221 and 223 and reading information from each of the work areas 221 and 223, the main CPU 63 issues a load instruction.

  Since the stack area 222 for the specific control and the stack area 224 for the non-specific control are set separately, the main CPU 63 performs both the specific control and the non-specific control. Different areas of the main RAM 65 are used when saving the information stored in the register of the side CPU 63 and when storing the information of the return address in the program. Thus, when the information stored in the register of the main CPU 63 is saved in the situation where one of the specific control and the non-specific control is being executed, and when the information of the return address on the program is stored, the other is used. It is possible to make it difficult to cause an event that information to be deleted is erased. Incidentally, when writing information to each of the stack areas 222 and 224, a push command is performed by the main CPU 63, and when reading information from each of the stack areas 222 and 224, a pop command is performed by the main CPU 63. When reading information from each of the stack areas 222 and 224, the order of writing to the stack areas 222 and 224 is a target to be read first after the subsequent information.

  Here, when the main CPU 63 executes a process corresponding to the specific control, the main CPU 63 can write information into the work area 221 for the specific control and the stack area 222 for the specific control, Information can be read from the work area 221 for specific control and the stack area 222 for specific control. On the other hand, when the main CPU 63 executes the processing corresponding to the specific control, the main CPU 63 can read information from the work area 223 for non-specific control and the stack area 224 for non-specific control. It is not possible to write information to the work area 223 for non-specific control and the stack area 224 for non-specific control. This makes it possible to prevent the information used in the process corresponding to the non-specific control from being accidentally erased in the situation where the process corresponding to the specific control is being executed.

  When the main CPU 63 executes a process corresponding to the non-specific control, the main CPU 63 can write information into the work area 223 for the non-specific control and the stack area 224 for the non-specific control. At the same time, information can be read from the work area 223 for non-specific control and the stack area 224 for non-specific control. On the other hand, when the main CPU 63 executes the process corresponding to the non-specific control, the main CPU 63 can read information from the work area 221 for specific control and the stack area 222 for specific control, Writing information to the specific control work area 221 and the specific control stack area 222 is not possible. This makes it possible to prevent information used in the process corresponding to the specific control from being accidentally erased in the situation where the process corresponding to the non-specific control is being executed.

  The backup power is supplied to the main RAM 65 even after the pachinko machine 10 is turned off. The backup power is stored in the work area 221 for specific control, the stack area 222 for specific control, the non-specific control To the entire work area 223 and the stack area 224 for non-specific control. As a result, the information stored in the specific control work area 221, the specific control stack area 222, the non-specific control work area 223, and the non-specific control stack area 224 are stored in the power-off state of the pachinko machine 10. Even after that, the data is retained while the backup power is supplied.

  Next, the timer interrupt processing in the present embodiment executed by the main CPU 63 will be described with reference to the flowchart in FIG. The timer interrupt process is executed periodically (for example, every 4 milliseconds) in a state where the processes of steps S113 to S116 are being executed in the main process (FIG. 9), as in the first embodiment. The program corresponding to the timer interrupt process is set as a program for specific control.

  In steps S3701 to S3718, the same processes as those in steps S301 to S318 of the timer interrupt process (FIG. 11) in the first embodiment are executed. These processes are executed by the main CPU 63 using a program for specific control and data for specific control. In step S3719 in the timer interrupt process, a management process is executed. When the management process is executed, a subroutine program corresponding to the management process set in the specific control program is executed. The information for specifying the return address of the timer interrupt processing in is written into the stack area 222 for specific control by a push command. When the management process is completed, information for specifying the return address is read by the pop instruction, and the process returns to the timer interrupt processing program indicated by the return address.

  FIG. 70 is a flowchart showing the management process. The processing of steps S3801 to S3805 in the management processing is executed by the main CPU 63 using the specific control program and the specific control data.

  First, interrupt prohibition is set to prohibit the occurrence of the timer interrupt process (FIG. 69) (step S3801). This prevents a timer interrupt process (FIG. 69), which is a process corresponding to the specific control, from being interrupted and activated in the middle of a later-described management execution process, which is a process corresponding to the non-specific control. Becomes possible.

  After that, as “PUSH PSW”, the information of the flag register of the main CPU 63 is saved in the stack area 222 for specific control by a push command (step S3802). The flag register includes a carry flag, a zero flag, a P / V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution results of an operation instruction, a rotate instruction, an input / output instruction, and the like. By saving such flag register information before the subroutine program corresponding to the management execution process is started, the information of the flag register in a state before the subroutine call or the subroutine is changed after the start of the subroutine is changed. It is possible to evacuate the stack area 222 for specific control. The information amount of the flag register is 1 byte.

  Thereafter, the management execution process is started by reading out a subroutine program corresponding to the management execution process set in the non-specific control program (step S3803). In this case, information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for specific control by a push command. Then, when the management execution processing is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management processing program indicated by the return address.

  When the program returns to the management processing program after the execution of the management execution processing, the information of the flag register saved in the specific control stack area 222 in step S3802 by the pop instruction as “POP PSW” is used as the main CPU 63. (Step S3804). Thus, the information of the flag register of the main CPU 63 returns to the information at the time when step S3802 was executed. That is, the information in the flag register of the main CPU 63 returns to the information for executing the specific control.

  Thereafter, interrupt permission is set to switch from the state in which the generation of the timer interrupt processing (FIG. 69) is prohibited to the state in which the timer interrupt processing is permitted (step S3805). As a result, new execution of the timer interrupt processing becomes possible.

  FIG. 71 is a flowchart showing the management execution process. The processing of steps S3901 to S3915 in the management execution processing is executed by the main CPU 63 using the non-specific control program and the non-specific control data.

  First, as "LD SP, Y (u + 2)", Y (u + 2) is set as a fixed address at the start of the non-specific control in the stack pointer of the main CPU 63 by a load instruction (step S3901). The stack pointer is an area in which address information for specifying the storage area in the stack areas 222 and 224 to which information is to be written by the push command is specified by the main CPU 63. Each time a push instruction is performed, the information of the stack pointer is updated to the information of the address of the storage area to be written in the next order, and every time a pop instruction is performed, the information of the stack pointer is updated to the information of the previous order. Is updated to the information of the address of the storage area. When the non-specific control stack area 224 is used, information to be stored is stored from the storage area of the last address in the non-specific control stack area 224, and each time the information to be stored is added. Then, the storage area of the storage destination is changed toward the first address side in the stack area 224 for non-specific control. Therefore, in step S3901, the information of the last address in the non-specific control stack area 224 is set in the stack pointer. The storage of information from the storage area of the last address to the storage area of the first address is the same for the stack area 222 for specific control.

  Incidentally, in the case where a push instruction is additionally executed for both the stack area 222 for specific control and the stack area 224 for non-specific control even though information is set in all storage areas, All areas of the main RAM 65 are cleared to "0" assuming that an abnormality has occurred in the storage processing. This makes it possible to prevent the game from proceeding as it is despite the occurrence of an abnormality in the storage process.

After that, the information of the WA register of the main CPU 63 is saved in the WA buffer set in the work area 223 for non-specific control by a load instruction as “LD (_WABUF), WA” (step S3902). In addition, the information of the BC register of the main CPU 63 is saved in the BC buffer set in the non-specific control work area 223 by a load instruction as “LD (_BCBUF), BC” (step S3903). Also, "LD
(_DEBUF), DE ”, the information of the DE register of the main CPU 63 is saved in the DE buffer set in the work area 223 for non-specific control by a load instruction (step S3904). Also, the information of the HL register of the main CPU 63 is saved to the HL buffer set in the non-specific control work area 223 by a load instruction as “LD (_HLBUF), HL” (step S3905). In addition, the information of the IX register of the main CPU 63 is saved in the IX buffer set in the non-specific control work area 223 by a load instruction as “LD (_IXBUF), IX” (step S3906). Also, the information of the IY register of the main CPU 63 is saved to the IY buffer set in the non-specific control work area 223 by a load instruction as “LD (_IYBUF), IY” (step S3907).

  The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the flag registers described above. In this case, in step S3902 to step S3907, information of WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, Is saved in the corresponding buffer in the work area 223 for non-specific control. The information amount of each of the WA register, BC register, DE register, HL register, IX register, and IY register is 2 bytes.

  These WA register, BC register, DE register, HL register, IX register, and IY register are registers used in a check process (step S3908) corresponding to non-specific control. By saving the information set in such registers in the work area 223 for non-specific control prior to execution of the check processing (step S3908), the information of these registers used in the specific control is saved in the non-specific control. Can be evacuated before is started. Therefore, even if these registers are overwritten during the non-specific control, the information saved in the non-specific control work area 223 is returned to these registers when the non-specific control is terminated, so that the state of these registers is restored. Can be returned to a state corresponding to the specific control before the non-specific control is executed.

  Further, instead of saving all information of various general-purpose registers, auxiliary registers, and index registers to the work area 223 for non-specific control, the WA to be used in the check processing corresponding to the non-specific control is used. By selectively saving the information of the register, the BC register, the DE register, the HL register, the IX register, and the IY register to the work area 223 for non-specific control, the information of the register is saved in the work area 223 for non-specific control. This makes it possible to reduce the capacity to be secured. Therefore, it is possible to save the register information as described above while securing a large capacity of the non-specific control work area 223 that can be used in the check processing. Of course, among the various general-purpose registers, auxiliary registers, and index registers in the main CPU 63, registers other than the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register correspond to the non-specific control. The information set before the process to be performed is started is stored and held until the process corresponding to the non-specific control ends and the process corresponding to the specific control is restarted.

  Also, by saving the register information in the non-specific control work area 223 instead of in the non-specific control stack area 224, the capacity of the non-specific control stack area 224 can be reduced accordingly. It becomes possible. Further, when the stack area 224 for non-specific control is used, as described above, the information writing order is read first after the subsequent information, and thus the information reading order is temporarily shifted due to some kind of noise or the like. If this happens, all information of the subsequent reading order will be restored to a different register. The probability of occurrence of such an event increases as the amount of information saved in the non-specific control stack area 224 increases. On the other hand, by saving the register information to the non-specific control work area 223, it is possible to prevent the above-described event from occurring even when there is a large amount of information to be saved. .

  After executing the processing of steps S3902 to S3907, a check processing is executed (step S3908). When the check processing is executed, a subroutine program corresponding to the check processing set in the non-specific control program is executed. Information for specifying the return address of the execution processing is written to the non-specific control stack area 224 by the push command. When the check processing is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management execution processing program indicated by the return address. Details of the check processing will be described later.

  After executing the check processing, Y (r + α) is set as “LD SP, Y (r + α)” as a fixed address at the time of returning to the specific control in the stack pointer of the main CPU 63 by a load instruction (step S3909). ). The address of Y (r + α) is set as an address between Y (r + 8) and Y (s) in the stack area 222 for specific control.

  Immediately before the subroutine of the management execution process is executed in step S3803 of the management process (FIG. 70), the amount of information stored in the stack area 222 for specific control is always constant. The information of the stack pointer of the side CPU 63 (that is, the value of the stack pointer) is constant. In this case, the information stored in the specific control stack area 222 includes, for example, information on the return address of the management process (FIG. 70) after the management execution process (FIG. 71) ends, and the management process (FIG. 70). Information on the return address of the timer interrupt processing (FIG. 69) after the end of (FIG. 70). The certain information of the stack pointer is Y (r + α). Therefore, when the check process as the process corresponding to the non-specific control is completed and the process returns to the process corresponding to the specific control, the constant information Y (r + α) is set in the stack pointer of the main CPU 63. This makes it possible to restore the information of the stack pointer to the information immediately before the processing corresponding to the non-specific control is started. By setting the fixed information in the stack pointer in this way, by returning the information of the stack pointer to the information immediately before the processing corresponding to the non-specific control is started, the processing corresponding to the non-specific control is performed. It is not necessary to save the information of the stack pointer of the main CPU 63 corresponding to the specific control to the main RAM 65 before starting the process. Therefore, the processing load can be reduced, and it is not necessary to secure an area for the evacuation in the main RAM 65.

  After that, the information saved in the WA buffer of the non-specific control work area 223 is overwritten into the WA register of the main CPU 63 by a load instruction as “LD WA, (_WABUF)” (step S3910). In addition, the information saved in the BC buffer of the non-specific control work area 223 is overwritten in the BC register of the main CPU 63 as “LD BC, (_BCBUF)” by a load instruction (step S3911). In addition, the information saved in the DE buffer of the non-specific control work area 223 is overwritten in the DE register of the main CPU 63 as “LD DE, (_DEBUF)” by a load instruction (step S3912). Also, as the “LD HL, (_HLBUF)”, the information saved in the HL buffer of the non-specific control work area 223 is overwritten on the HL register of the main CPU 63 by a load instruction (step S3913). In addition, the information saved in the IX buffer of the non-specific control work area 223 is overwritten in the IX register of the main CPU 63 as “LD IX, (_IXBUF)” by a load instruction (step S3914). In addition, as the “LD IY, (_IYBUF)”, the information saved in the IY buffer of the non-specific control work area 223 is overwritten in the IY register of the main CPU 63 by a load instruction (step S3915). By executing the processing of steps S3910 to S3915, processing corresponding to the non-specific control of each information of the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register of the main CPU 63 is started. It is possible to return to the information corresponding to the specific control just before.

  Here, when the process corresponding to the non-specific control is executed, the information stored in the flag register and the various registers of the main CPU 63 is not saved in the main RAM 65 when the process corresponding to the specific control is restarted. . As a result, there is no need to secure storage areas for saving the information in the work area 221 for specific control and the stack area 222 for specific control.

  Further, when the processing corresponding to the non-specific control is executed, the information stored in the flag register and the various registers of the main CPU 63 indicates that the processing corresponding to the non-specific control after returning to the processing corresponding to the specific control. This information is not used when it is restarted. In other words, the information necessary for a plurality of times of the processing corresponding to the non-specific control executed with the processing corresponding to the specific control interposed therebetween is the work area 223 for the non-specific control or the stack area for the non-specific control. 224, and are not stored in the flag register and various registers of the main CPU 63. Therefore, even if the information stored in the flag register and various registers of the main CPU 63 is not saved in the main RAM 65 when the processing corresponding to the non-specific control is executed, the processing corresponding to the non-specific control is executed. No problem arises.

  Next, a check process executed by calling a subroutine program in step S3908 will be described. In the check process, a process for collecting information on the game history, a process for deriving a management result of the game history, and a process for notifying the management result are executed. In other words, the process for collecting the game history information, the process for deriving the management result of the game history, and the process for notifying the management result are executed as processes corresponding to the non-specific control.

  Prior to the description of the check processing, the contents of various areas 231 to 234 of the non-specific control work area 223 used for managing the game history will be described. FIG. 72 is an explanatory diagram for explaining various areas 231 to 234 of the non-specific control work area 223 used for managing the game history.

  The work area 223 for non-specific control includes a normal counter area 231, an open / close execution mode counter area 232, and a high frequency support mode counter area 233. In each of these areas 231 to 233, general winning counters 231a, 232a, 233a, special power winning counters 231b, 232b, 233b, first operation counters 231c, 232c, 233c, second operation counters 231d, 232d, 233d, and Out counters 231e, 232e, and 233e are provided. The general winning counters 231a, 232a, and 233a are counters for counting the number of game balls entering the general winning opening 31 from a predetermined measurement start timing. The special power prize counters 231b, 232b, 233b are counters for counting the number of game balls entering the special power prize device 32 from a predetermined measurement start timing. The first operation counters 231c, 232c, 233c are counters for measuring the number of game balls entering the first operation port 33 from a predetermined measurement start trigger. The second operation counters 231d, 232d, and 233d are counters for measuring the number of game balls entering the second operation port 34 from a predetermined measurement start trigger. The out counters 231e, 232e, 233e are counters for counting the number of game balls entering the out port 24a from a predetermined measurement start trigger.

  Each of the counters 231a to 231e of the normal counter area 231 is a target entry section 24a, which is a target in a situation where the front door frame 14 is in a closed state and is not in either the open / close execution mode or the high frequency support mode. It is used to measure the number of game balls entered in 31 to 34. Each of the counters 232a to 232e in the opening / closing execution mode counter area 232 enters the target ball entry section 24a, 31 to 34 in a situation where the front door frame 14 is in the closed state and in the opening / closing execution mode. It is used to measure the number of balls played. Each of the counters 233a to 233e in the high-frequency support mode counter area 233 is a target entry section 24a, 31 to 34 in a situation in which the front door frame 14 is in a closed state and in a high-frequency support mode. It is used to count the number of game balls that have entered the ball.

  Note that the situation where the front door frame 14 is in the open state is excluded from the measurement target because the game balls enter the ball entry units 24a and 31 to 34 with the front door frame 14 opened. This is for excluding the number of incoming balls in the case of being performed from the measurement target. However, the present invention is not limited to this, and a configuration in which the front door frame 14 is in an open state and a configuration in which the front door frame 14 is in a closed state may be a measurement target.

  In the work area 223 for non-specific control, an operation result storage area 234 is provided in addition to the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode counter area 233. The calculation result storage area 234 is an area for storing information of a management result of the game history calculated using the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode counter area 233. . The information on the management result of the game history stored in the calculation result storage area 234 is stored and held until the information on the management result of the game history is newly calculated and the newly calculated information is overwritten.

  FIG. 73 is a flowchart showing a check process executed by calling a subroutine program in step S3908. The processing of steps S4001 to S4008 in the check processing, including the processing of the subroutine, is executed by the main CPU 63 using the non-specific control program and the non-specific control data. When the processing of the subroutine is executed, the information of the return address after the execution of the processing of the subroutine is written to the storage area corresponding to the current value of the stack pointer of the main CPU 63 in the non-specific control stack area 224. At the same time, the value of the stack pointer is updated to the address information of the storage area to be stored in the next order. When the processing of the subroutine is completed, the information of the return address is read out from the storage area corresponding to the value of the current order of the stack pointer of the main CPU 63 and corresponds to the information of the return address. Upon returning to the program, the value of the stack pointer is updated to the information of the address of the storage area from which the information of the return address is read.

  In the checking process, when the front door frame 14 is in the open state (step S4001: YES), the normal ball entry management process (step S4004), the ball entry management process in the open / close execution mode (step S4005), and the high frequency The result calculation process (step S4007) and the display process (step S4008), which will be described later, are executed without executing any of the ball entry management processes (step S4006) in the support mode. Since the game area PA is formed by the space defined by the back surface of the window panel 52 provided on the front door frame 14 and the front surface of the game board 24, when the front door frame 14 is opened. Even if the game area PA is opened forward and a game ball is fired toward the game area PA in that situation, the game ball cannot flow down the game area PA normally. Further, the case where a game ball enters the ball entry portions 24a and 31 to 34 in a state where the front door frame 14 is in an open state is determined by a game hall manager for maintenance and elimination of trouble. This is a case where the front door frame 14 is in an open state and game balls enter due to maintenance or the like. Since such a ball entry of a game ball is not a ball entry of a game ball in a normal game execution situation, there is no need to manage such a ball entry of a game ball. Therefore, in the checking process, if the front door frame 14 is in the open state as described above, none of the processes in steps S4004 to S4006 is executed.

  If the front door frame 14 is in the closed state and is not in either the open / close execution mode or the high-frequency support mode (step S4001 to step S4003: NO), the normal ball entry management process is executed (step S4004). When the front door frame 14 is in the closed state and is in the open / close execution mode (step S4001: NO, step S4002: YES), a ball entry management process in the open / close execution mode is executed (step S4005). When the front door frame 14 is in the closed state and in the high-frequency support mode (step S4001: NO, step S4003: YES), the ball entry management process in the high-frequency support mode is executed (step S4006).

  FIG. 74 is a flowchart showing the normal ball entry management process in step S4004.

  When it is determined that one game ball is detected by the first winning opening detection sensor 42a (step S4101: YES), that is, the signal received from the first winning opening detection sensor 42a is switched from the LOW level to the HI level. When it is confirmed that the game has been changed, when it is determined that one game ball has been detected by the second winning opening detection sensor 43a (step S4103: YES), ie, the signal received from the second winning opening detection sensor 43a. Has been switched from the LOW level to the HI level, or when it has been determined that one game ball has been detected by the third winning opening detection sensor 44a (step S4105: YES), ie, the third winning opening When it is confirmed that the signal received from the detection sensor 44a has been switched from the LOW level to the HI level, the general input for normal operation is performed. The value of the counter 231a is incremented by 1 (step S4102, step S4104, step S4106).

  In the case of the ball entry management process in the opening / closing execution mode, the value of the general prize counter 232a for the opening / closing execution mode is incremented by 1 as a process corresponding to steps S4102, S4104, and S4106, and the entry in the high frequency support mode is performed. In the case of the ball management processing, the value of the general winning counter 233a for the high frequency support mode is incremented by 1 as processing corresponding to steps S4102, S4104 and S4106. Also, in the incoming ball detection process (step S3709) of the timer interrupt process (FIG. 69) executed as a process corresponding to the specific control, the detection results of the first to third winning opening detection sensors 42a to 44a are monitored. When it is determined that one of the first to third winning opening detection sensors 42a to 44a detects one game ball, a process for paying out the number of game balls corresponding to the general winning opening 31 is performed. Execute

  When it is determined that one game ball has been detected by the special power detection sensor 45a (step S4107: YES), it has been confirmed that the signal received from the special power detection sensor 45a has been switched from the LOW level to the HI level. In this case, the value of the normal special power winning counter 231b is incremented by 1 (step S4108).

  If the ball entry management process is in the opening / closing execution mode, the value of the special power winning counter 232b for the opening / closing execution mode is incremented by 1 as a process corresponding to step S4108, and if the ball entry management process is in the high frequency support mode. As a process corresponding to step S4108, the value of the special power winning counter 233b for the high frequency support mode is incremented by one. Also, the detection result of the special power detection sensor 45a is monitored in the ball detection process (step S3709) of the timer interrupt process (FIG. 69) executed as a process corresponding to the specific control. If it is determined that a game ball has been detected, a process for paying out the number of game balls corresponding to the special winning prize device 32 is executed, and a process for specifying an end timing of the round game is executed.

  When it is determined that one game ball is detected by the first operating port detection sensor 46a (step S4109: YES), that is, the signal received from the first operating port detection sensor 46a is switched from the LOW level to the HI level. If the change is confirmed, the value of the normal first operation counter 231c is incremented by 1 (step S4110).

  If the ball entry management process is in the open / close execution mode, the value of the first operation counter 232c for the open / close execution mode is incremented by 1 as a process corresponding to step S4110, and the ball entry management process is in the high frequency support mode. For example, as a process corresponding to step S4110, the value of the first operation counter 233c for the high frequency support mode is incremented by one. Also, in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as a process corresponding to the specific control, the detection result of the first operation port detection sensor 46a is monitored, and the first operation port detection sensor If it is determined at 46a that one game ball has been detected, a process for paying out the number of game balls corresponding to the first operation port 33 is executed, and at the same time, acquisition of special figure suspension information is performed. Execute the process to identify the trigger.

  When it is determined that one game ball is detected by the second operating port detection sensor 47a (step S4111: YES), that is, the signal received from the second operating port detection sensor 47a is switched from the LOW level to the HI level. When the change is confirmed, the value of the normal second operation counter 231d is incremented by 1 (step S4112).

  If the ball entry management process is in the open / close execution mode, the value of the second operation counter 232d for the open / close execution mode is incremented by 1 as a process corresponding to step S4112, and the ball entry management process is in the high frequency support mode. For example, as a process corresponding to step S4112, the value of the second operation counter 233d for the high frequency support mode is incremented by one. Also, in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as a process corresponding to the specific control, the detection result of the second operation port detection sensor 47a is monitored, and the second operation port detection sensor If it is determined at 47a that one game ball has been detected, a process for paying out the number of game balls corresponding to the second operating port 34 is executed and at the same time, the acquisition of the reservation information for the special figure Execute the process to identify the trigger.

  When it is determined that one game ball has been detected by the out-mouth detection sensor 48a (step S4113: YES), that is, the signal received from the out-mouth detection sensor 48a has been switched from the LOW level to the HI level. If confirmed, the value of the normal out counter 231e is incremented by 1 (step S4114).

  If the ball entry management process is in the open / close execution mode, the value of the open / close execution mode out counter 232e is incremented by 1 as a process corresponding to step S4114. As a process corresponding to S4114, the value of the out counter 233e for the high frequency support mode is incremented by one. Also, in the incoming ball detection process (step S3709) of the timer interrupt process (FIG. 69) executed as the process corresponding to the specific control, the detection result of the out-mouth detection sensor 48a is not monitored.

  By executing the processes of steps S4004 to S4006 as described above, the number of game balls entering the general winning opening 31 is measured using the general winning counters 231a, 232a, 233a, and the special electric winning device 32 The number of game balls entering the first operating port 33 is measured using the special power winning counters 231b, 232b, 233b, and the number of game balls entering the first operating port 33 is determined using the first operating counters 231c, 232c, 233c. The number of game balls entering the second operation port 34 is measured using the second operation counters 231d, 232d, 233d, and the number of game balls entering the out port 24a is determined by the out counter 231e. It is measured using 232e and 233e. This allows the main CPU 63 to grasp the history of the ball entry into each of the ball entry sections 24a and 31 to 34. Further, since the normal counter area 231, the open / close execution mode counter area 232, and the high-frequency support mode counter area 233 are separately provided, it is possible to determine whether the open / close execution mode or the high-frequency support mode is neither. The main CPU 63 can recognize the history of the ball entry to each of the ball entry units 24a and 31 to 34 by distinguishing between the situation of the open / close execution mode and the situation of the high frequency support mode.

  Returning to the description of the check processing (FIG. 73), when a positive determination is made in step S4001, when the processing in step S4004 is performed, when the processing in step S4005 is performed, or when the processing in step S4006 is performed, A result calculation process is executed in S4007, and a display process is executed in step S4008.

  FIG. 75 is a flowchart showing the result calculation processing in step S4007.

  First, it is determined whether or not “1” is set in the management start flag provided in the work area 223 for non-specific control (step S4201). The management start flag is a flag used by the main CPU 63 to specify whether or not it is a situation to collect the game history for calculating the management result of the game history. In the present embodiment, when the supply of operating power to the pachinko machine 10 is started for the first time after the manufacture of the pachinko machine 10 (that is, when the supply of operating power to the MPU 62 is started), the game discharged from the game area PA Until the total number of balls becomes equal to or more than the number corresponding to the management start reference value, the total number of game balls discharged from the game area PA without executing the collection of the game history for calculating the management result of the game history When the number is equal to or more than the number corresponding to the management start reference value, the collection of the game history for calculating the management result of the game history is executed. At the shipping stage of the pachinko machine 10 or the like, the operation of the pachinko machine 10 may be checked before shipping. At that time, the game balls are put into each of the ball entry units, and the subsequent operation is checked. On the other hand, a game for calculating the management result of the game history until the total number of the game balls discharged from the game area PA after the supply of the operation power to the pachinko machine 10 becomes equal to or more than the management start reference value. By not performing history collection, it is possible to prevent a result of entering a ball at the time of the operation check as described above from being collected as a game history for calculating a management result of the game history. Become.

  Here, when the supply of the operating power to the pachinko machine 10 is started for the first time after the manufacture of the pachinko machine 10 (that is, when the supply of the operating power to the MPU 62 is started), the value of the management start flag is “0”. It has become. In this case, the values of the counters 231a to 231e in the normal counter area 231, the values of the counters 232a to 232e in the open / close execution mode counter area 232, and the values of the counters 233a to 233e in the high frequency support mode counter area 233. Is also “0”. On the other hand, when the value of the management start flag is “1”, the supply of the operating power to the pachinko machine 10 is stopped, and then, when the backup power is supplied to the main RAM 65, the operating power to the pachinko machine 10 is Is started, the value of the management start flag remains “1”. In this case, the values of the counters 231a to 231e in the normal counter area 231, the values of the counters 232a to 232e in the open / close execution mode counter area 232, and the values of the counters 233a to 233e in the high frequency support mode counter area 233. Also, the state before the supply of the operating power to the pachinko machine 10 is stopped is maintained. With the above configuration, when the value of the management start flag is “0”, the value of each counter 231 a to 231 e of the normal counter area 231, the value of each counter 232 a to 232 e of the open / close execution mode counter area 232, Also, the values of the counters 233a to 233e of the counter area 233 for the high frequency support mode are also “0”.

  Incidentally, when the clear processing of the main RAM 65 is performed in step S105 or step S117 in the main processing (FIG. 9), the target of the clear processing is the work area 221 for specific control and the stack for specific control. The work area 223 for non-specific control and the stack area 224 for non-specific control are excluded from the target of the clear processing. Thus, the manager of the gaming hall cannot intentionally clear the work area 223 for non-specific control and the stack area 224 for non-specific control to “0”.

  In addition, the main CPU 63 confirms whether or not an abnormality has occurred in the non-specific control work area 223 and the non-specific control stack area 224 in a timer interrupt process (FIG. 69) to be described later. Is confirmed, the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". Thus, when an abnormality occurs in the work area 223 for non-specific control and the stack area 224 for non-specific control, initialization can be performed. In addition, when an abnormality occurs in the work area 223 for non-specific control in this configuration, the work area 223 for non-specific control is cleared to “0” without clearing the stack area 224 for non-specific control to “0”. When an abnormality occurs in the non-specific control stack area 224, the non-specific control work area 223 is cleared to "0" without clearing the non-specific control work area 223 to "0". Is also good. Further, even if an abnormality occurs in the work area 223 for non-specific control and the stack area 224 for non-specific control, the calculation result storage area 234 may be excluded from the target of “0” clear.

  If a negative determination is made in step S4201, the values of the respective counters 231a to 231e of the normal counter area 231, the values of the respective counters 232a to 232e of the open / close execution mode counter area 232, and the values of the high frequency support mode counter area 233 will be described. The total number is calculated by summing all the values of the counters 233a to 233e (step S4202). Then, it is determined whether or not the calculated total number is larger than the management start reference value “300” (step S4203).

  If an affirmative determination is made in step S4203, “1” is set to the management start flag of the work area 223 for non-specific control (step S4204). The counters 231a to 231e in the normal counter area 231, the counters 232a to 232e in the open / close execution mode counter area 232, and the counters 233a to 233e in the high frequency support mode counter area 233 are all cleared to "0". (Step S4205). As a result, after the supply of the operating power to the pachinko machine 10 is started (that is, after the supply of the operating power to the MPU 62 is started), the total number of game balls discharged from the game area PA is equal to the management start reference value. , All the information of the game history collected until the number of game histories becomes equal to or more than the number corresponding to. Therefore, the collection of the game history for calculating the management result of the game history until the total number of the game balls discharged from the game area PA becomes equal to or more than the management start reference value after the supply of the operation power to the pachinko machine 10 is started. Can be prevented from being executed.

  If an affirmative determination is made in step S4201, the calculation processing of the total number is executed in the same manner as in step S4202 (step S4206). That is, the values of the counters 231a to 231e of the normal counter area 231, the values of the counters 232a to 232e of the open / close execution mode counter area 232, and the values of the counters 233a to 233e of the high frequency support mode counter area 233 are set. The total number is calculated by summing all of them. Then, it is determined whether or not the calculated total number is equal to or larger than the calculation reference number “6000” (step S4207).

If an affirmative determination is made in step S4207, arithmetic processing of various parameters is performed (step S4208). Specifically, the values of the various counters 231a to 231e in the normal counter area 231 are K61 to K65, the values of the various counters 232a to 232e in the open / close execution mode counter area 232 are K71 to K75, When the values of the various counters 233a to 233e in the counter area 233 are K81 to K85, the following 61st to 68th parameters are calculated.
61st parameter: total number of game balls to be paid out (“K61 + K71 + K81” × “number of prize balls for prize to general prize port 31” + “K62 + K72 + K82” × “number of prize balls for prize to special electric prize device 32” + “K63 + K73 + K83” “× the number of winning balls for winning in the first operating port 33” + “K64 + K74 + K84” × “the number of winning balls for winning in the second operating port 34”) / total number of game balls ejected from the technique area PA ( Ratio of K61 + K62 + K63 + K64 + K65 + K71 + K72 + K73 + K74 + K75 + K81 + K82 + K83 + K84 + K85) 62nd parameter: Total payout number of game balls at normal time (K61 × “Number of prize balls for winning in general winning opening 31” + K62 × “Number of prize balls to special power prize device 32” “Number of prize balls for winning to the first operating port 33” + K64 × “Number of prize balls for winning to the second operating port 34”) / Total number of game balls ejected from the skill area PA in the normal state (K61 + K62 + K63 + K64 + K65) The 63rd parameter: the total number of game balls to be paid out in the opening / closing execution mode (K71 × “the number of prize balls for winning into the general winning opening 31” + K72 × “the number of prize balls for winning to the special power winning device 32” + K73 × “Number of winning balls for winning to the first operating port 33” + K74 × “Number of winning balls for winning to the second operating port 34”) / Total number of game balls ejected from the technique area PA in the open / close execution mode Ratio of (K71 + K72 + K73 + K74 + K75). Sixty-fourth parameter: Total payout number of game balls in high-frequency support mode (K81 × "Number of winning balls for winning in the general winning opening 31" + K82 x "Number of winning balls for winning in the special electric winning device 32" + K83 x "Number of winning balls for winning in the first operating opening 33" + K84 x "2nd operation Number of prize balls for winning in mouth 34) / Ratio of total number of game balls (K81 + K82 + K83 + K84 + K85) ejected from technique area PA in high-frequency support mode. 65th parameter: Total number of game balls in general winning port 31. The number of incoming balls (K61 + K71 + K81) / the total number of game balls ejected from the game area PA (K61 + K62 + K63 + K64 + K65 + K71 + K72 + K73 + K74 + K75 + K81 + K82 + K83 + K84 + K85). Proportion of the total number of game balls ejected from the area PA (K61 + K62 + K63 + K64 + K65 + K71 + K72 + K73 + K74 + K75 + K81 + K82 + K83 + K84 + K85) 67th parameter: (“K62 + K72 + K82” × “number of prize balls for winning a prize to the special power prize device 32” + “64 K2 for the prize ball for the special prize winning device” + “K” for the number of “K” and “K” for the number of “K” +2) Number of prize balls for winning a prize ”) / Total number of game balls paid out (“ K61 + K71 + K81 ”ד number of prize balls for winning a prize at the general winning opening 31 ”+“ K62 + K72 + K82 ”ד prize ball for prize to the special prize winning device 32 ” (Number of pieces) + “K63 + K73 + K83” × “number of prize balls for winning to the first working port 33” + “K64 + K74 + K84” × “number of prize balls for winning to the second working port 34”) / 68th parameter : “K62 + K72 + K82” × “the number of prize balls for winning in the special prize winning device 32” / the total number of game balls paid out (“K61 + K71 + K81” × “the number of prize balls for winning in the general winning opening 31” + “K62 + K72 + K82” × “special power” "Number of prize balls for winning in the prize device 32" + "K63 + K73 + K83" × "number of prize balls for winning in the first operating port 33" + "K64 + K74 + K84" × "number of prize balls for winning in the second operating port 34") Then, the 61st to 68th parameters calculated in step S4208 are overwritten in the calculation result storage area 234 (step S4209). In this case, the 61st to 68th parameters of the calculation result in the previous processing round already stored in the calculation result storage area 234 are deleted. Note that even when the supply of the operating power to the pachinko machine 10 is stopped, the backup power is supplied to the main RAM 65. Therefore, if the backup power is supplied to the pachinko machine 10, Even immediately after the start of the supply of the operating power, the calculation result storage area 234 stores information on the 61st to 68th parameters calculated before the supply of the operating power to the pachinko machine 10 is stopped.

  Thereafter, the counters 231a to 231e of the normal counter area 231, the counters 232a to 232e of the open / close execution mode counter area 232, and the counters 233a to 233e of the high frequency support mode counter area 233 are all cleared to "0". (Step S4210). As a result, when the 61st to 68th parameters are calculated, the game history information can be temporarily deleted at that time.

  Immediately after the management start flag is set to “1”, when the total number of game balls ejected from the game area PA is equal to or greater than a value obtained by subtracting the management start reference value from the calculation reference number, steps S4208 to S4208 are executed. The processing of step S4210 may be executed, and thereafter, when the total number of game balls ejected from the game area PA becomes equal to or greater than the calculation reference number, the processing of steps S4208 to S4210 may be executed.

  FIG. 76 is a flowchart showing the display processing of step S4008 in the check processing (FIG. 73).

  First, the value of the update timing counter provided in the work area 223 for non-specific control is decremented by 1 (step S4301). The update timing counter is a counter for specifying by the main CPU 63 that it is time to update the display content of the management result of the game history on the first to third notification display devices 69a to 69c. The main CPU 63 notifies the calculation results of the 61st to 68th parameters by controlling the display of the first to third notification display devices 69a to 69c. In this case, the information corresponding to the type of the parameter to be notified is displayed on the first notification display device 69a. Also, of the value obtained by multiplying the parameter to be notified by 100, the number corresponding to the tens place is displayed on the second notification display device 69b, and the number corresponding to the ones place is displayed on the third notification display. It is displayed on the device 69c. In the first to third notification display devices 69a to 69c, the displays corresponding to the calculation results of the 61st to 68th parameters are sequentially switched in a predetermined order, and are the display targets in the last order. After the calculation result of the 68th parameter is displayed, the calculation result of the 61st parameter to be displayed in the first order is displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is 10 seconds.

  Here, the calculation cycle of the 61st to 68th parameters in the main CPU 63 is a minimum of 60 minutes. On the other hand, the number of the 61st to 68th parameters is eight, and the period during which the calculation result of one parameter is continuously displayed is 10 seconds. Therefore, the 61st to 68th parameters calculated by the main CPU 63 are displayed at least once on the first to third notification display devices 69a to 69c.

  When the process of step S4301 is executed, the display contents of the first to third notification display devices 69a to 69c are updated by determining whether or not the value of the update timing counter after subtracting 1 is “0”. It is determined whether or not it is time to perform (step S4302). If an affirmative determination is made in step S4302, the value of the display target counter provided in the work area 223 for non-specific control is incremented by 1 (step S4303). Then, if the value of the display target counter after adding 1 exceeds the maximum value of “7” (step S4304: YES), the value of the display target counter is cleared to “0” (step S4305).

  The display target counter is a counter for the main CPU 63 to specify the type of parameter to be displayed on the first to third notification display devices 69a to 69c. The 61st to 68th parameters correspond one-to-one with the possible values of the display target counters “0” to “7”. For example, when the value of the display target counter is “0”, the 61st parameter which is the first display target is the display target of the first to third notification display devices 69a to 69c, and the value of the display target counter is “7”. In the case of, the 68th parameter which is the last display target is the display target of the first to third notification display devices 69a to 69c.

  When a negative determination is made in step S4304, or when the process of step S4305 is performed, the first notification display device 69a is displayed so that information corresponding to the type of parameter corresponding to the value of the display target counter is displayed. It controls (step S4306). Also, a parameter corresponding to the value of the display target counter is read from the calculation result storage area 234, the read parameter is multiplied by 100, and a number corresponding to the tens place is displayed on the second notification display device 69b, The number corresponding to the ones digit is displayed on the third notification display device 69c (step S4307).

  Here, a display IC is provided corresponding to each of the first to third notification display devices 69a to 69c. In step S4306, the main CPU 63 outputs display data to the display IC corresponding to the first notification display device 69a. In step S4307, the main CPU 63 outputs the display IC corresponding to the second notification display device 69b and the third notification. The display data is output to each of the display ICs corresponding to the display device 69c. These display ICs can store and hold display data when the operating power is supplied, and continuously display contents corresponding to the stored and held display data to the corresponding notification display devices 69a to 69c. Display. When the display data is changed by the main CPU 63, the display of the notification display devices 69a to 69c is changed to the display content corresponding to the changed display data. As a result, even after the management execution process (FIG. 71), which is the process corresponding to the non-specific control, ends and returns to the process corresponding to the specific control, the setting is performed in the execution status of the process corresponding to the non-specific control. The display corresponding to the display data is continued on the first to third notification display devices 69a to 69c.

  Thereafter, a value corresponding to 10 seconds is set as a value corresponding to the next update timing in the update timing counter of the work area 223 for non-specific control (step S4308).

  When the supply of the operating power to the main CPU 63 is started by executing the display processing as described above, the management result of the game history is displayed on the first to third notification display devices 69a to 69c. Is done. The display of the management result of the game history is performed irrespective of whether the game is continued or not, and the main control device 60 is opened from the front of the pachinko machine 10 by opening the gaming machine main body 12 with respect to the outer frame 11. This is performed regardless of whether it is visible. As described above, the display control of the first to third notification display devices 69a to 69c is performed regardless of the state of the game and the state of the pachinko machine 10, thereby the first to third notification display devices 69a. It is possible to simplify the processing configuration for controlling the display of .about.69c.

  According to the embodiment described in detail above, the following excellent effects can be obtained.

  The main RAM 65 is provided with a work area 221 for specific control and a stack area 222 for specific control, and a work area 223 for non-specific control and a stack area 224 for non-specific control. The work area 221 for the specific control and the stack area 222 for the specific control are provided when the processing corresponding to the specific control is executed by the main CPU 63 by using the specific control program and the specific control data. While the information can be stored and the information can be read out, a process corresponding to the non-specific control is executed by the main CPU 63 using the non-specific control program and the non-specific control data. In this case, the information can be read but the information cannot be stored. The work area 223 for non-specific control and the stack area 224 for non-specific control can store information and read information when processing corresponding to non-specific control is executed by the main CPU 63. On the other hand, when the process corresponding to the specific control is executed by the main CPU 63, the information can be read out but the information cannot be stored. Thus, the work area 221 for the specific control and the stack area 222 for the specific control are treated as dedicated storage areas for the processing corresponding to the specific control, and the work area 223 for the non-specific control and the stack area for the non-specific control are provided. 224 can be handled as a dedicated storage area for processing corresponding to non-specific control. Therefore, it is possible to make the storage destination of the information in the main RAM 65 clearly different between the process corresponding to the specific control and the process corresponding to the non-specific control. Therefore, it is possible to prevent information used in the other process from being erased when executing one of the process corresponding to the specific control and the process corresponding to the non-specific control.

  The process corresponding to the specific control includes a process for controlling the progress of the game, and the process corresponding to the non-specific control includes a process for managing the game history. As described above, the specific control work area 221 and the specific control stack area 222 are treated as dedicated storage areas for processing corresponding to the specific control, and the non-specific control work area 223 and the non-specific control Is handled as a dedicated storage area for processing corresponding to non-specific control. Thereby, when executing the process for controlling the progress of the game, information used in the process for managing the game history, for example, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode It is possible to prevent the information stored in the counter area 233 and the operation result storage area 234 from being rewritten.

  The main RAM 65 includes a normal counter area 231 for storing information for managing the game history, an open / close execution mode counter area 232, a high frequency support mode counter area 233, and a calculation result storage area 234. This makes it possible for the main CPU 63 to complete the processing for managing the game history. In addition, it is possible to prevent unauthorized access or unauthorized modification to the information of the game history and the information of various parameters calculated using the information of the game history.

  When the situation corresponding to the non-specific control is changed from the state performing the processing corresponding to the specific control to the situation where the processing corresponding to the non-specific control is performed, The information of the register is saved in the main RAM 65. Thereby, when the process corresponding to the non-specific control is executed, it is possible to prevent the information stored in the various registers of the main CPU 63 from being rewritten when executing the process corresponding to the specific control. Become. Further, when or after ending the processing corresponding to the non-specific control, the information saved in the main RAM 65 is restored to various registers of the main CPU 63. Thus, when the processing corresponding to the non-specific control is completed, it is possible to execute the processing corresponding to the specific control from the state of the various registers of the main CPU 63 before the processing corresponding to the non-specific control is performed. Become.

  When the situation corresponding to the non-specific control is changed from the situation where the processing corresponding to the specific control is executed, or when the situation corresponding to the processing corresponding to the non-specific control is executed, various registers of the main CPU 63 are used. Of the registers are saved in the main RAM 65. This makes it possible to reduce the storage capacity required to save the information of the register of the main CPU 63 in the main RAM 65.

  When the situation corresponding to the non-specific control is changed from the situation where the processing corresponding to the specific control is executed, or when the situation corresponding to the processing corresponding to the non-specific control is executed, various registers of the main CPU 63 are used. In the processing corresponding to the non-specific control, the information of the register in which information is to be stored is saved in the main RAM 65. Thereby, when the processing corresponding to the non-specific control is completed, it is possible to restart the processing corresponding to the specific control from the state of the register of the main CPU 63 before the execution of the processing corresponding to the non-specific control. In addition, it is possible to reduce the storage capacity required for saving the information of the register of the main CPU 63 in the main RAM 65.

  When the processing corresponding to the non-specific control is started, the information of the flag register of the main CPU 63 is saved in the stack area 222 for the specific control in the processing corresponding to the specific control, and the WA register, the BC register, Each information of the DE register, the HL register, the IX register, and the IY register is saved in the non-specific control work area 223 in the processing corresponding to the non-specific control. As a result, it is possible to perform the saving at a timing suitable for each piece of information stored in the various registers of the main CPU 63, and the processing for saving the information corresponds to the processing corresponding to the specific control and the processing corresponding to the non-specific control. It can be executed in a distributed manner with the processing.

  The flag register includes a carry flag, a zero flag, a P / V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution results of an operation instruction, a rotate instruction, an input / output instruction, and the like. In this case, the information of the flag register is saved to the specific control stack area 222 in the process corresponding to the specific control before the process corresponding to the non-specific control is started. Accordingly, it is possible to save the call of the subroutine corresponding to the non-specific control and the information of the flag register in a state before the change after the start of the subroutine to the stack area 222 for the specific control.

  By saving the information of the WA register, BC register, DE register, HL register, IX register, and IY register to the non-specific control work area 223 instead of the non-specific control stack area 224, The capacity of the stack area 224 for specific control can be reduced. Further, when the stack area 224 for non-specific control is used, the order of writing information is read first after the subsequent information. All subsequent reading order information will be restored to different registers. The probability of occurrence of such an event increases as the amount of information saved in the non-specific control stack area 224 increases. On the other hand, by saving the register information to the non-specific control work area 223, it is possible to prevent the above-described event from occurring even when there is a large amount of information to be saved. .

  The stack pointer of the main CPU 63 in a case where the processing corresponding to the non-specific control is changed from a state where the processing corresponding to the specific control is performed, or in a case where the processing corresponding to the non-specific control is performed. Is a fixed information, and the information of the stack pointer is not saved in the main RAM 65 at the start of the process corresponding to the non-specific control. As a result, it is not necessary to secure a capacity for saving the information of the stack pointer in the main RAM 65, so that the storage capacity of the main RAM 65 can be suppressed accordingly. Further, even in the configuration in which the information of the stack pointer is not saved as described above, when the situation corresponding to the processing corresponding to the non-specific control is changed from the state performing the processing corresponding to the specific control, or In the case where the corresponding processing is executed, the information of the stack pointer of the main CPU 63 is fixed information, so that the processing corresponding to the non-specific control can be performed without saving the information of the stack pointer as described above. When the processing is completed, it is possible to return to the information of the stack pointer before the processing corresponding to the non-specific control is started.

  Although the information of the flag register of the main CPU 63 is saved in the main RAM 65 in the process corresponding to the specific control when the process corresponding to the non-specific control is executed, the present invention is not limited to this. Instead, the information of the flag register may be saved to the main RAM 65 in the process corresponding to the non-specific control. In addition, after the process corresponding to the non-specific control is completed, the information is returned to the flag register of the main CPU 63 in the process corresponding to the specific control. However, the present invention is not limited to this. The information may be returned to the flag register in a process corresponding to the non-specific control.

  After the information of the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register of the main CPU 63 starts the processing corresponding to the non-specific control, the main CPU 63 executes the processing corresponding to the non-specific control. Although the configuration in which the information is saved in the side RAM 65 is not limited to this, the information in these registers may be saved in the main RAM 65 in a process corresponding to the specific control. Further, when the processing corresponding to the non-specific control is completed, the information is restored to the registers in the processing corresponding to the non-specific control. However, the present invention is not limited to this. The information may be returned to the register in a process corresponding to the specific control after the process corresponding to the non-specific control is completed.

<Sixteenth embodiment>
This embodiment is different from the fifteenth embodiment in the processing configuration of the management process. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

  FIG. 77 is a flowchart showing the management process according to the present embodiment executed by the main CPU 63. Note that the processing of steps S4401 to S4405 in the management processing is executed by the main CPU 63 using the specific control program and the specific control data.

  First, interrupt prohibition is set to prohibit the occurrence of the timer interrupt process (FIG. 69) (step S4401). This prevents a timer interrupt process (FIG. 69), which is a process corresponding to the specific control, from being interrupted and activated in the middle of a later-described management execution process, which is a process corresponding to the non-specific control. Becomes possible.

  After that, the information of the flag register of the main CPU 63 is saved in the PSW buffer set in the work area 221 for specific control by a load instruction as “LD (_PSWBUF), PSW” (step S4402). The flag register includes a carry flag, a zero flag, a P / V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution results of an operation instruction, a rotate instruction, an input / output instruction, and the like. By saving the information of the flag register before the subroutine program corresponding to the management execution process is started, the flag register in the state before being changed after the subroutine call or the start of the subroutine is changed. Information can be saved in the work area 221 for specific control.

  Thereafter, the management execution process is started by reading out a subroutine program corresponding to the management execution process set in the non-specific control program (step S4403). In this case, information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for specific control by a push command. Then, when the management execution processing is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management processing program indicated by the return address.

  When the program returns to the management processing program after the execution of the management execution processing, it is saved in the PSW buffer in the work area 221 for specific control in step S4402 by a load command as “LD PSW, (_PSWBUF)”. The information of the flag register is returned to the flag register of the main CPU 63 (step S4404). As a result, the information of the flag register of the main CPU 63 returns to the information at the time when step S4402 was previously executed. That is, the information in the flag register of the main CPU 63 returns to the information for executing the specific control.

  Thereafter, interruption permission is set to switch from the state in which the generation of the timer interruption processing (FIG. 69) is prohibited to the state in which the generation is permitted (step S4405). As a result, new execution of the timer interrupt processing becomes possible.

  According to the above configuration, the information of the flag register of the main CPU 63 immediately before switching from the specific control to the non-specific control is saved in the work area 221 for the specific control instead of the stack area 222 for the specific control. This makes it possible to save the information of the flag register while suppressing the capacity of the stack area 222 for specific control.

  Note that the PSW buffer in the work area 221 for specific control is secured as a dedicated area, but is not limited thereto, and may be configured as a shared area in which other information can be written. In other words, in the situation where the management processing is not executed, it is not necessary to save the information of the flag register of the main CPU 63 corresponding to the specific control, so that the predetermined processing is performed in the processing corresponding to the specific control in the situation where the management processing is not executed. It is also possible to use a shared area that is also used as a PSW buffer when performing arithmetic processing. In this case, the shared area is surely used to save the information of the flag register when executing the management processing, and therefore, as information other than the information of the flag register, before the management processing is executed. It is necessary to have a configuration in which unnecessary information is written in the shared area.

<Seventeenth embodiment>
This embodiment is different from the fifteenth embodiment in the configuration of the management execution process. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

  FIG. 78 is a flowchart showing the management execution process according to the present embodiment executed by the main CPU 63. The processing of steps S4501 to S4515 in the management execution processing is executed by the main CPU 63 using the non-specific control program and the non-specific control data.

  First, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, when the non-specific control is started by the load instruction, the stack pointer of the main CPU 63 is set to “LD SP, Y (u + 2)”. Is set as Y (u + 2) as the fixed address (step S4501).

  Thereafter, as a “PUSH WA”, the information of the WA register of the main CPU 63 is evacuated to the storage area corresponding to the current stack pointer information of the main CPU 63 in the non-specific control stack area 224 by a push command (step S4502). In this case, the information of the WA register is saved in the storage area corresponding to the fixed address set in the stack pointer of the main CPU 63 in step S4501. Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

  Thereafter, as a “PUSH BC”, the information of the BC register of the main CPU 63 is saved to the storage area corresponding to the current stack pointer information of the main CPU 63 in the non-specific control stack area 224 by a push instruction (step S4503). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

  Thereafter, as a “PUSH DE”, the information of the DE register of the main CPU 63 is saved to the storage area corresponding to the current stack pointer information of the main CPU 63 in the non-specific control stack area 224 by a push instruction (step S4504). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

  Thereafter, as a “PUSH HL”, the information of the HL register of the main CPU 63 is saved to a storage area corresponding to the current stack pointer information of the main CPU 63 in the non-specific control stack area 224 by a push command (step S4505). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

  Thereafter, as a “PUSH IX”, the information of the IX register of the main CPU 63 is saved to a storage area corresponding to the current stack pointer information of the main CPU 63 in the non-specific control stack area 224 by a push instruction (step S4506). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

  Thereafter, as a “PUSH IY”, the information of the IY register of the main CPU 63 is saved to the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 by a push instruction (step S4507). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

  After executing the processing of steps S4502 to S4507, a check processing is executed (step S4508). When executing the check processing, a subroutine program corresponding to the check processing set in the non-specific control program is executed. At the time of execution of the program of the subroutine, information for specifying the return address of the management execution process after execution of the check process is transmitted by the push instruction to the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control. Write to the storage area corresponding to the information. Then, when the check processing is completed, information for specifying the return address is read by a pop instruction, and the program returns to the management execution processing program indicated by the return address. The contents of the check processing are the same as in the fifteenth embodiment.

  After that, as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment, "LD SP, Y (r + α)" is used to return the stack pointer of the main CPU 63 to the specific control by the load instruction. Is set as Y (r + α) as the fixed address (step S4509). The address of Y (r + α) is set as an address between Y (r + 8) and Y (s) in the stack area 222 for specific control.

  Thereafter, the information saved in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 by the pop instruction is set as “POP IY”. It overwrites the IY register of the main CPU 63 (step S4510). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

  Thereafter, as a “POP IX”, the information saved by the pop instruction in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 is displayed. The IX register of the main CPU 63 is overwritten (step S4511). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

  Thereafter, the information saved in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 by the pop instruction as “POP HL”. The HL register of the main CPU 63 is overwritten (step S4512). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

  Thereafter, the information saved in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 by the pop instruction as “POP DE”. It overwrites the DE register of the main CPU 63 (step S4513). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

  Thereafter, as a “POP BC”, the information saved by the pop instruction in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 is displayed. It overwrites the BC register of the main CPU 63 (step S4514). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

  Thereafter, as a “POP WA”, the information saved by the pop instruction in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224. It overwrites the WA register of the main CPU 63 (step S4515). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

  By executing the processing of steps S4510 to S4515, processing corresponding to the non-specific control of the information of the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register of the main CPU 63 is started. To the information corresponding to the specific control immediately before.

  The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the flag registers. In this case, in step S4502 to step S4507, each of the information of the WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, In the stack area 224 for non-specific control. These WA register, BC register, DE register, HL register, IX register, and IY register are registers used in a check process (step S4508) corresponding to non-specific control. The information set in such registers is saved in the non-specific control stack area 224 prior to the execution of the check processing (step S4508), so that the information of these registers used in the specific control is stored in the non-specific control. Can be evacuated before is started. Therefore, even if these registers are overwritten during non-specific control, when the non-specific control ends, the information saved in the non-specific control stack area 224 is restored to these registers, so that the state of these registers is restored. Can be returned to a state corresponding to the specific control before the non-specific control is executed.

  In addition, instead of saving all information of various general-purpose registers, auxiliary registers, and index registers to the stack area 224 for non-specific control, a WA to be used in a check process corresponding to non-specific control is used. The information of the register, the BC register, the DE register, the HL register, the IX register, and the IY register is selectively saved in the stack area 224 for non-specific control, so that the information of the register is saved in the stack area 224 for non-specific control. It is possible to reduce the capacity to be ensured for this purpose. Therefore, it is possible to save the register information as described above while securing a large capacity of the non-specific control stack area 224 that can be used in the check processing.

<Eighteenth Embodiment>
This embodiment is different from the fifteenth embodiment in the configuration of the management execution process. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

  FIG. 79 is a flowchart showing the management execution process according to the present embodiment executed by the main CPU 63. The processing of steps S4601 to S4605 in the management execution processing is executed by the main CPU 63 using the non-specific control program and the non-specific control data.

  First, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, when the non-specific control is started by the load instruction, the stack pointer of the main CPU 63 is set to “LD SP, Y (u + 2)”. Is set as Y (u + 2) as the fixed address (step S4601).

  Thereafter, the information of all the registers of the main CPU 63 is saved in the ALL buffer set in the non-specific control work area 223 by a load instruction as “LD (_ALLBUF), ALL” (step S4602). Accordingly, not only the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register used in the check processing corresponding to the non-specific control, but also all the other registers including the other registers are used. The register information is collectively saved in the ALL buffer of the work area 223 for non-specific control. In this manner, by saving all the registers of the main CPU 63 to the work area 223 for non-specific control, it is not necessary to selectively save the information of the registers of the main CPU 63.

  Here, the register to be saved includes a flag register. The information of the flag register is saved in the stack area 222 for specific control in step S3802 of the management process (FIG. 70), but the information of the flag register is saved in the work area 223 for non-specific control in step S4602. Is done. This eliminates the need to selectively save the register information of the main CPU 63, including the flag register information. Even if the information of the flag registers is saved as described above, even after the management execution processing is completed, the main CPU 63 is removed from the special control stack area 222 in step S3804 of the management processing (FIG. 70). Of the flag register of the main CPU 63 can be returned to the state immediately before the execution of the management execution process when returning to the process corresponding to the specific control. Becomes

  Thereafter, a check process is performed (step S4603). When executing the check processing, a subroutine program corresponding to the check processing set in the non-specific control program is executed. At the time of execution of the program of the subroutine, information for specifying the return address of the management execution process after execution of the check process is transmitted by the push instruction to the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control. Write to the storage area corresponding to the information. Then, when the check processing is completed, information for specifying the return address is read by a pop instruction, and the program returns to the management execution processing program indicated by the return address. The contents of the check processing are the same as in the fifteenth embodiment.

  After that, as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment, when the load instruction returns to the stack pointer of the main CPU 63 to return to the specific control, as in step S3909. Is set as Y (r + α) as the fixed address (step S4604). The address of Y (r + α) is set as an address between Y (r + 8) and Y (s) in the stack area 222 for specific control.

  After that, the information saved in the ALL buffer of the non-specific control work area 223 is overwritten in the register corresponding to each of the main CPUs 63 as “LD ALL, (_ALLBUF)” by a load instruction (step S4605). This makes it possible to return the information of all the registers of the main CPU 63 to the information corresponding to the specific control immediately before the processing corresponding to the non-specific control is started.

  According to the above configuration, the information of the register of the main CPU 63 is not saved in the non-specific control stack area 224 but in the non-specific control work area 223, so that the non-specific control stack area is reduced accordingly. 224 can be kept small. Further, when the stack area 224 for non-specific control is used, the order of writing information is read first after the subsequent information. All subsequent reading order information will be restored to different registers. The probability of occurrence of such an event increases as the amount of information saved in the non-specific control stack area 224 increases. On the other hand, by saving the register information to the non-specific control work area 223, it is possible to prevent the above-described event from occurring even when there is a large amount of information to be saved. .

  When the information of the register of the main CPU 63 is saved in the work area 223 for non-specific control, a WA register, a BC register, a DE register, and an HL register used in a check process which is a process corresponding to the non-specific control. , IX register and IY register, and information of all registers including other registers are collectively saved in the ALL buffer of the work area 223 for non-specific control. In this manner, by saving all the registers of the main CPU 63 to the work area 223 for non-specific control, it is not necessary to selectively save the information of the registers of the main CPU 63.

  Although the information of all the registers of the main CPU 63 is saved in the main RAM 65 in the processing corresponding to the non-specific control after the processing corresponding to the non-specific control is started, the present invention is not limited to this. Instead, the information of all registers may be saved in the main RAM 65 in the processing corresponding to the specific control. Also, when the processing corresponding to the non-specific control is completed, the information is restored to all the registers in the processing corresponding to the non-specific control. However, the present invention is not limited to this. May be performed in a process corresponding to the specific control after the process corresponding to the non-specific control ends.

<Nineteenth Embodiment>
This embodiment is different from the fifteenth embodiment in the configuration of the management execution process. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

  FIG. 80 is a flowchart showing the management execution process according to the present embodiment executed by the main CPU 63. Note that the processes of steps S4701 to S4706 in the management execution process are executed by the main CPU 63 using the non-specific control program and the non-specific control data.

  First, as “LD (_SPBUF), SP”, the information of the stack pointer of the main CPU 63 is saved in the SP buffer set in the non-specific control work area 223 by a load instruction (step S4701). As a result, the information of the stack pointer corresponding to the specific control immediately before the processing corresponding to the non-specific control is started is saved in the work area 223 for the non-specific control.

  Thereafter, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, the load instruction causes the stack pointer of the main CPU 63 to start the non-specific control as “LD SP, Y (u + 2)”. (Y + 2) is set as the fixed address in (Step S4702).

  Thereafter, as a “PUSH ALL”, the information of all the registers of the main CPU 63 is transferred from the storage area corresponding to the current stack pointer information of the main CPU 63 in the non-specific control stack area 224 and the storage area by a push instruction. It is evacuated to a continuous storage area (step S4703). In this case, since the information of all the registers of the main CPU 63 cannot be stored in one storage area of the non-specific control stack area 224, the current state of the main CPU 63 in the non-specific control stack area 224 is as described above. The storage area corresponding to the information of the stack pointer and the storage area continuous from the storage area are set as save destinations of the register information. Also, the information of the stack pointer of the main CPU 63 is updated to the address information of the storage area to be written in the next order in the storage area storing the last information when the information of all registers is saved.

  Thereafter, a check process is performed (step S4704). When executing the check processing, a subroutine program corresponding to the check processing set in the non-specific control program is executed. At the time of execution of the program of the subroutine, information for specifying the return address of the management execution process after execution of the check process is transmitted by the push instruction to the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control. Write to the storage area corresponding to the information. Then, when the check processing is completed, information for specifying the return address is read by a pop instruction, and the program returns to the management execution processing program indicated by the return address. The contents of the check processing are the same as in the fifteenth embodiment.

  After that, as a “POP ALL”, a pop instruction instructs the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 and the information saved to a continuous storage area from the storage area. Is overwritten in the register corresponding to each of the main CPUs 63 (step S4705). This makes it possible to restore the information of all the registers of the main CPU 63 to the information corresponding to the specific control immediately before the processing corresponding to the non-specific control is started.

  Thereafter, the information saved in the SP buffer of the non-specific control work area 223 is overwritten on the stack pointer of the main CPU 63 as “LD SP, (_SPBUF)” by a load instruction (step S4706). As a result, the information of the stack pointer of the main CPU 63 returns to the information corresponding to the specific control immediately before the processing corresponding to the non-specific control is started.

  According to the above configuration, when the information of the register of the main CPU 63 is saved in the stack area 224 for non-specific control, the WA register, the BC register, and the DE register used in the check processing corresponding to the non-specific control are used. Not only the registers, the HL register, the IX register, and the IY register, but also the information of all the registers, including other registers, are saved collectively in the non-specific control stack area 224. In this manner, by saving all the registers of the main CPU 63 to the non-specific control stack area 224, it is not necessary to selectively save the information of the registers of the main CPU 63.

  The information of the stack pointer corresponding to the specific control immediately before the processing corresponding to the non-specific control is started is saved in the work area 223 for the non-specific control. Accordingly, even if the information of the stack pointer corresponding to the specific control immediately before the process corresponding to the non-specific control is changed, the process corresponding to the non-specific control is completed and the specific control is performed. When returning to the corresponding process, the information of the stack pointer of the main CPU 63 can be returned to the information corresponding to the specific control immediately before the process corresponding to the non-specific control is started.

  Although the information of all the registers of the main CPU 63 is saved in the main RAM 65 in the processing corresponding to the non-specific control after the processing corresponding to the non-specific control is started, the present invention is not limited to this. Instead, the information of all registers may be saved in the main RAM 65 in the processing corresponding to the specific control. Also, when the processing corresponding to the non-specific control is completed, the information is restored to all the registers in the processing corresponding to the non-specific control. However, the present invention is not limited to this. May be performed in a process corresponding to the specific control after the process corresponding to the non-specific control ends.

<Twentieth embodiment>
This embodiment is different from the fifteenth embodiment in the processing configuration of the management process and the management execution process. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

  FIG. 81 is a flowchart showing a management process according to the present embodiment executed by the main CPU 63. The processing of steps S4801 to S4811 in the management processing is executed by the main CPU 63 using the specific control program and the specific control data.

  First, interrupt prohibition is set to prohibit occurrence of the timer interrupt process (FIG. 69) (step S4801). This prevents a timer interrupt process (FIG. 69), which is a process corresponding to the specific control, from being interrupted and activated in the middle of a later-described management execution process, which is a process corresponding to the non-specific control. Becomes possible.

  Thereafter, as a “PUSH PSW”, the information of the flag register of the main CPU 63 is saved in the stack area 222 for specific control by a push command (step S4802). The flag register includes a carry flag, a zero flag, a P / V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution results of an operation instruction, a rotate instruction, an input / output instruction, and the like. By saving the information of the flag register before the subroutine program corresponding to the management execution process is started, the flag register in the state before being changed after the subroutine call or the start of the subroutine is changed. Information can be saved in the stack area 222 for specific control.

  Thereafter, the WA register of the main CPU 63 is cleared to "0" by a load instruction as "LD WA, 0" (step S4803). Further, the BC register of the main CPU 63 is cleared to "0" by a load instruction as "LD BC, 0" (step S4804). In addition, the DE register of the main CPU 63 is cleared to "0" by a load instruction as "LD DE, 0" (step S4805). Further, the HL register of the main CPU 63 is cleared to "0" by a load instruction as "LD HL, 0" (step S4806). Also, the IX register of the main CPU 63 is cleared to "0" by a load instruction as "LD IX, 0" (step S4807). In addition, the IY register of the main CPU 63 is cleared to "0" by a load instruction as "LD IY, 0" (step S4808).

  The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the flag registers. In this case, in steps S4803 to S4808, the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register, which are some of the various general-purpose registers, the auxiliary registers, and the index registers, are used. Clear "0". These WA register, BC register, DE register, HL register, IX register, and IY register are registers used in the check processing (step S4902) corresponding to the non-specific control. By clearing such registers to “0” prior to execution of management execution processing (step S4809), which is processing corresponding to non-specific control, the state of these registers can be changed before processing corresponding to non-specific control is started. In addition, it is possible to set the state immediately after the supply of the operating power to the main CPU 63 is started.

  The information of the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register before the processing corresponding to the non-specific control starts after the processing corresponding to the non-specific control ends. This is unnecessary information in the process corresponding to the specific control. Therefore, even if the information in these registers is cleared to “0” without being saved, no problem occurs in the processing corresponding to the specific control that has been restored after the processing corresponding to the non-specific control has been completed.

  After executing the processes of steps S4803 to S4808, the management execution process is started by reading out a subroutine program corresponding to the management execution process set in the non-specific control program (step S4809). In this case, information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for specific control by a push command. Then, when the management execution processing is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management processing program indicated by the return address.

  When the program returns to the management process after the execution of the management execution process, the information of the flag register saved in the specific control stack area 222 in step S4802 by the pop command as “POP PSW” is used as the main CPU 63. (Step S4810). As a result, the information of the flag register of the main CPU 63 returns to the information at the time when step S4802 was executed last time. That is, the information in the flag register of the main CPU 63 returns to the information for executing the specific control.

  Thereafter, interruption permission is set to switch from the state in which the generation of the timer interrupt processing (FIG. 69) is prohibited to the state in which the generation is permitted (step S4811). As a result, new execution of the timer interrupt processing becomes possible.

  FIG. 82 is a flowchart showing the management execution process according to the present embodiment executed by the main CPU 63. The processing of steps S4901 to S4909 in the management execution processing is executed by the main CPU 63 using a non-specific control program and non-specific control data.

  First, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, “LD SP, Y (u + 2)” is set to the stack pointer of the main CPU 63 at the start of the non-specific control by the load instruction. Y (u + 2) is set as the fixed address (step S4901).

  Thereafter, a check process is performed (step S4902). When the check processing is executed, a subroutine program corresponding to the check processing set in the non-specific control program is executed. Information for specifying the return address of the execution processing is written to the non-specific control stack area 224 by the push command. When the check processing is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management execution processing program indicated by the return address. The contents of the check processing are the same as in the fifteenth embodiment.

  Then, the WA register of the main CPU 63 is cleared to "0" by a load instruction as "LD WA, 0" (step S4903). Further, the BC register of the main CPU 63 is cleared to "0" by a load instruction as "LD BC, 0" (step S4904). Further, the DE register of the main CPU 63 is cleared to "0" by a load instruction as "LD DE, 0" (step S4905). Further, the HL register of the main CPU 63 is cleared to "0" by a load instruction as "LD HL, 0" (step S4906). In addition, the IX register of the main CPU 63 is cleared to "0" by a load instruction as "LD IX, 0" (step S4907). In addition, the IY register of the main CPU 63 is cleared to "0" by a load instruction as "LD IY, 0" (step S4908).

  The WA register, the BC register, the DE register, the HL register, the IX register, and the IY register are registers used in the check processing (step S4902) corresponding to the non-specific control as described above. By clearing such registers to “0” before returning from the processing corresponding to the non-specific control to the processing corresponding to the specific control, the state of these registers can be changed before returning to the processing corresponding to the specific control. It is possible to set a state immediately after the supply of the operating power to the side CPU 63 is started.

  Further, the information of the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register before the process corresponding to the specific control is started is not specified after the process corresponding to the specific control is completed. This is unnecessary information in the processing corresponding to the control. Therefore, even if the information in these registers is cleared to “0” without being saved, no problem occurs in the processing corresponding to the non-specific control that has been restored after the processing corresponding to the specific control has been completed.

  After that, as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment, when the load instruction returns to the stack pointer of the main CPU 63 to return to the specific control, as in step S3909. Is set as Y (r + α) (step S4909). The address of Y (r + α) is set as an address between Y (r + 8) and Y (s) in the stack area 222 for specific control.

  According to the above configuration, when the process corresponding to the non-specific control is started from the situation where the process corresponding to the specific control is being executed, the WA register, the BC register, the DE register, the HL register, and the IX register of the main CPU 63 are provided. And IY registers are cleared to “0”. As a result, there is no need to save the information of these registers to the main RAM 65. Therefore, there is no need to secure a capacity for saving these pieces of information.

  Also, when returning from the situation in which the process corresponding to the non-specific control is being executed to the process corresponding to the specific control, the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register of the main CPU 63 are reset. This is a configuration in which “0” is cleared. Thus, when returning to the processing corresponding to the specific control, it is possible to return the state of each of these registers to the state immediately before the processing corresponding to the non-specific control is started.

  The state in which the registers are cleared to “0” is a state in which the supply of the operating power to the MPU 62 is started. This makes it possible to simplify the processing configuration for setting each of the registers to a predetermined state when starting the processing corresponding to the non-specific control and when returning to the processing corresponding to the specific control. .

  When starting the process corresponding to the non-specific control and when returning to the process corresponding to the specific control, the registers to be cleared to “0” are some of the registers of the main CPU 63. This makes it possible to reduce the processing load for setting each of the registers to a predetermined state when starting the process corresponding to the non-specific control and when returning to the process corresponding to the specific control.

  In a configuration in which the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register are cleared to “0” when starting the process corresponding to the non-specific control and when returning to the process corresponding to the specific control, Other registers are not cleared to “0”. This makes it possible to prevent information necessary for the process corresponding to the specific control from being deleted at the start of the process corresponding to the non-specific control.

  Further, information of registers other than the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register is not saved in the main RAM 65 at the start of the process corresponding to the non-specific control. As a result, there is no need to secure an area for saving such information in the main RAM 65.

  The information of the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register of the main CPU 63 before the processing corresponding to the non-specific control is started after the processing corresponding to the non-specific control ends. This information is not used in the process corresponding to the specific control. Thereby, even if the above-described registers are cleared to “0” when the process corresponding to the non-specific control is started, the specific control is performed after the process corresponding to the non-specific control is completed. It is possible not to affect the processing.

  Note that instead of the configuration in which the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register of the main CPU 63 are cleared to “0” in steps S4803 to S4808 in the management process (FIG. 81), A configuration in which a register is initialized may be employed. That is, when the supply of the operating power to the MPU 62 is started, after the registers of the main CPU 63 are once cleared to “0”, the information of each register is set to the initial state. In step S4808, each register may be set so as to be in the initial state. In this case, the configuration of each register is set so as to be in the initial state also in steps S4903 to S4908, so that when returning to the process corresponding to the specific control, the state of each register is not specified. It is possible to return to the state immediately before the processing corresponding to the control is started.

  Instead of the configuration in which the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 are cleared to “0” in steps S4803 to S4808 in the management process (FIG. 81), A configuration in which “1” is set in all the registers may be adopted. In this case, also in steps S4903 to S4908, when returning to the processing corresponding to the specific control by setting "1" to all of the registers, the state of each register is changed to the processing corresponding to the non-specific control. Can be returned to the state immediately before the start of the operation.

  Further, when the processing corresponding to the non-specific control is executed, the information of the flag register of the main CPU 63 is saved in the main RAM 65 in the processing corresponding to the specific control. However, the present invention is not limited to this. Alternatively, the information of the flag register may be saved in the main RAM 65 in the process corresponding to the non-specific control. In addition, after the process corresponding to the non-specific control is completed, the information is returned to the flag register of the main CPU 63 in the process corresponding to the specific control. However, the present invention is not limited to this. The information may be returned to the flag register in a process corresponding to the non-specific control.

  The process of clearing the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register of the main CPU 63 to “0” is a process corresponding to the specific control before the process corresponding to the non-specific control is started. However, the present invention is not limited to this, and the process of clearing these registers to “0” may be performed by a process corresponding to the non-specific control. Further, when the process corresponding to the non-specific control is completed, the process of clearing each register to “0” is performed in the process corresponding to the non-specific control. However, the present invention is not limited to this. The process of clearing each register to “0” may be performed in a process corresponding to the specific control after the process corresponding to the non-specific control is completed.

  In the management process (FIG. 81), the process of “PUSH PSW” in step S4802 is executed before setting “0” in each register in steps S4803 to S4808. The “PUSH PSW” process in step S4802 is executed after setting “0” in each register in steps S4803 to S4808 and before the subroutine program corresponding to the management execution process is read in step S4809. May be adopted. This makes it possible to save the information of the flag register after being changed by the load instruction in steps S4803 to S4808 to the stack area 222 for specific control.

<Twenty-first embodiment>
This embodiment is different from the fifteenth embodiment in the configuration for collecting game history information. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

  FIG. 83 is an explanatory diagram for describing an electrical configuration in the present embodiment.

  The MPU 62 is provided with a main CPU 63, a main ROM 64, and a main RAM 65 as in the fifteenth embodiment. Further, unlike the fifteenth embodiment, the MPU 62 is electrically connected to the management RAM 241. That is, the management RAM 241 is provided separately from the main RAM 65 incorporated in the MPU 62, and the management RAM 241 is externally attached to the MPU 62.

  As in the fifteenth embodiment, the main RAM 65 is provided with a work area 221 for specific control, a stack area 222 for specific control, a work area 223 for non-specific control, and a stack area 224 for non-specific control. ing. Therefore, when the main CPU 63 executes the processing corresponding to the specific control by using the specific control program and the specific control data in the main ROM 64, the work area 221 for the specific control in the main RAM 65 and When the main CPU 63 executes the processing corresponding to the non-specific control using the non-specific control program and the non-specific control data in the main ROM 64 using the stack area 222 for the specific control. A work area 223 for non-specific control and a stack area 224 for non-specific control in the main RAM 65 are used.

  The management RAM 241 includes a normal counter area 231, an open / close execution mode counter area 232, a high frequency support mode counter area 233, and a calculation result storage area 234. The contents of these areas 231 to 234 are the same as in the fifteenth embodiment. Also in the present embodiment, a management execution process including a check process is executed as a process corresponding to the non-specific control in the main CPU 63. In the check process, the game history is collected through the updating of the normal counter area 231, the open / close execution mode counter area 232, and the high-frequency support mode counter area 233, as in the fifteenth embodiment. The 61st to 68th parameters calculated using the collected game histories are written to the calculation result storage area 234. That is, the management RAM 241 is used when the main CPU 63 executes a process corresponding to the non-specific control, and the management RAM 241 is used as a work area for the non-specific control.

  When the game history is collected and the 61st to 68th parameters are calculated using the collected history information, the work area 223 for non-specific control and the stack area 224 for non-specific control of the main RAM 65 are used. Used as appropriate.

  According to the above configuration, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, and the operation result storage area 234 are provided in the management RAM 241 external to the MPU 62. This makes it possible to store the collected game history information without increasing the necessary storage capacity in the non-specific control work area 223 in the main RAM 65, and to utilize the game history. The calculated 61st to 68th parameters can be stored. Further, it is possible to increase the storage capacity for storing game history information while using the general-purpose MPU 62.

  When collecting the game history and calculating the 61st to 68th parameters using the collected history information, the work area 223 for non-specific control and the stack area 224 for non-specific control of the main RAM 65 are appropriately used. Is done. This makes it possible to prevent the processing speed in executing the processing related to the history information from being extremely reduced.

  In addition to or instead of the configuration in which the management RAM 241 is provided with the normal counter area 231, the open / close execution mode counter area 232, the high-frequency support mode counter area 233, and the calculation result storage area 234, the first embodiment is described. A configuration in which a storage area corresponding to the history memory 117 in a mode or the like is set may be used. In this case, it is necessary to increase the storage capacity required to store the history information, but the management RAM 241 external to the MPU 62 is used as storage means for storing the history information. Therefore, it is possible to flexibly cope with an increase in storage capacity.

<Twenty-second embodiment>
In the present embodiment, the processing configuration executed by the main CPU 63 is different from that of the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

  FIG. 84 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. The processing of steps S5001 to S5019 in the main processing is executed by the main CPU 63 using the specific control program and the specific control data.

  First, power-on wait processing is executed (step S5001). In the power-on wait process, for example, the process waits without advancing to the next process until a predetermined time for wait (specifically, one second) elapses after the main process is started. In the execution period of the power-on wait processing, the operation start and the initial setting of the symbol display device 41 are completed. Thereafter, access to the main RAM 65 is permitted (step S5002).

  Thereafter, it is determined whether or not the reset button 68c has been pressed (step S5003), and whether or not the setting key insertion section 68a has been turned on using the setting key (step S5004). It is determined whether or not the front door frame 14 is open with respect to 13 (step S5005), and it is determined whether or not the gaming machine main body 12 is open with respect to the outer frame 11 (step S5006).

  In this embodiment, a front door opening sensor 95 for detecting whether or not the front door frame 14 is in an open state with respect to the inner frame 13 is electrically connected to the main CPU 63. The detection result of 95 is input to the main CPU 63. In this case, when the front door frame 14 is in the closed state with respect to the inner frame 13, the front door opening sensor 95 transmits a close detection signal to the main CPU 63, and the front door frame 14 is in the open state with respect to the inner frame 13. In this case, the front door opening sensor 95 transmits an opening detection signal to the main CPU 63. The main CPU 63 specifies that the front door frame 14 is in the closed state when receiving the closing detection signal from the front door opening sensor 95, and determines when the opening detection signal is received from the front door opening sensor 95. It is specified that the front door frame 14 is in the open state.

  In this embodiment, a main body opening sensor 96 for detecting whether or not the gaming machine main body 12 is in an open state with respect to the outer frame 11 is electrically connected to the main CPU 63. The detection result of 96 is input to the main CPU 63. In this case, when the gaming machine main body 12 is closed with respect to the outer frame 11, the main body opening sensor 96 transmits a closing detection signal to the main CPU 63, and the gaming machine main body 12 is opened with respect to the outer frame 11. In some cases, the main body opening sensor 96 transmits an opening detection signal to the main CPU 63. The main CPU 63 determines that the gaming machine main body 12 is in the closed state when receiving the closing detection signal from the main body opening sensor 96, and determines when the gaming machine main body 12 is receiving the opening detection signal from the main body opening sensor 96. It is specified that the main body 12 is in the open state.

  If the reset button 68c is being pressed (step S5003: YES) and a negative determination is made in any of steps S5004 to S5006, a clear process for non-setting update is executed (step S5007). . In the clearing process at the time of non-setting update, the specific control except for the area (specifically, the set value counter) in which the setting value information indicating the setting state of the pachinko machine 10 in the specific control work area 221 is set. The work area 221 is cleared to "0", and an initial setting is performed for the area cleared to "0". As a result, since the area indicating whether the winning / rejecting lottery mode is the high probability mode is cleared to “0”, the winning / rejecting lottery is performed regardless of the winning / rejecting lottery mode immediately before the supply of the operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game is not executed, the opening / closing execution mode is not executed, and the general-purpose display unit 38a is not variably displayed, and the general electric functioning object 34a is in the closed state. Situation. In addition, since the hold storage area 65a and the ordinary power hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is erased and the general figure display unit is cleared. The hold information for 38a is deleted. In the clearing process at the time of non-setting update, the stack area 222 for specific control is cleared to “0”. In the clearing process at the time of non-setting update, initial setting is performed after various registers of the main CPU 63 are also cleared to "0".

  In the non-setting update clearing process, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to “0”. As a result, even if the supply of operating power to the pachinko machine 10 is started while the reset button 68c is pressed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". It is possible to do so.

  If the reset button 68c has not been pressed (step S5003: NO), it is determined whether the power failure flag is set to “1” (step S5008). The power failure flag is provided in the work area 221 for the specific control, and when the supply of the operating power to the main CPU 63 is stopped, if the predetermined power failure processing is normally executed, the power failure flag is set. Is set to "1". If “1” is set in the power failure flag, it is determined whether or not the calculation result of the checksum matches the checksum stored when the power was turned off, that is, the validity of the stored data is determined (step S5009). . If the clear processing at the time of non-setting update is executed in step S5007, or if an affirmative determination is made in step S5009, the setting of the pachinko machine 10 is confirmed by checking the value of the set value counter in the work area 221 for specific control. It is determined whether the value is normal (step S5010). Specifically, when the setting value set in the setting value counter is any one of “Setting 1” to “Setting 6”, it is determined that the setting is normal, and when the setting value is “0” or 7 or more, an abnormality is determined. It is determined that there is.

  If a negative determination is made in any of steps S5008 to S5010, an operation prohibition process is executed. In the operation prohibition process, after an error notification process for notifying the occurrence of an error to a hall manager or the like is performed (step S5011), an infinite loop is performed. The operation prohibition process is released by executing a setting update clear process (step S5018) described later.

  If an affirmative determination is made in all of steps S5008 to S5010, a power-on setting process is executed (step S5012). In the power-on setting process, a predetermined area of the work area 221 for specific control such as initialization of a power failure flag is set to an initial value, and a command corresponding to the current game state is transmitted to the sound emission control device 81.

  Although the main CPU 63 is configured to periodically execute the timer interrupt process, the occurrence of the timer interrupt process is prohibited when the main process is started. The state in which the generation of the timer interrupt process is prohibited is released at a timing before the process of step S5013 is completed after the process of step S5012 is completed, and the execution of the timer interrupt process is permitted. As a result, when the supply of the operating power to the main CPU 63 is started, the power-on setting processing in step S5012 ends, and the timer interrupt processing is not executed until the step before the processing in step S5013 starts. Therefore, the processing for advancing the game by the main CPU 63 is not started until the situation is reached.

  Thereafter, the process proceeds to the remaining process of steps S5013 to S5016. That is, the main CPU 63 is configured to periodically execute the timer interrupt process, but a remaining time is generated between one timer interrupt process and the next timer interrupt process. The remaining time varies in accordance with the processing completion time of each timer interrupt process, and the remaining processes of steps S5013 to S5016 are repeatedly executed using the irregular time. In this regard, it can be said that the remaining processes in steps S5013 to S5016 are irregular processes that are irregularly executed. In steps S5013 to S5016, the same processing as steps S113 to S116 of the main processing (FIG. 9) in the first embodiment is executed.

  On the other hand, when the reset button 68c is being pressed (step S5003: YES), and when all of the steps S5004 to S5006 are affirmatively determined, a process for updating the set value is executed. Specifically, first, a setting value copy process is executed (step S5017). In the copy processing, the information of the set value counter used to specify the set value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . Thus, even if the information of the setting value counter is cleared to “0” in the setting update clearing process (step S5018) to be executed thereafter, the information before the setting value updating clearing process is executed is performed. It is possible to grasp the set value of the pachinko machine 10 (that is, the set value of the pachinko machine 10 before the supply of the operation power to the pachinko machine 10 is stopped).

  Thereafter, a clear process at the time of setting update is executed (step S5018). In the clear processing at the time of setting update, the work area 221 for the specific control is set to “0” except for the area indicating whether the winning / rejecting lottery mode in the work area 221 for the specific control is the high probability mode and the copy area. Is cleared, and initial setting is performed for the area cleared to "0". As a result, the game round is not executed, the opening / closing execution mode is not executed, and the general-purpose display unit 38a is not variably displayed. There is a certain situation. In addition, since the hold storage area 65a and the ordinary power hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is erased and the general figure display unit is cleared. The hold information for 38a is deleted. In the clearing process at the time of setting update, the stack area 222 for specific control is cleared to “0”, and initial setting is performed for the area cleared to “0”. In the clearing process at the time of setting update, the set value counter used to specify the set value of the pachinko machine 10 is cleared to “0”. In the clearing process at the time of setting update, initial setting is performed after various registers of the main CPU 63 are also cleared to “0”.

  On the other hand, in the clearing process at the time of setting update, since the area indicating whether the winning / rejecting lottery mode is the high probability mode is not cleared to “0”, even if the setting value updating process (step S5019) is executed, the winning / rejecting lottery mode is executed. Can be maintained in the mode before the supply of the operating power to the pachinko machine 10 is stopped. In addition, since the copy area is not cleared to “0” in the clearing process at the time of setting update, it is possible to specify the set value that was set before the clearing process at the time of setting update is performed.

  In the clearing process at the time of setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to “0”. As a result, even when the set value updating process capable of changing the set value of the pachinko machine 10 is executed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to “0”. It is possible to do so.

  Then, after executing the set value updating process in step S5019, the process proceeds to step S5012. Hereinafter, the setting value update processing will be described. FIG. 85 is a flowchart showing the setting value update processing. The processing of steps S5101 to S5114 in the setting value update processing is executed by the main CPU 63 using a program for specific control and data for specific control.

  First, “1” is set to a set value counter provided in the work area 221 for specific control (step S5101). The set value counter is a counter for the main CPU 63 to specify which set value the setting state of the pachinko machine 10 is. When the set value counter is set to “1”, when the set value updating process is executed, the set value becomes “set 1” regardless of the set value up to that time.

  After that, a setting value display start process is executed (step S5102). In the setting value display start processing, the display of the third notification display device 69c is controlled so that the number “1” corresponding to “setting 1” is displayed. When changing the set value, the manager of the gaming hall can check the current setting state of the pachinko machine 10 by checking the third notification display device 69c.

  Thereafter, it is determined whether or not one game ball is detected by the out-mouth detection sensor 48a (step S5103). Specifically, it is determined whether or not the signal received from the out-mouth detection sensor 48a has switched from the LOW level to the HI level. If a negative determination is made in step S5103, it is determined whether the update button 68b has been pressed once (step S5104). Specifically, it is determined whether or not the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S5104, the process returns to step S5103, and it is determined whether or not one game ball has been detected by the out-mouth detection sensor 48a.

  If the update button 68b is pressed once (step S5104: YES), the value of the set value counter in the work area 221 for specific control is incremented by 1 (step S5105). If the value of the set value counter after adding 1 exceeds “6” (step S5106: YES), “1” is set to the set value counter (step S5107). Thus, each time the update button 68b is pressed once, the setting value is updated to the next higher level, and when the update button 68b is pressed once in the situation of “setting 6,” the setting is changed to “setting 1.” I will return.

  If a negative determination is made in step S5106, or if the process in step S5107 is performed, a display update process of the set value is performed (step S5108). In the setting value display update processing, the display control of the third notification display device 69c is performed so that a number corresponding to the value of the setting value counter in the work area 221 for specific control is displayed. The administrator of the gaming hall can check the setting state of the pachinko machine 10 after pressing the update button 68b by checking the third notification display device 69c.

  After executing the processing in step S5108, the process returns to step S5103, and it is determined whether or not one game ball has been detected by the out-mouth detection sensor 48a. If one game ball has not been detected by the out-mouth detection sensor 48a (step S5103: NO), the processing after step S5104 is executed again. If one game ball is detected by the out-mouth detection sensor 48a (step S5103: YES), it is determined whether or not the setting key insertion unit 68a has been switched from the ON state to the OFF state (step S5109). In this case, instead of specifying whether the setting key insertion unit 68a is in the OFF state, it is specified whether switching from the ON state to the OFF state has occurred, and it is determined that the switching has occurred. If specified, an affirmative determination is made in step S5109.

  If it has not been switched to the OFF state (step S5109: NO), the processing of step S5109 is executed again. Thus, the process waits until the setting key insertion unit 68a is turned off. If the state has been switched to the OFF state (step S5109: YES), display end processing of the set value is executed (step S5110). In the display end processing of the set value, the display of the set value on the third notification display device 69c is ended. In this case, the display of various parameter information stored in the calculation result storage area 234 provided in the non-specific control work area 223 is started by the first to third notification display devices 69a to 69c.

  Thereafter, a setting value comparison process is performed (step S5111). In the set value comparison processing, it is determined whether or not the information of the set value counter in the specific control work area 221 matches the information stored in the copy area in the specific control work area 221. That is, it is determined whether or not the set value set before the supply of the operation power to the pachinko machine 10 is stopped is the same as the set value set in the current set value updating process.

  If the set value set before the supply of the operation power to the pachinko machine 10 is stopped is the same as the set value set in the current set value update process (step S5112: NO), the non- A notification process at the time of change is executed (step S5113). In the notification process at the time of non-change, a setting maintaining command indicating that the setting value has not been changed is transmitted to the sound emission control device 81. Upon receiving the setting maintaining command, the sound emission control device 81 causes the display light emitting unit 53 to emit light in a mode corresponding to the setting maintaining, and causes the speaker unit 54 to output a sound of “setting maintained.” In addition, a character image “Setting is maintained.” Is displayed on the symbol display device 41.

  These notifications are maintained until the notification execution period (for example, 10 seconds) elapses after the setting maintaining command is transmitted, and is terminated when the notification execution period has elapsed. However, the present invention is not limited to this, and the notification may be ended when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the administrator of the game hall can grasp that the set value has been maintained. In the notification process at the time of non-change, the set value is maintained by setting the display content on at least one of the first to third notification display devices 69a to 69c to the display content corresponding to the setting maintenance. May be notified, or an external output indicating that the set value is maintained may be provided.

  If the set value set before the supply of the operating power to the pachinko machine 10 is stopped is not the same as the set value set in the current set value updating process (step S5112: YES), the change is made. The time notification process is executed (step S5114). In the notification process at the time of change, a setting change command indicating that the set value has been changed is transmitted to the sound emission control device 81. Upon receiving the setting change command, the sound emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the setting change, and causes the speaker unit 54 to output a sound saying “Setting change.” In addition, a character image “Setting is changed.” Is displayed on the symbol display device 41.

  These notifications are maintained until the notification execution period (for example, 10 seconds) elapses after the setting change command is transmitted, and is terminated when the notification execution period has elapsed. However, the present invention is not limited to this, and the notification may be ended when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the administrator of the game hall can know that the set value has been changed. In the notification process at the time of the change, the setting value is changed by setting the display content on at least one of the first to third notification display devices 69a to 69c to the display content corresponding to the setting change. May be notified or an external output indicating that the set value has been changed may be performed.

  As described above, in the present embodiment, in order to execute the setting value updating process, not only the setting key insertion unit 68a is turned ON, but also the reset button 68c is pressed, and the front door frame 14 is opened. It is necessary that the gaming machine main body 12 be in an open state. This makes it difficult to perform the setting value update process illegally.

  In addition, in order to execute the set value update processing, the front door frame 14 and the gaming machine main body 12 need to be open. As a result, even if an attempt is made to illegally execute the setting value update process, the improper act becomes conspicuous because the front door frame 14 and the gaming machine main body 12 are in the open state, and the administrator of the gaming hall has the It becomes easier to detect fraud.

  In particular, in order for the set value update process to be executed, not only the opening operation of the gaming machine main body 12 required to expose the main control device 60 but also the opening operation of the front door frame 14 is required. This makes it possible to complicate the operation of the fraudulent act and to make the fraudulent act stand out.

  Further, in a configuration in which the processing for proceeding with the game is not returned if the setting value update processing is not completed, in order to finalize the setting value selected in the setting value update processing and end the setting value update processing, It is necessary to cause a game ball to enter the out port 24a to cause the out port detection sensor 48a to detect a game ball, and then to turn off the setting key insertion section 68a. As a result, even if the set value update processing is executed improperly, it is possible to make it difficult to end the set value update processing and return to the processing for proceeding the game.

  Further, the set value set before the supply of the operation power to the pachinko machine 10 is stopped is compared with the set value selected in the set value updating process, and whether the set values are the same is determined. The notification corresponding to the crab is executed. Thereby, the manager of the game hall can easily grasp whether or not the set value can be changed by the set value update process.

  FIG. 86 is a flowchart showing the timer interrupt processing in the present embodiment executed by the main CPU 63. The timer interrupt process is executed periodically (for example, every 4 milliseconds) while the processes of steps S5013 to S5016 are being executed in the main process (FIG. 84). The program corresponding to the timer interrupt process is set as a program for specific control.

  In steps S5201 to S5205, the same processing as steps S301 to S305 of the timer interrupt processing (FIG. 11) in the first embodiment is executed. These processes are executed by the main CPU 63 using a program for specific control and data for specific control.

  After that, a setting confirmation process is executed (step S5206). When the setting check process is executed, a subroutine program corresponding to the setting check process set in the specific control program is executed. However, when the subroutine program is executed, the setting check process is executed. The information for specifying the return address of the timer interrupt processing after the execution of is executed is written to the stack area 222 for specific control by the push command. When the setting confirmation processing is completed, information for specifying the return address is read by the pop instruction, and the program returns to the timer interrupt processing program indicated by the return address.

  FIG. 87 is a flowchart showing the setting confirmation processing. The processing of steps S5301 to S5312 in the setting confirmation processing is executed by the main CPU 63 using the specific control program and the specific control data.

  First, it is determined whether or not the set value corresponding to the set value counter information in the specific control work area 221 is being displayed on the third notification display device 69c (step S5301). If a negative determination is made in step S5301, it is determined whether the mode is neither the game play mode nor the opening / closing execution mode (step S5302), and the pattern change display time on the general figure display unit 38a and the general electric role object 34a are opened. It is determined whether it is any of the ordinary power open states that can be in the state (step S5303), it is determined whether the front door frame 14 is open with respect to the inner frame 13 (step S5304), and the outer frame is determined. It is determined whether or not the game machine main body 12 is in an open state with respect to 11 (step S5305), and it is determined whether or not the setting key insertion section 68a is turned on (step S5306). Whether the front door frame 14 is in the open state is determined based on the detection result of the front door open sensor 95 as in step S5005 in the main process (FIG. 84), and whether the gaming machine body 12 is in the open state. This determination is made based on the detection result of the body opening sensor 96 as in step S5006 in the main processing (FIG. 84).

  If a negative determination is made in any of steps S5302 to S5306, the setting confirmation processing ends without executing the processing of steps S5307 to S5309. If an affirmative determination is made in all of steps S5302 to S5306, a setting value display start process is executed (step S5307). In the setting value display start process, the display of the third notification display device 69c is controlled so that the number of the setting value corresponding to the information of the setting value counter in the work area 221 for specific control is displayed. When checking the set value, the manager of the game hall can grasp the current setting state of the pachinko machine 10 by looking at the third notification display device 69c.

  After that, “1” is set to the game stop flag provided in the work area 221 for the specific control (step S5308). The game stop flag is determined in the timer interrupt process (FIG. 86) in a situation where an affirmative determination is made in step S5207 and the processes in steps S5208 to S5221 are not performed, that is, in a situation where execution of the process for advancing the game should be stopped. This flag is used by the main CPU 63 to specify whether or not there is a flag. When the game stop flag is set to “1”, an affirmative determination is made in step S5207 of the timer interrupt process (FIG. 86), so that the process of steps S5208 to S5221 is not executed. As a result, the setting value is confirmed in a state where the execution of the processing for advancing the game is stopped. However, even if the game stop flag is set to “1”, the processing of steps S5201 to S5205 in the timer interrupt processing (FIG. 86) is executed, so that the setting value is confirmed. In this case, the power failure monitoring is executed, the hit random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated, and fraud detection is performed.

  Thereafter, a confirmation notification start command is transmitted to the sound emission control device 81 (step S5309). Upon receiving the confirmation notification start command, the sound emission control device 81 causes the display light emitting unit 53 to emit light in a mode corresponding to the setting confirmation, and causes the speaker unit 54 to output a sound saying “Setting is being confirmed.” . In addition, a character image “Setting is being confirmed.” Is displayed on the symbol display device 41. These notifications are continued until a confirmation notification end command is received from the main CPU 63. Note that a configuration may be adopted in which an external output indicating that the set value is being confirmed is output.

  As described above, on the condition that it is neither the game time nor the opening / closing execution mode, nor is it any one of the fluctuation display time of the pattern in the general figure display unit 38a and the general electric open state in which the general electric role product 34a can be in the open state. The display for confirming the set value is performed on the third notification display device 69c, so that the work of confirming the set value is not performed in a situation where the game is being performed. It becomes possible.

  Further, in order for the display for confirming the set value to be performed on the third notification display device 69c, not only is the setting key insertion portion 68a turned ON, but also the front door frame 14 is opened. It is necessary that the gaming machine main body 12 be in an open state. As a result, it is possible to make the display for confirming the setting value difficult to perform even if it is attempted to do so incorrectly.

  In addition, in order for the display for confirming the set value to be performed on the third notification display device 69c, the front door frame 14 and the game machine main body 12 need to be open. As a result, even if an attempt is made to illegally perform a display for confirming the set value, since the front door frame 14 and the gaming machine main body 12 are in the open state, the illegal act becomes conspicuous, and the management of the gaming hall is performed. This makes it easier for people to discover the fraud.

  In particular, in order for the display for confirming the set value to be performed on the third notification display device 69c, not only the opening operation of the gaming machine main body 12 required to expose the main control device 60 but also In addition, since the opening operation of the front door frame 14 is also required, the work of the fraudulent acts can be complicated, and the fraudulent acts can be conspicuous.

  If an affirmative determination is made in step S5301, it is determined whether the setting key insertion unit 68a has been turned OFF (step S5310). If the OFF operation has been performed (step S5310: YES), the game stop flag in the work area 221 for specific control is cleared to "0" (step S5311). As a result, a negative determination is made in step S5207 of the timer interrupt process (FIG. 86), so that the process of steps S5208 to S5221 is executed. Thereby, the state in which the execution of the processing for advancing the game is stopped is released.

  Thereafter, a confirmation notification end command is transmitted to the sound emission control device 81 (step S5312). Upon receiving the confirmation notification end command, the voice light emission control device 81 ends the notification indicating that the setting values in the symbol display device 41, the display light emitting unit 53, and the speaker unit 54 are being checked.

  Returning to the description of the timer interrupt processing (FIG. 86), after the setting confirmation processing in step S5206 is completed, it is determined whether or not the game is stopped (step S5207). In this case, if “1” is set to the game stop flag in the work area 221 for specific control in the setting confirmation processing in step S5206, an affirmative determination is made in step S5207, and the processing in steps S5208 to S5221 is performed. Do not execute processing. Also, in the case where the occurrence of fraud is detected in the fraud detection processing of step S5205, an affirmative determination is made in step S5207, and the processing of steps S5208 to S5221 is not performed.

  In steps S5208 to S5219, the same processes as those in steps S307 to S318 of the timer interrupt process (FIG. 11) in the first embodiment are executed. These processes are executed by the main CPU 63 using a program for specific control and data for specific control. In step S5221, the same process as in step S3719 of the timer interrupt process (FIG. 69) in the fifteenth embodiment is executed.

  On the other hand, in step S5220, a RAM monitoring process is executed. When the RAM monitoring process is executed, a subroutine program corresponding to the RAM monitoring process set in the specific control program is executed. The information for specifying the return address of the timer interrupt processing in is written into the stack area 222 for specific control by the push command. Then, when the RAM monitoring processing is completed, information for specifying the return address is read by the pop instruction, and the program returns to the timer interrupt processing program indicated by the return address.

  FIG. 88 is a flowchart showing the RAM monitoring process. The processing of steps S5401 to S5412 in the RAM monitoring processing is executed by the main CPU 63 using a specific control program and specific control data.

  First, monitoring processing of the work area 221 for specific control is executed (step S5401). In the monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the work area 221 for specific control due to noise or the like. This monitoring method is arbitrary. For example, in the work area 221 for the specific control, whether the state of the storage area in which information is not written by various controls in the main CPU 63 is different from the initial state or not is determined. Is monitored, and when the state is different from the initial state, it is determined that an abnormality has occurred. In this case, if the initial state of the storage area is a value of “0”, it is determined that an abnormality has occurred if “1” is stored in the storage area, and the initial state of the storage area is “1”. Is determined to have occurred when the storage area has a value of “0”. In addition to the above monitoring method, a configuration may be adopted in which it is determined that an abnormality has occurred when the value of a predetermined byte is different from a value that can be set in a normal state.

  If it is determined in step S5401 that there is an abnormality (step S5402: YES), the processing in steps S5409 to S5412 is performed. If it is not determined in step S5401 that there is an abnormality (step S5402: NO), the process proceeds to step S5403.

  In step S5403, monitoring processing of the stack area 222 for specific control is executed. In the monitoring process, it is monitored whether or not information stored in the specific control stack area 222 has an abnormality due to noise or the like. This monitoring method is arbitrary. For example, in the stack area 222 for specific control, whether or not the state of the storage area where information is not written by various controls in the main CPU 63 is different from the initial state Is monitored, and when the state is different from the initial state, it is determined that an abnormality has occurred. In this case, if the initial state of the storage area is a value of “0”, it is determined that an abnormality has occurred if “1” is stored in the storage area, and the initial state of the storage area is “1”. Is determined to have occurred when the storage area has a value of “0”. In addition to the above monitoring method, a configuration may be adopted in which it is determined that an abnormality has occurred when the value of a predetermined byte is different from a value that can be set in a normal state.

  If it is determined in step S5403 that there is an abnormality (step S5404: YES), the processing in steps S5409 to S5412 is performed. If it is not determined in step S5403 that there is an abnormality (step S5404: NO), the process proceeds to step S5405.

  In step S5405, monitoring processing of the work area 223 for non-specific control is executed. In the monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the non-specific control work area 223 due to noise or the like. This monitoring method is optional. For example, in the work area 223 for non-specific control, whether or not the state of the storage area in which information is not written by various controls in the main CPU 63 is different from the initial state Is monitored, and when the state is different from the initial state, it is determined that an abnormality has occurred. In this case, if the initial state of the storage area is a value of “0”, it is determined that an abnormality has occurred if “1” is stored in the storage area, and the initial state of the storage area is “1”. Is determined to have occurred when the storage area has a value of “0”. In addition to the above monitoring method, a configuration may be adopted in which it is determined that an abnormality has occurred when the value of a predetermined byte is different from a value that can be set in a normal state.

  If it is determined in step S5405 that there is an abnormality (step S5406: YES), the processing in steps S5409 to S5412 is performed. If it is not determined in step S5405 that there is an abnormality (step S5406: NO), the process advances to step S5407.

  In step S5407, monitoring processing of the stack area 224 for non-specific control is executed. In the monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the non-specific control stack area 224 due to noise or the like. This monitoring method is optional. For example, in the stack area 224 for non-specific control, whether or not the state of the storage area in which information is not written by various controls in the main CPU 63 is different from the initial state Is monitored, and if the state is different from the initial state, it is determined that an abnormality has occurred. In this case, if the initial state of the storage area is a value of “0”, it is determined that an abnormality has occurred if “1” is stored in the storage area, and the initial state of the storage area is “1”. Is determined to have occurred when the storage area has a value of “0”. In addition to the above monitoring method, a configuration may be adopted in which it is determined that an abnormality has occurred when the value of a predetermined byte is different from a value that can be set in a normal state.

  If it is determined in step S5407 that there is an abnormality (step S5408: YES), the processing in steps S5409 to S5412 is performed. Specifically, first, a setting value copy process is executed (step S5409). In the copy processing, the information of the set value counter used to specify the set value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . As a result, even if the information of the set value counter is cleared to “0” in the abnormality clearing process (step S5410) executed thereafter, the pachinko machine 10 before the abnormality clearing process is executed. Can be set.

  After that, a clearing process at the time of abnormality is performed (step S5410). In the abnormal clearing process, the work area 221 for specific control is cleared to “0” except for the copy area, and the stack area 222 for specific control, the work area 223 for non-specific control, and the stack for non-specific control are cleared. Area 224 is cleared to "0". After clearing “0”, initial setting is performed. That is, in the RAM monitoring processing, an abnormality occurs in any one of the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control. If it is specified that the work area 221 for specific control is cleared to "0" except for the copy area, the stack area 222 for specific control, the work area 223 for non-specific control, Is cleared to "0". As a result, when there is a possibility that some information abnormality has occurred in the main RAM 65, neither the process corresponding to the specific control nor the process corresponding to the non-specific control is executed as it is. It is possible to do so.

  If the stack area 222 for specific control is cleared to “0”, the information of the return address after the execution of the RAM monitoring process is also deleted. Therefore, when the stack area 222 for the specific control is cleared to “0”, the process of step S5412 is terminated, and then the process returns to the predetermined program. Specifically, it is configured to uniquely return to the processing of step S5013 in the main processing (FIG. 22). However, the program that returns uniquely is not limited to step S5013, and may be step S5221 in the timer interrupt process (FIG. 86). When the stack area 222 for the specific control is cleared to “0”, the stack order of the stack pointer of the main CPU 63 is also set to the address of the first storage area in the stack area 222 for the specific control.

  After that, an abnormal command indicating that the clearing process at the time of abnormality has occurred is transmitted to the sound emission control device 81 (step S5411). Upon receiving the abnormal command, the sound light emission control device 81 causes the display light emitting unit 53 to emit light in a mode corresponding to the forced clear, and causes the speaker unit 54 to output a sound of “forced clear”. In addition, a character image “Forcibly cleared.” Is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and is terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be ended when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the manager of the game hall can know that the main RAM 65 has been forcibly cleared.

  Thereafter, a setting value update process is executed (step S5412). That is, when the clearing process at the time of the abnormality occurs, the “0” clear is executed including the set value counter in the work area 221 for the specific control. Execute the set value update process to perform the setting. The processing content of the setting value update processing is the same as that of step S5019 of the main processing (FIG. 84). Therefore, each time the update button 68b is pressed once, the set value is updated one step at a time, and the set value being selected is determined by detecting the game ball by the out-opening detection sensor 48a. The set value that is being updated and the set value that has been confirmed are displayed on the third notification display device 69c. Thereafter, when the setting key insertion section 68a is switched from the ON state to the OFF state, it is determined that the condition for ending the setting value updating process is satisfied.

  Here, it is not determined that the end condition is satisfied only by the setting key insertion unit 68a being in the OFF state. It is determined that the condition has been established. When the setting value updating process is executed in the RAM monitoring process (FIG. 88), the setting key insertion unit 68a is in the OFF state at the start of the setting value updating process. In order to establish the condition, it is necessary to insert a setting key into the setting key insertion section 68a, perform an ON operation once, and then perform an OFF operation. As a result, it is possible to prevent the setting value update process from ending even when the regular operation by the manager of the gaming hall is not performed.

  When the setting key insertion unit 68a is switched from the ON state to the OFF state and the condition for ending the set value update process is satisfied, the step S5111 in the set value update process (FIG. 85) is executed to execute The setting value stored in the copy area in the work area 221 for specific control is compared with the set value currently set in the set value counter in the work area 221 for specific control. In other words, it is determined whether or not the set value set before the abnormality clear processing (step S5410) is executed and the set value set in the current set value update processing are the same. When both the set values are the same (step S5112: NO), the notification process at the time of non-change (step S5113) is executed so that the setting maintenance notification described above is performed. On the other hand, when the two set values are different (step S5112: YES), the notification of the change in setting described above is performed by executing the notification process at the time of change (step S5114).

  According to the embodiment described in detail above, the following excellent effects can be obtained.

  In order to execute the setting value update process when the supply of the operation power to the pachinko machine 10 is started, not only the setting key insertion unit 68a is turned on but also the reset button 68c is pressed. , The front door frame 14 must be in an open state, and the gaming machine main body 12 must be in an open state. This makes it difficult to perform the setting value update process illegally.

  In order to execute the set value update process, the front door frame 14 and the gaming machine main body 12 need to be open. As a result, even if an attempt is made to illegally execute the setting value update process, the improper act becomes conspicuous because the front door frame 14 and the gaming machine main body 12 are in the open state, and the administrator of the gaming hall has the It becomes easier to detect fraud.

  In particular, in order for the set value update process to be executed, not only the opening operation of the gaming machine main body 12 required to expose the main control device 60 but also the opening operation of the front door frame 14 is required. This makes it possible to complicate the operation of the fraudulent act and to make the fraudulent act stand out.

  If the set value update process is not completed and the process does not return to the process for proceeding with the game, in order to finalize the set value selected in the set value update process and end the set value update process, It is necessary to cause the game ball to enter the 24a, allow the out-opening detection sensor 48a to detect the game ball, and then turn off the setting key insertion section 68a. As a result, even if the set value update processing is executed improperly, it is possible to make it difficult to end the set value update processing and return to the processing for proceeding the game.

  The set value that was set before the supply of the operating power to the pachinko machine 10 was stopped is compared with the set value selected in the set value update process, and whether or not both set values are the same is determined. A corresponding notification is performed. Thereby, the manager of the game hall can easily grasp whether or not the set value can be changed by the set value update process.

  The set value is set on the condition that it is neither the game play nor the opening / closing execution mode, nor is the picture variable display time in the general figure display section 38a or the general electric open state in which the general electric work 34a can be in the open state. By performing the display for confirmation on the third notification display device 69c, it is possible to prevent the setting value confirmation work from being performed in the situation where the game is being played. .

  In order for the display for confirming the set value to be performed on the third notification display device 69c, not only the setting key insertion portion 68a is turned ON, but also the front door frame 14 is opened. And the gaming machine body 12 needs to be in an open state. As a result, it is possible to make the display for confirming the setting value difficult to perform even if it is attempted to do so incorrectly.

  In order for the display for confirming the set value to be performed on the third notification display device 69c, the front door frame 14 and the gaming machine main body 12 need to be open. As a result, even if an attempt is made to illegally perform a display for confirming the set value, since the front door frame 14 and the gaming machine main body 12 are in the open state, the illegal act becomes conspicuous, and the management of the gaming hall is performed. This makes it easier for people to discover the fraud.

  In particular, in order for the display for confirming the set value to be performed on the third notification display device 69c, not only the opening operation of the gaming machine main body 12 required to expose the main control device 60 but also In addition, since the opening operation of the front door frame 14 is also required, the work of the fraudulent acts can be complicated, and the fraudulent acts can be conspicuous.

  When it is specified that an abnormality has occurred in any one of the specific control work area 221, the specific control stack area 222, the non-specific control work area 223, and the non-specific control stack area 224. Clears the work area 221 for specific control except for the copy area to “0”, and sets the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control to “0”. "clear. As a result, when there is a possibility that some information abnormality has occurred in the main RAM 65, both the processing corresponding to the specific control and the processing corresponding to the non-specific control are executed as it is. It is possible to prevent it from happening.

  In the process corresponding to the specific control, information abnormality occurs not only in the work area 221 for the specific control and the stack area 222 for the specific control, but also in the work area 223 for the non-specific control and the stack area 224 for the non-specific control. Is monitored. This makes it possible to simplify the processing configuration as compared to a configuration that monitors whether an information abnormality has occurred separately for processing corresponding to specific control and processing corresponding to non-specific control.

  When it is specified that an abnormality has occurred in any one of the specific control work area 221, the specific control stack area 222, the non-specific control work area 223, and the non-specific control stack area 224. In the processing corresponding to the specific control, not only the work area 221 for the specific control and the stack area 222 for the specific control, but also the work area 223 for the non-specific control and the stack area 224 for the non-specific control are set to “0”. Is cleared. This makes it possible to simplify the processing configuration as compared with a configuration in which “0” is cleared separately for the process corresponding to the specific control and the process corresponding to the non-specific control.

  When the information clearing process has been performed due to the occurrence of the information error, the setting value updating process is executed. This makes it possible to prevent the game from proceeding even though the set value has not been set. In this case, when the set value set before the clear processing at the time of abnormality is executed is the same as the set value set in the set value update processing after the execution of the clear processing at the time of abnormality, Is notified of the setting maintenance. As a result, even if the clearing process at the time of the abnormality is performed, the setting maintenance notification is performed by resetting the set value set in the previous situation, and the clearing process at the time of the abnormality is performed. Can also indicate to the player that the set value has not changed. Incidentally, since it is common to record the set value of each pachinko machine 10 installed in the game hall, the set value updating process after the execution of the clearing process at the time of abnormality is performed so that the set value becomes the recorded set value. It is possible to perform

  Note that the condition for executing the set value update process when the supply of the operation power to the pachinko machine 10 is started may be a condition different from the above embodiment. FIG. 89 is a flowchart showing another embodiment of the main process. In the main processing, the same processing as steps S5001 to S5019 of the main processing (FIG. 84) in the above embodiment is executed in steps S5501 to S5506 and steps S5508 to S5520. On the other hand, in the main process, it is determined in step S5507 whether or not the operation handle of the firing operation device 28 operated to fire the game ball in the game area PA is rotated from the initial rotation position. Then, the reset button 68c is pressed (step S5503: YES), the setting key insertion section 68a is turned ON (step S5504: YES), and the front door frame 14 is opened with respect to the inner frame 13. (Step S5505: YES), the gaming machine main body 12 is open with respect to the outer frame 11 (Step S5506: YES), and the operation handle of the firing operation device 28 is rotated from the initial rotation position. If yes (step S5507: YES), the set value updating process (step S5520) is executed. Accordingly, in order to execute the set value updating process when the supply of the operation power to the pachinko machine 10 is started, not only the setting key is inserted into the setting key insertion unit 68a to perform the ON operation, but also the firing is performed. It is necessary to start supplying the operating power to the pachinko machine 10 with the operation handle of the operation device 28 being rotated. Therefore, it is possible to make it difficult to illegally change the set value. In step S5507, it is not determined whether or not the operation handle of the firing operation device 28 has been rotated from the initial rotation position, but it is determined whether or not the firing operation device 28 has been touched by a player. It may be configured.

  In addition, when the supply of the operation power to the pachinko machine 10 is started, the condition that the set value update process is executed includes a condition that the front door frame 14 is open with respect to the inner frame 13 and that Although both the conditions that the gaming machine main body 12 is in the open state with respect to the frame 11 are set, the configuration may be such that only one of these conditions is set.

  Further, as a condition for performing the set value updating process when the supply of the operation power to the pachinko machine 10 is started, a condition that the reset button 68c is pressed is set. However, the configuration may be such that the condition is not set.

  In addition, as a condition for executing the set value update process when the supply of the operation power to the pachinko machine 10 is started, the operation to the pachinko machine 10 in a situation where the game ball is detected by the gate detection sensor 49a is set as a condition. A configuration in which the condition that the power supply is started may be set. Accordingly, in order to execute the setting value update process when the supply of the operation power to the pachinko machine 10 is started, not only the setting key is inserted into the setting key insertion unit 68a to perform the ON operation, but also the through operation is performed. It is necessary to start supplying the operating power to the pachinko machine 10 with the game balls staying at the gate 35. Therefore, it is possible to make it difficult to illegally change the set value.

  Further, the content of the operation for fixing the set value in the set value update process may be different from the content of the above embodiment. FIG. 90 is a flowchart showing another example of the setting value updating process. In the set value update processing, the same processing as steps S5101 to S5102 and steps S5104 to S5114 of the set value update processing (FIG. 85) in the above embodiment is executed in steps S5601 to S5602 and S5604 to S5614. . On the other hand, in the setting value updating process, in step S5603, the ON signal is continuously output from the gate detection sensor 49a instead of determining whether or not a game ball has been detected by the out-mouth detection sensor 48a. It is determined whether the ON continuation period is longer than the end reference period (specifically, 5 seconds). If an affirmative determination is made in step S5603, the set value being selected is determined, and the flow advances to step S5609. According to this configuration, in order to finalize the selected set value, it is necessary to intentionally cause the game balls to stay in the through gate 35 for the end reference period or longer. The game ball staying in the through gate 35 for the end reference period or more does not occur in a situation where a normal game is played. As a result, it is possible to make the condition for fixing the selected set value not to be satisfied or hard to be satisfied in a situation where a normal game is being played. Further, even if the setting value update process is started due to fraud, it is possible to make it difficult to perform an operation for fixing the selected setting value in the setting value update process.

  In the setting value updating process, the selected setting value may be determined when the operation handle of the firing operation device 28 is rotated from the initial rotation position, and the firing operation device 28 is touched by the player. In this case, the setting value being selected may be determined when the selection is made.

  In the setting value updating process, the selected value may be determined when the special power detection sensor 45a detects that a game ball has entered the special power prize device 32 provided with the opening / closing member. Alternatively, the selected setting value may be determined when the second operation port detection sensor 47a detects that a game ball has entered the second operation port 34 provided with the opening / closing member. In this case, in order to finalize the currently selected set value, it is necessary to maintain the game ball after manually opening the target entry section, thereby making it difficult to perform an illegally changing the set value. It becomes possible.

  In addition, in the setting value update processing, the selection is performed based on the detection that the game ball has entered the second ball entry section after the detection that the game ball has entered the first ball entry section. A configuration in which the middle set value is determined may be adopted. In this case, in order to finalize the selected set value, it is necessary to enter the game ball by care in a plurality of ball entry sections in a predetermined order, so that it is difficult to perform an act of illegally changing the set value. Becomes possible. In this case, by setting the first ball entry portion and the second ball entry portion as ball entry portions in which no opening / closing member is provided, the workability of regular work is not extremely reduced. It is possible to do.

  In the setting value update processing, the setting key insertion section 68a may be switched from the ON state to the OFF state, so that the selected setting value is fixed and the setting value update processing end condition may be satisfied.

  Further, the operation for updating the set value by one step in the set value update process is not limited to the configuration in which the update button 68b is pressed, and the set value is changed by one step when the reset button 68c is pressed. The configuration may be updated.

  Further, the case where the supply of the operating power to the pachinko machine 10 is started in a situation where the reset button 68c is pressed and the setting key insertion unit 68a is turned ON by the setting key, When the front door frame 14 is not in the open state with respect to the frame 13 or when the gaming machine main body 12 is not in the open state with respect to the outer frame 11, the clear processing at the time of non-setting update (step S5007) is executed. The configuration is not limited, and the configuration may be such that the clear processing at the time of non-setting update is not executed. As a result, it is possible to prevent the clear processing at the time of non-setting update from being executed against the intention of the manager of the gaming hall.

  Also, the case where the supply of the operating power to the pachinko machine 10 is started in a situation where the reset button 68c is being pressed and the setting key insertion section 68a is not turned on by the setting key, When the front door frame 14 is not in the open state with respect to the frame 13 or when the gaming machine main body 12 is not in the open state with respect to the outer frame 11, the clear processing at the time of non-setting update (step S5007) is executed. The configuration is not limited, and the configuration may be such that the clearing process at the time of non-setting update is not executed. As a result, it is possible to make it difficult to execute the clear processing at the time of non-setting update illegally.

<Twenty-third embodiment>
This embodiment is different from the twenty-second embodiment in the processing configuration of the main processing. Hereinafter, a configuration different from the twenty-second embodiment will be described. The description of the same configuration as that of the above-described twenty-second embodiment is basically omitted.

  FIG. 91 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. The processing of steps S5701 to S5720 in the main processing is executed by the main CPU 63 using the specific control program and the specific control data.

  First, a power-on wait process is executed (step S5701). In the power-on wait process, for example, the process waits without advancing to the next process until a predetermined time for wait (specifically, one second) elapses after the main process is started. In the execution period of the power-on wait processing, the operation start and the initial setting of the symbol display device 41 are completed. Thereafter, access to the main RAM 65 is permitted (step S5702).

  Thereafter, it is determined whether or not the front door frame 14 is open with respect to the inner frame 13 based on the detection result of the front door opening sensor 95 (step S5703). It is determined whether or not the gaming machine body 12 is in the open state (step S5704), and it is determined whether the reset button 68c is pressed (step S5705). If a negative determination is made in any of steps S5703 to S5705, the processing of steps S5706 to S5714 is performed. Steps S5706 to S5714 are the same as steps S5008 to S5016 of the main process (FIG. 84) in the twenty-second embodiment.

  If an affirmative determination is made in all of steps S5703 to S5705, a selection process is executed (step S5715). In the selection process, either the situation in which the clear processing at the time of non-setting update is executed and the set value update processing is not executed, or the situation in which the clear processing at the time of setting update is executed and the set value update processing is executed is set. A process of determining whether or not the game is based on a selection operation by a manager of the game hall is executed. Specifically, each time the update button 68b is pressed once, the state is switched from a state in which one of the above-described situations is selected to a state in which the other situation is selected. The selection operation may be performed by operating the reset button 68c, or may be performed by operating another operation unit. If the clearing process at the time of non-setting update is executed and the setting value updating process is not executed, “O” is displayed on the first notification display device 69a and the second notification display device 69b is displayed. And, when the third notification display device 69c is turned off and the status of executing the clearing process at the time of setting update and executing the setting value update process is selected, "O" is displayed on the second notification display device 69b. Is displayed, and the first notification display device 69a and the third notification display device 69c are turned off. In addition, when the reset button 68c is continuously pressed for more than a fixed selection period (specifically, 10 seconds), the state on the selected side among the above-described states is set as the current selection target. I do.

  When the update button 68b is continuously pressed for more than a fixed selection period (specifically, 10 seconds), the selected one of the above-mentioned situations is confirmed as a current selection target. If another operation unit is continuously pressed for more than a fixed selection period (specifically, 10 seconds), the state of the selected side among the above-described states is selected this time. It is good also as a structure determined as an object. Further, a configuration may be adopted in which the state on the side selected from the above-described states is determined as the current selection target by rotating the operation handle of the firing operation device 28.

  In the selection process, when the clearing process at the time of non-setting update is executed and the setting value updating process is not executed is determined as the current selection target (step S5716: NO), the clear process at the time of non-setting update is executed. (Step S5717). The processing content of the clear processing at the time of non-setting update is the same as that of step S5007 of the main processing (FIG. 84) in the twenty-second embodiment.

  In the selection process, when the situation of executing the clear process at the time of setting update and executing the set value updating process is determined as the current selection target (step S5716: YES), the setting value copy process is executed (step S5716). In step S5718, a clear process at the time of setting update is executed (step S5719), and a set value updating process is executed (step S5720). The processing contents of steps S5718 to S5720 are the same as steps S5017 to S5019 of the main processing (FIG. 84) in the twenty-second embodiment.

  According to the above-described configuration, even when the configuration key insertion unit 68a is not provided, the clear process at the time of non-setting update is performed and the set value update process is not performed, and the clear process at the time of configuration update is performed. In addition, the manager of the game hall can select which of the situations in which the setting value update process is executed.

  In addition, not only when executing the set value update process but also when executing the clear process at the time of non-setting update, supply of the operating power to the pachinko machine 10 is performed in a state where the reset button 68c is pressed. In addition to starting, it is necessary to open the front door frame 14 with respect to the inner frame 13 and open the gaming machine body 12 with respect to the outer frame 11. As a result, it is possible to make it difficult to execute the clear processing at the time of non-setting update illegally.

  The conditions for the selection process to be performed when the supply of the operating power to the pachinko machine 10 is started include the condition that the front door frame 14 is open with respect to the inner frame 13 and that the outer frame is Although the condition that both the condition that the game machine main body 12 is in the open state is set for 11 is set, the configuration may be such that only one of these conditions is set.

  In addition, as a condition for executing the selection process when the supply of the operation power to the pachinko machine 10 is started, a condition that the firing handle of the firing operation device 28 is rotated is added. The configuration that the condition that the firing operation device 28 is touched may be added, and the configuration that the condition that the game ball is detected by the gate detection sensor 49a is added. Is also good.

<24th embodiment>
This embodiment is different from the twenty-second embodiment in the processing configuration of the RAM monitoring process. Hereinafter, a configuration different from the twenty-second embodiment will be described. The description of the same configuration as that of the above-described twenty-second embodiment is basically omitted.

  FIG. 92 is a flowchart showing the RAM monitoring processing according to the present embodiment executed by the main CPU 63. The processing of steps S5801 to S5814 in the RAM monitoring processing is executed by the main CPU 63 using a program for specific control and data for specific control.

  First, monitoring processing of the work area 221 for specific control is executed (step S5801). The contents of the monitoring process are the same as those in step S5401 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5801 that there is an abnormality (step S5802: YES), the processing in steps S5805 to S5808 is performed.

  If it is not determined in step S5801 that there is an abnormality (step S5802: NO), monitoring processing of the stack area 222 for specific control is executed (step S5803). The contents of the monitoring process are the same as those in step S5403 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5803 that there is an abnormality (step S5804: YES), the processing in steps S5805 to S5808 is performed.

  For details of the processing in steps S5805 to S5808, first, a setting value copy processing is executed (step S5805). In the copy processing, the information of the set value counter used to specify the set value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . As a result, even if the information of the set value counter is cleared to “0” in the abnormality clearing process (step S5806) executed thereafter, the pachinko machine 10 before the abnormality clearing process is executed. Can be set.

  After that, a clearing process at the time of abnormality is performed (step S5806). In the clearing process at the time of abnormality, the work area 221 for specific control is cleared to “0” except for the copy area, and the stack area 222 for specific control is cleared to “0”. After clearing “0”, initial setting is performed. On the other hand, "0" clear of the work area 223 for non-specific control and the stack area 224 for non-specific control is not executed. That is, in the RAM monitoring process according to the present embodiment, when it is determined that an abnormality has occurred in any of the specific control work area 221 and the specific control stack area 222, the specific control is performed excluding the copy area. The work area 221 is cleared to "0", and the stack area 222 for specific control is cleared to "0". Accordingly, when there is a possibility that some information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the processing corresponding to the specific control is executed as it is. It is possible to prevent it from happening. Further, even if an information error occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to “0”. The non-specific control work area 221 and the non-specific control work area 223 and the non-specific control stack area 224 are cleared to “0” due to the information abnormality in the specific control work area 221 or the specific control stack area 222. It is possible to do not.

  If the stack area 222 for specific control is cleared to “0”, the information of the return address after the execution of the RAM monitoring process is also deleted. Thus, when the stack area 222 for specific control is cleared to “0”, the process of step S5808 is ended, and then the process returns to the predetermined program. Specifically, it is configured to uniquely return to the processing of step S5013 in the main processing (FIG. 22). However, the program that returns uniquely is not limited to step S5013, and may be step S5221 in the timer interrupt process (FIG. 86). When the stack area 222 for the specific control is cleared to “0”, the stack order of the stack pointer of the main CPU 63 is also set to the address of the first storage area in the stack area 222 for the specific control.

  After that, an abnormal command indicating that the clearing process at the time of abnormal has occurred is transmitted to the sound emission control device 81 (step S5807). Upon receiving the abnormal command, the sound light emission control device 81 causes the display light emitting unit 53 to emit light in a mode corresponding to the forced clear, and causes the speaker unit 54 to output a sound of “forced clear”. In addition, a character image “Forcibly cleared.” Is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and is terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be ended when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the manager of the game hall can know that the work area 221 for specific control and the stack area 222 for specific control have been forcibly cleared.

  After that, a setting value update process is executed (step S5808). The processing content of the setting value update processing is the same as that in step S5412 in the RAM monitoring processing (FIG. 88) in the twenty-second embodiment.

  If it is not determined that there is an abnormality in both step S5801 and step S5803 (step S5802 and step S5804: NO), monitoring processing of the work area 223 for non-specific control is executed (step S5809). The contents of the monitoring process are the same as those in step S5405 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5809 that there is an abnormality (step S5810: YES), the work area 223 for non-specific control is cleared to “0” and initialization is performed (step S5811). In this case, all of the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, the operation result storage area 234, and the management start flag are cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control.

  On the other hand, in step S5811, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to “0”. As a result, even if an information error occurs in the non-specific control work area 223, the specific control work area 221, the specific control stack area 222, and the non-specific control stack area 224 are set to " "0" can be prevented from being cleared.

  In step S5811, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, and the operation result storage area 234 are cleared to "0", but the management start flag is not cleared to "0". It may be configured. In step S5811, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, and the management start flag are cleared to "0", but the operation result storage area 234 is not cleared to "0". It may be configured. In step S5811, the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode counter area 233 are cleared to "0", but the operation result storage area 234 and the management start flag are not cleared to "0". It may be configured.

  When a negative determination is made in step S5810 or when the process of step S5811 is performed, a monitoring process of the non-specific control stack area 224 is performed (step S5812). The contents of the monitoring process are the same as those in step S5407 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5812 that there is an abnormality (step S5813: YES), the stack area 224 for non-specific control is cleared to “0” and initialization is performed (step S5814). This makes it possible to eliminate the information abnormality in the non-specific control stack area 224.

  On the other hand, in step S5814, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to “0”. Thus, even if an information error occurs in the non-specific control stack area 224, the specific control work area 221, the specific control stack area 222, and the non-specific control work area 223 are set to " "0" can be prevented from being cleared.

  According to the above configuration, when it is determined that an abnormality has occurred in any of the specific control work area 221 and the specific control stack area 222, the specific control work area 221 is excluded except for the copy area. Is cleared to "0" and the stack area 222 for specific control is cleared to "0". Accordingly, when there is a possibility that some information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the processing corresponding to the specific control is executed as it is. It is possible to prevent it from happening.

  Even if the information abnormality occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to “0”. As a result, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to “0” due to information abnormality in the work area 221 for specific control or the stack area 222 for specific control. It is possible to do so.

  Even if the information abnormality occurs in the work area 223 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to “0”. This prevents the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control from being cleared to “0” due to the information abnormality in the work area 223 for non-specific control. It becomes possible.

  Even if the information abnormality occurs in the non-specific control stack area 224, the specific control work area 221, the specific control stack area 222, and the non-specific control work area 223 are not cleared to "0". As a result, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are prevented from being cleared to “0” due to the information abnormality in the stack area 224 for non-specific control. It becomes possible.

  When an information error has occurred in the work area 221 for specific control, the work area 221 for specific control is cleared to "0" except for the copy area, while the stack area 222 for specific control is cleared to "0". A configuration in which “0” is not cleared may be adopted.

  Further, when an information abnormality occurs in the stack area 222 for specific control, the stack area 222 for specific control is cleared to “0”, but the work area 221 for specific control is not cleared to “0”. It may be. In this case, even if the stack area 222 for specific control is cleared to “0”, the processing of steps S5805 to S5808 may not be performed.

<Twenty-fifth embodiment>
In the present embodiment, the processing configuration for monitoring whether or not an information abnormality has occurred in each of the areas 221 to 224 of the main RAM 65 is different from that of the above-mentioned twenty-second embodiment. Hereinafter, a configuration different from the twenty-second embodiment will be described. The description of the same configuration as that of the above-described twenty-second embodiment is basically omitted.

  FIG. 93 is a flowchart showing the RAM monitoring processing according to the present embodiment executed by the main CPU 63. The processing of steps S5901 to S5908 in the RAM monitoring processing is executed by the main CPU 63 using a program for specific control and data for specific control.

  First, monitoring processing of the work area 221 for specific control is executed (step S5901). The contents of the monitoring process are the same as those in step S5401 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5901 that there is an abnormality (step S5902: YES), processing in steps S5905 to S5908 is executed.

  If it is not determined in step S5901 that there is an abnormality (step S5902: NO), monitoring processing of the stack area 222 for specific control is executed (step S5903). The contents of the monitoring process are the same as those in step S5403 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5903 that there is an abnormality (step S5904: YES), the processing in steps S5905 to S5908 is executed.

  For details of the processing in steps S5905 to S5908, first, a setting value copy processing is executed (step S5905). In the copy processing, the information of the set value counter used to specify the set value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . Thus, even if the information of the set value counter is cleared to “0” in the abnormality clearing process (step S5906) executed thereafter, the pachinko machine 10 before the abnormality clearing process is executed. Can be grasped.

  Thereafter, a clearing process is performed at the time of abnormality (step S5906). In the clearing process at the time of abnormality, the work area 221 for specific control is cleared to “0” except for the copy area, and the stack area 222 for specific control is cleared to “0”. After clearing “0”, initial setting is performed. On the other hand, "0" clear of the work area 223 for non-specific control and the stack area 224 for non-specific control is not executed. That is, in the RAM monitoring process according to the present embodiment, when it is determined that an abnormality has occurred in any of the specific control work area 221 and the specific control stack area 222, the specific control is performed excluding the copy area. The work area 221 is cleared to "0", and the stack area 222 for specific control is cleared to "0". Accordingly, when there is a possibility that some information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the processing corresponding to the specific control is executed as it is. It is possible to prevent it from happening. Further, even if an information error occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to “0”. The non-specific control work area 221 and the non-specific control work area 223 and the non-specific control stack area 224 are cleared to “0” due to the information abnormality in the specific control work area 221 or the specific control stack area 222. It is possible to do not.

  After that, an abnormal command indicating that the clearing process at the time of the abnormality has occurred is transmitted to the sound emission control device 81 (step S5907). Upon receiving the abnormal command, the sound emission control device 81 causes the display light emitting unit 53 to emit light in a mode corresponding to the forced clear of the work area 221 for specific control and the stack area 222 for specific control, and the speaker unit 54 Output a sound saying "Forced clearing has been performed for specific control." In addition, a character image “Forced clear has been executed for the specific control” is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and is terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be ended when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the manager of the game hall can know that the work area 221 for specific control and the stack area 222 for specific control have been forcibly cleared.

  Thereafter, a setting value update process is executed (step S5908). The processing content of the setting value update processing is the same as that in step S5412 in the RAM monitoring processing (FIG. 88) in the twenty-second embodiment.

  As described above, in the RAM monitoring processing executed using the specific control program and the specific control data, information abnormality is monitored for the specific control work area 221 and the specific control stack area 222. However, information abnormality monitoring is not performed for the non-specific control work area 223 and the non-specific control stack area 224. The monitoring of the information abnormality for the non-specific control work area 223 and the non-specific control stack area 224 is performed in a process corresponding to the non-specific control using the non-specific control program and the non-specific control data. Executed.

  FIG. 94 is a flowchart showing the management execution process according to the present embodiment executed by the main CPU 63. The management execution process is executed by reading out a subroutine program in the management process (FIG. 70) as in the fifteenth embodiment. Further, the processing of steps S6001 to S6016 in the management execution processing is executed by the main CPU 63 using the non-specific control program and the non-specific control data.

  In steps S6001 to S6008 and steps S6010 to S6016, the same processes as those in steps S3901 to S3915 of the management execution process (FIG. 71) in the fifteenth embodiment are executed. In step S6009, another monitoring process is performed. When executing the separate monitoring process, a subroutine program corresponding to the different monitoring process set in the non-specific control program is executed. Information for specifying the return address of the later management execution processing is written to the non-specific control stack area 224 by a push command. Then, when the separate monitoring process is completed, information for specifying the return address is read by the pop instruction, and the process returns to the management execution process program indicated by the return address.

  FIG. 95 is a flowchart showing another monitoring process. Note that the processes of steps S6101 to S6108 in the separate monitoring process are executed by the main CPU 63 using the non-specific control program and the non-specific control data.

  First, monitoring processing of the work area 223 for non-specific control is executed (step S6101). The contents of the monitoring process are the same as those in step S5405 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S6101 that there is an abnormality (step S6102: YES), the work area 223 for non-specific control is cleared to “0” and initialization is performed (step S6103). In this case, all of the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, the operation result storage area 234, and the management start flag are cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control.

  On the other hand, in step S6103, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to “0”. As a result, even if an information error occurs in the non-specific control work area 223, the specific control work area 221, the specific control stack area 222, and the non-specific control stack area 224 are set to " "0" can be prevented from being cleared.

  In step S6103, although the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, and the operation result storage area 234 are cleared to "0", the management start flag is not cleared to "0". It may be configured. In step S6103, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, and the management start flag are cleared to "0", but the operation result storage area 234 is not cleared to "0". It may be configured. In step S6103, the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode counter area 233 are cleared to "0", but the operation result storage area 234 and the management start flag are not cleared to "0". It may be configured.

  Thereafter, a clear notification process is executed (step S6104). In the clear notification process, a command indicating that the work area 223 for non-specific control has been cleared to “0” is transmitted to the sound emission control device 81. Upon receiving the command, the voice light emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the forced clear of the work area 223 for non-specific control, and the “history information is forcibly cleared from the speaker unit 54”. ". In addition, a character image “History information has been forcibly cleared” is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and is terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be ended when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the manager of the gaming hall can grasp that the work area 223 for non-specific control has been forcibly cleared.

  When a negative determination is made in step S6102 or when the process of step S6104 is performed, a monitoring process of the non-specific control stack area 224 is performed (step S6105). The contents of the monitoring process are the same as those in step S5407 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S6105 that there is an abnormality (step S6106: YES), the stack area 224 for non-specific control is cleared to “0” and initialization is performed (step S6107). This makes it possible to eliminate the information abnormality in the non-specific control stack area 224.

  On the other hand, in step S6107, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to “0”. Thus, even if an information error occurs in the non-specific control stack area 224, the specific control work area 221, the specific control stack area 222, and the non-specific control work area 223 are set to " "0" can be prevented from being cleared.

  After that, a clear notification process is executed (step S6108). In the clear notification processing, a command indicating that the stack area 224 for non-specific control has been cleared to “0” is transmitted to the sound emission control device 81. Upon receiving the command, the sound light emission control device 81 causes the display light emitting unit 53 to emit light in a mode corresponding to the forced clear of the stack area 224 for non-specific control, and the “non-specific control stack is Forced to clear. " In addition, a character image "Stack of non-specific control has been forcibly cleared" is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and is terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be ended when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the manager of the gaming hall can grasp that the stack area 224 for non-specific control has been forcibly cleared.

  When the stack area 224 for non-specific control is forcibly cleared, the address of the program in step S6010 in the management execution process (FIG. 94) is uniquely set as the information of the return address after the execution of the separate monitoring process. . As a result, even if the stack area 224 for non-specific control is forcibly cleared, it is possible to return to the program that should originally return in the management execution process. When the stack area 224 for non-specific control is forcibly cleared, the storage order of the stack pointer of the main CPU 63 in the stack area 224 for non-specific control is set to the address of the first storage area.

  According to the above configuration, monitoring whether or not an information abnormality has occurred in the work area 221 for specific control and the stack area 222 for specific control is executed by the processing corresponding to the specific control in the main CPU 63, and Monitoring whether or not an information abnormality has occurred in the work area 223 for the specific control and the stack area 224 for the non-specific control is executed by a process corresponding to the non-specific control in the main CPU 63. Thus, the processing corresponding to the specific control and the processing corresponding to the non-specific control not only clearly distinguish the areas 221 to 224 of the main RAM 65 to be used, but also the area of the main RAM 65 to be monitored. 221 to 224 can also be clearly distinguished.

  When the work area 223 for non-specific control is cleared to “0”, the information of various registers of the main CPU 63 used in the processing corresponding to the specific control is stored in the work area 223 for non-specific control. The saved information is also cleared to “0”. In this case, even if the process corresponding to the non-specific control ends and returns to the process corresponding to the specific control, it may not be possible to return to the state before the process corresponding to the non-specific control is started. Therefore, when the work area 2223 for non-specific control is cleared to “0”, the work area 221 for specific control and the stack area 222 for specific control may be cleared to “0”. In this configuration, the set value counter in the work area 221 for specific control is also cleared to “0”. As a corresponding process, a configuration in which the set value update process is executed first may be adopted.

<Twenty-sixth embodiment>
In the present embodiment, the processing configuration of the management process is different from that of the twentieth embodiment. Hereinafter, a configuration different from the twentieth embodiment will be described. The description of the same configuration as that of the twentieth embodiment is basically omitted.

  FIG. 96 is a flowchart showing the management process according to the present embodiment executed by the main CPU 63. Note that the processing of steps S6201 to S6219 in the management processing is executed by the main CPU 63 using the specific control program and the specific control data.

  First, interrupt prohibition is set to prohibit the occurrence of the timer interrupt process (FIG. 69) (step S6201). This prevents a timer interrupt process (FIG. 69), which is a process corresponding to the specific control, from being interrupted and activated in the middle of a later-described management execution process, which is a process corresponding to the non-specific control. Becomes possible.

  Thereafter, the information of the stack pointer of the main CPU 63 is overwritten on the HL register of the main CPU 63 by a load instruction as “LD HL, SP” (step S6202). In this case, the information amount of the stack pointer is 16 bits, and the information amount of each of the H register and the L register is 8 bits. And the 8-bit information continuous from the lower side of the stack pointer is overwritten in the L register.

  After that, the load instruction issues “LD (HL), 0” to change the 1-byte storage area corresponding to the information of the stack pointer stored in the HL register of the main CPU 63 in the stack area 222 for specific control to “0”. It is cleared (step S6203). The information of the stack pointer of the main CPU 63 is overwritten in the HL register of the main CPU 63 in step S6202, and the information of the stack pointer of the main CPU 63 is not updated until the processing of step S6203 is executed. Since it has not been performed, in step S6203, the storage area of 1 byte corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control has been cleared to "0".

  Thereafter, as a “LD SP, SP-1”, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order in the stack area 222 for specific control by a load instruction. (Step S6204). When the specific control stack area 222 is used, the information to be stored is stored from the storage area of the last address in the specific control stack area 222, and each time the information to be stored is added, the specific control stack area 222 is stored. The storage area of the storage destination is changed toward the first address side of the stack area 222 of FIG. Therefore, in step S6204, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area having the smaller address by one address in the stack area 222 for specific control. By executing the processing in step S6204, the storage area in the next order with respect to the storage area cleared to "0" in step S6203 is set as a storage target of information according to the next push command, and in step S6203. The storage area cleared to “0” is set as a target for reading information by the next pop instruction.

  After that, the WA register of the main CPU 63 is cleared to "0" by a load instruction as "LD WA, 0" (step S6205). Also, the BC register of the main CPU 63 is cleared to "0" by a load instruction as "LD BC, 0" (step S6206). Also, the DE register of the main CPU 63 is cleared to "0" by a load instruction as "LD DE, 0" (step S6207). Also, the HL register of the main CPU 63 is cleared to "0" by a load instruction as "LD HL, 0" (step S6208). Also, the IX register of the main CPU 63 is cleared to "0" by a load instruction as "LD IX, 0" (step S6209). In addition, the IY register of the main CPU 63 is cleared to "0" by a load instruction as "LD IY, 0" (step S6210).

  The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the flag registers. In this case, in steps S6205 to S6210, the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register, which are some of the various general-purpose registers, the auxiliary registers, and the index registers, are written. Clear "0". The WA register, the BC register, the DE register, the HL register, the IX register, and the IY register are registers used in management execution processing (step S6212) corresponding to non-specific control. By clearing such registers to “0” prior to the execution of the management execution process (step S 6212) corresponding to the non-specific control, the state of these registers can be changed before the process corresponding to the non-specific control is started. In addition, the state immediately after the supply of the operating power to the main CPU 63 is started can be set.

  The information of the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register before the processing corresponding to the non-specific control starts after the processing corresponding to the non-specific control ends. This is unnecessary information in the process corresponding to the specific control. Therefore, even if the information in these registers is cleared to “0” without being saved, no problem occurs in the processing corresponding to the specific control that has been restored after the processing corresponding to the non-specific control has been completed.

  Thereafter, as a “POP PSW”, information is read from the storage area in the write order one immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control by a pop instruction, The read information is overwritten in the flag register of the main CPU 63 (step S6211). The information of the stack pointer of the main CPU 63 immediately before the execution of the pop instruction in step S6211 is the storage area in the next writing order with respect to the storage area in the specific control stack area 222 cleared to "0" in step S6203. Is the information corresponding to. Therefore, the storage area in the write order one before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the specific control stack area 222 is the storage area cleared to “0” in step S6203. . Then, the information read from this storage area is overwritten on the flag register of the main CPU 63, so that the flag register is cleared to "0". One storage area in the specific control stack area 222 has an information amount of 8 bits (1 byte), and the flag register of the main CPU 63 also has an information amount of 8 bits (1 byte). . By clearing the flag register to “0” prior to the execution of the management execution process (step S 6212) corresponding to the non-specific control, the state of the flag register can be changed before the process corresponding to the non-specific control is started. It is possible to set the state immediately after the supply of the operating power to the main CPU 63 is started.

  After that, the management execution process is started by reading out a subroutine program corresponding to the management execution process set in the non-specific control program (step S6212). In this case, information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for specific control by a push command. Then, when the management execution processing is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management processing program indicated by the return address.

  The contents of the management execution process are the same as the management execution process (FIG. 82) in the twentieth embodiment. Therefore, after the check processing is completed in the management execution processing, the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register are cleared to "0". As a result, these registers are cleared to "0" prior to the return from the process corresponding to the non-specific control to the process corresponding to the specific control. It is possible to set the state immediately after the supply of the operating power to the main CPU 63 is started.

  When the program returns to the management processing program after the execution of the management execution processing, processing for clearing the flag register of the main CPU 63 to “0” is executed. Specifically, first, as “PUSH HL”, the information of the HL register of the main CPU 63 is saved in the stack area 222 for specific control by a push command (step S6213). After the execution of the push instruction, the information of the stack pointer of the main CPU 63 includes information corresponding to the storage area of the next writing order in the storage area in which the information of the HL register is saved in the stack area 222 for specific control. Become.

  Thereafter, the information of the stack pointer of the main CPU 63 is overwritten on the HL register of the main CPU 63 by a load instruction as “LD HL, SP” (step S6214). In this case, the information amount of the stack pointer is 16 bits, and the information amount of each of the H register and the L register is 8 bits. And the 8-bit information continuous from the lower side of the stack pointer is overwritten in the L register.

  After that, the load instruction issues “LD (HL), 0” to change the 1-byte storage area corresponding to the information of the stack pointer stored in the HL register of the main CPU 63 in the stack area 222 for specific control to “0”. It is cleared (step S6215). The information of the stack pointer of the main CPU 63 is overwritten in the HL register of the main CPU 63 in step S6214, and the stack pointer of the main CPU 63 is not updated until the processing of step S6215 is executed. Since this is not performed, in step S6215, the 1-byte storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control is cleared to "0".

  Thereafter, as a “LD SP, SP-1”, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order in the stack area 222 for specific control by a load instruction. (Step S6216). When the specific control stack area 222 is used, the information to be stored is stored from the storage area of the last address in the specific control stack area 222, and each time the information to be stored is added, the specific control stack area 222 is stored. The storage area of the storage destination is changed toward the first address side of the stack area 222 of FIG. Therefore, in step S6216, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area on the side where the address of one in the stack area 222 for specific control is smaller. By executing the processing in step S6216, the storage area in the next order with respect to the storage area cleared to “0” in step S6215 is set as an information storage target by the next push instruction, and in step S6215. The storage area cleared to “0” is set as a target for reading information by the next pop command.

  Thereafter, as a “POP PSW”, information is read from the storage area in the write order one immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control by a pop instruction, The read information is overwritten on the flag register of the main CPU 63 (step S6217). The information of the stack pointer of the main CPU 63 immediately before the execution of the pop instruction in step S6217 is the same as the storage area in the next write order with respect to the storage area in the specific control stack area 222 cleared to “0” in step S6215. Is the information corresponding to. Therefore, the storage area of the write order immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the specific control stack area 222 is the specific control specific area cleared to “0” in step S6215. It becomes a storage area in the stack area 222. Then, the information read from this storage area is overwritten on the flag register of the main CPU 63, so that the flag register is cleared to "0". One storage area in the specific control stack area 222 has an information amount of 8 bits (1 byte), and the flag register of the main CPU 63 also has an information amount of 8 bits (1 byte). . By clearing the flag register to “0” after execution of the management execution process (step S 6212) which is a process corresponding to the non-specific control, the main CPU 63 sets the state of the flag register after the process corresponding to the non-specific control ends. Can be brought into a state immediately after the supply of the operating power to the power supply is started. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is one immediately before.

  Thereafter, the information of the HL register saved in the stack area 222 for specific control in step S6213 is returned to the HL register of the main CPU 63 as “POP HL” by a pop instruction (step S6218). Since the HL register is cleared to “0” immediately before the end of the management execution process (step S 6212), the information cleared to “0” is saved in the stack area 222 for specific control in step S 6213. At the same time, in step S6218, the information cleared to “0” is returned to the HL register of the main CPU 63, and as a result, the HL register of the main CPU 63 is cleared to “0”. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in the stack area 222 for specific control whose writing order is two before.

  Thereafter, interruption permission is set to switch from the state in which the generation of the timer interruption processing (FIG. 69) is prohibited to the state in which the generation is permitted (step S6219). As a result, new execution of the timer interrupt processing becomes possible.

  According to the configuration, the following effects can be obtained in addition to the effects described in the twentieth embodiment.

  When the process corresponding to the non-specific control is started from the situation where the process corresponding to the specific control is being executed, the flag register of the main CPU 63 is cleared to “0”. This eliminates the need to save information of the flag register used in the process corresponding to the specific control in the main RAM 65 in the situation where the process corresponding to the non-specific control is being executed. Therefore, there is no need to secure a capacity for saving the information.

  Further, the flag register of the main CPU 63 is cleared to "0" even when the process corresponding to the non-specific control is returned to the process corresponding to the specific control from the situation where the process corresponding to the non-specific control is being executed. Accordingly, when returning to the process corresponding to the specific control, it is possible to return the state of the flag register to the state immediately before the process corresponding to the non-specific control is started.

  The state in which the flag register is cleared to “0” is a state in which the supply of the operating power to the MPU 62 is started. This makes it possible to simplify the processing configuration for setting the flag register to a predetermined state when starting the processing corresponding to the non-specific control and when returning to the processing corresponding to the specific control.

  The information of the flag register of the main CPU 63 before the processing corresponding to the non-specific control is started is information that is not used in the processing corresponding to the specific control after the processing corresponding to the non-specific control ends. Accordingly, even if the flag register is cleared to “0” when the process corresponding to the non-specific control is started, the process corresponding to the specific control after the process corresponding to the non-specific control is completed is performed. It is possible to prevent the influence.

  A predetermined storage area of the stack area 222 for specific control is cleared to "0", and the flag register is cleared to "0" by overwriting the information of the cleared storage area in the flag register by a pop instruction. Configuration. This makes it possible to clear the flag register to “0” even in a configuration in which the clearing of “0” to the flag register is directly controlled by a load instruction.

  Instead of clearing the flag register to “0”, the flag register may be initialized. That is, when the supply of the operating power to the MPU 62 is started, the flag register of the main CPU 63 is once set to “0” and then the information is set to be in the initial state, but the steps S6202 to S6204 and In step S6211, the flag register may be set so as to be in the initial state. In this case, the flag register is set so as to be in the initial state also in steps S6213 to S6218, so that when returning to the processing corresponding to the specific control, the state of the flag register is set to the non-specific control. Can be restored to the state immediately before the processing corresponding to the processing is started.

  In steps S6202 to S6204 and step S6211, the flag register of the main CPU 63 may be set to "1" instead of clearing the flag register to "0". In this case, by setting "1" to all of the flag registers in steps S6213 to S6218 as well, when returning to the processing corresponding to the specific control, the state of the flag register starts the processing corresponding to the non-specific control. It is possible to return to the state immediately before the operation.

  Further, instead of the processing of steps S6202 to S6204 and S6211, the flag register of the main CPU 63 may be directly cleared to "0" by a load instruction as "LD PSW, 0". Further, instead of the processing of steps S6213 to S6218, a configuration may be employed in which the flag register of the main CPU 63 is directly cleared to “0” by a load instruction as “LD PSW, 0”.

  Further, instead of the configuration for executing the processing of steps S6213 and S6218, a configuration may be adopted in which the HL register is cleared to “0” by a load instruction as “LD HL, 0”. Even in this case, it is possible to restore the state of the HL register to the state immediately before the management execution processing, which is processing corresponding to the non-specific control, is executed.

  Further, instead of the configuration in which the process of clearing the flag register to “0” is performed in the process corresponding to the specific control, a configuration in which the process is performed in the process corresponding to the non-specific control may be adopted.

<Twenty-seventh embodiment>
In the present embodiment, the processing configuration of the management process is different from that of the twentieth embodiment. Hereinafter, a configuration different from the twentieth embodiment will be described. The description of the same configuration as that of the twentieth embodiment is basically omitted.

  FIG. 97 is a flowchart showing a management process according to the present embodiment executed by the main CPU 63. Note that the processing of steps S6301 to S6323 in the management processing is executed by the main CPU 63 using the specific control program and the specific control data.

  First, interrupt prohibition is set to prohibit the occurrence of the timer interrupt process (FIG. 69) (step S6301). This prevents a timer interrupt process (FIG. 69), which is a process corresponding to the specific control, from being interrupted and activated in the middle of a later-described management execution process, which is a process corresponding to the non-specific control. Becomes possible.

  Thereafter, as a “PUSH AF”, the information of the A register and the information of the flag register of the main CPU 63 are stored in the stack area 222 for specific control corresponding to the current stack pointer information of the main CPU 63 by a push instruction. The area and the storage area are evacuated to the storage areas in the next writing order (step S6302). Since the A register and the flag register of the main CPU 63 each have an information amount of 8 bits (1 byte), the information of the A register and the information of the flag register are individually stored in two storage areas having consecutive addresses. Will be evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in the stack area 222 for specific control in which the writing order is two later.

  After that, the information of the A register and the information of the flag register saved in the stack area 222 for specific control in step S6302 are overwritten on the HL register of the main CPU 63 as “POP HL” by a pop instruction (step S6303). . In this case, the information of the A register saved in the specific control stack area 222 is overwritten on the H register of the main CPU 63, and the information of the flag register saved in the specific control stack area 222 is stored in the L of the main CPU 63. Overwritten to the register. The H register and the L register of the main CPU 63 each have an information amount of 8 bits (1 byte). When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is two before.

  Thereafter, the A register of the main CPU 63 is cleared to "0" by a load instruction as "LD A, 0" (step S6304). Then, the information of the A register of the main CPU 63 is overwritten in the L register of the main CPU 63 by a load instruction as "LD L, A" (step S6305), and the load instruction is changed to "LD H, A" by the load instruction. The information of the A register of the main CPU 63 is overwritten on the H register of the main CPU 63 (step S6306). Since the A register has been cleared to “0” in step S6304, the information in the A register is overwritten on each of the L register and the H register, so that each of the L and H registers has been cleared to “0”. Becomes

  Thereafter, as a “PUSH HL”, the information of the HL register (that is, the H register and the L register) of the main CPU 63 corresponds to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The storage area and the storage area in the next writing order are saved to the storage area (step S6307). The H register and the L register of the main CPU 63 each have an information amount of 8 bits (1 byte). Will be evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in the stack area 222 for specific control in which the writing order is two later.

  After that, the BC register of the main CPU 63 is cleared to "0" by a load instruction as "LD BC, 0" (step S6308). Also, the DE register of the main CPU 63 is cleared to "0" by a load instruction as "LD DE, 0" (step S6309). Further, the IX register of the main CPU 63 is cleared to "0" by a load instruction as "LD IX, 0" (step S6310). In addition, as the “LD IY, 0”, the IY register of the main CPU 63 is cleared to “0” by the load instruction (step S6311).

  The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the flag registers. In this case, in steps S6308 to S6311, the BC register, the DE register, the IX register, and the IY register, which are some of the general-purpose registers, the auxiliary registers, and the index registers, are cleared to "0". The HL register has been cleared to "0" in steps S6305 and S6306. These BC register, DE register, HL register, IX register, and IY register are registers used in management execution processing (step S6313), which is processing corresponding to non-specific control. By clearing such registers to “0” prior to the execution of the management execution process (step S6313) corresponding to the non-specific control, the state of these registers can be changed before the process corresponding to the non-specific control is started. In addition, it is possible to set the state immediately after the supply of the operating power to the main CPU 63 is started.

  Further, the information of the BC register, the DE register, the HL register, the IX register, and the IY register before the process corresponding to the non-specific control is started is used for the specific control after the process corresponding to the non-specific control is completed. This is unnecessary information in the corresponding processing. Therefore, even if the information in these registers is cleared to “0” without being saved, no problem occurs in the processing corresponding to the specific control that has been restored after the processing corresponding to the non-specific control has been completed.

  After that, as “POP AF”, the pop-up command overwrites the A register and the flag register of the main CPU 63 with the information of the H register and the information of the L register saved in the stack area 222 for specific control in step S6307 (step S6307). Step S6312). In this case, the information of the H register saved in the stack area 222 for specific control is overwritten on the A register of the main CPU 63, and the information of the L register saved in the stack area 222 for specific control is stored in the flag of the main CPU 63. Overwritten to the register. Since both the information of the H register and the information of the L register saved in the stack area 222 for specific control are all “0” information, the A register of the main CPU 63 becomes "0" is cleared and the flag register of the main CPU 63 is cleared to "0". Thus, the state of the flag register can be set to a state immediately after the supply of the operating power to the main CPU 63 is started before the processing corresponding to the non-specific control is started. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is two before.

  Thereafter, the management execution process is started by reading out a subroutine program corresponding to the management execution process set in the non-specific control program (step S6313). In this case, information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for specific control by a push command. Then, when the management execution processing is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management processing program indicated by the return address.

  After the checking process is completed in the management execution process, the BC register, the DE register, the HL register, the IX register, and the IY register are cleared to "0". As a result, these registers are cleared to "0" prior to the return from the process corresponding to the non-specific control to the process corresponding to the specific control. It is possible to set the state immediately after the supply of the operating power to the main CPU 63 is started.

  When the program returns to the management processing program after the execution of the management execution processing, processing for clearing the flag register of the main CPU 63 to “0” is executed. In detail, first, as “PUSH HL”, the information of the HL register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S6314). After the execution of the push instruction, the information of the stack pointer of the main CPU 63 includes information corresponding to the storage area of the next writing order in the storage area in which the information of the HL register is saved in the stack area 222 for specific control. Become.

  Thereafter, as a “PUSH AF”, the information of the A register and the information of the flag register of the main CPU 63 are stored in the stack area 222 for specific control corresponding to the current stack pointer information of the main CPU 63 by a push instruction. The area and the storage area are evacuated to the respective storage areas in the next writing order (step S6315). Since the A register and the flag register of the main CPU 63 each have an information amount of 8 bits (1 byte), the information of the A register and the information of the flag register are individually stored in two storage areas having consecutive addresses. Will be evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in the stack area 222 for specific control in which the writing order is two later.

  Thereafter, the information of the A register and the information of the flag register saved in the stack area 222 for specific control in step S6315 are overwritten on the HL register of the main CPU 63 as “POP HL” by a pop instruction (step S6316). . In this case, the information of the A register saved in the specific control stack area 222 is overwritten on the H register of the main CPU 63, and the information of the flag register saved in the specific control stack area 222 is stored in the L of the main CPU 63. Overwritten to the register. The H register and the L register of the main CPU 63 each have an information amount of 8 bits (1 byte). When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is two before.

  Then, the A register of the main CPU 63 is cleared to "0" by a load instruction as "LD A, 0" (step S6317). Then, the information of the A register of the main CPU 63 is overwritten on the L register of the main CPU 63 by the load instruction as “LD L, A” (step S6318), and the load instruction is written as “LD H, A” by the load instruction. The information in the A register of the main CPU 63 is overwritten on the H register of the main CPU 63 (step S6319). Since the A register has been cleared to "0" in step S6317, the information in the A register is overwritten on each of the L register and the H register, so that each of the L and H registers has been cleared to "0". Becomes

  Thereafter, as a “PUSH HL”, the information of the HL register (that is, the H register and the L register) of the main CPU 63 corresponds to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The storage area and the storage area in the next writing order are saved to the storage area (step S6320). The H register and the L register of the main CPU 63 each have an information amount of 8 bits (1 byte). Will be evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in the stack area 222 for specific control in which the writing order is two later.

  After that, as the “POP AF”, the information of the H register and the information of the L register saved in the stack area 222 for specific control in step S6320 are overwritten on the A register and the flag register of the main CPU 63 by a pop command (step S6320). Step S6321). In this case, the information of the H register saved in the stack area 222 for specific control is overwritten on the A register of the main CPU 63, and the information of the L register saved in the stack area 222 for specific control is stored in the flag of the main CPU 63. Overwritten to the register. Since both the information of the H register and the information of the L register saved in the stack area 222 for specific control are all “0” information, the A register of the main CPU 63 is reset by executing the process of step S6321. "0" is cleared and the flag register of the main CPU 63 is cleared to "0". By clearing the flag register to “0” after executing the management execution process (step S6313) corresponding to the non-specific control, the main CPU 63 resets the state of the flag register after the process corresponding to the non-specific control ends. Can be brought into a state immediately after the supply of the operating power to the power supply is started. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is two before.

  Thereafter, the information of the HL register saved in the stack area 222 for specific control in step S6314 is returned to the HL register of the main CPU 63 as “POP HL” by a pop instruction (step S6322). Since the HL register is cleared to “0” immediately before the end of the management execution processing (step S6313), the information cleared to “0” is saved in the stack area 222 for specific control in step S6314. At the same time, in step S6322, the information cleared to “0” is returned to the HL register of the main CPU 63, and as a result, the HL register of the main CPU 63 is cleared to “0”. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in the stack area 222 for specific control whose writing order is two before.

  After that, interrupt permission is set to switch from the state in which the generation of the timer interrupt processing (FIG. 69) is prohibited to the state in which the timer interrupt processing is permitted (step S6233). As a result, new execution of the timer interrupt processing becomes possible.

  According to the above configuration, the flag register of the main CPU 63 can be cleared to "0" without executing the process of clearing the predetermined storage area in the stack area 222 for specific control to "0" by a load instruction. Becomes As a result, the flag register of the main CPU 63 can be cleared to “0” even if the clearing of a predetermined storage area in the specific control stack area 222 is restricted by a load instruction. Becomes possible.

  Instead of clearing the flag register to “0”, the flag register may be initialized. That is, when the supply of the operating power to the MPU 62 is started, the flag register of the main CPU 63 is once set to “0” and then the information is set to be in the initial state, but the steps S6302 to S6307 and In step S6312, the flag register may be set so as to be in the initial state. In this case, in steps S6314 to S6322, the flag register is set so as to be in the initial state, so that when returning to the process corresponding to the specific control, the state of the flag register is set to the non-specific control. Can be restored to the state immediately before the processing corresponding to the processing is started.

  Also, in steps S6302 to S6307 and step S6312, instead of the configuration in which the flag register of the main CPU 63 is cleared to "0", a configuration in which all the flag registers are set to "1" may be adopted. In this case, by setting "1" to all of the flag registers in steps S6314 to S6322, when returning to the processing corresponding to the specific control, the state of the flag register is changed to the processing corresponding to the non-specific control. It is possible to return to the state immediately before the operation.

  Further, the configuration may be such that the processes of steps S6302 and S6303 are not performed. In this case, the processing configuration can be simplified.

  Further, the configuration may be such that the processes of step S6315 and step S6316 are not executed. In this case, the processing configuration can be simplified.

  Further, instead of the configuration for executing the processing of steps S6302 to S6306, after the HL register is cleared to “0” by a load instruction as “LD HL, 0”, the HL register that has been cleared to “0” is pushed. The flag register of the main CPU 63 may be cleared to "0" by returning the information saved by the pop instruction to the AF register after saving the information to the stack area 222 for specific control.

  Further, instead of the configuration in which the process of clearing the flag register to “0” is performed in the process corresponding to the specific control, a configuration in which the process is performed in the process corresponding to the non-specific control may be adopted.

<28th embodiment>
This embodiment is different from the fifteenth embodiment in the processing configuration of the management process. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

  FIG. 98 is a flowchart showing a management process according to this embodiment, which is executed by the main CPU 63. Note that the processes of steps S6401 to S6416 in the management process are executed by the main CPU 63 using the specific control program and the specific control data.

  First, interrupt prohibition is set to prohibit the occurrence of the timer interrupt process (FIG. 69) (step S6401). This prevents a timer interrupt process (FIG. 69), which is a process corresponding to the specific control, from being interrupted and activated in the middle of a later-described management execution process, which is a process corresponding to the non-specific control. Becomes possible.

  Thereafter, as a “PUSH WA”, the information of the WA register (that is, the W register and the A register) of the main CPU 63 corresponds to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The storage area and the storage area in the next writing order are saved to the storage area (step S6402). Since the W register and the A register of the main CPU 63 each have an information amount of 8 bits (1 byte), the information of the W register and the A register are individually saved in two storage areas having consecutive addresses. You. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in the stack area 222 for specific control in which the writing order is two later.

  After that, the information of the flag register of the main CPU 63 is overwritten on the A register of the main CPU 63 by a load instruction as “LD A, PSW” (step S6403). In this case, both the flag register and the A register have an information amount of 8 bits (1 byte). Then, as "LD (_FGBUF), A", the information of the A register of the main CPU 63 is saved to the FG buffer set in the work area 221 for specific control by a load instruction (step S6404). Since the information in the flag register has been overwritten in the A register in step S6403, the information in the flag register is saved in the work area 221 for specific control by executing step S6404.

  Thereafter, the information of the WA register saved in the stack area 222 for specific control in step S6402 is returned to the WA register of the main CPU 63 as “POP WA” by a pop command (step S6405). Thereby, even if the A register is used to save the information of the flag register to the work area 221 for specific control, it is possible to return the state of the A register to the state before the saving was performed. Become. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is two before.

  After that, the management execution process is started by reading out a subroutine program corresponding to the management execution process set in the non-specific control program (step S6406). In this case, information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for specific control by a push command. Then, when the management execution processing is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management processing program indicated by the return address.

  Note that the processing content of the management execution processing is the same as the management execution processing (FIG. 71) in the fifteenth embodiment. Therefore, before the check processing is started in the management execution processing, each information of the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register of the main CPU 63 is saved in the work area 223 for non-specific control. At the same time, the information saved in the non-specific control work area 223 after the completion of the check process in the management execution process is stored in the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63. Is returned to. As a result, the states of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 can be the same before and after the check processing.

  However, the present invention is not limited to this, and the configuration of the management execution process may be the same as the management execution process (FIG. 78) in the seventeenth embodiment. The configuration may be the same as (FIG. 79) or the same as the management execution process (FIG. 80) in the nineteenth embodiment.

  When the process returns to the management process program after the execution of the management execution process, a process for returning the information of the flag register of the main CPU 63 to a state before the execution of the management execution process is executed. In detail, first, as “PUSH HL”, the information of the HL register of the main CPU 63 is saved in the stack area 222 for specific control by a push command (step S6407). After the execution of the push instruction, the information of the stack pointer of the main CPU 63 includes information corresponding to the storage area of the next writing order in the storage area in which the information of the HL register is saved in the stack area 222 for specific control. Become.

  Thereafter, as a “PUSH WA”, the information of the WA register of the main CPU 63 is saved in the stack area 222 for specific control by a push command (step S6408). After the execution of the push instruction, the information of the stack pointer of the main CPU 63 includes the information corresponding to the storage area of the next writing order in the storage area where the information of the WA register is saved in the stack area 222 for specific control. Become.

  Thereafter, the information of the stack pointer of the main CPU 63 is overwritten on the HL register of the main CPU 63 by a load instruction as “LD HL, SP” (step S6409). In this case, the information amount of the stack pointer is 16 bits, and the information amount of each of the H register and the L register is 8 bits. And the 8-bit information continuous from the lower side of the stack pointer is overwritten in the L register.

  Thereafter, the information of the flag register saved in the FG buffer in the work area 221 for specific control in step S6406 is overwritten in the A register of the main CPU 63 as “LD A, (_FGBUF)” by the load instruction (step S 6406). S6410). As a load instruction, “LD (HL), A” is stored in the 1-byte storage area corresponding to the information of the stack pointer stored in the HL register of the main CPU 63 in the stack area 222 for specific control. The information of the A register of the CPU 63 is stored (step S6411). Thus, the information of the flag register saved in the FG buffer in the work area 221 for specific control in step S6404 is saved in the stack area 222 for specific control.

  Thereafter, as a “LD SP, SP-1”, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order in the stack area 222 for specific control by a load instruction. (Step S6412). When the specific control stack area 222 is used, the information to be stored is stored from the storage area of the last address in the specific control stack area 222, and each time the information to be stored is added, the specific control stack area 222 is stored. The storage area of the storage destination is changed toward the first address side of the stack area 222 of FIG. Accordingly, in step S6412, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area of the stack area 222 for specific control where the address is smaller by one address. By executing the processing of step S6412, the next storage area is set as a storage target of information by the next push instruction with respect to the storage area in which the information of the A register is saved in step S6411, and In step S6411, the storage area in which the information of the A register has been saved is set as a target of reading information by the next pop instruction.

  Thereafter, as a “POP PSW”, information is read from the storage area in the write order one immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control by a pop instruction, The read information is overwritten on the flag register of the main CPU 63 (step S6413). The information of the stack pointer of the main CPU 63 immediately before the execution of the pop instruction in step S6413 is the same as the information corresponding to the storage area in the next writing order with respect to the storage area in which the information of the A register is saved in step S6411. Has become. Accordingly, in the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for the specific control, the storage area in which the write order is one before the storage area in which the information of the A register is saved in step S6411. Area. Then, the information read from this storage area is overwritten on the flag register of the main CPU 63, so that the information of the flag register saved in the FG buffer in the work area 221 for specific control in step S6404 is stored in the flag of the main CPU 63. It will be restored to the register. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is one immediately before.

  After that, the information of the WA register saved in the stack area 222 for specific control in step S6408 is returned to the WA register of the main CPU 63 as “POP WA” by a pop instruction (step S6414). When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is two before. In addition, the information of the HL register saved in the stack area 222 for specific control in step S6407 is returned to the HL register of the main CPU 63 as “POP HL” by a pop instruction (step S6415). When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is two before.

  Thereafter, interrupt permission is set to switch from the state in which the generation of the timer interrupt processing (FIG. 69) is prohibited to the state in which the timer interrupt processing is permitted (step S6416). As a result, new execution of the timer interrupt processing becomes possible.

  According to the above configuration, when the process corresponding to the non-specific control is started from the situation where the process corresponding to the specific control is being executed, the information of the flag register of the main CPU 63 is not stored in the stack area 222 for the specific control. It is possible to retreat to the work area 221 for specific control. When the process corresponding to the non-specific control is executed and the process corresponding to the specific control is restored, the information of the flag register saved in the specific control work area 221 is stored in the flag of the main CPU 63. It returns to the register. This allows the information to be returned to the flag register of the main CPU 63 from the storage area of the specific control work area 221 specified on the program without referring to the information of the stack pointer of the main CPU 63. Even if the information of the stack pointer of the side CPU 63 has been rewritten due to noise or the like, the information can be restored to the flag register of the main CPU 63.

  Also, instead of the configuration in which the process of saving the information of the flag register in the main RAM 65 is performed in the process corresponding to the specific control, the configuration may be such that the process is performed in the process corresponding to the non-specific control. Further, instead of the configuration in which the processing of returning the information of the flag register saved in the main RAM 65 to the flag register of the main CPU 63 is executed in the processing corresponding to the specific control, the processing corresponding to the non-specific control is performed. It may be configured to be executed.

<Twenty-ninth embodiment>
This embodiment is different from the fifteenth embodiment in the processing configuration of the management process. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

  FIG. 99 is a flowchart showing a management process in the present embodiment executed by the main CPU 63. Note that the processing of steps S6501 to S6519 in the management processing is executed by the main CPU 63 using the specific control program and the specific control data.

  First, interrupt prohibition is set to prohibit the occurrence of the timer interrupt process (FIG. 69) (step S6501). This prevents a timer interrupt process (FIG. 69), which is a process corresponding to the specific control, from being interrupted and activated in the middle of a later-described management execution process, which is a process corresponding to the non-specific control. Becomes possible.

  Thereafter, as a “PUSH HL”, the information of the HL register (that is, the H register and the L register) of the main CPU 63 corresponds to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The storage area and the storage area in the next write order are saved to the storage area (step S6502). Since the H register and the L register of the main CPU 63 each have an information amount of 8 bits (1 byte), the information of the H register and the L register is individually saved in two storage areas having consecutive addresses. You. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in the stack area 222 for specific control in which the writing order is two later.

  Thereafter, as a “PUSH AF”, the information of the A register and the information of the flag register of the main CPU 63 are stored in the stack area 222 for specific control corresponding to the current stack pointer information of the main CPU 63 by a push instruction. The area and the storage area are saved in the storage areas in the next writing order (step S6503). Since the A register and the flag register of the main CPU 63 each have an information amount of 8 bits (1 byte), the information of the A register and the information of the flag register are individually stored in two storage areas having consecutive addresses. Will be evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in the stack area 222 for specific control in which the writing order is two later.

  Thereafter, the information of the A register and the information of the flag register saved in the stack area 222 for specific control in step S6503 are overwritten on the HL register of the main CPU 63 as “POP HL” by a pop instruction (step S6504). . In this case, the information of the A register saved in the specific control stack area 222 is overwritten on the H register of the main CPU 63, and the information of the flag register saved in the specific control stack area 222 is stored in the L of the main CPU 63. Overwritten to the register. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is two before.

  Thereafter, the information of the L register of the main CPU 63 is overwritten on the A register of the main CPU 63 by a load instruction as “LD A, L” (step S6505). Since the information of the flag register of the main CPU 63 is overwritten in the L register in step S6504, the information of the flag register is overwritten on the A register by overwriting the information of the L register with the A register. Become. Then, as "LD (_FGBUF), A", the information of the A register of the main CPU 63 is saved in the FG buffer set in the work area 221 for specific control by a load instruction (step S6506). Since the information in the flag register has been overwritten in the A register in step S6505, the information in the flag register is saved in the work area 221 for specific control by executing step S6506.

  Thereafter, as a “PUSH HL”, the information of the HL register (that is, the H register and the L register) of the main CPU 63 corresponds to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The storage area and the storage area in the next writing order are saved to the storage area (step S6507). In this case, since the information of the A register and the information of the flag register are overwritten in the HL register in step S6504, the information of the A register and the information of the flag register are saved in the stack area 222 for specific control in step S6507. I was made to. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in the stack area 222 for specific control in which the writing order is two later.

  After that, as the “POP AF”, the pop register instructs the A register and the flag register of the main CPU 63 to overwrite the information of the H register and the information of the L register saved in the stack area 222 for specific control in step S6507 (FIG. Step S6508). In this case, the information of the H register saved in the stack area 222 for specific control is overwritten on the A register of the main CPU 63, and the information of the L register saved in the stack area 222 for specific control is stored in the flag of the main CPU 63. Overwritten to the register. The information of the H register saved in the stack area 222 for specific control is the information of the A register at the time of step S6503, and the information of the L register saved in the stack area 222 for specific control is the flag at the time of step S6503. This is register information. Therefore, by executing the processing of step S6508, the states of the A register and the flag register of the main CPU 63 return to the state at the time of step S6503. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is two before.

  Thereafter, the information of the HL register saved in the stack area 222 for specific control in step S6502 is returned to the HL register of the main CPU 63 as “POP HL” by a pop command (step S6509). Thus, the state of the HL register of the main CPU 63 returns to the state at the time of step S6502. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is two before.

  After that, the management execution process is started by reading out a subroutine program corresponding to the management execution process set in the non-specific control program (step S6510). In this case, information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for specific control by a push command. Then, when the management execution processing is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management processing program indicated by the return address.

  In the management execution process, before the check process is started, each information of the BC register, the DE register, the HL register, the IX register, and the IY register of the main CPU 63 is saved in the work area 223 for non-specific control, After the checking process is completed in the management execution process, the information saved in the non-specific control work area 223 is returned to the BC, DE, HL, IX, and IY registers of the main CPU 63. Thus, the BC register, the DE register, the HL register, the IX register, and the IY register of the main CPU 63 can be set to the same state before and after the check processing.

  However, the present invention is not limited to this, and the configuration of the management execution process may be the same as the management execution process (FIG. 78) in the seventeenth embodiment. The configuration may be the same as (FIG. 79) or the same as the management execution process (FIG. 80) in the nineteenth embodiment.

  When the process returns to the management process program after the execution of the management execution process, a process for returning the information of the flag register of the main CPU 63 to a state before the execution of the management execution process is executed. More specifically, first, as “PUSH HL”, the information of the HL register of the main CPU 63 is saved in the stack area 222 for specific control by a push command (step S6511). After the execution of the push instruction, the information of the stack pointer of the main CPU 63 includes information corresponding to the storage area of the next writing order in the storage area in which the information of the HL register is saved in the stack area 222 for specific control. Become.

  Thereafter, as a “PUSH AF”, the information of the A register and the information of the flag register of the main CPU 63 are stored in the stack area 222 for specific control corresponding to the current stack pointer information of the main CPU 63 by a push instruction. The area and the storage area are evacuated to the respective storage areas in the next writing order (step S6512). Since the A register and the flag register of the main CPU 63 each have an information amount of 8 bits (1 byte), the information of the A register and the information of the flag register are individually stored in two storage areas having consecutive addresses. Will be evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in the stack area 222 for specific control in which the writing order is two later.

  Thereafter, the information of the A register and the information of the flag register saved in the stack area 222 for specific control in step S6512 are overwritten on the HL register of the main CPU 63 as “POP HL” by a pop instruction (step S6513). . In this case, the information of the A register saved in the specific control stack area 222 is overwritten on the H register of the main CPU 63, and the information of the flag register saved in the specific control stack area 222 is stored in the L of the main CPU 63. Overwritten to the register. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is two before.

  Thereafter, the information of the flag register at the time of step S6503 saved in the FG buffer in the specific control work area 221 in step S6506 by the load instruction as “LD A, (_FGBUF)” is stored in the A register of the main CPU 63. Is overwritten (step S6514). Then, the information in the A register of the main CPU 63 is overwritten on the L register of the main CPU 63 by a load instruction as "LD L, A" (step S6515). Since the information of the flag register of the main CPU 63 at the time of step S6503 has been restored to the A register in step S6514, the information of the A register is overwritten on the L register, so that the L register at the time of step S6503 is stored in the L register. The information in the flag register is overwritten.

  Thereafter, as a “PUSH HL”, the information of the HL register (that is, the H register and the L register) of the main CPU 63 corresponds to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The storage area and the storage area in the next writing order are saved to the storage area (step S6516). In this case, since the H register is overwritten with the information of the A register at the time of step S6512 in step S6513, the information of the A register is saved in the stack area 222 for specific control in step S6516. Become. Further, since the information of the flag register at the time of step S6503 has been overwritten in the L register in step S6515, the information of the flag register has been saved in the stack area 222 for specific control in step S6516.

  After that, as the “POP AF”, the pop register instructs the A register and the flag register of the main CPU 63 to overwrite the information of the H register and the information of the L register saved in the stack area 222 for specific control in step S6516 (step S6516). Step S6517). In this case, the information of the H register saved in the stack area 222 for specific control is overwritten on the A register of the main CPU 63, and the information of the L register saved in the stack area 222 for specific control is stored in the flag of the main CPU 63. Overwritten to the register. The information of the H register saved in the specific control stack area 222 is the information of the A register at the time of step S6512, and the information of the L register saved in the specific control stack area 222 is the flag at the time of step S6503. This is register information. Therefore, by executing the processing of step S6517, the state of the A register of the main CPU 63 returns to the state of step S6512, and the state of the flag register returns to the state at the time of step S6503.

  Incidentally, the A register of the main CPU 63 is not used in the management execution process. Therefore, the state of the A register at the time of step S6512 is the state of the A register at the time of step S6508, and the state of the A register at the time of step S6508 is the state of the A register at the time of step S6503. Therefore, by executing the process of step S6517, the states of the A register and the flag register of the main CPU 63 return to the state at the time of step S6503. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is two before.

  Thereafter, the information of the HL register saved in the stack area 222 for specific control in step S6511 is returned to the HL register of the main CPU 63 as “POP HL” by a pop instruction (step S6518). Thus, the state of the HL register of the main CPU 63 returns to the state at the time of step S6511. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area in which the writing order in the stack area 222 for specific control is two before.

  Thereafter, interruption permission is set to switch from the state in which the generation of the timer interruption processing (FIG. 69) is prohibited to the state in which the generation is permitted (step S6519). As a result, new execution of the timer interrupt processing becomes possible.

  According to the above configuration, the information of the flag register of the main CPU 63 is not executed by executing the load instruction by directly executing the process of directly overwriting the information of the flag register from the flag register of the main CPU 63 to the other registers of the main CPU 63. Can be saved to the work area 221 for specific control.

  Instead of executing the processing of steps S6505 to S6508, instead of executing the processing of step S6504, the information of the flag register was overwritten by a load instruction as “LD (_FGBUF), L”. By saving the information of the L register in the FG buffer, the information of the flag register may be saved in the work area 221 for specific control.

  In addition, without executing the processing of step S6514 and step S6515, instead of executing the processing of step S6513, the work area for specific control is designated as “LD L, (_FGBUF)” by a load instruction. 221 may be configured to overwrite the information of the flag register saved in the L register.

  Also, instead of the configuration in which the process of saving the information of the flag register in the main RAM 65 is performed in the process corresponding to the specific control, the configuration may be such that the process is performed in the process corresponding to the non-specific control. Further, instead of the configuration in which the processing of returning the information of the flag register saved in the main RAM 65 to the flag register of the main CPU 63 is executed in the processing corresponding to the specific control, the processing corresponding to the non-specific control is performed. It may be configured to be executed.

<Thirtieth embodiment>
In the present embodiment, the processing configuration executed by the main CPU 63 is different from that of the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

  FIG. 100 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing of steps S6601 to S6621 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63.

  First, a power-on wait process is executed (step S6601). In the power-on wait process, for example, the process waits without advancing to the next process until a predetermined time for wait (specifically, one second) elapses after the main process is started. In the execution period of the power-on wait processing, the operation start and the initial setting of the symbol display device 41 are completed. Thereafter, access to the main RAM 65 is permitted (step S6602).

  Thereafter, it is determined whether or not “1” is set in the power failure flag provided in the work area 221 for specific control in the main RAM 65 (step S6603). If “1” is set in the power failure flag (step S6603: YES), a checksum is calculated for the specific control work area 221 and the specific control stack area 222 (step S6604).

  The method of calculating the checksum is arbitrary. For example, a calculation method of adding all the numerical values of the storage area for which the checksum is to be calculated can be used. The method of calculating the checksum is the same as the method of calculating the checksum in the process at the time of power failure described later. The checksum calculated in the process at the time of a power failure to be described later is stored in the work area 221 for specific control. At this time, it is excluded from the storage area to be operated.

  That is, when calculating the checksum, some storage areas in the specific control work area 221 and the specific control stack area 222 are to be calculated. In the storage area to be calculated, the checksum is calculated in the process at the time of power failure when the supply of the operating power to the MPU 62 is stopped, and then the supply of the operating power to the MPU 62 is restarted, and the process of step S6604 is executed. Until the power supply such as the backup power to the work area 221 for specific control and the stack area 222 for specific control is continued, the storage area is basically not rewritten. Therefore, the information of the specific control work area 221 and the specific control stack area 222 is not changed between the time when the supply of the operation power to the MPU 62 is stopped and the time when the supply of the operation power to the MPU 62 is restarted. In this case, the checksums for the specific control work area 221 and the specific control stack area 222 are the same as those immediately before the supply of the operating power to the MPU 62 is stopped. In the storage area to be calculated when calculating the checksum, an area in which the setting value information indicating the setting state of the pachinko machine 10 in the specific control work area 221 is set (specifically, a setting value counter) )It is included.

  After that, the specific control work area 221 and the specific control stack area calculated in the power failure process executed immediately before the supply of the operation power to the MPU 62 is stopped and stored in the specific control work area 221 The checksum for 222 is read from the work area 221 for specific control, and the read checksum is compared with the checksum calculated in step S6604 (step S6605). Then, it is determined whether or not the checksums match (step S6606).

  Here, the power failure information storage processing executed by the main CPU 63 will be described with reference to the flowchart of FIG. The power failure information storage processing is executed in step S6801 in a timer interrupt processing (FIG. 103) described later.

  In the power failure information storage process, first, information “10”, which is information on the number of repetitions for a power failure signal, is set in a repetition counter provided in the work area 221 for specific control (step S6701), and the work area for specific control 221 is cleared to "0" (step S6702).

  Thereafter, a process of reading information of the power failure signal received at the input port of the MPU 62 is executed (step S6703). In this case, if a power failure signal (LOW level power failure signal) corresponding to the absence of power interruption has been received, information “0” is stored in the input port as non-power interruption information, When a power failure signal (HI level power failure signal) corresponding to the occurrence of power interruption has been received, information “1” is stored in the input port as power failure occurrence information. In step S6703, a process of reading the information of the power failure signal into the register of the main CPU 63 is executed.

  If the information of the power failure signal read in step S6703 corresponds to the occurrence of a power failure (the occurrence of a power failure) (step S6704: YES), the numerical information of the power failure detection counter is incremented by one (step S6705). If a negative determination is made in step S6704 or if the process in step S6705 is performed, the numerical information of the repetition counter is decremented by one (step S6706). Then, it is determined whether the numerical information of the repetition counter after the subtraction of 1 is “0” (step S6707). If a negative determination is made in step S6707, the process returns to step S6703 and repeats the processing of steps S6703 to S6706. On the other hand, if an affirmative determination is made in step S6707, the flow advances to step S6708.

  In step S6708, it is determined whether or not the current numerical information of the power failure detection counter is equal to or more than the trigger reference number corresponding to the power failure occurrence. If the number is less than the trigger reference number of times, the power outage information storage processing is terminated as it is. On the other hand, if the number of times is equal to or more than the trigger reference number, the power failure processing of steps S6709 to S6712 is executed.

  Specifically, first, “1” is set to a power failure flag provided in the work area 221 for specific control (step S6709). Thereby, when the process at the time of power failure is executed normally and the storage of the information in the main RAM 65 is normally performed, the supply of the operating power to the main CPU 63 is started again when the specific control "1" is set in the power failure flag of the work area 221.

  After that, a checksum is calculated for the specific control work area 221 and the specific control stack area 222 (step S6710). In this case, the storage area in the specific control work area 221 and the specific control stack area 222 to be calculated when the checksum is calculated becomes the checksum calculation target in step S6604 of the main processing (FIG. 100). It is the same as the storage area in the work area 221 for specific control and the stack area 222 for specific control. In the storage area to be calculated when calculating the checksum, an area (specifically, a setting value counter) in which setting value information indicating the setting state of the pachinko machine 10 in the work area 221 for specific control is set. )It is included. Then, the calculated checksum is stored in the storage area for storing the checksum in the work area 221 for specific control, which is excluded from the calculation target of the checksum.

  Thereafter, the information of the output port in the register of the main CPU 63 is all set to "0" (step S6711), and the access to the main RAM 65 is prohibited (step S6712). Then, the infinite loop is continued until the power supply is completely cut off and the processing cannot be executed.

  Since the power failure information storage process is executed as the first process of the timer interrupt process, it is not necessary to execute the process during the timer interrupt process after the power is restored. As a result, it is not necessary to store the address of the processing being executed at the time of the power failure as stack information in the main RAM 65, and the processing load of the processing at the time of the power failure can be reduced.

  Returning to the description of the main process (FIG. 100), if a negative determination is made in step S6603 or step S6606, a clear process at the time of non-setting update is executed (step S6607). In the clear processing at the time of non-setting update, the specific control is performed except for an area (specifically, a set value counter) in which the setting value information indicating the setting state of the pachinko machine 10 in the specific control work area 221 is set. Is cleared to "0" and the initial setting is executed. As a result, since the area indicating whether the winning / rejecting lottery mode is the high probability mode is cleared to “0”, the winning / rejecting lottery is performed regardless of the winning / rejecting lottery mode immediately before the supply of the operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game is not executed, the opening / closing execution mode is not executed, and the general-purpose display unit 38a is not variably displayed, and the general electric functioning object 34a is in the closed state. Situation. In addition, since the hold storage area 65a and the ordinary power hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is erased and the general figure display unit is cleared. The hold information for 38a is deleted. In the clearing process at the time of non-setting update, the stack area 222 for specific control is cleared to "0" and the initial setting is executed. In the clearing process at the time of non-setting update, initial setting is executed after various registers of the main CPU 63 are also cleared to "0".

  On the other hand, in the clearing process at the time of non-specific update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to “0”. As a result, even if the power failure flag is not set to “1” due to the failure of the power failure process, the work area 223 for non-specific control and the stack area 224 for non-specific control are set to “0”. It becomes possible not to be cleared. Further, even if an error occurs in the checksum of the work area 221 for specific control and the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to “0”. It is possible not to be performed.

  If a negative determination is made in step S6603 or step S6606, and the clear processing at the time of non-setting update is executed in step S6607, then the value of the set value counter in the work area 221 for specific control is checked to check the pachinko machine. It is determined whether the set value of 10 is normal (step S6608). Specifically, when the setting value set in the setting value counter is any one of “Setting 1” to “Setting 6”, it is determined that the setting is normal, and when the setting value is “0” or 7 or more, an abnormality is determined. It is determined that there is. If the set value is abnormal (step S6608: NO), a process (steps S6611 to S6621) for newly setting the set value described below is executed. This makes it possible to monitor whether the set value is normal even in the case where a negative determination is made in step S6603 or step S6606 and the non-setting update clearing process (step S6607) is executed. In addition, when the set value is abnormal, the set value can be reset.

  If the set value is normal (step S6608: YES), power-on setting processing is executed (step S6609). In the power-on setting process, a predetermined area of the work area 221 for specific control such as initialization of a power failure flag is set to an initial value, and a command corresponding to the current game state is transmitted to the sound emission control device 81.

  Although the main CPU 63 is configured to periodically execute the timer interrupt process, the occurrence of the timer interrupt process is prohibited when the main process is started. The state in which the generation of the timer interrupt processing is prohibited is released at a timing before the processing of step S6610 is completed after the processing of step S6609 is completed, and the execution of the timer interrupt processing is permitted. As a result, when the supply of the operating power to the main CPU 63 is started, the power-on setting process in step S6609 ends, and the timer interrupt process is not executed until the stage before the process in step S6610 is started. Therefore, the processing for advancing the game by the main CPU 63 is not started until the situation is reached.

  After that, the process proceeds to the remaining process of steps S6610 to S6613. That is, the main CPU 63 is configured to periodically execute the timer interrupt process, but a remaining time is generated between one timer interrupt process and the next timer interrupt process. Although the remaining time varies according to the processing completion time of each timer interrupt process, the remaining process of step S6610 to step S6613 is repeatedly executed using the irregular time. In this regard, it can be said that the remaining processes in steps S6610 to S6613 are irregular processes that are executed irregularly. In steps S6610 to S6613, the same processing as steps S113 to S116 of the main processing (FIG. 9) in the first embodiment is executed.

  As described above, in the present embodiment, when the supply of the operating power to the main CPU 63 is started, when the power failure flag of the work area 221 for specific control is not set to “1”, or the checksums do not match. In this case, if the set value is normal after executing the non-setting update clearing process (step S6608: YES), the process proceeds to a process for advancing the game. As a result, even if the power failure flag is not set to “1” due to the failure of the power failure process, the power ON / OFF operation is performed again after the supply of the operating power to the main CPU 63 is started. There is no need to perform an OFF operation. Further, even if an error occurs in the checksum of the work area 221 for specific control and the stack area 222 for specific control, the power is turned ON / OFF again after the supply of the operating power to the main CPU 63 is started. No action is required.

  If an affirmative determination is made in both step S6603 and step S6606, it is determined whether the set value of the pachinko machine 10 is normal by checking the value of the set value counter in the work area 221 for specific control (step S6614). ). Specifically, when the setting value set in the setting value counter is any one of “Setting 1” to “Setting 6”, it is determined that the setting is normal, and when the setting value is “0” or 7 or more, an abnormality is determined. It is determined that there is. If the set value is abnormal (step S6614: NO), a process (steps S6611 to S6621) for newly setting the set value described below is executed.

  If the setting value is normal (step S6614: YES), it is determined whether or not the reset button 68c has been pressed (step S6615), and whether or not the setting key insertion unit 68a has been turned on using the setting key. It is determined whether or not the front door frame 14 is open with respect to the inner frame 13 (step S6616), and whether or not the gaming machine body 12 is open with respect to the outer frame 11 (step S6617). It is determined whether or not there is (step S6618).

  In this embodiment, a front door opening sensor 95 for detecting whether or not the front door frame 14 is in an open state with respect to the inner frame 13 is electrically connected to the main CPU 63. The detection result of 95 is input to the main CPU 63. In this case, when the front door frame 14 is in the closed state with respect to the inner frame 13, the front door opening sensor 95 transmits a close detection signal to the main CPU 63, and the front door frame 14 is in the open state with respect to the inner frame 13. In this case, the front door opening sensor 95 transmits an opening detection signal to the main CPU 63. The main CPU 63 specifies that the front door frame 14 is in the closed state when receiving the closing detection signal from the front door opening sensor 95, and determines when the opening detection signal is received from the front door opening sensor 95. It is specified that the front door frame 14 is in the open state.

  In this embodiment, a main body opening sensor 96 for detecting whether or not the gaming machine main body 12 is in an open state with respect to the outer frame 11 is electrically connected to the main CPU 63. The detection result of 96 is input to the main CPU 63. In this case, when the gaming machine main body 12 is closed with respect to the outer frame 11, the main body opening sensor 96 transmits a closing detection signal to the main CPU 63, and the gaming machine main body 12 is opened with respect to the outer frame 11. In some cases, the main body opening sensor 96 transmits an opening detection signal to the main CPU 63. The main CPU 63 determines that the gaming machine main body 12 is in the closed state when receiving the closing detection signal from the main body opening sensor 96, and determines when the gaming machine main body 12 is receiving the opening detection signal from the main body opening sensor 96. It is specified that the main body 12 is in the open state.

  If the reset button 68c has not been pressed (step S6615: NO), the power-on setting processing is executed in step S6609, and then the remaining processing in steps S6610 to S6613 is repeated. That is, when the reset button 68c is not pressed, the process shifts to the process for controlling the progress of the game without executing the process of clearing the work area 221 for specific control and the stack area 222 for specific control. .

  If the reset button 68c is being pressed (step S6615: YES) and a negative determination is made in any of steps S6616 to S6618, a clear process for non-setting update is performed (step S6607). ), On condition that the set value is normal (step S6608: YES), the processing shifts to processing for controlling the progress of the game after step S6609. The processing content of the clear processing at the time of non-setting update is as described above.

  If the reset button 68c is being pressed (step S6615: YES) and a positive determination is made in all of the steps S6616 to S6618, a process for updating the set value is executed. Also, when it is determined in step S6608 or step S6614 that the set value is abnormal, a process for updating the set value is executed.

  Specifically, a setting value copy process is executed first (step S6619). In the copy processing, the information of the set value counter used to specify the set value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . As a result, even if the information of the set value counter is cleared to “0” in the setting update clearing process (step S6620) to be executed thereafter, the information before the setting value updating clearing process is executed is executed. It is possible to grasp the set value of the pachinko machine 10 (that is, the set value of the pachinko machine 10 before the supply of the operation power to the pachinko machine 10 is stopped).

  Thereafter, a clear process at the time of setting update is executed (step S6620). In the clearing process at the time of setting update, the work area 221 for the specific control is set to “0” except for the area indicating whether the winning / rejecting lottery mode in the work area 221 for the specific control is the high probability mode and the copy area. "Clear and execute the initial setting. As a result, the game round is not executed, the opening / closing execution mode is not executed, and the general-purpose display unit 38a is not variably displayed. There is a certain situation. In addition, since the hold storage area 65a and the ordinary power hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is erased and the general figure display unit is cleared. The hold information for 38a is deleted. In the clearing process at the time of setting update, the stack area 222 for specific control is cleared to “0” and the initial setting is executed. In the clearing process at the time of setting update, the set value counter used to specify the set value of the pachinko machine 10 is cleared to “0”. In the clearing process at the time of setting update, the initial setting is executed after the various registers of the main CPU 63 are also cleared to "0".

  On the other hand, in the clearing process at the time of setting update, since the area indicating whether the winning / rejecting lottery mode is the high probability mode is not cleared to “0”, even if the setting value updating process (step S6621) is executed, the winning / rejecting lottery mode is executed. Can be maintained in the mode before the supply of the operating power to the pachinko machine 10 is stopped. In addition, since the copy area is not cleared to “0” in the clearing process at the time of setting update, it is possible to specify the set value that was set before the clearing process at the time of setting update is performed. Note that the present invention is not limited to the above configuration, and the setting value counter used for specifying the setting value of the pachinko machine 10 may not be cleared to “0” in the clearing process at the time of setting update. In the clearing process, an area indicating whether or not the win / fail lottery mode is the high probability mode may be cleared to “0”.

  In the clearing process at the time of setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to “0”. As a result, even when the set value updating process capable of changing the set value of the pachinko machine 10 is executed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to “0”. It is possible to do so.

  After that, in step S6621, a setting value update process is executed. The processing content of the set value update processing is the same as the set value update processing (FIG. 85) in the twenty-second embodiment. After executing the set value update process, the process proceeds to a process for controlling the progress of the game after step S6609.

  According to the above configuration, when the set value is abnormal, the set value update process is started without requiring any special operation by the administrator of the game hall. Then, when the set value updating process is completed, the process proceeds to a process for controlling the progress of the game. As a result, it is possible to play a game in a situation where a normal set value is set. On the other hand, in order to complete the setting value update process, it is necessary to perform an OFF operation using the setting key for the setting key insertion section 68a, and the setting value is set arbitrarily by a person other than the game hall manager, and the game is started. Can be prevented from occurring.

  Next, a description will be given of a configuration for forcibly stopping the progress of the game when the main CPU 63 cannot perform various processes normally. FIG. 102A is a block diagram for explaining the configuration of the MPU 62.

  As shown in FIG. 102A, the MPU 62 includes a main CPU 63, a main ROM 64, and a main RAM 65, and further includes a reset signal output unit 251 and a program monitoring unit 252. The reset signal output unit 251 has a function of outputting a reset signal to the main CPU 63. Specifically, the reset signal output unit 251 outputs the reset signal as the HI level signal when the operating power is supplied from the power supply / emission control device 78 and the output disable condition is not satisfied. A reset signal is output to the CPU 63, and when the operating power is not supplied from the power supply / emission control device 78 or when the output disable condition is satisfied even when the operating power is supplied, the reset signal is output to the main CPU 63. Not output to The main CPU 63 executes various processes when the operating power is supplied from the power supply / emission control device 78 and receives the reset signal from the reset signal output unit 251. Even if the operating power is supplied, if no reset signal is received from the reset signal output unit 251, various processes are not executed. Further, when the main CPU 63 switches from a state in which the reset signal is not received from the reset signal output unit 251 to a state in which the reset signal is received when the operating power is supplied from the power supply / emission control device 78. The main processing (FIG. 100) is started.

  The program monitoring unit 252 has a function of monitoring whether the main CPU 63 can normally perform various processes. Specifically, the program monitoring unit 252 monitors whether the value of the program counter provided in the main CPU 63 is an abnormal value. The program counter is for storing an address where an instruction to be executed in the main CPU 63 is stored. A possible value is defined for the program counter, and the program monitoring unit 252 monitors whether the value of the program counter is a value other than the possible value. In addition, when writing information to the work area 221 for specific control by a load instruction, the program monitoring unit 252 monitors whether the address specified as the write destination area is an abnormal address. When reading information from the work area 221 for specific control by a load instruction, the program monitoring unit 252 may be configured to monitor whether the address specified as the area to be read is an abnormal address.

  If the program monitoring unit 252 determines that the value of the program counter is an abnormal value, or determines that the address specified when writing information by the load instruction is an abnormal address, the reset signal output unit 251 Output a monitoring error signal to When the monitoring signal is received from the program monitoring unit 252, the reset signal output unit 251 temporarily stops the output of the reset signal even if the operating power is supplied from the power supply / firing control device 78, and continues to stop. After the output of the reset signal is stopped for a period, the output of the reset signal is restarted. The stop continuation period is a period sufficient for the main CPU 63 to specify that the output of the reset signal is stopped. Accordingly, when the value of the program counter becomes an abnormal value, or when an address specified when writing information by a load instruction becomes an abnormal address, the main CPU 63 Will execute the main processing.

  FIG. 102 (b) is a time chart showing the manner in which the reset signal output unit 251 outputs a reset signal. FIG. 102 (b1) shows a period during which operating power is supplied from the power supply / emission control device 78, and FIG. 102 (b2) shows a period during which a reset signal is output from the reset signal output unit 251. b3) indicates the timing at which the monitoring error signal is output from the program monitoring unit 252.

  First, the case where the monitoring abnormality signal is not output from the program monitoring unit 252 will be described. As shown in FIG. 102 (b1), the supply of operating power from the power supply / emission control device 78 to the MPU 62 is started at the timing of t1. , T2, the output of the reset signal from the reset signal output unit 251 is started as shown in FIG. Thereafter, as shown in FIG. 102 (b1), the supply of the operating power from the power supply / emission control device 78 to the MPU 62 is stopped at the timing of t3, and reset at the timing of t4 as shown in FIG. 102 (b2). The output of the reset signal from the signal output unit 251 is stopped.

  Next, a case where a monitoring abnormality signal is output from the program monitoring unit 252 will be described. As shown in FIG. 102 (b1), supply of operating power from the power supply / emission control device 78 to the MPU 62 is started at timing t5. Thus, the output of the reset signal from the reset signal output unit 251 is started at the timing of t6, as shown in FIG. Thereafter, at time t7, the program counter value becomes an abnormal value, or the address specified when writing information by a load instruction becomes an abnormal address, thereby monitoring the program as shown in FIG. 102 (b3). The monitoring abnormality signal is output from the unit 252 to the reset signal output unit 251. Thereby, as shown in FIG. 102 (b2), the output of the reset signal from the reset signal output unit 251 is temporarily stopped at the timing of t7, and restarted at the timing of the subsequent t8.

  In this case, the main CPU 63 stops the execution of the various processes at the timing of t7, and starts the main process (FIG. 100) at the timing of t8 when the rising of the reset signal is confirmed. However, since the power failure process is not executed when the execution of various processes by the main CPU 63 is stopped, the main process (FIG. 100) is performed in a situation where the power failure flag in the work area 221 for specific control is not set to “1”. Is started, and the main processing (FIG. 100) is started without storing the checksums for the work area 221 for specific control and the stack area 222 for specific control. Therefore, in the main process (FIG. 100), a negative determination is made in step S6603 or step S6606, and a clear process for non-setting update (step S6607) is executed. Thereby, when the value of the program counter becomes an abnormal value or the designated address becomes an abnormal address when information is written by the load instruction, and the monitoring error signal is output from the program monitoring unit 252, It is possible to execute a clearing process at the time of non-setting update, in which a predetermined storage area of the work area 221 for specific control and the stack area 222 for specific control is cleared to “0”. .

  However, in the non-specific update clearing process, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to “0”. Accordingly, even if the program monitoring unit 252 outputs a monitoring abnormality signal due to an abnormal value of the program counter value or an abnormal address specified when writing information by a load instruction, the non- The work area 223 for specific control and the stack area 224 for non-specific control can be prevented from being cleared to “0”.

  Returning to the description of FIG. 102 (b), the supply of the operating power from the power supply / emission control device 78 to the MPU 62 is stopped at the timing of t9 as shown in FIG. 102 (b1) at the timing of t9. As shown in FIG. 102 (b2), the output of the reset signal from the reset signal output unit 251 is stopped.

  Next, a timer interrupt process in the present embodiment executed by the main CPU 63 will be described with reference to the flowchart in FIG. The timer interrupt process is executed periodically (for example, every 4 milliseconds) in a state where the processes of steps S6610 to S6613 are executed in the main process (FIG. 100). The program corresponding to the timer interrupt process is set as a program for specific control.

  In steps S6801 to S6819, the same processes as those in steps S5201 to S5219 of the timer interrupt process (FIG. 86) in the twenty-second embodiment are executed. These processes are executed by the main CPU 63 using a program for specific control and data for specific control. After that, a setting monitoring process is executed (step S6820). FIG. 104 is a flowchart showing the setting monitoring process.

  By checking the value of the set value counter in the work area 221 for specific control, it is determined whether the set value of the pachinko machine 10 is normal (step S6901). Specifically, when the setting value set in the setting value counter is any one of “Setting 1” to “Setting 6”, it is determined that the setting is normal, and when the setting value is “0” or 7 or more, an abnormality is determined. It is determined that there is.

  If the set value is abnormal (step S6901: NO), first, a copy process of the set value is executed (step S6902). In the copy processing, the information of the set value counter used to specify the set value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . Thereby, it is possible to grasp the set value of the pachinko machine 10 before the execution of the set value update process executed thereafter.

  Thereafter, an abnormal command indicating that an abnormality in the set value has occurred is transmitted to the sound emission control device 81 (step S6903). Upon receiving the abnormal command, the sound light emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the set value abnormality, and also outputs a sound saying “set value abnormality detected” from the speaker unit 54. Output. In addition, the symbol display device 41 displays a character image of “Setting value abnormality is detected.” These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and is terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be ended when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the administrator of the game hall can grasp that the set value abnormality has occurred.

  After that, a setting value update process is executed (step S6904). That is, each time the timer interrupt process (FIG. 103) is executed, it is monitored whether or not an abnormality has occurred in the set value, and when the occurrence of the set value abnormality is identified, the set value of the pachinko machine 10 is reset. To perform the setting value update process. The processing content of the set value update processing is the same as the set value update processing (FIG. 85) in the twenty-second embodiment. Therefore, each time the update button 68b is pressed once, the set value is updated one step at a time, and the set value being selected is determined by detecting the game ball by the out-opening detection sensor 48a. The set value that is being updated and the set value that has been confirmed are displayed on the third notification display device 69c. Thereafter, when the setting key insertion section 68a is switched from the ON state to the OFF state, it is determined that the condition for ending the setting value updating process is satisfied. After executing the set value update process, the process returns to the timer interrupt process (FIG. 103).

  Here, in the setting value updating process, it is not determined that the end condition is satisfied only by the setting key insertion unit 68a being in the OFF state, and the setting key insertion unit 68a is switched from the ON state to the OFF state. It is determined that the termination condition is satisfied when the condition is satisfied. When the setting value updating process is performed in the setting monitoring process, the setting key insertion unit 68a is in the OFF state at the start of the setting value updating process. It is necessary to insert a setting key into the setting key insertion section 68a, perform an ON operation once, and then perform an OFF operation. As a result, it is possible to prevent the setting value update process from ending even when the regular operation by the manager of the gaming hall is not performed.

  When the setting key insertion unit 68a is switched from the ON state to the OFF state and the condition for ending the set value update process is satisfied, the step S5111 in the set value update process (FIG. 85) is executed to execute The setting value stored in the copy area in the work area 221 for specific control is compared with the set value currently set in the set value counter in the work area 221 for specific control. That is, it is determined whether the set value set before the setting value update process (step S6904) is executed and the set value set in the current set value update process are the same. When both the set values are the same (step S5112: NO), the notification process at the time of non-change (step S5113) is executed so that the setting maintenance notification described above is performed. On the other hand, when the two set values are different (step S5112: YES), the notification of the change in setting described above is performed by executing the notification process at the time of change (step S5114).

  In the configuration in which the set value update process is executed when a set value error has occurred, the set value set before the set value update process was executed and the set value set in the set value update process If the set values are the same, the setting maintenance notification is performed. As a result, even if the set value update process is executed due to a set value error, the setting maintenance notification is performed by resetting the set value set in the previous situation, and the set value update due to the set value error Even if the processing is executed, it is possible to clearly indicate to the player that the set value has not changed. Incidentally, since it is general to record the set value of each pachinko machine 10 installed in the game hall, it is possible to execute a set value update process due to a set value abnormality so that the set value becomes the recorded set value. It is possible.

  Returning to the description of the timer interrupt process (FIG. 103), after executing the setting monitoring process in step S6822, the management process is executed in step S6821. When the management process is executed, a subroutine program corresponding to the management process set in the specific control program is executed. The information for specifying the return address of the timer interrupt processing in is written into the stack area 222 for specific control by a push command. When the management process is completed, information for specifying the return address is read by the pop instruction, and the process returns to the timer interrupt processing program indicated by the return address.

  FIG. 105 is a flowchart showing the management process according to the present embodiment executed by the main CPU 63. The processing of steps S7001 to S7005 in the management processing is executed by the main CPU 63 using the specific control program and the specific control data.

  First, interrupt prohibition is set to prohibit the occurrence of the timer interrupt process (FIG. 103) (step S7001). This prevents a timer interrupt process (FIG. 103) that is a process corresponding to the specific control from being interrupted and activated in the middle of a later-described management execution process that is a process corresponding to the non-specific control. Becomes possible.

  Thereafter, the information of the flag register of the main CPU 63 is saved in the PSW buffer set in the work area 221 for specific control by a load instruction as “LD (_PSWBUF), PSW” (step S7002). The flag register includes a carry flag, a zero flag, a P / V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution results of an operation instruction, a rotate instruction, an input / output instruction, and the like. By saving the information of the flag register before the subroutine program corresponding to the management execution process is started, the flag register in the state before being changed after the subroutine call or the start of the subroutine is changed. Information can be saved in the work area 221 for specific control.

  After that, the management execution process is started by reading out a subroutine program corresponding to the management execution process set in the non-specific control program (step S7003). In this case, information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for specific control by a push command. Then, when the management execution processing is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management processing program indicated by the return address.

  When the program returns to the management processing program after the execution of the management execution processing, it is saved as “LD PSW, (_PSWBUF)” in the PSW buffer in the specific control work area 221 in step S7002 by a load instruction. The information of the flag register is returned to the flag register of the main CPU 63 (step S7004). As a result, the information of the flag register of the main CPU 63 returns to the information at the time when step S7002 was previously executed. That is, the information in the flag register of the main CPU 63 returns to the information for executing the specific control.

  Thereafter, interrupt permission is set to switch from the state in which the generation of the timer interrupt processing (FIG. 103) is prohibited to the state in which the timer interrupt processing is permitted (step S7005). As a result, new execution of the timer interrupt processing becomes possible.

  FIG. 106 is a flowchart showing the management execution process according to the present embodiment executed by the main CPU 63. Note that the processing of steps S7101 to S7116 in the management execution processing is executed by the main CPU 63 using the non-specific control program and the non-specific control data.

  In steps S7101 to S7108 and steps S710 to S7116, the same processes as those in steps S4501 to S4515 of the management execution process (FIG. 78) in the seventeenth embodiment are executed. In step S7109, another monitoring process is performed. When the separate monitoring process is executed, a subroutine program corresponding to the different monitoring process set in the non-specific control program is executed. Is written into the non-specific control stack area 224 by a push command. Then, when the separate monitoring process is completed, information for specifying the return address is read by the pop instruction, and the process returns to the management execution process program indicated by the return address.

  FIG. 107 is a flowchart showing another monitoring process. The processing of steps S7201 to S7206 in the separate monitoring processing is executed by the main CPU 63 using the non-specific control program and the non-specific control data.

  In the separate monitoring process, it is determined whether or not the value of the pointer indicating the processing position of the process being executed in the non-specific control program is outside the normal numerical range (step S7201). The information stored in the normal counter area 231, the open / close execution mode counter area 232, and the high-frequency support mode counter area 233 provided in the non-specific control work area 223 is obviously abnormal information. It is determined whether or not it has been performed (step S7202). For example, in the normal counter area 231, when the value of the normal general winning counter 231a is 1000 or more even though the value of the normal out counter 231e is "0", it is determined that there is an abnormality. In addition, it is determined whether or not the information stored in the calculation result storage area 234 provided in the non-specific control work area 223 is obviously abnormal information (step S7203). For example, if any of the 62nd to 64th parameters is not “0” even though the 61st parameter is “0”, it is determined to be abnormal.

  When an affirmative determination is made in any of steps S7201 to S7203, it is determined that an information abnormality has occurred in the work area 223 for non-specific control, and a process of partially clearing the work area 223 for non-specific control is performed. (Step S7204). In the partial clear processing, the storage areas other than the management start flag in the non-specific control work area 223 are cleared to “0”. In this case, all of the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234 are cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control.

  By not clearing the management start flag to "0", it is possible to maintain the state in which the management start flag is already set to "1", and the pachinko machine 10 can be continued in the game hall. It is possible to prevent the collection of the history information from being restricted in the shipping stage of the pachinko machine 10 despite being used. However, the present invention is not limited to this, and in step S7204, the entire non-specific control work area 223 including the management start flag may be cleared to “0”.

  In step S7204, the stack area 224 for non-specific control is not cleared to “0”. In the stack area 224 for non-specific control, information of various registers used in the processing corresponding to the specific control in steps S7102 to S7107 in the management execution processing (FIG. 106) is saved. In this case, by preventing the non-specific control stack area 224 from being cleared to “0”, information of various registers used in the processing corresponding to the specific control and the non-specific control stack area 224 can be prevented from being deleted. The non-specific control stack area 224 stores information on the return address of the management execution process (FIG. 106) after the completion of the separate monitoring process, but the non-specific control stack area 224 is set to “0”. By not clearing, it is possible to prevent the information of this return address from being erased.

  After that, an initial setting process is executed (step S7205). In the initial setting process, the initial setting is performed on the storage area targeted for clearing “0” in step S7204 in the work area 223 for non-specific control.

  Thereafter, a clear notification process is executed (step S7206). In the clear notification process, a command indicating that the work area 223 for non-specific control has been cleared to “0” is transmitted to the sound emission control device 81. Upon receiving the command, the voice light emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the forced clear of the work area 223 for non-specific control, and the “history information is forcibly cleared from the speaker unit 54”. ". In addition, a character image “History information has been forcibly cleared” is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and is terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be ended when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the manager of the gaming hall can grasp that the work area 223 for non-specific control has been forcibly cleared.

  When a negative determination is made in all of steps S7201 to S7203, or when the process of step S7206 is performed, the separate monitoring process ends, and the process returns to the monitoring execution process (FIG. 106).

  According to the embodiment described in detail above, the following excellent effects can be obtained.

  When the program monitoring unit 252 specifies that an address specified when writing information by a load instruction is an abnormal address, the reset signal output unit 251 turns the reset signal from OFF to ON, and the main CPU 63 Then, the main processing (FIG. 100) is executed in the same manner as when the supply of the operating power is newly started. When the reset signal is changed from OFF to ON, “1” is not set in the power failure flag in the work area 221 for specific control, and the checksum at the time of the power failure is stored in the work area 221 for specific control. Since it has not been performed, the clearing process at the time of the non-setting update is forcibly performed (step S6607). In the clearing process at the time of non-setting update, the storage area other than the storage area in which the set value of the pachinko machine 10 is stored in the work area 221 for specific control is cleared to “0”, and the stack area 222 for specific control is cleared to “0”. "0" is cleared, and initialization processing of these areas is further executed. Accordingly, if there is a possibility that an information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the work area 221 for specific control and the stack area 222 for specific control are stored in the work area 221 and the stack area 222 for specific control. On the other hand, by executing the “0” clear process and the initial setting process, it is possible to eliminate the information abnormality.

  When the program monitoring unit 252 identifies that the value of the program counter of the main CPU 63 is an abnormal value, the reset signal output unit 251 performs a reset signal from OFF to ON, so that the main CPU 63 reduces the operating power. The main processing (FIG. 100) is executed as in the case where the supply is newly started. When the reset signal is changed from OFF to ON, “1” is not set in the power failure flag in the work area 221 for specific control, and the checksum at the time of the power failure is stored in the work area 221 for specific control. Since it has not been performed, the clearing process at the time of the non-setting update is forcibly performed (step S6607). In the clearing process at the time of non-setting update, the internal storage area of the main CPU 63 including various registers is cleared to "0" and the initial setting process is executed. Accordingly, when there is a possibility that an information abnormality has occurred in the internal storage area of the main CPU 63, the “0” clear and initial setting processing is executed on the internal storage area of the main CPU 63 to execute the processing. It is possible to eliminate the information abnormality.

  On the other hand, in the clearing process at the time of non-specific update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to “0”. As a result, since the information abnormality is specified in the program monitoring unit 252 as described above, “0” is cleared for the internal storage area of the main CPU 63, the work area 221 for specific control, and the stack area 222 for specific control. Even when the initial setting process is executed, it is possible to prevent the information of the game history from being erased, and to prevent the information of the management result of the game history from being erased. It is possible to do.

  If the power failure flag is not set to “1” or the checksums do not match in the main processing (FIG. 100) when the supply of the operating power to the main CPU 63 is started, the non-setting update is cleared. In the configuration in which the process (step S6607) is executed, when the occurrence of the information abnormality is specified by the program monitoring unit 252, the power failure flag is not set to “1” by turning the reset signal from OFF to ON. At the same time, the main processing (FIG. 100) is executed in a state where the checksum is not stored. This makes it possible to eliminate the information abnormality specified by the program monitoring unit 252 using the configuration for eliminating the information abnormality at the start of the supply of the operating power.

  In a configuration in which whether or not the checksum is normal is monitored in the main process (FIG. 100) when the supply of the operating power to the main CPU 63 is started, the calculation target of the checksum is a specific control The work area 221 and the stack area 222 for specific control are included, and the work area 223 for non-specific control and the stack area 224 for non-specific control are not included. This makes it possible to specify whether or not an information abnormality has occurred only in the storage area corresponding to the specific control in the main RAM 65.

  If it is determined that the checksum is abnormal in the main processing (FIG. 100) when the supply of the operating power to the main CPU 63 is started, the clear processing at the time of non-setting update (step S6607) is executed. However, in the clearing process at the time of the non-setting update, the process of clearing “0” and the initial setting process are performed in the work area 221 for specific control and the stack area 222 for specific control. On the other hand, the process of clearing “0” is not executed in the work area 223 for non-specific control and the stack area 224 for non-specific control. Accordingly, the processing corresponding to the specific control is not continuously performed in the state where the information abnormality occurs in the work area 221 for the specific control and the stack area 222 for the specific control. And the storage area corresponding to the non-specific control in the main RAM 65 is cleared to "0" by the information abnormality of the work area 221 for specific control and the stack area 222 for specific control. It is possible to do not.

  In the power failure information storage processing (FIG. 101), the power failure processing (steps S6709 to S6712) calculates the checksum for the specific control work area 221 and the specific control stack area 222. No checksum is calculated for the storage area corresponding to the non-specific control. This makes it possible to prevent the processing period required for completing the power failure processing from being excessively long.

  If the occurrence of an abnormality in the information stored in the non-specific control work area 223 is specified in another monitoring process (FIG. 107) executed in the process corresponding to the non-specific control, the non-specific control is supported. In the separate monitoring process (FIG. 107), the work area 223 for non-specific control is cleared to “0” and an initial setting process is executed. As a result, a process corresponding to the non-specific control is executed in a state where the information of the non-specific control work area 223 is held as it is even though some abnormality has occurred in the non-specific control work area 223. It is possible to prevent it from happening. In addition, since the process of clearing the work area 223 for non-specific control and the process of initial setting are performed in the process corresponding to the non-specific control, the information of the work area 223 for non-specific control is updated. It is possible to prevent the processing corresponding to the specific control from intervening.

  In another monitoring process (FIG. 107) which is a process corresponding to the non-specific control, monitoring is performed to determine whether or not an abnormality has occurred in the work area 223 for non-specific control. The processing for clearing the work area 223 for non-specific control to “0” and the processing for initial setting are executed. Accordingly, the monitoring of whether or not an abnormality has occurred in the non-specific control work area 223 and the execution of the initialization of the non-specific control work area 223 are performed in a series of processes in the process corresponding to the non-specific control. It is possible to execute as.

  If the occurrence of an abnormality in the information stored in the non-specific control work area 223 is specified in another monitoring process (FIG. 107) executed in the process corresponding to the non-specific control, Although the process for clearing and initializing the work area 223 is executed, the process for clearing and initializing the stack area 224 for non-specific control is not executed. Thereby, while information abnormalities in the non-specific control work area 223 can be eliminated, information of various registers used in the processing corresponding to the specific control saved in the non-specific control stack area 224 and separate management are performed. It is possible to prevent the information of the return address after the processing is completed from being erased.

  The processing for clearing the work area 221 for specific control and the stack area 222 for specific control and initializing is executed in the processing corresponding to the specific control, and the work area 223 for non-specific control is set to "0". The processing of clearing and initial setting is executed in the processing corresponding to the non-specific control. As a result, with regard to such initialization processing as well, the work area 221 for specific control and the stack area 222 for specific control are treated as dedicated storage areas for processing corresponding to specific control, The work area 223 can be handled as a dedicated storage area for processing corresponding to the non-specific control.

  Although the main processing (FIG. 100) is configured to monitor whether the set values are normal in steps S6608 and S6614, the processing for monitoring whether these set values are normal is performed. A configuration that is not executed may be adopted. This makes it possible to reduce the processing load of the processing at the start of the supply of the operating power, which is executed when the supply of the operating power to the main CPU 63 is started. In addition, even if the processing at the start of the supply of the operating power is not monitored as to whether the set value is normal, the timer interrupt executed after the processing at the start of the supply of the operating power is completed. In the setting monitoring process (step S6820) of the process (FIG. 103), whether or not the setting value is normal is monitored, so that if the setting value is abnormal, it can be dealt with.

  Further, the configuration monitoring process (step S6820) is not limited to the configuration that is executed each time the timer interrupt process (FIG. 103) is started. The configuration monitoring process (step S6820) may be performed every time the number of times (for example, 10,000 times) is performed. In this case, it is possible to suppress the execution frequency of the monitoring while periodically monitoring whether the set value is normal.

  Further, the configuration may be such that the setting monitoring process (step S6820) is executed in the remaining process (step S6610 to step S6613) in the main process (FIG. 100). In this case, it is possible to monitor whether the set value is normal by using the idle time in a situation where the timer interrupt processing is not being executed.

  Further, the configuration monitoring process (step S6820) may be executed when a game round is newly started. More specifically, when a game round is newly started, a setting monitoring process (step S6820) may be performed before the execution determination process is performed. As a result, it is possible to prevent the execution determination processing from being performed in a situation where the set value is abnormal.

  If the setting monitoring process (step S6820) identifies that the setting value is abnormal, the setting monitoring process (step S6902) is provided in the specific control work area 221 instead of the configuration shifting to the setting value updating process (step S6904). The game stop flag may be set to “1”. In this case, in the timer interrupt processing (FIG. 103), the affirmative determination in step S6807 does not execute the processing of steps S6808 to S6821, and the progress of the game is stopped when the set value is abnormal. Becomes However, since the processing of steps S6801 to S6806 is executed, the power failure monitoring is executed, and the hit random number counter C1, the big hit type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated. Fraud detection is performed. Further, when the game stop flag is set to “1”, a notification indicating that the setting value should be updated may be executed to prompt the execution of the setting value update process. In this case, the game stop manager clears the game stop flag to “0” by performing a power-on operation in such a manner that the set value update process is performed after the power-off operation is performed by the game hall manager who has confirmed the notification. As a result, the state in which the progress of the game is stopped is released, and the set value updating process is executed to set a normal set value.

  If it is determined in the setting monitoring process (step S6820) that the setting value is abnormal, the main process (1) is set in a state where the setting abnormality flag provided in the work area 221 for specific control is set to “1”. 100) may be started. In order to stop the progress of the game in a state where the setting abnormality flag is set to “1” and to cancel the state in which the progress of the game is stopped, the power is turned off → A configuration that requires ON may be adopted. In this case, even if an operation for executing the setting value update processing is not performed in the main processing (FIG. 100), the setting is forcibly set when the setting abnormality flag is set to “1”. By executing the value updating process, it is possible to forcibly perform a new setting of the setting value by using the setting value updating process set in the main process (FIG. 100).

  When the occurrence of an information abnormality is specified by the program monitoring unit 252 and the reset signal is forcibly turned from OFF to ON, the initialization process is executed for the work area 221 for specific control. The setting value of the pachinko machine 10 may be “setting 1”. When the occurrence of an information abnormality is specified by the program monitoring unit 252 and the reset signal is forcibly turned from OFF to ON, the setting is performed after the initialization process is performed on the work area 221 for the specific control. It is good also as a structure which performs a value update process.

  When the occurrence of an information abnormality is identified by the program monitoring unit 252, the reset signal is not forcibly turned from OFF to ON, and the non-setting update clearing process (step S6607) is executed. Alternatively, the configuration may be such that a clearing process at the time of setting update (step S6620) and a setting value updating process (step S6621) are executed.

  In the clearing process at the time of non-setting update (step S6607), the setting value of the pachinko machine 10 becomes “setting 1” by initializing the storage area for storing the information of the setting value in the work area 221 for specific control. The configuration may be such that a predetermined setting value other than “Setting 1” is used. Thereby, when the clear processing at the time of non-setting update is executed, it becomes possible to set the predetermined set value.

  Further, in the clearing process at the time of non-setting update (step S6607), the configuration is such that the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". Good.

  Although the management start flag is not cleared to “0” in step S7204 in the separate monitoring process (FIG. 107), the management start flag may be cleared to “0”. In step S7204 of the separate monitoring process (FIG. 107), the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode counter area 233 may not be cleared to "0". 234 may not be cleared to “0”.

  In step S7204 in the separate monitoring process (FIG. 107), the process of clearing “0” and the initial setting process are executed not only for the work area 223 for non-specific control but also for the stack area 224 for non-specific control. It may be configured. In this case, the information is used in the information corresponding to the return address of the management execution process after the end of the separate monitoring process in the non-specific control stack area 224 and the process corresponding to the specific control saved in the non-specific control stack area 224. It is preferable not to erase the information of various registers.

  In another monitoring process (FIG. 107), it is monitored whether or not an abnormality has occurred in the stack area 224 for non-specific control. A configuration in which “0” clear processing and initial setting processing are executed for the stack area 224 may be adopted. In this case, it is preferable not to delete the information of the return address of the management execution process after the end of the separate monitoring process in the stack area 224 for non-specific control.

  Further, the configuration is not limited to the configuration in which both the specific control work area 221 and the specific control stack area 222 are the checksum calculation targets, and only the specific control work area 221 is the checksum calculation target. The configuration may be such that only the stack area 222 for specific control is a target for calculating the checksum.

<Thirty-first embodiment>
In the present embodiment, the processing configuration of the main processing executed by the main CPU 63 is different from that of the thirtieth embodiment. Hereinafter, a configuration different from the thirtieth embodiment will be described. The description of the same configuration as that of the thirtieth embodiment is basically omitted.

  FIG. 108 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing of steps S7301 to S7322 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63.

  First, power-on wait processing is executed (step S7301). In the power-on wait process, for example, the process waits without advancing to the next process until a predetermined time for wait (specifically, one second) elapses after the main process is started. In the execution period of the power-on wait processing, the operation start and the initial setting of the symbol display device 41 are completed. Thereafter, access to the main RAM 65 is permitted (step S7302).

  Thereafter, it is determined whether or not “1” is set in the power failure flag provided in the work area 221 for specific control in the main RAM 65 (step S7303). If “1” is set in the power failure flag (step S7303: YES), a checksum is calculated for the specific control work area 221 and the specific control stack area 222 (step S7304). The method of calculating the checksum is the same as step S6604 of the main processing (FIG. 100) in the thirtieth embodiment.

  After that, the specific control work area 221 and the specific control stack area calculated in the power outage process executed immediately before the supply of the operating power to the MPU 62 is stopped and stored in the specific control work area 221 The checksum for 222 is read from the work area 221 for specific control, and the read checksum is compared with the checksum calculated in step S7304 (step S7305). Then, it is determined whether the checksums match (step S7306).

  If an affirmative determination is made in step S7306, the processing in steps S7307 to S7320 is performed. In this case, the processing contents of steps S7307 to S7314 are the same as steps S6614 to S6621 of the main processing (FIG. 100) in the thirtieth embodiment. This is the same as steps S6609 to S6613 of the process (FIG. 100).

  If the reset button 68c is pressed (step S7308: YES) and a negative determination is made in any of steps S7309 to S7311, a clear process for non-setting update is executed (step S7308). S7315). The processing content of the clear processing at the time of non-setting update is the same as that of step S6607 of the main processing (FIG. 100) in the thirtieth embodiment. However, in the present embodiment, after performing the clear processing at the time of non-setting update, the process proceeds to the processing of steps S7316 to S7320 without determining whether the set value is normal. Only when a negative determination is made in any of steps S7309 to S7311, the non-setting update clearing process (step S7315) is executed. Since it is determined in step S7307 whether the setting value is normal, there is no need to determine whether the setting value is normal after executing the clear processing at the time of non-setting update.

  If a negative determination is made in step S7303 or step S7306, that is, if the power failure flag in the specific control work area 221 is not set to "1" or if a checksum error has occurred, a clearing process for an error is executed. (Step S7321). FIG. 109 is a flowchart showing the clearing process at the time of abnormality. Note that the processes of steps S7401 to S7405 in the abnormal clearing process are executed by the main CPU 63 using a program for specific control and data for specific control.

  First, the process of clearing the work area 221 for specific control is executed (step S7401). In the clear processing, the work area for the specific control is removed except for the area (specifically, the set value counter) in which the information of the set value indicating the setting state of the pachinko machine 10 is set in the work area 221 for the specific control. 221 is cleared to “0” and an initial setting is performed for the area cleared to “0”. As a result, since the area indicating whether the winning / rejecting lottery mode is the high probability mode is cleared to “0”, the winning / rejecting lottery is performed regardless of the winning / rejecting lottery mode immediately before the supply of the operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game is not executed, the opening / closing execution mode is not executed, and the general-purpose display unit 38a is not variably displayed, and the general electric functioning object 34a is in the closed state. Situation. In addition, since the hold storage area 65a and the ordinary power hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is erased and the general figure display unit is cleared. The hold information for 38a is deleted.

  After that, a clear process of the stack area 222 for specific control is executed (step S7402). In the clearing process, the stack area 222 for specific control is cleared to “0” and initialization is performed.

  After that, as “PUSH PSW”, the information of the flag register of the main CPU 63 is saved in the stack area 222 for specific control by a push command (step S7403). The flag register includes a carry flag, a zero flag, a P / V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution results of an operation instruction, a rotate instruction, an input / output instruction, and the like. By saving such flag register information before the subroutine program corresponding to the non-specific control clearing process is started, the flag in the state before the subroutine call or the subroutine is changed after the start of the subroutine is changed. Register information can be saved in the stack area 222 for specific control. The information amount of the flag register is 1 byte.

  Thereafter, by reading out a subroutine program corresponding to the non-specific control clear processing set in the non-specific control program, the non-specific control clear processing is started (step S7404). In this case, information for specifying the return address of the clearing process at the time of abnormality after execution of the non-specific control clearing process is written to the specific control stack area 222 by a push command. When the clear processing for the non-specific control is completed, information for specifying the return address is read out by the pop command, and the program returns to the abnormality clear program indicated by the return address.

  When the program returns to the clearing process at the time of abnormality after the execution of the non-specific control clearing process, the flag register saved to the specific control stack area 222 in step S7402 by a pop command as “POP PSW” as “POP PSW” Is returned to the flag register of the main CPU 63 (step S7405). As a result, the information of the flag register of the main CPU 63 returns to the information at the time when step S7402 was executed. That is, the information in the flag register of the main CPU 63 returns to the information for executing the specific control.

  FIG. 110 is a flowchart showing the clear processing for non-specific control. The processes of steps S7501 to S7516 in the non-specific control clearing process are executed by the main CPU 63 using the non-specific control program and the non-specific control data.

  First, as a "LD SP, Y (u + 2)", Y (u + 2) is set as a fixed address at the start of the non-specific control in the stack pointer of the main CPU 63 by a load instruction (step S7501). In this case, the information of the last address in the non-specific control stack area 224 is set as the stack pointer, similarly to step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment.

After that, the information of the WA register of the main CPU 63 is saved in the WA buffer set in the work area 223 for non-specific control by a load instruction as “LD (_WABUF), WA” (step S7502). Also, as a load instruction, “LD (_BCBUF), BC” saves the information of the BC register of the main CPU 63 to the BC buffer set in the work area 223 for non-specific control (step S7503). Also, "LD
(_DEBUF), DE ”, the information of the DE register of the main CPU 63 is saved in the DE buffer set in the work area 223 for non-specific control by a load instruction (step S7504). Also, the information of the HL register of the main CPU 63 is saved to the HL buffer set in the non-specific control work area 223 by a load instruction as “LD (_HLBUF), HL” (step S7505). Further, the information of the IX register of the main CPU 63 is saved in the IX buffer set in the non-specific control work area 223 by a load instruction as “LD (_IXBUF), IX” (step S7506). In addition, the information of the IY register of the main CPU 63 is saved in the IY buffer set in the work area 223 for non-specific control by a load instruction as “LD (_IYBUF), IY” (step S7507).

  The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the flag registers described above. In this case, in steps S7502 to S7507, information of WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these general-purpose registers, auxiliary registers, and index registers, are stored. Is saved in the corresponding buffer in the work area 223 for non-specific control. The information amount of each of the WA register, BC register, DE register, HL register, IX register, and IY register is 2 bytes.

  The WA register, the BC register, the DE register, the HL register, the IX register, and the IY register partially clear the work area 223 for non-specific control (step S7508) and initialize ( This is a register used in step S7509). The information set in such a register is saved in the non-specific control work area 223 prior to the execution of the partial clear processing (step S7508) and the initial setting processing (step S7509) of the non-specific control work area 223. By doing so, it is possible to save the information of these registers used during the specific control before the non-specific control is started. Therefore, even if these registers are overwritten during the non-specific control, the information saved in the non-specific control work area 223 is returned to these registers when the non-specific control is terminated, so that the state of these registers is restored. Can be returned to a state corresponding to the specific control before the non-specific control is executed.

  Also, instead of saving all information of various general-purpose registers, auxiliary registers, and index registers to the work area 223 for non-specific control, the work area 223 for non-specific control, which is processing corresponding to non-specific control, is saved. The information of the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register to be used in the partial clearing process (step S7508) and the initial setting process (step S7509) are selectively used for non-specific control. By saving the information in the work area 223, it is possible to reduce the capacity secured for saving the information of the register in the work area 223 for non-specific control. Therefore, while securing a large capacity of the non-specific control work area 223 that can be used in the partial clear processing (step S7508) and the initial setting processing (step S7509) of the non-specific control work area 223, It is possible to save such register information. Of course, among the various general-purpose registers, auxiliary registers, and index registers in the main CPU 63, registers other than the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register correspond to the non-specific control. The information set before the process to be performed is started is stored and held until the process corresponding to the non-specific control ends and the process corresponding to the specific control is restarted.

  Also, by saving the register information in the non-specific control work area 223 instead of in the non-specific control stack area 224, the capacity of the non-specific control stack area 224 can be reduced accordingly. It becomes possible. Further, when the stack area 224 for non-specific control is used, as described above, the information writing order is read first after the subsequent information, and thus the information reading order is temporarily shifted due to some kind of noise or the like. If this happens, all information of the subsequent reading order will be restored to a different register. The probability of occurrence of such an event increases as the amount of information saved in the non-specific control stack area 224 increases. On the other hand, by saving the register information to the non-specific control work area 223, it is possible to prevent the above-described event from occurring even when there is a large amount of information to be saved. .

  After executing the processing of steps S7502 to S7507, a process of partially clearing the work area 223 for non-specific control is executed (step S7508). In the partial clear processing, a storage area other than the storage area in which information of various registers of the main CPU 63 used in the processing corresponding to the specific control is saved among the storage areas of the work area 223 for non-specific control. Is cleared to "0". Specifically, the WA buffer, the BC buffer, the DE buffer, the HL buffer, the IX buffer, and the IY buffer among the respective storage areas of the non-specific control work area 223 are not cleared to “0”, and the storages other than these various buffers are not cleared. Clear the area to "0".

  In this case, all of the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, the operation result storage area 234, and the management start flag are cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control. Also, by preventing the storage area in which the information of the various registers of the main CPU 63 used in the process corresponding to the specific control has been saved from being cleared to “0”, the process corresponding to the non-specific control is completed. When returning to the process corresponding to the specific control, it is possible to return the information used in the process corresponding to the specific control to various registers of the main CPU 63.

  In step S7508, the stack area 224 for non-specific control is not cleared to “0”. The stack area 224 for non-specific control stores information on the return address of the clearing process at the time of abnormality (FIG. 109) after the clear process for non-specific control is completed. By preventing 224 from being cleared to “0”, it is possible to prevent the information of the return address from being erased.

  After that, an initial setting process is executed (step S7509). In the initial setting process, the initial setting is performed on the storage area to be cleared to “0” in step S7508 in the work area 223 for non-specific control.

  After that, as “LD SP, Y (r + α)”, the stack pointer of the main CPU 63 returns to the specific control in the same manner as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment by a load instruction. Y (r + α) is set as the fixed address at the time (step S7510). The address of Y (r + α) is set as an address between Y (r + 8) and Y (s) in the stack area 222 for specific control.

  After that, the information saved in the WA buffer of the non-specific control work area 223 is overwritten in the WA register of the main CPU 63 as “LD WA, (_WABUF)” by a load instruction (step S7511). In addition, as the “LD BC, (_BCBUF)”, the information saved in the BC buffer of the non-specific control work area 223 is overwritten in the BC register of the main CPU 63 by a load instruction (step S7512). In addition, the information saved in the DE buffer of the non-specific control work area 223 is overwritten in the DE register of the main CPU 63 as “LD DE, (_DEBUF)” by a load instruction (step S7513). Further, as the “LD HL, (_HLBUF)”, the information saved in the HL buffer of the non-specific control work area 223 is overwritten in the HL register of the main CPU 63 by a load instruction (step S7514). Also, as the “LD IX, (_IXBUF)”, the information saved in the IX buffer of the non-specific control work area 223 is overwritten on the IX register of the main CPU 63 by a load instruction (step S7515). In addition, the information saved in the IY buffer of the non-specific control work area 223 is overwritten in the IY register of the main CPU 63 as “LD IY, (_IYBUF)” by a load instruction (step S7516). By executing the processing of steps S7511 to S7516, processing corresponding to the non-specific control of each information of the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register of the main CPU 63 is started. It is possible to return to the information corresponding to the specific control just before.

  According to the above configuration, in the main process (FIG. 108) executed when the supply of the operating power to the main CPU 63 is started, if the power failure flag is not set to “1” or the checksum is abnormal. In some cases, the clearing process at the time of abnormality (step S7321) is executed, so that not only the work area 221 for specific control and the stack area 222 for specific control but also the work area 223 for non-specific control become "0". Is cleared and initialized. When an information error has occurred in the work area 221 for the specific control, there is a possibility that an information error has also occurred in the work area 223 for the non-specific control. The work area 223 is also initialized so that the processing corresponding to the non-specific control is not executed as it is despite the information abnormality occurring in the work area 223 for the non-specific control. It is possible to do.

  Even when the process of clearing to “0” and the process of initial setting are performed on the work area 223 for non-specific control in the clearing process at the time of abnormality (step S7321), the work area for non-specific control is performed. The information of various registers used in the processing corresponding to the specific control saved in 223 is not cleared to “0”. Thus, the process of clearing the work area 223 for non-specific control to “0” while preventing the information used in the process corresponding to the specific control from being deleted after the process corresponding to the non-specific control ends. And a process for initial setting can be executed.

  Even when the process of clearing the work area 223 for non-specific control to “0” and the process of initial setting are executed in the clearing process at the time of abnormality (step S7321), the stack area 224 for non-specific control is performed. Are not executed for the process of clearing "0" and the process of initial setting. This makes it possible to prevent the information of the return address from being erased after the clear processing for non-specific control (FIG. 110) is completed.

  The process of clearing the work area 221 for the specific control and the stack area 222 for the specific control to “0” and the process of initializing are executed in the process corresponding to the specific control, and the work area 223 for the non-specific control is set to “ The process of clearing "0" and the process of initial setting are executed in a process corresponding to the non-specific control. As a result, the work area 221 for specific control and the stack area 222 for specific control are also treated as dedicated storage areas for processing corresponding to specific control, with regard to the processing for clearing “0” and the processing for initial setting. The work area 223 for specific control can be treated as a dedicated storage area for processing corresponding to non-specific control.

  Note that both the specific control work area 221 and the specific control stack area 222 are not limited to the configuration in which the checksum is calculated, and only the specific control work area 221 is the checksum calculation target. The configuration may be such that only the stack area 222 for specific control is a target for calculating the checksum.

  Further, the work area 223 for non-specific control may be configured to calculate the checksum. In this case, the work area 221 for the specific control and the work area 223 for the non-specific control may be a check sum calculation target, and the stack area 222 for the specific control and the work area 223 for the non-specific control may be checked. The configuration may be such that the sum is to be calculated, and the specific control work area 221, the specific control stack area 222, and the non-specific control work area 223 may be the checksum calculation target.

  Further, the stack area 224 for non-specific control may be configured to be a check sum calculation target. In this case, the work area 221 for the specific control and the stack area 224 for the non-specific control may be a check sum calculation target, and the stack area 222 for the specific control and the stack area 224 for the non-specific control may be checked. The sum may be calculated, and the specific control work area 221, the specific control stack area 222, and the non-specific control stack area 224 may be the checksum calculation target.

  The work area 223 for non-specific control and the stack area 224 for non-specific control may be configured so that the checksum is calculated. In this case, the configuration may be such that the work area 221 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control are the checksum calculation targets. The specific control work area 223 and the non-specific control stack area 224 may be the checksum calculation target. The specific control work area 221, the specific control stack area 222, and the non-specific control stack area 222. The work area 223 and the stack area 224 for non-specific control may be configured to calculate the checksum.

  In steps S7508 and S7509 in the non-specific control clearing process (FIG. 110), "0" clear processing is performed not only for the non-specific control work area 223 but also for the non-specific control stack area 224. A configuration for executing the initial setting process may be adopted. In this case, it is preferable not to delete the information of the return address of the clear processing at the time of abnormality after the end of the clear processing for non-specific control.

  In step S7508 of the non-specific control clearing process (FIG. 110), the management start flag is cleared to "0". However, the management start flag may not be cleared to "0". In step S7508 in the non-specific control clearing process (FIG. 110), the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode counter area 233 may not be cleared to "0". The configuration may be such that the operation result storage area 234 is not cleared to “0”.

<Thirty-second embodiment>
This embodiment is different from the thirtieth embodiment in the processing configuration relating to the monitoring of the information abnormality of the main RAM 65 using the checksum. Hereinafter, a configuration different from the thirtieth embodiment will be described. The description of the same configuration as that of the thirtieth embodiment is basically omitted.

  FIG. 111 is a flowchart showing the power failure information storage processing according to the present embodiment executed by the main CPU 63. The power failure information storage processing is executed in step S6801 in the timer interruption processing (FIG. 103). Further, the processing of steps S7601 to S7613 in the power failure information storage processing is executed by the main CPU 63 using the specific control program and the specific control data.

  In steps S7601 to S7608 in the power failure information storage processing, the same processing as steps S6701 to S6708 in the power failure information storage processing (FIG. 101) in the thirtieth embodiment is executed. If the occurrence of a power failure is specified, an affirmative determination is made in step S7608, and the processing during power failure in steps S7609 to S7613 is executed.

  Specifically, first, "1" is set to a power failure flag provided in the work area 221 for specific control (step S7609). Thereby, when the process at the time of power failure is executed normally and the storage of the information in the main RAM 65 is normally performed, the supply of the operating power to the main CPU 63 is started again when the specific control "1" is set in the power failure flag of the work area 221.

  After that, a checksum is calculated for the specific control work area 221 and the specific control stack area 222 (step S7610). In this case, the work area 221 for the specific control and the storage area in the stack area 222 for the specific control to be calculated when the checksum for the specific control is calculated are stored in step S7701 of the checksum monitoring process (FIG. 112) described later. Are the same as the storage area in the specific control work area 221 and the specific control stack area 222 for which the specific control checksum is calculated. In addition, in the storage area to be calculated when calculating the checksum for the specific control, an area (specifically, an area where the setting value information indicating the setting state of the pachinko machine 10 in the work area 221 for the specific control is set) Is a set value counter). The calculated checksum for the specific control is a storage area for storing the checksum for the specific control in the work area 221 for the specific control, and is excluded from the calculation target of the checksum for the specific control. In the storage area.

  Thereafter, a checksum is calculated for the work area 223 for non-specific control and the stack area 224 for non-specific control (step S7611). In this case, the storage area in the non-specific control work area 223 and the non-specific control stack area 224, which are the calculation targets when calculating the non-specific control checksum, is a checksum monitoring process described later (FIG. 112). This is the same as the storage area in the non-specific control work area 223 and the non-specific control stack area 224 for which the non-specific control checksum is calculated in step S7706. Then, the calculated non-specific control checksum is a storage area for storing the non-specific control checksum in the specific control work area 221 and is excluded from the calculation target of the specific control checksum. Is stored in the stored storage area.

  After that, all the information of the output port in the register of the main CPU 63 is set to “0” (step S7612), and the access to the main RAM 65 is prohibited (step S7613). Then, the infinite loop is continued until the power supply is completely cut off and the processing cannot be executed.

  Next, the checksum monitoring processing executed by the main CPU 63 will be described with reference to the flowchart of FIG. Note that the checksum monitoring process is executed in the main process (FIG. 100) instead of steps S6604 to S6606. The processing of steps S7701 to S7711 in the checksum monitoring process is executed by the main CPU 63 using the specific control program and the specific control data.

  First, a checksum for specific control is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7701). The method of calculating the checksum for the specific control is the same as that in step S7610 in the power failure information storage processing (FIG. 111). Thereafter, the checksum for the specific control calculated in step S7610 of the power failure process executed immediately before the supply of the operating power to the MPU 62 is stopped and stored in the work area 221 for the specific control is used for the specific control. Is read from the work area 221, and the read checksum for specific control is compared with the checksum for specific control calculated in step S7701 (step S7702). It is determined whether the checksums for the specific control match (step S7703).

  If the checksums for the specific control do not match (step S7703: NO). A clear process of the work area 221 for specific control is executed (step S7704). In the clearing process, the work area for the specific control is removed except for the area (specifically, the set value counter) in which the information of the set value indicating the setting state of the pachinko machine 10 is set in the work area 221 for the specific control. 221 is cleared to “0” and the initial setting is executed. As a result, since the area indicating whether the winning / rejecting lottery mode is the high probability mode is cleared to “0”, the winning / rejecting lottery is performed regardless of the winning / rejecting lottery mode immediately before the supply of the operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game is not executed, the opening / closing execution mode is not executed, and the general-purpose display unit 38a is not variably displayed, and the general electric functioning object 34a is in the closed state. Situation. In addition, since the hold storage area 65a and the ordinary power hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is erased and the general figure display unit is cleared. The hold information for 38a is deleted. In the clearing process, the initialization is executed after the various registers of the main CPU 63 are also cleared to "0". In addition, the stack area 222 for specific control is cleared to “0” and initialization is performed (step S7705).

  If an affirmative determination is made in step S7703 or if the process of step S7705 is performed, a checksum for non-specific control is calculated for the work area 223 for non-specific control and the stack area 224 for non-specific control (step S7703). S7706). The method of calculating the checksum for the non-specific control is the same as that in step S7611 in the power failure information storage processing (FIG. 111). After that, the non-specific control checksum calculated in step S7611 of the power failure processing executed immediately before the supply of the operating power to the MPU 62 is stopped and stored in the specific control work area 221 is specified. And reads the non-specific control checksum from the non-specific control checksum calculated in step S7706 (step S7707). Then, it is determined whether or not the checksums for the non-specific control match (step S7708).

  If the checksums for the non-specific control do not match (step S7708: NO), the information of the flag register of the main CPU 63 is saved in the stack area 222 for the specific control by a push instruction as "PUSH PSW" (step S7708: NO). Step S7709). The flag register includes a carry flag, a zero flag, a P / V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution results of an operation instruction, a rotate instruction, an input / output instruction, and the like. By saving such flag register information before the subroutine program corresponding to the non-specific control clearing process is started, the flag in the state before the subroutine call or the subroutine is changed after the start of the subroutine is changed. Register information can be saved in the stack area 222 for specific control. The information amount of the flag register is 1 byte.

  Thereafter, by reading out a subroutine program corresponding to the non-specific control clear processing set in the non-specific control program, the non-specific control clear processing is started (step S7710). In this case, information for specifying the return address of the checksum monitoring process after the execution of the non-specific control clear process is written to the specific control stack area 222 by a push command. When the clear processing for the non-specific control is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the program for monitoring the checksum indicated by the return address.

  When the program returns to the program for the clearing process at the time of abnormality after executing the clearing process for the non-specific control, the flag register saved in the stack area 222 for the specific control in step S7709 by a pop command as “POP PSW” Is returned to the flag register of the main CPU 63 (step S7711). As a result, the information of the flag register of the main CPU 63 returns to the information at the time when step S7709 was executed. That is, the information in the flag register of the main CPU 63 returns to the information for executing the specific control.

  FIG. 113 is a flowchart showing the non-specific control clear processing. The processing of steps S7801 to S7818 in the non-specific control clear processing is executed by the main CPU 63 using the non-specific control program and the non-specific control data.

  In steps S7801 to S7807 in the non-specific control clear processing, the same processing as steps S7501 to S7507 in the non-specific control clear processing (FIG. 110) in the thirty-first embodiment is executed.

  Thereafter, a process of partially clearing the work area 223 for non-specific control is executed (step S7808). In the partial clear processing, a storage area other than the storage area in which information of various registers of the main CPU 63 used in the processing corresponding to the specific control is saved among the storage areas of the work area 223 for non-specific control. Is cleared to "0". Specifically, the WA buffer, the BC buffer, the DE buffer, the HL buffer, the IX buffer, and the IY buffer among the respective storage areas of the non-specific control work area 223 are not cleared to “0”, and the storages other than these various buffers are not cleared. Clear the area to "0".

  In this case, all of the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, the operation result storage area 234, and the management start flag are cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control. Also, by preventing the storage area in which the information of the various registers of the main CPU 63 used in the process corresponding to the specific control has been saved from being cleared to “0”, the process corresponding to the non-specific control is completed. When returning to the process corresponding to the specific control, it is possible to return the information used in the process corresponding to the specific control to various registers of the main CPU 63.

  After that, an initial setting process is executed (step S7809). In the initial setting processing, initial setting is performed on the storage area that has been cleared to “0” in step S7808 in the work area 223 for non-specific control.

  Thereafter, a process of partially clearing the stack area 224 for non-specific control is executed (step S7810). In the partial clearing process, information on the return address of the checksum monitoring process (FIG. 112) after the non-specific control clearing process is completed is stored in each storage area of the non-specific control stack area 224. The storage areas other than the stored storage area are cleared to "0". As a result, while the information of the return address of the checksum monitoring process (FIG. 112) after the non-specific control clearing process ends, the information abnormality of the non-specific control stack area 224 is prevented. Can be eliminated.

  Thereafter, an initial setting process is executed (step S7811). In the initial setting process, initial setting is performed on the storage area that has been cleared to “0” in step S7810 in the stack area 224 for non-specific control.

  After that, the processing of steps S7812 to S7818 is executed. The processes in steps S7812 to S7818 execute the same processes as those in steps S7510 to S7516 in the non-specific control clear process (FIG. 110) in the thirty-first embodiment.

  According to the above configuration, the checksum for the specific control work area 221 and the specific control stack area 222 and the checksum for the non-specific control work area 223 and the non-specific control stack area 224 are different. Calculated individually. Thus, it is possible to individually specify the information abnormality in each of the storage area corresponding to the specific control in the main RAM 65 and the storage area corresponding to the non-specific control in the main RAM 65.

  When the checksum for the specific control is abnormal, the process of clearing “0” and the initial setting process are executed for the work area 221 for the specific control and the stack area 222 for the specific control, If there is an abnormality in the checksum, the process of clearing “0” and the initial setting process are executed for the work area 223 for non-specific control and the stack area 224 for non-specific control. As a result, it is possible to narrow down the target for executing the process of clearing “0” and the initial setting process to the area where the abnormality of the checksum is specified.

  The process of clearing the work area 221 for the specific control and the stack area 222 for the specific control to “0” and the process of initializing are executed in the process corresponding to the specific control, and the work area 223 for the non-specific control is set to “ The process of clearing "0" and the process of initial setting are executed in a process corresponding to the non-specific control. As a result, the work area 221 for specific control and the stack area 222 for specific control are also treated as dedicated storage areas for processing corresponding to specific control, and the non-specific The control work area 223 can be handled as a dedicated storage area for processing corresponding to the non-specific control.

  Although the management start flag is cleared to "0" in step S7808 in the non-specific control clearing process (FIG. 113), the management start flag may not be cleared to "0". In step S7808 in the non-specific control clearing process (FIG. 113), the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode counter area 233 may not be cleared to "0". The operation result storage area 234 may not be cleared to “0”.

<Thirty-third embodiment>
In the present embodiment, the processing configuration executed by the main CPU 63 is different from that of the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

  FIG. 114 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing of steps S7901 to S7924 in the main processing is executed by using a program for specific control and data for specific control in the main CPU 63.

  First, power-on initial setting processing is executed (step S7901). In the power-on initialization process, for example, the process waits without advancing to the next process until a predetermined time for wait (specifically, one second) elapses after the main process is started. The operation start and the initial setting of the symbol display device 41 are completed in the predetermined period for the weight. Also, access to the main RAM 65 is permitted.

  After that, an internal function register setting process is executed (step S7902). In the internal function register setting process, the interrupt cycle of the first timer interrupt process (FIG. 117), which is a process that is started by periodically interrupting the main process, is set to the first interrupt cycle (specifically, 4 milliseconds). And the interrupt cycle of the second timer interrupt process (FIG. 123), which is a process that is started by periodically interrupting the main process, is set to the second interrupt cycle shorter than the first interrupt cycle. (Specifically, 2 milliseconds).

  That is, in the present embodiment, the first timer interrupt process and the second timer interrupt process exist as timer interrupt processes so that the interrupt cycle is relatively long and short. Both the first timer interrupt processing and the second timer interrupt processing are started by interrupting the main processing. The second timer interrupt process is started by interrupting the first timer interrupt process. On the other hand, the first timer interrupt process does not start by interrupting the second timer interrupt process. Further, if both the first interrupt cycle and the second interrupt cycle have elapsed in a situation where both the first timer interrupt processing and the second timer interrupt processing have not been executed, the second interrupt cycle is performed regardless of the order in which the cycles have elapsed. It is started first from the timer interrupt processing. In this regard, it can be said that the second timer interrupt process is a process that is started with priority over the first timer interrupt process.

  In the internal function register setting processing, the first interrupt cycle of the first timer interrupt processing is set in a predetermined register of the main CPU 63, and the second interrupt cycle of the second timer interrupt processing is set in a specific register of the main CPU 63. I do. In addition, in the internal function register setting processing, in addition to the setting of the first and second interrupt cycles, for example, setting processing of a numerical range of various counters such as a numerical range of the jackpot random number counter C1 is executed.

  After that, “1” is set in the startup processing flag provided in the work area 221 for the specific control (step S7903). The start-up processing flag indicates that the first timer interrupt processing should be terminated without executing various processings set in the first timer interrupt processing even if the first timer interrupt processing is started. Is a flag for specifying by the main CPU 63. By setting the start-up processing flag to “1”, even if the first timer interrupt processing is started, various processings set in the first timer interrupt processing are not executed and the first timer interrupt processing is not executed. The timer interrupt processing ends.

  After that, interrupt permission is set (step S7904). Thus, the first timer interrupt process (FIG. 117) is started by interrupting at the first interrupt period, and the second timer interrupt process (FIG. 123) is started by interrupting at the second interrupt period. However, since the start-up processing flag is set to “1” in step S7903, even if the first timer interrupt processing is started, various processings set in the first timer interrupt processing are executed. Without this, the first timer interrupt processing ends.

  Thereafter, it is determined whether or not the reset button 68c has been pressed (step S7905). That is, it is determined whether or not the power ON operation of the pachinko machine 10 is performed while the reset button 68c is being pressed, and the supply of the operating power to the MPU 62 is started. Here, in the present embodiment, the main control device 60 is provided with the setting key insertion section 68a and the reset button 68c, but is not provided with the update button 68b. Further, the main control device 60 is provided with first to fourth notification display devices 201 to 204 as in the eleventh embodiment, instead of the first to third notification display devices 69a to 69c.

  If the reset button 68c has not been pressed (step S7905: NO), it is determined whether or not “1” has been set in the power failure flag provided in the work area 221 for specific control (step S7906). When a power failure process is executed in a power failure information storage process (step S8202) of a first timer interrupt process (FIG. 117) described later, “1” is set to the power failure flag. The power failure flag is a flag for the main CPU 63 to specify whether or not the processing at the time of power failure was properly performed at the time of the previous power-off.

  If “1” is set in the power failure flag (step S7906: YES), a checksum is calculated for the specific control work area 221 and the specific control stack area 222 (step S7907). The method of calculating the checksum is arbitrary, but is the same as the calculation method used when the checksum is calculated in the power failure information storage process (step S8202) of the first timer interrupt process (FIG. 117) described later. Has become the way. The checksum calculated in the power failure process is stored in the specific control work area 221. The storage area of the specific control work area 221 in which the checksum is stored is used for calculating the checksum. It is excluded from the storage area to be operated.

  That is, when calculating the checksum, the storage area to be calculated, which is a part of the storage area in the work area 221 for specific control and the stack area 222 for specific control, is to be calculated. In the storage area to be calculated, the checksum is calculated in the process at the time of power failure when the supply of the operating power to the MPU 62 is stopped, and then the supply of the operating power to the MPU 62 is restarted, and the process of step S7907 is executed. Until the power supply such as the backup power to the work area 221 for specific control and the stack area 222 for specific control is continued, the storage area is basically not rewritten. Therefore, the information of the specific control work area 221 and the specific control stack area 222 is not changed between the time when the supply of the operation power to the MPU 62 is stopped and the time when the supply of the operation power to the MPU 62 is restarted. In this case, the checksums for the specific control work area 221 and the specific control stack area 222 are the same as those immediately before the supply of the operating power to the MPU 62 is stopped. In the storage area to be calculated when calculating the checksum, an area (specifically, a setting value counter) in which setting value information indicating the setting state of the pachinko machine 10 in the work area 221 for specific control is set. )It is included. The check sum calculation target does not include the work area 223 for non-specific control and the stack area 224 for non-specific control.

  After that, the specific control work area 221 and the specific control stack area calculated in the power outage process executed immediately before the supply of the operating power to the MPU 62 is stopped and stored in the specific control work area 221 The checksum for 222 is read from the work area 221 for specific control, and the read checksum is compared with the checksum calculated in step S7907 (step S7908). Then, it is determined whether or not the checksums match (step S7909).

  If a negative determination is made in step S7906 or step S7909, that is, if the power failure flag is not set to “1” or the checksums do not match, the game stop flag provided in the work area 221 for specific control Is set to "1" (step S7910). The game stop flag is a situation in which a positive determination is made in step S8207 and the processing of steps S8208 to S8221 is not executed in a first timer interrupt processing (FIG. 117) described later, that is, the execution of the processing for advancing the game is stopped. This flag is used by the main CPU 63 to specify whether the situation is to be performed. When the game stop flag is set to “1”, an affirmative determination is made in step S8207 of a first timer interrupt process (FIG. 117) described later, so that the process of steps S8208 to S8221 is not executed. As a result, when the power failure flag is not set to “1” because the power failure processing was not properly performed at the time of the previous power shutdown, the game progress is stopped, and the specific control If the checksums do not match for at least one of the work area 221 and the stack area 222 for specific control due to a change in the storage state of information since the last power-off, the game progress is stopped. State.

  In this case, in the storage area to be calculated when the checksum is calculated, the area in which the setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control as described above (specifically, Setting value counter). Therefore, if the set value abnormality has occurred after the previous power-off, the checksums do not match, and the progress of the game is stopped.

  On the other hand, even in a situation where the game stop flag is set to “1”, the processing of steps S8202 to S8206 in the first timer interrupt processing (FIG. 117) is executed. Therefore, even in the situation where the progress of the game is stopped, the power failure monitoring is executed, and the hit random number counter C1, the big hit type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated. Fraud detection is performed.

  Thereafter, at the start of the supply of the operating power, an abnormal command indicating that an abnormality has occurred with respect to the power failure flag or the checksum is transmitted to the sound emission control device 81 (step S7911). Upon receiving the abnormal command, the sound light emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the information abnormality at the start of the supply of the operating power, and “change the setting from the speaker unit 54. Is output. In addition, a character image “Please change the setting.” Is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and is terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, even if the supply of the operating power to the pachinko machine 10 is temporarily stopped, the above-described notification will be made when the supply of the operating power to the pachinko machine 10 is restarted until the set value updating process (step S7918) is executed. The configuration may be continued.

  In the situation where the progress of the game is stopped, the manager of the gaming hall confirming the above notification temporarily stops the supply of the operating power to the pachinko machine 10, and thereafter resumes the supply of the operating power to the pachinko machine 10. In this case, an operation for performing the set value update process (step S7918) is performed. Accordingly, when an abnormality occurs in the power failure flag or the checksum at the start of the supply of the operation power, it is possible to newly set the set value in the set value update process (step S7918). .

  In particular, as described above, in the storage area to be calculated when the checksum is calculated, the area in which the setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control (specifically, the setting value) Counter), an error may have occurred in the set value if an error has occurred in the checksum. On the other hand, when an abnormality occurs in the checksum as described above, the execution of the set value update processing (step S7918) is prompted, so that the game is not performed with the abnormal set value. It is possible to do.

  If the power failure flag is set to “1” and the checksum is normal (step S7906 and step S7909: YES), it is determined whether the setting key insertion unit 68a is turned on using the setting key. Then, it is determined whether the front door frame 14 is open with respect to the inner frame 13 and the gaming machine main body 12 is open with respect to the outer frame 11 (step S7913). The front door opening sensor 95 is used to detect whether the front door frame 14 is open with respect to the inner frame 13 in the same manner as in the thirty embodiment. For detecting whether or not the camera is in the open state, the main body open sensor 96 is used similarly to the thirtieth embodiment. The setting key insertion section 68a is turned ON using the setting key (step S7912: YES), the front door frame 14 is open with respect to the inner frame 13, and the gaming machine body is positioned with respect to the outer frame 11. If 12 is in the open state (step S7913: YES), a setting confirmation process is executed (step S7914). In the setting confirmation processing, the current setting values of the pachinko machine 10 are confirmed on the first to fourth notification display devices 201 to 204 used for displaying various parameters as management results of the game history. A process for displaying a status indicating that the pachinko machine 10 is present and displaying a current set value of the pachinko machine 10 is executed.

  FIG. 115 is a flowchart showing the setting confirmation process. Note that the processing of steps S8001 to S8003 in the setting confirmation processing is executed using the specific control program and the specific control data in the main CPU 63.

  First, "1" is set to a setting confirmation display flag provided in the work area 221 for specific control (step S8001). The setting confirmation display flag is a flag for the main CPU 63 to specify that the current setting value of the pachinko machine 10 is being confirmed. When the setting confirmation display flag is set to “1”, corresponding display control is performed on the first to fourth notification display devices 201 to 204 in a second timer interrupt process (FIG. 123) described later. Will be This causes the first to fourth notification display devices 201 to 204 to indicate that the current setting value of the pachinko machine 10 is being checked and to indicate the current setting value of the pachinko machine 10. Is performed.

  Thereafter, it is determined whether or not the setting key insertion section 68a is operated to be turned off using the setting key (step S8002). In this case, the configuration may be such that it is determined whether the setting key insertion section 68a has been switched from the ON state to the OFF state, or the configuration may be such that it is determined whether the setting key insertion section 68a is in the OFF state. If the setting key insertion section 68a has not been turned off (step S8002: NO), the processing of step S8002 is repeated as it is.

  If the setting key insertion section 68a is turned off (step S8002: YES), the setting confirmation display flag in the work area 221 for specific control is cleared to "0" (step S8003). This causes the first to fourth notification display devices 201 to 204 to indicate that the current setting value of the pachinko machine 10 is being checked and to indicate the current setting value of the pachinko machine 10. Is canceled. In this case, the first to fourth notification display devices 201 to 204 start displaying the management result of the game history.

  As described above, in the present embodiment, the power-on operation of the pachinko machine 10 is performed in a state where the setting key insertion portion 68a is turned on by the setting key without pressing the reset button 68c, thereby operating power to the main CPU 63. In the situation where the supply of is started and the main processing is started, the reset button 68c is not pressed and the setting key insertion unit 68a is turned on, and the processing that enables the progress of the game in the main processing is performed. The setting confirmation process is executed in a state where the processing at the time of starting the supply of the operating power, which is a situation before the execution, is being executed. This makes it possible to confirm the set value in a situation where no game is being played.

  Assuming that the set value is confirmed in a situation where the progress of the game is continued, for example, if the set value is confirmed during the execution of the game round, the set value is confirmed while being performed. Therefore, there is a possibility that a shift to the open / close execution mode occurs. In this case, there is a possibility that game balls cannot be fired toward the special power winning device 32 even though the open / close execution mode has been started. Further, if the set value is confirmed during the execution of the opening / closing execution mode, the opening / closing execution mode proceeds under the condition that the set value is confirmed. There is a possibility that the game ball cannot be fired toward.

  Assuming a case where the progress of the game is stopped when the set value is confirmed, if the confirmation of the set value is started in a situation where the game is being performed, the progress of the game is stopped halfway May be complicated. For example, if the confirmation of the set value is started during the execution of the game round and the progress of the game is to be stopped halfway, a process for stopping the game round is required. In this case, when the confirmation of the set value is started, the variation display of the symbol on the symbol display device 41 is stopped halfway, and when the confirmation of the set value is completed, the variation display of the symbol on the symbol display device 41 is restarted. If so, complicated processing will be required. In addition, for example, if the confirmation of the set value is started during the execution of the opening / closing execution mode and the progress of the game is stopped in the middle, a process for stopping the opening / closing execution mode in the middle is required. In addition, when the confirmation of the set value is started in the middle of the execution of the variation display of the pattern on the ordinary figure display unit 38a and the progress of the game is to be stopped in the middle, the process for stopping the variation display of the pattern in the middle is performed. Required. In addition, if the setting value check is started during the execution of the opening execution state of the general electricity role object 34a and the progress of the game is to be stopped on the way, a process for stopping the opening execution state on the way is required. Become. On the other hand, a configuration in which the set value is confirmed after all the games have been completed may be considered. In this case, the game times, the opening / closing execution mode, the variation display of the pattern on the general-purpose display section 38a, and It is necessary to wait for a situation in which none of the release execution states of the object 34a is executed, and there is a possibility that the waiting time until starting to check the set value may be increased.

  On the other hand, in the main processing executed when the supply of the operating power to the main CPU 63 is started, the state before the supply of the operating power, which is the situation before the processing enabling the progress of the game is executed, is performed. Since the setting confirmation process is executed in a situation where the process is being executed, the setting value is confirmed in a situation where the progress of the game has already been stopped. This makes it possible to prevent the setting value from being checked in a situation where the game is in progress, and to stop the game progressing in the middle of the setting value check, or to stop the game progress. There is no need to wait for confirmation of the set value until Therefore, it is possible to appropriately confirm the set value.

  Returning to the description of the main processing (FIG. 114), when the reset button 68c is pressed (step S7905: YES), the RAM clear processing is executed (step S7915). In the RAM clear processing, the work area for the specific control, except for the area (specifically, the set value counter) in which the set value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for the specific control. 221 is cleared to “0” and the initial setting is executed. As a result, since the area indicating whether the winning / rejecting lottery mode is the high probability mode is cleared to “0”, the winning / rejecting lottery is performed regardless of the winning / rejecting lottery mode immediately before the supply of the operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game is not executed, the opening / closing execution mode is not executed, and the general-purpose display unit 38a is not variably displayed, and the general electric functioning object 34a is in the closed state. Situation. In addition, since the hold storage area 65a and the ordinary power hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is erased and the general figure display unit is cleared. The hold information for 38a is deleted. In the RAM clearing process, the stack area 222 for specific control is cleared to "0" and initialization is performed. In the RAM clearing process, initialization is performed after various registers of the main CPU 63 are also cleared to "0". In this initial setting, the same processing as the internal function register setting processing in step S7902 (step S7902) is executed.

  On the other hand, in the RAM clear processing, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to “0”. This makes it possible to prevent the work area 223 for non-specific control and the stack area 224 for non-specific control from being cleared to “0” by the clearing operation by the manager of the gaming hall.

  Thereafter, it is determined whether or not the setting key insertion section 68a has been turned ON using the setting key (step S7916), and the front door frame 14 is opened with respect to the inner frame 13 and the outer frame 11 is opened. Then, it is determined whether or not the gaming machine main body 12 is in an open state (step S7917). The front door opening sensor 95 is used to detect whether the front door frame 14 is open with respect to the inner frame 13 in the same manner as in the thirty embodiment. For detecting whether or not the camera is in the open state, the main body open sensor 96 is used similarly to the thirtieth embodiment. The setting key insertion portion 68a is turned ON using the setting key (step S7916: YES), the front door frame 14 is open with respect to the inner frame 13, and the gaming machine body is positioned with respect to the outer frame 11. If 12 is in the open state (step S7917: YES), a setting value update process is executed (step S7918).

  FIG. 116 is a flowchart showing the setting value updating process. Note that the processing of steps S8101 to S8107 in the setting value update processing is executed using the specific control program and the specific control data in the main CPU 63.

  First, "1" is set to a setting update display flag provided in the work area 221 for specific control (step S8101). The setting update display flag is a flag for the main CPU 63 to specify that the setting value of the pachinko machine 10 is being updated. When the setting update display flag is set to “1”, corresponding display control is performed on the first to fourth notification display devices 201 to 204 in a second timer interrupt process (FIG. 123) described later. Is As a result, a display indicating that the set values of the pachinko machine 10 are being updated and a display indicating the current set values of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204. Is

  Thereafter, it is determined whether or not the value of the set value counter provided in the work area 221 for specific control is 1 or more corresponding to “Setting 1” and 6 or less corresponding to “Setting 6” (step). S8102). If the value of the set value counter is “0” or 7 or more, a negative determination is made in step S8102, and “1” is set in the set value counter (step S8103). Thereby, the set value of the pachinko machine 10 becomes “Setting 1”.

  If an affirmative determination is made in step S8102 or if the process of step S8103 is performed, it is determined whether or not the setting key insertion unit 68a has been turned off using the setting key (step S8104). In this case, the configuration may be such that it is determined whether the setting key insertion section 68a has been switched from the ON state to the OFF state, or the configuration may be such that it is determined whether the setting key insertion section 68a is in the OFF state.

  If the setting key insertion section 68a has not been turned OFF (step S8104: NO), the setting value counter in the work area 221 for specific control is provided on condition that the reset button 68c is pressed (step S8105: YES). Is incremented by 1 (step S8106). Thus, each time the reset button 68c is pressed once, the set value is updated to the next higher level. If the reset button 68c is not pressed (step S8105: NO) or if the value of the set value counter is incremented by 1, the process returns to step S8102. If it is determined that the value is 7 or more, “1” is set to the set value counter in step S8103. As a result, when the reset button 68c is pressed once in the situation of "Setting 6," the display returns to "Setting 1."

  If the setting key insertion section 68a has been turned OFF (step S8104: YES), the setting update display flag in the work area 221 for specific control is cleared to "0" (step S8107). As a result, a display indicating that the set values of the pachinko machine 10 are being updated and a display indicating the current set values of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204. Is released. In this case, the first to fourth notification display devices 201 to 204 start displaying the management result of the game history.

  As described above, in the present embodiment, when the power of the pachinko machine 10 is turned on while the reset button 68c is pressed, the supply of the operating power to the main CPU 63 is started, and the reset is performed in a state where the main processing is started. The button 68c is pressed, and the RAM clear processing (step S7915) is executed regardless of whether the setting key insertion unit 68a is turned on. As a result, the operation of turning on the power of the pachinko machine 10 while pressing the reset button 68c is uniquely linked to the execution of the RAM clear processing (step S7915), and the RAM clear processing (step S7915) is performed. The operation content to be generated can be made easy for the manager of the game hall to understand.

  Even if the RAM clear processing (step S7915) is executed, the set value counter in the work area 221 for specific control is not cleared to "0" and the information of the set value counter is not changed. This makes it possible to prevent the set values from being changed even when the RAM clear processing (step S7915) is executed.

  The RAM clear processing is performed based on not only performing the power ON operation of the pachinko machine 10 while pressing the reset button 68c, but also performing the power ON operation of the pachinko machine 10 while performing the ON operation of the setting key insertion unit 68a with the setting key. Not only (Step S7915) but also a set value update process (Step S7918) is executed. Also, as described above, the setting confirmation process (step S7914) is performed based on performing the power-on operation of the pachinko machine 10 while performing the ON operation of the setting key insertion unit 68a with the setting key without pressing the reset button 68c. Be executed. As a result, it is possible to make the ON operation for the setting key insertion unit 68a common as the operation for executing the processing related to the setting value. Therefore, it is possible to make the operation content for generating the processing related to the set value easy to understand for the manager of the game hall.

  When the power of the pachinko machine 10 is turned on while the setting key insertion portion 68a is turned on by the setting key, and the pressing operation of the reset button 68c is not added, the setting confirmation process is executed, and the reset is performed. When a pressing operation of the button 68c is added, a set value updating process is executed. Accordingly, it is possible to make the execution target process different from the setting confirmation process and the setting value update process depending on whether or not the reset button 68c is pressed. Therefore, it is possible to make the contents of the operation for executing the desired processing of the setting confirmation processing and the setting value update processing easy for the manager of the gaming hall to understand. In addition, by making the operation content for executing the setting value update processing more than the setting confirmation processing, it is possible to make it particularly difficult to perform an illegal operation of the setting value update processing.

  Returning to the description of the main process (FIG. 114), when the process of step S7911 is performed, when a negative determination is made in step S7912 or step S7913, when the process of step S7914 is performed, a negative determination is made in step S7916 or step S7917. When the determination is made or when the process of step S7918 is performed, the start-up process flag in the work area 221 for specific control is cleared to “0” (step S7919). By clearing the start-up processing flag to “0”, the state in which various processes set in the first timer interrupt processing are not executed even if the first timer interrupt processing is started is released. In step S7919, the power failure flag in the work area 221 for specific control is also cleared to "0".

  Thereafter, a return command is transmitted to the sound emission control device 81 (step S7920). The return command includes information indicating the number of pieces of hold information for the special figure display unit 37a, information indicating the current pass / fail lottery mode, information indicating the current support mode, and whether or not the open / close execution mode is being executed. Information and information indicating whether or not the game is being executed. These pieces of information are set based on information stored in the work area 221 for specific control. Upon receiving the return command, the voice light emission control device 81 changes the display content of the symbol display device 41, the light emission content of the display light emitting unit 53, and the sound output content of the speaker unit 54 according to various information set in the return command. Content.

  Here, when confirming the set value of the pachinko machine 10, it is necessary to turn on the power of the pachinko machine 10 while turning on the setting key insertion section 68a with the setting key. Then, for example, when it becomes necessary to check the set value during the execution of the game round, the power-off operation of the pachinko machine 10 is performed during the execution of the game round. The power ON operation of the pachinko machine 10 is performed while the ON operation is performed. In this case, since the backup power is not supplied to the RAM provided in the sound emission control device 81, the effect for the game time in the RAM of the sound emission control device 81 is performed at the stage when the power-off operation of the pachinko machine 10 is performed. Is erased. On the other hand, since backup power is supplied to the main RAM 65 and clear processing of the main RAM 65 is not executed when checking the set value, the power OFF operation of the pachinko machine 10 is performed during execution of the game. When the power ON operation of the pachinko machine 10 is performed while the setting key insertion unit 68a is subsequently operated by the setting key, the pattern change display is performed on the special figure display unit 37a after the setting confirmation process is performed. Will be restarted. Then, a situation occurs in which the symbol display is not displayed on the symbol display device 41, although the symbol display is displayed on the special figure display unit 37a.

  On the other hand, after the setting confirmation processing is completed, a return command is transmitted to the sound emission control device 81, and the return command includes information indicating whether or not the game is being executed. Then, when receiving the return command, the voice light emission control device 81 causes the symbol display device 41 to start the symbol variation display. This makes it possible to prevent a situation in which the symbol display is not performed on the symbol display device 41 despite the variable display of the symbol being performed on the special figure display unit 37a. . This symbol change display is performed at a relatively high speed so that each symbol in the change display is indistinguishable or difficult to identify for the player. In addition, the return command does not include the result of the rejection determination process of the game time to be restarted and the result of the distribution determination process, and does not include the information indicating the end timing of the game time to be restarted. Therefore, when the voice light emission control device 81 starts the symbol variation display on the symbol display device 41 based on the return command, if the game time to be resumed corresponds to the departure result, the next game time is started. When a command to start the command to be displayed or the demo display is received by the symbol display device 41, the variable display of the symbol based on the return command is ended, the display corresponding to the newly received command is started, and the restart target is displayed. If the game time corresponds to the jackpot result, when the opening command indicating the start of the opening / closing execution mode is received, the variation display of the symbol based on the return command is ended and the opening effect is started.

  When the return command includes information indicating that the open / close execution mode is being executed, the sound emission control device 81 starts the display effect indicating that the open / close execution mode is being executed on the symbol display device 41. To be done. This allows the player to recognize that the open / close execution mode is being executed.

  After that, the process proceeds to the remaining process of steps S7921 to S7924. That is, the main CPU 63 is configured to periodically execute the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123). Will result in a residual time. The remaining time varies in accordance with the processing completion time of each timer interrupt process, but the remaining process of steps S7921 to S7924 is repeatedly executed using the irregular time. In this regard, it can be said that the remaining processes in steps S7921 to S7924 are irregular processes that are executed irregularly. In steps S7921 to S79224, the same processes as those in steps S113 to S116 of the main process (FIG. 9) in the first embodiment are executed.

  Next, the first timer interrupt processing executed by the main CPU 63 will be described with reference to the flowchart in FIG. It should be noted that the first timer interrupt processing is periodically started at a cycle of 4 milliseconds, which is the first interrupt cycle, as described above. Further, the program corresponding to the first timer interrupt processing is set as a program for specific control.

  First, it is determined whether or not the start-up processing flag in the work area 221 for specific control is set to “1” (step S8201). As described above, “1” is set in the startup processing flag in step S7903 of the main processing (FIG. 114). If “1” is set in the start-up processing flag (step S8201: YES), the first timer interrupt processing ends without executing various processing of steps S8202 to S8221. Thereby, when the supply of the operating power to the pachinko machine 10 is started and the main process (FIG. 114) is started, the execution of the first timer interrupt process and the second timer interrupt process is permitted early. Even if there is, various processes for controlling the progress of the game in the first timer interrupt process are performed until the process at the start of the supply of the operating power ends and execution of the process for controlling the progress of the game is permitted. It can be prevented from being executed.

  As described above, the startup processing flag is cleared to “0” in step S7919 when the processing at the start of the supply of the operation power is completed in the main processing (FIG. 114). In the first timer interrupt process, when “1” is not set in the start-up process flag (step S8201: NO), the processes after step S8202 are executed.

  In steps S8202 to S8219 and step S8221, the same processes as those in steps S3701 to S3719 of the timer interrupt process (FIG. 69) in the fifteenth embodiment are executed. These processes are executed by the main CPU 63 using a program for specific control and data for specific control. In this case, as described above, in the main processing (FIG. 114), it is determined that the power failure flag is not set to “1” (step S 7906: NO) or when it is determined that the checksums do not match (step S 7906). (S7909: NO), the game stop flag in the work area 221 for specific control is set to "1" (step S7910). When "1" is set to the game stop flag, the processing of steps S8201 to S8206 is executed in the first timer interrupt processing, but the processing of steps S8208 to S8221 is performed by making an affirmative determination in step S8207. Do not execute. As a result, when the power failure flag is not set to “1” because the power failure processing was not properly performed at the time of the previous power shutdown, the game progress is stopped, and the specific control If the checksums do not match for at least one of the work area 221 and the stack area 222 for specific control due to a change in the storage state of information since the last power-off, the game progress is stopped. State. For example, launching of a game ball is prohibited by not executing the process of step S8212. In addition, execution of the game round and the opening / closing execution mode is prohibited by not executing the processing of step S8214. Also, payout of game balls is prohibited by not executing the processing of step S8218.

  On the other hand, even in such a situation where the progress of the game is stopped, the power failure monitoring is performed in step S8202, and the hit random number counter C1, the big hit type counter C2, and the reach random number counter C3 in steps S8203 and S8204 are performed. In addition, the random number initial value counter CINI is updated, and further, fraud detection is performed in step S8206.

  In the first timer interrupt process, a setting monitoring process is performed in step S8220. FIG. 118 is a flowchart showing the setting monitoring process. Note that the processing of steps S8301 to S8303 in the setting monitoring processing is executed using a program for specific control and data for specific control in the main CPU 63.

  It is determined whether the set value of the pachinko machine 10 is normal by checking the value of the set value counter in the work area 221 for specific control (step S8301). Specifically, when the setting value set in the setting value counter is any one of “Setting 1” to “Setting 6”, it is determined that the setting is normal, and when the setting value is “0” or 7 or more, an abnormality is determined. It is determined that there is.

  If the set value is abnormal (step S8301: NO), "1" is set to the game stop flag in the work area 221 for specific control, as in step S7910 in the main process (FIG. 114) (step S8302). When the game stop flag is set to “1”, an affirmative determination is made in step S8207 of the first timer interrupt process (FIG. 117), so that the process of steps S8208 to S8221 is not executed. Thereby, when it is determined that the set value is abnormal, the progress of the game is stopped. On the other hand, even if the game stop flag is set to “1”, the processing of steps S8202 to S8206 in the first timer interrupt processing (FIG. 117) is executed, and the progress of the game is stopped. In this situation, the power outage monitoring is executed, the hit random number counter C1, the big hit type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated, and further, fraud detection is executed.

  After that, an abnormal command indicating that the set value is abnormal is transmitted to the sound emission control device 81 (step S8303). Upon receiving the abnormal command, the sound light emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the set value abnormality, and causes the speaker unit 54 to output a sound “Please change the setting.” . In addition, a character image “Please change the setting.” Is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and is terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, even if the supply of the operating power to the pachinko machine 10 is temporarily stopped, the supply of the operating power to the pachinko machine 10 is restarted until the set value updating process (step S7918) of the main process (FIG. 114) is executed. The notification may be continued when the notification is made.

  In the situation where the progress of the game is stopped, the manager of the gaming hall confirming the above notification temporarily stops the supply of the operating power to the pachinko machine 10, and thereafter resumes the supply of the operating power to the pachinko machine 10. In this case, an operation for performing the set value update process (step S7918) is performed. This makes it possible to newly set the set value in the set value update process (step S7918) when a set value abnormality occurs.

  Here, the process of monitoring whether or not the set value is abnormal is executed in a first timer interrupt process (FIG. 117) that is periodically started. This makes it possible to monitor whether the set value is abnormal even in a situation where a game is being played. Therefore, it is possible to prevent the game from continuing even though the set value is abnormal. Further, monitoring whether the set value is abnormal is executed every time a monitoring trigger occurs. This makes it possible to increase the frequency of monitoring whether the set value is abnormal.

  In the main process (FIG. 114), a process for monitoring whether the set value is normal is not set. If a process for monitoring whether or not the set value is normal is set in the process at the start of the supply of the operation power in the main process (FIG. 114), the power failure flag and the checksum are set at the start of the supply of the operation power. It is necessary to monitor whether the set value is normal in addition to the monitoring of the setting, and the monitoring load increases. Further, if it is specified that the set value is abnormal at the start of supply of the operating power, the RAM clear processing (step S7915) and the set value update processing (step S7918) are to be executed. Is complicated. On the other hand, since the process for monitoring whether the set value is normal is not set in the main process (FIG. 114), the processing configuration of the process at the start of the supply of the operating power is preferable. It becomes possible. Even if the process for monitoring whether the set value is normal in the process at the start of the supply of the operating power is not set, the first timer interrupt process (FIG. 117) is performed as described above. In this configuration, the setting monitoring process (step S8220) is performed, so that if the setting value is abnormal, it can be dealt with.

  In the configuration in which the first timer interrupt process is executed as described above, in the present embodiment, as described above, the second timer interrupt process (FIG. 123) is performed separately from the first timer interrupt process (FIG. 117) as the timer interrupt process. The second timer interrupt process exists and is started by interrupting the first timer interrupt process even during the execution of the first timer interrupt process. In this case, although illustration is omitted in the first timer interrupt process, the timer interrupt process is prohibited and the timer interrupt process is permitted before and after each process of steps S8201 to S8221. For example, the timer interrupt processing is prohibited before executing the lottery random number update processing (step S8203), and the timer interrupt processing is permitted after executing the lottery random number update processing (step S8203). This makes it possible to prevent the second timer interrupt process from being interrupted and activated during the execution of the lottery random number update process. Further, the timer interrupt processing is prohibited before executing the special figure special power control processing (step S8214), and the timer interrupt processing is permitted after executing the special figure special power control processing (step S8214). This makes it possible to prevent the second timer interrupt process from being interrupted and activated during the execution of the special figure special power control process.

  Next, a configuration for controlling display of various display units by the main CPU 63 will be described. FIG. 119 is a block diagram for explaining a configuration for controlling display of various display units by the main CPU 63.

  The target for which the main CPU 63 performs display control is a special figure display unit 37a, a special figure reservation display unit 37b, a general figure display unit 38a, a general figure reservation display unit 38b, and the first to fourth notification display devices 201 to 201. 204 are present. Each of these is provided as a segment display section in which a plurality of LED display segments are arranged. These segment display sections enter a light emitting state by setting data corresponding to the light emitting state (for example, data of “1” which is one of the binary data), and data corresponding to the light-off state (eg, binary data). When the other data “0” is set, the light is turned off.

  The main control board 61 is provided with a first display circuit 261 corresponding to the special figure display section 37a, and a second display circuit 262 corresponding to the special figure reservation display section 37b. A third display circuit 263 is provided so as to correspond to the display unit 38a, and a fourth display circuit 264 is provided so as to correspond to the general-purpose reservation display unit 38b. A fifth display circuit 265 is provided corresponding to 204. In the eleventh embodiment, the first to fourth display ICs 205 to 208 are provided on the main control board 61 in one-to-one correspondence with the first to fourth notification display devices 201 to 204. However, in the present embodiment, the first to fourth display ICs 205 to 208 are not provided.

  The first display circuit 261 provides data corresponding to the supplied display data to each of the plurality of display segments of the special figure display unit 37a. Thereby, each display segment of the special figure display unit 37a is turned on or off in a mode corresponding to the display data provided to the first display circuit 261. In this case, the first display circuit 261 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), but when the predetermined period elapses, the display data gradually becomes all “0”. Will be approached. Therefore, the display segment of the special figure display portion 37a which is in the light emitting state by the display data provided to the first display circuit 261 has passed a predetermined period without new display data being provided to the first display circuit 261. This gradually turns off the light. With such a configuration, not only when the display contents of the special figure display unit 37a are changed but also when the display contents of the special figure display unit 37a are not changed, the previous display data output processing is performed. The same display data as the first display is supplied to the first display circuit 261.

  The number of display segments provided in the special figure display section 37a is eight. Therefore, 8-bit data is provided to the first display circuit 261 as display data for controlling the display of the special figure display unit 37a.

  The second display circuit 262 provides data corresponding to the supplied display data to each of the plurality of display segments of the special figure suspension display unit 37b. As a result, each display segment of the special figure reservation display section 37b is turned on or off in a manner corresponding to the display data provided to the second display circuit 262. In this case, the second display circuit 262 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), but when the predetermined period elapses, the display data gradually becomes all “0”. Will be approached. Therefore, the display segment of the special figure reservation display unit 37b which is in a light emitting state by the display data provided to the second display circuit 262 has a predetermined period without new display data being provided to the second display circuit 262. As time passes, the light is gradually turned off. With such a configuration, not only when the display contents of the special figure suspension display section 37b are changed but also when the display contents of the special figure suspension display section 37b are not changed, the previous display data of the previous display data is not changed. The same display data as in the output processing is supplied to the second display circuit 262.

  The number of display segments provided in the special figure suspension display section 37b is four. Therefore, 4-bit data is provided to the second display circuit 262 as display data for controlling the display of the special figure suspension display section 37b. However, since the display data is provided in units of 8 bits, even when the display data is provided to the second display circuit 262, the 8-bit data is provided. 37b is used as display data for display control.

  The third display circuit 263 provides data corresponding to the supplied display data to each of the plurality of display segments of the general-purpose display unit 38a. Accordingly, each display segment of the general-purpose display unit 38a is turned on or off in a manner corresponding to the display data provided to the third display circuit 263. In this case, the third display circuit 263 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), but when the predetermined period elapses, the display data gradually becomes all “0”. Will be approached. Therefore, the display segment of the general-purpose display section 38a, which is in the light emitting state by the display data provided to the third display circuit 263, passes the predetermined period without the new display data being provided to the third display circuit 263. This gradually turns off the light. With this configuration, the output processing of the previous display data is performed not only when the display content of the general-purpose display unit 38a is changed but also when the display content of the general-purpose display unit 38a is not changed. The same display data is supplied to the third display circuit 263.

  The number of display segments provided in the general-purpose display unit 38a is eight. Therefore, 8-bit data is provided to the third display circuit 263 as display data for controlling the display of the general-purpose display unit 38a.

  The fourth display circuit 264 provides data corresponding to the supplied display data to each of the plurality of display segments of the general-purpose reservation display unit 38b. As a result, each display segment of the general-purpose pending display unit 38b is turned on or off in a mode corresponding to the display data provided to the fourth display circuit 264. In this case, the fourth display circuit 264 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), but when the predetermined period elapses, the display data gradually becomes all “0”. Will be approached. Therefore, the display segment of the general-purpose display section 38 b which is in the light-emitting state by the display data provided to the fourth display circuit 264 has a predetermined period without new display data being provided to the fourth display circuit 264. The light is gradually turned off as time passes. Further, with such a configuration, not only when the display content of the general-purpose hold display unit 38b is changed but also when the display content of the general-purpose hold display unit 38b is not changed, the previous display data of the previous display data is not changed. The same display data as in the output processing is supplied to the fourth display circuit 264.

  The number of display segments provided in the general-purpose display section 38b is four. Therefore, 4-bit data is provided to the fourth display circuit 264 as display data for controlling the display of the general-purpose display section 38b. However, since display data is provided in units of 8 bits, even when display data is provided to the fourth display circuit 264, 8 bits of data are provided. 38b is used as display data for display control.

  The fifth display circuit 265 provides data corresponding to the supplied display data to each of the plurality of display segments provided in each of the first to fourth notification display devices 201 to 204. Thus, the display segments of the first to fourth notification display devices 201 to 204 are turned on or off in a manner corresponding to the display data provided to the fifth display circuit 265. In this case, the fifth display circuit 265 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), but when the predetermined period elapses, the display data gradually becomes all “0”. Will be approached. Therefore, new display data is provided to the fifth display circuit 265 for the display segments of the first to fourth notification display devices 201 to 204 which are in a light emitting state by the display data provided to the fifth display circuit 265. After a predetermined period elapses, the light is gradually turned off. Further, with such a configuration, not only the display contents of the first to fourth notification display devices 201 to 204 are changed, but also the display contents of the first to fourth notification display devices 201 to 204 are changed. Even if the display data is not output, the same display data as in the previous output processing of the display data is supplied to the fifth display circuit 265.

  Each of the first to fourth notification display devices 201 to 204 is provided with seven display segments. On the other hand, display data is provided in units of 8 bits. When the display data of the first to fourth notification display devices 201 to 204 is provided to the fifth display circuit 265, 7-bit display data corresponding to the first notification display device 201 is provided as data in units of 8 bits. Thereafter, 7-bit display data corresponding to the second notification display device 202 is provided as 8-bit data, and then 7-bit display data corresponding to the third notification display device 203 is converted to 8-bit data. Finally, 7-bit display data corresponding to the fourth notification display device 204 is provided as 8-bit data.

  In the configuration in which the first to fifth display circuits 261 to 265 are provided as described above, the main CPU 63 supplies display data to the display IC 266. That is, the display ICs 266 are not provided in a one-to-one correspondence with the first to fifth display circuits 261 to 265, but one display IC 266 is provided so as to be common to all of the first to fifth display circuits 261 to 265. The display IC 266 is provided. When supplying the display data to the display IC 266, the main CPU 63 also supplies the display IC 266 with type data indicating which of the first to fifth display circuits 261 to 265 the display data corresponds to.

  The electrical connection between the main CPU 63 and the display IC 266 is described in detail below. They are electrically connected using the line LN4. Each of these signal lines LN1 to LN4 is a signal line for transmitting a signal from the main CPU 63 to the display IC 266 by one-way communication.

  The type data is transmitted from the main CPU 63 to the display IC 266 by serial communication using the type data signal line LN1. In this case, each 1-bit division of the type data by serial communication is indicated by the type clock signal transmitted from the main CPU 63 to the display IC 266 using the type clock signal line LN2. The type data is data indicating which of the first to fifth display circuits 261 to 265 the display data to be transmitted corresponds to. The type data is transmitted as 5-bit data of the first to fifth bits. When the display data corresponds to the first display circuit 261, the first bit goes high and the other bits go low. When the display data corresponds to the second display circuit 262, the second bit goes high and the other bits go low. When the display data corresponds to the third display circuit 263, the third bit goes high and the other bits go low. When the display data corresponds to the fourth display circuit 264, the fourth bit goes high and the other bits go low. When the display data corresponds to the fifth display circuit 265, the fifth bit goes high and the other bits go low.

  Display data is transmitted from the main CPU 63 to the display IC 266 by serial communication using the display data signal line LN3. In this case, each 1-bit division of the display data by the serial communication is indicated by the display clock signal transmitted from the main CPU 63 to the display IC 266 using the display clock signal line LN4. The display data is transmitted in 8-bit units of the first to eighth bits.

  The main CPU 63 transmits display data corresponding to each of the first to fifth display circuits 261 to 265 to the display IC 266 in a second timer interrupt process (FIG. 123) described later. In this case, in one processing of the second timer interrupt processing, display data is transmitted to one of the first to fifth display circuits 261 to 265, and the nth display circuit → n + 1th display circuit is displayed. The display circuits 261 to 265 to which display data is to be transmitted are changed one by one every time a new process of the second timer interrupt process occurs according to the order in which the circuits are formed. Also, in the second timer interrupt process in the next process after the process of transmitting the display data corresponding to the fifth display circuit 265 which is the last sequence in the sequence, the first display circuit 261 which is the first sequence in the sequence described above. The display data corresponding to is transmitted. In the second timer interrupt process for transmitting display data to any of the first to fourth display circuits 261 to 264, only one 8-bit display data is transmitted, but the fifth display circuit 265 In the second timer interrupt process for transmitting the display data, four display data in 8-bit units are transmitted corresponding to the number of the first to fourth notification display devices 201 to 204.

  In the configuration in which the main CPU 63 transmits display data as described above, a work area 221 for specific control and a work area 223 for non-specific control have various storage areas referred to by the main CPU 63 for transmitting display data. Is set. FIG. 120A is an explanatory diagram for explaining various buffers 271 to 275 provided in the work area 221 for specific control, and FIG. 120B is provided in the work area 223 for non-specific control. FIG. 4 is an explanatory diagram for explaining various storage areas 234 and 276.

  As shown in FIG. 120A, a work area 221 for specific control includes a first display data buffer 271, a second display data buffer 272, a third display data buffer 273, a fourth display data buffer 274, A fifth display data buffer 275 is provided.

  The first display data buffer 271 stores display data to be supplied to the first display circuit 261. Since the first display circuit 261 is provided corresponding to the special figure display unit 37a as described above, the first display data buffer 271 stores display data for causing the special figure display unit 37a to perform a predetermined display. Will be stored. In this case, the display data is stored in the first display data buffer 271 in the display control process (step S8216) based on the contents of the special figure special power control process (step S8214) in the first timer interrupt process (FIG. 117). . When the second timer interrupt process (FIG. 123) for transmitting the display data to the first display circuit 261 is executed, only when the display data stored in the first display data buffer 271 is changed. Instead, even if the display data is not changed, the display data stored in the first display data buffer 271 is transmitted to the display IC 266.

  The second display data buffer 272 stores display data to be supplied to the second display circuit 262. Since the second display circuit 262 is provided so as to correspond to the special figure suspension display section 37b as described above, the second display data buffer 272 has a display for causing the special figure suspension display section 37b to perform a predetermined display. The data will be stored. In this case, the display data is stored in the second display data buffer 272 in the display control process (step S8216) based on the contents of the special figure special power control process (step S8214) in the first timer interrupt process (FIG. 117). . In the case where the second timer interrupt process (FIG. 123) for transmitting the display data to the second display circuit 262 is performed, only when the display data stored in the second display data buffer 272 is changed. Instead, even when the display data is not changed, the display data stored in the second display data buffer 272 is transmitted to the display IC 266.

  The third display data buffer 273 stores display data to be supplied to the third display circuit 263. Since the third display circuit 263 is provided corresponding to the general-purpose display unit 38a as described above, the third display data buffer 273 stores display data for causing the general-purpose display unit 38a to perform a predetermined display. Will be stored. In this case, the display data is stored in the third display data buffer 273 in the display control process (step S8216) based on the contents of the general-purpose power control process (step S8215) in the first timer interrupt process (FIG. 117). Will be In the case where the second timer interrupt process (FIG. 123) for transmitting the display data to the third display circuit 263 is performed, only when the display data stored in the third display data buffer 273 is changed. Instead, even when the display data is not changed, the display data stored in the third display data buffer 273 is transmitted to the display IC 266.

  The fourth display data buffer 274 stores display data to be supplied to the fourth display circuit 264. Since the fourth display circuit 264 is provided so as to correspond to the general-purpose reserve display unit 38b as described above, the fourth display data buffer 274 displays a signal for causing the general-purpose reserve display unit 38b to perform a predetermined display. The data will be stored. In this case, the display data is stored in the fourth display data buffer 274 in the display control process (step S8216) based on the contents of the general-purpose general-purpose control process (step S8215) in the first timer interrupt process (FIG. 117). Will be When the second timer interrupt processing (FIG. 123) for transmitting the display data to the fourth display circuit 264 is performed, only when the display data stored in the fourth display data buffer 274 is changed. Instead, even when the display data is not changed, the display data stored in the fourth display data buffer 274 is transmitted to the display IC 266.

  The fifth display data buffer 275 stores display data to be supplied to the fifth display circuit 265. Since the fifth display circuit 265 is provided corresponding to the first to fourth notification display devices 201 to 204 as described above, the fifth display data buffer 275 has the first to fourth notification display devices 201. To 204 to store display data for performing a predetermined display. When the second timer interrupt processing for transmitting the display data to the fifth display circuit 265 is performed, not only is the display data stored in the fifth display data buffer 275 changed, but also the display data is not changed. Is not changed, the display data stored in the fifth display data buffer 275 is transmitted to the display IC 266.

  Here, in the first to fourth notification display devices 201 to 204, display corresponding to the management result of the game history is performed, and a setting confirmation process (FIG. 115) or a setting value update process (FIG. 116) is executed. In this case, a display corresponding to the current setting value is performed. In this case, since the fifth display data buffer 275 is provided in the work area 221 for specific control, the process of storing display data in the fifth display data buffer 275 is performed as a process corresponding to the specific control. On the other hand, the process for deriving the management result of the game history is performed as a process corresponding to the non-specific control, and the 61st to 68th parameters which are the management results of the game history are displayed on the first to fourth notification display devices. In steps 201 to 204, the objects are sequentially displayed.

  Therefore, as shown in FIG. 120B, the work area 223 for non-specific control includes not only the calculation result storage area 234 for storing the 61st to 68th parameters but also the 61st to 68th parameters. Among them, a display target setting area 276 for storing parameters to be displayed on the first to fourth notification display devices 201 to 204 is provided. Even in the present embodiment, as in the fifteenth embodiment, the period in which the calculation result of one parameter is continuously displayed is 10 seconds. Every time seconds elapse, the calculation result of the parameter to be displayed is read from the calculation result storage area 234 according to a predetermined display order, and the calculation result of the read parameter is stored in the display target setting area 276. You. Then, when the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, the second timer interrupt process (FIG. 123) which is a process corresponding to the specific control is performed. Then, the display data stored in the display target setting area 276 is read, and the read display data is stored in the fifth display data buffer 275.

  On the other hand, when the setting confirmation processing (FIG. 115) is being executed, the first to fourth notification displays are performed in the second timer interrupt processing (FIG. 123) which is processing corresponding to the specific control. A display indicating that the current setting value of the pachinko machine 10 is being confirmed in the devices 201 to 204 and a display indicating the current setting value of the pachinko machine 10 are displayed in the fifth device. The data is stored in the display data buffer 275. If the setting value updating process (FIG. 116) is being executed, the first to fourth notification displays are performed in the second timer interrupt process (FIG. 123) which is a process corresponding to the specific control. The display data for enabling the display indicating that the setting values of the pachinko machine 10 are being updated in the devices 201 to 204 and the display indicating the current setting values of the pachinko machine 10 to be performed are fifth display data. The data is stored in the buffer 275.

  In the configuration in which the first to fifth display data buffers 271 to 275 are provided as described above, the main CPU 63 performs, in each processing cycle of the second timer interrupt processing (FIG. 123), the display data corresponding to the processing cycle. The display data is read from the buffers 271 to 275, the read display data is transmitted to the display IC 266, and the type data indicating which of the first to fifth display circuits 261 to 265 the display data corresponds to is displayed. The information is transmitted to the display IC 266. FIG. 121 is an explanatory diagram for describing an electrical configuration of the display IC 266.

  As shown in FIG. 121, the display IC 266 includes a type data buffer 281, a selection signal output unit 282, a display data buffer 283, and a display data output unit 284. The display data buffer 283 stores display data received from the main CPU 63. The display data output unit 284 transmits the display data stored in the display data buffer 283 to the first to fifth display circuits 261 to 265. The type data buffer 281 stores the type data received from the main CPU 63. The selection signal output unit 282 is a selection signal for designating a display circuit 261 to 265 corresponding to the type data stored in the type data buffer 281 among the first to fifth display circuits 261 to 265 as a display data receiving destination. Is output.

  In detail, as shown in FIG. 119, the display IC 266 and the first display circuit 261 are electrically connected using a display signal group 291. The display signal group 291 is provided so that 8-bit display data can be transmitted at one time, and display data in 8-bit units is transmitted from the display IC 266 by parallel communication. Further, a branch signal group 292 is provided by branching from the display signal group 291, and the branch signal group 292 includes the second display circuit 262, the third display circuit 263, the fourth display circuit 264, and the fifth display circuit 265. Are electrically connected to each other. The branch signal group 292 is provided so that 8-bit display data can be transmitted at a time, similarly to the display signal group 291. The display data in 8-bit units is transmitted from the display IC 266 by parallel communication. You.

  Since the display signal group 291 and the branch signal group 292 are provided as described above, when display data stored in the display data buffer 283 is transmitted by the display data output unit 284, the display data is the first data. To the fifth display circuits 261 to 265. In this case, first to fifth selection signal lines 301 to 305 are provided for receiving the supplied display data and specifying the display circuits 261 to 265 to be used.

  The first selection signal line 301 is provided to electrically connect the display IC 266 and the first display circuit 261. When the type data corresponding to the first display circuit 261 is stored in the type data buffer 281, in order for the first display circuit 261 to receive and use the display data supplied from the display data output unit 284. The selection signal output unit 282 of the display IC 266 transmits the first selection signal to the first display circuit 261 through the first selection signal line 301. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only by the first display circuit 261.

  The second selection signal line 302 is provided to electrically connect the display IC 266 and the second display circuit 262. When the type data corresponding to the second display circuit 262 is stored in the type data buffer 281, the display data supplied from the display data output unit 284 is received by the second display circuit 262 for use. The selection signal output unit 282 of the display IC 266 transmits a second selection signal to the second display circuit 262 through the second selection signal line 302. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 are received and used only by the second display circuit 262.

  The third selection signal line 303 is provided to electrically connect the display IC 266 and the third display circuit 263. When the type data corresponding to the third display circuit 263 is stored in the type data buffer 281, the display data supplied from the display data output unit 284 is received by the third display circuit 263 for use. The selection signal output unit 282 of the display IC 266 transmits the third selection signal to the third display circuit 263 through the third selection signal line 303. Thus, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only by the third display circuit 263.

  The fourth selection signal line 304 is provided so as to electrically connect the display IC 266 and the fourth display circuit 264. When the type data corresponding to the fourth display circuit 264 is stored in the type data buffer 281, the display data supplied from the display data output unit 284 is received by the fourth display circuit 264 for use. The selection signal output unit 282 of the display IC 266 transmits a fourth selection signal to the fourth display circuit 264 through the fourth selection signal line 304. Thereby, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only by the fourth display circuit 264.

  The fifth selection signal line 305 is provided so as to electrically connect the display IC 266 and the fifth display circuit 265. When the type data corresponding to the fifth display circuit 265 is stored in the type data buffer 281, the display data supplied from the display data output unit 284 is received and used by the fifth display circuit 265. The selection signal output unit 282 of the display IC 266 transmits a fifth selection signal to the fifth display circuit 265 via the fifth selection signal line 305. Thus, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only by the fifth display circuit 265.

  FIG. 122 shows that the type data and the display data are transmitted from the main CPU 63 to the display IC 266, and the display data transmitted from the display IC 266 is received by the first display circuit 261 or the second display circuit 262. It is a time chart. FIG. 122 (a) shows a transmission period of the type data signal from the main CPU 63 to the display IC 266, and FIG. 122 (b) shows a transmission period of the type clock signal from the main CPU 63 to the display IC 266. ) Shows the transmission period of the display data signal from the main CPU 63 to the display IC 266, FIG. 122 (d) shows the transmission period of the display clock signal from the main CPU 63 to the display IC 266, and FIG. 122 (e) shows the display IC 266. 122 (f) shows the transmission period of the first selection signal from the display IC 266 to the second display circuit 262, and FIG. 122 (g) shows the transmission period of the second selection signal from the display IC 266 to the second display circuit 262. A transmission period of display data from the display IC 266 to the first to fifth display circuits 261 to 265 is shown. The same applies to the case where display data is received in the third to fifth display circuits 263 to 265.

  Type data from the main CPU 63 to the display IC 266 at the timing t1 after the supply of the operating power to the pachinko machine 10 including the main CPU 63, the display IC 266, and the first to fifth display circuits 261 to 265 is started. And transmission of display data is started. More specifically, as shown in FIG. 122 (b), a pulsed type clock signal is transmitted at each of the timing of t1, the timing of t2, the timing of t3, the timing of t4, and the timing of t5. As shown in (a), the pulse type data signal is transmitted in correspondence with the transmission of the pulse type clock signal at the timing of t1. Thus, information corresponding to the first display circuit 261 is stored in the type data buffer 281 of the display IC 266.

  Further, as shown in FIG. 122 (d), a pulse-like display clock is used at each of the timing of t1, the timing of t2, the timing of t3, the timing of t4, the timing of t5, the timing of t6, the timing of t7 and the timing of t8. The signal is transmitted, and as shown in FIG. 122 (c), the pulsed display data signal is transmitted in correspondence with the transmission of the pulsed display clock signal at the timings t2, t3, t5 and t7. Is sent. As a result, the display data corresponding to the information format is stored in the display data buffer 283 of the display IC 266.

  When the transmission of the eighth-bit display clock signal is completed at the timing t9 as shown in FIG. 122 (d), the type data buffer 281 is stored at the timing t9 as shown in FIG. 122 (e). The transmission of the first selection signal is started by the selection signal output unit 282 of the display IC 266 to the first display circuit 261 corresponding to the stored type data, and at the timing of t9, as shown in FIG. 122 (g). The transmission of the display data stored in the display data buffer 283 by the display data output unit 284 of the display IC 266 is started. Thus, the first display circuit 261 receives and uses the display data.

  Thereafter, at the timing of t10, transmission of the type data and the display data from the main CPU 63 to the display IC 266 is newly started as shown in FIGS. 122 (a) to 122 (d). In this case, the transmission of the first selection signal from the display IC 266 to the first display circuit 261 is stopped at the timing t10 as shown in FIGS. The transmission of the display data to the first to fifth display circuits 261 to 265 is stopped.

  The details of the new transmission of the type data and the display data are as follows. As shown in FIG. The signal is transmitted, and a pulse type data signal is transmitted in correspondence with the transmission of the pulse type clock signal at the timing of t11 as shown in FIG. As a result, information corresponding to the second display circuit 262 is stored in the type data buffer 281 of the display IC 266.

  Further, as shown in FIG. 122 (d), a pulse-like display clock is used at each of the timing of t10, the timing of t11, the timing of t12, the timing of t13, the timing of t14, the timing of t15, the timing of t16, and the timing of t17. As shown in FIG. 122 (c), the transmission of the signal corresponds to the transmission of the pulsed display clock signal at the timing of t10, the timing of t11, the timing of t12, the timing of t15, the timing of t16, and the timing of t17, as shown in FIG. Then, a pulse-like display data signal is transmitted. As a result, the display data corresponding to the information format is stored in the display data buffer 283 of the display IC 266.

  When the transmission of the eighth bit display clock signal is completed at the timing t18 as shown in FIG. 122 (d), the display clock signal is stored in the type data buffer 281 at the timing t18 as shown in FIG. 122 (f). The transmission of the second selection signal is started by the selection signal output unit 282 of the display IC 266 to the second display circuit 262 corresponding to the type data thus obtained, and as shown in FIG. The transmission of the display data stored in the display data buffer 283 is started by the display data output unit 284 of the display IC 266. As a result, the display data is received and used by the second display circuit 262.

  It should be noted that only one piece of display data is transmitted in the second timer interrupt processing (FIG. 123) for transmitting the display data for the first to fourth display circuits 261 to 264, but for the fifth display circuit 265 In the second timer interrupt process (FIG. 123) to which the display data is to be transmitted, four pieces of display data are transmitted corresponding to the numbers of the first to fourth notification display devices 201 to 204. The second timer interrupt process (FIG. 123) is started in the second interrupt cycle (specifically, 2 milliseconds) as described above, but even if it is a process for transmitting four pieces of display data. Each processing time is set so that one processing cycle is completed in less than the second interrupt cycle.

  With the above configuration, it is possible to transmit display data to a plurality of display circuits 261 to 265 using one display IC 266. Here, as described above, each of the first to fifth display circuits 261 to 265 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), but the predetermined period has elapsed. Then, the display data gradually approaches the state of all “0”. In this case, if the reception of the display data in each of the display circuits 261 to 265 exceeds a predetermined period, the special figure display part 37a, the special figure reservation display part 37b, the general figure display part 38a, the general figure reservation display part 38b, and the Even in the situation where the display contents are not changed in the first to fourth notification display devices 201 to 204, the display segments in the light-emitting state temporarily approach the light-off state, and as a result, the light in the display segments Flashing may occur. On the other hand, in the present embodiment, apart from the first timer interrupt processing (FIG. 117) started at the first interrupt cycle (specifically, 4 milliseconds), the second interrupt shorter than the first interrupt cycle is performed. A second timer interrupt process (FIG. 123) activated at a cycle (specifically, 2 milliseconds) is set, and transmission of display data to the display IC 266 is collectively performed in the second timer interrupt process. .

  Hereinafter, the second timer interrupt process will be described with reference to the flowchart in FIG. Note that the processes of steps S8401 to S8413 in the second timer interrupt process are executed using a program for specific control and data for specific control in the main CPU 63.

  First, interrupt prohibition is set to prohibit the occurrence of the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123) (step S8401). By prohibiting the occurrence of the first timer interrupt process (FIG. 117), the first timer interrupt process (FIG. 117) interrupts the second timer interrupt process (FIG. 123) even if the first interrupt cycle has elapsed. Can be prevented from being started. In addition, since the occurrence of the second timer interrupt process (FIG. 123) is prohibited, even if the second interrupt cycle elapses during the execution of the second timer interrupt process (FIG. 123), the second timer interrupt process is performed. It is possible to prevent the processing (FIG. 123) from being started repeatedly.

  Thereafter, it is determined whether “1” is set in the setting update display flag in the work area 221 for specific control (step S8402). The setting update display flag is a flag for the main CPU 63 to specify whether or not the setting value updating process (FIG. 116) is being executed by the main CPU 63. As described above, the setting value updating process (FIG. 116) is performed in a state where the process at the time of starting the supply of the operating power is executed in the main process (FIG. 114) when the supply of the operating power to the main CPU 63 is started. The second timer interrupt process (FIG. 123) is interrupted and started even when the process at the start of the supply of the operating power is executed. Even in a situation where the value update process (FIG. 116) is being executed, the second timer interrupt process (FIG. 123) is started by interruption.

  The condition that the setting update display flag is set to “1” means that the main CPU 63 has executed the set value update process (FIG. 116) in the second processing of the second timer interrupt process (FIG. 123). It means that it is the process that was started by interrupting in the situation. If an affirmative determination is made in step S8402, a process of setting the fifth display data buffer 275 during the setting update is executed (step S8403). In the setting process, a display indicating that the setting value of the pachinko machine 10 is being updated on the first to fourth notification display devices 201 to 204 and a display indicating the current setting value of the pachinko machine 10 are displayed. The display data to be performed is stored in the fifth display data buffer 275.

  When the display data stored in the fifth display data buffer 275 is transmitted to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 will be described with reference to FIG. The display shown in the figure is performed. Specifically, when a display indicating that the setting value is being updated is performed on the first to fourth notification display devices 201 to 204, the first to fourth notification display devices 201 to 204 are displayed. In each case, at least one display segment emits light. That is, each of the first to fourth notification display devices 201 to 204 is in the display state. Accordingly, even when the display indicating that the setting value is being updated is being displayed, it is determined that the first to fourth notification display devices 201 to 204 are not out of order. The administrator can understand. Note that, even when the management result of the game history is displayed, at least one display segment is in a light emitting state in each of the first to fourth notification display devices 201 to 204, and the first to fourth notification display devices are displayed. Each of the display devices 201 to 204 is in a display state.

  For details on the display contents of the first to fourth notification display devices 201 to 204, in the first notification display device 201, one central display segment emits light and the remaining display segments turn off. Becomes Even when the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, one central display segment in the first notification display device 201 may emit light, The display content of the first notification display device 201 when the management result of the game history is displayed includes display content in which one central display segment emits light and the remaining display segments turn off. Not. Thereby, the display content of the first notification display device 201 in the situation where the set value is updated is displayed while using the display segment that can be lit even when the management result of the game history is displayed. Display contents that are not displayed in the result of the management.

  In the second notification display device 202, similarly to the first notification display device 201, one central display segment is in a light emitting state, and the remaining display segments are in a non-lighting state. Even when the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, one central display segment in the second notification display device 202 can emit light, The display content of the second notification display device 202 when the management result of the game history is displayed includes display content in which one central display segment emits light and the remaining display segments turn off. Not. Accordingly, the display content of the second notification display device 202 in a situation where the set value is updated is displayed while using the display segment that can be lit even when the management result of the game history is displayed. Display contents that are not displayed in the result of the management.

  In the third notification display device 203, some display segments are turned on and the remaining display segments are turned off so that the character "H" is displayed. In this case, the display segment that becomes light-emitting may be light-emitting even when the management result of the game history is displayed on the first to fourth notification display devices 201 to 204. When displayed, the display content of the third notification display device 203 does not include the display content in which the letter “H” is displayed. Thereby, the display content of the third notification display device 203 in a situation where the set value is updated is displayed while using the display segment that can be lit even when the management result of the game history is displayed. Display contents that are not displayed in the result of the management. In addition, the display contents of the third notification display device 203 in the situation where the set value is being confirmed do not include the display contents in which the letter “H” is displayed. Accordingly, by displaying “H” on the third notification display device 203, it is possible to notify the administrator of the gaming hall that the setting value is being updated.

  In the fourth notification display device 204, some display segments are turned on and the remaining display segments are turned off so that a display corresponding to the current set value is performed. In the case of FIG. 124A, the current setting value is “Setting 2”, so “4” corresponding to “Setting 2” is displayed on the fourth notification display device 204. By checking the fourth notification display device 204, the administrator of the game hall can grasp the current set value. The display content of the fourth notification display device 204 in the situation where the set value is being updated can be displayed in both the situation where the management result of the game history is displayed and the situation where the set value is confirmed.

  Returning to the description of the second timer interrupt process (FIG. 123), if a negative determination is made in step S8402, it is determined whether or not “1” is set to the setting confirmation display flag in the work area 221 for specific control. (Step S8404). The setting confirmation display flag is a flag for specifying by the main CPU 63 whether or not the setting confirmation processing (FIG. 115) is being executed by the main CPU 63. As described above, the setting confirmation process (FIG. 115) is performed in a state where the process at the time of starting the supply of the operating power is performed in the main process (FIG. 114) when the supply of the operating power to the main CPU 63 is started. The second timer interrupt process (FIG. 123) is interrupted and started even when the process at the time of starting the supply of the operation power is being executed. Even in the situation where the confirmation process (FIG. 115) is being executed, the second timer interrupt process (FIG. 123) is started by interruption.

  The condition that the setting confirmation display flag is set to “1” means that the main CPU 63 has executed the setting confirmation process (FIG. 115) in the second processing of the second timer interrupt process (FIG. 123). It means that it is the process that was started by interrupting in the situation. If an affirmative determination is made in step S8404, processing for setting the fifth display data buffer 275 during setting confirmation is executed (step S8405). In the setting process, a display indicating that the setting values of the pachinko machine 10 are being checked on the first to fourth notification display devices 201 to 204 and a display indicating the current setting values of the pachinko machine 10 are displayed. The display data to be performed is stored in the fifth display data buffer 275.

  When the display data stored in the fifth display data buffer 275 is transmitted to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 will be described with reference to FIG. The display shown in the figure is performed. Specifically, when a display indicating that the setting value is being updated is performed on the first to fourth notification display devices 201 to 204, the first to fourth notification display devices 201 to 204 are displayed. In each case, at least one display segment emits light. That is, each of the first to fourth notification display devices 201 to 204 is in the display state. Thereby, even when the display indicating that the setting value is being checked is displayed, it is determined that the first to fourth notification display devices 201 to 204 are not out of order. The administrator can understand.

  For details on the display contents of the first to fourth notification display devices 201 to 204, in the first notification display device 201, one central display segment emits light and the remaining display segments turn off. Becomes Even when the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, one central display segment in the first notification display device 201 may emit light, The display content of the first notification display device 201 when the management result of the game history is displayed includes display content in which one central display segment emits light and the remaining display segments turn off. Not. Thereby, the display content of the first notification display device 201 in the situation where the set value is confirmed is used while using the display segment that can be lit even when the management result of the game history is displayed. Display contents that are not displayed in the result of the management.

  In the second notification display device 202, similarly to the first notification display device 201, one central display segment is in a light emitting state, and the remaining display segments are in a non-lighting state. Even when the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, one central display segment in the second notification display device 202 can emit light, The display content of the second notification display device 202 when the management result of the game history is displayed includes display content in which one central display segment emits light and the remaining display segments turn off. Not. Thereby, the display content of the second notification display device 202 in a situation where the set value is confirmed is displayed while using the display segment that can be lit even when the management result of the game history is displayed. Display contents that are not displayed in the result of the management.

  Here, the display contents on the first notification display device 201 and the second notification display device 202 are the same regardless of whether the setting value is being updated or the setting value is being checked. Thereby, the first notification display device 201 and the second notification display device 202 indicate that the display targets on the first to fourth notification display devices 201 to 204 are not related to the management result of the game history but to the set values. It is possible to clearly notify the manager of the game hall by the display of.

  In the third notification display device 203, some display segments are turned on so that the character "k" is displayed, and the other display segments are turned off. In this case, the display segment that becomes light-emitting may be light-emitting even when the management result of the game history is displayed on the first to fourth notification display devices 201 to 204. When displayed, the display content of the third notification display device 203 does not include the display content in which the character “k” is displayed. Accordingly, the display content of the third notification display device 203 in a situation where the set value is confirmed is displayed while using the display segment that can be lit even when the management result of the game history is displayed. Display contents that are not displayed in the result of the management. Also, “H” is displayed on the third notification display device 203 when the set value is being updated, whereas “k” is displayed on the third notification display device 203 when the set value is being checked. Is displayed. Thus, by confirming the display content of the third notification display device 203, the administrator of the gaming hall is notified of whether the setting value is being updated or the setting value is being confirmed. It becomes possible.

  In the fourth notification display device 204, some display segments are turned on and the remaining display segments are turned off so that a display corresponding to the current set value is performed. In the case of FIG. 124 (b), the current setting value is “Setting 2”, so “4” corresponding to “Setting 2” is displayed on the fourth notification display device 204. By checking the fourth notification display device 204, the administrator of the game hall can grasp the current set value. Note that the display content of the fourth notification display device 204 in the situation where the set value is being confirmed may be displayed in both the situation where the management result of the game history is displayed and the situation where the set value is updated.

  Returning to the description of the second timer interrupt process (FIG. 123), if a negative determination is made in step S8404, the process of setting the fifth display data buffer 275 in the normal state is executed (step S8406). In this case, information is read from the display target setting area 276 in the work area 223 for non-specific control, and the first to fourth notification display devices 201 to 204 display parameters corresponding to the read information. The display data is stored in the fifth display data buffer 275. By transmitting the display data to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 calculate the current display target parameter among the 61st to 68th parameters. The result is displayed.

  When the processing of step S8403, step S8405, or step S8406 is executed, the transmission state of the signal through the type data signal line LN1 and the type clock signal line LN2 is turned off (step S8407), and the display data signal line LN3 and the display are displayed. The transmission state of the signal through the clock signal line LN4 is turned off (step S8408). Thereafter, the type counter provided in the specific control work area 221 is updated (step S8409).

  The type counter is a counter for the main CPU 63 to specify the transmission target of the display data in the first to fifth display data buffers 271 to 275 in the current processing of the second timer interrupt processing. When the value of the type counter is “1”, the display data of the first display data buffer 271 is to be transmitted, and when the value of the type counter is “2”, the display data of the second display data buffer 272 is to be transmitted. When the value of the type counter is “3”, the display data of the third display data buffer 273 is to be transmitted, and when the value of the type counter is “4”, the display data of the fourth display data buffer 274 is If the type data is to be transmitted and the value of the type counter is “5”, the display data in the fifth display data buffer 275 is to be transmitted. In the type counter updating process, the value of the type counter is incremented by one, and if the value of the type counter after the one addition exceeds the upper limit value of “5”, the value of the type counter is set to “1”. . Thereby, the transmission target of the display data is sequentially changed in the first to fifth display data buffers 271 to 275 every time the second timer interrupt process is performed.

  Then, the type data corresponding to the value of the type counter is read from the main ROM 64 (step S8410). Specifically, when the value of the type counter is “1”, the type data corresponding to the first display circuit 261 is read from the main ROM 64, and when the value of the type counter is “2”, the second type is read. The type data corresponding to the display circuit 262 is read from the main ROM 64, and when the value of the type counter is "3", the type data corresponding to the third display circuit 263 is read from the main ROM 64, and the value of the type counter is read. When the value is "4", the type data corresponding to the fourth display circuit 264 is read from the main ROM 64, and when the value of the type counter is "5", the type data corresponding to the fifth display circuit 265 is read. Read from the side ROM 64.

  Thereafter, display data is read from the display data buffers 271 to 275 corresponding to the value of the type counter (step S8411). Specifically, when the value of the type counter is “1”, the display data is read from the first display data buffer 271, and when the value of the type counter is “2”, the display data is read from the second display data buffer 272. The display data is read, and if the value of the type counter is "3", the display data is read from the third display data buffer 273. If the value of the type counter is "4", the display data is read from the fourth display data buffer 274. The display data is read, and when the value of the type counter is “5”, the display data is read from the fifth display data buffer 275.

  After that, transmission processing of various signals is executed (step S8412). In the transmission processing, a signal is output to the type data signal line LN1 and the type clock signal line LN2 such that the type data read in step S8410 is transmitted to the display IC 266. In the transmission process, a signal is output to the display data signal line LN3 and the display clock signal line LN4 so that the display data read in step S8411 is transmitted to the display IC 266.

  Thereafter, interrupt permission is set to permit generation of the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123) (step S8413).

  According to the embodiment described in detail above, the following excellent effects can be obtained.

  When the power of the pachinko machine 10 is turned on in a state where the setting key insertion section 68a is turned on by the setting key without pressing the reset button 68c, the supply of the operating power to the main CPU 63 is started. When the main process (FIG. 114) is started, the reset button 68c is not pressed and the setting key insertion portion 68a is turned on, and a process for enabling the progress of the game is executed in the main process. The setting confirmation processing is executed in a state where the processing at the time of starting the supply of the operating power, which is the state before the start, is being executed. As a result, it is possible to make it difficult to illegally check the set value.

  Assuming that the set value is confirmed in a situation where the progress of the game is continued, for example, if the set value is confirmed during the execution of the game round, the set value is confirmed while being performed. Therefore, there is a possibility that a shift to the open / close execution mode occurs. In this case, there is a possibility that game balls cannot be fired toward the special power winning device 32 even though the open / close execution mode has been started. Further, if the set value is confirmed during the execution of the opening / closing execution mode, the opening / closing execution mode proceeds under the condition that the set value is confirmed. There is a possibility that the game ball cannot be fired toward.

  Assuming a case where the progress of the game is stopped when the set value is confirmed, if the confirmation of the set value is started in a situation where the game is being performed, the progress of the game is stopped halfway May be complicated. For example, if the confirmation of the set value is started during the execution of the game round and the progress of the game is to be stopped halfway, a process for stopping the game round is required. In this case, when the confirmation of the set value is started, the variation display of the symbol on the symbol display device 41 is stopped halfway, and when the confirmation of the set value is completed, the variation display of the symbol on the symbol display device 41 is restarted. If so, complicated processing will be required. In addition, for example, if the confirmation of the set value is started during the execution of the opening / closing execution mode and the progress of the game is stopped in the middle, a process for stopping the opening / closing execution mode in the middle is required. In addition, when the confirmation of the set value is started in the middle of the execution of the variation display of the pattern on the ordinary figure display unit 38a and the progress of the game is to be stopped in the middle, the process for stopping the variation display of the pattern in the middle is performed. Required. In addition, if the setting value check is started during the execution of the opening execution state of the general electricity role object 34a and the progress of the game is to be stopped on the way, a process for stopping the opening execution state on the way is required. Become. On the other hand, a configuration in which the set value is confirmed after all the games have been completed may be considered. In this case, the game times, the opening / closing execution mode, the variation display of the pattern on the general-purpose display section 38a, and It is necessary to wait for a situation in which none of the release execution states of the object 34a is executed, and there is a possibility that the waiting time until starting to check the set value may be increased.

  On the other hand, in the main processing executed when the supply of the operating power to the main CPU 63 is started, the state before the supply of the operating power, which is the situation before the processing enabling the progress of the game is executed, is performed. Since the setting confirmation process is executed in a situation where the process is being executed, the setting value is confirmed in a situation where the progress of the game has already been stopped. This makes it possible to prevent the setting value from being checked in a situation where the game is in progress, and to stop the game progressing in the middle of the setting value check, or to stop the game progress. There is no need to wait for confirmation of the set value until Therefore, it is possible to appropriately confirm the set value.

  When the power of the pachinko machine 10 is turned on while pressing the reset button 68c, the supply of the operating power to the main CPU 63 is started, and the reset button 68c is started in a state where the main processing (FIG. 114) is started. Is pressed, and the RAM clear processing (step S7915) is executed regardless of whether or not the setting key insertion unit 68a has been turned ON. As a result, the operation of turning on the power of the pachinko machine 10 while pressing the reset button 68c is uniquely linked to the execution of the RAM clear processing (step S7915), and the RAM clear processing (step S7915). Can be made easy for the manager of the gaming hall to understand.

  Even if the RAM clear processing (step S7915) is executed, the set value counter in the work area 221 for specific control is not cleared to "0" and the information of the set value counter is not changed. This makes it possible to prevent the set values from being changed even when the RAM clear processing (step S7915) is executed.

  Not only is the operation of turning on the power of the pachinko machine 10 performed while pressing the reset button 68c, but also the operation of turning on the power of the pachinko machine 10 while performing the ON operation of the setting key insertion portion 68a with the setting key is performed. Not only the clear processing (step S7915) but also the set value update processing (step S7918) is executed. Also, as described above, the setting confirmation process is performed based on the power-on operation of the pachinko machine 10 while the setting key insertion portion 68a is turned on by the setting key without pressing the reset button 68c (step S7914). Is executed. As a result, it is possible to make the ON operation for the setting key insertion unit 68a common as the operation for executing the processing related to the setting value. Therefore, it is possible to make the operation content for generating the processing related to the set value easy to understand for the manager of the game hall.

  When the power of the pachinko machine 10 is turned on while the setting key insertion section 68a is turned on by the setting key, and the pressing operation of the reset button 68c is not added, a setting confirmation process is executed, and the reset button is executed. When the pressing operation of 68c is added, a set value updating process is executed. Accordingly, it is possible to make the execution target process different from the setting confirmation process and the setting value update process depending on whether or not the reset button 68c is pressed. Therefore, it is possible to make the contents of the operation for executing the desired processing of the setting confirmation processing and the setting value update processing easy for the manager of the gaming hall to understand. In addition, by making the operation content for executing the setting value update processing more than the setting confirmation processing, it is possible to make it particularly difficult to perform an illegal operation of the setting value update processing.

  The monitoring process of whether or not the set value is abnormal is executed in a first timer interrupt process (FIG. 117) that is periodically started. This makes it possible to monitor whether the set value is abnormal even in a situation where a game is being played. Therefore, it is possible to prevent the game from continuing even though the set value is abnormal.

  Monitoring whether the setting value is abnormal is executed every time a monitoring trigger occurs. More specifically, it is executed each time the first timer interrupt process (FIG. 117) is started. This makes it possible to increase the frequency of monitoring whether the set value is abnormal.

  In the main process (FIG. 114), a process for monitoring whether the set value is normal is not set. If a process for monitoring whether or not the set value is normal is set in the process at the start of the supply of the operation power in the main process (FIG. 114), the power failure flag and the checksum are set at the start of the supply of the operation power. It is necessary to monitor whether the set value is normal in addition to the monitoring of the setting, and the monitoring load increases. Further, if it is specified that the set value is abnormal at the start of supply of the operating power, the RAM clear processing (step S7915) and the set value update processing (step S7918) are to be executed. Is complicated. On the other hand, since the process for monitoring whether the set value is normal is not set in the main process (FIG. 114), the processing configuration of the process at the start of the supply of the operating power is preferable. It becomes possible. Even if the process for monitoring whether the set value is normal in the process at the start of the supply of the operating power is not set, the setting monitoring is performed in the first timer interrupt process (FIG. 117). Since the configuration is such that the process (step S8202) is executed, it is possible to cope with a case where the set value is abnormal.

  It should be noted that the update button 68b is provided as in the first embodiment, and in the set value update process (FIG. 116), the set value is updated by one step every time the reset button 68c is pressed. Alternatively, the setting value may be updated by one step each time the update button 68b is pressed. Further, positions corresponding to each of “Setting 1” to “Setting 6” are set as the rotation operation positions when the setting key is inserted into the setting key insertion section 68a and the rotation operation is performed. The configuration may be such that a set value corresponding to the rotational operation position of the part 68a is set. Further, the setting key insertion portion 68a is configured to be capable of being further rotated than the ON position, and each time a rotating operation beyond the ON position is performed, the set value being updated is changed to the next set value. The configuration may be updated.

  In the setting value updating process (FIG. 116), the setting value being selected is determined by turning off the setting key insertion section 68a, and the setting value updating process is terminated by further pressing the reset button 68c. May be adopted. In the configuration in which the update button 68b is provided, in the setting value update process (FIG. 116), the setting value being selected is determined by turning off the setting key insertion unit 68a, and the update button 68b is further pressed. The configuration may be such that the set value update process is terminated by an operation.

  In addition, as a condition for executing the set value updating process (FIG. 116), a condition that the gaming machine body 12 is in the open state may not be set, and the front door frame 14 is in the open state. The condition may not be set, and both the condition that the gaming machine body 12 is in the open state and the condition that the front door frame 14 is in the open state may not be set.

  Further, as a condition for executing the setting confirmation process (FIG. 115), a condition that the gaming machine body 12 is in the open state may not be set, and the front door frame 14 is in the open state. The condition may not be set, and both the condition that the gaming machine body 12 is in the open state and the condition that the front door frame 14 is in the open state may not be set.

  Further, in the main processing (FIG. 114) executed when the supply of the operating power to the main CPU 63 is started, it is specified that the power failure flag is not set to “1” or that the checksum is abnormal. In such a case, the configuration may be such that the RAM clear processing (step S7915) is executed. In this case, after the RAM clear processing (step S7915) is executed, the setting value updating processing (step S7918) may be executed, and a notification indicating that the setting value updating processing (step S7918) should be executed. And the progress of the game may be stopped, or a process for controlling the progress of the game may be started.

  Also, in the main process (FIG. 114), the setting confirmation process (step S7914) is performed instead of the process of determining whether or not the power failure flag is set to “1” and the process of comparing the checksums. , May be executed before these processes. In this case, it is possible to give priority to the process for confirming the set value.

  Further, the configuration monitoring process (step S8220) is not limited to the configuration that is executed each time the first timer interrupt process (FIG. 117) is activated. The configuration may be such that the setting monitoring process (step S8220) is executed each time the predetermined number of times (eg, 10,000 times) is executed. In this case, it is possible to suppress the execution frequency of the monitoring while periodically monitoring whether the set value is normal.

  Also, the configuration may be such that the setting monitoring process (step S8222) is executed in the remaining process (steps S7921 to S79224) in the main process (FIG. 114). In this case, it is possible to monitor whether the set value is normal by using the idle time when the first timer interrupt processing (FIG. 117) and the second timer interrupt processing (FIG. 123) are not executed. It becomes possible.

  In addition, a configuration may be adopted in which a setting monitoring process (step S8222) is executed when a game round is newly started. More specifically, when a game round is newly started, a setting monitoring process (step S8220) may be performed before the execution determination process is performed. As a result, it is possible to prevent the execution determination processing from being performed in a situation where the set value is abnormal.

  Further, when it is determined that the setting value is abnormal in the setting monitoring process (Step S8220), the process may be shifted to the setting value updating process (Step S7918).

  If it is determined in the setting monitoring process (step S8222) that the setting value is abnormal, the main process (step S8220) is performed with the setting error flag provided in the work area 221 for specific control set to "1". FIG. 114) may be started. In order to stop the progress of the game with the setting abnormality flag set to “1” and to release the state in which the progress of the game is stopped, the power is turned off → A configuration that requires ON may be adopted. In this case, even if an operation for executing the set value updating process is not performed in the main process (FIG. 114), the setting is forcibly set if the setting abnormality flag is set to “1”. By executing the value updating process, it is possible to forcibly perform a new setting of the setting value using the setting value updating process set in the main process (FIG. 114).

  In addition, the hold information obtained when a game ball enters the first operation port 33 and the hold information obtained when a game ball enters the second operation port 34 are separately stored, The first special figure display section and the second special figure display section may be provided as the special figure display section 37a in correspondence with the reservation information. In this case, the variable display of the pattern on the first special figure display unit and the variable display of the pattern on the second special figure display unit can be executed in an overlapping manner, and when a predetermined game state is reached, either one of them is displayed. A configuration in which the duration of the change display of the picture on the special figure display unit is extremely long may be adopted. In this configuration, if it is attempted to wait for the confirmation of the set value until a situation in which no game is played, the waiting time becomes long. On the other hand, by performing the setting confirmation process (step S7914) in the process at the start of the supply of the operating power in the main CPU 63, the setting value can be set without causing the above-described standby time. Can be confirmed.

  Further, in the low frequency support mode, the duration of the fluctuation display of the picture on the ordinary figure display unit 38a may be extremely long. In this configuration, if it is attempted to wait for the confirmation of the set value until a situation in which no game is played, the waiting time becomes long. On the other hand, by performing the setting confirmation process (step S7914) in the process at the start of the supply of the operating power in the main CPU 63, the setting value can be set without causing the above-described standby time. Can be confirmed.

  In addition, the display contents of the first to fourth notification display devices 201 to 204 when the setting confirmation process (FIG. 115) is executed are not limited to the display contents in the above-described embodiment. The character "k" may not be displayed on the display unit 203, and only the central display segment may emit light as in the case of the first notification display unit 201 and the second notification display unit 202. . In addition, the first to third notification display devices 201 to 203 may be turned off and the fourth notification display device 204 may perform a display corresponding to the current set value.

  Further, the display contents of the first to fourth notification display devices 201 to 204 when the set value update process (FIG. 116) is executed are not limited to the display contents in the above-described embodiment. The character "H" may not be displayed on the display unit 203, and only the central display segment may emit light as in the case of the first notification display unit 201 and the second notification display unit 202. . In addition, the first to third notification display devices 201 to 203 may be turned off and the fourth notification display device 204 may perform a display corresponding to the current set value.

  Further, instead of transmitting the type data and the display data to the display IC 266 simultaneously, the main CPU 63 may be configured to start transmitting the type data and then start transmitting the display data. In this case, the transmission of the display data may be started during the transmission of the type data, or the transmission of the display data may be started after the transmission of the type data is completed. Further, the transmission of the type data may be started after the transmission of the display data is started. In this case, the transmission of the type data may be started during the transmission of the display data, or the transmission of the type data may be started after the transmission of the display data is completed.

  The display IC 266 is not limited to the configuration in which only one display IC 266 is provided so as to be common to the first to fifth display circuits 261 to 265. It is good also as a structure provided corresponding to each one by one. In this configuration, when the display data stored and held in each display IC provided in one-to-one correspondence with the first to fifth display circuits 261 to 265 is short, the display data to each display IC is Unintended blinking may occur on each display unit depending on the providing cycle. On the other hand, the processing for transmitting the display data is concentrated in the second timer interrupt processing (FIG. 123) in which the interrupt cycle is relatively short as in the above-described embodiment. The provision cycle can be shortened, and it is possible to prevent unintended blinking from occurring on each display unit.

  Further, instead of the configuration in which the hit random number counter C1 is provided in the main RAM 65, a configuration may be adopted in which a random number circuit for updating the random number acquired in the hit determination processing is provided. In this case, in the internal function register setting process in the main process (FIG. 114), setting for associating the random number of the random number circuit with the random number obtained in the pass / fail determination process is performed.

<34th embodiment>
In the present embodiment, the processing configuration of the set value update processing executed by the main CPU 63 is different from that of the above-described thirty-third embodiment. Hereinafter, a configuration different from the 33rd embodiment will be described. The description of the same configuration as that of the thirty-third embodiment is basically omitted. In the present embodiment, an update button 68b is provided on the main control board 61 as in the first embodiment.

  FIG. 125 is a flowchart showing the setting value update processing in the present embodiment executed by the main CPU 63. Note that the processing of steps S8501 to S8508 in the setting value update processing is executed using the specific control program and the specific control data in the main CPU 63.

  First, “1” is set to a setting update display flag provided in the work area 221 for specific control (step S8501). Thereafter, it is determined whether or not the value of the set value counter provided in the work area 221 for the specific control is equal to or more than 1 corresponding to “Setting 1” and equal to or less than 6 corresponding to “Setting 6” (step). S8502). If the value of the set value counter is “0” or 7 or more, a negative determination is made in step S8502, and “1” is set in the set value counter (step S8503). Thereby, the set value of the pachinko machine 10 becomes “Setting 1”.

  If an affirmative determination is made in step S8502 or if the process of step S8503 is performed, it is determined whether the reset button 68c is pressed (step S8504). If the reset button 68c has not been pressed (step S8504: NO), the value of the set value counter in the work area 221 for specific control is provided on condition that the update button 68b is pressed (step S8505: YES). Is incremented by 1 (step S8506). Thus, each time the update button 68b is pressed once, the set value is updated to the next higher level. If the update button 68b is not pressed (step S8505: NO) or if the value of the set value counter is incremented by 1, the process returns to step S8502. If it is determined that the value is 7 or more, “1” is set to the set value counter in step S8503. As a result, when the update button 68b is pressed once in the situation of "Setting 6," the display returns to "Setting 1."

  If the reset button 68c has been pressed (step S8504: YES), the current set value is determined, and the flow advances to step S8507. In step S8507, it is determined whether or not the setting key insertion unit 68a has been turned off using the setting key. In this case, the configuration may be such that it is determined whether the setting key insertion section 68a has been switched from the ON state to the OFF state, or the configuration may be such that it is determined whether the setting key insertion section 68a is in the OFF state. If the setting key insertion section 68a has not been turned off (step S8507: NO), the processing of step S8507 is executed again.

  If the setting key insertion section 68a is turned off (step S8507: YES), the setting update display flag in the work area 221 for specific control is cleared to "0" (step S8508).

  According to the above configuration, in the configuration in which the setting value is updated by pressing the update button 68b, the setting value is determined by pressing the reset button 68c, and the setting key insertion unit 68a is turned off. Thus, the setting value updating process ends. That is, in order to end the setting value updating process after updating the setting value in the setting value updating process, it is necessary not only to turn off the setting key insertion unit 68a but also to press the reset button 68c. As a result, it is possible to make it difficult for the user to play a game with the set value after the set value has been illegally updated.

<Other embodiments>
The present invention is not limited to the description of the above-described embodiment, and various modifications and improvements can be made without departing from the spirit of the present invention. For example, it may be changed as follows. Incidentally, the following different configurations may be individually applied to the configuration of the above embodiment, or may be applied in combination.

  (1) In the first to fourteenth embodiments, the number of occurrences of the opening / closing execution mode per unit game is calculated as a parameter indicating the frequency of occurrence of the opening / closing execution mode. The result of dividing the number of occurrences of the open / close execution mode by the total number of game balls discharged from the game area PA may be calculated. Further, in addition to or instead of this, a configuration in which the number of times of the open / close execution mode is divided by the total number of the number of balls entering the first operating port 33 and the number of balls entering the second operating port 34 is calculated. It may be. Further, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

  (2) In the first to fourteenth embodiments, as the parameter indicating the frequency of occurrence of the high frequency support mode, the frequency of occurrence of the high frequency support mode per unit game time and the frequency of high frequency support mode Although the configuration of calculating the ratio of the number of occurrences of the game is calculated in addition to or instead of the above, the result of dividing the number of occurrences of the high frequency support mode by the total number of game balls discharged from the game area PA may be calculated. Good. In addition to or instead of this, a result of dividing the number of occurrences of the high frequency support mode by the total number of the number of balls entering the first operation port 33 and the number of balls entering the second operation port 34 is calculated. It may be configured. Further, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

  (3) As a game result that triggers the opening / closing execution mode, not only the big hit result but also a small hit result may be provided. When the small hitting result is obtained, the open / close execution mode is generated, but the win / fail lottery mode and the support mode are not changed before and after the open / close execution mode. In addition, in the opening / closing execution mode in which the small hit results, the low frequency winning mode may be adopted. In this case, when a big hit result occurs, history information corresponding to the occurrence of the big hit result is stored in the history memory 117, and when a small hit result occurs, the history information corresponding to the occurrence of the small hit result is stored in the history. May be stored in the memory 117 for use. In this configuration, a parameter indicating the frequency of occurrence of the big hit result and a parameter indicating the frequency of occurrence of the small hit result may be calculated by using the history information stored in the history memory 117. Further, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

  In addition, a configuration in which the probability of winning the small hit result may be changed according to the setting state of the pachinko machine 10 or a configuration in which the probability does not change may be used. In the case of a configuration in which the probability of winning the small hit result changes according to the setting state of the pachinko machine 10, the higher the set value, the higher the probability of winning the small hit result, and the higher the set value, the smaller the hit result. It is good also as a structure with a low probability.

  Further, in a configuration in which a small hit result exists, the hold information obtained when a game ball enters the first operation port 33 and the hold information obtained when a game ball enters the second operation port 34. In the case where the jackpot result is obtained with the hold information, the distribution ratio of the type of the jackpot result is different, and when aiming for the ball to enter the first operating port 33, the variable display unit 36 in the gaming area PA. Also, the shooting operation is performed so that the game ball flows down the left area, and when aiming to enter the second operating port 34, the game ball flows down the area to the right of the variable display unit 36 in the game area PA. And a configuration in which a small hitting result may be generated based on the hold information acquired when a game ball enters the first operating port 33.

In this configuration, the following fifty-first parameter may be present as a management result of the game history. Note that the normal period is a period obtained by adding the execution period of the opening / closing execution mode triggered by the small hit result based on the ball entering the first operating port 33 and the execution period of the low frequency support mode instead of the opening / closing execution mode. I do. Further, the number of balls entering the out-opening 24a during the normal period is referred to as the number of entered balls K51, and the number of balls entering the general winning opening 31 during the normal period is referred to as the number of entered balls K52. The number of entered balls is K53, the number of entered balls into the first operation port 33 during the normal period is K54, and the number of entered balls into the second operation port 34 during the normal period is K55.
The fifty-first parameter: the total number of game balls to be paid out during the normal period (K52 × “the number of prize balls for winning into the general winning opening 31” + K53 × “the number of prize balls for winning to the special electric prize device 32” + K54 × “first (The number of prize balls for winning in the operating port 33) + K55 × (the number of prize balls for winning in the second operating port 34) / the ratio of the total number of game balls (K51 + K52 + K53 + K54 + K55) discharged from the skill area PA during the normal period. In the configuration in which the 51st parameter is calculated, if the winning probability of the small hit result varies according to the setting state of the pachinko machine 10, the normal value of the 51st parameter may vary according to the setting state of the pachinko machine 10. Becomes Therefore, it is preferable that the history information used for calculating the 51st parameter be deleted when the setting state of the pachinko machine 10 is changed. On the other hand, when the winning probability of the small hit result does not change according to the setting state of the pachinko machine 10, the normal value of the 51st parameter does not change according to the setting state of the pachinko machine 10. Therefore, it is preferable that the history information used to calculate the fifty-first parameter is not deleted even if the setting state of the pachinko machine 10 is changed.

  (4) In the first to fourteenth embodiments, the history information corresponding to the occurrence of the open / close execution mode is stored in the history memory 117 regardless of the type of the jackpot result. The history information corresponding to the type of the jackpot result may be stored in the history memory 117. In this case, a configuration may be employed in which a parameter indicating the occurrence frequency is calculated for each type of the jackpot result. Further, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

  (5) In the first to fourteenth embodiments, various parameters (the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameters, and the fourteenth to forty-second parameters) are periodically set. Although the parameter is calculated, the present invention is not limited to this. For example, when the total number of game balls discharged from the game area PA becomes the number of calculation triggers (for example, 10,000), various parameters are calculated. The configuration may be such that various parameters are calculated when the supply of operating power to the pachinko machine 10 is stopped, and the number of executions of the game times becomes the number of calculation triggers (for example, 1000). In such a case, various parameters may be calculated. In this case, the configuration may be such that the history memory 117 is cleared to “0” at the timing when various parameters are calculated. Further, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

  (6) In the first to fourteenth embodiments, the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameters, and the The configuration is such that all of the 41st to forty-second parameters are calculated. However, the present invention is not limited to this. At a single calculation timing, only a part of the above various parameters becomes a calculation target, and every time the calculation timing is reached. The parameter group to be calculated may be sequentially changed. For example, the first to eighth parameters are calculated at one calculation timing, the 11th to 18th parameters are calculated at the next calculation timing, the 21st to 26th parameters are calculated at the next calculation timing, and the next calculation is performed. At the timing, the 31st parameter and the 41st to 42nd parameters are calculated, and thereafter, the change of the calculation target in the above order may be repeated every time the calculation timing comes. This makes it possible to reduce the processing load for calculating parameters when one calculation timing comes. Further, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

  (7) In the first to fourteenth embodiments, it is also possible to adopt a configuration in which the calculation of various parameters using the history information of the history memory 117 is executed on condition that the game is being played. For example, the configuration may be such that calculation of various parameters is executed on condition that game balls are supplied to the game area PA. This makes it possible to prevent the calculation of various parameters from being uselessly repeated even when the game is not performed. Further, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

  (8) In the first to fourteenth embodiments, the configuration is not limited to the configuration in which the management IC 66 is provided separately from the main CPU 63, and the function of the management IC 66 is fulfilled by the main CPU 63. It may be configured. In this case, the correspondence information is stored in the main ROM 64 in advance. In addition, a history memory 117, a calculation result memory 131, and a separate storage memory 171 may be provided separately from the main RAM 65. In the main RAM 65, the history memory 117, the calculation result memory 131, and the The function of the storage memory 171 may be performed. In a configuration in which the functions of the history memory 117, the operation result memory 131, and the separate storage memory 171 are performed in the main RAM 65, when the main RAM 65 is cleared (step S <b> 105 and step S <b> 117), the history Some or all of the areas corresponding to the memory 117, the operation result memory 131, and the separate storage memory 171 may be cleared to "0", and the history memory 117, the operation result memory 131, and the separate storage The area corresponding to each of the memory 171 may be excluded from the target of “0” clear, and may be cleared to “0” when the corresponding clear condition in each of the above embodiments is satisfied. In the main RAM 65, an area corresponding to each of the history memory 117, the calculation result memory 131, and the separate storage memory 171 may be configured to have different manual operation contents for executing the clearing process between the other areas. Good. Further, the function of the management IC 66 may be performed by the sound emission control device 81.

  (9) In the first to fourteenth embodiments, when a new setting of the setting state of the pachinko machine 10 is performed, the history information in the history memory 117 is stored and retained without being deleted, while the operation is performed. Various parameters stored in the result memory 131 may be deleted. Thus, after a new setting of the setting state is performed, it is possible to prevent notification of various parameters calculated before the setting is performed. Further, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

  (10) In the third to fifth embodiments, even if a new setting of the setting state of the pachinko machine 10 is performed (that is, even if the setting value updating process is executed by the main CPU 63), If the set value is not changed before and after the setting, the clearing process of the history memory 117 may not be executed. This makes it possible to prevent the history information in the history memory 117 from being erased even though the set value has not been changed.

  In the present configuration, the area for storing the set values in the main RAM 65 is excluded from the target of “0” clear even if all clear processing (step S117) is executed, so that the set value update processing ( The main CPU 63 can specify whether or not the set value has been changed before and after step S118). In this case, when the main CPU 63 specifies that the set value has not been changed, a signal is output to the management CPU 112 so that the setting update recognition process is not executed by the management CPU 112, and the main CPU 63 When it is specified that the setting value has been changed in step (1), a signal may be output to the management-side CPU 112 so that the management-side CPU 112 executes the setting update recognition process.

  Further, when a signal indicating that a new setting of the setting state of the pachinko machine 10 has been performed is received from the main CPU 63, the management CPU 112 refers to the history information stored in the history memory 117. It may be configured to specify whether or not the set value has been changed. In this case, when the management CPU 112 specifies that the set value has not been changed, the clear processing of the history memory 117 is not executed, and the management CPU 112 specifies that the set value has been changed. In this case, it is possible to execute the clearing process of the history memory 117.

  (11) In the third to fifth embodiments, even if a new setting of the setting state of the pachinko machine 10 is performed (that is, even if the main CPU 63 executes the setting value update processing), If the set value is not changed before and after the setting, the configuration may be such that the arithmetic processing of various parameters triggered by the new setting of the setting state is not executed. Accordingly, it is possible to prevent various parameters from being calculated in response to a new setting of the setting state even though the setting value has not been changed.

  In the present configuration, the area for storing the set values in the main RAM 65 is excluded from the target of “0” clear even if all clear processing (step S117) is executed, so that the set value update processing ( The main CPU 63 can specify whether or not the set value has been changed before and after step S118). In this case, when the main CPU 63 specifies that the set value has not been changed, a signal is output to the management CPU 112 so that the setting update recognition process is not executed by the management CPU 112, and the main CPU 63 When it is specified that the setting value has been changed in step (1), a signal may be output to the management-side CPU 112 so that the management-side CPU 112 executes the setting update recognition process.

  Further, when a signal indicating that a new setting of the setting state of the pachinko machine 10 has been performed is received from the main CPU 63, the management CPU 112 refers to the history information stored in the history memory 117. It may be configured to specify whether or not the set value has been changed. In this case, if the management CPU 112 specifies that the set value has not been changed, the calculation of various parameters triggered by the new setting of the current setting state is not executed, and the management CPU 112 sets the parameter. When it is determined that the value has been changed, it is possible to execute the calculation of various parameters triggered by the new setting of the current setting state.

  (12) In the third to fifth embodiments, if a new setting of the setting state of the pachinko machine 10 is performed, various parameters may be calculated in various calculation processes (step S1807) at that time. Instead, the various parameters stored in the calculation result memory 131 at that time are stored in the storage target areas of the first to fifth separate storage areas 172 to 176 of the separate storage memory 171, and the calculation is performed. The information stored in the result memory 131 may be cleared to “0”. In this case, since it is not necessary to calculate various parameters under the situation where the setting state of the pachinko machine 10 is newly set, the storage of various parameters in the separate storage memory 171 can be completed early. Become.

  (13) In the third to fifth embodiments, the contents of various parameters stored in the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 are changed by performing a predetermined display start operation. The display may be displayed on the first to third notification display devices 69a to 69c or another display device. The predetermined display start operation may be performed by operating a dedicated operation unit, or a predetermined dedicated operation may be performed on an operation unit for performing another operation. Thus, various parameters stored in the separate storage memory 171 can be easily checked.

  (14) Although the out port 24a, the general prize port 31, the special prize winning device 32, the first operation port 33, and the second operation port 34 are all configured to store the history information (or the ball entry history). The configuration is such that only part of the out opening 24a, the general winning opening 31, the special winning winning device 32, the first operating opening 33, and the second operating opening 34 is a storage target of the history information. It may be. For example, only the general winning opening 31, the special power winning device 32, and the second operating port 34 may be configured to store history information, and only the general winning opening 31 may be configured to store history information. Good. Even in this case, it is possible to grasp the entering state of the game ball in a predetermined period for the entering part for which the history information is stored.

  (15) A signal path for transmitting information corresponding to a ball entry result of a game ball in correspondence with each of the first winning opening detection sensor 42a, the second winning opening detection sensor 43a, and the third winning opening detection sensor 44a. Although the configuration is such that 118a to 118c are set, the present invention is not limited to this, and the information corresponding to the ball entry result for the same type of ball entry unit includes a plurality of the same type of ball entry unit. Even if there is a configuration in which a plurality of ball entry detection sensors exist in accordance therewith, the configuration may be such that the information is transmitted as one type of information. As a result, the number of types of information transmitted from the main CPU 63 to the management IC 66 can be reduced.

  (16) In the first to fourteenth embodiments, the correspondence information indicating the correspondence between the type of information transmitted from the main CPU 63 to the management IC 66 and each of the buffers 122a to 122o is transmitted from the main CPU 63 to the management IC 66. Although the configuration is such that the information is transmitted to the IC 66, the configuration is not limited to this, and the configuration may be such that the correspondence information is stored in the management IC 66 in advance. In this case, there is no need to execute a process for causing the management IC 66 to recognize the correspondence information, so that the processing load on the main CPU 63 can be reduced.

  (17) In the first to fourteenth embodiments, the correspondence information indicating the correspondence between the type of information transmitted from the main CPU 63 to the management IC 66 and each of the buffers 122a to 122o is transmitted from the main CPU 63 to the management IC 66. Is transmitted when the supply of operating power to the main CPU 63 is started. However, the present invention is not limited to this. For example, the main CPU 63 and the management IC 66 can perform bidirectional communication, and The configuration may be such that the correspondence information is transmitted from the main CPU 63 to the management IC 66 when a signal requesting transmission of the correspondence information is received from the IC 66. In this case, the correspondence memory 116 is provided as a non-volatile memory and is used for both reading and writing. After the pachinko machine 10 is shipped, the correspondence information provided from the main CPU 63 to the management IC 66 is transmitted to the main CPU 63. Even when the supply of the operating power is stopped, the power is stored and held in the correspondence memory 116. Thereby, it is possible to reduce the frequency of transmitting the correspondence information.

  (18) In the first to fourteenth embodiments, the correspondence information indicating the correspondence between the type of information transmitted from the main CPU 63 to the management IC 66 and each of the buffers 122a to 122o is transmitted from the main CPU 63 to the management IC 66. Is transmitted using the signal paths 118a to 118g for transmitting the information of the detection results of the ball detection sensors 42a to 48a, but the present invention is not limited to this. A configuration may be such that a dedicated signal path for transmitting information from the main CPU 63 to the management IC 66 is provided. This allows the management IC 66 to know which type of information is being received from the main CPU 63 based on the types of the buffers 122a to 122o that receive that information.

  (19) In the first to fourteenth embodiments, the information is transmitted from the main CPU 63 to the management IC 66, but the information is not transmitted from the management IC 66 to the main CPU 63. However, the present invention is not limited to this. Instead, information may be transmitted from the management IC 66 to the main CPU 63. For example, various parameters calculated by the management CPU 112 based on the history information may be transmitted to the main CPU 63. In this case, the main CPU 63 may be configured to directly execute the notification control of the notifying means so that the notification corresponding to the contents of the received various parameters is performed. By transmitting a command corresponding to the content of the parameter to the audio light emission control device 81, the notification corresponding to the content of the various parameters is executed using the symbol display device 41, the display light emitting unit 53, and the speaker unit 54. It is good also as composition which performs.

  (20) In the first to fourteenth embodiments, when the supply of the operation power to the main CPU 63 is started, the main CPU 63 or the management CPU 112 is notified based on the history information stored in the history memory 117. Various parameters may be calculated using the symbol display device 41, the display light emitting unit 53, the speaker unit 54, and the like, and the contents of the calculated various parameters may be notified. In this case, it is possible to confirm whether or not the entering state of the game balls in the game area PA on the immediately preceding business day at the start of the operation of the game hall is normal. Further, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

  (21) In the first to fourteenth embodiments, when various parameters calculated based on the history information stored in the history memory 117 are abnormal results, the pachinko machine 10 is operated until the prohibition release operation is performed. May not be able to start the game. As a configuration in which the game cannot be started, for example, a configuration in which launching of a game ball may be prohibited or a configuration in which each of the incoming ball detection sensors 42a to 49a may be invalidated may be employed. Even if a prize occurs in the 33 or the second operation port 34, the winning / non-permission determination processing may not be performed. The prohibition releasing operation may be an operation of turning on the power of the pachinko machine 10 again while the reset button 68c is pressed, and can be operated when the gaming machine main body 12 is opened with respect to the outer frame 11. The operation of the operation means may be performed. This makes it possible to prevent the game from being played as it is in a situation where the entering state of the game ball in the game area PA is abnormal. Further, it is possible to prevent the game from being played as it is in a situation where the frequency of occurrence of the open / close execution mode is abnormal. Further, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

  (22) In the first to fourteenth embodiments, the history information corresponding to the detection results of the incoming ball detection sensors 42a to 48a is stored in the history memory 117, but the calculation of various parameters using the history information is not performed. The configuration may be such that neither the main CPU 63 nor the management CPU 112 executes the process. In this case, the history information may be read by an external device electrically connected to the reading terminal 68d, and the operator of the reading operation may execute the calculation of various parameters using the read history information. Alternatively, the external device may be configured to execute calculation of various parameters using the read history information. In this case, the processing load on the main CPU 63 and the management CPU 112 can be reduced. Further, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

  (23) In the first to fourteenth embodiments, the power supply for the management IC 66 is provided separately from the main CPU 63, and even if the supply of the operating power to the main CPU 63 is stopped, the management IC 66 is provided. May be configured to be capable of calculating various parameters using history information and outputting information of history information or various parameters. As a result, even when the supply of the operating power to the main CPU 63 is stopped, the history information and various parameters can be read by the external device.

  (24) In the first to fourteenth embodiments, the reading terminal 68d used for reading a program from the main ROM 64 is also used as a terminal used for reading history information or various parameters by an external device. However, the present invention is not limited to this, and the terminal used for reading history information or various parameters by an external device is different from the reading terminal 68 d for reading a program from the main ROM 64. A configuration may be provided separately. In this case, the terminal used to read the history information or various parameters may be provided in the MPU 62 or may be provided in a position different from the MPU 62 on the main control board 61.

  (25) In the first to fourteenth embodiments, it is not limited to the configuration in which the correspondence memory 116, the history memory 117, and the operation result memory 131 are provided as nonvolatile storage means such as a flash memory. For example, one of these memories 116, 117, and 131 is provided as a volatile storage unit that requires power supply for storing and holding information, and backup power is supplied to the memory, so that the main side The information may be stored and held even when the supply of the operating power to the CPU 63 is stopped. In this case, a configuration may be adopted in which a dedicated backup power device is provided for the memory, and a configuration is such that backup power is supplied to the memory from a power supply / emission control device 78 that supplies backup power to the main RAM 65. Is also good.

  (26) In the first to fourteenth embodiments, the management IC 66 includes the management CPU 112 as a general-purpose CPU, and performs a process of storing history information and a process of calculating various parameters based on programs and data stored in the management ROM 113. The present invention is not limited to the configuration in which the functions are executed, and a configuration in which a hardware circuit designed to have these functions is formed in the management IC 66 may be employed. Specifically, in the case of the first embodiment, for example, in the case where the hardware circuit receives a signal indicating that a game ball has been detected by any of the detection sensors 42 a to 48 a from the main CPU 63. The correspondence information corresponding to the buffer receiving the signal is stored in the history memory 117 from the correspondence memory 116, and the information of the RTC 115 at that time is stored in the history memory 117. I do. In the case of the sixth embodiment, for example, when the hardware circuit receives a signal indicating that any of the detection sensors 42a to 48a has detected a game ball from the main CPU 63, the hardware circuit receives the signal. The value of the counter corresponding to the buffer is incremented by one. Further, the hardware circuit calculates various parameters using the history information at that time when a calculation trigger occurs in the first embodiment or the like. Further, when an external output trigger to the reading terminal 68d occurs, the hardware circuit externally outputs various parameters as operation results and history information.

  (27) In the first to fourteenth embodiments, the main CPU 63 and the management IC 66 may be provided as separate chips, or may be provided as separate boards, and another control device may be used. The configuration provided as

  (28) While the number of game balls entering the out port 24a is counted, the number of the game balls, such as the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34, is counted. History information including RTC information may be stored with respect to the entry of the ball into the bonus opportunity entry section which is the trigger of the prize ball payout or the winning / failing determination process. With this, it is possible to calculate the ball entry frequency of game balls to each privilege opportunity ball unit with respect to the total number of game balls discharged, while making it possible to extract the history of game balls entering the bonus opportunity ball unit. Become.

  (29) The predetermined event that triggers the storage of the history information may include a configuration other than that in the above embodiments. For example, at least one of the timing when the lower plate 56a becomes full, the timing when the full state is started, and the timing when the full state is released may be stored as history information. At least one of the timing of the absence of the ball, the timing of the start of the absence of the ball, and the timing of the release of the absence of the ball may be stored as history information, and the dispensing device 76 is in an abnormal state. At least one of the timing at which the abnormal state of the payout device 76 is started and the timing at which the abnormal state of the payout device 76 is released may be stored as history information. In this case, it is possible to grasp the occurrence frequency of these events.

  (30) In the first embodiment, the configuration is such that the sixteenth buffer 122p of the input port 121 in the management-side I / F 111 corresponds to the output instruction signal in the design stage of the management IC 66 in advance. However, the present invention is not limited to this, and the fact that the 16th buffer 122p corresponds to the output instruction signal is also recognized by the management IC 66 by transmitting the type identification command from the main CPU 63. It may be. In the first embodiment, the configuration is such that the fifteenth buffer 122o of the input port 121 in the management-side I / F 111 corresponds to the set value update signal in the design stage of the management IC 66 in advance. However, the present invention is not limited to this. The fact that the fifteenth buffer 122o corresponds to the set value update signal is also recognized by the management IC 66 by transmitting the type identification command from the main CPU 63. It may be configured. In this case, it is not necessary to previously set the correspondence between the buffers 122a to 122p and the types of signals input to the buffers 122a to 122p in the management IC 66 in advance.

  (31) In the first to fourteenth embodiments, the management IC 66 may be configured to transmit a normal operation signal to the main CPU 63 when operating normally. In this case, the main CPU 63 can monitor whether the management IC 66 is operating normally.

  (32) The display device that displays the set value being updated in the set value update process is not limited to the first to fourth notification display devices 201 to 204, and may be the symbol display device 41. It may be a dedicated display device. Further, the display device for displaying the set value in the setting confirmation process is not limited to the first to fourth notification display devices 201 to 204, and may be the symbol display device 41, and may be a dedicated display device. It may be.

  (33) The operation unit operated to update the set value in the set value update process is not limited to the update button 68b, but may be the reset button 68c. Further, positions corresponding to each of “Setting 1” to “Setting 6” are set as the rotation operation positions when the setting key is inserted into the setting key insertion section 68a and the rotation operation is performed. The configuration may be such that a set value corresponding to the rotational operation position of the part 68a is set. Further, the setting key insertion portion 68a is configured to be capable of being further rotated than the ON position, and each time a rotating operation beyond the ON position is performed, the set value being updated is changed to the next set value. The configuration may be updated.

  (34) In the first to tenth and fifteenth to twenty-first embodiments, the first to third notification display devices 69a to 69c are provided side by side. However, the first to third notification display devices 69a to 69c are provided side by side in the vertical direction. May be provided, may be arranged diagonally side by side, or may be arranged side by side so as to be two steps up and down. In the first to fourteenth embodiments, the first to fourth notification display devices 201 to 204 are provided side by side. However, the display devices 201 to 204 may be provided side by side in the vertical direction. May be arranged side by side, or may be arranged side by side so as to be vertically arranged in two stages. In the fifteenth to twenty-first embodiments, the first to fourth notification display devices 201 to 204 may be used as display devices for displaying the management result of the game history.

  (35) In the first to fourteenth embodiments, history information used for calculating a parameter whose normal value fluctuates according to the setting state of the pachinko machine 10 (hereinafter referred to as fluctuation target history information) ) And history information used for calculating a parameter whose normal value does not fluctuate according to the setting state of the pachinko machine 10 (hereinafter referred to as non-variation target history information) have different areas in the history memory 117. May be stored. In this case, when the setting state of the pachinko machine 10 is newly set or when the setting state of the pachinko machine 10 is changed, the area where the history information to be changed is stored in the history memory 117 is “0”. On the other hand, the area in which the history information of the non-variable object is stored in the history memory 117 may not be cleared to "0". Thereby, the calculation of the parameter whose normal value fluctuates according to the setting state of the pachinko machine 10 can be accurately performed even after the setting value is changed, and the normal value does not fluctuate according to the setting state of the pachinko machine 10. Accuracy of parameter calculation can be improved. Further, this configuration may be applied to the fifteenth to twenty-first embodiments.

  (36) In the fifteenth to twenty-first embodiments, the stack area 222 for specific control and the stack area 224 for non-specific control may not be specified in the main RAM 65 in advance. Even in this case, the area corresponding to the stack areas 222 and 224 is specified in the main RAM 65 at the stage of designing the pachinko machine 10, but the area is specified beyond the storage capacity of the area. When the information storage processing is executed, the originally unscheduled information is written in the originally unscheduled area. Therefore, the main RAM 65 may be cleared to “0”.

  (37) In the fifteenth to twenty-first embodiments, when the clear processing of the main RAM 65 (steps S105 and S117) is performed, the work area 221 for specific control and the stack area 222 for specific control are “ Although “0” is cleared, the non-specific control work area 223 and the non-specific control stack area 224 are not cleared to “0”. Instead, the main RAM 65 is cleared (step S105). In step S117), not only the work area 221 for specific control and the stack area 222 for specific control but also the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". . In the clearing process of the main RAM 65 (steps S105 and S117), not only the work area 221 for specific control and the stack area 222 for specific control but also the normal counter area 231, the open / close execution mode counter area 232, the high frequency The configuration may be such that the support mode counter area 233 is cleared to “0”, but the operation result storage area 234 is not cleared to “0”. In this case, it is possible to protect the information stored in the calculation result storage area 234.

  (38) In the fifteenth to twenty-fifth embodiments, the operation for clearing the work area 221 for specific control and the stack area 222 for specific control to “0”, and the work area 223 for non-specific control and the non-specific control work area 223 The operation for clearing the stack area 224 for specific control to “0” may be different from the operation for clearing the stack area 224 for specific control. For example, when the supply of operating power to the pachinko machine 10 is started while operating the reset button 68c, the work area 221 for specific control and the stack area 222 for specific control are cleared to "0", and the update button 68b is reset. When the supply of the operation power to the pachinko machine 10 is started while operating, the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to “0”. This makes it possible to selectively erase each piece of information. Further, in this configuration, when the supply of the operating power to the pachinko machine 10 is started while operating both the update button 68b and the reset button 68c, the work area 221 for specific control and the stack area 222 for specific control Alternatively, the work area 223 for non-specific control and the stack area 224 for non-specific control may all be cleared to “0”. Thus, in the configuration in which the selective erasing is enabled as described above, it is possible to improve the workability when erasing the information of each of the areas 221 to 224 collectively.

  (39) In the fifteenth to eighteenth embodiments, as in the nineteenth embodiment, when the processing corresponding to the non-specific control is started, the information of the stack pointer of the main CPU 63 is set to the non-specific control work. A configuration may be employed in which the information is saved to the area 223 and the saved information is restored to the stack pointer of the main CPU 63 when returning to the process corresponding to the specific control. Thereby, even if the information of the stack pointer of the main CPU 63 can be changed when the process corresponding to the non-specific control is started, the main side CPU 63 ends when the process corresponding to the non-specific control ends. It is possible to return the state of the stack pointer of the CPU 63 to the state before the processing corresponding to the non-specific control is started.

  (40) In the fifteenth to twenty-fifth embodiments, processing for collecting game history information as processing corresponding to non-specific control, processing for calculating various parameters using the collected history information, and Although the processing for notifying the calculation result is performed, only a part of the processing is performed as processing corresponding to the non-specific control, and the other processing is performed as processing corresponding to the specific control. It may be. Further, in addition to or instead of a process for collecting information on the game history, a process for calculating various parameters using the collected history information, and a process for notifying a result of the calculation, The processing may be executed as processing corresponding to the non-specific control. For example, a configuration may be adopted in which at least one of the unauthorized monitoring and the notification of the monitoring result is executed as a process corresponding to the non-specific control.

  (41) In the fifteenth to twenty-fifth embodiments, when the main CPU 63 returns to the processing corresponding to the specific control from the situation where the processing corresponding to the non-specific control is being executed, the flag register of the main CPU 63 Although neither the stack pointer nor the various registers are saved in the main RAM 65, instead of this, the processing corresponding to the non-specific control is executed by the main CPU 63 to the processing corresponding to the specific control. When returning, at least a part of the information of the flag register, the stack pointer and the various registers of the main CPU 63 is saved in the main RAM 65, and the saved information is restarted for the process corresponding to the non-specific control. In such a case, the configuration may be such that the storage is returned to the corresponding storage area of the main CPU 63. As a result, the information of the main CPU 63 used in the process corresponding to the non-specific control can be carried over and used.

  (42) In the fifteenth to twenty-fifth embodiments, various parameters are calculated when the total number of game balls ejected from the game area reaches 6000. The total number of game balls may be more or less than 6000. For example, various parameters may be calculated when the total number of game balls discharged from the game area reaches 60000. In this case, the storage capacity required for storing the game history information increases, but the game history information is stored in the management RAM 241 external to the MPU 62 as in the twenty-first embodiment. With the storage configuration, it is possible to flexibly cope with the increase in the storage capacity.

  (43) In the fifteenth to twenty-fifth embodiments, the configuration is such that the 61st to 68th parameters are calculated as the management result of the game history. At least a part of the parameter, the 41st parameter, and the 42nd parameter may be calculated.

  (44) In the fifteenth to twenty-fifth embodiments, when the processing for newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the work area 221 for specific control is used. In addition, not only the stack area 222 for specific control but also the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to “0”. In this case, when processing for newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the normal counter area 231, the open / close execution mode counter area 232, the high-frequency The support mode counter area 233 and the operation result storage area 234 are cleared to "0".

  In addition, when processing for newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, not only the work area 221 for specific control and the stack area 222 for specific control but also The normal counter area 231, the open / close execution mode counter area 232, and the high-frequency support mode counter area 233 may be cleared to "0", but the operation result storage area 234 may not be cleared to "0". In this case, it is possible to protect the information stored in the calculation result storage area 234.

  In addition, when processing for newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the work area 221 for specific control and the stack area 222 for specific control are set to “0”. However, the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared but not cleared to "0". In this case, it is possible to protect the information stored in the work area 223 for non-specific control and the stack area 224 for non-specific control.

  Further, in the case where the configuration of the above (43) is provided, when the processing of newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the first state is changed. Although the history information for calculating the 31st parameter, the 41st parameter, and the 42nd parameter in the embodiment is deleted, the normal counter area 231, the open / close execution mode counter area 232, and the frequent support mode counter area 233 are used. The operation result storage area 234 may not be cleared to “0”.

  (45) In the first to twenty-fifth embodiments, instead of the configuration in which the total number of game balls discharged from the game area PA is used to calculate various parameters, the game balls are supplied to the game area PA. A configuration in which the total number of game balls supplied is used may be used. In this case, for example, a detection sensor is provided so as to detect a game ball that has been fired from the game ball firing mechanism 27 and has reached the game area PA, and a game ball supplied to the game area PA is detected based on a detection result of the detection sensor. It may be configured to measure the number. In this configuration, since it is not necessary to measure the number of game balls discharged from the out port 24a, a configuration in which the out port detection sensor 48a is not provided may be employed.

  (46) In the fifteenth to twenty-fifth embodiments, at least a part of the information of the various registers and the stack pointer of the main CPU 63 is stored in the stack area 222 for specific control or the stack area 224 for non-specific control. It may be configured to be saved by a load instruction. In this case, it is necessary to update the information of the stack pointer of the main CPU 63 when saving the information to the stack areas 222 and 224. Alternatively, the information saved in the stack areas 222 and 224 may be restored to the corresponding storage area of the main CPU 63 by a load instruction. Also in this case, it is necessary to update the information of the stack pointer of the main CPU 63 when returning the information from the stack areas 222 and 224.

  (47) When the set value updating process is executed in each of the above embodiments, the corresponding notification may be made by any of the symbol display device 41, the display light emitting unit 53, and the speaker unit 54. Thereby, the administrator of the gaming hall can clearly understand that the set value update process is being executed.

  (48) In each of the above embodiments, a history that a set value is newly set may be stored in the main RAM 65. Further, a configuration may be adopted in which the history of the newly set values is stored in the RAM provided in the sound emission control device 81. In this case, every time the setting value updating process is completed, a command including information on the setting value set in the setting value updating process is transmitted from the main CPU 63 to the audio emission control device 81, and the audio emission control device Each time the command 81 is received, information indicating that the set value is newly set and information indicating the set value at that time are cumulatively stored in the RAM of the sound emission control device 81. In this configuration, when a predetermined operation is performed, a configuration history of the setting values accumulated in the RAM of the sound emission control device 81 may be displayed on the symbol display device 41.

  (49) In the above embodiments, when the set value is newly set in the set value update process, the information indicating the number of game balls scheduled to be paid stored in the payout control device 77 is not deleted. However, instead of this, information indicating the number of the game balls to be paid out may be deleted. In addition, if the set value updating process is executed but the set value is not changed, the information indicating the number of game balls to be paid out is not deleted. The information indicating the number of game balls may be deleted.

  (50) In the above embodiments, when the set value updating process is executed but the set value is not changed, the areas 221 to 224 of the main RAM 65 are not cleared to “0”, and the set value is not changed. When changed, at least a part of each of the areas 221 to 224 of the main RAM 65 may be cleared to “0”. For example, when the set value is changed, an area other than the set value counter in the work area 221 for specific control may be cleared to “0”.

  (51) In the 22nd to 25th embodiments, even if the main CPU 63 executes the process for confirming the setting value in the process for confirming the setting (FIG. 87), the profit of the game is not reduced. The operation of the involved movable object may be continued. For example, a V zone and a non-V zone are provided in the ball entry means that can enter the ball in the opening / closing execution mode, and the game balls entered in the ball entry means are distributed to either the V zone or the non-V zone. In a configuration provided with the distribution member, the configuration may be such that the operation of the distribution member is continued even in a situation where a process for confirming the set value is being performed in the setting confirmation process. In this case, it is possible to improperly generate a situation in which the process for confirming the set value is executed in the process for confirming the setting to stop the operation of the distribution member. In addition, in addition to the above-mentioned sorting member, a movable object that has entered the ball-entering means is a movable object whose operation is continued even in a situation where a process for confirming the set value is executed in the process for setting confirmation. Either a game ball that is used to generate a round game after the game ball enters the ball, or a discharge ball that discharges a game ball that has entered the ball entry means without entering the ball. A sorting member that sorts the data is conceivable.

  (52) In the twenty-second to twenty-fifth embodiments, at least one of the non-specific control work area 223 and the non-specific control stack area 224 may be configured not to be an information abnormality monitoring target. In this case, even if it is specified that the information abnormality has occurred in the work area 221 for the specific control and the stack area 222 for the specific control, the work area 223 for the non-specific control and the stack area for the non-specific control are determined. By making the configuration that 224 is not cleared to “0”, a situation in which the non-specific control work area 223 and the non-specific control stack area 224 are cleared to “0” based on the occurrence of the information abnormality is prevented. It is possible to do.

  (53) In the above-mentioned twenty-second to twenty-fifth embodiments, there is an information abnormality in the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control. It is also possible to adopt a configuration in which monitoring of whether or not occurrence has occurred is all performed in a process corresponding to non-specific control. Further, a configuration may be adopted in which all processes for clearing each of the areas 221 to 224 to “0” when an information abnormality occurs are performed in processes corresponding to the non-specific control.

  (54) In each of the above embodiments, the main RAM 65 needs power supply to store and hold information, and backup power is supplied to the main RAM 65 even when the power of the pachinko machine 10 is OFF. However, the main RAM 65 may be a non-volatile memory that does not require power supply for storing and holding information.

  (55) In each of the above embodiments, in the various types of clear processing of the main RAM 65, the processing of clearing the target area of the main RAM 65 to “0” and the processing of initial setting are executed to initialize the target area. Alternatively, the target area may be initialized by executing a process of initial setting without executing a process of clearing “0”.

  (56) In each of the above embodiments, when the supply of the operating power to the main CPU 63 is started, when the setting key insertion unit 68a is turned ON, the setting value updating process is executed without requiring another operation. May be adopted. Further, instead of the setting key insertion section 68a that is turned ON / OFF by the setting key, a setting switch that is directly turned ON / OFF by hand may be provided. Further, when the setting key insertion section 68a is not provided and the reset button 68c is pressed when the supply of the operating power to the main CPU 63 is started, the setting value can be set without any other operation. The update processing may be performed. In this case, a cover member may be provided so as to be switchable between a closed state that covers the reset button 68c and an open state that does not cover the reset button 68c, and a locking device that locks the cover member in the closed position. May be provided.

  (57) Configuration in which the selected set value is fixed and the set value update process is terminated when the state in which the setting key insertion unit 68a has been operated to the OFF position in the set value update process is held for a predetermined period. It may be. Further, when an end reference period (for example, 5 minutes) has elapsed since the start of the set value update process, the selected set value may be automatically determined and the set value update process may be ended. When the update button 68b or the reset button 68c is pressed and held for more than the end reference period (for example, 10 seconds) in the setting value updating process, the setting value being selected is determined and the setting value updating process ends. It may be configured.

  (58) The setting key insertion section 68a can be rotated further than the ON position, and each time a rotation operation beyond the ON position is performed, the set value in the middle of updating is changed to the next set value. In the configuration where the setting key insertion section 68a is operated to the ON position, a setting confirmation process that enables the confirmation of the setting value is started when the supply of the operating power to the main CPU 63 is started. The setting confirmation process may be terminated when the setting key insertion section 68a is operated to the OFF position. In addition, when the supply of the operating power to the main CPU 63 is started in a state where the update button 68b or the reset button 68c is pressed, a setting confirmation process for enabling the setting value to be confirmed is started. The configuration for confirming the setting may be terminated when the pressing operation is released. Also, in a configuration in which a setting switch that is directly turned on and off by hand is provided instead of the setting key insertion portion 68a that is turned on and off by the setting key, the main operation is performed when the setting switch is turned on. When the supply of the operating power to the side CPU 63 is started, a setting check process for enabling the setting value to be started is started, and when the setting switch is turned OFF or turned ON after the OFF operation, The configuration for finishing the setting confirmation process may be adopted. Also, in a configuration in which a setting switch that is directly turned on and off by hand is provided instead of the setting key insertion portion 68a that is turned on and off by the setting key, the main operation is performed when the setting switch is turned on. When the supply of the operating power to the side CPU 63 is started, the setting check process for enabling the setting value to be started is started, and when the reset button 68c is pressed, the setting check process is ended. Is also good.

  (59) Instead of a configuration in which the display control device 82 is controlled by the audio light emission control device 81 based on a command transmitted from the main control device 60, display control is performed based on a command transmitted from the main control device 60. The device 82 may be configured to control the sound emission control device 81. Further, instead of the configuration in which the sound emission control device 81 and the display control device 82 are separately provided, a configuration in which both control devices are provided as one control device may be adopted. May be integrated in the main control device 60, and both functions of the two control devices may be integrated in the main control device 60. The configuration of the command transmitted from the main control device 60 to the audio light emission control device 81 and the configuration of the command transmitted from the audio light emission control device 81 to the display control device 82 are also arbitrary.

  (60) Other types of pachinko machines, such as pachinko machines, which are different from the above embodiments, such as a pachinko machine in which an electric accessory opens a predetermined number of times when a game ball enters a specific region of a special device, or a game ball in a specific region of a special device The present invention can also be applied to a pachinko machine that becomes a jackpot when a right enters and a gaming machine such as a pachinko machine equipped with another accessory, an arrangement ball machine, a sparrow ball and the like.

  In addition, a game machine that is not a ball-and-ball type, for example, includes a plurality of reels on which a plurality of types of symbols are provided in a circumferential direction, starts rotation of the reels by inserting a medal and operating a start lever, and a stop switch is operated. If a specific symbol or a combination of specific symbols has been established on the activated line visible from the display window after the reel has stopped after a predetermined time has elapsed, a bonus such as payout of medals is provided to the player. The present invention can be applied to a slot machine.

  Further, the game machine main body supported to be openable and closable on the outer frame includes a storage unit and a capture device, and the start lever is operated after a predetermined number of game balls stored in the storage unit are captured by the capture device. Accordingly, the present invention can be applied to a gaming machine in which a pachinko machine and a slot machine are integrated, in which the rotation of a reel is started.

  When the present invention is applied to a slot machine or a gaming machine in which a pachinko machine and a slot machine are combined, for example, the result of a lottery process of a role executed when one game is started based on an operation of a start lever is recorded as history information. It may be configured to calculate the actual winning probability of each role using the history information, and when a transition to a special game state such as a bonus game occurs, it is stored as history information, and the history is stored. The information may be used to calculate the actual transition probability to the special game state, or the ratio of the number of staying games in the special game state to the total number of consumed games may be calculated. The history information and various parameters may be readable by an external device, or a notification corresponding to the calculation results of the various parameters may be performed by the gaming machine itself. In addition, a configuration in which a plurality of stages of setting states exist, such as “Setting 1” to “Setting 6”, and a configuration in which the winning probability in the lottery process of winning combinations may be changed according to the setting state. In this case, the configuration in each of the above embodiments may be applied to handling of history information, calculation of various parameters, and handling of repeated changes when the setting of the setting state is newly set or when the setting value is changed. .

  (61) The characteristic configurations of the first to thirty-fourth embodiments may be mutually applied in any combination. For example, the characteristic configuration of the first embodiment, the characteristic configuration of the sixth embodiment, the characteristic configuration of the tenth embodiment, and the characteristic configuration of the thirtieth embodiment. The features may be combined, and the features of the second embodiment, the features of the fourth embodiment, the features of the eighth embodiment, and the features of the eleventh embodiment may be combined. The characteristic configuration of the third embodiment may be combined with the characteristic configuration of the thirty-third embodiment. The characteristic configuration of the first embodiment and the characteristic configuration of the fifteenth embodiment may be combined. , The characteristic configuration of the twenty-first embodiment, the characteristic configuration of the twenty-ninth embodiment, and the characteristic configuration of the thirty-fourth embodiment may be combined. The characteristic configuration of the second embodiment, the characteristic configuration of the sixteenth embodiment, and the twenty-second embodiment Characteristic configuration of the may be combined. In addition, a configuration in which the characteristic configurations of the above-described first to thirty-fourth embodiments are applied in a predetermined combination may be applied in any combination of the configurations in the above-described other embodiments.

<About the invention group extracted from each of the above embodiments>
Hereinafter, features of the invention group extracted from each of the above-described embodiments will be described while showing effects and the like as necessary. In the following, for ease of understanding, the corresponding configuration in each of the above embodiments is appropriately shown in parentheses or the like, but is not limited to the specific configuration shown in parentheses or the like.

<Characteristic A group>
Feature A1. Setting means (a function of executing a setting value updating process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage;
History storage executing means (a function of executing a history setting process in the management-side CPU 112) for storing history information of a game corresponding to the predetermined event in the history storage means (history memory 117) when a predetermined event occurs by execution of the game )When,
Information erasing means for erasing at least a part of the history information stored in the history storage means, with at least one condition that setting of the setting value to be used by the setting means is performed (third condition) In the fifth embodiment, the function of executing the processing of step S1809 in the management CPU 112, in the fifth embodiment, the function of executing the processing of step S2109 in the management CPU 112, and in the sixth embodiment, steps S2306 to S2306 of the management CPU 112 A function of executing the processing of S2308, a function of executing the processing of step S2608 in the management-side CPU 112 in the eighth embodiment),
A gaming machine comprising:

  According to the feature A1, since a setting value to be used is set from a plurality of setting values corresponding to the player's advantage, the player can use a more advantageous setting value. That you expect. When a predetermined event occurs, history information corresponding to the event is stored in the history storage unit. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification.

  In this case, at least a part of the history information stored in the history storage unit is erased under at least one condition that the setting of the set value to be used is newly performed. This makes it possible to adjust the contents of the history storage means so that the frequency of occurrence of the predetermined event in the situation after the new setting of the setting value to be used can be appropriately managed. .

Feature A2. Ball entry means (first operation port 33, second operation port 34) into which game balls flowing down the game area can enter;
An information acquisition unit (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on a game ball having entered the ball entry unit;
An addition determining unit (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the additional information;
Privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the result of the provision that the special information corresponds to the provision information in the provision determination. S409 to a function of executing the processing of step S412).
The gaming machine according to Feature A1, wherein the probability of the provision of the provision result in the provision determination varies according to the set value.

  According to the feature A2, in a so-called pachinko machine, it is possible to change the probability of the provision result in accordance with the set value. In this case, by providing the configuration of the above-described feature A1, the history storage unit is configured to appropriately manage the frequency of occurrence of the predetermined event in the situation after the probability of the provision result is changed. The content can be adjusted.

  Feature A3. The information erasing unit may erase all of the history information stored in the history storage unit on at least one condition that the setting of the setting value to be used by the setting unit is performed. A gaming machine according to feature A1 or A2.

  According to the feature A3, all the history information stored in the history storage unit is deleted when the setting of the setting value to be used is newly performed, so that the setting of the setting value to be used is set. Can specify the frequency of occurrence of the predetermined event based on the newly performed timing.

  Feature A4. The information erasing unit, as at least one condition that the setting of the setting value to be used by the setting unit has been performed, erases part of the history information stored in the history storage unit, The gaming machine according to feature A1 or A2, wherein a part of the history information stored in the history storage unit is left.

  According to the feature A4, when a setting value to be used is newly set, history information unnecessary for management of the frequency of occurrence of the subsequent predetermined event is deleted, and management of the frequency of occurrence of the subsequent predetermined event is performed. Necessary history information can be left. This makes it possible to appropriately manage the frequency of occurrence of the predetermined event after the setting of the setting value to be used is newly performed.

Feature A5. The history information stored in the history storage means includes first history information (history indicating that the open / close execution mode has occurred, in which the occurrence probability of the predetermined event corresponding to the history information varies according to the set value. Information) and second history information (history information indicating that a game ball has been ejected from the game area PA) which does not change in accordance with the set value,
The information erasing unit erases the first history information stored in the history storage unit as at least one condition that the setting of the setting value to be used by the setting unit is performed, The gaming machine according to Feature A4, wherein the second history information stored in history storage means is left.

  According to the feature A5, when the setting value to be used is newly set, the first history information corresponding to the predetermined event whose occurrence probability varies according to the setting value is deleted, and the occurrence probability is changed to the setting value. The second history information corresponding to the predetermined event that does not fluctuate according to is not deleted. Accordingly, when the first history information before the setting of the setting value to be used is newly performed is taken over after the setting of the setting value is newly performed, occurrence of a predetermined event corresponding to the first history information is generated. The first history information that is not preferable in specifying the frequency can be deleted when the setting of the set value is newly performed. On the other hand, the second history information is referred to when specifying the frequency of occurrence of a predetermined event corresponding to the second history information by not deleting the second history information even if a setting value to be used is newly set. Since it is possible to secure a large number of pieces of the second history information, it is possible to accurately specify the frequency of occurrence of the predetermined event corresponding to the second history information.

Feature A6. Ball entry means (first operation port 33, second operation port 34) into which game balls flowing down the game area can enter;
An information acquisition unit (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on a game ball having entered the ball entry unit;
An addition determining unit (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the additional information;
Privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the result of the provision that the special information corresponds to the provision information in the provision determination. S409 to a function of executing the processing of step S412).
It is a configuration in which the probability of the assignment corresponding result in the assignment determination varies according to the set value,
The first history information includes information corresponding to the award of the privilege,
The gaming machine according to Feature A5, wherein the second history information includes information corresponding to ejection of a game ball from the game area in a predetermined manner.

  According to the feature A6, since the provision probability of the privilege changes according to the setting value, the first history information is deleted when the setting value to be used is newly set. Thus, it is possible to specify the frequency of granting the privilege under the situation of the newly set setting value. On the other hand, the frequency at which game balls are ejected from the game area does not fluctuate in accordance with the set value, so that the second history information is not deleted even if a set value to be used is newly set, It is possible to accurately specify the frequency at which game balls are discharged from the game area in a predetermined manner.

  Feature A7. The information erasing unit is configured to set at least the set value to be used by the setting unit, and to store at least a predetermined amount of the history information in the history storage unit when the history information is stored in the history storage unit. The gaming machine according to any one of features A1 to A6, wherein a part of the gaming machine is deleted.

  According to the feature A7, when a predetermined amount of history information is not stored in the history storage unit in a predetermined amount or more, the history information is not deleted even if a new setting of a setting value to be used is performed. As a result, even if a new setting of the set value is repeated in a situation where the game is not performed, it is possible to prevent the deletion of the history information in the history storage unit from being repeated.

  Feature A8. At least one condition that the setting of the setting value to be used by the setting unit has been performed is used as a condition to respond to a game result in a predetermined period by using the history information stored in the history storage unit. Information deriving means for deriving aspect information to be performed (the function of executing the processing of step S1807 in the management-side CPU 112 in the third embodiment, and the function of executing the processing of step S2107 in the management-side CPU 112 in the fifth embodiment). The gaming machine according to any one of features A1 to A7, wherein:

  According to the feature A8, at least a part of the history information stored in the history storage unit under the condition that a new setting of a setting value to be used is performed is provided as at least one condition having the configuration of the above-described feature A1. In the configuration to be deleted, a mode corresponding to a result of a game in a predetermined period using history information stored in the history storage unit when a new setting of a setting value to be used is performed as an opportunity Information is derived. As a result, even if at least a part of the history information is deleted when the set value is changed, the management result of the game history such as the frequency of occurrence of the predetermined event in the situation before the set value is changed can be grasped. It is possible to do.

  Feature A9. The gaming machine according to Feature A8, further comprising aspect information storage means (separate storage memory 171) for storing the aspect information derived by the information derivation means.

  According to the feature A9, the mode information corresponding to the result of the game in the predetermined period is utilized by using the history information stored in the history storage unit when the setting value to be used is newly set. Is derived, the aspect information is stored in the aspect information storage means. Thereby, even if the set value is changed, it is possible to grasp the management result of the game history in a situation before the set value is changed at an arbitrary timing thereafter.

  Feature A10. The gaming machine according to Feature A9, wherein the aspect information storage means is capable of storing a plurality of the aspect information.

  According to the feature A10, since a plurality of aspect information can be stored in the aspect information storage unit, the management result of the game history in a plurality of periods is grasped based on the timing at which a new setting of the setting value is performed. It is possible to do. Further, even if a new setting of the setting value is repeated in a situation where the game is not performed, the aspect information derived using the history information of the situation where the game is substantially played is stored in the aspect information storage unit. It is possible to increase the possibility that the information remains.

Feature A11. The aspect information storage means can store a predetermined number of the aspect information,
This gaming machine is means for executing a special process when the setting of the set value to be used by the setting means has occurred more than the predetermined number under predetermined conditions (in the third embodiment, the management CPU 112 The gaming machine according to feature A9 or A10, further comprising a function of executing a repetitive change monitoring process (in the fourth embodiment, a function of executing a repetitive change monitoring process in the main CPU 63).

  According to the feature A11, the setting value is set in a situation where the game is not performed so that the aspect information derived using the history information of the situation where the game is substantially played is not left in the aspect information storage means. If the new setting is repeated, special processing is executed for it. Thereby, it is possible to cope with the act.

  Feature A12. The gaming machine according to any one of features A8 to A11, wherein the information deriving unit derives the mode information when a predetermined amount or more of the history information is stored in the history storage unit. .

  According to the feature A12, the mode information is derived when the predetermined history information is stored in the history storage unit in a predetermined amount or more. Therefore, it is possible to prevent the mode information from being unnecessarily derived. .

  Feature A13. The information erasing unit erases the history information from when the setting value to be used by the setting unit is set to when the predetermined history information is stored in the history storage unit in a predetermined amount or more. Without setting the set value to be used by the setting unit, and before setting the set value when the predetermined history information is stored in the history storage unit in a predetermined amount or more after the setting value is set. The gaming machine according to any one of features A1 to A12, wherein the history information stored in the history storage unit is deleted.

  According to the feature A13, until a specific amount of predetermined history information is newly stored in the history storage unit, even if a new setting of a setting value to be used is performed, the setting value is stored before the setting is performed. The history information that has been deleted is not deleted. Thereby, even if a new setting of the set value is performed, it is possible to specify the management result of the game history in a predetermined period.

Feature A14. The history storage unit includes a first history storage unit (first history memory 191) and a second history storage unit (second history memory 192),
The history storage execution means,
When the predetermined event occurs during a predetermined period from when the setting value to be used by the setting unit is set to when the release condition is satisfied, the history information corresponding to the predetermined event is stored in the first history storage unit. Means for storing in both of the second history storage means (the function of executing the processing of step S2604 in the management-side CPU 112);
Means for storing the history information corresponding to the first history storage means and the second history storage means which are set as storage targets when the predetermined event occurs during a period other than the predetermined period. (The function of executing the process of step S2603 in the management-side CPU 112);
With
The information erasing unit, when the release condition is satisfied, erases the history information stored on the side of the first history storage unit and the second history storage unit which has been set as the storage object up to then. The gaming machine according to any one of features A1 to A13.

  According to the feature A14, until a specific amount of history information is newly stored in the history storage unit, even if a new setting of a setting value to be used is performed, it is stored before the setting is performed. History information is not deleted. Thereby, even if a new setting of the set value is performed, it is possible to specify the management result of the game history in a predetermined period. In addition, it is possible to produce the effect only by appropriately changing the history storage unit for storing the history information between the first history storage unit and the second history storage unit.

  Feature A15. Using the history information stored on the side of the first history storage unit and the second history storage unit that is set as the storage target, derive mode information corresponding to a game result in a predetermined period using the history information The gaming machine according to feature A14, further comprising an information deriving unit (a function of executing the process of step S2703 in the management-side CPU 112).

  According to the feature A15, even when the history information is stored in both the first history storage unit and the second history storage unit by performing the new setting of the setting value, the mode using the history information is used. Information can be appropriately derived.

  In addition, with respect to the configuration of the features A1 to A15, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more configurations of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Characteristic B group>
Feature B1. Setting means (a function of executing a setting value updating process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage;
History storage executing means (a function of executing a history setting process in the management-side CPU 112) for storing history information of a game corresponding to the predetermined event in the history storage means (history memory 117) when a predetermined event occurs by execution of the game )When,
With
Before the setting of the setting value to be used by the setting means is performed, the predetermined history information stored in the history storage means is set to the setting value to be used by the setting means. A gaming machine characterized by being stored in the history storage means even after the game is completed.

  According to the feature B1, since a setting value to be used is set from a plurality of setting values corresponding to the player's advantage, the player can use a more advantageous setting value. That you expect. When a predetermined event occurs, history information corresponding to the event is stored in the history storage unit. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification.

  In this case, even if the setting value to be used is newly set, the history information stored in the history storage unit is stored and not erased. As a result, even if the setting value to be used is set, the history information up to that time can be continuously stored in the history storage unit, and accumulated in the history storage unit over a long period of time. It is possible to specify the management result of the game history using the history information obtained.

  Feature B2. When the setting unit sets the setting value to be used, the history storage executing unit stores the history information corresponding to the setting value in the history storing unit. The game according to Feature B1, wherein the management-side CPU 112 has a function of executing the processing of Step S1307 in the management-side CPU 112, and the management-side CPU 112 has a function of executing the processing of Step S2408 in the management-side CPU 112). Machine.

  According to the feature B2, the setting of the setting value to be used is newly performed in the configuration in which the history information is stored and held without being erased even if the setting of the setting value to be used is newly set. History information corresponding to this is stored in the history storage means. This makes it possible to distinguish between the history information before the setting of the setting value to be used is newly performed and the history information after the setting is performed.

  Feature B3. The setting execution storage means stores the information corresponding to the set value in the history storage means as the history information when the setting value of the setting object to be used is set by the setting means. The gaming machine according to Feature B2, wherein:

  According to the feature B3, it is possible to specify the content of the set value set in the past by referring to the history information.

  Feature B4. The history storage means includes a plurality of correspondence history storage means (history memories 181 to 186 for settings 1 to 6) corresponding to a plurality of types of set values which can be set by the setting means. The gaming machine according to any one of features B1 to B3.

  According to the feature B4, since the correspondence history storage means is provided corresponding to each set value, it is possible to store the history information separately for each set value.

  Feature B5. When the setting value to be used by the setting unit is set by the setting unit, the corresponding history storage unit corresponding to the set value to which the setting is performed is set as a storage target of the history information thereafter (management side The gaming machine according to Feature B4, further including a function of executing the process of Step S2406 in the CPU 112).

  According to the feature B5, when a setting value to be used is newly set, the corresponding history storage means corresponding to the setting value is set as a storage target of subsequent history information. It is possible to store the history information separately.

  Feature B6. An information deriving unit that derives mode information corresponding to a result of a game in a predetermined period by using the history information stored in the corresponding history storage unit to be stored (display output processing in the management CPU 112) The gaming machine according to feature B5, further comprising:

  According to the feature B6, in the configuration in which the history information is stored separately for each set value, it is possible to derive the mode information corresponding to the currently set set value.

Feature B7. Ball entry means (first operation port 33, second operation port 34) into which game balls flowing down the game area can enter;
An information acquisition unit (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on a game ball having entered the ball entry unit;
An addition determining unit (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the additional information;
Privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the result of the provision that the special information corresponds to the provision information in the provision determination. S409 to a function of executing the processing of step S412).
The gaming machine according to any one of features B1 to B6, wherein a probability of the provision of the provision result in the provision determination varies according to the set value.

  According to the feature B7, in a so-called pachinko machine, it is possible to change the probability of the result of the provision of the response corresponding to the set value.

  In addition, with respect to the configuration of the features B1 to B7, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more configurations of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Characteristic C group>
Feature C1. Setting means (a function of executing a setting value updating process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage;
History storage executing means (a function of executing a history setting process in the management-side CPU 112) for storing history information of a game corresponding to the predetermined event in the history storage means (history memory 117) when a predetermined event occurs by execution of the game )When,
After setting the setting value to be used by the setting unit, the setting unit does not delete the history information until at least a predetermined amount of the history information is stored in the history storage unit. (A function of executing the processing of step S2506 and steps S2605 to S2609 in the management-side CPU 112);
A gaming machine comprising:

  According to the feature C1, since the setting value to be used is set from the setting values in a plurality of stages corresponding to the player's advantage, the player can use the more advantageous setting value. That you expect. When a predetermined event occurs, history information corresponding to the event is stored in the history storage unit. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification.

  In this case, until a specific amount of predetermined history information is newly stored in the history storage unit, even if a new setting of a setting value to be used is performed, the setting value is stored before the setting is performed. History information is not deleted. Thereby, even if a new setting of the set value is performed, it is possible to specify the management result of the game history in a predetermined period.

  Feature C2. The post-setting correspondence unit is configured to set the set value when the predetermined amount of the history information is stored in the history storage unit after the setting of the set value to be used by the setting unit is performed in a predetermined amount or more. The gaming machine according to Feature C1, wherein the history information stored in the history storage unit is erased before the execution of the game.

  According to the feature C2, when a specific amount of history information that allows the management result of the game history to be specified for a predetermined period after the setting value is newly set is stored in the history storage unit. Deletes the history information stored in the history storage unit before the new setting of the setting value is performed. This makes it possible to prevent unnecessary history information from being continuously stored in the history storage unit.

Feature C3. The history storage unit includes a first history storage unit (first history memory 191) and a second history storage unit (second history memory 192),
The history storage execution means,
When the predetermined event has occurred, means for storing the history information corresponding to the one of the first history storage means and the second history storage means which is set as a storage object (step S2603 in the management CPU 112). Function to execute the process), and
After the setting of the set value to be used by the setting unit is performed, the predetermined history information is set on the side of the first history storage unit and the second history storage unit that is not set as the storage target. Means for storing the history information corresponding to the occurrence of the predetermined event in both the first history storage means and the second history storage means until the predetermined amount has been stored (the management-side CPU 112) Function for executing the process of step S2604 in
With
The post-setting response means includes:
After the setting of the setting value to be used by the setting unit is performed, the predetermined history information is stored on a side of the first history storage unit and the second history storage unit that is not set as the storage target. Means for changing the storage object between the first history storage means and the second history storage means when the predetermined amount or more is stored (a function of executing the process of step S2607 in the management-side CPU 112);
After the setting of the setting value to be used by the setting unit is performed, the predetermined history information is stored on a side of the first history storage unit and the second history storage unit that is not set as the storage target. When the specified amount or more is stored, the history information on the side of the first history storage unit and the second history storage unit which has been set as the storage object up to that point is deleted (step S2608 in the management CPU 112). Function to execute the process), and
The gaming machine according to feature C1 or C2, comprising:

  According to the feature C3, until a specific amount of history information is newly stored in the history storage means, even if a new setting of a setting value to be used is performed, the setting value is stored before the setting is performed. History information is not deleted. Thereby, even if a new setting of the set value is performed, it is possible to specify the management result of the game history in a predetermined period. In addition, it is possible to produce the effect only by appropriately changing the history storage unit for storing the history information between the first history storage unit and the second history storage unit.

  Feature C4. Using the history information stored on the side of the first history storage unit and the second history storage unit that is set as the storage target, mode information corresponding to a game result in a predetermined period is derived using the history information. The gaming machine according to feature C3, further comprising an information deriving unit (a function of executing the process of step S2703 in the management-side CPU 112).

  According to the feature C4, even when the history information is stored in both the first history storage unit and the second history storage unit by performing the new setting of the setting value, the mode using the history information is used. Information can be appropriately derived.

Feature C5. Ball entry means (first operation port 33, second operation port 34) into which game balls flowing down the game area can enter;
An information acquisition unit (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on a game ball having entered the ball entry unit;
An addition determining unit (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the additional information;
Privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the result of the provision that the special information corresponds to the provision information in the provision determination. S409 to a function of executing the processing of step S412).
The gaming machine according to any one of features C1 to C4, wherein the probability of the provision of the provision result in the provision determination varies according to the set value.

  According to the feature C5, in a so-called pachinko machine, it is possible to change the probability of the provision result in accordance with the set value.

  In addition, with respect to the configuration of the features C1 to C5, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Feature D group>
Feature D1. Setting means (a function of executing a setting value updating process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage;
Special execution means for executing a special process on the condition that the setting of the setting value to be used by the setting means has been executed in a special situation (at least one condition). A function of executing a process, a function of executing a monitoring process for repeated changes in the main CPU 63 in the fourth embodiment, and a function of making a negative determination in step S2106 in the management CPU 112 in the fifth embodiment).
A gaming machine comprising:

  According to the feature D1, since a setting value to be used is set from a plurality of setting values corresponding to the player's advantage, the player can use a more advantageous setting value. That you expect. In this case, the special processing is executed on the condition that the new setting of the setting value to be used is executed in the special situation at least as one condition. This makes it possible to cope with a case where a new setting value is set in an unfavorable situation.

  Feature D2. The special processing unit executes the special processing under at least one condition that the setting of the setting value to be used by the setting unit has been performed a specific number of times or more in the special situation. A gaming machine according to claim 1.

  According to the feature D2, even if a new setting of a setting value to be used in a special situation is executed, if the number of times of execution is less than a specific number, no special processing is executed. This makes it possible to prevent the special process from being executed until the regular operator has executed a new setting of the set value less than the specified number of times in the special situation.

  Feature D3. The special execution means may include, as the special situation, a situation in which a game has not been performed since the setting of the setting value to be used by the setting means is performed or a setting of the setting value to be used by the setting means. Performing the special processing on at least one condition that the setting of the setting value to be used by the setting unit has been performed in a situation in which a game equal to or more than a predetermined reference has not been performed since the game was performed. The gaming machine according to Feature D1 or D2.

  According to the feature D3, when a new setting of a setting value to be used is performed in a situation where a game is not performed or a situation where a game is not substantially performed, a special process is performed. When the act is performed, it is possible to deal with it.

  Feature D4. The gaming machine according to any one of features D1 to D3, wherein the special execution unit executes a notification process as the special process.

  According to the feature D4, the notification process is executed on the condition that a new setting of a setting value to be used has been executed in a special situation, as at least one condition. This makes it possible to prompt the user to deal with a case where a new setting value is set in an unfavorable situation.

Feature D5. History storage executing means (a function of executing a history setting process in the management-side CPU 112) for storing history information of a game corresponding to the predetermined event in the history storage means (history memory 117) when a predetermined event occurs by execution of the game )When,
At least one condition that the setting of the setting value to be used by the setting unit has been performed is used as a condition for using the history information stored in the history storage unit to correspond to a game result in a predetermined period. Information deriving means (in the third embodiment, a function of executing the processing of step S1807 in the management-side CPU 112, and in the fifth embodiment, a function of executing the processing of step S2107 in the management-side CPU 112);
The gaming machine according to any one of features D1 to D4, comprising:

  According to the feature D5, when a predetermined event has occurred, history information corresponding to the event is stored in the history storage unit. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification.

  In this case, when the new setting of the setting value to be used is performed, using the history information stored in the history storage unit, the mode information corresponding to the game result in the predetermined period is used. Derived. Thereby, it is possible to grasp the management result of the game history such as the frequency of occurrence of the predetermined event in the situation before the setting value is changed.

  Feature D6. Deriving the aspect information by the information deriving means as the special processing, as at least one condition that the setting of the setting value to be used by the setting means has been executed in the special situation; The gaming machine according to feature D5, wherein the game machine does not perform the game.

  According to the feature D6, even when a new setting of a setting value to be used is performed, if the setting is performed in an unfavorable situation, the mode information is not derived. This makes it possible to prevent the mode information from being unnecessarily derived.

  Feature D7. The gaming machine according to Feature D5 or D6, further comprising aspect information storage means (separate storage memory 171) for storing the aspect information derived by the information derivation means.

  According to the feature D7, the mode information corresponding to the result of the game in the predetermined period using the history information stored in the history storage unit when the new setting of the setting value to be used is performed as an opportunity Is derived, the aspect information is stored in the aspect information storage means. Thereby, even if the set value is changed, it is possible to grasp the management result of the game history in a situation before the set value is changed at an arbitrary timing thereafter.

  Feature D8. The gaming machine according to Feature D7, wherein the aspect information storage means is capable of storing a plurality of the aspect information.

  According to the feature D8, since a plurality of aspect information can be stored in the aspect information storage means, the management result of the game history in a plurality of periods is grasped based on the timing at which a new setting of the setting value is performed. It is possible to do. Further, even if a new setting of the setting value is repeated in a situation where the game is not performed, the aspect information derived using the history information of the situation where the game is substantially played is stored in the aspect information storage unit. It is possible to increase the possibility that the information remains.

Feature D9. The aspect information storage means can store a predetermined number of the aspect information,
The special execution unit executes the special process when the setting of the setting value to be used by the setting unit occurs more than the predetermined number in the special situation. Or the gaming machine according to D8.

  According to the feature D9, the setting value is set in a situation where the game is not performed so that the aspect information derived using the history information of the situation where the game is substantially played is not left in the aspect information storage means. If the new setting is repeated, special processing is executed for it. Thereby, it is possible to cope with the act.

Feature D10. Ball entry means (first operation port 33, second operation port 34) into which game balls flowing down the game area can enter;
An information acquisition unit (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on a game ball having entered the ball entry unit;
An addition determining unit (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the additional information;
Privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the result of the provision that the special information corresponds to the provision information in the provision determination. S409 to a function of executing the processing of step S412).
The gaming machine according to any one of features D1 to D9, wherein the probability of the provision of the provision result in the provision determination varies according to the set value.

  According to the feature D10, in a so-called pachinko machine, it is possible to change the probability of the provision result in accordance with the set value.

  In addition, with respect to the configuration of the features D1 to D10, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Feature E group>
Feature E1. Setting means (a function of executing a setting value updating process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage;
History storage executing means (a function of executing a history setting process in the management-side CPU 112) for storing history information of a game corresponding to the predetermined event in the history storage means (history memory 117) when a predetermined event occurs by execution of the game )When,
At least one condition that the setting of the setting value to be used by the setting unit has been performed is used as a condition for using the history information stored in the history storage unit to correspond to a game result in a predetermined period. Information deriving means (in the third embodiment, a function of executing the processing of step S1807 in the management-side CPU 112, and in the fifth embodiment, a function of executing the processing of step S2107 in the management-side CPU 112);
A gaming machine comprising:

  According to the feature E1, since a setting value to be used is set from a plurality of setting values corresponding to the player's advantage, the player can use a more advantageous setting value. That you expect. When a predetermined event occurs, history information corresponding to the event is stored in the history storage unit. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification.

  In this case, when the new setting of the setting value to be used is performed, using the history information stored in the history storage unit, the mode information corresponding to the game result in the predetermined period is used. Derived. Thereby, it is possible to grasp the management result of the game history such as the frequency of occurrence of the predetermined event in the situation before the setting value is changed.

  Feature E2. The gaming machine according to Feature E1, further comprising aspect information storage means (separate storage memory 171) for storing the aspect information derived by the information derivation means.

  According to the feature E2, the mode information corresponding to the result of the game in the predetermined period using the history information stored in the history storage unit when the setting value to be used is newly set as an opportunity Is derived, the aspect information is stored in the aspect information storage means. Thereby, even if the set value is changed, it is possible to grasp the management result of the game history in a situation before the set value is changed at an arbitrary timing thereafter.

  Feature E3. The gaming machine according to Feature E2, wherein the aspect information storage means is capable of storing a plurality of the aspect information.

  According to the feature E3, since a plurality of aspect information can be stored in the aspect information storage means, the management result of the game history in a plurality of periods is grasped based on the timing at which a new setting of a setting value is performed. It is possible to do. Further, even if a new setting of the setting value is repeated in a situation where the game is not performed, the aspect information derived using the history information of the situation where the game is substantially played is stored in the aspect information storage unit. It is possible to increase the possibility that the information remains.

Feature E4. The aspect information storage means can store a predetermined number of the aspect information,
This gaming machine is means for executing a special process when the setting of the set value to be used by the setting means has occurred more than the predetermined number under predetermined conditions (in the third embodiment, the management CPU 112 The gaming machine according to feature E2 or E3, further comprising a function of executing a repetitive change monitoring process (in the fourth embodiment, a function of executing a repetitive change monitoring process in the main CPU 63).

  According to the feature E4, the setting value is set in a situation where the game is not performed so that the aspect information derived using the history information of the situation where the game is substantially played does not remain in the aspect information storage means. If the new setting is repeated, special processing is executed for it. Thereby, it is possible to cope with the act.

  Feature E5. The gaming machine according to any one of features E1 to E4, wherein the information deriving unit derives the aspect information when a predetermined amount or more of the history information is stored in the history storage unit. .

  According to the feature E5, since the mode information is derived when the predetermined amount of the predetermined history information is stored in the history storage unit, it is possible to prevent the mode information from being unnecessarily derived. Become.

Feature E6. Ball entry means (first operation port 33, second operation port 34) into which game balls flowing down the game area can enter;
An information acquisition unit (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on a game ball having entered the ball entry unit;
An addition determining unit (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the additional information;
Privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the result of the provision that the special information corresponds to the provision information in the provision determination. S409 to a function of executing the processing of step S412).
The gaming machine according to any one of features E1 to E5, wherein the probability of the provision of the provision result in the provision determination varies according to the set value.

  According to the feature E6, in a so-called pachinko machine, it is possible to change the probability of the result of the provision of the response in accordance with the set value.

  In addition, with respect to the configuration of the features E1 to E6, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

  According to the invention relating to the feature A group, the feature B group, the feature C group, the feature D group, and the feature E group, the following problems can be solved.

  Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front of the game machine, and the game balls stored in the dish storage section are guided to a game ball launching device. The game is fired toward the game area in accordance with the shooting operation of the player. Then, for example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the dish storage unit, for example. In a pachinko gaming machine, a configuration having an upper dish storage section and a lower dish storage section as dish storage sections is also known. In this case, game balls stored in the upper dish storage section are used to launch game balls. The game balls guided by the device and surplus in the upper dish storage section are discharged to the lower dish storage section.

  Further, in the slot machine, when a new game is started by operating the start lever while a medal is bet, a lottery process is executed by the control means. Further, when the lottery process is executed, the rotation of the reel is started by the rotation start control being executed by the control means, and when the stop button is operated during the rotation of the reel, the control means executes the rotation start control. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the rotation stop of the reels corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

  Here, in the gaming machines such as those described above, it is necessary to appropriately manage the gaming machines, and there is still room for improvement in this regard.

<Characteristic F group>
Feature F1. Ball entry means (first operation port 33, second operation port 34) into which game balls flowing down the game area can enter;
An information acquisition unit (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on a game ball having entered the ball entry unit;
An addition determining unit (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the additional information;
Privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the result of the provision that the special information corresponds to the provision information in the provision determination. A function of executing the processing from S409 to step S412);
Setting means (a function of executing a setting value updating process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage;
With
The assignment determining unit has a high-probability mode and a low-probability mode so that the probability of the assignment correspondence result is relatively high and low, as the mode of the assignment determination.
A gaming machine, wherein the probability of the provision of the provision result in at least the low probability mode varies according to the set value.

  According to the feature F1, it is possible to change the probability of being the provision result in at least the low probability mode according to the set value in the so-called pachinko machine. As a result, even in the case of a single gaming machine, it is possible to generate a situation in which the probability of the provision result in the low probability mode is advantageous or disadvantageous. Therefore, it is possible to improve the interest of the game.

  Feature F2. The gaming machine according to Feature F1, wherein the probability of the provision of the provision result in the high probability mode does not change according to the set value.

  According to the feature F2, the probability of the provision result in the low probability mode is varied according to the set value, while the probability of the provision result in the high probability mode is not varied according to the set value. By doing so, it is possible to limit the influence of the set value to the situation in the low probability mode.

Feature F3. There are multiple types of the benefits,
The gaming machine according to Feature F1 or F2, wherein the selection mode of the privilege does not change according to the set value.

  According to the feature F3, the effect of the setting value is changed by changing the probability of the provision result in the low probability mode according to the setting value, while not changing the selection mode of the privilege according to the setting value. Can be restricted to situations in the low probability mode.

  In addition, with respect to the configuration of the features F1 to F3, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

  According to the invention relating to the feature F group, the following problem can be solved.

  Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front of the game machine, and the game balls stored in the dish storage section are guided to a game ball launching device. The game is fired toward the game area in accordance with the shooting operation of the player. Then, for example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the dish storage unit, for example. In a pachinko gaming machine, a configuration having an upper dish storage section and a lower dish storage section as dish storage sections is also known. In this case, game balls stored in the upper dish storage section are used to launch game balls. The game balls guided by the device and surplus in the upper dish storage section are discharged to the lower dish storage section.

  Further, in the slot machine, when a new game is started by operating the start lever while a medal is bet, a lottery process is executed by the control means. Further, when the lottery process is executed, the rotation of the reel is started by the rotation start control being executed by the control means, and when the stop button is operated during the rotation of the reel, the control means executes the rotation start control. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the rotation stop of the reels corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

  Here, in the gaming machines as exemplified above, it is necessary to improve the interest of the game, and there is still room for improvement in this respect.

<Characteristic G group>
Feature G1. History storage executing means (a function of executing a history setting process in the management-side CPU 112) for storing history information of a game corresponding to the predetermined event in the history storage means (history memory 117) when a predetermined event occurs by execution of the game )When,
An information deriving unit that derives mode information corresponding to a result of a game in a predetermined period by using the history information stored in the history storage unit (in the first embodiment, steps S1402 to S1412 in the management CPU 112) Function of executing the processing of step S1807 in the management-side CPU 112 in the third embodiment, and the function of executing the processing of step S2107 in the management-side CPU 112 in the fifth embodiment).
The information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the 11th to the In the fourteenth embodiment, a first information display control unit (a function of executing a display process in the management-side CPU 112) that controls display of the first to fourth notification display devices 201 to 204);
Second information display control means for controlling the display of the information display means so that a display corresponding to different information different from the aspect information is performed (in the first to tenth embodiments, steps S202 and S208 in the main CPU 63). Function in the eleventh embodiment, the function of executing steps S3101, S3103, and S3109 in the main CPU 63 in the eleventh embodiment, and the steps S3201, S3202, and S3204 in the main CPU 63 in the twelfth embodiment. And the function of executing the processing of step S3210, in the thirteenth embodiment, the function of executing the abnormality display processing in the main CPU 63),
A gaming machine comprising:

  According to the feature G1, when a predetermined event occurs, history information corresponding to the event is stored in the history storage unit. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, mode information corresponding to the result of the game in a predetermined period is derived using the history information stored in the history storage unit. Then, a display corresponding to the aspect information is performed by the information display means. Thereby, it is possible to grasp the management result of the game history such as the frequency of occurrence of the predetermined event. Further, in the information display means, not only a display corresponding to the mode information but also a display corresponding to another information is performed. This makes it possible to effectively use the information display means.

  Feature G2. The feature G1 is characterized in that a period during which display corresponding to the aspect information is performed on the information display unit and a period during which display corresponding to the different information is performed on the information display unit are distinguished. Gaming machine.

  According to the feature G2, by grasping the state of the display on the information display means, which of the display corresponding to the aspect information and the display corresponding to the different information is performed on the information display means is determined. Can be specified.

  Feature G3. The second information display control means controls the display of the information display means so as to have a display mode different from a display mode in a case where a display corresponding to the mode information is performed, so that a display corresponding to the different information is displayed. The gaming machine according to feature G1 or G2, wherein the gaming machine is operated.

  According to the feature G3, by grasping the display mode of the information display unit, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the different information is being performed on the information display unit. It becomes possible.

  Feature G4. As the information display means, individual information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to fourteenth display units) capable of performing a plurality of types of display. The gaming machine according to any one of features G1 to G3, wherein the gaming machine includes a plurality of first to fourth notification display devices 201 to 204).

  According to the feature G4, various types of aspect information can be displayed by performing display corresponding to the aspect information using a plurality of individual information display units. Further, the presence of the plurality of individual information display means makes it possible to greatly differ the display mode between the case where the display corresponding to the mode information is performed and the case where the display corresponding to the different information is performed. .

  Feature G5. The second information display control means, when a display corresponding to the separate information is performed, a predetermined individual which is not in a non-display state when a display corresponding to the aspect information is performed among a plurality of individual information display means. Information display means (first notification display device 69a and second notification display device 69b in the first to tenth embodiments, first notification display device 201 in the eleventh and twelfth embodiments, second notification device The display device 202 and the third notification display device 203, and in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are set to a non-display state. A gaming machine according to claim 1.

  According to the feature G5, the display is not in the non-display state when the display corresponding to the aspect information is performed. The display is in the non-display state when the predetermined individual information display unit performs the display corresponding to the different information. With this, it is possible to clearly specify which of the display corresponding to the mode information and the display corresponding to the different information is being performed simply by grasping the type of the individual information display unit in the non-display state. Becomes possible.

Feature G6. The second information display control means, when causing the display corresponding to the different information to be performed, a specific individual information display means (a second one of the plurality of individual information display means, which is in a display state when the aspect information is displayed). In the first to tenth embodiments, the third notification display device 69c, in the eleventh and twelfth embodiments, the fourth notification display device 204, and in the thirteenth embodiment, the third notification display device 203 and the fourth notification. Display device 204) in a display state,
The display content of the specific individual information display means when the display corresponding to the different information is performed may be displayed on the specific individual information display means when the display corresponding to the aspect information is performed. The gaming machine according to Feature G5.

  According to the feature G6, in the specific individual information display means, the display content that can be displayed when the display corresponding to the mode information is performed can be displayed even when the display corresponding to the different information is performed. It is possible not to restrict the display contents when the display corresponding to the information is performed. Even if the specific individual information display means has the same display content as described above, it does not enter the non-display state when the display corresponding to the aspect information is provided with the configuration of the feature G5. When the predetermined individual information display means performs display corresponding to the different information, the display is in the non-display state, so that it is possible to specify which display is being performed by the plurality of individual information display means.

  Feature G7. The gaming machine according to Feature G5 or G6, wherein the first information display control unit sets each of the plurality of individual information display units to a display state when a display corresponding to the aspect information is performed.

  According to the feature G7, when the display corresponding to the aspect information is performed, each of the plurality of individual information display units is in the display state, and accordingly, the predetermined individual information display unit corresponds to the different information in the non-display state. This can be clearly distinguished from the case where the display is performed.

  Feature G8. The first information display control means sequentially changes the display of the aspect information on the information display means. Even when the display of the aspect information is changed, the predetermined individual information display means is in a non-display state. The gaming machine according to any one of features G5 to G7, characterized in that the gaming machine is not maintained in the game machine.

  According to the feature G8, when the display corresponding to the aspect information is performed, the predetermined individual information display unit is not maintained in the non-display state. This makes it possible to specify which of the display corresponding to the mode information and the display corresponding to the different information is being performed on the plurality of individual information display units, regardless of the timing at which the plurality of individual information display units are confirmed. Becomes possible.

  Feature G9. The second information display control means is a specific individual information display means of the plurality of individual information display means (in the first to tenth embodiments, the third notification display device 69c, the eleventh, twelfth, In any one of the features G5 to G8, the fourth notification display device 204) causes the display corresponding to the different information to be displayed on the fourth notification display device 204) so that the remaining individual information display means is in a non-display state. 2. The gaming machine according to item 1.

  According to the feature G9, when the display corresponding to the different information is performed, only one individual information display unit is in the display state, so that it is easy to grasp whether the display corresponding to the different information is performed. Become.

Feature G10. The plurality of individual information display means are arranged in a predetermined direction,
The gaming machine according to Feature G9, wherein the specific individual information display means is present at an end of the plurality of individual information display means arranged in the predetermined direction in the predetermined direction.

  According to the feature G10, since one individual information display means on which the display corresponding to the different information is performed is located at the end in the predetermined direction, it is determined whether the display corresponding to the different information is performed. Easier to do.

Feature G11. The first information display control means is an individual information display means of a type display target which is a part of the plurality of individual information display means (in the first to tenth embodiments, the first notification display device 69a, the eleventh information display means). In the fourteenth to fourteenth embodiments, the display corresponding to the type of the aspect information to be displayed is performed on the first notification display device 201 and the second notification display device 202). The individual information display means (the second notification display device 69b and the third notification display device 69b in the first to tenth embodiments, and the third information display device 69c in the first to fourteenth embodiments) The display corresponding to the content of the aspect information to be displayed is performed on the third notification display device 203 and the fourth notification display device 204).
The gaming machine according to any one of features G5 to G10, wherein the predetermined individual information display means corresponds to the individual information display means of the type display target.

  According to the feature G11, when the display corresponding to the mode information is performed, the display corresponding to the type of the mode information to be displayed is performed by the individual information display unit of the type display target, and the individual information display of the result display target is performed. The display corresponding to the content of the mode information to be displayed is performed by the means. This makes it easier to grasp the aspect information to be displayed. In this case, when the display corresponding to the different information is performed, the individual information display unit of the type display target is in the non-display state, so that the type display non-display state corresponds to the different information, It is easier to grasp when different information is displayed.

Feature G12. The information display means has a plurality of unit light emitting units (display segments 201a to 201g, 202a to 202g), and performs a predetermined display by a combination of the unit light emitting units that are in a light emitting state among the plurality of unit light emitting units. It is a configuration that can
The second information display control unit responds to the different information by setting a unit light emitting unit, which can be set to a light emitting state when a display corresponding to the aspect information is performed, of the plurality of unit light emitting units to a light emitting state. The display is performed, and the combination of the unit light emitting units that emits light when the display corresponding to the separate information is performed does not exist when the display corresponding to the aspect information is performed. The gaming machine according to any one of features G1 to G11, wherein the gaming machine is a combination.

  According to the feature G12, when the display corresponding to the aspect information is performed, the display corresponding to the different information is performed by setting the unit light emitting unit that can be in the luminescent state to the luminescent state, thereby performing the display corresponding to the aspect information. It is possible to minimize the restrictions on the contents of the display corresponding to the aspect information in order to diversify the information. On the other hand, the combination of the unit light-emitting units that emits light when the display corresponding to the different information is performed is a combination that does not exist when the display corresponding to the mode information is performed. Thus, it is possible to grasp which of the display corresponding to the mode information and the display corresponding to the different information is being performed by grasping the combination of the unit light-emitting units that are in the light-emitting state.

Feature G13. There are a plurality of display modes of a display corresponding to the mode information in the information display unit,
The game according to Feature G12, wherein, in the plurality of unit light emitting units, there is no unit light emitting unit that does not enter a light emitting state even when all of the displays corresponding to the plurality of aspects of the aspect information are performed. Machine.

  According to the feature G13, when the display corresponding to the aspect information is performed, the unit light emitting units of an arbitrary combination are in a light emitting state, so that the display corresponding to the aspect information is diversified. It is possible to minimize restrictions on the contents of the display corresponding to the information.

Feature G14. The specific individual information display means (the third notification display device 69c in the first to tenth embodiments, the fourth notification display device 204 in the eleventh and twelfth embodiments, the thirteenth In the embodiment, a plurality of individual information display units including the third notification display device 203 and the fourth notification display device 204) are provided,
The second information display control means, when a display corresponding to the separate information is performed, a predetermined individual which is not in a non-display state when a display corresponding to the aspect information is performed among a plurality of individual information display means. Information display means (first notification display device 69a and second notification display device 69b in the first to tenth embodiments, first notification display device 201 in the eleventh and twelfth embodiments, second notification device The display device 202 and the third notification display device 203, and in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are set to a non-display state. Or the gaming machine according to G13.

  According to the feature G14, when the display corresponding to the aspect information is performed, the display is not in the non-display state. When the predetermined individual information display unit performs the display corresponding to the different information, the display is in the non-display state. With this, it is possible to clearly specify which of the display corresponding to the mode information and the display corresponding to the different information is being performed simply by grasping the type of the individual information display unit in the non-display state. Becomes possible.

Feature G15. Setting means (a function of executing a setting value update process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage,
The gaming machine according to any one of features G1 to G14, wherein the second information display control means causes a display corresponding to the different information to be performed in a situation where the set value can be changed.

  According to the feature G15, it is possible to use the information display means for displaying the information corresponding to the aspect information as the display means for notifying that the setting value can be changed.

  Feature G16. The gaming machine according to Feature G15, wherein the second information display control means displays information corresponding to a set value currently selected as a display corresponding to the different information.

  According to the feature G16, it is possible to use the information display means for displaying the information corresponding to the aspect information as the display means for displaying the set value in the middle of the change.

  Feature G17. The gaming machine according to any one of features G1 to G16, wherein the second information display control means causes a display corresponding to an abnormal state of the gaming machine to be performed as a display corresponding to the different information.

  According to the feature G17, it is possible to also use the information display means for performing the display corresponding to the aspect information as the display means for performing the display corresponding to the abnormal state of the gaming machine.

  Feature G18. The second information display control means, when performing a display corresponding to the abnormal state in a situation where the abnormal state does not occur, performs a display corresponding to the absence of the abnormal state. The gaming machine according to Feature G17.

  According to the feature G18, it is possible to clearly specify whether or not an abnormal state has occurred by checking the information display means.

  In addition, for the configuration of the features G1 to G18, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Characteristic H group>
Feature H1. History storage executing means (a function of executing a history setting process in the management-side CPU 112) for storing history information of a game corresponding to the predetermined event in the history storage means (history memory 117) when a predetermined event occurs by execution of the game )When,
An information deriving unit that derives mode information corresponding to a result of a game in a predetermined period by using the history information stored in the history storage unit (in the first embodiment, steps S1402 to S1412 in the management CPU 112) Function of executing the processing of step S1807 in the management-side CPU 112 in the third embodiment, and the function of executing the processing of step S2107 in the management-side CPU 112 in the fifth embodiment).
The information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the 11th to the In the fourteenth embodiment, a first information display control unit (a function of executing a display process in the management-side CPU 112) that controls display of the first to fourth notification display devices 201 to 204);
Second information display control means for controlling the display of the information display means so that a display corresponding to different information different from the aspect information is performed (in the first to tenth embodiments, steps S202 and S208 in the main CPU 63). Function in the eleventh embodiment, the function of executing steps S3101, S3103, and S3109 in the main CPU 63 in the eleventh embodiment, and the steps S3201, S3202, and S3204 in the main CPU 63 in the twelfth embodiment. And the function of executing the processing of step S3210, in the thirteenth embodiment, the function of executing the abnormality display processing in the main CPU 63),
With
The information display means has a plurality of unit light emitting units (display segments 201a to 201g, 202a to 202g), and performs a predetermined display by a combination of the unit light emitting units that are in a light emitting state among the plurality of unit light emitting units. It is a configuration that can
The second information display control unit responds to the different information by setting a unit light emitting unit, which can be set to a light emitting state when a display corresponding to the aspect information is performed, of the plurality of unit light emitting units to a light emitting state. The display is performed, and the combination of the unit light emitting units that emits light when the display corresponding to the separate information is performed does not exist when the display corresponding to the aspect information is performed. A gaming machine characterized by being a combination.

  According to the feature H1, when a predetermined event occurs, history information corresponding to the event is stored in the history storage unit. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, mode information corresponding to the result of the game in a predetermined period is derived using the history information stored in the history storage unit. Then, a display corresponding to the aspect information is performed by the information display means. Thereby, it is possible to grasp the management result of the game history such as the frequency of occurrence of the predetermined event. Further, in the information display means, not only a display corresponding to the mode information but also a display corresponding to another information is performed. This makes it possible to effectively use the information display means.

  In addition, the display corresponding to the different information is performed by setting the unit light emitting unit that can be in the light emitting state when the display corresponding to the aspect information is performed to the light emitting state, thereby diversifying the display corresponding to the aspect information. In doing so, it is possible to minimize restrictions on the contents of the display corresponding to the aspect information. On the other hand, the combination of the unit light-emitting units that emits light when the display corresponding to the different information is performed is a combination that does not exist when the display corresponding to the mode information is performed. Thus, it is possible to grasp which of the display corresponding to the mode information and the display corresponding to the different information is being performed by grasping the combination of the unit light-emitting units that are in the light-emitting state.

Feature H2. There are a plurality of display modes of a display corresponding to the mode information in the information display unit,
The game according to Feature H1, wherein the plurality of unit light-emitting units do not include a unit light-emitting unit that does not enter a light-emitting state even when all the displays corresponding to the plurality of forms of the mode information are performed. Machine.

  According to the feature H2, when the display corresponding to the aspect information is performed, the unit light emitting units of an arbitrary combination are in a light emitting state, so that the display corresponding to the aspect information is diversified. It is possible to minimize restrictions on the contents of the display corresponding to the information.

Feature H3. The specific individual information display means (the third notification display device 69c in the first to tenth embodiments, the fourth notification display device 204 in the eleventh and twelfth embodiments, the thirteenth In the embodiment, a plurality of individual information display units including the third notification display device 203 and the fourth notification display device 204) are provided,
The second information display control means, when a display corresponding to the separate information is performed, a predetermined individual which is not in a non-display state when a display corresponding to the aspect information is performed among a plurality of the individual information display means. Information display means (in the first to tenth embodiments, the first notification display device 69a and the second notification display device 69b, and in the eleventh and twelfth embodiments, the first notification display device 201, the second notification display device The display device 202 and the third notification display device 203, and in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are set to a non-display state. Or the gaming machine according to H2.

  According to the feature H3, the display is not in the non-display state when the display corresponding to the aspect information is performed. The display is in the non-display state when the predetermined individual information display unit performs the display corresponding to the different information. With this, it is possible to clearly specify which of the display corresponding to the mode information and the display corresponding to the different information is being performed simply by grasping the type of the individual information display unit in the non-display state. Becomes possible.

  Feature H4. The gaming machine according to Feature H3, wherein the first information display control unit sets each of the plurality of individual information display units to a display state when a display corresponding to the aspect information is performed.

  According to the feature H4, when the display corresponding to the aspect information is performed, each of the plurality of individual information display units is in the display state, and therefore, the predetermined individual information display unit corresponds to another information in the non-display state. This can be clearly distinguished from the case where the display is performed.

  Feature H5. The first information display control means sequentially changes the display of the aspect information on the information display means. Even when the display of the aspect information is changed, the predetermined individual information display means is in a non-display state. The gaming machine according to feature H3 or H4, characterized in that the gaming machine is not maintained at the same time.

  According to the feature H5, when the display corresponding to the aspect information is performed, the predetermined individual information display unit is not maintained in the non-display state. This makes it possible to specify which of the display corresponding to the mode information and the display corresponding to the different information is being performed on the plurality of individual information display units, regardless of the timing at which the plurality of individual information display units are confirmed. Becomes possible.

Feature H6. Setting means (a function of executing a setting value update process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage,
The gaming machine according to any one of features H1 to H5, wherein the second information display control means causes a display corresponding to the different information to be performed in a situation where the set value can be changed.

  According to the feature H6, it is possible to also use the information display means for performing display corresponding to the aspect information as the display means for notifying that the setting value can be changed.

  Feature H7. The gaming machine according to Feature H6, wherein the second information display control means causes information corresponding to a set value currently selected as a display corresponding to the different information to be displayed.

  According to the feature H7, it is possible to use the information display means for displaying the information corresponding to the aspect information as the display means for displaying the set value in the middle of the change.

  In addition, with respect to the configuration of the features H1 to H7, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Characteristic I group>
Feature I1. History storage executing means (a function of executing a history setting process in the management-side CPU 112) for storing history information of a game corresponding to the predetermined event in the history storage means (history memory 117) when a predetermined event occurs by execution of the game )When,
An information deriving unit that derives mode information corresponding to a result of a game in a predetermined period by using the history information stored in the history storage unit (in the first embodiment, steps S1402 to S1412 in the management CPU 112) Function of executing the processing of step S1807 in the management-side CPU 112 in the third embodiment, and the function of executing the processing of step S2107 in the management-side CPU 112 in the fifth embodiment).
First information display control means (management side) for controlling display of information display means (first to fourth notification display devices 201 to 204) so that display corresponding to the aspect information derived by the information derivation means is performed. A function of executing display processing in the CPU 112);
Second information display control means for controlling the display of the information display means so that a display corresponding to an abnormal state of the gaming machine is performed (a function of executing an abnormality display process in the main CPU 63);
A gaming machine comprising:

  According to the feature I1, when a predetermined event occurs, history information corresponding to the event occurs is stored in the history storage unit. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, mode information corresponding to the result of the game in a predetermined period is derived using the history information stored in the history storage unit. Then, a display corresponding to the aspect information is performed by the information display means. Thereby, it is possible to grasp the management result of the game history such as the frequency of occurrence of the predetermined event. Further, in the information display means, not only the display corresponding to the mode information but also the display corresponding to the abnormal state of the gaming machine is performed. This makes it possible to effectively use the information display means.

  Feature I2. The second information display control means, when performing a display corresponding to the abnormal state in a situation where the abnormal state does not occur, performs a display corresponding to the absence of the abnormal state. The gaming machine according to Feature I1.

  According to the feature I2, it is possible to clearly specify whether or not an abnormal state has occurred by checking the information display means.

  Feature I3. The feature I1 or I2 is characterized in that a period during which display corresponding to the aspect information is performed on the information display unit and a period during which display corresponding to the abnormal state is performed on the information display unit are distinguished. The gaming machine described.

  According to the feature I3, by grasping the state of the display on the information display means, which of the display corresponding to the mode information and the display corresponding to the abnormal state is performed on the information display means is determined. Can be specified.

  Feature I4. The second information display control means controls the display of the information display means so as to have a display mode different from a display mode in a case where a display corresponding to the mode information is performed, so that a display corresponding to the abnormal state is displayed. The gaming machine according to feature G1 or G2, wherein the gaming machine is operated.

  According to the feature I4, by grasping the display mode of the information display unit, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the abnormal state is being performed on the information display unit. It becomes possible.

  Feature I5. Features I1 to I4 characterized by comprising a plurality of individual information display means (first to fourth notification display devices 201 to 204) each capable of performing a plurality of types of display as the information display means. A gaming machine according to any one of the preceding claims.

  According to the feature I5, the display corresponding to the mode information is performed using the plurality of individual information display units, so that it is possible to display various mode information. Also, the presence of the plurality of individual information display means makes it possible to greatly differ the display mode between the case where the display corresponding to the mode information is performed and the case where the display corresponding to the abnormal state is performed. .

  Feature I6. When the display corresponding to the abnormal state is performed, the second information display control unit may be configured to perform a predetermined individual display among the plurality of individual information display units, the display unit not being in the non-display state when the display corresponding to the aspect information is performed. The gaming machine according to Feature I5, wherein the information display means (the first notification display device 201 and the second notification display device 202) is set to a non-display state.

  According to the feature I6, when the display corresponding to the aspect information is performed, the display is not in the non-display state. When the predetermined individual information display unit performs the display corresponding to the abnormal state, the display is in the non-display state. By this, it is possible to clearly specify which of the display corresponding to the aspect information and the display corresponding to the abnormal state is being performed simply by grasping the type of the individual information display unit in the non-display state. Becomes possible.

Feature I7. The second information display control means, when causing a display corresponding to the abnormal state to be performed, among the plurality of individual information display means, a specific individual information display means (displayed in a display state when the aspect information is displayed). The third notification display device 203 and the fourth notification display device 204) are displayed.
The display content of the specific individual information display unit when the display corresponding to the abnormal state is performed may be displayed on the specific individual information display unit when the display corresponding to the aspect information is performed. The gaming machine according to feature I6, wherein

  According to the feature I7, in the specific individual information display means, the display content that can be displayed when the display corresponding to the mode information is performed can also be displayed when the display corresponding to the abnormal state is performed. It is possible not to restrict the display contents when the display corresponding to the information is performed. Even if the specific individual information display means has the same display content as described above, it does not enter the non-display state when a display corresponding to the aspect information is provided with the configuration of the characteristic I7. When the display corresponding to the abnormal state is performed by the predetermined individual information display means, the display is in the non-display state, so that it is possible to specify which display is being performed by the plurality of individual information display means.

  Feature I8. The gaming machine according to Feature I6 or I7, wherein the first information display control unit sets each of the plurality of individual information display units to a display state when a display corresponding to the aspect information is performed.

  According to the feature I8, when the display corresponding to the aspect information is performed, each of the plurality of individual information display units is in the display state, and therefore, corresponds to the abnormal state in which the predetermined individual information display unit is in the non-display state. This can be clearly distinguished from the case where the display is performed.

  Feature I9. The first information display control means sequentially changes the display of the aspect information on the information display means. Even when the display of the aspect information is changed, the predetermined individual information display means is in a non-display state. The gaming machine according to any one of features I6 to I8, characterized in that the gaming machine is not maintained.

  According to the feature I9, when the display corresponding to the aspect information is performed, the predetermined individual information display unit is not maintained in the non-display state. Thereby, regardless of the timing at which the plurality of individual information display units are confirmed, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the abnormal state is being performed on the plurality of individual information display units. Becomes possible.

  In addition, with respect to the configuration of the features I1 to I9, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Feature J group>
Feature J1. History storage executing means (a function of executing a history setting process in the management-side CPU 112) for storing history information of a game corresponding to the predetermined event in the history storage means (history memory 117) when a predetermined event occurs by execution of the game )When,
An information deriving unit that derives mode information corresponding to a result of a game in a predetermined period by using the history information stored in the history storage unit (in the first embodiment, steps S1402 to S1412 in the management CPU 112) Function of executing the processing of step S1807 in the management-side CPU 112 in the third embodiment, and the function of executing the processing of step S2107 in the management-side CPU 112 in the fifth embodiment).
The information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the 11th to the In the fourteenth embodiment, a first information display control unit (a function of executing a display process in the management-side CPU 112) that controls display of the first to fourth notification display devices 201 to 204);
With
The first information display control means is for sequentially changing the display corresponding to the aspect information on the information display means, and the information display means is not displayed even when the display corresponding to the aspect information is changed. A gaming machine characterized in that it is not maintained in a state.

  According to the feature J1, when a predetermined event occurs, history information corresponding to the event is stored in the history storage unit. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, mode information corresponding to the result of the game in a predetermined period is derived using the history information stored in the history storage unit. Then, a display corresponding to the aspect information is performed by the information display means. Thereby, it is possible to grasp the management result of the game history such as the frequency of occurrence of the predetermined event. Further, when the display corresponding to the aspect information is performed, the information display means is not maintained in the non-display state. Thus, it is possible to specify the display corresponding to the aspect information regardless of the timing at which the information display means is confirmed.

  Feature J2. As the information display means, individual information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to fourteenth display units) capable of performing a plurality of types of display. The gaming machine according to feature J1, wherein the gaming machine includes a plurality of first to fourth notification display devices 201 to 204).

  According to the feature J2, it is possible to display a wide variety of aspect information by performing display corresponding to the aspect information using a plurality of individual information display units.

  Feature J3. The gaming machine according to Feature J2, wherein the first information display control unit sets each of the plurality of individual information display units to a display state when a display corresponding to the aspect information is performed.

  According to the feature J3, when the display corresponding to the aspect information is performed, each of the plurality of individual information display units is in the display state, and the display state is changed even when the display corresponding to the aspect information is changed. Will be maintained. This makes it easier to grasp the aspect information.

  Feature J4. The first information display control means is an individual information display means of a type display target which is a part of the plurality of individual information display means (in the first to tenth embodiments, the first notification display device 69a, the eleventh information display means). In the fourteenth to fourteenth embodiments, the first notification display device 201 and the second notification display device 202) perform display corresponding to the type of the aspect information to be displayed, and a plurality of the individual information display means are provided. The individual information display means (the second notification display device 69b and the third notification display device 69b in the first to tenth embodiments, and the second information display device 69c in the first to fourteenth embodiments) The gaming machine according to Feature J2 or J3, wherein a display corresponding to the content of the aspect information to be displayed is performed on the third notification display device 203 and the fourth notification display device 204).

  According to the feature J4, when the display corresponding to the aspect information is performed, the display corresponding to the type of the aspect information to be displayed is performed by the individual information display means of the type display target, and the individual information display of the result display target is performed. The display corresponding to the content of the mode information to be displayed is performed by the means. This makes it easier to grasp the aspect information to be displayed.

  In addition, for the configuration of the features J1 to J4, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Feature K group>
Feature K1. History storage execution means (a function of executing a history setting process in the management-side CPU 112) for storing history information of a game corresponding to the predetermined event in the history storage means (history memory 117) when a predetermined event occurs by execution of the game )
The history storage execution means is means for preventing the history information from being stored in the history storage means even if the predetermined event has occurred in the case of the restriction situation (function of making a negative determination in step S3501 in the main CPU 63). A gaming machine comprising:

  According to the feature K1, when a predetermined event occurs, history information corresponding to the event is stored in the history storage unit. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, in the case of a restricted situation, history information is not stored even if a predetermined event occurs, so that it is possible to prevent the history information from being stored in a situation where it is not preferable to store the history information. .

  Feature K2. The gaming machine according to Feature K1, wherein the restriction status can occur as a status from when the supply of operation power to the history storage execution unit is started to when a restriction release event occurs.

  According to the feature K2, it is possible to prevent the occurrence of the predetermined event due to the operation check immediately after the start of the supply of the operation power from being stored as the history information.

Feature K3. Means for setting the restriction status when the supply of operating power to the history storage execution means is started and the restriction condition is satisfied (function of executing the processing of step S3610 in the main CPU 63); ,
A unit that does not set the restriction status when the supply of operating power to the history storage execution unit is started and the restriction condition is not satisfied (a function of executing the process of step S3621 in the main CPU 63). When,
The gaming machine according to feature K2, comprising:

  According to the feature K3, there is a case where the restriction condition is set and a case where the restriction condition is not set depending on whether or not the restriction condition is satisfied. This makes it possible to prevent the restriction status from being set as necessary.

  Feature K4. The restriction situation may occur as a situation from when the supply of the operating power to the history storage execution unit is started until the number of game balls discharged from the game area reaches a predetermined reference number or more. The gaming machine according to any one of K1 to K3.

  According to the feature K4, it is possible to prevent the history information from being stored until the number of game balls discharged from the game area becomes equal to or more than the predetermined reference number after the supply of the operation power is started.

Feature K5. When a predetermined event occurs due to execution of a game, the history information of the game corresponding to the event is stored in history storage means (normal counter area 231, open / close execution mode counter area 232, high frequency support mode counter area 233). History storage executing means for storing (a function of executing a normal ball entry management process in the main CPU 63, a ball entry management process in the open / close execution mode, and a ball entry management process in the high frequency support mode);
An information deriving unit (a function of executing the process of step S4208 in the main CPU 63) for deriving mode information corresponding to a result of the game in a predetermined period using the history information stored in the history storage unit;
With
A gaming machine characterized in that the information deriving means does not derive the aspect information in a restricted situation.

  According to the feature K5, when a predetermined event occurs, history information corresponding to the event is stored in the history storage unit. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, mode information corresponding to the result of the game in a predetermined period is derived using the history information stored in the history storage unit. Thereby, it is possible to grasp the management result of the game history such as the frequency of occurrence of the predetermined event. In addition, in the case of the restricted situation, even if a predetermined event occurs, the aspect information is not derived, so that it is possible to prevent the aspect information from being derived in a situation where it is not preferable to derive the aspect information. .

  Feature K6. The gaming machine according to Feature K5, wherein the restriction status can occur as a status from the start of supply of operation power to the history storage execution unit to the occurrence of a restriction release event.

  According to the feature K6, it is possible to prevent the mode information using the history information based on the occurrence of the predetermined event by the operation check immediately after the start of the supply of the operation power from being derived.

  Feature K7. The restriction situation may occur as a situation from when the supply of the operating power to the history storage execution unit is started until the number of game balls discharged from the game area reaches a predetermined reference number or more. A gaming machine according to K5 or K6.

  According to the feature K7, it is possible to prevent the mode information from being derived until the number of game balls discharged from the game area becomes equal to or more than the predetermined reference number after the supply of the operation power is started.

  In addition, with respect to the configuration of the features K1 to K7, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

  According to the inventions relating to the feature G group, the feature H group, the feature I group, the feature J group, and the feature K group, the following problems can be solved.

  Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front of the game machine, and the game balls stored in the dish storage section are guided to a game ball launching device. The game is fired toward the game area in accordance with the shooting operation of the player. Then, for example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the dish storage unit, for example. In a pachinko gaming machine, a configuration having an upper dish storage section and a lower dish storage section as dish storage sections is also known. In this case, game balls stored in the upper dish storage section are used to launch game balls. The game balls guided by the device and surplus in the upper dish storage section are discharged to the lower dish storage section.

  Further, in the slot machine, when a new game is started by operating the start lever while a medal is bet, a lottery process is executed by the control means. Further, when the lottery process is executed, the rotation of the reel is started by the rotation start control being executed by the control means, and when the stop button is operated during the rotation of the reel, the control means executes the rotation start control. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the rotation stop of the reels corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

  Here, in the gaming machines such as those described above, it is necessary to appropriately manage the gaming machines, and there is still room for improvement in this regard.

<Characteristic L group>
Feature L1. A control unit (main CPU 63) for executing various processes and temporarily storing information in an internal storage unit (register of the main CPU 63) when executing the processes;
The control means,
A first predetermined process executing means for executing a first predetermined process of the various processes (a function of executing a process other than the management execution process by the main CPU 63 in the fifteenth to twenty-first embodiments);
A second predetermined process executing means for executing a second predetermined process among the various processes (a function of executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
In a case where the situation in which the first predetermined processing is being executed is changed to a situation in which the second predetermined processing is executed, or in a case where the second predetermined processing is executed, at least one of the information stored in the internal storage means is stored. Evacuation executing means (in the fifteenth embodiment, a function of executing the processing of steps S3802 and S3902 to S3907 in the main CPU 63 in the fifteenth embodiment) In the embodiment, the function of the main CPU 63 for executing the processing of step S4402, in the seventeenth embodiment, the function of executing the processing of steps S4502 to S4507 in the main CPU 63, and in the eighteenth embodiment, the function of the main CPU 63 A function of executing the processing of S4602, in the nineteenth embodiment, Processing of step S4701 and step S4703 and the ability to perform) in 63,
When or after the second predetermined process is completed, a return execution unit (in the fifteenth embodiment, the main CPU 63 executes steps S3804 and S3804) for returning the predetermined information saved in the predetermined storage unit to the internal storage unit. The function of executing the processing of steps S3910 to S3915, the function of executing the processing of step S4404 in the main CPU 63 in the sixteenth embodiment, and the processing of steps S4510 to S4515 in the main CPU 63 in the seventeenth embodiment Function in the eighteenth embodiment, the function of executing the processing of step S4605 in the main CPU 63, and the function of executing the processing in steps S4705 and S4706 in the main CPU 63 in the nineteenth embodiment),
A gaming machine comprising:

  According to the feature L1, when the situation where the second predetermined processing is executed is changed from the situation where the first predetermined processing is executed, or when the situation where the second predetermined processing is executed is stored in the internal storage means. At least a part of the information is saved in the predetermined storage means. Thus, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage unit from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined processing is completed, the information saved in the predetermined storage means is returned to the internal storage means. Thus, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage unit before the execution of the second predetermined process. As described above, various controls can be suitably performed.

  Feature L2. The gaming machine according to Feature L1, wherein the predetermined information is a part of information stored in the internal storage unit.

  According to the feature L2, only a part of the information stored in the internal storage means is saved to the predetermined storage means, so that the storage capacity required for saving the information of the internal storage means in the predetermined storage means is reduced. It can be suppressed.

Feature L3. The internal storage means includes a first storage area (WA register, BC register, DE register, HL register, IX register, and IY register) and a second storage area (WA register, BC register, DE register, HL register, IX register, Registers other than the IY register),
The second predetermined processing execution means is configured to store information in the first storage area in the second predetermined processing, but not to store information in the second storage area,
The gaming machine according to Feature L2, wherein the evacuation execution unit evacuates the information stored in the first storage area to the predetermined storage unit.

  According to the characteristic L3, when the situation where the first predetermined processing is executed is changed to the situation where the second predetermined processing is executed, or when the situation where the second predetermined processing is executed is reached, the second predetermined processing is performed in the internal storage means. The information in the first storage area to be stored is saved in the predetermined storage means. Thus, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage unit before the execution of the second predetermined process, It is possible to reduce the storage capacity required to save the information in the storage means.

Feature L4. The predetermined storage means,
A first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined processing is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined processing is executed;
With
The gaming machine according to any one of features L1 to L3, wherein the save execution means saves the predetermined information to the second predetermined storage area.

  According to the feature L4, since the first predetermined storage area and the second predetermined storage area are provided in the predetermined storage means, the storage destination of the information in the predetermined storage means can be determined by the first predetermined processing and the second predetermined processing. It is possible to make a clear difference. This makes it possible to prevent information used in the other process from being erased when one of the first predetermined process and the second predetermined process is executed. In this case, when a situation where the second predetermined processing is executed from a situation where the first predetermined processing is executed or a situation where the second predetermined processing is executed is obtained, at least a part stored in the internal storage means is stored. Is saved in the second predetermined storage area. This makes it possible to save the information in the internal storage unit immediately before the start of the second predetermined processing, and to save the information without using the first predetermined storage area.

Feature L5. The evacuation execution means,
In a case where the situation in which the first predetermined processing is being executed is changed to a situation in which the second predetermined processing is executed, the first predetermined information, which is a part of the information stored in the internal storage means, is used in the first predetermined processing. Means for saving to the first predetermined storage area (the function of executing the processing of step S3802 in the main CPU 63 in the fifteenth embodiment, the function of executing the processing of step S4402 in the main CPU 63 in the sixteenth embodiment); ,
When the situation in which the first predetermined process is being executed is changed to a situation in which the second predetermined process is executed, the second predetermined information, which is a part of the information stored in the internal storage means, is replaced with the second predetermined process. Means for evacuating to the second predetermined storage area (the function of executing the processing of steps S3902 to S3907 in the main CPU 63 in the fifteenth embodiment, and the functions of steps S4502 to A function of executing processing, a function of executing the processing of step S4602 in the main CPU 63 in the eighteenth embodiment, and a function of executing the processing of steps S4702 and S4703 in the main CPU 63 in the nineteenth embodiment);
The gaming machine according to feature L4, comprising:

  According to the feature L5, the first predetermined information, which is a part of the information stored in the internal storage unit, is saved in the first predetermined storage area in the first predetermined processing, and the partial information stored in the internal storage unit is stored. Is saved in the second predetermined storage area in the second predetermined process. This makes it possible to perform the saving at a timing suitable for each piece of information stored in the internal storage means, and to execute the processing for saving the information in a distributed manner between the first predetermined processing and the second predetermined processing. It becomes possible.

  Feature L6. The gaming machine according to Feature L5, wherein the first predetermined information is information of a flag register provided in the internal storage means.

  According to the feature L6, it is possible to appropriately save the information of the flag register in a situation where the first predetermined process is being executed.

Feature L7. The second predetermined storage area is:
A stack area (stack area 224 for non-specific control) in which information can be written by a push instruction and information can be read by a pop instruction;
A work area in which information can be written and read by a load instruction (a work area 223 for non-specific control);
With
The gaming machine according to any one of features L4 to L6, wherein the retreat execution unit retreats the predetermined information to one of the stack area and the work area.

  According to the feature L7, when the situation where the first predetermined processing is executed is changed to the situation where the second predetermined processing is executed, or when the situation where the second predetermined processing is executed is reached, the stack area in the second predetermined storage area is set. At least a part of the information stored in the internal storage means is saved in one of the work area and the work area. As a result, the save destinations of the information can be consolidated, and the processing configuration for saving and the processing configuration for restoring can be simplified.

  Feature L8. The gaming machine according to Feature L7, wherein the retreat executing unit retreats the predetermined information to the work area.

  According to the feature L8, since the save area of at least a part of the information stored in the internal storage means is the work area, it is possible to save the information without cumulatively changing the stack pointer. Become.

Feature L9. The first predetermined storage area is capable of storing information and reading information when the first predetermined processing is performed, and is capable of reading information when the second predetermined processing is performed. Information cannot be stored,
The second predetermined storage area is capable of storing information and reading information when the second predetermined processing is performed, and is capable of reading information when the first predetermined processing is performed. The gaming machine according to any one of features L4 to L8, wherein information cannot be stored.

  According to the feature L9, the first predetermined storage area can be handled as a storage area dedicated to the first predetermined processing, and the second predetermined storage area can be handled as a storage area dedicated to the second predetermined processing. Becomes

Feature L10. The predetermined storage means,
A stack area (stack area 224 for non-specific control) in which information can be written by a push instruction and information can be read by a pop instruction;
A work area in which information can be written and read by a load instruction (a work area 223 for non-specific control);
With
The gaming machine according to any one of features L1 to L9, wherein the retreat execution unit retreats the predetermined information to one of the stack area and the work area.

  According to the feature L10, the save destinations of the predetermined information can be aggregated, and the processing configuration for saving the predetermined information and the processing configuration for restoring the predetermined information can be simplified.

  Feature L11. The gaming machine according to Feature L10, wherein the retreat execution unit retreats the predetermined information to the work area.

  According to the feature L11, since the save destination of the predetermined information is the work area, it is possible to save the information without performing the cumulative change of the stack pointer.

Feature L12. The predetermined information is a part of information stored in the internal storage unit,
The evacuation execution unit is configured to execute the internal storage unit when the situation in which the first predetermined process is being executed is changed to a situation in which the second predetermined process is executed, or when the status in which the second predetermined process is executed is changed. The gaming machine according to Feature L11, further comprising a unit (a function of executing a process of Step S3802 in the main CPU 63) for saving specific information, which is a part of information stored in the stack area, to the stack area. .

  According to the feature L12, in the configuration in which the predetermined information is saved in the work area, the specific information is saved in the stack area. Thus, the information stored in the internal storage unit can be dispersed and saved in the work area and the stack area.

  Feature L13. The gaming machine according to Feature L12, wherein the predetermined information has a larger amount of information than the specific information.

  According to the feature L13, the predetermined information having a larger amount of information than the specific information is saved in the work area, so that a large amount of information is accumulated in the stack area when the information stored in the internal storage unit is saved. It is possible to prevent it from happening.

Feature L14. In a case where the situation where the first predetermined processing is being executed is changed to a situation where the second predetermined processing is executed or a situation where the second predetermined processing is executed, information of a stack pointer provided in the internal storage means is provided. Is a fixed information structure.
The gaming machine according to any one of features L1 to L13, wherein information of a stack pointer provided in the internal storage unit is not a target of evacuation by the evacuation execution unit.

  According to the feature L14, it is not necessary to secure a capacity for saving the information of the stack pointer in the predetermined storage means, so that the capacity of the predetermined storage means can be reduced. Further, even in the configuration in which the information of the stack pointer is not saved, the situation in which the first predetermined processing is being executed is changed to the situation in which the second predetermined processing is executed, or the situation in which the second predetermined processing is executed is changed. In this case, the information of the stack pointer becomes fixed information. Therefore, even if the information of the stack pointer is not saved as described above, it is possible to return to the information of the stack pointer before the start of the second predetermined process. It is possible.

  Feature L15. Means for setting the fixed information in the stack pointer when or after ending the second predetermined processing (in the fifteenth embodiment, a function of executing the processing of step S3909 in the main CPU 63, a seventeenth embodiment) The gaming machine according to feature L14, further comprising a function of executing the processing of step S4509 in the main CPU 63 in the embodiment, and a function of executing the processing of step S4604 in the main CPU 63 in the eighteenth embodiment. .

  According to the feature L15, it is possible to return to the information of the stack pointer before the second predetermined process is started when or after the second predetermined process is completed.

  Feature L16. When the situation where the first predetermined process is being executed is changed to the situation where the second predetermined process is executed, or when the situation where the second predetermined process is executed is reached, the stack pointer is set to the second predetermined process. Means for setting the corresponding second response start information (the function of executing the processing of step S3901 in the main CPU 63 in the fifteenth embodiment; the function of executing the processing of step S4501 in the main CPU 63 in the seventeenth embodiment; The gaming machine according to feature L14 or L15, further comprising a function of executing the processing of step S4601 in the main CPU 63 in the eighteenth embodiment.

  According to the feature L16, when the second predetermined processing is started, the second correspondence start information corresponding to the second predetermined processing is set in the stack pointer, so that an appropriate address in the second predetermined processing is set. Information can be stored in the stack area.

Feature L17. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features L1 to L16, wherein the second predetermined process includes a process for managing a game history.

  According to the feature L17, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent information used in the processing for managing the game history from being rewritten when executing the processing for the game.

Feature L18. The predetermined storage means,
A first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined processing is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined processing is executed;
With
The second predetermined storage area is a history storage area (normal counter area 231, open / close execution mode counter area 232) in which, when a predetermined event occurs due to the execution of a game, history information of the game corresponding to the event is stored. The gaming machine according to feature L17, further comprising a high-frequency support mode counter area 233).

  According to the feature L18, when a predetermined event has occurred, history information corresponding to the event is stored in the history storage area. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. During execution, it is possible to prevent information stored in the history storage area from being rewritten.

  Feature L19. The second predetermined process executing means is an information deriving means (step S4208 in the main CPU 63) for deriving mode information corresponding to a game result in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature L18, further comprising:

  According to the feature L19, by using the history information stored in the history storage area to derive the mode information corresponding to the game result in the predetermined period, the management of the game history such as the frequency of occurrence of the predetermined event is performed. The result can be grasped.

  Feature L20. The gaming machine according to Feature L19, wherein the second predetermined storage area includes a mode information storage area (operation result storage area 234) for storing the mode information derived by the information deriving unit.

  According to the feature L20, when the mode information corresponding to the result of the game in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. Thereby, it is possible to grasp the management result of the game history at an arbitrary timing. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. At the time of execution, it is possible to prevent the information stored in the aspect information storage area from being rewritten.

  In addition, with respect to the configuration of the features L1 to L20, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Characteristic M group>
Feature M1. A control unit (main CPU 63) for executing various processes and temporarily storing information in an internal storage unit (register of the main CPU 63) when executing the processes;
The control means,
A first predetermined process executing means for executing a first predetermined process of the various processes (a function of executing a process other than the management execution process by the main CPU 63 in the fifteenth to twenty-first embodiments);
A second predetermined process executing means for executing a second predetermined process among the various processes (a function of executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
In a case where the situation in which the first predetermined processing is being executed is changed to a situation in which the second predetermined processing is executed, or in a case where the second predetermined processing is executed, at least one of the information stored in the internal storage means is stored. Evacuation executing means (in the fifteenth embodiment, a function for executing the processing of steps S3902 to S3907 in the main CPU 63 in the fifteenth embodiment; In the eighteenth embodiment, the function of executing the processing of step S4602 in the main CPU 63, and in the nineteenth embodiment, the function of executing the processing of steps S4502 and S4507 in the main CPU 63. Function for executing the processing of S4703);
When or after the second predetermined process is completed, a return execution unit (in the fifteenth embodiment, steps S3910 in the main CPU 63 in the fifteenth embodiment) for returning the predetermined information saved in the predetermined storage unit to the internal storage unit. A function of executing the processing of step S3915, a function of executing the processing of steps S4510 to S4515 in the main CPU 63 in the seventeenth embodiment, a function of executing the processing of step S4605 in the main CPU 63 in the eighteenth embodiment, In the nineteenth embodiment, the main CPU 63 performs the processing of steps S4705 and S4706),
With
The gaming machine, wherein the save execution means saves the predetermined information to the predetermined storage means by a load command.

  According to the feature M1, when the situation in which the first predetermined processing is being executed is changed to the situation in which the second predetermined processing is executed, or when the situation in which the second predetermined processing is executed is stored, the information is stored in the internal storage means. Predetermined information that is at least a part of the information is saved in a predetermined storage unit. Thus, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage unit from being rewritten when the first predetermined process is executed. When or after the second predetermined process is completed, the predetermined information saved in the predetermined storage unit is returned to the internal storage unit. Thus, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage unit before the execution of the second predetermined process. In a case where the situation where the first predetermined processing is being executed is changed to a situation where the second predetermined processing is executed or a situation where the second predetermined processing is executed, the above-mentioned predetermined information is saved in the predetermined storage means by a load instruction. . This makes it possible to save the predetermined information without changing the stack pointer.

Feature M2. The predetermined storage means,
A stack area (stack area 224 for non-specific control) in which information can be written by a push instruction and information can be read by a pop instruction;
A work area in which information can be written and read by a load instruction (a work area 223 for non-specific control);
With
The gaming machine according to feature M1, wherein the retreat execution unit retreats the predetermined information to the work area.

  According to the feature M2, since the save area of the predetermined information, which is at least a part of the information stored in the internal storage unit, is the work area, the information is saved without cumulatively changing the stack pointer. It becomes possible.

Feature M3. The predetermined information is a part of information stored in the internal storage unit,
The evacuation execution unit is configured to execute the internal storage unit when the situation in which the first predetermined process is being executed is changed to a situation in which the second predetermined process is executed, or when the status in which the second predetermined process is executed is changed. The gaming machine according to feature M2, further comprising a unit (a function of executing the process of step S3802 in the main CPU 63) for saving the specific information, which is a part of the information stored in the stack area, to the stack area. .

  According to the feature M3, the specific information is saved in the stack area in the configuration in which the predetermined information is saved in the work area. Thus, the information stored in the internal storage unit can be dispersed and saved in the work area and the stack area.

  Feature M4. The gaming machine according to feature M3, wherein the predetermined information has a larger amount of information than the specific information.

  According to the feature M4, the predetermined information having an information amount larger than the specific information is saved in the work area, so that a large amount of information is accumulated in the stack area when the information stored in the internal storage unit is saved. It is possible to prevent it from happening.

Feature M5. The work area is
A first work area (a work area 221 for specific control) in which information is stored when the first predetermined process is executed;
A second work area (a work area 223 for non-specific control) in which information is stored when the second predetermined processing is executed;
With
The gaming machine according to any one of features M2 to M4, wherein the retreat execution unit retreats the predetermined information to the second work area.

  According to the feature M5, since the first work area and the second work area are provided in the work area, the storage destination of the information in the work area is clearly different between the first predetermined processing and the second predetermined processing. It becomes possible. This makes it possible to prevent information used in the other process from being erased when one of the first predetermined process and the second predetermined process is executed. In this case, when a situation where the second predetermined processing is executed from a situation where the first predetermined processing is executed or a situation where the second predetermined processing is executed is obtained, at least a part stored in the internal storage means is stored. Is saved in the second work area. This makes it possible to save the information in the internal storage unit immediately before the start of the second predetermined processing, and to save the information without using the first work area.

Feature M6. The first work area can store information and read information when the first predetermined process is performed, and can read information when the second predetermined process is performed. Information cannot be stored,
The second work area can store information and read information when the second predetermined process is performed, and can read information when the first predetermined process is performed. The gaming machine according to feature M5, wherein information cannot be stored.

  According to the feature M6, the first work area can be handled as a dedicated storage area for the first predetermined process, and the second work area can be handled as a dedicated storage area for the second predetermined process. .

Feature M7. A control unit (main CPU 63) for executing various processes and temporarily storing information in an internal storage unit (register of the main CPU 63) when executing the processes;
The control means,
A first predetermined process executing means for executing a first predetermined process of the various processes (a function of executing a process other than the management execution process by the main CPU 63 in the fifteenth to twenty-first embodiments);
A second predetermined process executing means for executing a second predetermined process among the various processes (a function of executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
In a case where the situation in which the first predetermined processing is being executed is changed to a situation in which the second predetermined processing is executed, or in a case where the second predetermined processing is executed, at least one of the information stored in the internal storage means is stored. Evacuation executing means (in the fifteenth embodiment, a function for executing the processing of steps S3902 to S3907 in the main CPU 63 in the fifteenth embodiment; In the eighteenth embodiment, the function of executing the processing of step S4602 in the main CPU 63, and in the nineteenth embodiment, the function of executing the processing of steps S4502 and S4507 in the main CPU 63. Function for executing the processing of S4703);
When or after the second predetermined process is completed, a return execution unit (in the fifteenth embodiment, steps S3910 in the main CPU 63 in the fifteenth embodiment) for returning the predetermined information saved in the predetermined storage unit to the internal storage unit. A function of executing the processing of step S3915, a function of executing the processing of steps S4510 to S4515 in the main CPU 63 in the seventeenth embodiment, a function of executing the processing of step S4605 in the main CPU 63 in the eighteenth embodiment, In the nineteenth embodiment, the main CPU 63 performs the processing of steps S4705 and S4706),
With
The predetermined storage means,
A stack area (stack area 224 for non-specific control) in which information can be written by a push instruction and information can be read by a pop instruction;
A work area in which information can be written and read by a load instruction (a work area 223 for non-specific control);
With
The gaming machine, wherein the retreat execution means retreats the predetermined information to one of the stack area and the work area.

  According to the feature M7, when the situation where the first predetermined processing is being executed is changed to the situation where the second predetermined processing is executed, or when the situation where the second predetermined processing is executed is stored, the information is stored in the internal storage means. Predetermined information that is at least a part of the information is saved in a predetermined storage unit. Thus, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage unit from being rewritten when the first predetermined process is executed. When or after the second predetermined process is completed, the predetermined information saved in the predetermined storage unit is returned to the internal storage unit. Thus, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage unit before the execution of the second predetermined process.

  Further, when the situation where the second predetermined processing is executed is changed from the situation where the first predetermined processing is executed or when the situation where the second predetermined processing is executed, one of the stack area and the work area in the predetermined storage means is provided. Then, the predetermined information is saved. As a result, the save destinations of the information can be consolidated, and the processing configuration for saving and the processing configuration for restoring can be simplified.

  In addition, with respect to the configuration of the features M1 to M7, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Characteristic N group>
Feature N1. A control unit (main CPU 63) for executing various processes and temporarily storing information in an internal storage unit (register of the main CPU 63) when executing the processes;
The control means,
A first predetermined process executing means for executing a first predetermined process of the various processes (a function of executing a process other than the management execution process by the main CPU 63 in the fifteenth to twenty-first embodiments);
A second predetermined process executing means for executing a second predetermined process among the various processes (a function of executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
With
When the situation where the first predetermined processing is being executed is changed to the situation where the second predetermined processing is executed, the information of the stack pointer provided in the internal storage means is fixed information. Gaming machine.

  According to the feature N1, when the situation in which the first predetermined processing is being executed is changed to the situation in which the second predetermined processing is executed, the information of the stack pointer provided in the internal storage means is fixed information. There is no need to save the information of the stack pointer when starting the predetermined processing. This eliminates the need to secure a storage area for saving the information of the stack pointer. Further, when the situation where the second predetermined processing is executed is changed from the situation where the first predetermined processing is being executed, the information of the stack pointer is fixed information, so that the information of the stack pointer is not saved as described above. However, it is possible to return to the information of the stack pointer before the start of the second predetermined process.

  Feature N2. Means for setting the fixed information in the stack pointer when or after ending the second predetermined processing (in the fifteenth embodiment, a function of executing the processing of step S3909 in the main CPU 63, a seventeenth embodiment) The gaming machine according to Feature N1, wherein the main CPU 63 has a function of executing the processing of Step S4509 in the main CPU 63, and the eighteenth embodiment has a function of executing the processing of Step S4604 in the main CPU 63). .

  According to the feature N2, it is possible to return to the information of the stack pointer before the second predetermined process is started when or after the second predetermined process is completed.

  Feature N3. Means for setting the stack pointer to the second correspondence start information corresponding to the second predetermined processing when the situation where the first predetermined processing is being executed is changed to the situation where the second predetermined processing is executed. In the embodiment, the function of executing the processing of step S3901 in the main CPU 63, the function of executing the processing of step S4501 in the main CPU 63 in the seventeenth embodiment, and the processing of step S4601 in the main CPU 63 in the eighteenth embodiment. The gaming machine described in the feature N1 or N2, further comprising:

  According to the feature N3, when the second predetermined process is started, the second correspondence start information corresponding to the second predetermined process is set in the stack pointer, so that an appropriate address in the second predetermined process is set. Information can be stored in the stack area.

Feature N4. In a case where the situation in which the first predetermined processing is being executed is changed to a situation in which the second predetermined processing is executed, or in a case where the second predetermined processing is executed, at least one of the information stored in the internal storage means is stored. Evacuation executing means (in the fifteenth embodiment, a function of executing the processing of steps S3802 and S3902 to S3907 in the main CPU 63 in the fifteenth embodiment) In the embodiment, the function of the main CPU 63 for executing the processing of step S4402, in the seventeenth embodiment, the function of executing the processing of steps S4502 to S4507 in the main CPU 63, and in the eighteenth embodiment, the function of the main CPU 63 A function of executing the processing of S4602, in the nineteenth embodiment, Processing of step S4701 and step S4703 and the ability to perform) in 63,
When or after the second predetermined process is completed, a return execution unit (in the fifteenth embodiment, the main CPU 63 executes steps S3804 and S3804) for returning the predetermined information saved in the predetermined storage unit to the internal storage unit. The function of executing the processing of steps S3910 to S3915, the function of executing the processing of step S4404 in the main CPU 63 in the sixteenth embodiment, and the processing of steps S4510 to S4515 in the main CPU 63 in the seventeenth embodiment Function in the eighteenth embodiment, the function of executing the processing of step S4605 in the main CPU 63, and the function of executing the processing in steps S4705 and S4706 in the main CPU 63 in the nineteenth embodiment),
With
The gaming machine according to any one of claims N1 to N3, wherein information of a stack pointer provided in said internal storage means is not a target of evacuation by said evacuation execution means.

  According to the feature N4, when the situation where the second predetermined processing is executed is changed from the situation where the first predetermined processing is executed, or when the situation where the second predetermined processing is executed is stored in the internal storage means. At least a part of the information is saved in the predetermined storage means. Thus, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage unit from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined processing is completed, the information saved in the predetermined storage means is returned to the internal storage means. Thus, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage unit before the execution of the second predetermined process. Further, since the information of the stack pointer is not to be saved, it is not necessary to secure a capacity for saving the information of the stack pointer in the predetermined storage means. Therefore, the capacity of the predetermined storage unit can be reduced. Further, even in the configuration in which the information of the stack pointer is not saved, the situation in which the first predetermined processing is being executed is changed to the situation in which the second predetermined processing is executed, or the situation in which the second predetermined processing is executed is changed. In this case, the information of the stack pointer becomes fixed information. Therefore, even if the information of the stack pointer is not saved as described above, it is possible to return to the information of the stack pointer before the start of the second predetermined process. It is possible.

Feature N5. The predetermined storage means,
A first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined processing is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined processing is executed;
With
The gaming machine according to the feature N4, wherein the evacuation execution unit evacuates the predetermined information to the second predetermined storage area.

  According to the feature N5, since the first storage area and the second predetermined storage area are provided in the predetermined storage means, the storage destination of the information in the predetermined storage means can be determined by the first predetermined processing and the second predetermined processing. It is possible to make a clear difference. This makes it possible to prevent information used in the other process from being erased when one of the first predetermined process and the second predetermined process is executed. In this case, when a situation where the second predetermined processing is executed from a situation where the first predetermined processing is executed or a situation where the second predetermined processing is executed is obtained, at least a part stored in the internal storage means is stored. Is saved in the second predetermined storage area. This makes it possible to save the information in the internal storage unit immediately before the start of the second predetermined processing, and to save the information without using the first predetermined storage area.

Feature N6. The first predetermined storage area is capable of storing information and reading information when the first predetermined processing is performed, and is capable of reading information when the second predetermined processing is performed. It is impossible to memorize information of things,
The second predetermined storage area can store information and read information when the second predetermined processing is performed, and can read information when the first predetermined processing is performed. The gaming machine according to feature N5, wherein the information of the object cannot be stored.

  According to the feature N6, the first predetermined storage area can be handled as a dedicated storage area for the first predetermined processing, and the second predetermined storage area can be handled as a dedicated storage area for the second predetermined processing. Becomes

  In addition, with respect to the configuration of the features N1 to N6, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Character O group>
Feature O1. A control unit (main CPU 63) for executing various processes and temporarily storing information in an internal storage unit (register of the main CPU 63) when executing the processes;
The control means,
A first predetermined process executing means for executing a first predetermined process of the various processes (a function of executing a process other than the management execution process by the main CPU 63 in the fifteenth to twenty-first embodiments);
A second predetermined process executing means for executing a second predetermined process among the various processes (a function of executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
In a case where the situation in which the first predetermined processing is being executed is changed to a situation in which the second predetermined processing is executed, or in a case in which the second predetermined processing is executed, at least a part of the storage in the internal storage means is performed. The first state setting means (steps S4803 to S4808 in the main CPU 63) for setting the state of a predetermined storage area (WA register, BC register, DE register, HL register, IX register, and IY register) to a predetermined state. Function to perform)
When or after the second predetermined processing is completed, a second state setting means (a function of executing the processing of steps S4903 to S4908 in the main CPU 63) for setting the state of the predetermined storage area to the predetermined state;
A gaming machine comprising:

  According to the characteristic O1, when the situation where the first predetermined processing is being executed is changed to the situation where the second predetermined processing is executed, or when the situation where the second predetermined processing is executed is reached, the predetermined storage area of the internal storage means is set. Is set to the predetermined state, and when or after the second predetermined processing is completed, the state of the predetermined storage area is set to the predetermined state again. Thus, the state of the predetermined storage area can be set to the predetermined state before and after the second predetermined processing. Therefore, it is possible to prevent the state of the predetermined storage area by one of the first predetermined processing and the second predetermined processing from affecting the other processing. As described above, various controls can be suitably performed.

  Feature O2. The gaming machine according to feature O1, wherein the predetermined state is a state when supply of operation power to the control unit is started.

  According to the feature O2, since the predetermined storage area is set as the predetermined state in a state when the supply of the operation power to the control unit is started, the processing configuration for setting the predetermined state is simplified. Becomes possible.

  Feature O3. The gaming machine according to feature O1 or O2, wherein the predetermined state is a state in which the predetermined storage area is cleared to “0”.

  According to the feature O3, the predetermined storage area is set to the state where “0” is cleared as the predetermined state, so that the processing configuration for setting the predetermined state can be simplified.

  Feature O4. The gaming machine according to any one of features O1 to O3, wherein the predetermined storage area is a partial storage area in the internal storage unit.

  According to the feature O4, since only a part of the storage area of the internal storage means is set to the predetermined state, it is possible to reduce the processing load for setting the predetermined state.

Feature O5. The internal storage means includes at least the predetermined storage area and another storage area (a register other than the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register),
The second predetermined processing execution means is configured to store information in the predetermined storage area in the second predetermined processing, but not to store information in the separate storage area,
The gaming machine according to claim O4, wherein said first state setting means and said second state setting means do not change the state of said separate storage area.

  According to the feature O5, when the situation where the first predetermined processing is executed is changed to the situation where the second predetermined processing is executed, or when the situation where the second predetermined processing is executed is reached, the second predetermined processing is performed in the internal storage means. A predetermined storage area for storing information is set in a predetermined state. Thereby, it is possible to prevent the state of the predetermined storage area by the first predetermined processing from affecting the second predetermined processing. Also, since the state of the separate storage area is not changed, setting the predetermined state when the second predetermined processing is started may not affect the processing after the second predetermined processing is completed. It becomes possible.

  Feature O6. The information of the features O1 to O5, wherein the information of the predetermined storage area before the setting of the predetermined state by the first state setting means is information that is not used after the completion of the second predetermined processing. A gaming machine according to any one of the preceding claims.

  According to the feature O6, even if the predetermined storage area is set to the predetermined state when the second predetermined processing is executed or when the second predetermined processing is executed, the second predetermined processing is terminated. It is possible not to affect the processing after the processing.

Feature O7. When the situation in which the first predetermined processing is being executed is changed to a situation in which the second predetermined processing is executed, or when the situation in which the second predetermined processing is executed is reached, a part stored in the internal storage means. Evacuation execution means (a function of executing the processing of step S4802 in the main CPU 63) for evacuation of the predetermined information (information of the flag register) which is the information of the above in the predetermined storage means (main RAM 65);
When or after the second predetermined process is completed, a return execution unit that returns the predetermined information saved in the predetermined storage unit to the internal storage unit (a function of executing the process of step S4810 in the main CPU 63). When,
The gaming machine according to any one of features O1 to O6, comprising:

  According to the characteristic O7, when the situation where the second predetermined processing is executed is changed from the situation where the first predetermined processing is executed, or when the situation where the second predetermined processing is executed is stored in the internal storage means. The predetermined information, which is a part of the information, is saved in the predetermined storage means. Thus, when the second predetermined process is executed, the information stored in the internal storage unit at the time of executing the first predetermined process and the information required at the time of executing the subsequent first predetermined process is rewritten. It is possible to make it not. When or after the second predetermined process is completed, the predetermined information saved in the predetermined storage unit is returned to the internal storage unit. Thus, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage unit before the execution of the second predetermined process.

Feature O8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features O1 to O7, wherein the second predetermined process includes a process for managing a game history.

  According to the feature O8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent information used in the processing for managing the game history from being rewritten when executing the processing for the game.

Feature O9. The predetermined storage means,
A first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined processing is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined processing is executed;
With
The second predetermined storage area is a history storage area (normal counter area 231, open / close execution mode counter area 232) in which, when a predetermined event occurs due to execution of a game, history information of the game corresponding to the event is stored. The gaming machine according to feature O8, further comprising a high-frequency support mode counter area 233).

  According to the feature O9, when a predetermined event has occurred, history information corresponding to the event is stored in the history storage area. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. During execution, it is possible to prevent information stored in the history storage area from being rewritten.

  Feature O10. The second predetermined process executing means is an information deriving means (step S4208 in the main CPU 63) for deriving mode information corresponding to a game result in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature O9, further comprising a function of executing the processing of (1).

  According to the feature O10, the mode information corresponding to the result of the game in the predetermined period is derived using the history information stored in the history storage area, thereby managing the game history such as the frequency of occurrence of the predetermined event. The result can be grasped.

  Feature O11. The gaming machine according to Feature O10, wherein the second predetermined storage area includes a mode information storage area (operation result storage area 234) for storing the mode information derived by the information deriving unit.

  According to the feature O11, when the mode information corresponding to the result of the game in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. Thereby, it is possible to grasp the management result of the game history at an arbitrary timing. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. At the time of execution, it is possible to prevent the information stored in the aspect information storage area from being rewritten.

  In addition, with respect to the configuration of the features O1 to O11, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Character P group>
Feature P1. A control unit (main CPU 63) for executing various processes and temporarily storing information in an internal storage unit (register of the main CPU 63) when executing the processes;
The control means,
A first predetermined process executing means for executing a first predetermined process of the various processes (a function of executing a process other than the management execution process by the main CPU 63 in the fifteenth to twenty-first embodiments);
A second predetermined process executing means for executing a second predetermined process among the various processes (a function of executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
A first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined processing is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined processing is executed;
A gaming machine comprising:

  According to the feature P1, the first predetermined storage area and the second predetermined storage area are provided, the first predetermined storage area is treated as a storage area dedicated to the first predetermined processing, and the second predetermined storage area is It is handled as a dedicated storage area for the second predetermined process. Thus, it is possible to make the storage destination of the information in the predetermined storage device clearly different between the first predetermined processing and the second predetermined processing. Therefore, it is possible to prevent information used in the other processing from being erased when one of the first predetermined processing and the second predetermined processing is executed.

Feature P2. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to Feature P1, wherein the second predetermined process includes a process for managing a game history.

  According to the feature P2, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent information used in the processing for managing the game history from being rewritten when executing the processing for the game.

  Feature P3. The second predetermined storage area is a history storage area (normal counter area 231, open / close execution mode counter area 232) in which, when a predetermined event occurs due to the execution of a game, history information of the game corresponding to the event is stored. The gaming machine according to feature P2, characterized by including a high-frequency support mode counter area 233).

  According to the feature P3, when a predetermined event has occurred, history information corresponding to the event is stored in the history storage area. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. During execution, it is possible to prevent information stored in the history storage area from being rewritten.

  Feature P4. The second predetermined process executing means is an information deriving means (step S4208 in the main CPU 63) for deriving mode information corresponding to a game result in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature P3, further comprising:

  According to the feature P4, management of the game history such as the frequency of occurrence of the predetermined event is performed by using the history information stored in the history storage area to derive the mode information corresponding to the result of the game in the predetermined period. The result can be grasped.

  Feature P5. The gaming machine according to Feature P4, wherein the second predetermined storage area includes a mode information storage area (operation result storage area 234) for storing the mode information derived by the information deriving unit.

  According to the feature P5, when the mode information corresponding to the result of the game in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. Thereby, it is possible to grasp the management result of the game history at an arbitrary timing. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. At the time of execution, it is possible to prevent the information stored in the aspect information storage area from being rewritten.

Feature P6. In a case where the situation in which the first predetermined processing is being executed is changed to a situation in which the second predetermined processing is executed, the first predetermined information, which is a part of the information stored in the internal storage means, is used in the first predetermined processing. First evacuation means for evacuation to the first predetermined storage area (a function of executing the processing of step S3802 in the main CPU 63 in the fifteenth embodiment, and executing a processing of step S4402 in the main CPU 63 in the sixteenth embodiment) Function),
When the situation in which the first predetermined process is being executed is changed to a situation in which the second predetermined process is executed, the second predetermined information, which is a part of the information stored in the internal storage means, is replaced with the second predetermined process. A second evacuation unit (in the fifteenth embodiment, a function for executing the processing of steps S3902 to S3907 in the main CPU 63, and in the seventeenth embodiment, a function of executing the processing in steps S4502 to S4502 in the main CPU 63). (The function of executing the processing of step S4507, the function of executing the processing of step S4602 in the main CPU 63 in the eighteenth embodiment, and the function of executing the processing of steps S4701 and S4703 in the main CPU 63 in the nineteenth embodiment) When,
The gaming machine according to any one of features P1 to P5, comprising:

  According to the feature P6, the first predetermined information, which is a part of the information stored in the internal storage means, is saved in the first predetermined storage area in the first predetermined processing, and the partial information stored in the internal storage means is saved. Is saved in the second predetermined storage area in the second predetermined process. This makes it possible to perform the saving at a timing suitable for each piece of information stored in the internal storage means, and to execute the processing for saving the information in a distributed manner between the first predetermined processing and the second predetermined processing. It becomes possible.

Feature P7. When the second predetermined processing is completed or after the first predetermined processing is completed, first return execution means (in the fifteenth embodiment, mainly the first return execution means) for returning the first predetermined information saved in the first predetermined storage area to the internal storage means. A function of executing the processing of step S3804 in the side CPU 63, and a function of executing the processing of step S4404 in the main CPU 63 in the sixteenth embodiment);
When or after the second predetermined process is completed, a second return execution unit (in the fifteenth embodiment, mainly the second return execution unit) that returns the second predetermined information saved in the second predetermined storage area to the internal storage unit. The function of executing the processing of steps S3910 to S3915 in the side CPU 63, the function of executing the processing of steps S4510 to S4515 in the main CPU 63 in the seventeenth embodiment, and the step S4605 of the main CPU 63 in the eighteenth embodiment. A function of executing processing, in the nineteenth embodiment, a function of executing the processing of steps S4705 and S4706 in the main CPU 63), and
The gaming machine according to feature P6, comprising:

  According to the feature P7, when or after the second predetermined process ends, the first predetermined information saved in the first predetermined storage area is returned to the internal storage unit, and the first predetermined information saved in the second predetermined storage area is returned to the second storage area. (2) Since the predetermined information is returned to the internal storage means, it is possible to return the state of the internal storage means to a state before the second predetermined processing is started.

  Feature P8. The gaming machine according to feature P6 or P7, wherein the first predetermined information includes information of a flag register provided in the internal storage means.

  According to the feature P8, it is possible to appropriately save the information of the flag register in the situation where the first predetermined process is being executed.

  Feature P9. The gaming machine according to any one of features P6 to P8, wherein the second predetermined information includes information of all registers of the internal storage means.

  According to the feature P9, since the information of all the registers of the internal storage means is saved at a time, it is not necessary to selectively save the information of the registers.

Feature P10. The second predetermined storage area is:
A stack area (stack area 224 for non-specific control) in which information is written by a push instruction and information is read by a pop instruction;
A work area in which information is written and read by a load instruction (a work area 223 for non-specific control);
With
The gaming machine according to Feature P9, wherein the second evacuation execution unit evacuates the second predetermined information to one of the stack area and the work area.

  According to the feature P10, the information of all the registers of the internal storage means is saved in one of the stack area and the work area in the second predetermined storage area. As a result, the save destinations of the information of all the registers can be consolidated, and the processing configuration for saving and the processing configuration for restoring can be simplified.

  Feature P11. The gaming machine according to Feature P10, wherein the second evacuation execution unit evacuates the second predetermined information into the stack area.

  According to the feature P11, it is possible to save information of all registers while not using the work area.

  Feature P12. The gaming machine according to any one of features P6 to P11, wherein the second predetermined information includes information of a stack pointer of the internal storage means.

  According to the feature P12, it is possible to appropriately save the information of the stack pointer in the situation where the first predetermined process is being executed.

  In addition, with respect to the configuration of the features P1 to P12, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

  According to the inventions related to the feature L group, the feature M group, the feature N group, the feature O group, and the feature P group, the following problems can be solved.

  Pachinko game machines and slot machines are known as game machines. For example, a pachinko game machine has a dish storage section for storing game balls given to a player on the front of the game machine, and the game balls stored in the dish storage section are guided to a game ball launching device. The game is fired toward the game area in accordance with the shooting operation of the player. Then, for example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the dish storage unit, for example. In a pachinko gaming machine, a configuration having an upper dish storage section and a lower dish storage section as dish storage sections is also known. In this case, game balls stored in the upper dish storage section are used to launch game balls. The game balls guided by the device and surplus in the upper dish storage section are discharged to the lower dish storage section.

  Further, in the slot machine, when a new game is started by operating the start lever while a medal is bet, a lottery process is executed by the control means. Further, when the lottery process is executed, the rotation of the reel is started by the rotation start control being executed by the control means, and when the stop button is operated during the rotation of the reel, the control means executes the rotation start control. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the rotation stop of the reels corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

  Here, in the gaming machine as exemplified above, it is necessary to appropriately perform various controls, and there is still room for improvement in this regard.

<Characteristic Q group>
Feature Q1. A control unit (MPU 62) for executing various processes and temporarily storing information in an internal storage unit (register of the main CPU 63) when executing the processes;
History storage means (management RAM 241) provided as a separate chip from the control means and capable of temporarily storing information;
With
The control means is a history storage execution means (when the predetermined event occurs by the execution of the game, the history information of the game corresponding to the predetermined event is stored in the history storage means (normal entry management processing in the main CPU 63, A game machine having a function of executing a ball entry management process in the open / close execution mode and a ball entry management process in the high frequency support mode.

  According to the feature Q1, when a predetermined event occurs, history information corresponding to the event is stored in the history storage unit. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, since the history storage unit is provided as a separate chip from the control unit, it is possible to increase the storage capacity for storing history information while using a general-purpose control unit.

  Feature Q2. The gaming machine according to Feature Q1, wherein the control means includes a predetermined storage means (main RAM 65) for temporarily storing information when executing various processes.

  According to the feature Q2, in a configuration in which not only the predetermined storage means provided in the control means but also the history storage means provided as a separate chip from the control means, the history information is stored in the history storage means. Many history information can be stored and held.

  Feature Q3. The gaming machine according to Feature Q2, wherein the control unit temporarily stores information in the predetermined storage unit when executing a process related to the history information.

  According to the feature Q3, in a configuration in which the history storage means for storing the history information is provided as a separate chip from the control means, when processing relating to the history information is performed, the predetermined storage means provided in the control means is provided. Since the information is temporarily stored, it is possible to prevent the processing speed when executing the process regarding the history information from being extremely reduced.

  Feature Q4. The control unit uses the history information stored in the history storage unit to derive mode information corresponding to the result of the game in a predetermined period (the process of step S4208 in the main CPU 63 is executed). The gaming machine according to any one of features Q1 to Q3, comprising:

  According to the feature Q4, by using the history information stored in the history storage means to derive the mode information corresponding to the game result in the predetermined period, the management of the game history such as the frequency of occurrence of the predetermined event is performed. The result can be grasped.

  Feature Q5. The gaming machine according to Feature Q4, wherein the second predetermined storage area includes a mode information storage area (operation result storage area 234) for storing the mode information derived by the information deriving unit.

  According to the feature Q5, when the mode information corresponding to the result of the game in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. Thereby, it is possible to grasp the management result of the game history at an arbitrary timing.

  In addition, with respect to the configuration of the features Q1 to Q5, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

  According to the invention relating to the feature Q group, the following problem can be solved.

  Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front of the game machine, and the game balls stored in the dish storage section are guided to a game ball launching device. The game is fired toward the game area in accordance with the shooting operation of the player. Then, for example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the dish storage unit, for example. In a pachinko gaming machine, a configuration having an upper dish storage section and a lower dish storage section as dish storage sections is also known. In this case, game balls stored in the upper dish storage section are used to launch game balls. The game balls guided by the device and surplus in the upper dish storage section are discharged to the lower dish storage section.

  Further, in the slot machine, when a new game is started by operating the start lever while a medal is bet, a lottery process is executed by the control means. Further, when the lottery process is executed, the rotation of the reel is started by the rotation start control being executed by the control means, and when the stop button is operated during the rotation of the reel, the control means executes the rotation start control. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the rotation stop of the reels corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

  Here, in the gaming machines such as those described above, it is necessary to appropriately manage the gaming machines, and there is still room for improvement in this regard.

<Characteristic R group>
Feature R1. Setting means (a function of executing a setting value updating process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage;
When the supply of the operating power to the control unit having the setting unit is started, based on the fact that a plurality of events including the first event and the second event have occurred, the operation unit becomes the target of use by the setting unit. Situation generating means for setting a settable state in which a setting value can be set (a function of executing the processing of steps S5003 to S5006 in the main CPU 63 in the twenty-second embodiment, a main CPU 63 in another embodiment) , The function of executing the processing of steps S5703 to S5705 and step S5715 in the main CPU 63 in the twenty-third embodiment),
A gaming machine comprising:

  According to the feature R1, since a setting value to be used is set from among a plurality of setting values corresponding to the player's advantage, the player can use a more advantageous setting value. That you expect. In this case, in order to set the set value to be used, a plurality of events including the first event and the second event occur when the supply of the operating power to the control unit is started. Need to be. As a result, it is possible to make it difficult to perform the setting of the setting value to be used by fraudulently.

Feature R2. Open grasping means for grasping that the opening / closing body (front door frame 14) is in an open state (a function of executing the processing of step S5005 in the main CPU 63 in the twenty-second embodiment, a step in the main CPU 63 in another embodiment) S5505, the function of executing the processing of step S5703 in the main CPU 63 in the twenty-third embodiment).
The condition generating means specifies that the first event has occurred based on the fact that the opening / closing body is in an open state by the opening grasping means. A gaming machine according to claim 1.

  According to the feature R2, the opening / closing body needs to be in an open state in order to set the setting value to be used. As a result, when an act of illegally setting a setting value to be used is performed, it is possible to make the illegal act stand out, and as a result, the illegal act can be easily found. .

Feature R3. Another opening grasping means (a function of executing the process of step S5006 in the main CPU 63 in the twenty-second embodiment; a function of executing the main CPU 63 in the other embodiment) for grasping that the other opening / closing body (game machine body 12) is in the open state. , The function of executing the processing of step S5704 in the main CPU 63 in the twenty-third embodiment).
The situation generating means specifies that the second event has occurred based on the fact that the separate opening / closing body is in an open state being grasped by the separate opening grasping means. The gaming machine according to Feature R2.

  According to the feature R3, in order to set the setting value to be used, it is necessary to open not only the open / close body but also another open / close body. Accordingly, it is possible to make it difficult to perform an act of setting a setting value to be used due to fraud, and it is possible to make the fraudulent act conspicuous.

Feature R4. The setting means sets at least one of the selection of the setting value to be used and the setting of the setting value to be used based on the operation of the predetermined operation means (the update button 68b and the reset button 68c). Configuration to perform,
The gaming machine according to Feature R2 or R3, wherein the predetermined operation means is configured to be operable by opening another opening / closing body.

  According to the feature R4, the setting value to be used cannot be set unless an opening / closing body different from the other opening / closing body that is opened in order to enable the predetermined operation means to be operated is opened. Accordingly, it is possible to make it difficult to perform an act of setting a setting value to be used due to fraud, and it is possible to make the fraudulent act conspicuous.

Feature R5. The opening and closing body defines the front side of the gaming machine in a gaming area where the gaming ball flows down,
The gaming machine according to any one of features R2 to R4, wherein the gaming area is opened forward of the gaming machine by opening the opening / closing body.

  According to the feature R5, in order to set the setting value to be used, it is necessary to open the opening / closing body and open the game area in front of the gaming machine. Accordingly, it is possible to make it difficult to perform an act of setting a setting value to be used due to fraud, and it is possible to make the fraudulent act conspicuous.

  Feature R6. The situation generating means specifies that one of the plurality of events has occurred, based on the fact that a predetermined operation is performed on the setting key insertion section (setting key insertion section 68a) using the setting key. The gaming machine according to any one of features R1 to R5.

  According to the feature R6, in order to set the setting value to be used, it is necessary not only to perform a predetermined operation using the setting key for the setting key insertion unit but also to generate another event. is there. As a result, it is possible to make it difficult to perform the setting of the setting value to be used by fraudulently.

  Feature R7. The situation generating means generates a predetermined game event (operation of the firing operation device 28, entering the through gate 35) based on occurrence of a predetermined game event that occurs when the game is performed, and The gaming machine according to any one of features R1 to R6, wherein it is specified that one of the events has occurred.

  According to the feature R7, in order for the setting value to be used to be set, it is not only necessary to generate a predetermined game event that occurs when a game is performed, but also separately from that. Must occur. As a result, it is possible to make it difficult to perform the setting of the setting value to be used by fraudulently.

  Feature R8. The situation generating means is based on the detection of the game ball by the ball detection means (gate detection sensor 49a) for detecting that the game ball has entered a predetermined ball portion provided in the game area. The gaming machine according to any one of features R1 to R7, wherein one of the plurality of events is identified as having occurred.

  According to the feature R8, in order for the setting value to be used to be set, it is necessary to cause the game ball to enter a predetermined entry portion and to generate another event. There is. As a result, it is possible to make it difficult to perform the setting of the setting value to be used by fraudulently.

Feature R9. A setting value notifying unit (a function of executing a setting confirmation process in the main CPU 63) for notifying the setting value to be used set by the setting unit by the notifying unit;
The set value notifying unit sends the set value to be used set by the setting unit to the notifying unit based on a plurality of events including the first event and the second event occurring. The gaming machine according to any one of features R1 to R8, wherein the game machine is notified of the game.

  According to the feature R9, it is possible to make it difficult to perform the act of confirming the set value due to fraud. In addition, the manager of the game hall can generate the first event and the second event regardless of whether to set the set value to be used or to check the set value. It becomes common and each work becomes easy to grasp.

Feature R10. Setting means (a function of executing a setting value updating process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage;
A plurality of events including both that a predetermined operation is performed on the setting key insertion unit (setting key insertion unit 68a) using the setting key and another event different from the predetermined operation using the setting key on the setting key insertion unit are different. On the basis of the fact that the setting has occurred, the setting means sets the setting value to be used by the setting means in a setting possible state (in the twenty-second embodiment, the main CPU 63 A function of executing the processing of steps S5003 to S5006, a function of executing the processing of steps S5503 to S5507 in the main CPU 63 in another embodiment, and a function of executing steps S5703 to S5705 and S5715 of the main CPU 63 in the twenty-third embodiment. Function to perform processing),
A gaming machine comprising:

  According to the feature R10, since a setting value to be used is set from among a plurality of setting values corresponding to the player's advantage, the player can use a more advantageous setting value. That you expect. In this case, in order to set the setting value to be used, it is necessary not only to perform a predetermined operation using the setting key for the setting key insertion unit but also to generate another event. As a result, it is possible to make it difficult to perform the setting of the setting value to be used by fraudulently.

Feature R11. Open grasping means for grasping that the opening / closing body (front door frame 14) is in an open state (a function of executing the processing of step S5005 in the main CPU 63 in the twenty-second embodiment, a step in the main CPU 63 in another embodiment) S5505, the function of executing the processing of step S5703 in the main CPU 63 in the twenty-third embodiment).
The feature R10 is characterized in that the situation generating means specifies that the different event has occurred based on the fact that the opening / closing body is in an open state being grasped by the opening grasping means. The gaming machine described.

  According to the feature R11, the opening / closing body needs to be in an open state in order to set the setting value to be used. As a result, when an act of illegally setting a setting value to be used is performed, it is possible to make the illegal act stand out, and as a result, the illegal act can be easily found. .

Feature R12. Another opening grasping means (a function of executing the process of step S5006 in the main CPU 63 in the twenty-second embodiment; a function of executing the main CPU 63 in the other embodiment) for grasping that the other opening / closing body (game machine body 12) is in the open state. , The function of executing the processing of step S5704 in the main CPU 63 in the twenty-third embodiment).
The situation generating means specifies that one of the plurality of events has occurred based on the fact that the separate opening / closing body is in the open state being grasped by the separate opening grasping means. The gaming machine according to Feature R11, characterized in that:

  According to the feature R12, in order to set the setting value to be used, it is necessary to open not only the open / close body but also the other open / close body. Accordingly, it is possible to make it difficult to perform an act of setting a setting value to be used due to fraud, and it is possible to make the fraudulent act conspicuous.

Feature R13. The setting means sets at least one of the selection of the setting value to be used and the setting of the setting value to be used based on the operation of the predetermined operation means (the update button 68b and the reset button 68c). Configuration to perform,
The gaming machine according to feature R11 or R12, wherein the predetermined operation means is configured to be operable by opening another opening / closing body in an open state.

  According to the feature R13, the setting value to be used cannot be set unless an opening / closing body that is different from the other opening / closing body that is opened to enable the predetermined operation unit to be operated is opened. Accordingly, it is possible to make it difficult to perform an act of setting a setting value to be used due to fraud, and it is possible to make the fraudulent act conspicuous.

Feature R14. The opening and closing body defines the front side of the gaming machine in a gaming area where the gaming ball flows down,
The gaming machine according to any one of features R11 to R13, wherein the gaming area is opened forward of the gaming machine by setting the opening / closing body to an open state.

  According to the feature R14, in order for the setting value to be used to be set, it is necessary to open the opening / closing body and open the game area to the front of the gaming machine. Accordingly, it is possible to make it difficult to perform an act of setting a setting value to be used due to fraud, and it is possible to make the fraudulent act conspicuous.

  Feature R15. The situation generating means generates a predetermined game event (operation of the firing operation device 28, entering the through gate 35) based on occurrence of a predetermined game event that occurs when the game is performed, and The gaming machine according to any one of features R10 to R14, wherein it is specified that one event has occurred.

  According to the feature R15, in order to set the setting value to be used, not only the predetermined operation with the setting key for the setting key insertion unit but also the predetermined value generated when the game is performed is performed. Must be generated. As a result, it is possible to make it difficult to perform the setting of the setting value to be used by fraudulently.

  Feature R16. The situation generating means is based on the detection of the game ball by the ball detection means (gate detection sensor 49a) for detecting that the game ball has entered a predetermined ball portion provided in the game area. The gaming machine according to any one of features R10 to R15, wherein one of the plurality of events is identified as having occurred.

  According to the feature R16, in order to set the setting value to be used, not only the predetermined operation with the setting key for the setting key insertion portion but also the insertion of the game ball into the predetermined ball entry portion is performed. You need to ball. As a result, it is possible to make it difficult to perform the setting of the setting value to be used by fraudulently.

Feature R17. A setting value notifying unit (a function of executing a setting confirmation process in the main CPU 63) for notifying the setting value to be used set by the setting unit by the notifying unit;
The setting value notifying unit is configured to execute the setting unit based on the fact that the predetermined operation is performed by the setting key on the setting key insertion unit and that a plurality of events including both the different events have occurred. The gaming machine according to any one of features R10 to R16, wherein the setting value to be used set by the above is notified by the notifying unit.

  According to the feature R17, it is possible to make it difficult to perform an act of confirming a set value due to fraud. In addition, the administrator of the gaming hall performs a predetermined operation using the setting key for the setting key insertion portion and generates another event regardless of whether the setting value to be used is set or the setting value is confirmed. Since it is sufficient to perform the work, the work is shared and each work becomes easy to grasp.

  In addition, with respect to the configuration of the features R1 to R17, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

  According to the invention relating to the feature R group, the following problem can be solved.

  Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front of the game machine, and the game balls stored in the dish storage section are guided to a game ball launching device. The game is fired toward the game area in accordance with the shooting operation of the player. Then, for example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the dish storage unit, for example. In a pachinko gaming machine, a configuration having an upper dish storage section and a lower dish storage section as dish storage sections is also known. In this case, game balls stored in the upper dish storage section are used to launch game balls. The game balls guided by the device and surplus in the upper dish storage section are discharged to the lower dish storage section.

  Further, in the slot machine, when a new game is started by operating the start lever while a medal is bet, a lottery process is executed by the control means. Further, when the lottery process is executed, the rotation of the reel is started by the rotation start control being executed by the control means, and when the stop button is operated during the rotation of the reel, the control means executes the rotation start control. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the rotation stop of the reels corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

  Here, in the gaming machines such as those described above, it is necessary to deal with fraud on the gaming machines, and there is still room for improvement in this regard.

<Characteristic S group>
Feature S1. Setting means (a function of executing a setting value updating process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage;
Situation generating means (in the twenty-second embodiment, steps S5003 to S5006 and S5401 in the main CPU 63 in the twenty-second embodiment) for setting the setting value to be used by the setting means. A function of executing the processing of step S5408, in another embodiment, a function of executing the processing of steps S5503 to S5507 in the main CPU 63, and in the twenty-third embodiment, executing the processing of steps S5703 to S5705 and step S5715 in the main CPU 63. In the twenty-fourth embodiment, the function of executing the processing of steps S5801 to S5804 in the main CPU 63, and in the twenty-fifth embodiment, the processing of steps S5901 to S5904 in the main CPU 63 is executed. And ability),
Setting value grasping means for grasping whether or not the set value before the settable state is equal to the set value set by the setting means (in the twenty-second embodiment, step S5017 in the main CPU 63 in the main CPU 63) And a function of executing the processing of steps S5111 to S5112, in another embodiment, a function of executing the processing of steps S5611 to S5612 in the main CPU 63);
A gaming machine comprising:

  According to the feature S1, since a setting value to be used is set from among a plurality of setting values corresponding to the player's advantage, the player can use a more advantageous setting value. That you expect. In this case, it is determined whether or not the set value before the settable state is the same as the set value set in the settable state. This makes it possible to execute a process corresponding to whether or not the set values are the same with respect to the settable state. Therefore, when the setting value to be used is set, a favorable situation can be generated for the setting result, and the setting value setting operation can be performed appropriately.

  Feature S2. Based on the fact that the set value before the settable state is the same as the set value set by the setting unit has been grasped by the set value grasping unit, the same time process corresponding thereto is performed. The same-time means to be executed (the function of executing the processing of step S5113 in the main CPU 63 in the twenty-second embodiment, the function of executing the processing of step S5613 in the main CPU 63 in another embodiment) The gaming machine according to feature S1, characterized in that:

  According to the feature S2, when the set values are the same with respect to the settable state, the same-time process is executed, thereby making it possible to generate a preferable situation for the set values being the same. Become.

  Feature S3. The gaming machine according to claim S2, wherein said same-time means executes, as said same-time process, a process for performing notification corresponding to the fact that said set value has not been changed.

  According to the feature S3, it is possible to notify the manager of the gaming hall or the like that the set values are the same across the settable state.

  Feature S4. Based on the fact that the set value is different from the set value before the settable state is reached by the set means, the corresponding non-identical processing is executed based on the fact that the set value grasp means has grasped the difference. (A function of executing the processing of step S5114 in the main CPU 63 in the twenty-second embodiment, and a function of executing the processing of step S5614 in the main CPU 63 in another embodiment). The gaming machine according to any one of features S1 to S3.

  According to the feature S4, when the set values are not the same across the settable state, the non-identical process is executed, so that a favorable situation can be generated when the set value is changed. Becomes

  Feature S5. The gaming machine according to claim S4, wherein said non-identical means executes, as said non-identical processing, a process for performing notification corresponding to said change of said set value. .

  According to the feature S5, it is possible to notify the administrator of the gaming hall or the like that the set value has been changed with the settable state in between.

  Feature S6. The situation generating means, after the supply of the operating power to the control means having the setting means is started, based on the necessity of erasing the information in the storage means for storing the set value, The gaming machine according to any one of features S1 to S5, wherein a possible state is set.

  According to the feature S6, when it becomes necessary to delete the information of the storage means for storing the set value, the setting is possible, so that the game is continued despite the information of the set value being deleted. It is possible to make it not. In this case, the configuration of the characteristic S1 is provided, and it is determined whether or not the set value before the settable state is the same as the set value set in the settable state. This makes it possible to execute a process corresponding to whether or not the set values are the same with respect to the settable state.

  Feature S7. The set value is not changed based on the fact that the set value grasped by the set value grasping means that the set value before the settable state is equal to the set value set by the setting means is not changed. (A function of executing the processing of step S5113 in the main CPU 63 in the twenty-second embodiment, and a function of executing the processing of step S5613 in the main CPU 63 in another embodiment). The gaming machine according to feature S6, comprising:

  According to the feature S7, even if the settable state is set with the erasure of the information in the storage means, the set value is changed if the set values are the same with the settable state interposed therebetween. A notification corresponding to the absence is provided. This enables the player to be notified that the set value has not been changed even if the setting is possible in the middle of the game, and the player is safe even if the setting is possible in the middle of the game. It is possible to continue the game with care.

Feature S8. The situation generating means,
A first situation generating means (in the twenty-second embodiment, steps S5003 to S5003 in the main CPU 63) for making the setting possible based on the start of the supply of the operating power to the control means having the setting means. A function of executing the processing of step S5006, in another embodiment, a function of executing the processing of steps S5503 to S5507 in the main CPU 63, and in the twenty-third embodiment, executing the processing of steps S5703 to S5705 and step S5715 of the main CPU 63. Function), and
A second state in which the settable state is set based on the necessity of erasing the information in the storage unit that stores the set value after the supply of the operation power to the control unit is started. Generating means (the function of executing the processing of steps S5401 to S5408 in the main CPU 63 in the twenty-second embodiment; the function of executing the processing of steps S5801 to S5804 in the main CPU 63 in the twenty-fourth embodiment; In the embodiment, the main CPU 63 performs the processing of steps S5901 to S5904) and
With
The setting value grasping unit may be configured to determine whether the settable state is generated by the first state generating unit or the settable state generated by the second state generating unit before the settable state is reached. The gaming machine according to any one of features S1 to S7, wherein it is determined whether or not the set value and the set value set by the setting unit are the same.

  According to the feature S8, when it is necessary to delete the information of the storage unit that stores the set value, the setting is possible, so that the game is continued even though the information of the set value is deleted. It is possible to make it not. In this case, by using the same processing as in the case where the setting is possible based on the start of the supply of the operating power to the control unit, the setting possible is performed in accordance with the erasure of the information in the storage unit. In the case where the error has occurred, it is possible to execute processing corresponding to whether or not the set values are the same with the settable state interposed therebetween.

  In addition, with respect to the configuration of the features S1 to S8, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

  According to the invention relating to the above-described feature S group, the following problem can be solved.

  Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front of the game machine, and the game balls stored in the dish storage section are guided to a game ball launching device. The game is fired toward the game area in accordance with the shooting operation of the player. Then, for example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the dish storage unit, for example. In a pachinko gaming machine, a configuration having an upper dish storage section and a lower dish storage section as dish storage sections is also known. In this case, game balls stored in the upper dish storage section are used to launch game balls. The game balls guided by the device and surplus in the upper dish storage section are discharged to the lower dish storage section.

  Further, in the slot machine, when a new game is started by operating the start lever while a medal is bet, a lottery process is executed by the control means. Further, when the lottery process is executed, the rotation of the reel is started by the rotation start control being executed by the control means, and when the stop button is operated during the rotation of the reel, the control means executes the rotation start control. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the rotation stop of the reels corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

  Here, in a gaming machine such as the above-described example, when a setting value for determining the advantage of the gaming machine is set, it is necessary to generate a suitable situation for the setting value, and this point is still improved. There is room for

<Characteristic T group>
Feature T1. A control unit (main CPU 63) for executing various processes and temporarily storing information in an internal storage unit (register of the main CPU 63) when executing the processes;
The control means,
A first predetermined process executing means for executing a first predetermined process of the various processes (a function of executing processes other than the management execution process by the main CPU 63 in the fifteenth to twenty-fifth embodiments);
A second predetermined process executing means for executing a second predetermined process among the various processes (a function of executing a management execution process by the main CPU 63 in the fifteenth to twenty-fifth embodiments);
A first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined processing is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined processing is executed;
A first monitoring execution unit that monitors whether the first predetermined storage area is normal (a function of executing the processing of steps S5401 to S5404 in the main CPU 63 in the twenty-second embodiment, a function of executing the processing in the twenty-fourth embodiment) A function of the main CPU 63 for executing the processing of steps S5801 to S5804, a function of executing the processing of steps S5901 to S5904 in the main CPU 63 in the twenty-fifth embodiment, and a step S7701 of the main CPU 63 in the thirty-second embodiment. To execute the process of step S7703);
A second monitoring execution unit that monitors whether the second predetermined storage area is normal (in the twenty-second embodiment, a function of executing the processing of steps S5405 to S5408 in the main CPU 63; in the twenty-fourth embodiment, A function of executing the processing of steps S5809, S5810, S5812, and S5813 in the main CPU 63; a function of executing the processing of steps S6101, S6102, S6105, and S6106 in the main CPU 63 in the twenty-fifth embodiment; In the thirty-second embodiment, the function of executing the processing of steps S7706 to S7708 in the main CPU 63);
A gaming machine comprising:

  According to the feature T1, the first predetermined storage area and the second predetermined storage area are provided, and the first predetermined storage area is treated as a storage area dedicated to the first predetermined processing, and the second predetermined storage area is It is handled as a dedicated storage area for the second predetermined process. Thus, it is possible to make the storage destination of the information in the predetermined storage device clearly different between the first predetermined processing and the second predetermined processing. Therefore, it is possible to prevent information used in the other processing from being erased when one of the first predetermined processing and the second predetermined processing is executed. In addition, by monitoring whether the first predetermined storage area is normal and monitoring whether the second predetermined storage area is normal, the first predetermined processing and the second predetermined processing are performed. It is possible to specify whether or not each of the processes can be performed normally.

  Feature T2. The game according to Feature T1, wherein the monitoring by the first monitoring execution unit and the monitoring by the second monitoring execution unit are performed in one of the first predetermined process and the second predetermined process. Machine.

  According to the feature T2, monitoring whether the first predetermined storage area is normal and monitoring whether the second predetermined storage area is normal are performed in one of the first predetermined processing and the second predetermined processing. Collectively executed. This makes it possible to simplify the processing configuration as compared with a configuration in which monitoring of each storage area is executed separately in the first predetermined process and the second predetermined process.

  Feature T3. The gaming machine according to the features T1 or T2, wherein the monitoring by the first monitoring executing means and the monitoring by the second monitoring executing means are executed in the first predetermined processing.

  According to the feature T3, the monitoring of whether the first predetermined storage area is normal and the monitoring of whether the second predetermined storage area is normal can be collectively executed by the first predetermined processing. Becomes

  Feature T4. A predetermined erasing means for erasing information in the first predetermined storage area based on the fact that the first predetermined storage area is abnormal by the first monitoring execution means (in the twenty-second embodiment, the main The function of the CPU 63 for executing the processing of step S5410, the function of executing the processing of the steps S5806, S5811 and S5814 in the main CPU 63 in the twenty-fourth embodiment, and the function of executing the steps S5906 and S5906 in the main CPU 63 in the twenty-fifth embodiment. The gaming machine according to any one of features T1 to T3, characterized by having a function of executing the processing of S6103 and step S6107).

  According to the feature T4, when the first predetermined storage area is abnormal, the information of the first predetermined storage area is deleted, so that the first predetermined processing is executed while the first predetermined storage area is in an abnormal state. It is possible to prevent it from happening.

  Feature T5. The predetermined erasing means erases information of the first predetermined storage area based on the fact that the first predetermined storage area is abnormal by the first monitoring execution means, and deletes the information of the second predetermined storage area. The gaming machine according to feature T4, wherein information of the area is deleted.

  According to the feature T5, when the first predetermined storage area is abnormal, not only the first predetermined storage area but also the second predetermined storage area is deleted. Accordingly, when there is a possibility that an abnormality has occurred in the second predetermined storage area, the information in the second predetermined storage area can be deleted regardless of the monitoring result by the second monitoring execution means.

  Feature T6. The predetermined erasing means erases information of the second predetermined storage area based on the fact that the second monitoring area is determined to be abnormal by the second monitoring execution means. A gaming machine according to T4 or T5.

  According to the feature T6, when the first predetermined storage area is abnormal, the information of the first predetermined storage area is deleted, so that the first predetermined processing is executed while the first predetermined storage area is in an abnormal state. It is possible to prevent it from happening.

  Feature T7. The predetermined erasing means erases information in the second predetermined storage area based on the fact that the second predetermined storage area is abnormal by the second monitoring execution means, and deletes the first predetermined storage area. The gaming machine according to Feature T6, wherein information of the area is deleted.

  According to the feature T7, when the second predetermined storage area is abnormal, not only the second predetermined storage area but also the first predetermined storage area is deleted. Accordingly, when there is a possibility that an abnormality has occurred in the first predetermined storage area, the information in the first predetermined storage area can be deleted regardless of the monitoring result by the first monitoring execution means.

  Feature T8. The process for erasing information by the predetermined erasing means is performed in one of the first predetermined process and the second predetermined process, according to any one of features T4 to T7. Gaming machine.

  According to the feature T8, the process of erasing the information in each of the predetermined storage areas based on the fact that the abnormality has been identified is collectively executed in one of the first predetermined process and the second predetermined process. This makes it possible to simplify the processing configuration as compared with a configuration in which the erasure of the information in each storage area is executed separately in the first predetermined process and the second predetermined process.

  Feature T9. The gaming machine according to any one of features T4 to T7, wherein a process for erasing information by said predetermined erasing means is executed in said first predetermined process.

  According to the feature T9, it is possible to collectively execute the process of erasing the information of each of the predetermined storage areas based on the fact that it is determined to be abnormal in the first predetermined process.

Feature T10. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features T1 to T9, wherein the second predetermined process includes a process for managing a game history.

  According to the feature T10, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent information used in the processing for managing the game history from being rewritten when executing the processing for the game.

  Feature T11. The second predetermined storage area is a history storage area (normal counter area 231, open / close execution mode counter area 232) in which, when a predetermined event occurs due to the execution of a game, history information of the game corresponding to the event is stored. , A gaming machine according to feature T10, comprising: a high-frequency support mode counter area 233).

  According to the feature T11, when a predetermined event has occurred, history information corresponding to the event is stored in the history storage area. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. During execution, it is possible to prevent information stored in the history storage area from being rewritten.

  Feature T12. The second predetermined process executing means is an information deriving means (step S4208 in the main CPU 63) for deriving mode information corresponding to a game result in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature T11, further comprising:

  According to the feature T12, by using the history information stored in the history storage area to derive the mode information corresponding to the game result in the predetermined period, the management of the game history such as the frequency of occurrence of the predetermined event is performed. The result can be grasped.

  Feature T13. The gaming machine according to Feature T12, wherein the second predetermined storage area includes a mode information storage area (operation result storage area 234) for storing the mode information derived by the information deriving unit.

  According to the feature T13, when the mode information corresponding to the result of the game in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. Thereby, it is possible to grasp the management result of the game history at an arbitrary timing. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. At the time of execution, it is possible to prevent the information stored in the aspect information storage area from being rewritten.

  In addition, with respect to the configuration of the features T1 to T13, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Feature U group>
Feature U1. A control unit (main CPU 63) for executing various processes and temporarily storing information in an internal storage unit (register of the main CPU 63) when executing the processes;
The control means,
A first predetermined process executing means for executing a first predetermined process among the various processes (a function of executing a process other than the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
A second predetermined process executing means for executing a second predetermined process among the various processes (a function of executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
A flag register provided in the internal storage means when the situation where the first predetermined processing is being executed is changed to the situation where the second predetermined processing is executed, or when the situation where the second predetermined processing is executed is changed. State setting means (in the twenty-sixth embodiment, a function of executing the processes of steps S6202 to S6204 and S6211 in the main CPU 63, and in the twenty-seventh embodiment, a step in the main CPU 63) Functions for executing the processing of S6302 to S6307 and S6312);
A gaming machine comprising:

  According to the feature U1, when the situation where the first predetermined process is being executed is changed to the situation where the second predetermined process is executed, or when the situation where the second predetermined process is executed is reached, the flag of the flag register of the internal storage means is set. The state is set to a specific state. This makes it possible to start the second predetermined process in a situation where the state of the flag register is a predetermined specific state. Therefore, various controls can be suitably performed.

  Feature U2. The gaming machine according to feature U1, wherein the specific state is a state when supply of operation power to the control unit is started.

  According to the feature U2, since the flag register is set as the specific state when the supply of the operating power to the control unit is started, the processing configuration for setting the specific state can be simplified. It becomes possible.

  Feature U3. The gaming machine according to features U1 or U2, wherein the specific state is a state in which the flag register is cleared to “0”.

  According to the feature U3, since the flag register is set to the state where “0” is cleared as the specific state, it is possible to simplify the processing configuration for setting to the specific state.

  Feature U4. Means for setting the state of the flag register to the specific state when or after ending the second predetermined processing (the processing of steps S6213 to S6218 in the main CPU 63 is executed in the twenty-sixth embodiment) The gaming machine according to any one of features U1 to U3, wherein the gaming machine has a function of executing a process of steps S6314 to S6322 in the main CPU 63 in the twenty-seventh embodiment.

  According to the feature U4, the second predetermined process is executed not only when the first predetermined process is executed but the second predetermined process is executed or when the second predetermined process is executed. When the processing ends or when the processing ends, the state of the flag register is set to the specific state. Thus, the first predetermined process can be restarted in a situation where the state of the flag register is a predetermined specific state. Further, the state of the flag register can be set to the specific state before and after the second predetermined processing. Therefore, it is possible to prevent the state of the flag register in one of the first predetermined processing and the second predetermined processing from affecting the other processing.

Feature U5. A predetermined storage unit (main RAM 65) for temporarily storing information when the control unit executes processing;
The state setting means,
Means for setting the state of a predetermined storage area in the predetermined storage means to the specific state (the function of executing the processing of steps S6202 to S6204 in the main CPU 63 in the twenty-sixth embodiment, the function of the twenty-seventh embodiment A function of executing the processing of steps S6302 to S6307 in the main CPU 63);
Means for storing the information stored in the predetermined storage area in the flag register so that the state of the flag register becomes the specific state (in the twenty-sixth embodiment, the process of step S6211 in the main CPU 63 is performed) A function to be executed, in the twenty-seventh embodiment, a function of executing the process of step S6312 in the main CPU 63);
The gaming machine according to any one of features U1 to U4, comprising:

  According to the feature U5, even if the state of the flag register cannot be directly set to the specific state as an instruction of the control unit, the flag is written using the writing of information to the predetermined storage unit and the reading of the information. The state of the register can be set to a specific state.

Feature U6. The predetermined storage means,
A stack area (specific control stack area 222) in which the control means can write information by a push command and the control means can read information by a pop command;
A work area (a work area 221 for specific control) in which the control means can write and read information according to a load instruction;
With
The gaming machine according to Feature U5, wherein the predetermined storage area is provided in the stack area.

  According to the feature U6, even if the information stored in the work area cannot be directly written to the flag register, the state of the flag register is specified by using the writing of information to the stack area and the reading of the information. The state can be set.

Feature U7. A predetermined register provided in the internal storage means, when the situation where the first predetermined processing is being executed is changed to the situation where the second predetermined processing is executed, or when the situation where the second predetermined processing is executed is changed. (A function of executing the processing of steps S6205 to S6210 in the main CPU 63 in the twenty-sixth embodiment, and a function of executing steps S6308 to S6311 in the main CPU 63 in the twenty-seventh embodiment) Function to execute processing)
The state setting unit may set the state of the flag register to the specific state after the state of the predetermined register is set to the predetermined state. The method according to any one of features U1 to U6, wherein Gaming machine.

  The state of the flag register can change each time various processes are executed in the control means. In this case, according to the feature U7, since the state of the flag register is set to the specific state after the state of the predetermined register is set to the predetermined state, the flag register is set to the specific state immediately before the second predetermined processing is started. It is possible to make it.

Feature U8. A control unit (main CPU 63) for executing various processes and temporarily storing information in an internal storage unit (register of the main CPU 63) when executing the processes;
The control means is means for setting the state of the flag register to a specific state (in the twenty-sixth embodiment, a function of executing the processing of steps S6202 to S6204 and step S6211 in the main CPU 63, the twenty-seventh embodiment (A function of executing steps S6302 to S6307 and step S6312 in the main CPU 63).

  According to the feature U8, the state of the flag register can be set to a specific state as needed.

  In addition, with respect to the configuration of the features U1 to U8, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Characteristic V group>
Feature V1. A control unit (main CPU 63) for executing various processes and temporarily storing information in an internal storage unit (register of the main CPU 63) when executing the processes;
The control means,
A first predetermined process executing means for executing a first predetermined process among the various processes (a function of executing a process other than the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
A second predetermined process executing means for executing a second predetermined process among the various processes (a function of executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
A flag register provided in the internal storage means when the situation where the first predetermined processing is being executed is changed to the situation where the second predetermined processing is executed, or when the situation where the second predetermined processing is executed is changed. (A function of executing the processing of step S3802 in the main CPU 63 in the fifteenth embodiment, and a function of executing the processing of step S4402 in the main CPU 63 in the sixteenth embodiment). The function of executing the processing, the function of executing the processing of step S4802 in the main CPU 63 in the twentieth embodiment, the function of executing the processing of steps S6402 to S6405 in the main CPU 63 in the twenty-eighth embodiment, the twenty-ninth embodiment In the embodiment, the processing of steps S6502 to S6509 in the main CPU 63 is performed. And the execution function),
When or after the second predetermined process is completed, the return execution unit (in the fifteenth embodiment, the step S3804 in the main CPU 63 in the fifteenth embodiment) for returning the information of the flag register saved in the predetermined storage unit to the flag register. , The function of executing the processing of step S4404 in the main CPU 63 in the sixteenth embodiment, the function of executing the processing of step S4810 in the main CPU 63 in the twentieth embodiment, the twenty-eighth embodiment In the twenty-seventh embodiment, the function of executing the processing of steps S6511 to S6518 in the main CPU 63 is the function of executing the processing of steps S6407 to S6415 in the main CPU 63).
A gaming machine comprising:

  According to the feature V1, the information of the flag register is stored in the predetermined state when the situation where the first predetermined processing is being executed is changed to the situation where the second predetermined processing is executed or when the situation where the second predetermined processing is executed is changed. Evacuated to means. Thus, when the second predetermined process is executed, it is possible to prevent the information stored in the flag register from being rewritten when the first predetermined process is executed. When or after the second predetermined process is completed, the information saved in the predetermined storage unit is returned to the flag register. Thus, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the flag register before the execution of the second predetermined process. As described above, various controls can be suitably performed.

Feature V2. The predetermined storage means,
A first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined processing is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined processing is executed;
With
The gaming machine according to feature V1, wherein the save execution means saves information of the flag register to the first predetermined storage area.

  According to the feature V2, since the first predetermined storage area and the second predetermined storage area are provided in the predetermined storage means, the storage destination of the information in the predetermined storage means in the first predetermined processing and the second predetermined processing. It is possible to make a clear difference. This makes it possible to prevent information used in the other process from being erased when one of the first predetermined process and the second predetermined process is executed. In this case, when the situation where the second predetermined processing is executed is changed from the situation where the first predetermined processing is executed or the situation where the second predetermined processing is executed, the information of the flag register is stored in the first predetermined storage area. Evacuated to This makes it possible to save the information of the flag register immediately before the start of the second predetermined processing, and to save the information without using the second predetermined storage area.

Feature V3. The first predetermined storage area is capable of storing information and reading information when the first predetermined processing is performed, and is capable of reading information when the second predetermined processing is performed. Information cannot be stored,
The second predetermined storage area is capable of storing information and reading information when the second predetermined processing is performed, and is capable of reading information when the first predetermined processing is performed. The gaming machine according to Feature V2, wherein information cannot be stored.

  According to the feature V3, the first predetermined storage area can be handled as a storage area dedicated to the first predetermined processing, and the second predetermined storage area can be handled as a storage area dedicated to the second predetermined processing. Becomes

Feature V4. The predetermined storage means,
A stack area in which information can be written by a push instruction and information can be read by a pop instruction (stack area 222 for specific control);
A work area in which information can be written and read by a load instruction (work area 221 for specific control);
With
The gaming machine according to any one of features V1 to V3, wherein the save execution unit saves the information of the flag register to one of the stack area and the work area.

  According to the feature V4, when the situation where the first predetermined process is executed is changed to the situation where the second predetermined process is executed, or when the situation where the second predetermined process is executed is reached, the stack area in the second predetermined storage area is set. The information of the flag register is saved in one of the work area and the work area. As a result, the save destinations of the information can be consolidated, and the processing configuration for saving and the processing configuration for restoring can be simplified.

  Feature V5. The gaming machine according to Feature V4, wherein the retreat executing means retreats the information of the flag register to the work area.

  According to the feature V5, since the save destination of the information of the flag register is the work area, it is possible to save the information without cumulatively changing the stack pointer.

Feature V6. The evacuation execution means,
Means for storing the information of the flag register in a predetermined register provided in the internal storage means (the function of executing the processing of steps S6402 and S6403 in the main CPU 63 in the twenty-eighth embodiment; Function for executing the processing of steps S6502 to S6505 in the side CPU 63);
Means for storing the information of the flag register stored in the predetermined register in the predetermined storage means (the function of executing the processing of step S6404 in the main CPU 63 in the twenty-eighth embodiment, the function of the main CPU 63 in the twenty-ninth embodiment) Function for executing the process of step S6506 in
The gaming machine according to any one of features V1 to V5, comprising:

  According to the feature V6, even if the information of the flag register cannot be directly saved to the predetermined storage means as an instruction of the control means, the writing of the information to the predetermined register and the predetermined information of the information stored in the predetermined register are performed. Using the writing to the storage means, the information of the flag register can be saved to the predetermined storage means.

  In addition, for the configuration of the features V1 to V6, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Characteristic W group>
Feature W1. A control unit (main CPU 63) for executing various processes;
The control means,
A first predetermined process executing means for executing a first predetermined process among the various processes (a function of executing a process other than the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
A second predetermined process executing means for executing a second predetermined process among the various processes (a function of executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
A first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined processing is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined processing is executed;
An abnormal event monitoring means (program monitoring unit 252) for monitoring whether or not an abnormal event has occurred;
On the basis of the fact that the abnormal event has been identified by the abnormal event monitoring means, it is possible to cause a situation in which the information erasing process is performed on at least the first predetermined storage area. Erasing status generating means (reset signal output unit 251),
A gaming machine comprising:

  According to the feature W1, the first predetermined storage area and the second predetermined storage area are provided, and the first predetermined storage area is treated as a storage area dedicated to the first predetermined processing, and the second predetermined storage area is provided. It is handled as a dedicated storage area for the second predetermined process. Thus, it is possible to make the storage destination of the information in the predetermined storage device clearly different between the first predetermined processing and the second predetermined processing. Therefore, it is possible to prevent information used in the other processing from being erased when one of the first predetermined processing and the second predetermined processing is executed. Further, based on the fact that the occurrence of the abnormal event has been specified, the information erasing process is performed on at least the first predetermined storage area. This makes it possible to prevent the first predetermined processing from being executed in a state where the information in the first predetermined storage area is held as it is even though an abnormal event has occurred.

Feature W2. The control means includes:
Means for executing processing for storing power failure correspondence information when supply of operating power to the control means is stopped (in the thirtieth embodiment, a function for executing the processing of steps S6709 and S6710 in the main CPU 63) In the thirty-second embodiment, the function of executing the processes of steps S7609 to S7611 in the main CPU 63);
In a situation where the power failure handling information is not stored, when the supply of the operating power to the control unit is started and the process at the time of starting the supply is executed, the information erasing process is performed on at least the first predetermined storage area. (In the thirtieth embodiment, the function of executing the processing of step S6607 in the main CPU 63; in the thirty-first embodiment, the function of executing the clear processing in the main CPU 63 at the time of abnormality; In the embodiment, the function of executing the processes of steps S7704, S7705, S7808, and S7810 in the main CPU 63)
With
The erasing state generating means is configured to start the supply by the control means in a state where the power failure correspondence information is not stored, based on the fact that the abnormal event monitoring means specifies that the abnormal event has occurred. The gaming machine according to feature W1, wherein the process at the time is executed.

  According to the feature W2, when the supply of the operating power to the control unit is started in a situation where the power failure handling information is not stored and the process at the time of starting the supply is executed, at least the first predetermined process for erasing the information is performed. By being executed for the storage area, the information of the first predetermined storage area is held as it is when the supply of the operating power to the control unit is started in a situation where the processing at the time of the power failure is not properly performed. It is possible to prevent the first predetermined processing from being executed in the state. In this case, based on the fact that the occurrence of the abnormal event has been specified, the processing at the start of supply is executed by the control means in a situation where the power failure handling information is not stored. With this configuration, when the processing at the start of supply is executed by the control means in a situation where the power failure correspondence information is not stored, the information erasing process is performed, and the information is deleted when an abnormal event occurs. It is possible to execute the erasing process.

Feature W3. The control means performs various processes when receiving a reset signal, and receives the reset signal from a situation where the reset signal is not received in a situation where operating power is supplied. The process at the time of starting the supply is started based on the fact that
The erasing state generating means, based on the fact that the abnormal event has been generated by the abnormal event monitoring means, based on the control means, after the reset signal in a state that does not receive the reset signal, The gaming machine according to feature W2, wherein the gaming machine receives the reset signal.

  According to the feature W3, the above-described excellent effects can be obtained by switching the reception state of the reset signal.

Feature W4. The control unit is configured to temporarily store information in an internal storage unit (a register and a program counter of the main CPU 63) at the time of executing a process, and stores the information stored in the internal storage unit in the first predetermined storage. It is a configuration that can be temporarily evacuated to the area,
The abnormal event monitoring means, as the abnormal event, monitors whether an abnormality has occurred in the information stored in the internal storage means,
The erasure status generating means may generate a status in which the information erasure process is performed on at least both the first predetermined storage area and the internal storage means. A gaming machine according to claim 1.

  According to the feature W4, since the information stored in the internal storage means can be temporarily saved to the first predetermined storage area, if an abnormality occurs with respect to the information stored in the internal storage means, There is a possibility that an abnormality has occurred in the information stored in the predetermined storage area. In this case, if an abnormality occurs in the information stored in the internal storage means, the information is deleted not only in the internal storage means but also in the first predetermined storage area. Thus, it is possible to prevent the first predetermined processing from being executed as it is, even though an abnormality has occurred in the information stored in the first predetermined storage area.

  Feature W5. The erasure status generation means may prevent the information erasure process from being performed on the second predetermined storage area even if the abnormal event monitoring means specifies that the abnormal event has occurred. The gaming machine according to any one of the features W1 to W4, characterized in that:

  According to the feature W5, information can be stored and held in the second predetermined storage area even when an abnormal event occurs.

  Feature W6. The erasure status generation means may execute the erasure processing of the information based on the fact that the abnormal event has occurred by the abnormal event monitoring means. The gaming machine according to any one of features W1 to W4, wherein a situation is generated for both of the above.

  According to the feature W6, based on the fact that the occurrence of the abnormal event has been specified, the information erasing process is executed for both the first predetermined storage area and the second predetermined storage area. This makes it possible to prevent the first predetermined processing from being executed in a state where the information of the first predetermined storage area is held as it is despite the occurrence of the abnormal event, and the occurrence of the abnormal event. Despite this, it is possible to prevent the second predetermined processing from being executed in a state where the information in the second predetermined storage area is held as it is.

  Feature W7. The information erasing process for the first predetermined storage area is executed in the first predetermined process, and the information erasing process for the second predetermined storage area is executed in the second predetermined process. The gaming machine according to Feature W6.

  According to the feature W7, regarding the information erasing process, the first predetermined storage area is treated as a dedicated storage area for the first predetermined processing, and the second predetermined storage area is treated as a dedicated storage area for the second predetermined processing. It is possible to be done.

Feature W8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features W1 to W7, wherein the second predetermined process includes a process for managing a game history.

  According to the feature W8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent information used in the processing for managing the game history from being rewritten when executing the processing for the game.

  Feature W9. The second predetermined storage area is a history storage area (normal counter area 231, open / close execution mode counter area 232) in which, when a predetermined event occurs due to the execution of a game, history information of the game corresponding to the event is stored. The gaming machine according to feature W8, comprising a high-frequency support mode counter area 233).

  According to the feature W9, when a predetermined event occurs, history information corresponding to the event occurs in the history storage area. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. During execution, it is possible to prevent information stored in the history storage area from being rewritten.

  Feature W10. The second predetermined process executing means is an information deriving means (step S4208 in the main CPU 63) for deriving mode information corresponding to a game result in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature W9, further comprising:

  According to the feature W10, the mode information corresponding to the result of the game in the predetermined period is derived using the history information stored in the history storage area, thereby managing the game history such as the frequency of occurrence of the predetermined event. The result can be grasped.

  Feature W11. The gaming machine according to Feature W10, wherein the second predetermined storage area includes a mode information storage area (operation result storage area 234) for storing the mode information derived by the information deriving unit.

  According to the feature W11, when the mode information corresponding to the result of the game in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. Thereby, it is possible to grasp the management result of the game history at an arbitrary timing. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. At the time of execution, it is possible to prevent the information stored in the aspect information storage area from being rewritten.

  In addition, with respect to the configuration of the features W1 to W11, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Character X group>
Feature X1. A control unit (main CPU 63) for executing various processes;
The control means,
A first predetermined process executing means for executing a first predetermined process among the various processes (a function of executing a process other than the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
A second predetermined process executing means for executing a second predetermined process among the various processes (a function of executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
A first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined processing is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined processing is executed;
With
The second predetermined processing execution means is configured to execute, as the second predetermined processing, information erasure processing for the second predetermined storage area based on occurrence of an erasure trigger. In the twenty-fifth embodiment, the function of executing the processing of steps S6103 and S6107 in the main CPU 63, in the thirtieth embodiment, the function of executing the processing of step S7204 in the main CPU 63, and in the thirty-first embodiment, the main CPU 63 (In the thirty-second embodiment, the function of executing the processing of steps S7808 and S7810 in the main CPU 63).

  According to the feature X1, the first predetermined storage area and the second predetermined storage area are provided, the first predetermined storage area is treated as a dedicated storage area for the first predetermined processing, and the second predetermined storage area is It is handled as a dedicated storage area for the second predetermined process. Thus, it is possible to make the storage destination of the information in the predetermined storage device clearly different between the first predetermined processing and the second predetermined processing. Therefore, it is possible to prevent information used in the other processing from being erased when one of the first predetermined processing and the second predetermined processing is executed.

  In addition, when an erasure trigger occurs, the information erasing process is performed on the second predetermined storage area, so that the second predetermined storage area may be irrespective of any abnormality occurring in the second predetermined storage area. Can be prevented from being executed in a state where the information is held as it is. Further, since the erasing process of the information is executed in the second predetermined process, it is possible to prevent the first predetermined process from being interposed in updating the information in the second predetermined storage area.

  Feature X2. The erasure execution means executes the erasure process on the second predetermined storage area while preventing non-erasure target information (management monitoring flag, return address information, various register information) from being erased. The gaming machine according to Feature X1.

  According to the feature X2, the information erasing process for the second predetermined storage area is performed while preventing the non-erasure target information in the second predetermined storage area from being erased. This makes it possible to execute the information erasing process for the second predetermined storage area while preventing even the necessary information from being erased.

Feature X3. The second predetermined process execution means is configured to execute the second predetermined process from the status where the first predetermined process is being executed or to execute the second predetermined process from the status where the second predetermined process is being executed. A storage execution unit (in the thirtieth embodiment, a storage execution unit) for storing return correspondence information (return address information and information of various registers) necessary for returning to a state in which the first predetermined process is executed; A function of the main CPU 63 for executing the processing of steps S7102 to S7107, a function of executing the processing of steps S7502 to S7507 in the main CPU 63 in the thirty-first embodiment, and a step S7802 of the main CPU 63 in the thirty-second embodiment. To execute the process of step S7807).
The game according to Feature X2, wherein the erasing execution means executes the erasing process of the information in the second predetermined storage area while preventing the return correspondence information from being erased as the non-erasing target information. Machine.

  According to the characteristic X3, the second predetermined processing is performed while preventing even the return correspondence information necessary when returning from the state of executing the second predetermined processing to the state of executing the first predetermined processing. It becomes possible to execute a process of deleting information from the storage area.

  Feature X4. The storage execution unit may store, in the second predetermined storage area, information on a return address of a program when the second predetermined processing ends and returns to the first predetermined processing, as the return correspondence information. The gaming machine according to Feature X3.

  According to the feature X4, since the information erasing process is performed on the second predetermined storage area while preventing the information of the return address of the program from being returned to the first predetermined processing, the second predetermined storage area is executed. Even if the information erasing process is executed, the program can return to the predetermined program in the first predetermined process when the second predetermined process ends.

Feature X5. The control unit is configured to temporarily store information in an internal storage unit (register of the main CPU 63) when executing the process.
The gaming machine according to feature X3 or X4, wherein said storage execution means stores information stored in said internal storage means in said second predetermined storage area as said return correspondence information.

  According to the feature X5, the information erasing process is performed on the second predetermined storage area while the information in the internal storage unit used in the first predetermined processing is not erased. On the other hand, even if the information erasing process is executed, the information used in the first predetermined process can be returned to the internal storage means when the second predetermined process is completed.

  Feature X6. The erasure execution means causes the information erasure process to be performed on the second predetermined storage area based on the occurrence of an abnormality in the second predetermined storage area, as an occurrence of the erasure trigger. The gaming machine according to any one of features X1 to X5.

  According to the feature X6, the information erasing process is performed on the second predetermined storage area based on the occurrence of the abnormality in the second predetermined storage area. It is possible to prevent the second predetermined processing from being executed in the state in which it is present.

  Feature X7. The second predetermined processing execution means is means for monitoring whether or not the second predetermined storage area is normal as the second predetermined processing (in the thirtieth embodiment, steps S7201 to S7203 in the main CPU 63 are performed). The gaming machine according to feature X6, further comprising a function of executing processing).

  According to the feature X7, not only the information erasing process for the second predetermined storage area but also the monitoring of whether the second predetermined storage area is normal is performed in the second predetermined processing without the first predetermined processing. Since the process is executed, it is possible to execute monitoring of whether the second predetermined storage area is normal and execution of information erasure processing for the second predetermined storage area as a series of processing in the second predetermined processing. .

Feature X8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features X1 to X7, wherein the second predetermined process includes a process for managing a game history.

  According to the feature X8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent information used in the processing for managing the game history from being rewritten when executing the processing for the game.

  Feature X9. The second predetermined storage area is a history storage area (normal counter area 231, open / close execution mode counter area 232) in which, when a predetermined event occurs due to the execution of a game, history information of the game corresponding to the event is stored. The gaming machine according to feature X8, comprising a high-frequency support mode counter area 233).

  According to the feature X9, when a predetermined event has occurred, history information corresponding to the event is stored in the history storage area. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. During execution, it is possible to prevent information stored in the history storage area from being rewritten.

  Feature X10. The second predetermined processing executing means is an information deriving means (step S4208 in the main CPU 63) for deriving mode information corresponding to a game result in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature X9, further comprising:

  According to the feature X10, management of the game history such as the frequency of occurrence of the predetermined event is performed by using the history information stored in the history storage area to derive the mode information corresponding to the game result in the predetermined period. The result can be grasped.

  Feature X11. The gaming machine according to Feature X10, wherein the second predetermined storage area includes a mode information storage area (operation result storage area 234) for storing the mode information derived by the information deriving unit.

  According to the feature X11, when the mode information corresponding to the result of the game in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. Thereby, it is possible to grasp the management result of the game history at an arbitrary timing. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. At the time of execution, it is possible to prevent the information stored in the aspect information storage area from being rewritten.

  In addition, with respect to the configuration of the features X1 to X11, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Characteristic Y group>
Feature Y1. A control unit (main CPU 63) for executing various processes;
The control means,
A first predetermined process executing means for executing a first predetermined process among the various processes (a function of executing a process other than the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
A second predetermined process executing means for executing a second predetermined process among the various processes (a function of executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
A first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined processing is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined processing is executed;
First calculating means for calculating first reference numerical value information corresponding to a plurality of pieces of information stored in the first predetermined storage area (in the thirtieth embodiment, the main CPU 63 executes the processing of steps S6604 and S6710) Function, in the thirty-first embodiment, a function of executing the processing of step S7304 in the main CPU 63, and in the thirty-second embodiment, a function of executing the processing of steps S7610 and S7701 in the main CPU 63);
A gaming machine comprising:

  According to the feature Y1, the first predetermined storage area and the second predetermined storage area are provided, and the first predetermined storage area is treated as a dedicated storage area for the first predetermined processing, and the second predetermined storage area is It is handled as a dedicated storage area for the second predetermined process. Thus, it is possible to make the storage destination of the information in the predetermined storage device clearly different between the first predetermined processing and the second predetermined processing. Therefore, it is possible to prevent information used in the other processing from being erased when one of the first predetermined processing and the second predetermined processing is executed. In this case, first reference numerical value information corresponding to a plurality of pieces of information stored in the first predetermined storage area is calculated. By using the first reference numerical value information, it is possible to specify whether or not an information abnormality has occurred only in the first predetermined storage area.

  Feature Y2. An information erasing unit configured to execute an information erasing process on the first predetermined storage area on the basis of specifying that an abnormality has occurred in the first reference numerical information calculated by the first calculating unit; (In the thirtieth embodiment, the function of the main CPU 63 for executing the processing of step S6607, in the thirty-first embodiment, the function of executing the processing of steps S7401 and S7402 in the main CPU 63, and in the thirty-second embodiment, the main CPU 63 The gaming machine according to feature Y1, further comprising a function of executing the processes of steps S7704 and S7705 in the CPU 63).

  According to the feature Y2, when the occurrence of an abnormality is identified with respect to the first reference numerical information, the information erasing process is performed on the first predetermined storage area. The first predetermined processing can be prevented from being executed while the information of the first predetermined storage area is held as it is.

Feature Y3. The first calculating means includes:
A first power outage calculating means for calculating the first reference numerical value information when the supply of operating power to the control means is stopped (in the thirtieth embodiment, a function of executing the process of step S6710 in the main CPU 63; In the thirty-second embodiment, the function of executing the process of step S7610 in the main CPU 63)
First power-on calculation means for calculating the first reference numerical value information when the supply of operating power to the control means is started (in the thirtieth embodiment, a function for executing the process of step S6604 in the main CPU 63) The function of executing the processing of step S7304 in the main CPU 63 in the thirty-first embodiment, and the function of executing the processing of step S7701 in the main CPU 63 in the thirty-second embodiment)
With
The information erasing unit is configured to determine whether the first reference numerical information calculated by the first power outage calculating unit does not match the first reference numerical information calculated by the first power on calculating unit. The gaming machine according to Feature Y2, wherein the information erasing process is performed on at least the first predetermined storage area.

  According to the feature Y3, it is possible to specify whether the information of the first predetermined storage area is stored and held by sandwiching the situation where the supply of the operation power is stopped by calculating the first reference numerical information. Becomes Then, if the information in the first predetermined storage area is not stored and held across the state in which the supply of the operating power is stopped, the information erasing process is performed on the first predetermined storage area, so that the information abnormality occurs. It is possible to prevent the first predetermined processing from being executed in a state where the information of the first predetermined storage area is held as it is despite the occurrence of.

  Feature Y4. The information erasing unit may not execute the information erasing process on the second predetermined storage area even if an abnormality has been identified with respect to the first reference numerical information calculated by the first calculating unit. The gaming machine according to Feature Y2 or Y3.

  According to the feature Y4, when the occurrence of an abnormality is specified for the first reference numerical information, the information erasing process is performed on the first predetermined storage area, while the information is erased on the second predetermined storage area. No action is taken. This makes it possible to prevent even the information in the second predetermined storage area from being erased in a situation where the information abnormality has occurred in the first predetermined storage area.

  Feature Y5. The gaming machine according to any one of features Y1 to Y4, wherein the first reference numerical value information is information that does not change according to information stored in the second predetermined storage area.

  According to the feature Y5, in the configuration in which the first predetermined storage area and the second predetermined storage area exist, it is possible to individually specify the information abnormality related to the first predetermined storage area using the first reference numerical information. It becomes possible.

  Feature Y6. A second calculating means (a function of executing the processing of steps S7611 and S7706 in the main CPU 63) for calculating second reference numerical value information corresponding to a plurality of pieces of information stored in the second predetermined storage area is provided. The gaming machine according to any one of features Y1 to Y5.

  According to the feature Y6, second reference numerical value information corresponding to a plurality of pieces of information stored in the second predetermined storage area is calculated. By using the second reference numerical information, it is possible to specify whether or not an information abnormality has occurred only in the second predetermined storage area.

  Feature Y7. Means for causing information erasure processing to be performed on at least the second predetermined storage area based on the fact that an abnormality has been identified with respect to the second reference numerical information calculated by the second calculation means ( The gaming machine according to feature Y6, further comprising a function of executing the processes of steps S7808 and S7810 in the main CPU 63.

  According to the feature Y7, when the occurrence of an abnormality is specified for the second reference numerical information, the information erasing process is performed on the second predetermined storage area. It is possible to prevent the second predetermined processing from being executed while the information in the second predetermined storage area is held as it is.

Feature Y8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features Y1 to Y7, wherein the second predetermined process includes a process for managing a game history.

  According to the feature Y8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent information used in the processing for managing the game history from being rewritten when executing the processing for the game.

  Feature Y9. The second predetermined storage area is a history storage area (normal counter area 231, open / close execution mode counter area 232) in which, when a predetermined event occurs due to the execution of a game, history information of the game corresponding to the event is stored. The gaming machine according to feature Y8, comprising a high-frequency support mode counter area 233).

  According to the feature Y9, when a predetermined event has occurred, history information corresponding to the event is stored in the history storage area. As a result, information for managing the number of times or frequency of occurrence of the predetermined event can be stored and held in the gaming machine, and the management of the frequency of occurrence of the predetermined event is preferable by using the managed information. Can be performed. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. During execution, it is possible to prevent information stored in the history storage area from being rewritten.

  Feature Y10. The second predetermined process executing means is an information deriving means (step S4208 in the main CPU 63) for deriving mode information corresponding to a game result in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature Y9, further comprising a function of executing the processing of (1).

  According to the feature Y10, the mode information corresponding to the result of the game in the predetermined period is derived using the history information stored in the history storage area, thereby managing the game history such as the frequency of occurrence of the predetermined event. The result can be grasped.

  Feature Y11. The gaming machine according to Feature Y10, wherein the second predetermined storage area includes a mode information storage area (operation result storage area 234) for storing the mode information derived by the information deriving unit.

  According to the feature Y11, when the mode information corresponding to the result of the game in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. Thereby, it is possible to grasp the management result of the game history at an arbitrary timing. In addition, a process for controlling the progress of the game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. At the time of execution, it is possible to prevent the information stored in the aspect information storage area from being rewritten.

  In addition, with respect to the configuration of the features Y1 to Y11, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

  According to the invention relating to the feature T group, the feature U group, the feature V group, the feature W group, the feature X group, and the feature Y group, the following problems can be solved.

  Pachinko game machines and slot machines are known as game machines. For example, a pachinko game machine has a dish storage section for storing game balls given to a player on the front of the game machine, and the game balls stored in the dish storage section are guided to a game ball launching device. The game is fired toward the game area in accordance with the shooting operation of the player. Then, for example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the dish storage unit, for example. In a pachinko gaming machine, a configuration having an upper dish storage section and a lower dish storage section as dish storage sections is also known. In this case, game balls stored in the upper dish storage section are used to launch game balls. The game balls guided by the device and surplus in the upper dish storage section are discharged to the lower dish storage section.

  Further, in the slot machine, when a new game is started by operating the start lever while a medal is bet, a lottery process is executed by the control means. Further, when the lottery process is executed, the rotation of the reel is started by the rotation start control being executed by the control means, and when the stop button is operated during the rotation of the reel, the control means executes the rotation start control. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the rotation stop of the reels corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

  Here, in the gaming machine as exemplified above, it is necessary to appropriately perform various controls, and there is still room for improvement in this regard.

<Characteristic Z group>
Feature Z1. Setting means (a function of executing a setting value updating process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage;
Situation generating means (function for executing the processing of steps S7905, S7916, and S7917 in the main CPU 63) so that the setting value can be set by the setting means. When,
In a situation where the supply of the operating power to the control means (main CPU 63) having the setting means is started and the process at the time of the supply start is being executed, the setting value of the use target in a situation other than the situation where the setting is possible is performed. Setting notifying means (a function of executing a setting confirmation process in the main CPU 63) for performing notification,
A gaming machine comprising:

  According to the feature Z1, since a setting value to be used is set from among a plurality of setting values corresponding to the degree of advantage of the player, the player can use a more advantageous setting value. That you expect. In this case, in order to confirm the set value set as the use target, it is necessary to temporarily stop the supply of the operating power to the control unit and then restart the supply of the operating power to the control unit. . As a result, it is possible to make it difficult to illegally check the set value. In addition, since the setting value is notified in the situation where the process at the time of the supply start is being executed, it is not necessary to notify the setting value in the situation where the game is interrupted. Therefore, it is possible to appropriately notify the set value.

  Feature Z2. The gaming machine according to feature Z1, wherein the situation generating means sets the settable situation in a situation where the process at the time of the supply start is being executed.

  According to the feature Z2, the setting possible state in which the setting value to be used can be set and the situation in which the setting value of the use target is notified in a situation other than the setting possible state are determined at the start of supply. It is possible to concentrate on the situation where the processing is being executed.

Feature Z3. A first specifying unit (a function of executing the processes of steps S7912 and S7916 in the main CPU 63) for specifying the occurrence of the first trigger event;
The setting notifying unit is configured to perform the setting based on a situation in which the process at the start of the supply is being executed and a situation in which the occurrence of the first trigger event has been identified by the first identifying unit. The gaming machine according to Feature Z1 or Z2, wherein the setting value of the use target is notified in a situation other than a situation.

  According to the feature Z3, in order to notify the set value of the use target, it is necessary to not only start the supply of the operation power to the control unit but also to generate a first trigger event. As a result, it is possible to make it difficult to illegally check the set value.

  Feature Z4. The gaming machine according to Feature Z3, wherein the first trigger event is that a predetermined operation is performed by a setting key on a setting key insertion unit (setting key insertion unit 68a).

  According to the feature Z4, in order to notify the setting of the use target, it is necessary to perform a predetermined operation with the setting key for the setting key insertion unit. As a result, it is possible to make it difficult to illegally check the set value.

Feature Z5. The setting notifying unit is configured to determine that the notification condition is satisfied based on a situation in which the process at the time of the supply start is being executed and a situation in which the occurrence of the first trigger event has been identified by the first identifying unit. In such a case, the setting value of the use target is notified in a situation that is not the setting possible situation,
The condition generating means establishes a setting condition based on a situation in which the process at the time of the supply start is being executed and a situation in which the occurrence of the first trigger event has been identified by the first identifying means. In such a case, the setting possible status is set,
The gaming machine according to feature Z3 or Z4, wherein the notification condition and the setting condition are different.

  According to the feature Z5, in either of the case where the settable state is generated and the case where the set value of the use target is notified, not only the supply of the operation power to the control unit is started but also the first trigger event is generated. Need to be generated. Accordingly, it is possible to make it difficult to perform any of an act of setting a setting value to be used due to fraud and an act of trying to confirm the setting value of the use target due to fraud. On the other hand, since the setting condition for generating the settable state and the notification condition for notifying the setting value of the use target are different, the setting condition and the setting value of the use target are notified. Can be generated independently.

Feature Z6. A second specifying unit (a function of executing the process of step S7905 in the main CPU 63) for specifying the occurrence of the second trigger event;
The setting condition is a condition in which the occurrence of the first trigger event is specified by the first specifying means in a state where the process at the time of the supply start is being executed, and the second specifying means specifies the occurrence of the second trigger event. It is established based on the situation where the occurrence of the trigger event has been identified,
The notification condition is a condition in which the occurrence of the first trigger event is specified by the first specifying means in a state where the process at the time of the supply start is being executed, and the second specifying means specifies the occurrence of the second trigger event. The gaming machine according to Feature Z5, which is established based on a situation where occurrence of a trigger event has not been identified.

  According to the feature Z6, in order to generate the settable state, it is necessary to start supplying the operating power to the control means and to generate not only the first trigger event but also the second trigger event. Thereby, in either case of setting the setting value to be used, or notifying the setting value of the use object, not only the supply of the operating power to the control unit is started, but also In a configuration in which it is necessary to generate the first trigger event, it is possible to further complicate the operation for generating the settable situation. Therefore, it is possible to more specifically prevent an act of illegally setting a setting value to be used.

  Feature Z7. The gaming machine according to Feature Z6, wherein the second opportunity event is that a predetermined operation means (reset button 68c) is operated.

  According to the feature Z7, in order to generate the settable state, it is necessary to start the supply of the operating power to the control unit and not only to generate the first trigger event but also to operate the predetermined operation unit. As a result, it is possible to prevent an operation for generating a settable status from becoming excessively complicated while making it difficult to illegally set a setting value to be used. It becomes possible.

  Feature Z8. An information erasing unit that executes an information erasing process based on a situation in which the occurrence of the second trigger event has been identified by the second identifying unit in a situation where the processing at the time of the supply start is being executed; The gaming machine according to feature Z6 or Z7, further comprising a function of executing the process of step S7915 in the main CPU 63).

  According to the feature Z8, the condition for generating the settable situation and the setting value of the use target in the situation other than the settable situation are utilized by using the second trigger event necessary for executing the information erasing process. It is possible to make the condition different from the condition for performing the notification.

  Feature Z9. The gaming machine according to Feature Z8, wherein the information erasing means executes the information erasing process even when the settable situation occurs.

  According to the feature Z9, it is possible to execute the information erasing process when the setting is possible.

  Feature Z10. In the situation where the process at the time of the supply start is being executed, the occurrence of the second trigger event is specified by the second specifying means, and the occurrence of the first trigger event is specified by the first specifying means. The gaming machine according to the features Z8 or Z9, wherein when the situation is not set, the information erasing process is executed by the information erasing means although the setting is not possible.

  According to the feature Z10, depending on whether or not the first trigger event occurs when the supply of the operating power to the control means is started, the information erasing process is executed and the information is settable. Can be selected when the erasing process is performed but the setting is not possible.

  In addition, with respect to the configuration of the features Z1 to Z10, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

<Characteristic a group>
Feature a1. Setting means (a function of executing a setting value updating process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage;
Situation generating means (function for executing the processing of steps S7905, S7916, and S7917 in the main CPU 63) so that the setting value can be set by the setting means. When,
Information erasing means for executing information erasing processing (function of executing processing of step S7915 in main CPU 63);
Setting notifying means (a function of executing a setting confirmation process in the main CPU 63) for notifying the setting value of the use target in a situation other than the setting possible situation;
First specifying means for specifying the occurrence of the first trigger event (the function of executing the processing of steps S7912 and S7916 in the main CPU 63);
Second specifying means for specifying the occurrence of the second trigger event (the function of executing the process of step S7905 in the main CPU 63);
With
The situation generating means specifies the occurrence of the first trigger event by the first specifying means in a state where the supply of the operating power to the control means having the setting means is started and the processing at the time of starting the supply is being executed. Based on the situation where the occurrence of the second trigger event has been identified by the second identifying means,
The information erasing unit is configured to execute the information erasing process based on a situation in which the occurrence of the second trigger event has been identified by the second identifying unit in a situation where the process at the time of the supply start is being executed. Run
In the situation where the process at the time of the supply start is being executed, the occurrence of the second trigger event is specified by the second specifying means, and the occurrence of the first trigger event is specified by the first specifying means. If it is a situation that has not been performed, the information erasing processing by the information erasing means is executed although it does not become the settable situation,
The setting notifying means is a state in which the occurrence of the first trigger event is specified by the first specifying means in a state in which the processing at the time of the supply start is being executed, and the second specifying means sets the second A gaming machine characterized in that, based on a situation in which the occurrence of a trigger event has not been specified, the setting value of the use target is notified in a situation that is not the settable situation.

  According to the feature a1, since a setting value to be used is set from a plurality of setting values corresponding to the player's advantage, the player can use a more advantageous setting value. That you expect. Further, since the configuration is such that the information erasing process can be executed, it is possible to prevent a game from being performed even though an information abnormality has occurred. Further, since the configuration is such that the set value set as the use target can be notified, the set value can be confirmed.

  In this case, in order to confirm the set value set as the use target, it is necessary to start the supply of the operating power to the control means and to generate the first trigger event. As a result, it is possible to make it difficult to illegally check the set value.

  In addition, in order to generate a settable state, it is necessary to start supplying the operating power to the control means and generate not only the first trigger event but also the second trigger event. Thereby, in either case of setting the setting value to be used, or notifying the setting value of the use object, not only the supply of the operating power to the control unit is started, but also In a configuration in which it is necessary to generate the first trigger event, it is possible to further complicate the operation for generating the settable situation. Therefore, it is possible to more specifically prevent an act of illegally setting a setting value to be used.

  Further, using the second opportunity event required to execute the information erasing process, a condition for generating a settable situation and a setting value of a use target in a situation other than the settable situation are notified. It is possible to make the conditions for making this different.

  Further, depending on whether or not the first trigger event occurs when the supply of the operating power to the control means is started, the information erasing process is executed and the setting is possible, and the information erasing process is performed. It is possible to select the case where the setting is executed but the setting is not possible.

  Feature a2. The gaming machine according to feature a1, wherein the first trigger event is that a predetermined operation is performed by a setting key on a setting key insertion unit (setting key insertion unit 68a).

  According to the feature a2, in order to notify the setting of the use target, it is necessary to perform a predetermined operation using the setting key for the setting key insertion unit. As a result, it is possible to make it difficult to illegally check the set value.

  Feature a3. The gaming machine according to features a1 or a2, wherein the second opportunity event is that a predetermined operation means (reset button 68c) is operated.

  According to the feature a3, in order to generate the settable state, it is necessary to start the supply of the operating power to the control unit and not only to generate the first trigger event but also to operate the predetermined operation unit. As a result, it is possible to prevent an operation for generating a settable status from becoming excessively complicated while making it difficult to illegally set a setting value to be used. It becomes possible.

  In addition, with respect to the configuration of the features a1 to a3, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1. H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

  According to the invention relating to the feature Z group and the feature a group, the following problems can be solved.

  Pachinko game machines and slot machines are known as game machines. For example, a pachinko game machine has a dish storage section for storing game balls given to a player on the front of the game machine, and the game balls stored in the dish storage section are guided to a game ball launching device. The game is fired toward the game area in accordance with the shooting operation of the player. Then, for example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the dish storage unit, for example. In a pachinko gaming machine, a configuration having an upper dish storage section and a lower dish storage section as dish storage sections is also known. In this case, game balls stored in the upper dish storage section are used to launch game balls. The game balls guided by the device and surplus in the upper dish storage section are discharged to the lower dish storage section.

  Further, in the slot machine, when a new game is started by operating the start lever while a medal is bet, a lottery process is executed by the control means. Further, when the lottery process is executed, the rotation of the reel is started by the rotation start control being executed by the control means, and when the stop button is operated during the rotation of the reel, the control means executes the rotation start control. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the rotation stop of the reels corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

  Here, in the gaming machines such as those described above, there is a demand for a configuration capable of suitably checking a set value that determines the advantage of the gaming machine, and there is still room for improvement in this respect. .

<Characteristic b group>
Feature b1. Setting means (a function of executing a setting value updating process in the main CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage;
Situation generating means (function for executing the processing of steps S7905, S7916, and S7917 in the main CPU 63) so that the setting value can be set by the setting means. When,
Setting monitoring means for executing setting monitoring processing for monitoring whether or not the setting value of the use target is abnormal (a function of executing the processing of step S8220 in the main CPU 63);
With
A game machine characterized in that the setting monitoring process is not included in the process at the time of starting the supply of operating power to the control unit having the setting unit when the supply of the operating power is started.

  According to the feature b1, since a setting value to be used is set from a plurality of set values corresponding to the player's advantage, the player can use a more advantageous setting value. That you expect. Further, since the setting monitoring process for monitoring whether the setting value of the use target is abnormal is executed, if the setting value of the use target is abnormal, it can be dealt with. Further, since the setting monitoring process is not included in the process at the start of supply, the above-described excellent effects can be achieved while preventing the processing load of the process at the start of supply from increasing.

  Feature b2. The gaming machine according to feature b1, wherein the situation generating means generates the settable situation in a situation where the processing at the time of starting the supply is being executed.

  According to the feature b2, a settable situation occurs in a situation in which the processing at the time of supply start is being performed, so that the set value of the use target can be set before the game is started. . In this case, since the set value to be used in the process at the start of supply is set, the processing load of the process at the start of supply increases accordingly. On the other hand, since the configuration of the feature b1 is provided and the setting monitoring process is not included in the process at the start of the supply, the processing load of the process at the start of the supply is prevented while further increasing the processing load. It is possible to monitor whether the set value is abnormal.

  Feature b3. The gaming machine according to feature b1 or b2, wherein the setting monitoring unit executes the setting monitoring process after the process at the time of starting the supply is completed.

  According to the feature b3, since the setting monitoring process is executed after the process at the start of supply is completed, the set value of the use target is abnormal while preventing the processing load of the process at the start of supply from increasing. It is possible to monitor whether or not.

  Feature b4. The gaming machine according to Feature b3, wherein the setting monitoring unit executes the setting monitoring process each time a monitoring trigger occurs after the process at the start of supply is completed.

  According to the feature b4, the setting monitoring process is executed each time a monitoring trigger occurs after the process at the start of supply is completed, so that it is easy to specify that the setting value of the use target is abnormal.

Feature b5. A means for executing interrupt processing that is started periodically (a function of executing first timer interrupt processing in the main CPU 63);
The gaming machine according to any one of features b1 to b4, wherein the setting monitoring process is included in the interrupt process.

  According to the feature b5, the setting monitoring process is executed every time the device is started periodically, so that it is possible to increase the execution frequency of monitoring whether the setting value of the use target is abnormal.

  Feature b6. The setting monitoring means controls the progress of the game based on the fact that the setting value of the use target is abnormal in the setting monitoring processing (steps S8207 and S8207 in the main CPU 63). The gaming machine according to any one of features b1 to b5, further comprising a function of executing the process of step S8302).

  According to the feature b6, when it is specified that the set value of the use target is abnormal, the progress of the game is regulated, so that the game is continued even though the set value of the use target is abnormal. It is possible to make it not.

  Feature b7. The setting monitoring unit is configured to notify the player that the setting possible state should be generated based on the fact that the setting value of the use target is abnormal in the setting monitoring process. The gaming machine according to any one of features b1 to b6, further comprising a unit for executing the function (a function of executing the process of step S8303 in the main CPU 63).

  According to the feature b7, when it is specified that the set value of the use target is abnormal, the notification that allows the player to recognize that the settable situation should be generated is executed. When the value becomes abnormal, it becomes possible to urge the manager of the gaming hall to eliminate the value.

  In addition, with respect to the configurations of the features b1 to b7, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R1 R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b1 Any one or more of b7 may be applied. As a result, a synergistic effect of the combined configuration can be achieved.

  According to the invention relating to the feature b group, the following problem can be solved.

  Pachinko game machines and slot machines are known as game machines. For example, a pachinko game machine has a dish storage section for storing game balls given to a player on the front of the game machine, and the game balls stored in the dish storage section are guided to a game ball launching device. The game is fired toward the game area in accordance with the shooting operation of the player. Then, for example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the dish storage unit, for example. In a pachinko gaming machine, a configuration having an upper dish storage section and a lower dish storage section as dish storage sections is also known. In this case, game balls stored in the upper dish storage section are used to launch game balls. The game balls guided by the device and surplus in the upper dish storage section are discharged to the lower dish storage section.

  Further, in the slot machine, when a new game is started by operating the start lever while a medal is bet, a lottery process is executed by the control means. Further, when the lottery process is executed, the rotation of the reel is started by the rotation start control being executed by the control means, and when the stop button is operated during the rotation of the reel, the control means executes the rotation start control. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the rotation stop of the reels corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

  Here, in a gaming machine such as the example described above, it is necessary to appropriately manage set values that determine the advantage of the gaming machine, and there is still room for improvement in this respect.

  Hereinafter, a basic configuration of a gaming machine to which each of the above features can be applied or applied to each of the features will be described.

  Pachinko gaming machine: operating means operated by a player, gaming ball firing means for firing a game ball based on the operation of the operating means, a ball path for guiding the fired game ball to a predetermined game area, A gaming machine comprising: a plurality of game components arranged in a region; and a bonus is provided to a player when a game ball passes through a predetermined passage portion of the game components.

  Spinning-type gaming machines such as slot machines: provided with a picture display device for variably displaying a plurality of pictures, variably displaying the plurality of pictures is started by the operation of the start operation means, and caused by the operation of the stop operation means A gaming machine in which the variable display of the plurality of pictures is stopped after a predetermined time or a predetermined time has elapsed, and a privilege is given to the player according to the pictures after the stop.

  DESCRIPTION OF SYMBOLS 10 ... Pachinko machine, 12 ... Game machine main body, 14 ... Front door frame, 28 ... Launching operation device, 33 ... First operating port, 34 ... Second operating port, 35 ... Thru gate, 49a ... Gate detection sensor, 63 ... Main CPU, 65 Main RAM, 68a Setting key insertion unit, 68b Update button, 68c Reset button, 69a First display device, 69b Second display device, 69c Third notification Display device, 112: management-side CPU, 117: history memory, 171: separate storage memory, 181 to 186: history memory for settings 1 to 6, 191: first history memory, 192: second history Memory, 201: first notification display device, 201a to 201g: display segment, 202: second notification display device, 202a to 202g: display segment, 203: third notification display device, 2 4 Fourth notification display device 221 Specified control work area 222 Specified control stack area 223 Specified control work area 224 Specified control stack area 231 Normal 232: Counter area for open / close execution mode, 233: Counter area for high frequency support mode, 234: Calculation result storage area, 241: Management RAM, 251: Reset signal output unit, 252: Program monitoring unit

Claims (1)

A control unit that executes various processes and temporarily stores information in an internal storage unit when performing the processes,
The control means,
A first predetermined process executing means for executing a first predetermined process among the various processes;
A second predetermined process executing means for executing a second predetermined process among the various processes;
A flag register provided in the internal storage means when the situation where the first predetermined processing is being executed is changed to the situation where the second predetermined processing is executed, or when the situation where the second predetermined processing is executed is changed. State setting means for setting the state of the specified state to a specific state;
A gaming machine comprising:

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