JP2020034343A - Pressure detector and processing circuit - Google Patents

Abstract

To reduce errors of output caused by a displaced phase while suppressing the influence of a common noise.SOLUTION: A processing circuit 30 in a pressure detector includes a first integration circuit 31 for integrating a positive charge signal output from the positive electrode 20b of a piezoelectric element 20; a second integration circuit 32 for integrating a negative charge signal output from the negative electrode 20a of the piezoelectric element 20; and a feedback circuit 33 for feeding a part of the output signal output from the second integration circuit 32 to the second integration circuit 32 through the first integration circuit 31.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a pressure detection device and a processing circuit.

  It has been studied to mount a combustion pressure detecting device for detecting a combustion pressure of an internal combustion engine on a device such as an automobile having an internal combustion engine.

  For example, Patent Document 1 discloses a charge amplifier that includes an integrating circuit including an operational amplifier and a capacitor, and integrates one output from a thin-plate piezoelectric transducer, and another that includes another operational amplifier and another capacitor. It includes an integrating circuit, integrates the other output from the thin-plate piezoelectric transducer, and further includes another operational amplifier, and also outputs the output of the input charge amplifier and the output of the other charge amplifier. A detection device comprising a differential amplifier for performing differential amplification is described.

JP-T-2013-545093

For example, when a configuration is adopted in which the difference between the outputs of the two integrating circuits is amplified by a differential amplifier, common mode noise commonly superimposed on two input signals supplied to the two integrating circuits is reduced. can do. However, when such a configuration is adopted, if there is a deviation between the phase of the output from one of the integrating circuits and the phase of the output from the other integrating circuit, the output from the differential amplifier An error resulting from the displacement will be included.
SUMMARY OF THE INVENTION It is an object of the present invention to suppress the influence of common mode noise and reduce output errors caused by phase shift.

The pressure detecting device according to the present invention includes a piezoelectric element that outputs a positive charge signal and a negative charge signal by receiving pressure, and a first integration that is connected to a positive electrode side of the piezoelectric element and integrates the positive charge signal. A first integrating circuit for outputting a signal; and an operational amplifier, a non-inverting input terminal of the operational amplifier is connected to an output side of the first integrating circuit, and an inverting input terminal of the operational amplifier is connected to the piezoelectric element. A second integration circuit connected to the negative electrode side for outputting a second integration signal obtained by integrating a difference between the first integration signal and the negative charge signal from an output terminal of the operational amplifier; And a feedback circuit for feeding back an inverted signal obtained by inverting the phase of the second integration signal output from the terminal to the non-inverting input terminal of the operational amplifier.
In such a pressure detecting device, the first integration circuit includes a passive element and does not include an operational amplifier.
The first integration circuit may include a capacitor and a resistor as the passive elements.
Further, the feedback circuit may be configured by an inverting amplifier circuit including another operational amplifier.
Still further, the voltage amplification rate in the inverting amplifier circuit is one.
The first integration circuit includes a first capacitor connected in parallel with the positive electrode side of the piezoelectric element, and the second integration circuit includes a first capacitor connected to the inverting input terminal and the output terminal of the operational amplifier. A second capacitor to be connected may be provided, wherein the first capacitor and the second capacitor have the same capacitance value.
Further, a connection cable for electrically connecting the piezoelectric element to the first integration circuit and the second integration circuit may be further included.
From another viewpoint, the processing circuit of the present invention is connected to the positive electrode side of a piezoelectric element that outputs a positive charge signal and a negative charge signal by receiving pressure, and integrates the positive charge signal. A first integration circuit that outputs a first integration signal;
An operational amplifier, wherein a non-inverting input terminal of the operational amplifier is connected to an output side of the first integrating circuit, and an inverting input terminal of the operational amplifier is connected to a negative side of the piezoelectric element; A second integration circuit that outputs a second integration signal obtained by integrating a difference between the signal and the negative charge signal from an output terminal of the operational amplifier; and a second integration signal that is output from the output terminal of the operation amplifier. And a feedback circuit for feeding back the inverted signal obtained by inverting the phase to the non-inverting input terminal of the operational amplifier.

  ADVANTAGE OF THE INVENTION According to this invention, while being able to suppress the influence by a common mode noise, the error of the output resulting from a phase shift can be reduced.

1 is a schematic configuration diagram of a pressure detection device to which an embodiment is applied. FIG. 3 is a diagram illustrating a configuration of a processing circuit according to the first embodiment. FIG. 9 is a diagram illustrating a configuration of a processing circuit according to a second embodiment. FIG. 9 is a diagram illustrating a configuration of a processing circuit in a comparative example. FIGS. 3A and 3B are diagrams illustrating an example of output waveforms of each unit in the processing circuit according to the first embodiment. FIGS. 11A and 11B are diagrams illustrating an example of output waveforms of each unit in the processing circuit according to the second embodiment. (A), (b) is a figure which shows an example of the output waveform of each part in the processing circuit of a comparative example.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
<Embodiment>
[Configuration of pressure detector]
FIG. 1 is a schematic configuration diagram of a pressure detection device 1 to which an embodiment is applied.
The pressure detection device 1 according to the present embodiment can be used to detect pressure in various internal combustion engines and the like. In particular, the pressure detection device 1 is applied to a marine engine, an airplane engine, or the like, in which a unit for detecting pressure and a unit for performing processing on the detection result must be installed at a certain distance. It is possible.

  The pressure detecting device 1 includes a pressure detecting unit 2 for detecting pressure in various internal combustion engines and the like, a signal processing unit 3 for processing a pressure detection signal sent from the pressure detecting unit 2, a pressure detecting unit 2, And a connection cable 4 for electrically connecting the signal processing unit 3. When the pressure detecting device 1 is applied to the above-described marine engine, airplane engine, or the like, the length of the connection cable 4 may be several meters to several tens of meters.

[Pressure detection unit]
The pressure detection unit 2 has a built-in piezoelectric element 20 that outputs a charge corresponding to a pressure received from the outside as a charge signal (detection signal).
As the piezoelectric body constituting the piezoelectric element 20 of the present embodiment, either a single crystal body or a polycrystal body may be used, and either the piezoelectric longitudinal effect or the piezoelectric lateral effect may be used.

[Signal processing unit]
The signal processing unit 3 has a built-in processing circuit 30 that performs various processes on the charge signal received from the piezoelectric element 20 of the pressure detection unit 2 via the connection cable 4 and outputs the signal as an output signal. The details of the processing circuit 30 will be described later.

[Connection cable]
The connection cable 4 is a signal cable using a metal conductor. Specific examples of this type of connection cable 4 include a coaxial cable and a twisted pair cable.

<First Embodiment>
[Processing circuit]
FIG. 2 is a diagram illustrating a configuration of the processing circuit 30 according to the first embodiment.
The processing circuit 30 of the present embodiment integrates a first integration circuit 31 for integrating a positive charge signal output from the positive electrode 20b of the piezoelectric element 20 and a negative charge signal output from the negative electrode 20a of the piezoelectric element 20. And a second integration circuit 32 that performs the operation. The processing circuit 30 further includes a feedback circuit 33 that feeds back a part of the output signal output from the second integration circuit 32 to the second integration circuit 32 via the first integration circuit 31. The piezoelectric element 20 according to the present embodiment is configured to output a charge signal according to the received pressure from the negative electrode 20a and the positive electrode 20b when receiving a pressure from the outside.

[First integration circuit]
First, the first integration circuit 31 will be described. The first integration circuit 31 of the present embodiment is configured by a combination of a plurality of passive elements without using an active element such as an operational amplifier. The first integration circuit 31 includes a first capacitor C1 and a first resistor R1.

  One end of the first capacitor C1 is connected to the positive electrode 20b of the piezoelectric element 20, and the other end is grounded. One end of the first resistor R1 is connected to one end of the first capacitor C1, and the other end is connected to an output terminal of a second operational amplifier OP2 (details will be described later) provided in the feedback circuit 33. . Further, one end of the first resistor R1 is also connected to a non-inverting input terminal of a first operational amplifier OP1 (details will be described later) provided in the second integrating circuit 32.

[Second integration circuit]
Next, the second integration circuit 32 will be described. The second integration circuit 32 of the present embodiment is configured by a combination of an active element including an operational amplifier and a plurality of passive elements. The second integrating circuit 32 includes a first operational amplifier OP1, a second capacitor C2, and a second resistor R2. Here, the first operational amplifier OP1 operates with a dual power supply of, for example, ± 5V.

  The inverting input terminal of the first operational amplifier OP1 is connected to the negative electrode 20a of the piezoelectric element 20. The non-inverting input terminal of the first operational amplifier OP1 is connected to one end of a first resistor R1 provided in the first integration circuit 31. Further, the output terminal of the first operational amplifier OP1 is connected to an external output terminal OUT provided in the processing circuit 30 and to one end of a third resistor R3 (details will be described later) provided in the feedback circuit 33. Have been. One end of the second capacitor C2 is connected to the inverting input terminal of the first operational amplifier OP1, and the other end is connected to the output terminal of the first operational amplifier OP1. Further, one end of the second resistor R2 is connected to the inverting input terminal of the first operational amplifier OP1, and the other end is connected to the output terminal of the first operational amplifier OP1. Therefore, the second capacitor C2 and the second resistor R2 are connected in parallel to the inverting input terminal and the output terminal of the first operational amplifier OP1. Note that the second resistor R2 provided in the second integration circuit 32 is for suppressing oscillation in the second integration circuit 32.

(Feedback circuit)
Next, the feedback circuit 33 will be described. The feedback circuit 33 according to the present embodiment is configured by a combination of an active element including an operational amplifier and a plurality of passive elements. The feedback circuit 33 according to the present embodiment includes an inverting amplifier circuit using an operational amplifier. Then, the feedback circuit 33 includes a second operational amplifier OP2, a third resistor R3, a fourth resistor R4, and a third capacitor C3. Here, the second operational amplifier OP2 operates with a dual power supply of, for example, ± 5V.

  One end of the third resistor R3 is connected to the output terminal of the first operational amplifier OP1 provided in the second integration circuit 32, and the other end is connected to the inverting input terminal of the second operational amplifier OP2. The inverting input terminal of the second operational amplifier OP2 is connected to the other end of the third resistor R3. Further, the non-inverting input terminal of the second operational amplifier OP2 is grounded. Furthermore, the output terminal of the second operational amplifier OP2 is connected to the other end of the first resistor R1 provided in the first integration circuit 31. Therefore, the output of the feedback circuit 33 is input to the non-inverting input terminal of the first operational amplifier OP1 provided in the second integration circuit 32 via the first resistor R1 provided in the first integration circuit 31. It has become. Further, one end of the fourth resistor R4 is connected to the inverting input terminal of the second operational amplifier OP2, and the other end is connected to the output terminal of the second operational amplifier OP2. Further, one end of the third capacitor C3 is connected to the inverting input terminal of the second operational amplifier OP2, and the other end is connected to the output terminal of the second operational amplifier OP2. Therefore, the fourth resistor R4 and the third capacitor C3 are connected in parallel to the inverting input terminal and the output terminal of the second operational amplifier OP2. The third capacitor C3 provided in the feedback circuit 33 is for suppressing oscillation in the feedback circuit 33.

[Pressure detection operation by pressure detector]
Now, a pressure detection operation by the pressure detection device 1 of the present embodiment will be described.
When a device to be subjected to pressure detection (for example, an internal combustion engine) is operating, the pressure generated by the device is applied to the piezoelectric element 20 provided in the pressure detection unit 2. Accordingly, charges corresponding to the received pressure are generated in the negative electrode 20a and the positive electrode 20b of the piezoelectric element 20. The positive and negative charges generated in the piezoelectric element 20 in this manner are supplied to the processing circuit 30 of the signal processing unit 3 via the connection cable 4 as a charge signal.

  The charge signal supplied to the processing circuit 30 is processed by a first integration circuit 31, a second integration circuit 32, and a feedback circuit 33 provided in the processing circuit 30, and the charge signal of the pressure detection device 1 is output from an external output terminal OUT. The signal is output as an output signal to a control device (not shown) of a device provided outside. Then, the control device of the device controls the operation and the like of the device based on the received output signal.

[Operation of processing circuit]
Subsequently, the operation of each circuit provided in the processing circuit 30 will be described.
First, a positive charge signal is input to the first integration circuit 31 from the positive electrode 20b of the piezoelectric element 20. Then, the first integration circuit 31 outputs the positive integration signal (an example of the first integration signal) obtained by integrating the positive charge signal to the non-inverting state of the first operational amplifier OP1 provided in the second integration circuit 32. Output to the inverted input terminal.

  Further, the second integration circuit 32 receives a negative charge signal from the negative electrode 20 a of the piezoelectric element 20 and a positive integration signal from the first integration circuit 31. More specifically, a negative charge signal is input from the negative electrode 20a of the piezoelectric element 20 to the inverting input terminal of the first operational amplifier OP1 provided in the second integrating circuit 32. The positive integration signal is input from the first integration circuit 31 to the non-inverting input terminal. Then, the second integration circuit 32 outputs a positive integration signal (an example of a second integration signal) obtained by integrating the difference between the negative charge signal and the positive integration signal from the output terminal of the first operational amplifier OP1. Output. This positive integration signal becomes an output signal, and is output to the control device of the device via the external output terminal OUT.

  At this time, the positive integration signal output from the output terminal of the first operational amplifier OP1 is input to the feedback circuit 33. More specifically, a positive integration signal is input to the inverting input terminal of the second operational amplifier OP2 provided in the feedback circuit 33 via the third resistor R3. Here, the feedback circuit 33 of the present embodiment is configured by an inverting amplifier circuit having an amplification factor of -1 (R3 = R4). Therefore, the feedback circuit 33 outputs a feedback signal (an example of an inverted signal) obtained by inverting the positive and negative of the input positive integration signal via the first resistor R1 provided in the first integration circuit 31. , To the non-inverting input terminal of the first operational amplifier OP1 provided in the second integrating circuit 32. That is, the negative integration signal, that is, the negative feedback of the output signal is performed on the second integration circuit 32.

[Summary of First Embodiment]
In the pressure detection device 1 of the present embodiment, the positive charge signal supplied from the positive electrode 20b of the piezoelectric element 20 is integrated, and the negative charge signal supplied from the negative electrode 20a of the piezoelectric element 20 is integrated. To offset each other. Thus, common mode noise superimposed on the connection cable 4 from an external noise source can be reduced.

  In the present embodiment, a feedback circuit 33 is provided in the processing circuit 30, and a feedback signal obtained by inverting the positive and negative of the positive integration signal output from the second integration circuit 32 is fed back to the second integration circuit 32. did. Accordingly, in the second integration circuit 32, it is possible to suppress the phase shift between the negative charge signal supplied from the piezoelectric element 20 and the positive integration signal supplied from the first integration circuit 31, and the second integration circuit The error of the waveform of the positive integrated signal output from the circuit 32, that is, the output signal can be reduced.

  Further, in the present embodiment, the first integration circuit 31 is configured by a combination of a plurality of passive elements without using an active element such as an operational amplifier. An operational amplifier that is an active element has a response speed characteristic called a slew rate. When a signal input to the operational amplifier exceeds an upper limit of the slew rate, a distortion component is mixed into an output signal. In order to obtain an integrated waveform with high accuracy with respect to an input signal in an integrating circuit, it is conceivable to use an operational amplifier having a large slew rate. However, generally, an operational amplifier having a large slew rate is expensive and easily available. Absent. In the present embodiment, the processing circuit 30 can be configured at low cost by configuring the first integration circuit 31 with a combination of passive elements without using an active element, and the output signal of the first integration circuit 31 Mixing of a distortion component can be suppressed.

  By the way, in the present embodiment, the first integrating circuit 31 is configured by a combination of passive elements without using an active element such as an operational amplifier, and the second integrating circuit 32 is configured to include an operational amplifier. The second integration circuit 32 has a configuration including an operational amplifier, so that the effect of the second integration circuit 32 due to the slew rate is considered. In the present embodiment, however, by providing the feedback circuit 33, The configuration is such that the phase shift of the output signal of the first integration circuit 31 and the second integration circuit 32 can be suppressed, and the error of the waveform of the output signal of the second integration circuit 32 can be reduced.

<Embodiment 2>
The present embodiment is almost the same as the first embodiment, except for a part of the configuration of the processing circuit 30. In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

[Processing circuit]
FIG. 3 is a diagram illustrating a configuration of the processing circuit 30 according to the second embodiment.
The processing circuit 30 of the present embodiment also includes a first integration circuit 31, a second integration circuit 32, and a feedback circuit 33. Here, the configurations of the second integration circuit 32 and the feedback circuit 33 are the same as those of the processing circuit 30 of the first embodiment shown in FIG. Further, the processing circuit 30 of the present embodiment is different from the processing circuit 30 in that the first integration circuit 31 is configured by a combination of a plurality of passive elements without using an active element such as an operational amplifier. This embodiment is the same as the first embodiment in that it has one resistor R1, but is different from the first embodiment in the connection relationship therebetween.

[First integration circuit]
Now, the first integration circuit 31 will be described. The first integration circuit 31 includes a first capacitor C1 and a first resistor R1.

  One end of the first capacitor C1 is connected to the positive electrode 20b of the piezoelectric element 20, and the other end is connected to the output terminal of the second operational amplifier OP2 provided in the feedback circuit 33. One end of the first resistor R1 is connected to one end of the first capacitor C1, and the other end is connected to an output terminal of the second operational amplifier OP2 provided in the feedback circuit 33. Further, one end of the first resistor R1 is connected to a non-inverting input terminal of a first operational amplifier OP1 provided in the second integrating circuit 32.

[Summary of Embodiment 2]
In the pressure detecting device 1 according to the present embodiment, the same effect as in the first embodiment can be obtained. In particular, in the present embodiment, the connection method of the first capacitor C1 and the first resistor R1 in the first integration circuit 31 is different from that of the first embodiment. The effect of the stray capacitance on the line reaching the capacitor C1 can be reduced as compared with the first embodiment.

<Others>
In the first and second embodiments, the combustion pressure of the internal combustion engine is targeted for pressure detection by the pressure detection device 1, but the present invention is not limited to this. For example, the above-described pressure detection device 1 can be used for detecting a pressure in a tire air pressure sensor or various industrial devices, and can also be used for detecting acceleration of a gas turbine or the like by detecting acceleration as stress. .

  Further, the processing circuit 30 of the first and second embodiments processes the charge signal from the piezoelectric element 20, but is not limited to this, and can be used to process various input signals.

Hereinafter, the present invention will be described in detail based on examples. However, the present invention is not limited to the following examples unless it exceeds the gist.
The present inventor produced a plurality of pressure detecting devices 1 having different configurations of the processing circuit 30, and evaluated each of the obtained pressure detecting devices 1 based on electrical characteristics.

  The configuration of the pressure detectors 1 of the first and second embodiments and the comparative example, more specifically, the configuration of the processing circuit 30 will be described.

[Processing circuit of each embodiment]
In Example 1, the processing circuit 30 illustrated in FIG. 2 and described in Embodiment 1 was used. In Example 2, the processing circuit 30 illustrated in FIG. 3 and described in Embodiment 2 was used.
Here, Table 1 shows a list of electrical characteristics of each element used in the processing circuits 30 of the first and second embodiments.

  In the first embodiment, the capacitance value of the first capacitor C1 constituting the first integration circuit 31 is set to 1000 pF, and the resistance value of the first resistor R1 is set to 10 GΩ. In the first embodiment, LTC6241 manufactured by Analog Devices, Inc. was used as the first operational amplifier OP1 included in the second integration circuit 32. Further, in the first embodiment, the capacitance value of the second capacitor C2 constituting the second integration circuit 32 was set to 1000 pF, and the resistance value of the second resistor R2 was set to 10 GΩ. In the first embodiment, as the second operational amplifier OP2 included in the feedback circuit 33, the same LTC1241 manufactured by Analog Devices, Inc. as the first operational amplifier OP1 was used. Further, in the first embodiment, the respective resistance values of the third resistor R3 and the fourth resistor R4 constituting the feedback circuit 33 are set to 10 kΩ, and the capacitance value of the third capacitor C3 is set to 200 pF.

  On the other hand, in the second embodiment, the resistance value of the first resistor R1 forming the first integration circuit 31 is set to 5 GΩ, and the resistance value of the second resistor R2 forming the second integration circuit 32 is set to 5 GΩ. The same as in Example 1.

[Processing circuit of comparative example]
FIG. 4 is a diagram illustrating a configuration of the processing circuit 30 in the comparative example.
The processing circuit 30 of the comparative example includes a positive integration circuit 301 that integrates a positive charge signal output from the positive electrode 20b of the piezoelectric element 20 and a negative integration circuit that integrates a negative charge signal output from the negative electrode 20a of the piezoelectric element 20. And a side integration circuit 302. The processing circuit 30 of the comparative example further includes a differential amplifier circuit 303 that amplifies the difference between the positive integration signal output from the positive integration circuit 301 and the negative integration signal output from the negative integration circuit 302. I have. As described above, the processing circuit 30 of the comparative example is common to the first and second embodiments in that it has two integration circuits, but the input / output relationship is different from the first and second embodiments. Further, the processing circuit 30 of the comparative example is different from the first and second embodiments in that the processing circuit 30 includes a differential amplifier circuit 303 instead of the feedback circuit 33.

[Positive integration circuit]
First, the positive integration circuit 301 will be described. The positive integration circuit 301 is configured by a combination of an active element including an operational amplifier and a plurality of passive elements. The positive integration circuit 301 includes a positive operational amplifier OP01, a positive capacitor C01, and a positive resistor R01. Here, the positive-side operational amplifier OP01 operates with a dual power supply of, for example, ± 5V.

  The inverting input terminal of the positive side operational amplifier OP01 is connected to the positive electrode 20b of the piezoelectric element 20. The non-inverting input terminal of the positive side operational amplifier OP01 is grounded. Further, the output terminal of the positive side operational amplifier OP01 is connected to one end of a differential first resistor R031 (details will be described later) provided in the differential amplifier circuit 303. One end of the positive side capacitor C01 is connected to the inverting input terminal of the positive side operational amplifier OP01, and the other end is connected to the output terminal of the positive side operational amplifier OP01. Further, one end of the positive-side resistor R01 is connected to the inverting input terminal of the positive-side operational amplifier OP01, and the other end is connected to the output terminal of the positive-side operational amplifier OP01. Therefore, the positive-side capacitor C01 and the positive-side resistor R01 are connected in parallel to the inverting input terminal and the output terminal of the positive-side operational amplifier OP01. The positive-side resistor R01 provided in the positive-side integration circuit 301 is for suppressing oscillation in the positive-side integration circuit 301.

[Negative integration circuit]
Next, the negative integration circuit 302 will be described. The negative integration circuit 302 is configured by a combination of an active element including an operational amplifier and a plurality of passive elements. The negative integration circuit 302 includes a negative operational amplifier OP02, a negative capacitor C02, and a negative resistor R02. Here, the negative-side operational amplifier OP02 operates with a dual power supply of, for example, ± 5V.

  The inverting input terminal of the negative operational amplifier OP02 is connected to the negative electrode 20a of the piezoelectric element 20. The non-inverting input terminal of the negative operational amplifier OP02 is grounded. Further, the output terminal of the negative operational amplifier OP02 is connected to one end of a differential second resistor R032 (details will be described later) provided in the differential amplifier circuit 303. One end of the negative capacitor C02 is connected to the inverting input terminal of the negative operational amplifier OP02, and the other end is connected to the output terminal of the negative operational amplifier OP02. Further, one end of the negative resistor R02 is connected to the inverting input terminal of the negative operational amplifier OP02, and the other end is connected to the output terminal of the negative operational amplifier OP02. Therefore, the negative capacitor C02 and the negative resistor R02 are connected in parallel to the inverting input terminal and the output terminal of the negative operational amplifier OP02. The negative resistor R02 provided in the negative integration circuit 302 is for suppressing oscillation in the negative integration circuit 302. Thus, the negative integration circuit 302 has a common circuit configuration with the positive integration circuit 301.

(Differential amplifier circuit)
Subsequently, the differential amplifier circuit 303 will be described. The differential amplifier circuit 303 is configured by a combination of an active element including an operational amplifier and a plurality of passive elements. The differential amplifier circuit 303 includes a differential operational amplifier OP03, a first differential resistor R031, a second differential resistor R032, a third differential resistor R033, and a fourth differential resistor R034. I have. Here, the differential operational amplifier OP03 operates with a dual power supply of, for example, ± 5V.

  One end of the differential first resistor R031 is connected to the output terminal of the positive operational amplifier OP01 provided in the positive integration circuit 301, and the other end is connected to the non-inverting input terminal of the differential operational amplifier OP03. ing. One end of the second differential resistor R032 is connected to the output terminal of the negative operational amplifier OP02 provided in the negative integration circuit 302, and the other end is connected to the inverting input terminal of the differential operational amplifier OP03. Have been. The non-inverting input terminal of the differential operational amplifier OP03 is connected to the other end of the first differential resistor R031. Further, the inverting input terminal of the differential operational amplifier OP03 is connected to the other end of the second differential resistor R032. Further, the output terminal of the differential operational amplifier OP03 is connected to an external output terminal OUT provided in the processing circuit 30. One end of the third differential resistor R033 is connected to the other end of the first differential resistor R031 and the non-inverting input terminal of the differential operational amplifier OP03, and the other end is grounded. Further, one end of the differential fourth resistor R034 is connected to the other end of the differential second resistor R032 and the inverting input terminal of the differential operational amplifier OP03, and the other end is connected to the output terminal of the differential operational amplifier OP03. It is connected.

  Here, Table 2 shows a list of electrical characteristics of each element used in the processing circuit 30 of the comparative example.

  In the comparative example, LTC6244HV manufactured by Analog Devices, Inc. was used as the positive-side operational amplifier OP01 included in the positive-side integration circuit 301. In the comparative example, the resistance of the positive-side resistor R01, which constitutes the positive-side integration circuit 301, was 10 GΩ, and the capacitance of the positive-side capacitor C01 was 1,000 pF. In the comparative example, as the negative-side operational amplifier OP02 included in the negative-side integration circuit 302, the same LTC6244HV manufactured by Analog Devices as the positive-side operational amplifier OP01 was used. Further, in the comparative example, the resistance of the negative resistor R02 constituting the negative integration circuit 302 was 10 GΩ, and the capacitance of the negative capacitor C02 was 1000 pF. As described above, in the comparative example, the same element was used for each element constituting the positive integration circuit 301 and the negative integration circuit 302. In the comparative example, as the differential operational amplifier OP03 included in the differential amplifier circuit 303, the same LTC6244HV manufactured by Analog Devices as the positive operational amplifier OP01 and the negative operational amplifier OP02 was used. Furthermore, in the comparative example, each resistance value of the first differential resistor R031 to the fourth differential resistor R034 constituting the differential amplifier circuit 303 was set to 1 kΩ.

[Evaluation method]
Next, an evaluation method based on electrical characteristics will be described. In this case, the electrical characteristics were evaluated based on the response characteristics of each processing circuit 30.
More specifically, the inventor supplies a sine wave having a frequency of 1 kHz (period: 1 msec) as an input signal corresponding to a charge signal to each of the processing circuits 30 of the first and second embodiments and the comparative example. The measurement was performed on the external output voltage V _{OUT and the} like corresponding to the output signal generated at the external output terminal OUT.

[Output Waveforms of Each Unit in Processing Circuit of First Embodiment]
FIG. 5 is a diagram illustrating an example of an output waveform of each unit in the processing circuit 30 according to the first embodiment illustrated in FIG.
Here, FIG. 5A shows an example of an output waveform of a current in the processing circuit 30 of the first embodiment. More specifically, FIG. 5A illustrates a first capacitor current _IC1 flowing through the first capacitor C1 provided in the first integration circuit 31 and a second capacitor C2 provided in the second integration circuit 32. And the second capacitor current _IC2 flowing through the circuit. In FIG. 5A, the first capacitor current I _C1 is indicated by a broken line, and the second capacitor current I _C2 is indicated by a solid line. In FIG. 5A, the horizontal axis represents time, and the vertical axis represents current value. The relationship between the horizontal axis and the vertical axis is the same in FIGS. 6A and 7A described later.

FIG. 5B illustrates an example of a voltage output waveform in the processing circuit 30 according to the first embodiment. More specifically, FIG. 5B shows an external output voltage V _OUT generated at the external output terminal OUT and an internal output terminal OUTX provided at one end of the first capacitor C1 of the first integration circuit 31. The relationship with the internal output voltage V _OUTX is shown. In FIG. 5B, the external output voltage V _OUT is indicated by a solid line, and the internal output voltage V _OUTX is indicated by a broken line. In FIG. 5B, the horizontal axis represents time, and the vertical axis represents voltage. The relationship between the horizontal axis and the vertical axis is the same in FIGS. 6B and 7B described later.

First, FIG. 5A shows that in the processing circuit 30 of the first embodiment, the phases of the first capacitor current I _C1 and the second capacitor current I _C2 are inverted. Further, each of the magnitude of the first capacitor current _{I C1} and the second capacitor current _{I C2} (maximum value), was on the order of ± 1.0 .mu.A.

Next, FIG. 5B shows that in the processing circuit 30 of the first embodiment, the phases of the internal output voltage V _OUTX and the external output voltage V _OUT are aligned. Then, the magnitude (maximum value) of the external output voltage V _OUT in the processing circuit 30 of the first embodiment was about +630 mV.

[Output Waveforms of Each Unit in Processing Circuit of Second Embodiment]
FIG. 6 is a diagram illustrating an example of an output waveform of each unit in the processing circuit 30 according to the second embodiment illustrated in FIG.
Here, FIG. 6A illustrates an example of an output waveform of a current in the processing circuit 30 according to the second embodiment. More specifically, FIG. 6A illustrates a first capacitor current _IC1 flowing through the first capacitor C1 provided in the first integration circuit 31 and a second capacitor C2 provided in the second integration circuit 32. And the second capacitor current _IC2 flowing through the circuit. In FIG. 6A, the first capacitor current I _C1 is indicated by a broken line, and the second capacitor current I _C2 is indicated by a solid line.

FIG. 6B illustrates an example of a voltage output waveform in the processing circuit 30 according to the second embodiment. More specifically, FIG. 6B shows that the external output voltage V _OUT generated at the external output terminal OUT and the first output terminal OUT_1 provided at one end of the first resistor R1 of the first integration circuit 31 are connected to the external output voltage V _OUT. a first output voltage _{V OUT_1} resulting shows the relationship between the second output voltage _{V OUT_2} generated in the second output terminal OUT_2 provided at the other end of the first resistor R1 of the first integrator 31. In FIG. 6B, the external output voltage V _OUT is _indicated by a solid line, the first output voltage V _{OUT_1} is _indicated by a broken line, and the second output voltage V _{OUT_2} is _indicated by a two-dot chain line.

First, FIG. 6A shows that in the processing circuit 30 of the second embodiment, as in the first embodiment, the phases of the first capacitor current I _C1 and the second capacitor current I _C2 are inverted. Further, each of the magnitude of the first capacitor current _{I C1} and the second capacitor current _{I C2} (maximum value), as in Example 1, was on the order of ± 1.0 .mu.A.

Next, FIG. 6B shows that in the processing circuit 30 of the second embodiment, the phases of the external output voltage V _OUT and the second output voltage V _{OUT_2} are inverted. Note that the magnitude of the first output voltage V _{OUT_1 pulsated} slightly, but was substantially constant at about +10 mV. The magnitude (maximum value) of the external output voltage V _OUT in the processing circuit 30 of the second embodiment is determined by setting each of the first resistor R1 and the second resistor R2 to a half of that of the first embodiment. It was about +315 mV, which is almost half of 1.

[Output Waveforms of Each Unit in Processing Circuit of Comparative Example]
FIG. 7 is a diagram illustrating an example of an output waveform of each unit in the processing circuit 30 of the comparative example illustrated in FIG.
Here, FIG. 7A shows an example of a current output waveform in the processing circuit 30 of the comparative example. More specifically, FIG. 7A shows a positive-side capacitor current _IC01 flowing through the positive-side capacitor C01 provided in the positive-side integration circuit 301 and a negative-side capacitor C02 provided in the negative-side integration circuit 302. And the negative side capacitor current _IC02 flowing through the circuit. Then, in FIG. 7 (a), the positive side capacitor current _{I C01} by a broken line, a solid line a negative side capacitor current _{I C02,} respectively show.

FIG. 7B shows an example of a voltage output waveform in the processing circuit 30 of the comparative example. More specifically, FIG. 7B shows the external output voltage V _OUT generated at the external output terminal _OUT and the positive output voltage V _OUT generated at the positive output terminal OUT + located at the output stage of the positive integration circuit 301. ₄ shows the relationship between _{OUT +} and a negative output voltage V _OUT− generated at a negative output terminal OUT− located at the output stage of the negative integration circuit 302. In FIG. 7B, the external output voltage V _OUT is indicated by a solid line, the positive output voltage V _{OUT +} is indicated by a broken line, and the negative output voltage V _OUT− is indicated by a two-dot chain line.

FIG. 7A shows that in the processing circuit 30 of the comparative example, the phases of the positive-side capacitor current _IC01 and the negative-side capacitor current _IC02 are inverted. Also, the positive side capacitor current _{I C01} and a respective magnitude of the negative-side capacitor current _{I C02} (maximum value), was on the order of ± 1.0 .mu.A.

Next, FIG. 7B shows that in the processing circuit 30 of the comparative example, the phases of the positive output voltage V _{OUT +} and the negative output voltage V _OUT− are inverted. The magnitude (maximum value) of the external output voltage V _OUT in the processing circuit 30 of the comparative example is determined by the error caused by the phase shift between the positive output voltage V _{OUT +} and the negative output voltage V _OUT− in the first embodiment. It was about +600 mV, which is smaller than that.

The first and second embodiments can perform highly accurate processing on an input signal because the error caused by the phase shift is smaller than that of the comparative example. Further, when the resistance values included in the integration circuits of the first, second, and comparative examples are made equal to each other, the external output voltage _VOUT of the first and second examples is higher than that of the comparative example. Therefore, the processing circuit 30 that is resistant to disturbance noise can be realized. Furthermore, the first and second embodiments are different from the comparative example in which the feedback circuit 33 is not provided, in that the output waveform due to the environmental temperature change of the processing circuit 30 is not represented in the output waveforms shown in FIGS. And the effect of reducing the influence of variations in the components of the processing circuit. In the first and second embodiments, the feedback circuit 33 may be configured to have a higher responsiveness than the second integration circuit 32 in order to obtain further excellent output characteristics.

DESCRIPTION OF SYMBOLS 1 ... Pressure detection device, 2 ... Pressure detection unit, 3 ... Signal processing unit, 4 ... Connection cable, 20 ... Piezoelectric element, 20a ... Negative electrode, 20b ... Positive electrode, 30 ... Processing circuit, 31 ... First integration circuit, 32 ... 2nd integrating circuit, 33 feedback circuit, 301 positive integration circuit, 302 negative integration circuit, 303 differential amplifier circuit

Claims (8)

A piezoelectric element that outputs a positive charge signal and a negative charge signal by receiving pressure,
A first integration circuit connected to the positive electrode side of the piezoelectric element and outputting a first integration signal obtained by integrating the positive charge signal;
An operational amplifier, wherein a non-inverting input terminal of the operational amplifier is connected to an output side of the first integrating circuit, and an inverting input terminal of the operational amplifier is connected to a negative side of the piezoelectric element; A second integration circuit that outputs a second integration signal obtained by integrating a difference between the signal and the negative charge signal from an output terminal of the operational amplifier;
A feedback circuit for feeding back an inverted signal obtained by inverting the phase of the second integration signal output from the output terminal of the operational amplifier to the non-inverted input terminal of the operational amplifier.   The pressure detection device according to claim 1, wherein the first integration circuit includes a passive element and does not include an operational amplifier.   3. The pressure detection device according to claim 2, wherein the first integration circuit includes a capacitor and a resistor as the passive elements.   4. The pressure detecting device according to claim 1, wherein the feedback circuit is configured by an inverting amplifier circuit including another operational amplifier.   5. The pressure detecting device according to claim 4, wherein the voltage amplification factor in the inverting amplifier circuit is one. The first integration circuit includes a first capacitor connected in parallel with the positive electrode side of the piezoelectric element, and the second integration circuit is connected to the inverting input terminal and the output terminal of the operational amplifier. A second capacitor,
The pressure detecting device according to claim 1, wherein the first capacitor and the second capacitor have the same capacitance value.   The pressure detecting device according to claim 1, further comprising a connection cable that electrically connects the piezoelectric element to the first integration circuit and the second integration circuit. A first integration circuit that is connected to the positive electrode side of the piezoelectric element that outputs a positive charge signal and a negative charge signal by receiving pressure, and that outputs a first integration signal obtained by integrating the positive charge signal;
An operational amplifier, wherein a non-inverting input terminal of the operational amplifier is connected to an output side of the first integrating circuit, and an inverting input terminal of the operational amplifier is connected to a negative side of the piezoelectric element; A second integration circuit that outputs a second integration signal obtained by integrating a difference between the signal and the negative charge signal from an output terminal of the operational amplifier;
A processing circuit comprising: a feedback circuit that feeds back an inverted signal obtained by inverting the phase of the second integration signal output from the output terminal of the operational amplifier to the non-inverting input terminal of the operational amplifier.