JP2020024373A - Display device - Google Patents

Abstract

To reduce a difference in characteristics between element circuits.SOLUTION: A display device of the present invention includes an arrayed power supply line, a first drive transistor arranged on the first side of each power supply line, a second drive transistor arranged on the second side of each power supply line, and first color, second color and third color light emitting elements. The first and second drive transistors of the first power supply line respectively drive a first-color first light emitting element and a second-color first light emitting element. The first and second drive transistors of the second power supply line respectively drive a third-color first light emitting element and a second-color second light emitting element. The first and second drive transistors of the third power supply line respectively drive a first-color second light emitting element and a third-color second light emitting element.SELECTED DRAWING: Figure 5C

Description

  The present disclosure relates to a display device.

  Since an OLED (Organic Light-Emitting Diode) element is a current-driven self-luminous element, there is an advantage that a backlight is not required, low power consumption, a wide viewing angle, and a high contrast ratio can be obtained. It is expected in the development of flat panel displays.

  In an active matrix type OLED display device, a plurality of pixels are arranged in a display area. This pixel has one or more sub-pixels. When the pixel includes a plurality of sub-pixels, the plurality of sub-pixels emit light of different colors, for example. The sub-pixel includes a transistor for selecting the sub-pixel, and a pixel circuit including a driving transistor for supplying a current to an OLED element for controlling the display of the sub-pixel.

  In a single-color OLED display device, only a single-color pixel is arranged. In a full-color OLED display device, for example, red (R), green (G), and blue (B) sub-pixels of three primary colors are arranged in combination. I do. With the trend toward higher definition of small OLED panels mounted on smartphones, tablet computers, and the like, the pixel size has been reduced. On the other hand, the number of elements in the pixel circuit has increased due to the sophisticated functions of the pixel circuit, and the area occupied by these elements has increased.

  As disclosed in U.S. Patent Application Publication No. 2017/0352312, the wiring space can be reduced by sharing power supply lines between adjacent pixel circuits. However, focusing on the same color sub-pixel column, when an image is displayed with the same gradation of a single color, streak unevenness occurs in which brightly displayed sub-pixel columns and darkly displayed sub-pixel columns are alternately arranged. Cheap.

US Patent Application Publication No. 2017/0352312

  Therefore, a technique that can reduce the difference in characteristics between pixel circuits of sub-pixels of the same color while improving the degree of integration is desired.

  A display device according to an embodiment of the present disclosure includes a plurality of power supply lines extending along a first axis and arranged along a second axis, and a first power supply line along the second axis of each of the plurality of power supply lines. A plurality of first drive transistors, which are provided with a power supply potential from each of the plurality of power supply lines, and are disposed on a second side along the second axis of each of the plurality of power supply lines, A plurality of second driving transistors, a plurality of first color light emitting elements, a plurality of second color light emitting elements, and a plurality of third color light emitting elements to which a power supply potential is applied from each of the plurality of power supply lines. ,including. The plurality of power lines include a plurality of power line units arranged along the second axis. Each of the plurality of power supply line units includes a first power supply line, a second power supply line adjacent to the first power supply line, and a third power supply line adjacent to the second power supply line. The first driving transistor of the first power line drives a first light emitting element of the first color. The second drive transistor of the first power supply line drives a first light emitting element of the second color. The first drive transistor of the second power supply line drives the first light emitting element of the third color. The second drive transistor of the second power supply line drives a second light emitting element of the second color. The first drive transistor of the third power supply line drives the second light emitting element of the first color. The second drive transistor of the third power supply line drives the second light emitting element of the third color.

  According to an embodiment of the present disclosure, it is possible to reduce a difference in characteristics between pixel circuits of subpixels of the same color while improving the degree of integration.

1 schematically illustrates a configuration example of an OLED display device. 2 shows a configuration example of a pixel circuit. 7 shows another example of the configuration of the pixel circuit. 2 shows an example of a pixel circuit configuration. A part of a sectional structure of a pixel circuit of a sub-pixel is schematically shown. It is a top view showing the layout of the OLED element of a comparative example. FIG. 9 is a plan view illustrating a layout of a pixel circuit of a comparative example. FIG. 4B is a plan view in which the OLED element of FIG. 4A and the pixel circuit of FIG. 4B are superimposed. FIG. 3 is a plan view illustrating a layout example of the OLED element of the present disclosure. FIG. 2 is a plan view illustrating a layout example of a pixel circuit according to the present disclosure. FIG. 5B is a plan view in which the OLED element of FIG. 5A and the pixel circuit of FIG. 5B are superimposed. It is a top view showing the layout of the OLED element of this example. FIG. 3 is a plan view showing a layout of the OLED elements of the present example and a pixel circuit for driving and controlling them. FIG. 3 is a diagram illustrating positions of a plurality of contact holes on an X axis and a Y axis. FIG. 7 shows a layout of an OLED element in the configuration described with reference to FIGS. 6A and 6B. 5 shows another layout of the OLED element. 4 shows an example of connection between a driver IC and a data line. Another example of the connection between the driver IC and the data line is shown.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. It should be noted that this embodiment is merely an example for realizing the present invention, and does not limit the technical scope of the present invention.

[Overall Configuration] An OLED (Organic Light-Emitting Diode) display device will be described below as an example of a display device. The features of the present disclosure can be applied to a display device different from the OLED display device, for example, a micro LED display device or an inorganic EL (Electro-Luminescence) display device.

  FIG. 1 schematically illustrates a configuration example of the OLED display device 10. The OLED display device 10 includes a TFT (Thin Film Transistor) substrate 100 on which an OLED element is formed, a sealing substrate 200 for sealing an organic light emitting element, and a bonding portion for bonding the TFT substrate 100 and the sealing substrate 200 ( (Glass frit seal portion) 300. For example, dry air is sealed between the TFT substrate 100 and the sealing substrate 200, and is sealed by the joint 300.

  A scanning driver 131, an emission driver 132, a protection circuit 133, a driver IC 134 (driver circuit), and a demultiplexer 136 are arranged around the cathode electrode formation region 114 outside the display region 125 of the TFT substrate 100. The protection circuit 133 protects the element from electrostatic discharge. The driver IC 134 is connected to an external device via an FPC (Flexible Printed Circuit) 135.

  The scan driver 131 drives a scan line of the TFT substrate 100. The emission driver 132 controls an emission period of each pixel by driving an emission control line. The driver IC 134 is mounted using, for example, an anisotropic conductive film (ACF).

  The driver IC 134 supplies power and a timing signal (control signal) to the scanning driver 131 and the emission driver 132. Further, the driver IC 134 supplies power and data signals to the demultiplexer 136.

  The demultiplexer 136 sequentially outputs the output of one pin of the driver IC 134 to d (d is an integer of 2 or more) data lines. The demultiplexer 136 drives the data lines d times the number of output pins of the driver IC 134 by switching the output data line of the data signal from the driver IC 134 d times within the scanning period. The data line transmits a control signal (data voltage) for controlling the driving transistor T1.

[Circuit configuration]
A plurality of pixel circuits for controlling light emission of each of the plurality of sub-pixels are formed on the substrate 100. FIG. 2A illustrates a configuration example of a pixel circuit. Each pixel circuit includes a driving transistor T1, a selection transistor T2, an emission transistor T3, and a storage capacitor C1. The pixel circuit controls light emission of the OLED element E1. The transistor is a TFT.

  The selection transistor T2 is a switch for selecting a sub-pixel. The selection transistor T2 is a p-channel TFT, and has a gate terminal connected to the scanning line 106. The source terminal is connected to the data line 105. The drain terminal is connected to the gate terminal of the driving transistor T1.

  The drive transistor T1 is a transistor for driving the OLED element E1. The driving transistor T1 is a p-channel TFT, and its gate terminal is connected to the drain terminal of the selection transistor T2. The source terminal of the driving transistor T1 is connected to the power supply line 108 (Vdd). The drain terminal is connected to the source terminal of the emission transistor T3. The storage capacitor C1 is formed between the gate terminal and the source terminal of the driving transistor T1.

  The emission transistor T3 is a switch that controls supply and stop of the drive current to the OLED element E1. The emission transistor T3 is a p-channel TFT, and has a gate terminal connected to the emission control line 107. The source terminal of the emission transistor T3 is connected to the drain terminal of the drive transistor T1. The drain terminal of the emission transistor T3 is connected to the OLED element E1.

  Next, the operation of the pixel circuit will be described. The scanning driver 131 outputs a selection pulse to the scanning line 106 to turn on the selection transistor T2. The data voltage (control signal) supplied from the driver IC 134 via the data line 105 is stored in the storage capacitor C1. The storage capacitor C1 stores the stored voltage throughout one frame period. The conductance of the driving transistor T1 changes in an analog manner by the holding voltage, and the driving transistor T1 supplies a forward bias current corresponding to the light emission gradation to the OLED element E1.

  The emission transistor T3 is located on a drive current supply path. The emission driver 132 outputs a control signal to the emission control line 107 to control on / off of the emission transistor T3. When the emission transistor T3 is on, a drive current is supplied to the OLED element E1. When the emission transistor T3 is off, this supply is stopped. By controlling on / off of the emission transistor T3, a lighting period (duty ratio) within one field cycle can be controlled.

  FIG. 2B shows another configuration example of the pixel circuit. The pixel circuit has a reset transistor T4 instead of the emission transistor T3 of FIG. 2A. The reset transistor T4 controls the electrical connection between the reference voltage supply line 110 and the anode of the OLED element E1. This control is performed by supplying a reset control signal from the reset control line 109 to the gate of the reset transistor T4.

  The reset transistor T4 can be used for various purposes. For example, the reset transistor T4 may be used for the purpose of once resetting the anode electrode of the OLED element E1 to a sufficiently low voltage equal to or lower than the black signal level in order to suppress crosstalk due to a leak current between the OLED elements E1. .

  Alternatively, the reset transistor T4 may be used for measuring the characteristics of the driving transistor T1. For example, if the bias condition is selected so that the driving transistor T1 operates in the saturation region and the reset transistor T4 operates in the linear region, and the current flowing from the power supply line 108 (Vdd) to the reference voltage supply line 110 (Vref) is measured, The voltage-current conversion characteristics of the transistor T1 can be accurately measured. If a data signal for compensating for the difference in the voltage-current conversion characteristics of the drive transistor T1 between the sub-pixels is generated by an external circuit, a highly uniform display image can be realized.

  On the other hand, when the drive transistor T1 is turned off, the reset transistor T4 is operated in the linear region, and a voltage for causing the OLED element E1 to emit light is applied from the reference voltage supply line 110, the voltage / current characteristics of the OLED element E1 can be accurately measured. can do. For example, even when the OLED element E1 is deteriorated due to long-term use, the life can be extended by generating a data signal for compensating the deterioration amount by an external circuit.

  The pixel circuits of FIGS. 2A and 2B are examples, and the pixel circuits may have other circuit configurations. Although the pixel circuits of FIGS. 2A and 2B use p-channel TFTs, the pixel circuits may use n-channel TFTs. The pixel circuit described above is provided, for example, in order to compensate for variations in the threshold value of the driving transistor and suppress image quality degradation. With the technical means for suppressing the difference in characteristics of transistors described in this specification, display unevenness which is not sufficiently suppressed by a pixel circuit can be suppressed.

[Pixel structure]
Hereinafter, an example of the layout of the pixel circuit will be described. For ease of explanation, an example of the pixel circuit configuration shown in FIG. 2C will be described. The pixel circuit of FIG. 2C has a configuration in which the emission transistor and the emission control line are omitted from the pixel circuit of FIG. 2A. The following description can be applied to other pixel circuit configurations as shown in FIG. 2A or 2B.

  In the pixel circuits of FIGS. 2A to 2C, a configuration in which the power supply line is directly connected to the driving transistor is illustrated. However, for example, a light emission control transistor may be provided between the power supply line and the drive transistor. The light emission control transistor is turned on during a period in which the OLED element emits light. The light emission control transistor is turned off during a period in which the OLED element does not emit light, thereby preventing unintended light emission. That is, the power supply line only needs to be electrically connectable to the driving transistor. Further, the storage capacitor need only be electrically connectable without being directly connected to the gate of the drive transistor.

  FIG. 3 schematically illustrates a part of a cross-sectional structure of a pixel circuit of a sub-pixel. The sub-pixel displays any color of red, green, or blue. One main pixel is constituted by the red, green, and blue sub-pixels. A set of colors different from red, green and blue may be displayed. The sub-pixel is a light emitting area of the OLED element. FIG. 3 schematically illustrates the structure of the driving transistor T1, the storage capacitor C1, and the OLED element E1 in the pixel circuit illustrated in FIG. 2C.

  In the following description, the upper and lower sides indicate the upper and lower sides in the drawing. The OLED display device 10 includes an insulating substrate 151 and a sealing structure facing the insulating substrate 151. The insulating substrate 151 and the components formed thereon constitute the TFT substrate 100. One example of the sealing structure is a flexible or inflexible sealing substrate 200. The sealing structure may be, for example, a thin film encapsulation (TFE) structure.

  The OLED display device 10 includes a lower electrode (for example, an anode electrode 162), an upper electrode (for example, a cathode electrode 166), and an organic light emitting film 165 disposed between the insulating substrate 151 and the sealing structure. Including.

  An organic light emitting film 165 is arranged between the cathode electrode 166 and the anode electrode 162. One organic light emitting film 165 is arranged on one anode electrode 162. In the example of FIG. 3, the cathode electrode 166 of one sub-pixel is a part of a continuous conductive film. The pixel circuit controls a current supplied to the anode electrode 162.

  FIG. 3 schematically shows an example of a top emission type pixel structure. In the top emission type pixel structure, a cathode electrode 166 common to a plurality of pixels is arranged on a light emission side (upper side in the drawing). The cathode electrode 166 has a shape that completely covers the entire display region 125. In the top emission type pixel structure, the anode electrode 162 reflects light, and the cathode electrode 166 has light transmittance. Thus, the light from the organic light emitting film 165 is emitted toward the sealing structure.

  Since the top emission type does not need to provide a transmission region for light extraction in the pixel region as compared with the bottom emission type in which light is extracted to the insulating substrate 151 side, a light emitting portion is also formed on a pixel circuit or wiring. And a high degree of freedom in the layout of the pixel circuit.

  The bottom emission pixel structure has a transparent anode electrode and a reflective cathode electrode, and emits light to the outside via the insulating substrate 151. The layout of the pixel circuit according to the present disclosure can also be applied to a bottom emission type pixel structure.

  The sub-pixels generally display any of the colors red, green, or blue in a full color OLED display. One main pixel is constituted by the red, green, and blue sub-pixels. A pixel circuit including a plurality of thin film transistors controls light emission of a corresponding OLED element. An OLED element includes an anode electrode serving as a lower electrode, an organic light emitting film, and a cathode electrode serving as an upper electrode.

  The insulating substrate 151 is formed of, for example, glass or resin, and is an inflexible or flexible substrate. A silicon layer exists on the insulating substrate 151 with the first insulating film 152 interposed therebetween. The first insulating film 152 is made of, for example, silicon nitride.

  The silicon layer is made of, for example, amorphous silicon or polysilicon. In the silicon layer, a channel 155 that provides the transistor characteristics of the TFT exists at a position where a gate electrode 157 is to be formed later. The silicon layer further has an electrode 171 of the storage capacitor C1. The electrode 171 is doped with a high concentration impurity.

  At both ends of the channel 155, there are a drain region 168 and a source region 169 doped with high-concentration impurities for electrical connection with an upper wiring layer. An LDD (Lightly Doped Drain) doped with a low concentration of impurity may be formed between the channel 155, the drain region 168, and the source region 169. The illustration of the LDD is omitted for the sake of simplicity.

  A gate insulating film 156 is formed on the silicon layer. On the channel portion 155, a gate electrode 157 is formed via a gate insulating film 156. An electrode 172 is formed over the electrode 171 with a gate insulating film 156 therebetween. The gate electrode 157 and the electrode 172 are formed in the same layer. For example, in one pixel circuit, the gate electrode 157 and the electrode 172 are continuous.

  The metal layer including the gate electrode 157 and the electrode 172 further includes, for example, the scanning line 106 and the emission control line. As the metal layer, for example, a single layer is formed of one substance selected from the group consisting of Mo, W, Nb, MoW, MoNb, Al, Nd, Ti, Cu, Cu alloy, Al alloy, Ag, and Ag alloy. Alternatively, a two-layer structure or a multi-layer structure of one or a plurality of materials selected from Mo, Cu, Al, or Ag, which is a low-resistance substance, to reduce wiring resistance may be formed.

  A source electrode 159, a drain electrode 160, and a connection portion 173 are formed on the interlayer insulating film 158. The source electrode 159, the drain electrode 160, and the connection portion 173 are formed of, for example, a high melting point metal or an alloy thereof. The source electrode 159 and the drain electrode 160 are connected to the source / drain regions 168 and 169 of the silicon layer via contact holes 170 and 175 formed in the interlayer insulating film 158 and the gate insulating film 156.

  The connection part 173 connects the electrode 171 and the power supply line 108. The connection portion 173 is connected to the electrode 171 via the contact hole 176 of the interlayer insulating film 158. In the metal layer including the source electrode 159, the drain electrode 160, and the connection portion 173, for example, a data line 105, a power supply line 108, and the like are further formed. The metal layer is formed by depositing a conductive film such as Ti / Al / Ti and performing patterning.

  An insulating planarization film 161 is formed on the source electrode 159, the drain electrode 160, and the connection portion 173. An anode electrode 162 is formed on the insulating flattening film 161. The anode electrode 162 is connected to the drain electrode 160 via the contact hole 181 of the flattening film 161. The TFT of the pixel circuit is formed below the anode electrode 162.

The anode electrode 162 includes, for example, a transparent film such as ITO, IZO, ZnO, and In ₂ O ₃ , a metal such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, and Cr, or a metal thereof. It includes three layers of a reflective film of an alloy and the above-mentioned transparent film.

  On the anode electrode 162, an insulating pixel defining layer (PDL) 163 for separating the OLED elements is formed. The OLED element is formed in the opening 167 of the pixel definition layer 163. An organic light emitting film 165 is formed on the anode electrode 162. The organic light emitting film 165 is attached to the pixel definition layer 163 in the opening 167 of the pixel definition layer 163 and in the periphery thereof. The organic light emitting film 165 includes, for example, a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer from the lower layer side. The laminated structure of the organic light emitting film 165 is determined by design.

  A cathode electrode 166 is formed on the organic light emitting film 165. The cathode electrode 166 is a light-transmissive electrode. The cathode electrode 166 transmits a part of the visible light from the organic light emitting film 165. A stacked film of the anode electrode 162, the organic light emitting film 165, and the cathode electrode 166 constitutes an OLED element. Note that a cap layer (not shown) may be formed on the cathode electrode 166.

The cathode electrode 166 is formed of, for example, a metal such as Al or Mg or an alloy containing these metals. When the resistance of the cathode electrode 166 is high and the uniformity of emission luminance is impaired, an auxiliary electrode layer may be further added with a material for forming a transparent electrode such as ITO, IZO, ZnO or In ₂ O ₃ .

[Pixel circuit layout]
Hereinafter, some examples of the layout of the OLED elements and the pixel circuits that drive the OLED elements will be described. First, a comparative example will be described with reference to FIGS. 4A, 4B, and 4C. FIG. 4A is a plan view illustrating a layout of an OLED element of a comparative example. FIG. 4B is a plan view illustrating a layout of the pixel circuit of the comparative example. FIG. 4C is a plan view in which the OLED element of FIG. 4A and the pixel circuit of FIG. 4B are overlapped.

  FIG. 4A shows six OLED elements arranged along the X axis (second axis). The X-axis extends in the left-right direction in FIG. 4A. FIG. 4A shows an anode electrode and a light emitting region of the OLED element. OLED elements are periodically arranged in order of red, green, and blue from left to right in FIG. 4A. Specifically, OLED elements E1R1, OLED elements E1G1, OLED elements E1B1, OLED elements E1R2, OLED elements E1G2, and OLED elements E1B2 are arranged from left to right.

  Symbols R, G, and B indicate red, green, and blue, respectively. One main pixel is constituted by (the light emitting region of) the adjacent red, green and blue OLED elements. In other rows, the OLED elements are similarly arranged. That is, OLED elements (sub-pixels) of the same color are arranged along the Y axis (first axis) perpendicular to the X axis. Such a pixel arrangement is also called a matrix arrangement. The row direction is a direction along the X axis, and the column direction is a direction along the Y axis.

  The OLED element E1R1 includes an anode electrode 162R1 and a light emitting region 185R1. The OLED element E1G1 includes an anode electrode 162G1 and a light emitting region 185G1. The OLED element E1B1 includes an anode electrode 162B1 and a light emitting region 185B1. The OLED element E1R2 includes an anode electrode 162R2 and a light emitting region 185R2. The OLED element E1G2 includes an anode electrode 162G2 and a light emitting region 185G2. The OLED element E1B2 includes an anode electrode 162B2 and a light emitting region 185B2.

  In the example of FIG. 4A, the shapes of the anode electrode and the light emitting region are the same and are rectangular. The shapes of the anode electrode and the light emitting region depend on the design. In each OLED element, the light emitting region is included in the region of the anode electrode in plan view.

  As described with reference to FIG. 3, the anode electrode is connected to the drive transistor via the contact hole. In FIG. 4A, the anode electrodes 162R1, 162G1, 162B1, 162R2, 162G2 and 162B2 are connected to the drive transistors via contact holes 181R1, 181G1, 181B1, 181R2, 181G2 and 181B2, respectively.

  FIG. 4B shows six pixel circuits arranged along the X-axis. The pixel circuits are for driving and controlling the OLED elements E1R1, E1G1, E1B1, E1R2, E1G2, and E1B2 shown in FIG. 4A, respectively. FIG. 4B shows only a part of the configuration of the pixel circuit.

  From left to right in FIG. 4B (along the X axis), the data line 105R1, the power line 108A, the data line 105G1, the data line 105B1, the power line 108B, the data line 105R2, the data line 105G2, the power line 108C, and the data Lines 105B2 are arranged. The data line and the power supply line extend in the vertical direction in FIG. 4B (along the Y axis).

  In FIG. 4B, the pixel circuit of the OLED element E1R1 is arranged between the data line 105R1 extending along the Y axis and the power supply line 108A. The pixel circuit includes a driving transistor T1R1, a selection transistor T2R1, and a storage capacitor C1R1. The channel of the driving transistor T1R1 is indicated by a broken line below the gate electrode.

  The drive transistor T1R1 and the storage capacitor C1R1 are connected to the power line 108A via the contact hole 175A. The channel of the driving transistor T1R1 is connected to the drain electrode 160R1 via the contact hole 170R1. Drain electrode 160R1 is connected to anode electrode 162R1 (not shown in FIG. 4B) via contact hole 181R1. The driving transistor T1R1 is controlled by a signal from the data line 105R1, and controls a current from the power supply line 108A to the OLED element E1R1.

  The pixel circuit of the OLED element E1G1 is disposed between the power supply line 108A extending along the Y axis and the data line 105G1. The pixel circuit includes a driving transistor T1G1, a selection transistor T2G1, and a storage capacitor C1G1.

  The drive transistor T1G1 and the storage capacitor C1G1 are connected to the power supply line 108A via the contact hole 175A. The channel of the driving transistor T1G1 is connected to the drain electrode 160G1 via the contact hole 170G1. Drain electrode 160G1 is connected to anode electrode 162G1 (not shown in FIG. 4B) via contact hole 181G1. The driving transistor T1G1 is controlled by a signal from the data line 105G1, and controls a current from the power supply line 108A to the OLED element E1G1.

  The pixel circuit of the OLED element E1B1 is arranged between the data line 105B1 extending along the Y axis and the power supply line 108B. The pixel circuit includes a driving transistor T1B1, a selection transistor T2B1, and a storage capacitor C1B1.

  The driving transistor T1B1 and the storage capacitor C1B1 are connected to the power line 108B via the contact hole 175B. The channel of the driving transistor T1B1 is connected to the drain electrode 160B1 via the contact hole 170B1. Drain electrode 160B1 is connected to anode electrode 162B1 (not shown in FIG. 4B) via contact hole 181B1. The driving transistor T1B1 is controlled by a signal from the data line 105B1, and controls a current from the power supply line 108B to the OLED element E1B1.

  The pixel circuit of the OLED element E1R2 is arranged between the power supply line 108B extending along the Y axis and the data line 105R2. The pixel circuit includes a driving transistor T1R2, a selection transistor T2R2, and a storage capacitor C1R2.

  The drive transistor T1R2 and the storage capacitor C1R2 are connected to the power supply line 108B via the contact hole 175B. The channel of the driving transistor T1R2 is connected to the drain electrode 160R2 via the contact hole 170R2. Drain electrode 160R2 is connected to anode electrode 162R2 (not shown in FIG. 4B) via contact hole 181R2. The drive transistor T1R2 is controlled by a signal from the data line 105R2, and controls a current from the power supply line 108B to the OLED element E1R2.

  The pixel circuit of the OLED element E1G2 is arranged between the data line 105G2 extending along the Y axis and the power supply line 108C. The pixel circuit includes a driving transistor T1G2, a selection transistor T2G2, and a storage capacitor C1G2.

  The drive transistor T1G2 and the storage capacitor C1G2 are connected to a power supply line 108C via a contact hole 175C. The channel of the driving transistor T1G2 is connected to the drain electrode 160G2 via the contact hole 170G2. Drain electrode 160G2 is connected to anode electrode 162G2 (not shown in FIG. 4B) via contact hole 181G2. The driving transistor T1G2 is controlled by a signal from the data line 105G2, and controls a current from the power supply line 108C to the OLED element E1G2.

  The pixel circuit of the OLED element E1B2 is disposed between the power supply line 108C extending along the Y axis and the data line 105B2. The pixel circuit includes a driving transistor T1B2, a selection transistor T2B2, and a storage capacitor C1B2.

  The drive transistor T1B2 and the storage capacitor C1B2 are connected to a power supply line 108C via a contact hole 175C. The channel of the driving transistor T1B2 is connected to the drain electrode 160B2 via the contact hole 170B2. Drain electrode 160B2 is connected to anode electrode 162B2 (not shown in FIG. 4B) via contact hole 181B2. The driving transistor T1B2 is controlled by a signal from the data line 105B2, and controls a current from the power supply line 108C to the OLED element E1B2.

  FIG. 4C shows six OLED elements arranged along the X-axis and a pixel circuit for driving and controlling them. The anode electrodes 162R1, 162G1, 162B1, 162R2, 162G2, 162B2 are connected to the driving transistors T1R1, T1G1, T1B1, T1B2, T1G2, T1B1, T1B1, T1G1, 181B2 via contact holes 181R1, 181G1, 181B1, 181R2, 181G2, 181B2, respectively. ing.

  In the layout example of FIG. 4C, the pixel circuits on the left and right of the power supply line share the power supply line, and have a line-symmetric pattern with respect to the power supply line. Since two pixel circuits share one power supply line, the wiring space can be reduced and the degree of circuit integration can be increased. Since the two pixel circuits share the power supply line, the driving transistor and the power supply line have the following positional relationship.

  The driving transistor T1R1 is arranged on the left side of the connected power supply line 108A. On the other hand, the driving transistor T1R2 is arranged on the right side of the connected power supply line 108B. The driving transistor T1G1 is arranged on the right side of the connected power line 108A. On the other hand, the driving transistor T1G2 is arranged on the left side of the connected power supply line 108B. The drive transistor T1B1 is arranged on the left side of the connected power supply line 108B. On the other hand, the driving transistor T1B2 is arranged on the right side of the connected power supply line 108C.

  In the manufacture of the TFT substrate 100, misalignment of the photomask may occur. When an alignment shift occurs along the X axis, that is, in the rightward or leftward direction in FIG. 4C, the gate electrode of the drive transistor approaches or moves away from the power supply line to which the drive transistor is connected. As a result, the parasitic capacitance between the gate electrode of the driving transistor and the power supply line changes. The parasitic capacitance increases when the gate electrode of the driving transistor approaches the power supply line, and decreases when the gate electrode moves away from the power supply line.

  The pixel circuits in the odd-numbered columns and the pixel circuits in the even-numbered columns are shifted in opposite directions with respect to the power supply line due to misalignment. For example, assume that the alignment of the gate electrode of the driving transistor is shifted to the left in FIG. 4C. The parasitic capacitance of the driving transistors T1R1, T1B1, and T1G2 on the left side of each of the power lines 108A, 108B, and 108C decreases. On the other hand, the parasitic capacitance of the driving transistors T1G1, T1R2, and T1B2 on the right side of each of the power supply lines 108A, 108B, and 108C increases.

  Different parasitic capacitances of the drive transistors give different drive currents for the same gate signal. In the example of FIG. 4C, the red drive transistors T1R1 and T1R2 are offset in the opposite direction for misalignment. The green driving transistors T1G1 and T1G2 and the blue driving transistors T1B1 and T1B2 are also shifted in the opposite direction to the misalignment.

  Therefore, for the same data signal, one of the adjacent sub-pixels of the same color increases the luminance and the other decreases the luminance. Therefore, for example, when the entire display area 125 is displayed in a single color and has the same gradation, stripe unevenness in which bright subpixel columns and dark subpixel columns are alternately arranged can be visually recognized.

  Hereinafter, the layout of the pixel circuit and the OLED element of the present disclosure will be described. According to the layout of the present disclosure, it is possible to suppress a decrease in display quality due to misalignment. With reference to FIGS. 5A, 5B, and 5C, a layout example of the present disclosure will be described. FIG. 5A is a plan view illustrating a layout example of the OLED element of the present disclosure. FIG. 5B is a plan view illustrating a layout example of the pixel circuit of the present disclosure. FIG. 5C is a plan view in which the OLED element of FIG. 5A and the pixel circuit of FIG. 5B are overlapped.

  FIG. 5A shows six OLED elements arranged in a line along the X-axis. FIG. 5A shows an anode electrode and a light emitting region of the OLED element. OLED elements are periodically arranged in order of red, green, and blue from left to right in FIG. 5A. Specifically, OLED elements E1R1, OLED elements E1G1, OLED elements E1B1, OLED elements E1R2, OLED elements E1G2, and OLED elements E1B2 are arranged from left to right. Red, green, and blue OLED elements are cyclically arranged. The order of red, green and blue may be different.

  One main pixel is constituted by (the light emitting region of) the adjacent red, green and blue OLED elements. In other rows, the OLED elements are similarly arranged. That is, OLED elements (sub-pixels) of the same color are arranged along the Y axis.

  The OLED element E1R1 includes an anode electrode 162R1 and a light emitting region 185R1. The OLED element E1G1 includes an anode electrode 162G1 and a light emitting region 185G1. The OLED element E1B1 includes an anode electrode 162B1 and a light emitting area 185B1. The OLED element E1R2 includes an anode electrode 162R2 and a light emitting region 185R2. The OLED element E1G2 includes an anode electrode 162G2 and a light emitting region 185G2. The OLED element E1B2 includes an anode electrode 162B2 and a light emitting region 185B2.

  In each OLED element, the light emitting region is included in the region of the anode electrode in plan view. In FIG. 5A, the red and green light emitting regions have the same rectangle, and the blue light emitting region has a rectangle that is slightly larger than the red and green light emitting regions. The light emitting regions of all colors may have the same shape, or the light emitting regions of all colors may have different shapes. In FIG. 5A, the light emitting region has a rectangular shape, but the shape depends on the design.

  The anode electrodes 162R1, 162G1, 162B1, 162R2, 162G2 and 162B2 are connected to the drive transistors via contact holes 181R1, 181G1, 181B1, 181R2, 181G2 and 181B2, respectively.

  In the example of FIG. 5A, the anode electrodes 162R1 and 162G1 have the same rectangle. The anode electrodes 162B1 and 162B2 have the same rectangle and are slightly larger than the anode electrodes 162R1 and 162G1. The anode electrode 162R2 has a different shape from the anode electrode 162R1.

  Specifically, the anode electrode 162R2 has an arm 621R2 (first arm) extending to one side (the right side in FIG. 5A) along the X axis at a first end (the lower end in FIG. 5A) along the Y axis. Have. The contact hole 181R2 of the anode electrode 162R2 is located at a position overlapping the tip of the arm 621R2 in plan view.

  The anode electrode 162G2 has, at a second end (upper end in FIG. 5A) along the Y-axis, an arm 621G2 (second arm) extending to the other side (left side in FIG. 5A) along the X-axis. The contact hole 181G2 of the anode electrode 162G2 is located at a position overlapping the tip of the arm portion 621G2 in plan view.

  The anode electrodes 162R2 and 162G2 are adjacent and have arm portions 621R2 and 621G2 at different ends along the Y axis, respectively. The arm portions 621R2 and 621G2 extend in opposite directions along the X axis. As described later, the anode electrode 162R2 is connected to a pixel circuit overlapping the anode electrode 162G2 in plan view, and the anode electrode 162G2 is connected to a pixel circuit overlapping the anode electrode 162R2 in plan view.

  FIG. 5B shows six pixel circuits arranged along the X-axis. The pixel circuits are for driving and controlling the OLED elements E1R1, E1G1, E1B1, E1G2, E1R2, and E1B2 shown in FIG. 5A, respectively. FIG. 5B shows only a part of the configuration of the pixel circuit.

  From left to right in FIG. 5B, the data line 105R1, the power line 108A, the data line 105G1, the data line 105B1, the power line 108B, the data line 105G2, the data line 105R2, the power line 108C, and the data line 105B2 are arranged. . The data line and the power line extend along the Y axis. The power lines 108A, 108B, 108C constitute a power line unit.

  In FIG. 5B, the pixel circuit of the OLED element E1R1 is arranged between the data line 105R1 extending along the Y axis and the power supply line 108A. The pixel circuit includes a driving transistor T1R1, a selection transistor T2R1, and a storage capacitor C1R1. The selection transistor T2R1, the storage capacitor C1R1, and the drive transistor T1R1 are arranged in this order from top to bottom in FIG. 5B (along the Y axis).

  The channel of the driving transistor T1R1 is indicated by a broken line below the gate electrode. The drive transistor T1R1 and the storage capacitor C1R1 are connected to the power line 108A via the contact hole 175A. The channel of the driving transistor T1R1 is connected to the drain electrode 160R1 via the contact hole 170R1. Drain electrode 160R1 is connected to anode electrode 162R1 (not shown in FIG. 5B) via contact hole 181R1. The driving transistor T1R1 is controlled by a signal from the data line 105R1, and controls a current from the power supply line 108A to the OLED element E1R1.

  The pixel circuit of the OLED element E1G1 is disposed between the power supply line 108A extending along the Y axis and the data line 105G1. The pixel circuit includes a driving transistor T1G1, a selection transistor T2G1, and a storage capacitor C1G1. The selection transistor T2G1, the storage capacitor C1G1, and the drive transistor T1G1 are arranged in this order from top to bottom in FIG. 5B (along the Y axis).

  The drive transistor T1G1 and the storage capacitor C1G1 are connected to the power supply line 108A via the contact hole 175A. The channel of the driving transistor T1G1 is connected to the drain electrode 160G1 via the contact hole 170G1. Drain electrode 160G1 is connected to anode electrode 162G1 (not shown in FIG. 5B) via contact hole 181G1. The driving transistor T1G1 is controlled by a signal from the data line 105G1, and controls a current from the power supply line 108A to the OLED element E1G1.

  The pixel circuit of the OLED element E1B1 is arranged between the data line 105B1 extending along the Y axis and the power supply line 108B. The pixel circuit includes a driving transistor T1B1, a selection transistor T2B1, and a storage capacitor C1B1. The selection transistor T2B1, the storage capacitor C1B1, and the drive transistor T1B1 are arranged in this order from top to bottom in FIG. 5B (along the Y axis).

  The driving transistor T1B1 and the storage capacitor C1B1 are connected to the power line 108B via the contact hole 175B. The channel of the driving transistor T1B1 is connected to the drain electrode 160B1 via the contact hole 170B1. Drain electrode 160B1 is connected to anode electrode 162B1 (not shown in FIG. 5B) via contact hole 181B1. The driving transistor T1B1 is controlled by a signal from the data line 105B1, and controls a current from the power supply line 108B to the OLED element E1B1.

  The pixel circuit of the OLED element E1G2 is arranged between the power supply line 108B extending along the Y axis and the data line 105G2. The pixel circuit includes a driving transistor T1G2, a selection transistor T2G2, and a storage capacitor C1G2. The selection transistor T2G2, the storage capacitor C1G2, and the drive transistor T1G2 are arranged in this order from top to bottom in FIG. 5B (along the Y axis).

  The drive transistor T1G2 and the storage capacitor C1G2 are connected to the power supply line 108B via the contact hole 175B. The channel of the driving transistor T1G2 is connected to the drain electrode 160G2 via the contact hole 170G2. The anode wiring 601G2 extends from the drain electrode 160G2 in a direction from top to bottom in FIG. 5B (along the Y axis).

  The wiring 601G2 is continuous with the drain electrode 160G2 and exists in the same metal layer. The wiring 601G2 is connected to an anode electrode 162G2 (not shown in FIG. 5B) via a contact hole 181G2 at an end opposite to the drain electrode 160G2.

  The contact hole 181G2 is between the select transistor T2G2 and the power supply line 108B. The storage capacitor C1G2 is between the contact hole 181G2 and the driving transistor T1G2. The anode electrode 162G2 and the driving transistor T1G2 are controlled by a signal from the data line 105G2, and control a current from the power supply line 108B to the OLED element E1G2.

  The pixel circuit of the OLED element E1R2 is arranged between the data line 105R2 extending along the Y axis and the power supply line 108C. The pixel circuit includes a driving transistor T1R2, a selection transistor T2R2, and a storage capacitor C1R2. The selection transistor T2R2, the storage capacitor C1R2, and the drive transistor T1R2 are arranged in this order from top to bottom in FIG. 5B (along the Y axis).

  The drive transistor T1R2 and the storage capacitor C1R2 are connected to a power supply line 108C via a contact hole 175C. The channel of the driving transistor T1R2 is connected to the drain electrode 160R2 via the contact hole 170R2. Drain electrode 160R2 is connected to anode electrode 162R2 (not shown in FIG. 5B) via contact hole 181R2. The driving transistor T1R2 is controlled by a signal from the data line 105R2, and controls a current from the power supply line 108C to the OLED element E1R2.

  The pixel circuit of the OLED element E1B2 is arranged between the power supply line 108C extending along the Y axis and the data line 105B2. The pixel circuit includes a driving transistor T1B2, a selection transistor T2B2, and a storage capacitor C1B2. The selection transistor T2B2, the storage capacitor C1B2, and the drive transistor T1B2 are arranged in this order from top to bottom in FIG. 5B (along the Y axis).

  The drive transistor T1B2 and the storage capacitor C1B2 are connected to a power supply line 108C via a contact hole 175C. The channel of the driving transistor T1B2 is connected to the drain electrode 160B2 via the contact hole 170B2. Drain electrode 160B2 is connected to anode electrode 162B2 (not shown in FIG. 4B) via contact hole 181B2. The driving transistor T1B2 is controlled by a signal from the data line 105B2, and controls a current from the power supply line 108C to the OLED element E1B2.

  FIG. 5C shows six OLED elements arranged along the X-axis and a pixel circuit for driving and controlling them. The arm portion 621R2 of the anode electrode 162R2 extends toward the power supply line 108C. The arm portion 621G2 of the anode electrode 162G2 extends toward the power supply line 108B.

  The anode electrodes 162R1, 162G1, 162B1, 162R2, 162G2, 162B2 are connected to the driving transistors T1R1, T1G1, T1B1, T1B2, T1G2, T1B1, T1B1, T1G1, 181B2 via contact holes 181R1, 181G1, 181B1, 181R2, 181G2, 181B2, respectively. ing.

  In the layout example of FIG. 5C, the pixel circuits on the left and right of the power supply line share the power supply line. The drive transistors on the left and right of the power supply line have a line-symmetric pattern with respect to the power supply line. Except for the anode wiring 601G2 and the contact hole 181G2 of the anode electrode 162G2 of the pixel circuit of the OLED element E1G2, each pair of the left and right pixel circuits of the power supply line has a line-symmetric pattern with respect to the power supply line.

  As shown in FIG. 5C, the order of the OLED elements E1R2 and E1G2 and the order of the pixel circuit of the OLED element E1R2 and the pixel circuit of the OLED element E1G2 are reversed along the X axis. The OLED element E1R2 overlaps the pixel circuit for the OLED element E1G2 in plan view, and the OLED element E1G2 overlaps the pixel circuit for the OLED element E1R2 in plan view.

  By the arm portions 621R2 and 621G2 and the anode wiring 601G2, the anode electrodes 162R2 and 162G2 and the driving transistors T1R2 and T1G2 can be appropriately connected while minimizing the influence on the layout of other elements.

  Since two pixel circuits share one power supply line, the wiring space can be reduced and the degree of circuit integration can be increased. In the layout of FIG. 5C, the driving transistor and the power supply line have the following positional relationship.

  The driving transistors T1R1 and T1R2 are disposed on the left side (one side along the X axis) of the connected power lines 108A and 108C, respectively. The drive transistors T1G1 and T1G2 are arranged on the right side (the other side along the X axis) of the connected power lines 108A and 108B, respectively. As described above, the driving transistors T1R1 and T1R2 of the red OLED element are arranged on the left side of the connected power supply line. The driving transistors T1G1 and T1G2 of the green OLED element are arranged on the left side of the connected power supply line.

  For this reason, even if the misalignment occurs along the X axis, that is, in the rightward or leftward direction in FIG. 5C, both of the gate electrodes of the red driving transistors T1R1 and T1R2 are connected to the power supply to which the driving transistor is connected. Deviate in the same direction with respect to the line, that is, approaching or moving away from the power line. Therefore, it is possible to avoid a change in the luminance of the red sub-pixel due to a change in the characteristics of the drive transistor due to the misalignment.

  Similarly, even if the misalignment occurs in the right or left direction in FIG. 5C, both the gate electrodes of the green driving transistors T1G1 and T1G2 are shifted in the same direction with respect to the power supply line to which the driving transistor is connected. That is, approaching or moving away from the power supply line. Therefore, it is possible to avoid a change in the luminance of the green sub-pixel due to a change in the characteristics of the drive transistor due to the misalignment.

  On the other hand, the blue driving transistor T1B1 is disposed on the left side of the connected power supply line 108B, and the blue driving transistor T1B2 is disposed on the right side of the connected power supply line 108C. Therefore, a change in the luminance of the blue sub-pixel due to a change in the characteristics of the drive transistor due to the misalignment may occur. However, relative luminous efficiency is largest in green and smallest in blue. Therefore, a person perceives a green luminance change and a red luminance change more sensitively than a blue luminance change. According to the layout of this example, it is possible to suppress a change in display quality by avoiding a change in luminance between the red sub-pixel and the green sub-pixel.

  As described above, it is preferable that the driving transistor pairs of the red and green sub-pixels having high relative luminous efficiency are respectively arranged on the same side with respect to the connected power supply line. However, the driving transistor pairs of the red and blue or green and blue sub-pixels may be arranged on the same side with respect to the connected power supply line. In each layout, it is possible to suppress a decrease in display quality due to misalignment as compared with the comparative example described with reference to FIGS. The set of subpixel colors may be different from the set consisting of red, green, and blue.

  Further, according to the layout of this example, since two pixel circuits share one power supply line, the width of the power supply line can be increased without increasing the layout area of the pixel circuit. Increasing the width reduces the electrical resistance, so that the occurrence of IR drop can be suppressed. As a result, image quality degradation due to IR drop can be suppressed. In particular, since the pixel circuits near the center of the screen are far from the power supply, if the occurrence of IR drop can be suppressed, the image quality deterioration due to the IR drop, which tends to occur near the center of the screen, can be suppressed. Further, the power supply line described in this embodiment may be a wiring for supplying a constant voltage and / or a constant current. For example, a reference voltage supply line may be used instead of a power supply line that supplies a current used for light emission of the OLED element.

  With reference to FIGS. 6A and 6B, another example of the layout of the pixel circuit and the OLED element of the present disclosure will be described. FIG. 6A is a plan view showing a layout of the OLED element of this example. FIG. 6B is a plan view showing a layout of the OLED elements of the present example and a pixel circuit for driving and controlling them.

  FIG. 6A shows six OLED elements. FIG. 6A shows an anode electrode and a light emitting region of the OLED element. The OLED element E1R1 and the OLED element E1G1 are adjacent along the Y axis. The OLED elements E1R1 and E1G1 are arranged from top to bottom in FIG. 6A. The OLED element E1B1 is adjacent to the OLED elements E1R1 and E1G1 along the X axis. In the example of FIG. 6A, the OLED element E1B1 is arranged on the right side of the OLED elements E1R1 and E1G1.

  The OLED element E1R2 and the OLED element E1G2 are adjacent to the OLED element E1B1 along the X axis. The OLED element E1R2 and the OLED element E1G2 are arranged on the right side of the OLED element E1B1. The OLED element E1R2 and the OLED element E1G2 are adjacent along the Y axis.

  The OLED elements E1R2 and E1G2 are arranged from top to bottom in FIG. 6A. The OLED element E1B2 is adjacent to the OLED elements E1R2 and E1G2 along the X axis. The OLED element E1B2 is disposed on the right side of the OLED elements E1R2 and E1G2.

  One main pixel is constituted by (the light emitting region of) the adjacent red, green and blue OLED elements. FIG. 6A shows OLED elements corresponding to two main pixels in a main pixel row. In other rows, the OLED elements are similarly arranged. That is, blue OLED elements (sub-pixels) are continuously arranged along the Y axis, and red and green OLED elements (sub-pixels) are alternately arranged.

  The OLED element E1R1 includes an anode electrode 162R1 and a light emitting region 185R1. The OLED element E1G1 includes an anode electrode 162G1 and a light emitting region 185G1. The OLED element E1B1 includes an anode electrode 162B1 and a light emitting area 185B1. The OLED element E1R2 includes an anode electrode 162R2 and a light emitting region 185R2. The OLED element E1G2 includes an anode electrode 162G2 and a light emitting region 185G2. The OLED element E1R2 includes an anode electrode 162B2 and a light emitting region 185B2.

  In each OLED element, the light emitting region is included in the region of the anode electrode in plan view. In FIG. 6A, the red and green light emitting regions have the same shape, and the blue light emitting region has a larger shape than the red and green light emitting regions. The shape of the light emitting region of each color depends on the design.

  The anode electrodes 162R1, 162G1, 162B1, 162R2, 162G2 and 162B2 are connected to the drive transistors via contact holes 181R1, 181G1, 181B1, 181R2, 181G2 and 181B2, respectively. In the example of FIG. 6A, the anode electrodes 162R1, 162R2, 161G1, and 161G2 have the same rectangle. The anode electrodes 161B1, 161B2 have the same rectangle and are larger than the anode electrodes 162R1, 162R2, 161G1, 161G2.

  In the example of FIG. 6A, the upper ends of the anode electrodes 162R1, 162R2, 162B1, and 162B2 are located at the same position on the Y axis. The lower ends of the anode electrodes 162B1 and 162B2 are located between the upper and lower ends of the anode electrodes 162G1 and 162G2 on the Y axis.

  FIG. 6B shows another example of the layout of the pixel circuit and the OLED element of the present disclosure. Hereinafter, the positional relationship between the OLED element, the driving transistor, and the power supply line will be mainly described. FIG. 6B shows a selection transistor, a storage capacitor, and a driving transistor in each pixel circuit. The configurations of the selection transistor and the storage capacitor are substantially the same as the configurations described with reference to FIGS. 5A to 5C, and a detailed description thereof will be omitted.

  FIG. 6B shows six pixel circuits arranged along the X-axis. The pixel circuit is for driving and controlling the OLED elements E1R1, E1G1, E1B1, E1G2, E1R2, and E1B2 shown in FIG. 6A from the left. FIG. 6B illustrates only a part of the configuration of the pixel circuit. A power supply line 108A extends along the Y axis between the pixel circuits of the OLED elements E1R1 and E1G1. A power supply line 108B extends along the Y axis between the pixel circuits of the OLED elements E1B1 and E1G2. A power supply line 108C extends along the Y axis between the pixel circuits of the OLED elements E1R2 and E1B2.

  The anode electrodes 162R1, 162G1, 162B1, 162R2, 162G2, 162B2 are connected to the driving transistors T1R1, T1G1, T1B1, T1B2, T1G2, T1B1, T1B1, T1G1, 181B2 via contact holes 181R1, 181G1, 181B1, 181R2, 181G2, 181B2, respectively. ing.

  Each anode electrode partially overlaps pixel circuits on both sides of one power supply line in plan view. Specifically, the anode electrode 162R1 partially overlaps the power supply line 108A and the pixel circuits on both sides thereof in plan view. The pixel circuit on the left side of the power supply line 108A is a pixel circuit of the OLED element E1R1, and the pixel circuit on the right side is a pixel circuit of the OLED element E1G1. The anode electrode 162R1 is connected to the left pixel circuit. The anode electrode 162G1 partially overlaps the power supply line 108A and the pixel circuits on both sides thereof in plan view. The anode electrode 162G1 is connected to the right pixel circuit.

  The anode electrode 162B1 partially overlaps the power supply line 108B and the pixel circuits on both sides thereof in plan view. The pixel circuit on the left side of the power supply line 108B is a pixel circuit of the OLED element E1B1, and the pixel circuit on the right side is a pixel circuit of the OLED element E1G2. The anode electrode 162B1 is connected to the left pixel circuit.

  The anode electrode 162R2 partially overlaps with both of the pixel circuits between the power supply lines 108B and 108C in a plan view. The pixel circuit on the left is a pixel circuit of the OLED element E1G2, and the pixel circuit on the right is a pixel circuit of the OLED element E1R2. The anode electrode 162R2 is connected to the right pixel circuit. The anode electrode 162G2 partially overlaps with both of the pixel circuits between the power supply lines 108B and 108C in plan view. The anode electrode 162G2 is connected to the left pixel circuit.

  The anode electrode 162B2 partially overlaps both pixel circuits between the power supply line 108C and a power supply line (not shown) on the right side thereof in plan view. The anode electrode 162B2 is connected to the left pixel circuit.

  Next, the arrangement of the contact holes will be described. The contact hole 181R1 is located outside the light emitting region 185R1 of the OLED element E1R1. At least a part of the contact hole 181R1 is in contact with a part (lower left corner) of a side of the light emitting region 185R1 of the OLED element E1R1. Further, the contact hole 181G1 is located outside the light emitting region 185G1 of the OLED element E1G1. At least a part of the contact hole 181G1 is in contact with a part (upper right) of a side of the light emitting region 185G1 of the OLED element E1G1.

  By the way, when the contact hole is arranged in the light emitting region, a depression is formed between the organic layer such as the light emitting layer and the cathode electrode along the contact hole. Then, the thickness of the organic layer functioning as an insulating layer tends to be locally reduced. As a result, the anode electrode and the cathode electrode are likely to be electrically short-circuited, and the possibility of occurrence of point defects in the pixel is increased. However, in the present embodiment, since the contact holes for the red and green OLED elements are arranged in the non-light-emitting region, it is possible to prevent pixel point defects.

  6A and 6B can increase the distance between the light-emitting regions (organic light-emitting films) of the same color as compared with the layout described with reference to FIGS. 5A to 5C. For this reason, the light emitting region of the main pixel of the OLED display device manufactured using the metal mask can be widened.

  As in the example described with reference to FIGS. 5B and 5C, since two pixel circuits share one power supply line, a wiring space can be reduced and a circuit integration degree can be increased. The driving transistors T1R1 and T1R2 of the red OLED element are arranged on the left side of the power lines 108A and 108C, respectively.

  The driving transistors T1G1 and T1G2 of the green OLED element are arranged on the right side of the power supply lines 108A and 108B, respectively. For this reason, even if the misalignment occurs along the X axis, that is, in the rightward or leftward direction in FIG. 6C, it is possible to avoid a change in the luminance of the red subpixel and the luminance of the green.

  On the other hand, a change in the luminance of the blue sub-pixel due to a change in the characteristics of the drive transistor due to the misalignment may occur. However, relative luminous efficiency is largest in green and smallest in blue. By avoiding a change in luminance between the red sub-pixel and the green sub-pixel, a reduction in display quality can be suppressed. The drive transistor pairs of the red and blue or green and blue sub-pixels may be arranged on the same side with respect to the connected power supply line. In each layout, it is possible to suppress a decrease in display quality due to misalignment as compared with the comparative example described with reference to FIGS.

  Next, the positions of the contact holes in the layout of the pixel circuits and the OLED elements described with reference to FIGS. 6A and 6B will be described in detail with reference to FIGS. 6A, 6B, and 6C. FIG. 6C is a diagram illustrating positions of a plurality of contact holes on the X axis and the Y axis.

  First, the positional relationship between the contact holes on the Y axis will be described with reference to FIG. 6C. In FIG. 6C, dashed lines indicated by reference characters Yr, Yb, and Yg are lines parallel to the X axis, and schematically show coordinates on the Y axis. The coordinate Yr is the Y coordinate of the first contact hole 181R1 and the fourth contact hole 181R2, which are red contact holes. The positions of the first contact hole 181R1 and the fourth contact hole 181R2 on the Y axis are the same.

  The coordinate Yg is the Y coordinate of the second contact hole 181G1 and the fifth contact hole 181G2, which are green contact holes. The position of the second contact hole 181G1 and the position of the fifth contact hole 181G2 on the Y axis are the same.

  The coordinate Yb is the Y coordinate of the third contact hole 181B1 and the sixth contact hole 181B2, which are blue contact holes. The position of the third contact hole 181B1 and the position of the sixth contact hole 181B2 on the Y axis are the same.

  The position of the third contact hole 181B1 and the positions of the first and second contact holes (181R1, 181G1) on the Y axis are different. The position of the first contact hole 181R1 is shifted in the first direction on the Y axis with reference to the position of the third contact hole 181B1. The first direction is a direction opposite to the arrow direction of the Y axis, and is an upward direction in the drawing. The position of the second contact hole 181G1 is shifted in the second direction opposite to the first direction on the Y axis with reference to the position of the third contact hole 181B1. The second direction is the direction of the arrow on the Y axis, and is the downward direction in the drawing.

  The distance drb between the center of gravity of the first contact hole 181R1 and the center of gravity of the third contact hole 181B1 on the Y axis is larger than the distance dgb between the center of gravity of the second contact hole 181G1 and the center of gravity of the third contact hole 181B1 on the Y axis. large.

  Next, the positional relationship between the light emitting region and the contact hole will be described with reference to FIGS. 6A and 6C. The element separation length between the red OLED element and the green OLED element on the Y axis is larger than the distance between the contact holes of the red OLED element and the green OLED element. Specifically, as shown in FIG. 6A, the distance d1 in the Y axis between the side along the X axis of the light emitting region 185R1 of the OLED element E1R1 and the side along the X axis of the light emitting region 185G1 of the OLED element E1G1 is Y. The distance between the center of gravity of the first contact hole 181R1 and the center of gravity of the second contact hole 181G1 on the axis (see the distance drb + dgb in FIG. 6C).

  Note that the distance d1 in the Y axis between the side along the X axis of the light emitting region 185R1 of the OLED element E1R1 and the side along the X axis of the light emitting region 185G1 of the OLED element E1R1 is equal to the X axis of the light emitting region 185R2 of the OLED element E1R2. It is equal to the distance d2 in the Y-axis between the side along and the side along the X-axis of the light emitting region 185G2 of the OLED element E1G2.

  Next, the positional relationship of the contact holes on the X axis will be described with reference to FIG. 6A. As shown in FIG. 6A, the positions of the contact holes on the X-axis in the first column (for example, odd-numbered columns) where the red and green light-emitting regions are arranged, and the second column (where the red and green light-emitting regions are arranged) For example, the position on the X-axis of the contact hole in the even-numbered row) is different.

  Specifically, the first contact hole 181R1 is shifted in the third direction along the X axis with reference to the center of gravity of the light emitting region E1R1 or the center of gravity of the light emitting region E1G1. The third direction is a direction opposite to the arrow direction of the X axis, and is on the left side of the drawing. The second contact hole 181G1 is shifted in a fourth direction opposite to the third direction along the X axis with reference to the center of gravity of the light emitting region E1R1 or the center of gravity of the light emitting region E1G1. The fourth direction is on the right side of the drawing.

  The fourth contact hole 181R2 is shifted in the fourth direction along the X axis with reference to the center of gravity of the light emitting region E1R2 or the center of gravity of the light emitting region E1G2. The fifth contact hole 181G2 is shifted in the third direction along the X axis with reference to the center of gravity of the light emitting region E1R2 or the center of gravity of the light emitting region E1G2.

  By arranging the contact holes as described above, the characteristics of the driving transistor (pixel circuit due to a change in capacitance distribution) due to misalignment of an exposure device or the like can be obtained without changing the shape of the lower electrode (anode electrode) The change in luminance of the red and green sub-pixels can be avoided. Since it is not necessary to change the shape of the anode electrode, it is not necessary to adjust the shape and position of the light emitting region, and it is possible to suppress the layout design from becoming complicated.

  An example of the layout of the OLED element will be described. FIG. 7 shows a layout of the OLED element in the configuration described with reference to FIGS. 6A and 6B. FIG. 8 shows another layout of the OLED element. The pixel circuit layout shown in FIG. 6C can be applied to the layout of the OLED elements in both FIG. 7 and FIG.

  Referring to FIGS. 7 and 8, the red OLED element includes an anode electrode 162R and a light emitting region 185R. The anode electrode 162R is connected to a driving transistor (not shown in FIGS. 7 and 8) via a contact hole 181R. The green OLED element includes an anode electrode 162G and a light emitting region 185G. The anode electrode 162G is connected to a driving transistor (not shown in FIGS. 7 and 8) via a contact hole 181G.

  The blue OLED element includes an anode electrode 162B and a light emitting region 185B. The anode electrode 162B is connected to a drive transistor (not shown in FIGS. 7 and 8) via a contact hole 181B. In FIG. 7, only one OLED element for each of red, green, and blue is indicated by a code as an example.

  7 and 8 show main pixels in three rows and three columns. The red OLED element and the green OLED element vertically adjacent to each other and the blue OLED element on the right side thereof correspond to one main pixel. In the layout of FIG. 7, the upper end position of the blue anode electrode 162B and the upper end position of the red anode electrode 162R of each main pixel row coincide with each other. In each main pixel row, the center of gravity of the blue light emitting region 185B is on a straight line.

  FIG. 8 shows main pixels in three rows and three columns. Compared with the layout of FIG. 7, the blue light emitting regions 185B (blue anode electrodes 162B) of each main pixel row are arranged in a staggered manner. That is, the center of gravity of the blue light emitting region 185B is meandering. Further, the position of the center of gravity of the blue light emitting region 185B in the odd-numbered row and the center of gravity of the blue light emitting region 185B in the even numbered row are symmetric with respect to the X axis. As a result, the influence of the color edge can be averaged, and good color mixing can be realized.

[Connection between data line and driver IC]
FIG. 9A shows an example of connection between the driver IC 134a and the data line 105. Note that the driver IC 134a is an example of the driver IC 134 in FIG. Driver IC 134a includes a memory 134am for temporarily storing a control signal to be output to the data line. Driver IC 134a includes terminals TR1, TG1, TB1, TR2, TG2, and TB2. Note that the terminal is also called an output pin.

  Symbols “R1” and “R2” in the memory 134am schematically show video data values (hereinafter, appropriately referred to as data values) output to the data line of the OLED element E1R1 and the data line 105R2 of the OLED element E1R2, respectively. . Note that the data value is also called a control signal. The terminals TR1 and TR2 are connected to the data line of the OLED element E1R1 and the data line 105R2 of the OLED element E1R2, respectively. The driver IC 134a outputs the data values R1 and R2 stored in the memory 134am to the terminals TR1 and TR2, respectively.

  Symbols “G1” and “G2” in the memory 134am schematically indicate data values output to the data line of the OLED element E1G1 and the data line 105G2 of the OLED element E1G2, respectively. The terminals TG1 and TG2 are connected to the data line of the OLED element E1G1 and the data line 105G2 of the OLED element E1G2, respectively. The driver IC 134a outputs the data values G1 and G2 stored in the memory 134am to the terminals TG1 and TG2, respectively.

  Symbols “B1” and “B2” in the memory 134am schematically indicate data values output to the data line of the OLED element E1B1 and the data line of the OLED element E1B2, respectively. The terminal TB1 and the terminal TB2 are connected to the data line of the OLED element E1B1 and the data line of the OLED element E1B2, respectively. The driver IC 134a outputs the data values B1 and B2 stored in the memory 134am to the terminal TB1 and the terminal TB2, respectively.

  In the pixel circuit layout described with reference to FIGS. 5C and 6C, the order of the red OLED element E1R2 and the green OLED element E1G2 and the order of those pixel circuits are interchanged. In the connection example shown in FIG. 9A, the arrangement of the terminals of the driver IC 134a matches the arrangement of the OLED elements E1.

  The data line 105R2 of the red OLED element E1R2 and the data line 105G2 of the green OLED element E1G2 are connected to the corresponding terminals TR2 and TG2, respectively, and intersect on the way to the OLED elements E1R2 and E1RG2. Normally, the driver IC stores the red video data value, the green video data value, and the blue data value included in the received video data in the memory in this order as shown in FIG. 9A.

  In the example of FIG. 9A, the data line 105R2 and the data line 105G2 intersect. Therefore, even if the order of the red OLED element E1R2 and the green OLED element E1G2 and the order of their pixel circuits are interchanged, the driver IC 134a stores the data values of each color without changing the order of the data values of each color. 134am. Therefore, the driver IC 134a can give an appropriate data value to the pixel circuit. With the configuration described with reference to FIG. 9A, a driver IC that has been used conventionally can be used without developing a driver IC specialized for a display panel described in the above embodiment.

  Unlike the example described with reference to FIG. 9A, the data values stored in the memory of the driver IC may be rearranged.

  FIG. 9B shows another example of the connection between the driver IC and the data line. FIG. 9B schematically illustrates terminals and data lines connected to the terminals when the order of data values stored in the memory 134bm of the driver IC 134b is changed. Hereinafter, differences from FIG. 9A will be described. The data line 105R2 and the data line 105G2 do not intersect on the way to the OLED elements E1R2 and E1RG2. Since the data lines do not intersect, the terminal TG2 and the terminal TR2 are arranged in this order.

  Since there is no intersection as described above, the driver IC 134b stores the data values G2 and R2 in the memory 134bm in this order in accordance with the arrangement order of the wirings 105G2 and 105R2. That is, in the example of FIG. 9B, unlike FIG. 9A, the storage order of the data values G2 and R2 is changed. In the example of FIG. 9B, since the data lines do not cross each other, the risk of a short circuit between the wirings caused by the crossing can be avoided at the time of manufacturing the display device, and the manufacturing yield can be improved. In addition, by avoiding the complexity at the time of design due to the intersection and by making the design simple, the number of design steps can be reduced.

  The embodiment of the present disclosure has been described above, but the present disclosure is not limited to the above embodiment. Those skilled in the art can easily change, add, or convert each element of the above embodiments within the scope of the present disclosure. A part of the configuration of one embodiment can be replaced with the configuration of another embodiment, and the configuration of one embodiment can be added to the configuration of another embodiment.

Reference Signs List 10 OLED display device, 100 TFT substrate, 105 data line, 106 scanning line, 107 emission control line, 108 power supply line, 109 reset control line, 110 reference voltage supply line, 114 cathode electrode formation region, 125 display region, 131 scan driver , 132 emission driver, 133 protection circuit, 136 demultiplexer, 140, 140A-140D, 240A, 240B, 340A-340N pixel, 151 insulating substrate, 152 first insulating film, 155 channel, 156 gate insulating film, 157 gate electrode, 158 interlayer insulating film, 159 source electrode, 160 drain electrode, 161 flattening film, 162 anode electrode, 163 pixel defining layer, 165 organic light emitting film, 166 cathode electrode, 167 opening, 168, 169 source Drain region, 170,175,181 contact hole, 200 sealing substrate, 300 joint, T1 driving TFT, T2 select transistor, T3 emission transistors, T4 reset transistor

Claims (18)

A plurality of power lines extending along a first axis and arranged along a second axis;
A plurality of first drive transistors arranged on a first side of the plurality of power lines along the second axis, and supplied with a power potential from each of the plurality of power lines;
A plurality of second driving transistors arranged on a second side along the second axis of each of the plurality of power supply lines and receiving a power supply potential from each of the plurality of power supply lines;
A plurality of light emitting elements of the first color, a plurality of light emitting elements of the second color, and a plurality of light emitting elements of the third color,
The plurality of power lines include a plurality of power line units arranged along the second axis,
Each of the plurality of power line units includes a first power line, a second power line adjacent to the first power line, and a third power line adjacent to the second power line,
The first drive transistor of the first power supply line drives a first light emitting element of the first color,
The second drive transistor of the first power supply line drives a first light emitting element of the second color,
The first drive transistor of the second power supply line drives the first light emitting element of the third color,
The second drive transistor of the second power supply line drives a second light emitting element of the second color,
The first drive transistor of the third power supply line drives the second light emitting element of the first color,
The second drive transistor of the third power supply line drives a second light emitting element of the third color;
Display device. The display device according to claim 1,
The third color has the lowest relative luminous efficiency among the first color, the second color, and the third color,
Display device. The display device according to claim 2, wherein
The first color is red and the second color is green, or the second color is red and the first color is green,
The third color is blue;
Display device. The display device according to claim 1,
The pattern of the first drive transistor and the pattern of the second drive transistor of each of the plurality of power lines are symmetric about each of the plurality of power lines.
Display device. The display device according to claim 4, wherein
A pattern of the first driving transistor and a pattern of the second driving transistor are adjacent to each other;
Display device. The display device according to claim 1,
A first light emitting element of the first color, a first light emitting element of the second color, a first light emitting element of the third color, a second light emitting element of the first color, a second light emitting element of the second color; The two light emitting elements and the second light emitting element of the third color are arranged in a line along the second axis in this order.
Display device. The display device according to claim 6, wherein:
The plurality of first drive transistors and the plurality of second drive transistors are arranged along the second axis,
The lower electrode of the second light emitting element of the first color includes a first arm portion extending toward the third power supply line at a first end along the first axis,
The lower electrode of the second light emitting element of the second color includes a second arm portion extending toward the second power supply line at a second end along the first axis,
The first drive transistor of the third power supply line is connected to the first arm unit via a contact hole overlapping the first arm unit;
The second drive transistor of the second power supply line is connected to the second arm unit via a contact hole overlapping the second arm unit;
Display device. The display device according to claim 1,
The first light emitting element of the first color and the first light emitting element of the second color are adjacent to each other along the first axis,
The first light emitting element of the third color is adjacent to the first light emitting element of the first color and the first light emitting element of the second color along the second axis;
The second light emitting element of the first color and the second light emitting element of the second color are adjacent along the first axis, and the first light emission of the second color is along the second axis. Next to the element,
The second light emitting element of the third color is adjacent to the second light emitting element of the first color and the second light emitting element of the second color along the second axis.
Display device. The display device according to claim 8, wherein:
Furthermore,
A first contact hole connecting the first driving transistor of the first power supply line and a lower electrode of the first light emitting element of the first color;
A second contact hole connecting the second driving transistor of the first power supply line and a lower electrode of the first light emitting element of the second color;
A third contact hole connecting the first drive transistor of the second power supply line and a lower electrode of the first light emitting element of the third color;
The position of the third contact hole on the first axis is different from the positions of the first and second contact holes.
Display device. The display device according to claim 9, wherein:
A position of the first contact hole is shifted in a first direction along the first axis with reference to a position of the third contact hole;
A position of the second contact hole is shifted in a second direction opposite to the first direction along the first axis with reference to a position of the third contact hole;
Display device. The display device according to claim 10, wherein:
The distance between the center of gravity of the first contact hole and the center of gravity of the third contact hole in the first axis is the distance between the center of gravity of the second contact hole and the center of gravity of the third contact hole in the first axis. Greater than,
Display device. The display device according to claim 9, wherein:
Distance in the first axis between a side along the second axis of a light emitting region of the first light emitting element of the first color and a side along the second axis of a light emitting region of the first light emitting element of the second color Is greater than the distance between the center of gravity of the first contact hole and the center of gravity of the second contact hole in the first axis;
Display device. The display device according to claim 10, wherein:
Furthermore,
A fourth contact hole connecting the second drive transistor of the second power supply line and a lower electrode of the second light emitting element of the second color;
A fifth contact hole connecting the first drive transistor of the third power supply line to a lower electrode of the second light emitting element of the first color;
The position of the first contact hole and the position of the fourth contact hole on the first axis are the same,
The position of the second contact hole and the position of the fifth contact hole on the first axis are the same,
Display device. The display device according to claim 13, wherein:
The first contact hole is offset in a third direction along the second axis;
The second contact hole is shifted in a fourth direction opposite to the third direction along the second axis;
The fourth contact hole is shifted in a fourth direction along the second axis;
The fifth contact hole is offset in the third direction along the second axis;
Display device. The display device according to claim 9, wherein:
The first contact hole is located outside a light emitting region of the first light emitting element of the first color,
The second contact hole is located outside a light emitting region of the first light emitting element of the second color.
Display device. The display device according to claim 15, wherein
At least a part of the first contact hole contacts a part of a side of a light emitting region of the first light emitting element of the first color,
At least a part of the second contact hole is in contact with a part of a side of a light emitting region of the first light emitting element of the second color;
Display device. The display device according to claim 1,
A plurality of data lines for transmitting control signals for each of the plurality of first driving transistors and the plurality of second driving transistors;
A driver circuit for providing the control signal to the plurality of data lines;
Further comprising
A data line transmitting the control signal of the second drive transistor of the second power supply line and a data line transmitting the control signal of the first drive transistor of the third power supply line cross each other.
Display device. The display device according to claim 1, wherein:
A plurality of data lines for transmitting control signals for each of the plurality of first driving transistors and the plurality of second driving transistors;
A driver circuit for providing the control signal to the plurality of data lines;
Further comprising
A data line transmitting the control signal of the second drive transistor of the second power supply line does not intersect with a data line transmitting the control signal of the first drive transistor of the third power supply line;
Display device.

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