JP2020023427A - Nitride crystal - Google Patents

Abstract

To improve a quality of a nitride crystal and improve a property and a yield of a semiconductor device manufactured using the crystal.SOLUTION: Provided is a nitride crystal that has a composition formula of InAlGaN (0≤x≤1,0≤y≤1,0≤x+y≤1). The nitride crystal contains B in a concentration of less than 1×10at/cm, and contains O and C, each of which concentration is less than 1×10at/cmin a 60% or more area of a crystal main plane.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a nitride crystal.

  When manufacturing a semiconductor device such as a light-emitting element or a high-speed transistor, a group III nitride crystal such as gallium nitride (GaN) may be used (see Patent Documents 1 to 4).

JP-A-2006-104693 JP 2007-153664 A JP 2005-39248 A JP 2018-070405 A

  An object of the present invention is to provide a technique capable of improving the quality of the above-mentioned crystal, improving the performance of a semiconductor device manufactured using the crystal, and improving the production yield.

According to one aspect of the present invention,
Composition formula of _{In x Al y Ga 1-x} -y N ( where, 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) A represented by crystals,
The concentration of B in the crystal is less than 1 × 10 ¹⁵ at / cm ³ ,
There is provided a nitride crystal in which each concentration of O and C in the crystal is less than 1 × 10 ¹⁵ at / cm ³ in a region of 60% or more of the main surface of the crystal.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to improve the quality of the crystal | crystallization of a group III nitride, to improve the performance of the semiconductor device manufactured using this crystal, and to improve a manufacturing yield.

2A is a plan view of the GaN substrate 10, and FIG. 2B is a side view of the GaN substrate 10. FIG. 2 is a schematic configuration diagram of a vapor phase growth apparatus 200, showing a state where a crystal growth step is being performed in a reaction vessel 203. FIG. 1 is a schematic configuration diagram of a vapor phase growth apparatus 200, and shows a state where a furnace port 221 of a reaction vessel 203 is opened. (A) is a diagram showing a state in which a GaN crystal film 21 is grown thick on a seed crystal substrate 20, and (b) is a plurality of GaN substrates 10 obtained by slicing the GaN crystal film 21 grown thick. FIG. It is a figure showing the evaluation result of the electric resistivity of GaN crystal. (A) is a figure which shows the evaluation result of the in-plane distribution of the oxygen concentration in a GaN crystal when the oxidation sequence is not performed in the high-temperature baking step, and (b) is the case where the oxidation sequence is not performed in the high-temperature baking step FIG. 9 is a diagram showing an evaluation result of the distribution of the carbon concentration in the GaN crystal in the main plane in the case of. (A) is a figure which shows the evaluation result of the in-plane distribution of the oxygen concentration in a GaN crystal when an oxidation sequence is performed in a high temperature baking step, and (b) is a case where the oxidation sequence is performed in a high temperature baking step FIG. 5 is a diagram showing an evaluation result of a main surface distribution of carbon concentration in a GaN crystal in FIG.

<Knowledge obtained by the inventor>
The inventor of the present application has previously filed Japanese Patent Application No. 2016-210939. Then, in Patent Document 4 is the _publication, expressed by a composition formula of _{In x Al y Ga 1-x} -y N ( where, 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) Wherein each concentration of silicon (Si), boron (B) and iron (Fe) contained in the crystal is less than 1 × 10 ¹⁵ at / cm ³ , and oxygen (O) and carbon (C) A very high purity group III nitride crystal in which each concentration of (C) is less than 5 × 10 ¹⁵ at / cm ³ and a method for producing the same are disclosed.

  This high-purity crystal in which all of Si, B, Fe, O, and C are extremely low in concentration is a novel crystal not disclosed in the prior art documents represented by Patent Documents 1 to 3. . In addition, the high-purity crystal can be formed by a crystal growth method disclosed in Patent Documents 1 to 3, that is, a method using a high-purity gas as a source gas or a carrier gas, or a method such as AlN or the like, which is used for the inner wall of a crystal growth furnace. It has been found from the research of the inventor that it is difficult to realize by simply combining the methods of coating. According to the study of the inventor, the above-described high-purity crystal is subjected to at least a high-temperature baking step disclosed in Patent Document 4 in a furnace before crystal growth, and by optimizing various processing conditions, We know that it can be realized for the first time.

The impurity concentration of the above-mentioned high-purity crystal is so low that it is difficult to detect it by SIMS (secondary ion mass spectrometry), which is a typical impurity analysis technique at the time of filing, but the present inventor In order to search for room for further improvement, a highly sensitive SIMS measurement using a raster change method was performed on this crystal. As a result of the measurement, the inventors although the impurity concentration by performing a high temperature bake step is possible to reduce as described above, by the processing conditions, O concentration of for example 4.5 × 10 15 ^{at /} cm ³ , Or the C concentration may reach, for example, 3.5 × 10 ¹⁵ at / cm ³ . Further, it has been found that the effect of reducing the concentrations of O and C is limited, for example, to be obtained only near the center of the main surface of the substrate.

The inventor of the present application has made the further reduction of O and C taken into the crystal a new subject, and has studied diligently to solve the problem. As a result, an oxidation sequence in which an oxidizing agent such as oxygen (O ₂ ) gas is very slightly added to the processing atmosphere of the high-temperature baking step, and a predetermined amount of an etching gas such as hydrogen chloride (HCl) gas is added to the processing atmosphere. By repeatedly performing the etching sequence and the above alternately, a new operation and effect has been discovered that O and C taken into the crystal can be further reduced.

Further, as a result of earnest research, the present inventor has obtained the above-described effect of reducing the respective concentrations of O and C in a wide area of 60% or more of the main surface of the crystal by using the above-described method in the high-temperature baking step. Have discovered a new effect. Specifically, a high-temperature baking step of alternately repeating an oxidation sequence and an etching sequence inside a crystal growth furnace (reaction vessel) before growing a GaN crystal serving as a base of a GaN substrate is performed as described below. Under the conditions described above, it is possible to make each concentration of O and C in the GaN crystal less than 1 × 10 ¹⁵ at / cm ³ in a region of 60% or more of the main surface of the GaN crystal. I discovered that. As will be described later, when the oxidation sequence is not performed in the above-described high-temperature baking step, the above-described effect of reducing the concentrations of O and C is limited only in the vicinity of the center of the main surface of the crystal. It will be.

  In addition, as a result of earnest research, the inventors of the present application have found that the hardness (hardness) of the GaN crystal is set to be too large to be obtained by the conventional GaN crystal by reducing the impurity concentration in the GaN crystal as described above. It became possible to obtain the knowledge that it became possible.

  Further, as a result of earnest research, the present inventor has determined that by using the above-described method in the high-temperature baking step, the above-described effect of increasing the hardness of the GaN substrate can be obtained in a wide area of 60% or more of the main surface of the crystal. Has discovered a new effect. Specifically, when growing a GaN crystal that is a source of a GaN substrate, a high-temperature baking step of alternately repeating an oxidation sequence and an etching sequence inside a reaction vessel is performed under predetermined conditions described below. Thereby, the hardness measured by the nanoindentation method in a range where the maximum load is 1 mN or more and 50 mN or less can be set to a hardness exceeding 22.0 GPa in a region of 60% or more of the main surface of the GaN crystal. I discovered that it would be.

  Here, in the present specification, “the crystal has high hardness” means “the crystal is hardly plastically deformed”. When processing a GaN crystal ingot to produce a substrate, a new stress is generated inside the crystal due to the force applied from a processing jig such as a slicer or a polishing platen, in addition to the existing residual stress. Will do. If the hardness of the crystal is small with respect to the stress generated by the combination of these, slip motion may occur in the dislocations originally existing in the crystal, new dislocations may occur in the crystal, Further slipping motion is likely to occur. As a result, the crystal is plastically deformed, and further progresses, so that the crystal is easily cracked or the crystal is easily broken. Such a problem may occur not only when a substrate is manufactured but also when a semiconductor device is manufactured based on the substrate, for example, when dicing is performed.

  The crystal of the present application has such a great advantage that the above-mentioned problems hardly occur because the crystal has a hardness that cannot be obtained with a conventional GaN crystal. The hardness of the crystal can be measured using a known technique such as a Vickers test or a nanoindentation method. In particular, the nanoindentation method using an indenter having a small tip diameter is advantageous in that a stable measurement result can be obtained for hardness.

  The crystals of the present application, which exemplify the embodiments below, have been made for the first time based on these findings obtained by the inventors.

<First embodiment of the present invention>
(1) Configuration of GaN Substrate The crystal in the present embodiment is, for example, a flat (disk-shaped) substrate (wafer) 10 made of a single crystal of GaN (hereinafter also referred to as a GaN crystal or a GaN single crystal). Is configured as 1A and 1B show a plan view and a side view of the substrate 10, respectively. The substrate 10 is preferably used, for example, when manufacturing a semiconductor device such as a laser diode, an LED, and a high-speed transistor. However, when the diameter D is less than 25 mm, the productivity of the semiconductor device is likely to be reduced. , For example, 2 inches (5.08 cm) or more. If the thickness T is less than 250 μm, the mechanical strength of the substrate 10 is reduced, and it is difficult to maintain a self-supporting state, for example, the substrate 10 is easily broken during crystal growth of a device structure using this substrate or during a subsequent device process. Therefore, it is preferable that the thickness be larger than that. However, the dimensions shown here are merely examples, and the present embodiment is not limited to this.

  The substrate 10 is formed, for example, by epitaxially growing a GaN single crystal on a seed crystal substrate made of a GaN single crystal using a hydride vapor phase epitaxy method (hereinafter, HVPE method), and slicing this thickly grown crystal ingot to be self-supporting. Can be obtained by passing through a step of Alternatively, a GaN layer on a heterogeneous substrate as described in Patent Document 2 is used as a base layer, and a GaN layer that has grown thick through a nanomask or the like is peeled off from the heterogeneous substrate, and a facet-grown crystal on the heterogeneous substrate is removed. The substrate 10 may be obtained by removing it.

The substrate 10 in the present embodiment is configured as a semi-insulating substrate having a relatively high insulating property, that is, a relatively large electric resistivity. The electrical resistivity of the GaN crystal constituting the substrate 10 is maintained at a size of 1 × 10 ⁶ Ωcm or more under a temperature condition of, for example, 20 ° C. or more and 300 ° C. or less, and exceeds 300 ° C. Under a temperature condition of 400 ° C. or less, a size of 1 × 10 ⁵ Ωcm or more is maintained. The upper limit of the electrical resistivity of the GaN crystal is not particularly limited, but is, for example, about 1 × 10 ¹⁰ Ωcm. The reason why the GaN crystal of this embodiment has such a large electric resistivity is that the concentration of various impurities contained in the crystal is extremely low, specifically, silicon (Si) and boron (B) contained in the crystal. ), Iron (Fe), oxygen (O) and carbon (C) are all less than 1 × 10 ¹⁵ at / cm ³ . All of these impurity concentrations are below the measurement limit (lower detection limit) of typical SIMS analysis currently used. Further, it is difficult to specifically grasp the concentrations of O and C even by performing SIMS analysis using a raster change method known for high sensitivity. Incidentally, the raster change method is to change the area of the raster scan in the course of the depth profile analysis by SIMS, etc., to distinguish the elements contained in the sample from the background level derived from the SIMS apparatus, and to include in the sample. This is a method for accurately determining the net amount of element concentration.

Further, the respective concentrations of O and C in the above-mentioned GaN crystal are 1 × 10 ^{15 in} the main surface of the crystal, that is, in the region of 60% or more of the main surface of the substrate 10 and, in some cases, in the region of 70% or more. at / cm ^{3 or} less. Note that each concentration of O and C in the crystal is less than 5 × 10 ¹⁴ at / cm ^{3 in} a region of 60% or more of the main surface of the substrate 10 and, in some cases, in a region of 70% or more. There is. Also, C concentration in the crystal, in more than 60% of the area of the main surface of the substrate 10, optionally in the region of 70% or more, in some cases less than ^{1 × 10 14 at / cm 3} .

The hardness of the GaN crystal constituting the substrate 10 exceeds 22 GPa when measured by a nanoindentation method with a maximum load in a range of 1 mN or more and 50 mN or less. This hardness is too large to be obtained with a conventional GaN crystal, and since the impurity concentration in the crystal is extremely low, specifically, each concentration of B, Fe, O, and C is It is considered to have been obtained by being less than 1 × 10 ¹⁵ at / cm ³ . The hardness measurement by the nanoindentation method in the present specification was performed using the method described in WC Oliver and GM Pharr, J. Mater. Res. 7, 1564 (1992).

  Further, the hardness of the GaN crystal constituting the substrate 10 is measured by a nanoindentation method in a range where the maximum load is 1 mN or more and 50 mN or less, and the main surface of the crystal, that is, 60% or more of the main surface of the substrate 10 is measured. In some cases, it exceeds 22.0 GPa in an area of 70% or more. Note that the above hardness may exceed 22.5 GPa in a region of 60% or more of the main surface of the substrate 10, and may further exceed 23.2 GPa. The in-plane distribution of the hardness described here is considered to be due to the fact that the effect of reducing the concentrations of O and C is widely obtained over a region of 60% or more of the main surface of the substrate 10 as described above. Can be

  The GaN crystal of the present embodiment is grown using the HVPE method as described later, and is grown using a flux method using an alkali metal such as sodium (Na) or lithium (Li) as a flux. Not something. Therefore, the GaN crystal of the present embodiment does not substantially contain an alkali metal element such as Na or Li. The inventor has also performed SIMS measurement (depth direction analysis) on impurity elements other than Si, B, Fe, O, and C. However, in the GaN crystal of this embodiment, arsenic (As), chlorine ( Cl), phosphorus (P), fluorine (F), Na, Li, potassium (K), tin (Sn), titanium (Ti), manganese (Mn), chromium (Cr), molybdenum (Mo), tungsten (W ) And nickel (Ni) are not detected, that is, the concentrations of these impurity elements are lower than the lower detection limit. The current lower detection limit of each element in SIMS measurement is as follows.

As: 5 × 10 ¹² at / cm ³ , Cl: 1 × 10 ¹⁴ at / cm ³ , P: 2 × 10 ¹⁵ at / cm ³ , F: 4 × 10 ¹³ at / cm ³ , Na: 5 × 10 ¹¹ at / cm ³ , Li: 5 × 10 ¹¹ at / cm ³ , K: 2 × 10 ¹² at / cm ³ , Sn: 1 × 10 ¹³ at / cm ³ , Ti: 1 × 10 ¹² at / cm ³ , Mn : 5 × 10 ¹² at / cm ³ , Cr: 7 × 10 ¹³ at / cm ³ , Mo: 1 × 10 ¹⁵ at / cm ³ , W: 3 × 10 ¹⁶ at / cm ³ , Ni: 1 × 10 ¹⁴ at / Cm ³ .

  The inventor's earnest research has shown that the extremely low impurity concentration as described above is difficult to realize by a conventional crystal growth technique, for example, the technique disclosed in the above-mentioned Literatures 1 to 3. .

  According to Document 1, in order to suppress the incorporation of O and Si into a GaN crystal, a gas containing O and Si is not used as a source gas or a carrier gas, and the inner wall of the crystal growth vessel is made of either O or Si. It is disclosed that there is a method of coating with a material not containing. Further, it is disclosed that there is a method for suppressing C in the GaN crystal without using a carbon member as a furnace inner member and using no gas containing C as a source gas or a carrier gas. .

  Reference 2 discloses that in a HVPE method, a raw material gas or a carrier gas is brought into contact with a Ga melt for a long time so that impurities in the gas are captured by the Ga melt, and fine holes having an impurity capturing effect on the seed crystal substrate are provided. Of metal nanomasks in which a large number of metal ions are formed in advance, and shortening the growth period on the facet surface where impurities can be easily taken in, and quickly shifting to growth on the surface where impurities are hardly taken in. It is disclosed that the impurity concentration in a GaN crystal can be reduced.

  Reference 3 discloses a method using a high-purity gas as a raw material gas or a carrier gas, or a method of coating the surface of a member in a furnace with AlN or the like. It is disclosed that the incorporation of Si and O into the crystal can be reduced.

However, these documents do not realize the above-described high-purity crystal in which all of Si, B, Fe, O, and C have extremely low concentrations. As can be seen by comparing Samples 8, 12, and 17 described in Examples described later with other samples, Si, B, Fe, and O are simply obtained by simply combining the crystal methods disclosed in these documents. It is difficult to realize a high-purity crystal in which both C and C have extremely low concentrations. Comparing these samples, each concentration of Si, B and Fe contained in the crystal is less than 1 × 10 ¹⁵ at / cm ³ , and each concentration of O and C is 5 × 10 ¹⁵ at / cm ^3. In order to realize a high-purity crystal of less than ³ cm / cm ^3, it is necessary to perform at least a high-temperature baking step in a furnace before the crystal growth step and to appropriately select processing conditions. You can see that there is.

In addition, as in the crystal of the present invention, in order to make each concentration of not only Si, B, and Fe, but also O and C less than 1 × 10 ¹⁵ at / cm ³ , it is also necessary to make each of O and C In order to obtain the effect of reducing the concentration widely in a region of 60% or more of the main surface of the crystal, the above-described high-temperature baking step as disclosed in the above-mentioned reference 4 is not enough. Improvements need to be made. Specifically, in the high-temperature baking step, the oxidation sequence and the etching sequence need to be alternately repeated under predetermined conditions. Hereinafter, the processing procedure and processing conditions will be described in detail.

(2) Manufacturing Method of GaN Substrate Hereinafter, the manufacturing method of the substrate 10 in the present embodiment will be specifically described.

  First, the configuration of the HVPE apparatus 200 used for growing a GaN crystal will be described in detail with reference to FIG. The HVPE apparatus 200 includes, for example, a reaction vessel 203 configured in a cylindrical shape. The reaction vessel 203 has a sealed structure so that the outside air and gas in a glove box 220 described below do not enter the inside. Inside the reaction vessel 203, a reaction chamber 201 in which crystal growth is performed is formed. In the reaction chamber 201, a susceptor 208 for holding the seed crystal substrate 20 made of a GaN single crystal is provided. The susceptor 208 is connected to a rotation shaft 215 of the rotation mechanism 216, and is configured to be rotatable. Further, the susceptor 208 includes an internal heater 210. The temperature of the internal heater 210 is configured to be controllable separately from a zone heater 207 described later. Further, the susceptor 208 is covered on its upstream side and the periphery with a heat shield wall 211. By providing the heat shield wall 211, gases other than the gas supplied from the nozzles 249a to 249c described later are not supplied to the seed crystal substrate 20.

The reaction vessel 203 is connected to the glove box 220 via a metal flange 219 made of SUS or the like formed in a cylindrical shape. The glove box 220 also has an airtight structure so that the atmosphere does not enter the inside. The exchange chamber 202 provided inside the glove box 220 is continuously purged with high-purity nitrogen (hereinafter, also simply referred to as N ₂ gas), and is maintained at a low oxygen and moisture concentration. I have. The glove box 220 includes a transparent acrylic wall, a plurality of rubber gloves connected to a hole penetrating the wall, and a pass box for taking things in and out of the glove box 220. , Is provided. The pass box is provided with a vacuuming mechanism and an N ₂ purge mechanism, and by replacing the atmosphere therein with N ₂ gas, the atmosphere containing oxygen is not drawn into the glove box 220, so that the glove box 220 It is configured so that objects can be taken in and out inside and outside. When the crystal substrate is taken in and out of the reaction vessel 203, as shown in FIG. 3, the opening of the metal flange 219, that is, the furnace port 221 is opened. As a result, the surface of each member in the reaction vessel 203, which has been subjected to the cleaning and reforming treatments by performing the high-temperature baking step described below, is contaminated again. It is possible to prevent gas containing impurities from adhering. The impurities mentioned here include O ₂ and moisture (H ₂ O) derived from the atmosphere, organic substances containing C, O, and hydrogen (H) derived from the human body, Na, K, and the like, crystal growth processes, and the like. Among As, Cl, P, F, etc. derived from gases used in the device manufacturing process and the like, and Fe, Sn, Ti, Mn, Cr, Mo, W, Ni, etc. derived from metal members in the furnace. Contains at least one.

At one end of the reaction vessel 203, a gas supply pipe 232a for supplying HCl gas into a gas generator 233a described later, a gas supply pipe 232b for supplying ammonia (NH ₃ ) gas into the reaction chamber 201, and into the reaction chamber 201 A gas supply pipe 232c for supplying HCl gas for high-temperature baking and normal baking, and a gas supply pipe 232d for supplying nitrogen (N ₂ ) gas into the reaction chamber 201 are connected. The gas supply pipe 232a~232c, in addition to HCl gas and NH ₃ gas is also configured the hydrogen _{(H 2)} gas and _{N 2} gas as a carrier gas to allow supply. The gas supply pipe 232a~232c, in addition to these gases, traces of oxygen _{(O 2)} is also configured to allow supply of gas. The gas supply pipes 232a to 232c are provided with a flow controller and a valve (both not shown) for each of these gas types, and individually control the flow of various gases and start / stop supply for each gas type. It is configured to be able to do. The gas supply pipe 232d also includes a flow controller and a valve (both not shown). The N ₂ gas supplied from the gas supply pipe 232d is used to maintain the cleanliness of the atmosphere in these portions by purging the upstream side and surroundings of the heat shield wall 211 in the reaction chamber 201.

The HCl gas supplied from the gas supply pipe 232c and the H ₂ gas supplied from the gas supply pipes 232a to 232c are supplied to the inside of the reaction chamber 201 (particularly, heat shield) in an etching sequence of a high-temperature bake step and a normal bake step described later. It acts as a cleaning gas for cleaning the surface of the member (inside the wall 211) and as a reforming gas for reforming these surfaces into surfaces having a low probability of releasing impurities. Further, a small amount of O ₂ gas supplied from the gas supply pipes 232a to 232c acts as a gas for promoting each of the above-described cleaning and reforming in an oxidation sequence of a high-temperature bake step described later. The reason for this promotion is not clear, but by adding a small amount of O ₂ gas into the atmosphere of the high-temperature baking treatment described later, the organic substances attached to the parts in the furnace become volatile components such as H ₂ O and CO _2. It is presumed that this is due to easy removal. The N ₂ gas supplied from the gas supply pipes 232 a to 232 c is supplied to the nozzle 249 a so that a desired portion in the reaction chamber 201 (particularly, inside the heat shield wall 211) is appropriately cleaned in each baking step. ２４249c acts so as to appropriately adjust the blowing flow rate of HCl gas, H ₂ gas, and O ₂ gas ejected from the tip.

The HCl gas introduced from the gas supply pipe 232a acts as a GaCl gas, which is a halide of Ga, by reacting with a Ga source in a crystal growth step described later, that is, a reaction gas for generating a Ga source gas. The NH ₃ gas supplied from the gas supply pipe 232b is a nitriding agent that reacts with a GaCl gas to grow GaN, which is a nitride of Ga, on the seed crystal substrate 20 in a crystal growth step described later, ie, Acts as N source gas. Hereinafter, the GaCl gas and the NH ₃ gas may be collectively referred to as source gases. The H ₂ gas and the N ₂ gas supplied from the gas supply pipes 232a to 232c are adjusted in a crystal growth step, which will be described later, by appropriately adjusting the blowing velocity of the source gas ejected from the tips of the nozzles 249a to 249c. Acts on the seed crystal substrate 20.

  As described above, the gas generator 233a that contains the Ga melt as the Ga raw material is provided downstream of the gas supply pipe 232a. The gas generator 233a is provided with a nozzle 249a that supplies the GaCl gas generated by the reaction between the HCl gas and the Ga melt toward the main surface of the seed crystal substrate 20 held on the susceptor 208. . Downstream of the gas supply pipes 232b and 232c, nozzles 249b and 249c for supplying various gases supplied from these gas supply pipes toward the main surface of the seed crystal substrate 20 held on the susceptor 208 are provided. Have been. The nozzles 249a to 249c are configured to penetrate the upstream side of the heat shield wall 211, respectively.

In addition, the gas supply pipe 232c may include, for example, a ferrocene (Fe (C ₅ H ₅ ) ₂ , abbreviated as Cp ₂ Fe) gas or an iron trichloride (HCl gas, an H ₂ gas, an N ₂ gas) as a dopant gas. Fe-containing gas such as FeCl ₃ ), Si-containing gas such as silane (SiH ₄ ) gas or dichlorosilane (SiH ₂ Cl ₂ ), bis (cyclopentadienyl) magnesium (Mg (C ₅ H ₅ ) ₂ , It is also configured to be able to supply a Mg-containing gas such as Cp ₂ Mg) gas.

  The metal flange 219 provided at the other end of the reaction vessel 203 is provided with an exhaust pipe 230 for exhausting the inside of the reaction chamber 201. The exhaust pipe 230 is provided with an APC valve 244 as a pressure regulator and a pump 231 in order from the upstream side. Note that, instead of the APC valve 244 and the pump 231, a blower including a pressure adjusting mechanism can be used.

  On the outer periphery of the reaction vessel 203, a zone heater 207 for heating the inside of the reaction chamber 201 to a desired temperature is provided. The zone heater 207 is composed of at least two heaters, a portion including the upstream gas generator 233a and a portion including the downstream susceptor 208. Each of the heaters individually ranges from room temperature to 1200 ° C. Each has a temperature sensor and a temperature regulator (both are not shown) so that the temperature can be adjusted.

  As described above, the susceptor 208 holding the seed crystal substrate 20 is different from the zone heater 207 in that the internal heater 210, the temperature sensor 209, and the temperature controller ( (Not shown). Further, the upstream side and the periphery of the susceptor 208 are surrounded by the heat shield wall 211 as described above. At least the surface (inner peripheral surface) of the heat shield wall 211 facing the susceptor 208 needs to use a limited member that does not generate impurities as described later, but the other surface (outer peripheral surface) There is no limitation on the members to be used as long as the members can withstand a temperature of 1600 ° C. or higher. At least a portion of the heat insulating wall 211 excluding the inner peripheral surface is made of a non-metallic material having high heat resistance such as carbon, silicon carbide (SiC) or tantalum carbide (TaC), or a heat resistant material such as Mo or W. It can be made of a high metal material, and can have a structure in which plate-like reflectors are stacked. By using such a configuration, even when the temperature of the susceptor 208 is 1600 ° C., the temperature outside the heat shield wall 211 can be suppressed to 1200 ° C. or less. Since this temperature is equal to or lower than the softening point of quartz, in this configuration, quartz can be used as each member constituting the upstream portion of the reaction vessel 203, the gas generator 233a, and the gas supply pipes 232a to 232d. Becomes

In the reaction chamber 201, a region that is heated to 900 ° C. or higher when a crystal growth step described below is performed, and in which a gas supplied to the seed crystal substrate 20 may come into contact (high-temperature reaction region) The surface of the member constituting 201a has a heat resistance of at least 1600 ° C. and is made of a material that does not contain quartz (SiO ₂ ) and B. Specifically, crystal growth is also performed on the inner wall of the heat shield wall 211 on the upstream side of the susceptor 208, the portion penetrating inside the heat shield wall 211 for the nozzles 249 a to 249 c, and the portion outside the heat shield wall 211. The portion heated to 900 ° C. or higher when performing the step, the surface of the susceptor 208, and the like are made of a heat-resistant material such as alumina (Al ₂ O ₃ ), SiC, graphite, TaC, and pyrolytic graphite. Although not included in the region 201a, it is needless to say that a portion around the internal heater 210 also needs to have heat resistance of at least 1600 ° C. or more. Such high heat resistance is required for the members constituting the region 201a and the like because a high-temperature bake step is performed before the crystal growth step is performed, as described later.

  Each member included in the HVPE apparatus 200, for example, various valves and flow controllers provided in the gas supply pipes 232a to 232d, a pump 231, an APC valve 244, a zone heater 207, an internal heater 210, a temperature sensor 209, and the like are configured as a computer. Connected to the controller 280.

  Next, an example of a process for epitaxially growing a GaN single crystal on the seed crystal substrate 20 using the HVPE apparatus 200 will be described in detail with reference to FIG. In the following description, the operation of each unit constituting the HVPE apparatus 200 is controlled by the controller 280.

(High temperature bake step)
This step is performed when the inside of the reaction chamber 201 and the inside of the exchange chamber 202 are exposed to the atmosphere by performing maintenance of the HVPE apparatus 200 and charging of the Ga raw material into the gas generator 233a. Before performing this step, it is confirmed that the airtightness of the reaction chamber 201 and the exchange chamber 202 is ensured. After the airtightness is confirmed, the inside of the reaction chamber 201 and the inside of the exchange chamber 202 are respectively replaced with N ₂ gas, and then the surface of various members constituting the reaction chamber 201 is kept in a state where the inside of the reaction vessel 203 is in a predetermined atmosphere. Is heat-treated. This process is performed in a state where the seed crystal substrate 20 has not been loaded into the reaction vessel 203 and a state where the Ga raw material has been charged into the gas generator 233a.

  In this step, the temperature of the zone heater 207 is adjusted to the same temperature as in the crystal growth step. Specifically, the temperature of the upstream heater including the gas generator 233a is set to a temperature of 700 to 900 ° C, and the temperature of the downstream heater including the susceptor 208 is set to a temperature of 1000 to 1200 ° C. Further, the temperature of the internal heater 210 is set to a predetermined temperature of 1500 ° C. or higher. As will be described later, in the crystal growth process, the internal heater 210 is turned off or set at a temperature of 1200 ° C. or less, so that the temperature of the high-temperature reaction region 201a is 900 ° C. or more and less than 1200 ° C. On the other hand, in the high-temperature baking step, the temperature of the internal heater 210 is set to a temperature of 1500 ° C. or more, so that the temperature of the high-temperature reaction region 201a becomes 1000 to 1500 ° C. or more, and the susceptor 208 on which the seed crystal substrate 20 is placed is placed. Becomes high at 1500 ° C. or more, and at other positions, the temperature becomes higher by at least 100 ° C. than the temperature during the crystal growth step. In the high-temperature reaction region 201a, during the crystal growth step, a portion at which the temperature becomes the lowest 900 ° C., specifically, a portion on the upstream side of the nozzles 249a to 249c inside the heat shield wall 211 adheres. This is the portion where the impurity gas is hardly removed. By setting the temperature of the internal heater 210 at a temperature of 1500 ° C. or higher so that the temperature of this portion is at least 1000 ° C. or higher, the effects of the cleaning and reforming processes described later, that is, the GaN crystal to be grown In this case, the effect of reducing impurities can be sufficiently obtained. When the temperature of the internal heater 210 is set to a temperature lower than 1500 ° C., the temperature at any point in the high-temperature reaction region 201a cannot be sufficiently increased, and the effects of the cleaning and reforming processes described below, ie, GaN It becomes difficult to obtain the effect of reducing impurities in the crystal.

  The upper limit of the temperature of the internal heater 210 in this step depends on the capability of the heat shield wall 211. As long as the temperature of the quartz parts and the like outside the heat shield wall 211 can be suppressed within a range not exceeding their heat resistant temperature, the higher the temperature of the internal heater 210, the more the cleaning and reforming of the reaction chamber 201 will be performed. The effect of the quality treatment is easily obtained. When the temperature of the quartz parts and the like outside the heat shield wall 211 exceeds their heat-resistant temperatures, the maintenance frequency and cost of the HVPE apparatus 200 may increase.

In this step, after the temperatures of the zone heater 207 and the internal heater 210 reach the above-mentioned predetermined temperatures, the H ₂ gas is supplied from each of the gas supply pipes 232a and 232b at a flow rate of, for example, about 3 to 5 slm. I do. Further, a sequence (oxidation sequence) of supplying an N ₂ gas at a flow rate of, for example, about 3 to 5 slm and supplying an O ₂ gas at a flow rate of, for example, about 0.005 to 0.25 slm, from the gas supply pipe 232 c, for example, supplies the HCl gas at a flow rate of about 0.3～4Slm, for example, 1~5slm a flow rate of about with _{H 2} gas sequence supplies (etch sequence), are alternately repeated. Further, N ₂ gas is supplied from the gas supply pipe 232d at a flow rate of, for example, about 10 slm. The execution time of each of the etching sequence and the oxidation sequence is preferably about 1 minute to 15 minutes. In this step, baking in the reaction chamber 201 is performed while repeating a cycle of alternately performing these sequences a predetermined number of times. When repeating the cycle, the last performed sequence is preferably an etching sequence. By starting the supply of the H ₂ gas, the HCl gas, and the O ₂ gas at the above-described timing, that is, after the temperature inside the reaction chamber 201 is increased, the supply of the H ₂ gas, the HCl gas, and the O ₂ gas can be performed without contributing to the cleaning and reforming processes described later. It is possible to reduce the amount of gas that flows only uselessly and to reduce the processing cost for crystal growth.

  This step is performed while the pump 231 is operated. At this time, by adjusting the opening of the APC valve 244, the pressure in the reaction vessel 203 is increased to, for example, 0.5 to 2 atm. To maintain. By performing this step while the inside of the reaction vessel 203 is exhausted, it becomes possible to efficiently remove impurities from the inside of the reaction vessel 203, that is, to efficiently clean the inside of the reaction vessel 203. If the pressure in the reaction vessel 203 is less than 0.5 atm, it is difficult to obtain the effects of the cleaning and reforming processes described later. When the pressure in the reaction vessel 203 exceeds 2 atm, the members in the reaction chamber 201 suffer excessive etching damage.

In the etching sequence of this step, the partial pressure ratio of HCl gas to H ₂ gas in the reaction vessel 203 (the partial pressure of HCl / the partial pressure of H ₂ ) is set to, for example, 1/50 to 1/2. Set. If the partial pressure ratio is smaller than 1/50, it becomes difficult to obtain the effects of the cleaning and the reforming treatment in the reaction vessel 203, respectively. On the other hand, when the above-mentioned partial pressure ratio is larger than 1/2, the members in the reaction chamber 201 suffer excessive etching damage.

In the oxidation sequence of this step, the partial pressure ratio of the O ₂ gas to the H ₂ gas and the N ₂ gas in the reaction vessel 203 (the partial pressure of O ₂ / the total partial pressure of H ₂ + N ₂ ) is, for example, 1 / The size is set to 10 ³ to 50/10 ³ . That is, the flow rate of the O ₂ gas supplied into the reaction vessel 203 is set to a value within a range of 0.1 to 5% of the total flow rate of the other gases (H ₂ gas and N ₂ gas) supplied into the reaction vessel 203. And When the partial pressure ratio is smaller than 1/10 ³ , it is difficult to obtain the effect of promoting the cleaning and the effect of promoting the reforming treatment in the reaction vessel 203. Further, if the above-mentioned partial pressure ratio is larger than 50/10 ³ , the O concentration of the GaN crystal grown on the seed crystal substrate 20 increases, for example, the O component remaining in the reaction vessel 203 in the crystal growth step described later increases. May increase.

  These partial pressure controls can be performed by adjusting the flow rate of a flow rate controller provided in the gas supply pipes 232a to 232c.

  In this step, if the time for performing the oxidation and the etching sequence is set to 1 minute, the cycle of alternately performing these is, for example, 20 times or more. Alternatively, when the oxidizing and etching sequences are performed for 15 minutes each, a cycle in which these are alternately performed is performed twice or more, for example. As a result, in the reaction chamber 201, at least the surfaces of various members constituting the high-temperature reaction region 201a can be cleaned, and foreign substances adhering to these surfaces can be removed. Then, by maintaining the surfaces of these members at 100 ° C. or higher than the temperature in the crystal growth step described later, the release of impurity gas from these surfaces is promoted, and the temperature and pressure conditions in the crystal growth step are It is possible to reform into a surface where impurities such as Si, B, Fe, O and C are hardly released (a surface where outgas is hardly generated). In this step, the total execution time of each sequence of the oxidation and the etching is preferably 30 minutes or more, more preferably 60 minutes or more, and even more preferably 120 minutes or more. Further, the number of repetitions of the cycle is preferably two or more, more preferably four or more, and even more preferably eight or more. If the total execution time of each sequence is less than 30 minutes, or if the number of repetitions of the cycle is less than 2, the effects of the cleaning and reforming treatments described herein may be insufficient. . If the total execution time of this step exceeds 300 minutes, the members constituting the high-temperature reaction region 201a are excessively damaged.

When supplying the H ₂ gas and the HCl gas into the reaction vessel 203, the supply of the NH ₃ gas into the reaction vessel 203 is not performed. If NH ₃ gas is supplied into the reaction vessel 203 in this step, it is difficult to obtain the effects of the above-described cleaning and reforming processes, particularly the effects of the reforming process.

Further, when supplying H ₂ gas and HCl gas into the reaction vessel 203, chlorine (Cl ₂ ) gas may be supplied instead of HCl gas. Also in this case, the effects of the above-described cleaning and reforming processes can be obtained in the same manner.

When supplying O ₂ gas into the reaction vessel 203, an oxidizing agent (O-containing gas) such as water vapor (H ₂ O gas) or carbon monoxide (CO) gas is supplied instead of O ₂ gas. It may be. Also in these cases, each of the above-described promoting effect of the cleaning and the promoting effect of the reforming treatment can be similarly obtained.

When supplying H ₂ gas and HCl gas into the reaction vessel 203, N ₂ gas may be added as a carrier gas from the gas supply pipes 232a to 232c. By adjusting the blowing speed of the gas from the nozzles 249a to 249c by adding the N ₂ gas, it is possible to prevent the above-described part of the cleaning and reforming processes from being incomplete. Note that a rare gas such as an Ar gas or a He gas may be supplied instead of the N ₂ gas.

When the above-described cleaning and reforming processes are completed, the output of the zone heater 207 is reduced, and the temperature inside the reaction vessel 203 is, for example, 200 ° C. or less, that is, the seed crystal substrate 20 can be carried into the reaction vessel 203. The temperature is lowered to a temperature at which Further, the supply of the H ₂ gas and the HCl gas into the reaction vessel 203 is stopped, and the reaction vessel 203 is purged with the N ₂ gas. When the purging of the reaction vessel 203 is completed, the pressure in the reaction vessel 203 is adjusted to the atmospheric pressure or a pressure slightly higher than the atmospheric pressure while maintaining the supply of the N ₂ gas into the reaction vessel 203. , The opening of the APC valve 244 is adjusted.

(Normal bake step)
The above-described high temperature baking step is performed when the inside of the reaction chamber 201 and the inside of the exchange chamber 202 are exposed to the atmosphere. However, when performing the crystal growth step, the inside of the reaction chamber 201 and the inside of the exchange chamber 202 are not normally exposed to the atmosphere including before and after the crystal growth step, so that the high-temperature baking step is not required. However, by performing the crystal growth step, polycrystalline GaN adheres to the surfaces of the nozzles 249a to 249c, the surface of the susceptor 208, the inner wall of the heat shield wall 211, and the like. When the next crystal growth step is performed in a state where the GaN polycrystal remains, the GaN polycrystal powder, Ga droplets, and the like separated from the polycrystal and scattered adhere to the seed crystal substrate 20, resulting in good crystal growth. Cause inhibition. For this reason, after the crystal growth step, a normal bake step is performed for the purpose of removing the GaN polycrystal. The processing procedure and processing conditions for the normal bake step are as follows: the internal heater 210 is turned off, the temperature near the susceptor 208 is set to a temperature of 1000 to 1200 ° C., and the same as the etching sequence of the high temperature bake step is performed. Bake. By performing the normal bake step, the GaN polycrystal can be removed from the inside of the reaction chamber 201.

(Crystal growth step)
After the high-temperature baking step or the normal baking step is performed, when the temperature in the reaction vessel 203 is reduced and the purge is completed, the furnace port 221 of the reaction vessel 203 is opened and the seed crystal substrate 20 is placed on the susceptor 208 as shown in FIG. Is placed. The furnace port 221 is isolated from the atmosphere and is connected to a glove box 220 that is continuously purged with N ₂ gas. As described above, the glove box 220 is used to carry out a transparent acrylic wall, a plurality of rubber gloves connected to a hole penetrating the wall, and the inside and outside of the glove box 220. And a pass box. By substituting the atmosphere inside the pass box with N ₂ gas, it is possible to take things in and out of the glove box 220 without drawing the atmosphere into the glove box 220. By performing the mounting operation of the seed crystal substrate 20 using such a mechanism, a high-temperature baking step is performed to recontaminate each member in the reaction vessel 203 that has been cleaned and reformed, It is possible to prevent the impurity gas from re-adhering to the substrate. The surface of the seed crystal substrate 20 placed on the susceptor 208, that is, the main surface (crystal growth surface, base surface) on the side facing the nozzles 249a to 249c is, for example, the (0001) plane of the GaN crystal, that is, , + C plane (Ga polar plane).

When the loading of the seed crystal substrate 20 into the reaction chamber 201 is completed, the furnace port 221 is closed, and H ₂ gas or H ₂ gas is introduced into the reaction chamber 201 while heating and exhausting the inside of the reaction chamber 201. And supply of N ₂ gas is started. Then, in a state where the inside of the reaction chamber 201 reaches a desired processing temperature and a desired processing pressure and the atmosphere in the reaction chamber 201 becomes a desired atmosphere, supply of HCl gas and NH ₃ gas from the gas supply pipes 232a and 232b. Is started, and a GaCl gas and an NH ₃ gas are supplied to the surface of the seed crystal substrate 20. Thereby, as shown in the sectional view of FIG. 4A, the GaN crystal is epitaxially grown on the surface of the seed crystal substrate 20, and the GaN crystal film 21 is formed.

In this step, in order to prevent thermal decomposition of the GaN crystal constituting the seed crystal substrate 20, NH ₃ is introduced into the reaction chamber 201 at or before the temperature of the seed crystal substrate 20 reaches 500 ° C. Preferably, the supply of gas is started. In addition, in order to improve the in-plane film thickness uniformity of the GaN crystal film 21 and the like, this step is preferably performed with the susceptor 208 rotated.

  In this step, the temperature of the zone heater 207 is set to, for example, a temperature of 700 to 900 ° C. for the upstream heater including the gas generator 233a, and to a temperature of, for example, 1000 to 1200 ° C. for the downstream heater including the susceptor 208. It is preferable to set. Thereby, the temperature of the susceptor 208 is adjusted to a predetermined crystal growth temperature of 1000 to 1200C. In this step, the internal heater 210 may be used in an off state, but as long as the temperature of the susceptor 208 is in the above-described range of 1000 to 1200 ° C., the temperature control using the internal heater 210 is performed. No problem.

The following are examples of other processing conditions in this step.
Processing pressure: 0.5 to 2 atmospheres Partial pressure of GaCl gas: 0.1 to 20 kPa
Partial pressures of / GaCl gas of the NH ₃ gas: 1-100
H ₂ gas partial pressure / GaCl gas partial pressure: 0 to 100

When supplying GaCl gas and NH ₃ gas to the surface of seed crystal substrate 20, N ₂ gas as a carrier gas may be added from each of gas supply pipes 232a to 232c. By adjusting the blowing velocity of the gas supplied from the nozzles 249a to 249c by adding the N ₂ gas, the distribution of the supply amount of the raw material gas on the surface of the seed crystal substrate 20 is appropriately controlled, and the entire surface of the seed crystal substrate is controlled. A uniform growth rate distribution can be realized. Note that a rare gas such as an Ar gas or a He gas may be supplied instead of the N ₂ gas.

(Unloading step)
After the GaN crystal film 21 having a desired thickness is grown on the seed crystal substrate 20, the reaction is performed while supplying the NH ₃ gas and the N ₂ gas into the reaction chamber 201 and exhausting the inside of the reaction chamber 201. The supply of the HCl gas and the H ₂ gas into the chamber 201 and the heating by the zone heater 207 are stopped. When the temperature in the reaction chamber 201 falls to 500 ° C. or lower, the supply of the NH ₃ gas is stopped, and the atmosphere in the reaction chamber 201 is replaced with N ₂ gas to return to the atmospheric pressure. Then, the inside of the reaction chamber 201 is at a temperature of, for example, 200 ° C. or lower, that is, the temperature at which the GaN crystal ingot (the seed crystal substrate 20 having the GaN crystal film 21 formed on the surface) can be carried out from the inside of the reaction vessel 203. Let it cool down. Thereafter, the crystal ingot is carried out of the reaction chamber 201 via the glove box 220 and the pass box.

(Slice step)
Thereafter, the unloaded crystal ingot is sliced, for example, parallel to the growth surface, whereby one or more substrates 10 can be obtained as shown in FIG. This slicing can be performed using, for example, a wire saw or an electric discharge machine. After that, the surface (+ c surface) of the substrate 10 is subjected to a predetermined polishing process to make this surface an epi-ready mirror surface. The back surface (-c surface) of the substrate 10 is a wrap surface or a mirror surface.

  The above-described high-temperature baking step, normal baking step, crystal growth step, and unloading step are preferably performed in the following order. That is, when n is an integer of 1 or more, for example, the inside of the reaction chamber 201 and the inside of the exchange chamber 202 are exposed to the air → the high temperature baking step → the crystal growth step → the carrying out step → (the normal baking step → the crystal growing step → the carrying out step). ) × n.

(3) Effects obtained by this embodiment According to this embodiment, one or more effects described below can be obtained.

(A) Before performing the crystal growth step, by performing a high-temperature bake step while alternately repeating the oxidation sequence and the etching sequence under the above-described processing conditions, Si in the GaN crystal obtained in the present embodiment is obtained. , B, Fe, O and C all have extremely small values of less than 1 × 10 ¹⁵ at / cm ³ .

  It should be noted that the impurity concentrations of Si, B, and Fe are not measured values of the actual concentrations of the respective impurities, but represent the current lower detection limits in SIMS measurement, which is a typical impurity analysis technique. That is, the actual concentration of each impurity could be so low that it could not be detected with current technology.

The lower detection limit of the O concentration by the raster change method is 5 × 10 ¹⁴ at / cm ³ , and the lower detection limit of the C concentration is 1 × 10 ¹⁴ at / cm ³ . When the processing conditions of the present embodiment are adjusted within the above range, for example, the execution time of each sequence of oxidation and etching is set to 60 minutes or more in total, or the number of cycles is set to 4 times or more. In this case, the respective concentrations of Si, B and Fe in the GaN crystal are all less than 1 × 10 ¹⁵ at / cm ³ , and the respective concentrations of O and C are both 5 × 10 ¹⁴ at / cm 3. It has been confirmed that it can be less than ³ . In addition, when the inventor further optimizes the processing conditions of the present embodiment within the above range, for example, the total execution time of each oxidation and etching sequence is set to 120 minutes or more, or the number of cycle repetitions is set to 8 times. Or more times, the O concentration is less than 5 × 10 ¹⁴ at / cm ³ while the respective concentrations of Si, B and Fe in the GaN crystal are all less than 1 × 10 ¹⁵ at / cm ^3. It has been confirmed that the C concentration can be reduced to less than 1 × 10 ¹⁴ at / cm ³ .

  The GaN crystal obtained in the present embodiment has a significantly higher defect density and dislocation density than conventional GaN crystals containing more of these impurities, for example, GaN crystals obtained by the methods disclosed in References 1 to 3. It will have very good crystal quality, such as being smaller.

  In addition, the GaN crystal obtained in the present embodiment is a crystal that hardly generates cracks during the growth of a thick film or the slice processing. This is considered to be due to the fact that the hardness of the GaN crystal was increased by lowering the impurity concentration than before, and the plastic deformation of the crystal during ingot growth was suppressed. As a method for measuring the hardness of the crystal, for example, a nanoindentation method in which the maximum load is in the range of 1 mN to 50 mN is appropriate.

Examination of the hardness of the GaN crystal by this method revealed that when the crystal contained at least one of B, Fe, O and C at a concentration of 1 × 10 ¹⁵ at / cm ³ or more, the hardness of the crystal was It has been confirmed that the hardness does not exceed 22 GPa and, for example, the hardness is in the range of 19.7 GPa to 21.8 GPa.

On the other hand, when the respective concentrations of B, Fe, O and C in the GaN crystal are all less than 1 × 10 ¹⁵ at / cm ³ as in the present embodiment, the hardness of the crystal becomes 22. It has been confirmed that the value exceeds 0 GPa and becomes a large value such as 22.5 GPa. Further, while the both 1 × ¹⁰ 15 at / cm less than ³ concentrations of B and Fe in the GaN crystal, further, when the respective concentrations of O and C together 5 × ¹⁰ 14 at / cm less than ^3, It has been confirmed that the hardness of the crystal exceeds 22.5 GPa and becomes a very large value, for example, 23.2 GPa. Further, the B concentration and the Fe concentration in the GaN crystal are both less than 1 × 10 ¹⁵ at / cm ³ , the O concentration is less than 5 × 10 ¹⁴ at / cm ³ , and the C concentration is 1 × 10 ¹⁴ at / cm ^3. It has been confirmed that when it is less than cm ³ , the hardness of the GaN crystal exceeds 23.2 GPa, which is an extremely large value, for example, 25.5 GPa. In addition, it will be described later that even if Si is added in a concentration range of 1 × 10 ¹⁵ at / cm ³ to 1 × 10 ¹⁹ at / cm ³ , for example, it does not significantly affect the hardness of the GaN crystal. Confirmed in experiments.

  From the above, when fabricating a semiconductor device using the substrate 10 obtained by slicing the GaN crystal of the present embodiment, compared to the case of using a conventional GaN crystal substrate containing more impurities, Due to the effect of suppressing the diffusion of, it is possible to improve the characteristics of the device and extend the life. Furthermore, by increasing the hardness of the GaN crystal, it is possible to suppress the occurrence of cracks when growing the ingot and the occurrence of cracks when slicing the ingot. As a result, the production of the ingot and the production of the substrate 10 can be performed at a high yield.

(B) Before performing the crystal growth step, by performing a high-temperature bake step while alternately repeating an oxidation sequence and an etching sequence under the above-described processing conditions, O 2 in the GaN crystal obtained in the present embodiment is obtained. And C are set to 1 × 10 ¹⁵ at / cm ^{3 in} the main surface of the GaN crystal, that is, in the region of 60% or more of the main surface of the GaN substrate, and in some cases, in the region of 70% or more of the main surface. It becomes possible to make it less than.

This is presumably because the high-temperature baking step was performed under the above-described method and under the above-described conditions, whereby the amount of outgas generated from the members in the reaction vessel 203 during the crystal growth step was significantly reduced. Is done. By appropriately selecting the processing conditions in the high-temperature baking step within the above-described range, the respective concentrations of O and C in the crystal can be adjusted in a region of 60% or more of the main surface of the substrate 10 in some cases. In the region of 70% or more of the above, all can be less than 5 × 10 ¹⁴ at / cm ³ . Further, the C concentration in the crystal can be less than 1 × 10 ¹⁴ at / cm ^{3 in} a region of 60% or more of the main surface of the substrate 10 and, in some cases, in a region of 70% or more of the main surface. Become.

As will be described later, when the oxidation sequence is not performed in the high-temperature baking step, even if the processing temperature is set to about 1600 ° C., the effect of reducing the concentrations of O and C does not increase near the center of the main surface of the substrate. Only in the limited case obtained. That is, as in the present embodiment, it is impossible for each of the concentrations of O and C in the GaN crystal to be less than 1 × 10 ¹⁵ at / cm ^{3 in} a region of 60% or more of the main surface of the GaN crystal. It becomes possible.

(C) Since the GaN crystal obtained in the present embodiment has high purity as described above, it has a high insulating property of an electric resistivity of 1 × 10 ⁶ Ωcm or more under a temperature condition of 20 ° C. or more and 300 ° C. or less. have. When the GaN crystal contains a large amount of donor impurities such as Si and O, in order to enhance the insulating properties of the crystal, for example, Mn, Fe, and cobalt in the crystal as disclosed in JP-T-2007-534580. There is known a method of adding an impurity for donor compensation such as (Co), Ni, and copper (Cu) (hereinafter, referred to as an impurity for compensation). However, in this method, there is a problem that the quality of the GaN crystal is deteriorated due to the addition of the compensating impurity, and the hardness of the crystal is reduced. For example, when a compensating impurity is added to a GaN crystal, cracks are likely to occur in a substrate obtained by slicing this crystal. Further, the diffusion of the compensating impurities into the laminated structure formed on the substrate makes it easy for the characteristics of the semiconductor device manufactured using this substrate to deteriorate. On the other hand, in the GaN crystal of the present embodiment, a high insulating property can be obtained without adding a compensating impurity. Therefore, it is possible to avoid the problem of deterioration in crystallinity, which is a problem in the conventional method.

It should be noted that the excellent properties relating to the insulating properties described above can be obtained widely in the main surface of the GaN crystal, that is, in the region of 60% or more of the main surface of the substrate 10 and, in some cases, in the region of 70% or more of the main surface. Can be This means that each of the concentrations of O and C is less than 1 × 10 ¹⁵ at / cm ^{3 in} a region of 60% or more of the main surface of the substrate 10 and, in some cases, in a region of 70% or more of the main surface. It is thought that it is due to having.

(D) The GaN crystal obtained in the present embodiment has a lower temperature dependency and is more stable than the insulation obtained by adding a compensating impurity into the crystal. This is because if a GaN crystal containing Si or O at a concentration of, for example, 1 × 10 ¹⁷ at / cm ³ or more and Fe is added at a concentration higher than those concentrations, an insulating property close to the GaN crystal of the present embodiment can be obtained. Is considered possible at first glance. However, since the level of Fe used as the compensating impurity is relatively shallow at about 0.6 eV, the insulation obtained by adding Fe has a higher temperature than the insulation of the GaN crystal of the present embodiment. There is a characteristic that it is apt to decrease with the above. On the other hand, according to the present embodiment, since the insulating property can be realized without adding the compensating impurities, it is possible to avoid the problem of increasing the temperature dependency, which is a problem in the conventional method. The GaN crystal obtained in the present embodiment has not only an electric resistivity of 1 × 10 ⁶ Ωcm or more under a temperature condition of 20 ° C. or more and 300 ° C. or less, but also a temperature condition of more than 300 ° C. and 400 ° C. or less. It has a high insulating property with an electric resistivity of 1 × 10 ⁵ Ωcm or more.

It should be noted that the excellent characteristics relating to the temperature dependence described above are widely observed in the main surface of the GaN crystal, that is, in the region of 60% or more of the main surface of the substrate 10, and in some cases in the region of 70% or more of the main surface. can get. This means that each of the concentrations of O and C is less than 1 × 10 ¹⁵ at / cm ^{3 in} a region of 60% or more of the main surface of the substrate 10 and, in some cases, in a region of 70% or more of the main surface. It is thought that it is due to having.

(E) Since the GaN crystal obtained in the present embodiment has high purity as described above, the crystal is converted into an n-type semiconductor by implanting Si ions, or the crystal is converted into a p-type semiconductor by implanting Mg ions. In such a case, the amount of implanted ions can be reduced. That is, the GaN crystal according to the present embodiment is a conventional GaN crystal containing more impurities such as Fe in that it is possible to impart desired semiconductor characteristics while minimizing deterioration of crystal quality due to ion implantation. Advantages over crystals. In addition, the GaN crystal of the present embodiment has a very low impurity concentration that causes carrier scattering, so that it is possible to avoid a decrease in carrier mobility. Advantages over crystals.

(F) In the reaction chamber 201, when at least a member constituting the high-temperature reaction region 201a is made of a heat-resistant material containing no O, such as SiC or graphite, GaN grown on the seed crystal substrate 20 O concentration in the crystal can be further reduced. Thereby, the quality of the GaN crystal can be further improved, and the insulating property can be further improved.

(G) In the reaction chamber 201, when at least a member constituting the high-temperature reaction region 201a is made of a C-free heat-resistant material such as alumina, a GaN crystal grown on the seed crystal substrate 20 Can be further reduced. This makes it possible to further improve the quality of the GaN crystal.

<Second embodiment of the present invention>
Next, a second embodiment of the present invention will be described, focusing on differences from the first embodiment.

The GaN crystal according to the present embodiment is similar to the first embodiment in that each concentration of Si, B, O and C in the crystal is less than 1 × 10 ¹⁵ at / cm ³ , but the Fe concentration is It is different from the first embodiment in that it is relatively large at 1 × 10 ¹⁶ at / cm ³ or more. The GaN crystal according to the first embodiment, which contains Fe at such a concentration, has an electric resistivity of 1 × 10 ⁷ Ωcm or more under a temperature condition of 20 ° C. to 300 ° C. It has greater insulation properties. Note that the Fe concentration can be, for example, a size of 1 × 10 ¹⁶ at / cm ³ or more and 1 × 10 ¹⁹ at / cm ³ or less. In this case, the electrical resistivity under a temperature condition of 20 ° C. or more and 300 ° C. or less is, for example, 1 × 10 ⁷ Ωcm or more and 5 × 10 ¹⁰ Ωcm or less. Note that the distribution of O and C in the main surface of the GaN crystal at each concentration shows the same tendency as those of the substrate 10 described in the first embodiment. The same applies to the distribution in the main surface relating to the insulating property and its temperature dependence.

The addition of Fe into the GaN crystal is performed by simultaneously supplying the source gas (GaCl gas + NH ₃ gas) and the Fe-containing gas such as Cp ₂ Fe gas from the gas supply pipe 232 c in the above-described crystal growth step. Can be performed. The partial pressure ratio of the Fe-containing gas to the group III source gas in the reaction vessel 203 (the partial pressure of the Fe-containing gas / the total partial pressure of the GaCl gas) can be, for example, 1/10 ⁶ to 1/100. . The use of a dopant gas is advantageous in that Fe can be added uniformly over the entire thickness direction of the GaN crystal, and that damage to the crystal surface can be easily avoided as compared with ion implantation described below.

Note that FeCl ₃ gas may be used instead of Cp ₂ Fe gas. FeCl ₃ gas, for example, can be generated by supplying a metallic iron placed in a high temperature region in the course of about 800 ° C. of the gas supply pipe 232c, here HCl gas. When using the FeCl ₃ gas instead of Cp ₂ Fe gas incorporation into the crystal of C component contained in the _Cp 2 Fe gas, i.e., it is advantageous in that easily avoid an increase in the C concentration in the GaN crystal.

Further, the addition of Fe to the GaN crystal can also be performed by obtaining the substrate 10 in the same manner as in the first embodiment and then implanting Fe ions into the substrate 10. The use of ion implantation is advantageous in that the C component contained in the Cp ₂ Fe gas is incorporated into the crystal, that is, an increase in the C concentration in the GaN crystal is easily avoided.

  In the GaN crystal obtained in the present embodiment, since the respective concentrations of Si, B, O and C in the crystal are extremely low similarly to the GaN crystal of the first embodiment, the conventional GaN crystal containing more of these impurities is used. It has better quality than crystals. Further, according to the present embodiment, by increasing the concentration of Fe in the GaN crystal as described above, it becomes possible to increase the insulating property as compared with the GaN crystal of the first embodiment.

<Third embodiment of the present invention>
Subsequently, a third embodiment of the present invention will be described focusing on differences from the first embodiment.

The GaN crystal according to the present embodiment is similar to the first embodiment in that each concentration of B, Fe, O, and C in the crystal is less than 1 × 10 ¹⁵ at / cm ³ , but the Si concentration is The difference from the first embodiment is that it is 1 × 10 ¹⁵ at / cm ³ or more. The GaN crystal in the present embodiment has a conductivity of 1 × 10 ² Ωcm or less under a temperature condition of 20 ° C. or more and 300 ° C. or less by containing Si at such a concentration, and is referred to as “n”. It functions as a type semiconductor crystal. Note that the Si concentration can be, for example, 1 × 10 ¹⁵ at / cm ³ or more and 5 × 10 ¹⁹ at / cm ³ or less. In this case, the n-type carrier concentration under the temperature condition of 20 ° C. or more and 300 ° C. or less becomes, for example, 1 × 10 ¹⁵ / cm ³ or more and 5 × 10 ¹⁹ / cm ³ or less, and the electric resistance under the same temperature condition The rate is, for example, 1 × 10 ⁻⁴ Ωcm or more and 100 Ωcm or less. Note that the distribution of O and C in the main surface of the GaN crystal at each concentration shows the same tendency as those of the substrate 10 described in the first embodiment. The same applies to the in-plane distribution of conductivity as an n-type semiconductor and its temperature dependence.

In the GaN crystal of the present embodiment, the Si concentration in the crystal and the n-type carrier concentration were almost equal. This means that the actual concentration of impurities other than Si (Fe or C for compensating n-type carriers or O serving as a donor) which is a source of carriers is extremely low. Compared with the minimum value of Si concentration of 1 × 10 ¹⁵ at / cm ^3, it shows that negligible amount is contained in the GaN crystal. That is, according to the SIMS measurement, the concentrations of B, Fe, O, and C are less than 10 ¹⁵ at / cm ³ , and the other impurities can be shown to be less than the lower detection limit, but the concentration of Si in the crystal is small. The results that were approximately equal to the n-type carrier concentration indicate that the actual concentration of these impurities was on the order of 10 ¹⁴ at / cm ³ or less.

The addition of Si into the GaN crystal is performed by simultaneously supplying a source gas (GaCl gas + NH ₃ gas) and a Si-containing gas such as SiH ₄ gas or SiH ₂ Cl ₂ to the seed crystal substrate 20 in the crystal growth step. It can be performed by supplying. The partial pressure ratio of the Si-containing gas to the group III source gas (the partial pressure of the Si-containing gas / the total partial pressure of the GaCl gas) in the reaction vessel 203 may be, for example, 1/10 ⁸ to 1/10 ^3. it can. Further, the addition of Si to the GaN crystal can also be performed by obtaining the substrate 10 in the same manner as in the first embodiment and then implanting Si ions into the substrate 10.

  In the GaN crystal obtained in the present embodiment, since the respective concentrations of B, Fe, O and C in the crystal are extremely low similarly to the GaN crystal of the first embodiment, the conventional GaN crystal containing more of these impurities is used. It will have better quality than crystals. Further, according to the present embodiment, since the impurity concentration of Fe or the like in the GaN crystal is low as described above, even if the addition amount of Si is suppressed to a low level, the GaN crystal has a desired conductivity (n-type semiconductor characteristics). ) Can be provided. That is, the GaN crystal according to the present embodiment can provide desired semiconductor characteristics while minimizing the deterioration of crystal quality due to the addition of Si, and is thus more versatile than the conventional GaN crystal containing more impurities such as Fe and C. It is advantageous. In addition, the GaN crystal of the present embodiment has a very low impurity concentration that causes carrier scattering, so that it is possible to avoid a decrease in carrier mobility. Advantages over crystals. It has also been confirmed that the same effect can be obtained when Ge is used instead of Si as the n-type dopant, or when both Si and Ge are used.

<Modification of Third Embodiment of the Present Invention>
In the third embodiment described above, the n-type carrier concentration can be set to 1 × 10 ¹⁴ to 1 × 10 ¹⁵ at / cm ³ by further reducing the amount of the Si-containing gas supplied in the crystal growth step. It is. However, in this case, since it is impossible to measure the Si concentration in the crystal, it can be said at present that the Si concentration is less than 1 × 10 ¹⁵ at / cm ³ . Also, Ge can be used instead of Si, or both Si and Ge can be used as the n-type dopant.

<Fourth embodiment of the present invention>
Subsequently, a fourth embodiment of the present invention will be described focusing on differences from the first embodiment.

The GaN crystal in the present embodiment is similar to the first embodiment in that each concentration of Si, B, Fe, O and C in the crystal is less than 1 × 10 ¹⁵ at / cm ³ , Is different from the first embodiment in that the concentration is 3 × 10 ¹⁸ at / cm ³ or more. The GaN crystal according to the present embodiment has a conductivity of less than 1 × 10 ² Ωcm under a temperature condition of not less than 20 ° C. and not more than 300 ° C. by containing Mg at such a concentration. It functions as a type semiconductor crystal. Note that the Mg concentration can be, for example, a size of 1 × 10 ¹⁷ at / cm ³ or more and 5 × 10 ²⁰ at / cm ³ or less. In this case, the p-type carrier concentration under a temperature condition of 20 ° C. or more and 300 ° C. or less is, for example, 5 × 10 ¹⁵ / cm ³ or more and 5 × 10 ¹⁸ / cm ³ or less, and the electric resistance under the same temperature condition The rate is, for example, 0.5 Ωcm or more and 100 Ωcm or less. Note that the distributions of O and C on the main surface of the GaN crystal at respective concentrations show substantially the same tendency as those of the substrate 10 described in the first embodiment. The same applies to the in-plane distribution of conductivity as a p-type semiconductor and its temperature dependence.

Mg is added to the GaN crystal by supplying an Mg-containing gas such as a Cp ₂ Mg gas to the seed crystal substrate 20 at the same time as the source gas (GaCl gas + NH ₃ gas) in the above-described crystal growth step. It can be carried out. The partial pressure ratio of the Mg-containing gas to the group III source gas in the reaction vessel 203 (the partial pressure of the Mg-containing gas / the total partial pressure of the GaCl gas) may be, for example, 1/10 ⁵ to 1/10 ^2. it can. The addition of Mg into the GaN crystal, in place of the _Cp 2 Mg gas and the like, may be used a gas containing magnesium nitride _(Mg 3 _{N 2)} or a metal Mg. These gases can generate vapors of these substances by, for example, placing Mg ₃ N ₂ or metallic Mg in a high temperature region of about 800 ° C. in the middle of the gas supply pipe 232c. Further, the addition of Mg to the GaN crystal can also be performed by obtaining the substrate 10 in the same manner as in the first embodiment and then implanting Mg ions into the substrate 10. As in the second embodiment, the use of a dopant gas is advantageous in that Mg can be added uniformly throughout the thickness direction of the GaN crystal, and that damage to the crystal surface due to ion implantation can be easily avoided. . In addition, when ion implantation is used, it is advantageous in that the C component contained in the Cp ₂ Mg gas is incorporated into the crystal, that is, an increase in the C concentration in the GaN crystal can be easily avoided.

  In the GaN crystal obtained in the present embodiment, since the respective concentrations of Si, B, Fe, O and C in the crystal are extremely low similarly to the GaN crystal of the first embodiment, a conventional GaN crystal containing more of these impurities is used. Has a better quality than the GaN crystal. Further, according to the present embodiment, since the concentration of impurities such as Si and O in the GaN crystal is low as described above, even if the addition amount of Mg is suppressed to a low level, the desired conductivity (p-type Semiconductor characteristics). That is, the GaN crystal according to the present embodiment can provide desired semiconductor characteristics while minimizing the deterioration of crystal quality due to the addition of Mg, and is thus more versatile than the conventional GaN crystal containing more impurities such as Si and O. It is advantageous. In addition, the GaN crystal of the present embodiment has a very low impurity concentration that causes carrier scattering, so that it is possible to avoid a decrease in carrier mobility. Advantages over crystals.

<Another embodiment of the present invention>
The embodiment of the invention has been specifically described above. However, the present invention is not limited to the above-described embodiment, and can be variously modified without departing from the gist thereof.

(A) The present invention is not limited to GaN. nitride crystal, _i.e., the composition formula of _{in x Al y Ga 1-x} -y N ( where, 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) are grown represented by crystals In this case, the method can be suitably applied.

(B) The crystal growth step of the present invention is not limited to the method described in the above embodiment, and it is also possible to use a combination of the following methods.

  For example, by optimizing the size and shape of the gas generator, the time during which the HCl gas stays (contacts) on the Ga melt is ensured longer (for example, 1 minute or more), and the impurity concentration contained in the GaCl gas is reduced. You may make it reduce further. Further, for example, a nanomask made of titanium nitride (TiN) or the like in which a large number of fine holes having an impurity capturing effect are formed may be formed on a seed crystal substrate, and a GaN crystal may be grown thereon. Further, for example, when the crystal growth on the seed crystal substrate proceeds, the growth period in a facet other than the c-plane where impurities are easily taken in may be shortened. When facet growth is performed on the seed crystal substrate as described above, the substrate 10 is obtained by growing a GaN layer thickly, separating the GaN layer from the seed crystal substrate, and removing the facet-grown crystal on the heterogeneous substrate side. Is preferred.

  According to the methods shown in the first to fourth embodiments, as described above, the impurity concentration in the GaN crystal can be significantly reduced by itself, but the auxiliary methods described here are further used in combination. This makes it possible to more reliably reduce the impurity concentration in the crystal. However, it is impossible to obtain the various effects shown in the above-described embodiment only by using these auxiliary methods in combination without performing the high-temperature baking step. In order to obtain the various effects shown in the above-described embodiment, it is essential to perform at least the high-temperature baking step in which the oxidation sequence and the etching sequence are alternately repeated under the above-described predetermined conditions.

(C) The GaN crystal obtained by the present invention is not limited to the case where the GaN crystal is configured as a substrate, but may be a crystal layer that forms a part of a semiconductor device.

  For example, the semi-insulating layer made of the semi-insulating crystal shown in the first and second embodiments, the n-type semiconductor layer made of the n-type semiconductor crystal shown in the third embodiment, and the semiconductor device shown in the fourth embodiment Various semiconductor devices can be manufactured by arbitrarily combining and laminating (joining) any one of the p-type semiconductor layers made of the p-type semiconductor crystal.

  Specifically, by manufacturing a laminated structure including a junction surface (pn junction surface) between the p-type semiconductor layer and the n-type semiconductor layer, the laminated structure can function as a pn junction diode. Further, by producing a laminated structure including a junction surface (Schottky junction surface) between one of the p-type semiconductor layer and the n-type semiconductor layer and a metal layer made of a metal, It can also function as a key barrier diode. When forming a p-type semiconductor layer or an n-type semiconductor layer, as described above, doping gas may be used to add Si or Mg into the crystal, or Si or Mg may be added to the semi-insulating layer. May be performed. Further, by ion-implanting Fe or C into the semi-insulating layer, the n-type semiconductor layer, and the p-type semiconductor layer shown in each of the above-described embodiments, these layers are interposed between elements formed on the substrate. Can also function as an element isolation layer (insulating layer) for insulating the above.

  When a semiconductor device is manufactured using the GaN crystal obtained by the present invention, the extremely low impurity concentration of the crystal makes it possible to significantly improve the characteristics of the semiconductor device. Further, since extremely low impurity concentration is widely realized in a region of 60% or more of the main surface of the crystal, and in some cases, in a region of 70% or more, the production yield of the semiconductor device is significantly improved. Becomes possible.

  Hereinafter, experimental results supporting the effects of the above-described embodiment will be described.

(Temperature dependence of electrical resistivity)
As samples 1 to 7, a GaN single crystal was grown to a thickness of 2 mm on a seed crystal substrate made of a GaN single crystal using the HVPE apparatus shown in FIG.

In order to confirm the effect of removing impurities, the reaction chamber 201 and the exchange chamber 202 were opened to the atmosphere before all the samples were grown. When producing samples 1 to 5, a high-temperature baking step in which an oxidation sequence and an etching sequence were alternately performed was performed before the crystal growth step was performed. The temperature conditions in the high-temperature baking step were 1600 ° C, 1500 ° C, 1500 ° C, 1400 ° C, and 1100 ° C in the order of samples 1 to 5. All pressure conditions were 1 atm. The partial pressure of the O ₂ gas was a predetermined condition within the processing condition range described in the first embodiment, and was a common condition throughout samples 1 to 5. Other processing conditions were within the processing conditions described in the first embodiment, and were common processing conditions for samples 1 to 5.

  When preparing Samples 6 and 7, the high-temperature baking step was not performed before the crystal growth step was performed. The other processing conditions were the same as those for producing Samples 1 to 5.

  In all of Samples 1 to 7, although the grown GaN crystal was grown on a mirror surface, in Samples 4 to 7 in which high-temperature baking at 1500 ° C. or higher was not performed, a slight crack was generated in the crystal. Regarding Samples 1 to 3 which had been subjected to a high-temperature bake at 1500 ° C. or higher, no crack was generated in the GaN crystal.

In the crystal growth step for producing Samples 1, 3 to 5, Fe was not added to the GaN crystal grown on the seed crystal substrate. On the other hand, in the crystal growth step for producing Samples 2, 6, and 7, Fe was added to the GaN crystal grown on the seed crystal substrate. The Fe concentrations in the GaN crystals in Samples 2, 6, and 7 were 1 × 10 ¹⁶ at / cm ³ , 1 × 10 ¹⁹ at / cm ³ , and 1 × 10 ¹⁸ at / cm ³ , respectively. Other processing conditions were within the processing conditions described in the first embodiment, and were common processing conditions for samples 1 to 7.

  Then, for each of the GaN crystals of Samples 1 to 7, the temperature dependence of the electrical resistivity was evaluated. FIG. 5 shows the evaluation results. The horizontal axis of FIG. 5 indicates the temperature (° C.) of the GaN crystal at the time of measuring the electric resistance, and the vertical axis indicates the electric resistivity (Ωcm) of the GaN crystal. In the figure, ◇, *, △, □, 、, ●, and ■ indicate the evaluation results of Samples 1 to 7, respectively.

According to FIG. 5, when the samples 1 to 5 are compared with each other, the sample (for example, samples 1 to 3) in which the temperature condition of the high-temperature bake step is set to a temperature of 1500 ° C. or more has a higher temperature condition of the high-temperature bake step. It can be seen that the sample exhibits a higher electrical resistivity, that is, a higher insulating property, under all temperature conditions than the sample set at a temperature lower than 1500 ° C. (for example, samples 4 and 5). Specifically, in samples 1 to 3, the electrical resistivity under a temperature condition of 20 ° C. or more and 300 ° C. or less is 1 × 10 ⁶ Ωcm or more, while in other samples, the electrical resistivity is the same. It can be seen that the electrical resistivity at less than 1 × 10 ⁶ Ωcm. In samples 1 to 3, the electrical resistivity under a temperature condition of more than 300 ° C. and 400 ° C. or less is 1 × 10 ⁵ Ωcm or more, while in other samples, the electrical resistivity under the same temperature condition is It can be seen that the electrical resistivity is less than 1 × 10 ⁵ Ωcm. These are considered to be because the concentrations of various impurities in the GaN crystal could be reduced by setting the temperature conditions during the high-temperature baking to the above-described conditions.

In addition, when comparing Samples 2 and 3, it can be seen that Sample 2 to which Fe was added exhibited higher insulating properties than Sample 3 to which addition of Fe was not performed. That is, when the temperature of the high-temperature bake step is set to the same level, the insulating property can be further enhanced by adding Fe at a concentration of 1 × 10 ¹⁶ at / cm ³ or more to the GaN crystal. You can see that. In other words, it can be seen that the same effect as in the case where the temperature conditions during the high-temperature baking are increased by adding Fe is obtained. In an additional experiment, the inventor set the Fe concentration to be 1 × 10 ¹⁶ at / cm ³ or more while setting each concentration of Si, B, O, and C in the GaN crystal to be less than 1 × 10 ¹⁵ at / cm ^3. When the concentration is 1 × 10 ¹⁹ at / cm ³ or less, the electrical resistivity of the GaN crystal under the temperature condition of 20 ° C. to 300 ° C. is, for example, 1 × 10 ⁸ Ωcm or more and 5 × 10 ¹⁰ Ωcm or less. It has been confirmed that the size increases to within the range of.

In addition, when comparing Samples 1 to 5 with Samples 6 and 7, Samples 1 to 5 that performed the high-temperature bake step including the oxidation sequence were better than Samples 6 and 7 that did not perform the high-temperature bake step. Also, it can be seen that the electrical resistivity is unlikely to decrease as the temperature rises, that is, the temperature dependence of the insulation is small. As in Samples 6 and 7, even if the insulating property under low temperature conditions is increased by adding Fe at a concentration of 1 × 10 ¹⁷ at / cm ³ or more, the insulating property decreases with increasing temperature. The reason for this is as described above. On the other hand, Samples 1 to 3 in which the temperature conditions during the high-temperature baking were set to 1500 ° C. or higher exhibited the same or higher insulating properties as Samples 6 and 7, and their temperature dependence was low and extremely stable. Becomes

  After being once released to the atmosphere, the crystal is not continuously released between the crystal growths, and the crystal is continuously and repeatedly repeated in the order of crystal growth → normal bake → crystal growth → normal bake. Growth was performed, and the same crystal growth was performed 30 to 50 times as described above, and the electrical characteristics were measured. As a result, almost the same results as described above were obtained. That is, once the high-temperature bake is performed, all the GaN crystals grown thereafter continue to exhibit a high electrical resistivity unless released to the atmosphere, while if the high-temperature bake is not performed after the release to the atmosphere, No matter how many times the growth and normal baking were repeated, the electrical resistivity remained low. The behavior at the time of doping with Fe also requires high-concentration Fe doping in order to enhance the insulating properties when high-temperature doping is not performed, in which case the electrical resistivity shows a relatively large temperature dependence. I understood. On the other hand, Samples 1 to 3 subjected to high-temperature baking at 1500 ° C. or more exhibit insulating properties similar to or higher than those of Samples 6 and 7, and their temperature dependence is low and extremely stable. Do you get it.

(Dependence of impurity concentration on baking temperature and atmosphere)
Subsequently, as the samples 8 to 16, a GaN single crystal was grown to a thickness of 5 mm on a seed crystal substrate having a diameter of 2 inches (5.08 cm) using the HVPE apparatus shown in FIG. In order to confirm the effect of impurity removal, the reaction chamber and the exchange chamber were opened to the atmosphere before growing all the samples.

  When fabricating Samples 8 to 11, before performing the crystal growth step, a high-temperature bake step is performed in which only an etching sequence is performed without performing an oxidation sequence, and then the seed crystal substrate is exposed without releasing the reaction chamber to the atmosphere. A GaN single crystal was grown thereon. The temperature conditions in the high-temperature baking step were 1100 ° C., 1400 ° C., 1500 ° C., and 1600 ° C. in the order of samples 8 to 11. All pressure conditions were 1 atm.

When producing the samples 12 to 16, before the crystal growth step is performed, the above-described high-temperature bake step in which the oxidation sequence and the etching sequence are alternately performed is performed, and then, the seed crystal is released without releasing the reaction chamber to the atmosphere. A GaN single crystal was grown on the substrate. The temperature conditions in the high-temperature baking step were 1100 ° C., 1400 ° C., 1500 ° C., 1550 ° C., and 1600 ° C. in the order of samples 12 to 16. All pressure conditions were 1 atm. The partial pressure of the O ₂ gas was a predetermined condition within the processing condition range described in the first embodiment, and was a common processing condition for the samples 12 to 16.

  In addition, as a sample 17, a GaN single crystal was grown on a seed crystal substrate using an HVPE apparatus in which the inner wall of a reaction vessel and the surfaces of members inside the reaction chamber were coated with pBN (pyrolytic boron nitride). When producing the sample 17, the above-described high-temperature baking step of alternately repeating the oxidation sequence and the etching sequence was not performed before the crystal growth step was performed.

  In the crystal growth step when fabricating Samples 8 to 17, addition of impurities such as Fe into the GaN crystal was not performed. Other processing conditions were within the processing condition range described in the first embodiment, and were common processing conditions for samples 8 to 17.

  After the crystal growth was completed, the impurity concentration of each of the GaN crystals of Samples 8 to 17 was evaluated using SIMS. Tables 1 to 3 show the results. The measurement methods (depth profiling or raster change) adopted by SIMS and the lower limit of detection are shown in order on the right end side of Tables 1 to 3. In each of the tables, DL indicates that the measurement result was below the lower limit of detection.

As shown in Tables 1 and 2, in Samples 8 and 12 in which the temperature condition during the high-temperature baking was 1100 ° C. and in Samples 9 and 13 in which the temperature condition during the high-temperature baking was 1400 ° C., the respective concentrations of B and Fe were measured. Can be respectively reduced, but the Si concentration reaches 2 × 10 ¹⁷ at / cm ³ , the O concentration reaches 5 × 10 ¹⁶ at / cm ³ , and the C concentration reaches 5 × 10 ¹⁶ at / cm ^3. Or had reached. In these samples which were not subjected to high-temperature baking at 1500 ° C. or higher, although the growth surface of the GaN crystal was a mirror surface, slight cracks were generated in the crystal due to the influence of impurities.

Further, as shown in Tables 1 and 2, in the GaN crystal of Sample 17, since the surfaces of the members in the reaction chamber were coated with pBN, although the respective concentrations of Sample Si and Fe could be respectively reduced, B was not increased. It was mixed at a concentration of 2 × 10 ¹⁶ at / cm ³ . In Sample 17, since the above-described high-temperature bake step of alternately repeating the oxidation sequence and the etching sequence was not performed, the respective concentrations of O and C each reached 1 × 10 ¹⁶ at / cm ^3. Was. In sample 17, although the growth surface of the GaN crystal was a mirror surface, many cracks were generated in the GaN crystal due to the influence of B and the like.

From these facts, a high-purity crystal in which all of Si, B, Fe, O and C have a low concentration, for example, each concentration of Si, B and Fe is less than 1 × 10 ¹⁵ at / cm ^3. And a high-purity crystal in which each of O and C has a concentration of less than 5 × 10 ¹⁵ at / cm ³ is obtained by the method of crystal growth disclosed in Patent Documents 1 to 3, It can be seen that it cannot be realized by simply combining a method of using a high-purity gas as a gas or a carrier gas or a method of coating the inner wall of the crystal growth furnace.

  Further, according to Tables 1 and 2, it can be seen that the higher the temperature conditions during the high-temperature baking, the lower the impurity concentration in the GaN crystal tends to be. Regarding the samples 10, 11, and 14 to 16 which were subjected to the high-temperature baking at 1500 ° C. or higher, no crack was generated in the GaN crystal, possibly due to the decrease in the impurity concentration.

However, in Samples 10 and 11 in which only the etching sequence was performed without performing the oxidation sequence in the high-temperature baking step, the respective concentrations of Si, B, and Fe were respectively lower than the lower detection limit (less than 1 × 10 ¹⁵ at / cm ^3). ), But the respective concentrations of O and C exceeded 1 × 10 ¹⁵ at / cm ³ , respectively. In contrast, at high temperature bake step, the samples 14 to 16 was repeated with oxidation sequence and etch sequence alternately, Si, B, O, both have the concentration of C and Fe less than the detection limit (1 × ^{10 15} at / cm ³ ).

From these facts, Si, B, Fe, in each concentration of O and C to grow a high-purity crystal, such as both less than 1 × ¹⁰ 15 at / cm ^3, in a high temperature baking step, the temperature conditions It can be seen that not only is it necessary to set the temperature to 1500 ° C. or higher, but it is necessary to alternately repeat the oxidation sequence and the etching sequence.

As an additional experiment, the thickness of the GaN crystal grown on the seed crystal substrate was increased to 8 mm. As a result, the influence of the impurity concentration was more remarkable. Specifically, when a processing procedure and processing conditions are adopted such that each concentration of B, Fe, O and C is less than 1 × 10 ¹⁵ at / cm ³ , that is, samples 14 to 16 are produced. No cracks were observed in any of the high-purity crystals grown under the same processing procedure and processing conditions. Using a diamond indenter having a tip diameter of several tens of nanometers, the hardness of each of these crystals exceeds 22.0 GPa by a nanoindentation method in which the maximum load is measured as a predetermined size within a range of 1 mN or more and 50 mN or less. I was

On the other hand, when a processing procedure and processing conditions in which at least one of the concentrations of B, Fe, O, and C exceeds 1 × 10 ¹⁵ at / cm ³ are adopted, that is, samples 8 to 13 , 17 were cracked in the high-purity crystals grown under the same processing procedure and processing conditions as in the case of manufacturing the same. This is presumably because the higher impurity concentration deteriorated the crystal and lowered the hardness of the crystal. Using a diamond indenter having a tip diameter of several tens of nanometers, the hardness of each of these crystals was 21.8 GPa or less by a nanoindentation method in which the maximum load was measured as a predetermined size within a range of 1 mN or more and 50 mN or less. there were.

If each of the concentrations of B, Fe, O, and C is less than 1 × 10 ¹⁵ at / cm ³ , Si is contained in the range of 1 × 10 ¹⁵ at / cm ³ to 1 × 10 ¹⁹ at / cm ³ . It was also confirmed that even when added in a concentration, the hardness of the GaN crystal was not significantly affected, that is, the generation of cracks could be suppressed. Using an indenter having a tip diameter of several tens of nanometers, the hardness of each of these crystals by a nanoindentation method in which the maximum load was measured as a predetermined size within a range of 1 mN or more and 50 mN or less exceeded 22.0 GPa. Was.

  After being once released to the atmosphere, the crystal is not continuously released between the crystal growths, and the crystal is continuously and repeatedly repeated in the order of crystal growth → normal bake → crystal growth → normal bake. Growth was performed, and the same crystal growth was performed 30 to 50 times as described above, and the electrical characteristics were measured. As a result, almost the same results as described above were obtained. That is, once the high-temperature bake is performed, all the GaN crystals grown thereafter maintain the impurity concentration lower than the lower detection limit, unless exposed to the atmosphere. In the method, the impurity concentration did not become lower than the lower limit of detection even if crystal growth and normal baking were repeated many times.

(In-plane distribution of impurity concentration)
With respect to Samples 8 to 16 described above, the in-plane distributions of the O concentration and the C concentration on the main surface of the GaN single crystal (substrate) grown on the seed crystal substrate were evaluated. Specifically, the raster change method is performed at a plurality of positions (center, positions ± 10 mm away from the center, and positions ± 20 mm away from the center in total) on the main surface of each crystal of Samples 8 to 16. O concentration and C concentration were measured respectively. The diameter of the seed crystal substrate is 2 inches (5.08 cm) as described above.

6 (a) and 7 (a) show the measurement results of the O concentration, and FIGS. 6 (b) and 7 (b) show the measurement results of the C concentration. FIG. 6 (a), the variation (%) shown in FIG. 7 (a), among the O concentration measured at five locations in the main surface, the maximum O 2 concentration ^{_{O MAX [at / cm 3]}} , the minimum _Is O _MIN [at / cm ³ ], and the average O concentration at five locations is O _AVE [at / cm ³ ], then {(O _MAX −O _MIN ) / O _AVE / 2 It is a value calculated by｝ × 100. Similarly, for the variations shown in FIGS. 6B and 7B, the maximum C concentration among the C concentrations measured at five locations on the main surface is C _MAX [at / cm ³ ], When the C concentration is C _MIN [at / cm ³ ] and the average C concentration at five locations is C _AVE [at / cm ³ ], {(C _MAX −C _MIN ) / C _AVE / 2} It is a value calculated by × 100.

As shown in FIGS. 6A and 6B, in the high-temperature baking step, in the samples 8 to 10 in which the baking temperature was set to 1500 ° C. or less and only the etching sequence was performed without performing the oxidation sequence, at any position of the main surface, it was not possible to each concentration of O and C in the crystal to less than ^{1 × 10 15 at / cm 3} . Further, in Sample 11 in which the baking temperature was set to 1600 ° C. and only the etching sequence was performed without performing the oxidation sequence, the concentration of O and C in the crystal was set to 1 × 10 ¹⁵ in a region within ± 10 mm from the center. although it was possible to at / cm less than ^3, in the region of ± 20 mm distant outer peripheral side from the center it could not be less than 1 × ¹⁰ 15 at / cm ^3. That is, when only the etching sequence is performed without performing the oxidation sequence in the high-temperature baking step, each concentration of O and C in the crystal is set to 1 × 10 ¹⁵ in the region of 60% or more of the main surface. It was found that it was impossible to make it less than at / cm ³ .

As shown in FIGS. 7A and 7B, in the high temperature baking step, the baking temperature was set to 1100 ° C., and the sample 12 in which the oxidation sequence and the etching sequence were alternately repeated, showed that O and C in the crystal were not changed. It was impossible to make each concentration less than 1 × 10 ¹⁵ at / cm ³ at any position on the main surface. In Sample 13, in which the baking temperature was set to 1400 ° C. and the oxidation sequence and the etching sequence were alternately repeated, the C concentration in the crystal could be reduced to less than 1 × 10 ¹⁵ at / cm ³ , It was impossible to make the O concentration less than 1 × 10 ¹⁵ at / cm ³ at any position on the main surface. That is, even when the oxidation sequence and the etching sequence are alternately repeated in the high-temperature baking step, if the baking temperature is set to a temperature of 1400 ° C. or less, the respective concentrations of O and C in the crystal are reduced to 60% of the main surface. It has been found that in any of the above-mentioned regions, it is impossible to make the concentration less than 1 × 10 ¹⁵ at / cm ³ . This is because although the oxidation sequence was performed in the high-temperature bake step, outgassing from members in the reaction vessel could be suppressed to some extent in the crystal growth step, impurities remained because the high-temperature bake step was performed at a relatively low temperature. It is probable that this was due to the influence.

As shown in FIGS. 7A and 7B, in the high-temperature baking step, the baking temperature was set to 1500 ° C. or more, and the samples 14 to 16 in which the oxidation sequence and the etching sequence were alternately repeated, had the main surface. In each position, the respective concentrations of O and C in the crystal were each less than 1 × 10 ¹⁵ at / cm ³ . In samples 15 and 16 in which the baking temperature was 1550 ° C. or higher, the O concentration in the crystal was lower than the detection lower limit of 5 × 10 ¹⁴ at / cm ³ at any position on the main surface, and the C concentration was lower. Was below the lower detection limit of 1 × 10 ¹⁴ at / cm ³ . As described above, in the high-temperature baking step, the baking temperature is set to a temperature of 1500 ° C. or higher, and the oxidation sequence and the etching sequence are alternately repeated, so that the respective concentrations of O and C in the crystal are reduced to 60% or more of the main surface. In the region, preferably in the region of 70% or more, more preferably in the region of 80% or more (the region of 90% or more in the present sample), it is possible to make each of them less than 1 × 10 ¹⁵ at / cm ^3. I understood that. This is presumably because the high-temperature baking step was performed under the above-described method and under the above-described conditions, and in the crystal growth step, outgas from members in the reaction vessel was significantly reduced.

<Preferred embodiment of the present invention>
Hereinafter, preferred embodiments of the present invention will be additionally described.

(Appendix 1)
According to one aspect of the present invention,
Composition formula of _{In x Al y Ga 1-x} -y N ( where, 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) A represented by crystals,
B in the crystal is less than 1 × 10 ¹⁵ at / cm ³ ,
A nitride crystal in which each concentration of O and C in the crystal is less than 1 × 10 ¹⁵ at / cm ^{3 in} a region of 60% or more, preferably 70% or more of the main surface of the crystal. Is provided.

(Appendix 2)
The crystal according to Supplementary Note 1, preferably,
Each concentration of Si and Fe in the crystal is less than 1 × 10 ¹⁵ at / cm ³ .

(Appendix 3)
The crystal according to Supplementary Note 2, preferably,
The electric resistivity under a temperature condition of 20 ° C. or more and 300 ° C. or less is 1 × 10 ⁶ Ωcm or more.

(Appendix 4)
The crystal according to Supplementary Note 1, preferably,
The Si concentration in the crystal is less than 1 × 10 ¹⁵ at / cm ³ , and the Fe concentration is 1 × 10 ¹⁶ at / cm ³ or more.

(Appendix 5)
The crystal according to Supplementary Note 4, wherein the electrical resistivity under a temperature condition of 20 ° C. or more and 300 ° C. or less is 1 × 10 ⁷ Ωcm or more.

(Appendix 6)
The crystal according to Supplementary Note 1, wherein the Fe concentration in the crystal is less than 1 × 10 ¹⁵ at / cm ³ , and the total concentration of Si or Ge or a combination thereof is 1 × 10 ¹⁵ at / cm ³ or more. Preferably, Si or Ge or the total concentration thereof is 5 × 10 ¹⁹ at / cm ³ or less.

(Appendix 7)
The crystal according to Supplementary Note 6, wherein the electrical resistivity under a temperature condition of 20 ° C. or more and 300 ° C. or less is 1 × 10 ² Ωcm or less. Preferably, the electrical resistivity at a temperature of above is 1 × 10 ^-4 Ωcm or more. More preferably, the n-type carrier concentration under the above-mentioned temperature condition is 1 × 10 ¹⁵ / cm ³ or more and 5 × 10 ¹⁹ / cm ³ or less.

(Appendix 8)
The crystal according to Supplementary Note 2, wherein the electrical resistivity under a temperature condition of 20 ° C. or more and 300 ° C. or less is 1 × 10 ² Ωcm or less. Preferably, the electrical resistivity under the above-mentioned temperature conditions is 1 × 10 ⁻⁴ Ωcm or more. More preferably, the n-type carrier concentration under the above-mentioned temperature conditions is 1 × 10 ¹⁴ / cm ³ or more and less than 1 × 10 ¹⁵ / cm ³ .

(Appendix 9)
The crystal according to Supplementary Note 2, wherein the Mg concentration in the crystal is 1 × 10 ¹⁷ at / cm ³ or more. Preferably, the Mg concentration in the crystal is 5 × 10 ²⁰ at / cm ³ or less.

(Appendix 10)
The crystal according to Supplementary Note 9, wherein the electrical resistivity under a temperature condition of 20 ° C. or more and 300 ° C. or less is 1 × 10 ² Ωcm or less. Preferably, the electrical resistivity under the above-mentioned temperature condition is 0.5 Ωcm or more and 100 Ωcm or less. Preferably, the p-type carrier concentration under the above temperature conditions is 2 × 10 ¹⁷ / cm ³ or more and 5 × 10 ¹⁸ / cm ³ or less.

(Appendix 11)
Composition formula of _{In x Al y Ga 1-x} -y N ( where, 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) A represented by crystals,
The hardness measured by the nanoindentation method in a range where the maximum load is 1 mN or more and 50 mN or less exceeds 22.0 GPa in a region of 60% or more of the main surface of the crystal, preferably in a region of 70% or more. A nitride crystal is provided.

(Appendix 12)
The crystal according to Supplementary Note 11, preferably,
The hardness measured by the nanoindentation method in the range where the maximum load is 1 mN or more and 50 mN or less is 22.5 GPa or more in a region of 60% or more of the main surface of the crystal.

(Appendix 13)
The crystal according to Supplementary Note 11 or 12, preferably,
The hardness measured by the nanoindentation method in a range where the maximum load is 1 mN or more and 50 mN or less is 23.2 GPa or more in a region of 60% or more of the main surface of the crystal.

(Appendix 14)
The crystal according to any one of Supplementary Notes 1 to 13, preferably,
Each concentration of O and C in the crystal is less than 5 × 10 ¹⁴ at / cm ^{3 in} a region of 60% or more of the main surface of the crystal, preferably in a region of 70% or more.

(Appendix 15)
The crystal according to any one of Supplementary Notes 1 to 13, preferably,
The O concentration in the crystal is less than 5 × 10 ¹⁴ at / cm ^{3 in} a region of 60% or more of the main surface of the crystal, preferably in a region of 70% or more, and the C concentration in the crystal is: It is less than 1 × 10 ¹⁴ at / cm ^{3 in} a region of 60% or more of the main surface of the crystal, preferably in a region of 70% or more.

(Appendix 16)
According to another aspect of the present invention,
Among the semi-insulating layer made of the crystal described in Supplementary Notes 2 to 5, the n-type semiconductor layer formed of the crystal described in any of Supplementary Notes 6 to 8, and the p-type semiconductor layer formed of the crystal described in Supplementary Note 9 or 11 , A semiconductor device having at least one of the layers is provided.

(Appendix 17)
The device according to claim 16, preferably comprising:
It has a junction surface (pn junction surface) between the p-type semiconductor layer and the n-type semiconductor layer, and functions as a pn junction diode.

(Appendix 18)
The device according to claim 16, preferably comprising:
It has a junction surface (Schottky junction surface) between one of the p-type semiconductor layer and the n-type semiconductor layer and a metal layer made of metal, and functions as a Schottky barrier diode.

(Appendix 19)
The device according to any one of supplementary notes 16 to 18, wherein
The semiconductor layer has a layer provided with predetermined semiconductor characteristics by ion implantation of Si or Mg into the semiconductor layer.

(Appendix 20)
20. The device according to any one of supplementary notes 16 to 19, wherein
The semiconductor device has a layer for insulating the elements by ion-implanting Fe or C into the semiconductor layer.

(Appendix 21)
According to another aspect of the present invention,
A plate-like nitride crystal comprising the crystal according to any one of Supplementary Notes 1 to 15, having a thickness of 250 μm or more, and having a diameter of 25 mm or more, preferably 50 mm or more is provided.

(Appendix 22)
According to another aspect of the present invention,
By loading a seed crystal substrate and a raw material containing a group III element into a reaction vessel, and supplying the raw material halide and a nitriding agent to the seed crystal substrate heated to a predetermined crystal growth temperature, A crystal growth step of growing a crystal of a nitride of the group III element on the seed crystal substrate,
Before performing the crystal growth step, a region of the reaction vessel that is heated to at least about the crystal growth temperature and is not partitioned from a region where the seed crystal substrate is loaded, and the seed crystal While the temperature of the high-temperature reaction region where the gas supplied to the substrate is likely to come into contact with the substrate is heated to a temperature of 1500 ° C. or more, the supply of the nitriding agent into the reaction container is not performed, and By performing the supply of hydrogen gas, a halogen-based gas, and an oxygen-containing gas, a high-temperature baking step of cleaning and reforming the surface of a member constituting the high-temperature reaction region is performed. Provided.

(Appendix 23)
The method according to Supplementary Note 22, wherein preferably,
As a member constituting the high-temperature reaction region, a member whose surface is made of a material containing no quartz and containing no boron is used.

(Appendix 24)
The method according to Supplementary Note 22 or 23, wherein preferably,
As a member constituting the high-temperature reaction region, a member whose surface is made of at least one of alumina, silicon carbide, graphite, and tantalum carbide is used.

(Appendix 25)
The method according to any of Supplementary Notes 22 to 24, wherein
In the high-temperature baking step, the pressure in the reaction vessel is maintained at a pressure of 0.5 to 2 atm. Preferably, in the high-temperature baking step, at least the temperature of the high-temperature reaction region in the reaction vessel is maintained at a temperature of 1500 ° C. or higher. Preferably, the high-temperature baking step is performed while exhausting the inside of the reaction vessel. Preferably, the high-temperature baking is performed for 30 minutes or more.

(Supplementary Note 26)
The method according to any of Supplementary Notes 22 to 25, wherein
In the high temperature baking step, an oxidation sequence for supplying an oxygen-containing gas and an inert gas into the reaction vessel and an etching sequence for supplying an etching gas and a hydrogen gas into the reaction vessel are alternately repeated.

(Appendix 27)
The method according to supplementary note 26, wherein
In the high-temperature baking step, the total of the execution times of the oxidation sequence and the etching sequence is 30 minutes or more (preferably 60 minutes or more, more preferably 120 minutes or more). In the high temperature baking step, the cycle of alternately performing the oxidation sequence and the etching sequence is performed twice or more (preferably 4 or more, more preferably 8 or more).

(Appendix 28)
The method according to Supplementary Note 26 or 27, wherein
In the oxidation sequence, the partial pressure of the oxygen-containing gas in the reaction vessel is set to a value within a range of 0.1% to 5% of the total partial pressure of gases other than the oxygen-containing gas including hydrogen gas and halogen gas. I do.

Reference Signs List 10 substrate 20 seed crystal substrate 21 GaN crystal film

Claims (12)

Composition formula of _{In x Al y Ga 1-x} -y N ( where, 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) A represented by crystals,
The concentration of B in the crystal is less than 1 × 10 ¹⁵ at / cm ³ ,
A nitride crystal in which each concentration of O and C in the crystal is less than 1 × 10 ¹⁵ at / cm ³ in a region of 60% or more of the main surface of the crystal. 2. The nitride crystal according to claim 1, wherein each concentration of Si and Fe in the crystal is less than 1 × 10 ¹⁵ at / cm ³ . 3. The nitride crystal according to claim 2, wherein an electrical resistivity under a temperature condition of 20 ° C. or more and 300 ° C. or less is 1 × 10 ⁶ Ωcm or more. 2. The nitride crystal according to claim 1, wherein a Si concentration in the crystal is less than 1 × 10 ¹⁵ at / cm ³ and an Fe concentration is 1 × 10 ¹⁶ at / cm ³ or more. 5. The nitride crystal according to claim 4, wherein an electrical resistivity under a temperature condition of 20 ° C. or more and 300 ° C. or less is 1 × 10 ⁷ Ωcm or more. 2. The nitride crystal according to claim 1, wherein an Fe concentration in the crystal is less than 1 × 10 ¹⁵ at / cm ³ and Si or Ge or a total concentration thereof is 1 × 10 ¹⁵ at / cm ³ or more. 7. The nitride crystal according to claim 6, wherein an electrical resistivity under a temperature condition of 20 ° C. or more and 300 ° C. or less is 1 × 10 ² Ωcm or less. 3. The nitride crystal according to claim ² , wherein an electrical resistivity under a temperature condition of 20 ° C. or more and 300 ° C. or less is 1 × 10 ² Ωcm or less. The nitride crystal according to claim 6, wherein the Mg concentration in the crystal is 1 × 10 ¹⁷ at / cm ³ or more. The nitride crystal according to claim 9, wherein the electrical resistivity under a temperature condition of 20 ° C or more and 300 ° C or less is 1 × 10 ² Ωcm or less. The concentration of O and C in the crystal is less than 5 × 10 ¹⁴ at / cm ³ in a region of 60% or more of the main surface of the crystal, any one of claims 1 to 10. Nitride crystal. O concentration in the crystal is less than 5 × 10 ¹⁴ at / cm ³ in a region of 60% or more of the main surface of the crystal;
The nitride crystal according to claim 1, wherein a C concentration in the crystal is less than 1 × 10 ¹⁴ at / cm ³ in a region of 60% or more of a main surface of the crystal.