JP2020017830A - High-speed differential transmission line formed at multilayer substrate - Google Patents

Abstract

To provide a wiring structure of a substrate, capable of uniquely setting differential impedance and in-phase impedance of a differential transmission line.SOLUTION: A wiring substrate 10 includes: a pair of signal lines 11a, 11b transmitting a differential signal; a first isolation layer 12; a first conductor pattern 13; a second isolation layer 14; and a second conductor pattern 15. The first conductor pattern 13 is disposed at a position facing the pair of signal lines. The second conductor pattern 15 is connected with the second isolation layer 14 and with the ground or a power supply, sandwiching the second isolation layer 14 therebetween. The pair of signal lines 11a, 11b, the first isolation layer 12, the first conductor pattern 13, the second isolation layer 14 and the second conductor pattern 15 are layered in this order.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a high-speed differential transmission line formed on a laminated substrate, which incorporates a common-mode signal removing filter function for passing a differential transmission signal and suppressing an undesirable common-mode signal in an ultra-high-speed differential transmission line. . Hereinafter, the “high-speed differential transmission line formed on the laminated substrate” may be referred to as a “wiring substrate”.

  The [IEE Std 802.3ba-2010] Ethernet standard (Ethernet is a registered trademark) capable of 40 G / 100 Gbps operation was approved by the Institute of Electrical and Electronics Engineers (IEEE) in June 2010, and is already in a practical stage. Also, PCI Express 4.0, which is the latest standard, has a data rate of 16 Gbps, which is twice as fast as 8 Gbps per lane of PCI Express Gen3, and achieves a system performance of 64 GB / sec in a 16-lane configuration. Furthermore, the next-generation PCI Express 5.0 aims at twice the transmission speed of PCI Express 4.0. As described above, the signal transmission speed keeps on increasing. On the other hand, since there is no change in the physical law of the transmission circuit responsible for communication, the technical difficulty only increases.

  The main factors that determine the operation limit of differential transmission communication using metal wiring are insertion loss and intra-pair skew. The insertion loss is related to the length of the transmission circuit and the dielectric loss. The intra-pair skew is a shift in the timing at which the differential signal waveform switches, and the allowable value decreases in inverse proportion to the transmission speed as shown in Table 1 below. The allowable value of the intra-pair skew requires that the difference (Sdd21-Scd21) between the insertion loss (Sdd21) of the differential signal and the ratio (Scd21) of the in-phase signal output when the differential signal is input is 12 dB or more. Is believed to be. The intra-pair skew that satisfies this condition needs to be 16% or less of the unit interval. Under this condition, the increase in insertion loss due to intra-pair skew is -0.3 dB or less regardless of the transmission speed.

  The allowable value of the intra-pair skew in Table 1 is an index for performing a stable operation, and even if the intra-pair skew exceeds the allowable value, communication is not immediately disabled. When the intra-pair skew becomes about 30% of the UI, the insertion loss increases by about 1 dB, which is considered to be the limit of operation.

  When the intra-pair skew becomes 50% or more of the UI, it becomes impossible to determine whether or not the differential signal is correct with the data of the UI width. Therefore, the limit that can be corrected by the method using the difference between the common-mode impedance and the differential impedance is 50% or less of the UI.

  The GND loop existing in the transmission path serves as a path for the in-phase signal component, and the in-phase signal component serves as a signal source to generate electromagnetic radiation (EMI). Eliminating the noise signal source and minimizing the GND loop are the key points for suppressing the occurrence of EMI.

  Conventionally, a common mode choke has been used to suppress skew within a pair and prevent EMI (see, for example, Patent Document 1). The common mode choke allows the differential signal component to pass without attenuating it, and increases the insertion loss by increasing the inductance for the common mode signal, thereby reducing the common mode signal component included in the differential transmission signal. Decay.

  Common mode chokes use a magnetic core to increase inductance, and their relative permeability is on the order of thousands. The phase velocity of a transmission line using a magnetic substance and a dielectric substance can be obtained by (Equation 1). From this equation, it can be seen that the phase velocity is reduced to 分 (the relative magnetic permeability × the relative permittivity) of the light velocity.

Vp = c / √ (μs × Er) (Equation 1)
Here, Vp = phase velocity (mm / s), c = light velocity in vacuum (3.3 ps / mm), μs = relative magnetic permeability, and Er = relative permittivity.

  Since the relative permeability of the magnetic material has a frequency characteristic, the phase velocity also has a frequency characteristic. The frequency characteristic of the phase velocity can be measured as a group delay characteristic (Group Delay) using a network analyzer.

  If the frequency characteristics of the group delay are not flat, the position of the rising edge / falling edge of the transmission waveform depends on the data pattern, resulting in intersymbol interference jitter and a reduction in the eye pattern opening area, which hinders signal transmission. Occurs.

  Manufacturers of common-mode chokes try to use materials and wiring structures that flatten the group delay characteristics. However, as long as a magnetic material is used, it is essentially impossible to flatten the group delay characteristic, and this becomes a particularly serious problem at a transmission speed of 10 Gbps or more.

  In order to suppress EMI, it is necessary to arrange a common mode choke on the signal entrance side of the transmission line, and to suppress skew in the pair on the receiving circuit side, on the signal exit side of the transmission line. If both are needed, the common mode choke must be placed in two places. In this case, the common mode choke itself has a relatively low loss, but if a loss such as a connection pattern is included, it is necessary to expect an insertion loss of about -2 to -3 dB per location in ultra-high-speed differential transmission.

  In order to mount a common mode choke, it is necessary to arrange a wiring pattern on a substrate surface layer. At this time, if a large number of differential signals need to be handled, a large substrate surface area is occupied.

  In a backplane for interconnecting a plurality of circuit boards, many differential transmission wirings are arranged in an inner layer. Incorporating a surface-mount type common mode choke into the differential transmission line located in the inner layer requires the addition of through holes for interlayer connection and component mounting pads on the surface layer, which consumes board area. However, there is a problem that the transmission characteristics are deteriorated.

JP 2005-64976 A JP 2012-227887 A JP 2011-71710 A

Wei Zhuang, Yongrong Shi, Wanchun Tang and Yafei Dai, “Common-Mode Suppression Design for Gigahertz Differential Signals Based on C-Slot line”, Progress In Electromagnetics Research C, Vol. 61, page 17-26, 2016 Jordi Naqui, Armando Fernandez-Prieto, Miguel Duran-Sindreu, Francisco Mesa, Jesus Martel, Francisco Medina, and Ferran Martin, “Common-Mode Suppression in Micro strip Differential Lines by Means of Complementary Split Ring Resonators: Theory and Applications”, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL.60, NO.10, OCTOBER 2012

<Functions required for common-mode rejection filter installed in differential transmission wiring>
(1) Applicability to differential transmission wiring arranged in an inner layer.
(2) There is no cutoff frequency and high-speed transmission is possible.
(3) Only in-phase signal components can be removed without increasing insertion loss for differential signals.
(4) Have a flat count delay characteristic.
(5) It can be mounted with a minimum board area.
(6) It can be manufactured stably without requiring a special process.

  Therefore, a main object of the present invention is to realize a wiring structure of a substrate that can independently set the differential impedance and the common-mode impedance of a differential transmission line.

  The wiring board according to the present invention, a pair of signal lines for transmitting differential signals, a first insulating layer, and a second conductor pattern connected to a ground or a power supply disposed at a position facing the pair of signal lines In addition, at least at a position opposed to the pair of signal lines with the first insulating layer interposed therebetween, a first conductor pattern that is not physically connected to anywhere such as the second conductor pattern is arranged in an arbitrary layer. .

The present invention is characterized in that a first conductor pattern that is not physically connected to any part is provided at a position facing a pair of differential transmission lines. By utilizing the phenomenon that the first conductor pattern affects the differential impedance but not the common-mode impedance, it is possible to independently set the differential impedance and the common-mode impedance of the differential transmission line.
In the present invention, the differential impedance is determined by the thickness of the first insulating layer separating the pair of differential transmission lines and the first conductor pattern, and the self-inductance and mutual inductance of the differential transmission lines. The common-mode impedance is determined by the thickness of the second insulating layer separating the pair of differential transmission lines and the second conductor pattern connected to the ground or the power supply, and the self-inductance of the differential transmission lines.

  In the present invention, the differential impedance of the transmission circuit is made to match the characteristic impedance of the drive circuit to reduce transmission loss due to impedance mismatch, while the common-mode impedance is significantly larger than the characteristic impedance of the transmission line. Can increase the insertion loss with respect to the in-phase signal. This completes the incorporation of the in-phase signal removal filter function into the high-speed differential transmission line using only the printed circuit board wiring.

FIG. 2 is an exploded perspective view illustrating the wiring board according to the first embodiment. It is a figure which expands and shows the II-II line | wire cross section in FIG. FIG. 3 is a diagram illustrating the operation principle of differential transmission according to the first embodiment. 6 is a graph showing characteristic impedances obtained by simulation for a specific example of the first embodiment. FIG. 9 is an exploded perspective view illustrating a wiring board according to a second embodiment. It is a figure which expands and shows the VI-VI line | wire cross section in FIG. 9 is a graph showing characteristic impedances obtained by simulation for a specific example of the second embodiment. FIG. 9 is an exploded perspective view illustrating a wiring board according to a third embodiment. FIG. 9 is an enlarged view showing a cross section taken along line IX-IX in FIG. 8. FIG. 9 is an enlarged view showing a cross section taken along line XX in FIG. 8. 14 is a graph illustrating characteristic impedances obtained by simulation for a specific example of the third embodiment. FIG. 13 is an exploded perspective view illustrating a wiring board according to a fourth embodiment. FIG. 13 is an enlarged view showing a cross section taken along line XIII-XIII in FIG. 12. FIG. 13 is an enlarged view showing a cross section taken along line XIV-XIV in FIG. 12. 21 is a graph illustrating characteristic impedances obtained by simulation for a specific example of the fourth embodiment. 4 is a graph showing impedance characteristics of the wiring board of the first embodiment and the wiring board of the related art by actual measurement. 6 is a graph showing the measured differential signal insertion loss and the in-phase signal insertion of the wiring board of the first embodiment and the wiring board of the conventional technique. 4 is a graph showing the measured common-mode signal removal performance of the wiring board of Embodiment 1 and the wiring board of the related art. FIG. 9 is a diagram for explaining the operation principle (part 1) of differential transmission in the related art. FIG. 9 is a diagram for explaining an operation principle (part 2) of a differential signal in the related art.

  First, the outline of the present invention will be described. Hereinafter, “GND” is an abbreviation for ground, and “FP” is an abbreviation for floating plate.

  Non-Patent Document 2 discloses a technique in which a common mode filter is configured by using a split ring resonator (CSRR) type filter by partially cutting out a GND plane. However, this is different from the method of adding the FP pattern used in the present invention, in which it is not possible to obtain the common-mode signal removal performance over a wide frequency range.

  The GND plane of the conventional differential transmission signal has a role as an impedance plane for the differential signal and a role as a mirror current path for the in-phase signal component. On the other hand, the present invention provides an FP pattern that functions as an impedance plane for a differential signal component, and sets the role of the GND plane as a mirror current path for the in-phase signal component, so that the differential impedance and the in-phase impedance are reduced. Each is controlled independently.

  Whether the FP pattern is connected to GND or not, the differential impedance does not change. Therefore, the differential impedance can be calculated in the same manner as in the prior art. This fact can be confirmed by actual measurement.

  The common-mode impedance is determined by the distance from the layer on which the signal lines are arranged to the GND plane or the power plane, the dielectric constant of the base material, and the like. If the dielectric layer sandwiched between the GND plane or the power plane and the differential transmission section is made thicker, the common-mode impedance increases. In this configuration, the position of the GND plane or the power plane hardly affects the differential impedance. This fact can be confirmed by actual measurement.

  With the above structure, only the common mode impedance can be increased by changing the structure of the impedance plane without changing the wiring pattern of the signal line in the conventional differential transmission wiring. That is, the present invention provides a structure of a wiring pattern constituting a common-mode signal removal filter using only wiring on a substrate without using chip parts or the like.

  When the common-mode impedance is increased, a part of the common-mode signal is reflected at the entrance and the exit of the transmission line due to the mismatch of the common-mode impedance, so that the insertion loss of the common-mode signal component increases. The reflection amount of the in-phase signal is measured as Scc11 by the network analyzer, and the insertion loss of the in-phase signal is measured as Scc21.

  Hereinafter, embodiments for implementing the present invention (hereinafter, referred to as “embodiments”) will be described with reference to the accompanying drawings. In the specification and the drawings, substantially the same components will be denoted by the same reference characters, without redundant description. The shapes described in the drawings are drawn so as to be easily understood by those skilled in the art, and do not always correspond to actual dimensions and ratios.

<First embodiment>
FIG. 1 is an exploded perspective view showing the wiring board of the first embodiment. FIG. 2 is an enlarged view showing a cross section taken along line II-II in FIG. 1 and shows a state in which the layers in FIG. 1 are stacked.

  As shown in FIGS. 1 and 2, the wiring board 10 of the first embodiment includes a pair of signal lines (11a, 11b) for transmitting a differential signal, a first insulating layer (12), and a pair of signal lines. (11a, 11b), a first conductor pattern (13) which is not physically connected to any part, a second insulating layer (14), and a ground or power supply with the second insulating layer (14) interposed therebetween. And a second conductor pattern (15) connected to the first conductor pattern (15), a pair of signal lines (11a, 11b), a first insulation layer (12), a first conductor pattern (13), a second insulation layer (14), and , A second conductor pattern (15). The wiring board 10 includes a pair of signal lines (11a, 11b), a first insulating layer (12), a first conductive pattern (13), a second insulating layer (14), and a second conductive pattern (15). Are laminated in this order.

  In the first embodiment, the transmission lines (11a, 11b) are an example of a “pair of signal lines”, the insulating layer (12) is an example of a “first insulating layer”, and the FP pattern ( 13), an insulating layer (14) as an example of the "second insulating layer", and a GND plane (15) connected to the ground potential as an example of the "second conductor pattern" are taken up. The transmission lines (11a, 11b) are formed in the signal layer (11).

  In other words, the FP pattern (13) is formed on the entire lower surface of the insulating layer (12) and the upper surface of the insulating layer 14, and the GND plane (15) is formed on the entire lower surface of the insulating layer (14). The material of each layer of the wiring board (10) conforms to those of a general wiring board or a multilayer wiring board. The method for manufacturing the wiring board (10) conforms to a general method for manufacturing a wiring board or a multilayer wiring board. The wiring board (10) has an in-phase signal elimination filter function formed of a microstrip line. The transmission lines (11a, 11b) may be a plurality of pairs, or each layer of the wiring board (10) may be composed of a plurality of layers.

  The material of the insulating layer of the wiring board (10) is, for example, a synthetic resin or a ceramic. Examples of the synthetic resin include a glass epoxy resin, a glass polyimide resin, and a fluororesin. The conductor of the wiring board (10) is, for example, a metal foil, and a more specific example is a copper foil. Here, an example of a method for manufacturing a wiring board (10) made of glass epoxy resin and copper foil will be described. First, an epoxy resin precursor is impregnated into a substrate made of glass fiber, and the epoxy resin precursor is thermally cured at a predetermined temperature to obtain an insulating layer. The conductor pattern is formed by transferring a copper foil processed into a predetermined shape onto a resin sheet made of a glass epoxy resin, laminating the resin sheet to which the copper foil has been transferred, and bonding the resin sheet with an adhesive. Further, a metal is applied to the inner surface of the through hole formed in the resin sheet by printing or plating a conductive paste, or the metal is filled in the through hole. Such a conductor is formed, for example, by integrating a metal foil or a metal pillar by resin molding, or by attaching the metal foil or the metal pillar using a sputtering method, an evaporation method, or the like.

  In the first embodiment, the arrangement of the GND plane (15) is a factor for determining the common-mode impedance. Although the GND plane (15) is used after the circuit configuration, it is not always necessary to form the GND plane (15) on a substrate, and a shield box or the like may be used as a GND return. Further, “not physically connected to anywhere” may be rephrased as “not electrically connected to anywhere”, “not physically electrically connected to anywhere”, or “electrically floating”.

  Next, the operation principle of the differential transmission in the related art will be described, and then the operation principle of the differential transmission in the first embodiment will be described.

  FIG. 19 shows signal propagation in differential transmission of the prior art. In FIG. 19, the signal is transmitted in the order of the transmission end (51) → the transmission side driver (52) → the transmission line (11a, 11b) → the reception side receiver (53) → the reception end (54).

  The transmitting-side driver (52) receiving the input signal at the transmitting end (51) transmits the differential signals (59a, 59b) having the same waveform switching timing and inverted polarities to the transmission paths (11a, 11b), respectively. introduce. The transmission lines (11a, 11b) are arranged close to each other and are electromagnetically coupled. A magnetic field (55) is excited around the transmission line (11a, 11b) by a current flowing through the transmission line (11a, 11b), and an electric field (56, 57) is excited by the excited magnetic field (55). 55, 56, 57) propagate along the transmission lines (11a, 11b) (58). The in-phase signal component (57) of the generated electromagnetic field excites a mirror current (60) having a polarity opposite to the current flowing through the transmission lines (11a, 11b) into the GND plane (15).

  Since the differential signal (59a, 59b) can transmit a signal by electromagnetic coupling between the transmission lines (11a, 11b), transmission is possible without the GND plane (15). (However, GND wiring is required). In the absence of the GND plane (15), the GND inductance connecting between the transmitting driver (52) and the receiving receiver (53) increases, and the common-mode impedance becomes several hundred Ω or more.

  The differential impedance of the transmission lines (11a, 11b) is determined by electromagnetic coupling between the transmission lines (11a, 11b) and the GND plane (15). The mirror current for the differential signal component flowing through the transmission paths (11a, 11b) cancels out on the surface of the GND plane (15). On the other hand, for the in-phase signal component flowing through the transmission lines (11a, 11b), the mirror current (60) having the opposite polarity flows through the GND plane (15), so that the current in the closed circuit becomes zero. Satisfies Kirchhoff's law.

  FIG. 20 shows a relationship between a signal current and a mirror current and a relationship between a differential signal component and an in-phase signal component in differential transmission of the related art. The signal is transmitted from the transmission path input terminals (61a, 61b) → the transmission path (11a, 11b) → the transmission path output terminals (62a, 62b). In FIG. 20, the switching timing of the waveform of the differential signal (59a) and the waveform of the differential signal (59b) are shifted and displayed. At this time, the difference between the differential signal (59a) and the differential signal (59b) becomes the waveform of the differential signal component (63), and the sum of the differential signal (59a) and the differential signal (59b) is the same. The waveform of the phase signal component (64) is obtained, and the mirror current (60) has the opposite polarity.

  FIG. 3 shows the relationship between the signal current and the mirror current and the relationship between the differential signal component and the in-phase signal component in the differential transmission according to the first embodiment. First, the FP pattern (13) is installed at a position facing the transmission path (11a, 11b). Then, a predetermined differential impedance is determined by adjusting the thickness of the insulating layer between the transmission line (11a, 11b) and the FP pattern (13). The common-mode impedance is set independently of the differential impedance by adjusting the thickness of the insulating layer between the transmission lines (11a, 11b) and the GND plane (15). The mirror current with respect to the electric field (56) of the differential signal component flowing through the transmission lines (11a, 11b) cancels out on the surface of the FP pattern (13). With respect to the electric field (57) of the in-phase signal component flowing through the transmission lines (11a, 11b), a mirror current (60) having the opposite polarity flows through the GND plane (15), so that the current in the closed circuit becomes zero. And satisfies Kirchhoff's law.

  Since the FP pattern (13) is not connected anywhere, the internal electric field of the FP pattern (13) is forced to zero by free electrons in the metal. This does not mean that the internal electric field disappears, but that the metal is filled with an extremely strong electric field having a gradient of zero. Therefore, no current flows in the FP pattern (13), and the FP pattern (13) does not interact with the electromagnetic field generated by the in-phase signal components on the transmission lines (11a, 11b). Since the thickness of the FP pattern (13) is very thin compared to the wavelength of the signal, the electric field (57) of the in-phase signal component transmits through the FP pattern (13) in the same manner as light passes through the aluminum foil. The transmitted electric field (57) of the in-phase signal component reaches the GND plane 15 and excites the mirror current (60). As a result, the common-mode impedance is determined by the self-inductance of the transmission lines (11a, 11b) and the capacitance between the transmission lines (11a, 11b) and the GND plane (15).

  Next, the first embodiment will be described with a more specific example based on the operation principle described in FIG.

  As shown in FIGS. 1 and 2, the FP is placed at a position facing the signal layer (11) where the transmission lines (11 a and 11 b) are arranged (the position where the GND plane is conventionally arranged) with the insulating layer (12) interposed therebetween. The pattern (13) is set. Then, a GND plane (15) is arranged outside the FP pattern (13) with the insulating layer (14) interposed therebetween. By selecting the thickness of the insulating layers (12, 14), the differential impedance and the common mode impedance of the transmission lines (11a, 11b) are individually controlled, the differential impedance is set to a predetermined value, and the common mode impedance is set to the difference. It is set to be larger than the dynamic impedance.

  Since there are many methods for wiring the transmission lines (11a, 11b) to the substrate, an actual design method will be described using a typical example.

  Here, a method of expressing the common-mode impedance will be described. The in-phase impedance notation in the present specification indicates the sum of the impedances of two transmission lines. In this notation method, when the impedance of the single-ended operation of each differential signal line without electromagnetic coupling is 50Ω, both the in-phase impedance and the differential impedance are 100Ω. With this notation method, the differential impedance and the in-phase impedance can be directly compared, and it is easy to understand intuitively.

  In a general notation method, a method of calculating a common-mode impedance assuming that two signal lines are connected in parallel is used. In this notation, when the impedance of the single-ended operation of each differential signal line without electromagnetic coupling is 50Ω, the differential impedance is 100Ω and the common-mode impedance is 25Ω. This is a notation used in vector network analyzer (VNA) measuring instruments.

An example of a method for designing the wiring board (10) will be described below.
○ A differential transmission line consisting of a microstrip is used.
The transmission lines (11a, 11b) are arranged on the surface of the insulating layer (12).
○ The FP pattern (13) is arranged with the insulating layer (12) interposed therebetween.
The FP pattern (13) is in a floating state where it is not physically connected to any part.
○ Further, a GND plane (15) is arranged with the insulating layer (14) interposed therebetween.

  FIG. 4 is a graph showing a characteristic impedance by simulation of a specific example of the first embodiment. The wiring board (10) is a microstrip line having a common-mode removal filter function mounted thereon, and a simulation model was created as follows.

  The parameters shown in FIG. 1 were W = 0.08 mm, t = 0.035 mm, H1 = 0.2 mm, H2 = 0.2 mm, Gap = 0.18 mm, and L = 15 mm. Here, W is the width of the transmission line (11a, 11b), t is the thickness of the transmission line (11a, 11b), H1 is the thickness of the insulating layer (12), H2 is the thickness of the insulating layer (14), and Gap is the transmission. The gap L between the paths (11a, 11b) is the length of the transmission path (11a, 11b). The relative permittivity (Er) of the insulating layers (12, 14) was 4.3.

  FIG. 4 shows a simulation result of the TDR (Time Domain Reflectometry) method. The horizontal axis represents time (ns), the vertical axis represents impedance (Ω), the solid line represents differential impedance, and the broken line represents in-phase impedance. As is clear from FIG. 4, the common-mode impedance is considerably larger than the differential impedance, and it can be confirmed that the common-mode removing filter function can be implemented in the microstrip line.

<Embodiment 2>
FIG. 5 is an exploded perspective view showing the wiring board according to the second embodiment. FIG. 6 is an enlarged view showing a cross section taken along the line VI-VI in FIG. 5 and shows a state in which the layers in FIG. 5 are stacked.

  As shown in FIGS. 5 and 6, the wiring board (20) of the second embodiment includes a pair of signal lines (21a, 21b) for transmitting a differential signal, a first insulating layer (22, 27), A first conductor pattern (23, 26) which is arranged at a position facing the pair of signal lines (21a, 21b) and is not physically connected to anywhere, a second insulating layer (24), and a second insulating layer (24) A second conductor pattern (25) connected to a ground or a power supply with a pair of signal lines (21a, 21b), a first insulating layer (22, 27), and a first conductor pattern (23, 26) interposed therebetween. , A second insulating layer (24), and a second conductor pattern (25). The wiring board 20 has first and second conductive patterns (23, 26) and first and second insulating layers (22, 27). A first conductive pattern (26), a first first insulating layer (27), a pair of signal lines (21a, 21b), a second first insulating layer (22), and a second first conductive pattern ( 23), a second insulating layer (24), and a second conductor pattern (25) are laminated in this order.

  In the second embodiment, the transmission path (21a, 21b) is an example of a “pair of signal lines”, the insulation layer (22) is an example of a “second first insulation layer”, and the “second first conductor pattern”. FP pattern (23) as an example, an insulating layer (24) as an example of a "second insulating layer", a GND plane (25) connected to ground potential as an example of a "second conductor pattern", The FP pattern (26) is taken as an example of the "first conductor pattern", and the insulating layer (27) is taken as an example of the "first second insulating layer". The transmission paths (21a, 21b) are formed in the signal layer (21).

  In other words, the FP pattern (26) is formed on the entire upper surface of the insulating layer (27), and the FP pattern (23) is formed on the entire lower surface of the insulating layer (22) and the entire upper surface of the insulating layer (24). A GND plane (25) is formed on the entire lower surface of the insulating layer (24). The material of each layer of the wiring board 20 conforms to those of a general wiring board or a multilayer wiring board. The method for manufacturing the wiring board 20 conforms to the method for manufacturing a general wiring board or a multilayer wiring board. The wiring board 20 has an in-phase signal elimination filter function formed of a strip line. The transmission paths (21a, 21b) may be a plurality of pairs, and each layer of the wiring board (20) may be composed of a plurality of layers.

An example of a method for designing the wiring board 20 will be described below.
○ It is a differential transmission line whose entire length is a strip line.
The FP patterns (23, 26) are arranged on both sides of the transmission paths (21a, 21b) with the insulating layers (22, 27) interposed therebetween.
The FP pattern (23, 26) is in a floating state not physically connected to any part.
The GND plane (25) is arranged on the insulating layer (24) with respect to the FP pattern (23).

  FIG. 7 is a graph showing a characteristic impedance by simulation of a specific example of the second embodiment. The wiring board (20) has a common mode removal filter function mounted on a strip line, and a simulation model thereof is created as follows. The parameters shown in FIG. 5 were W = 0.08 mm, t = 0.035 mm, H1 = H2 == H3 = 0.2 mm, Gap = 0.36 mm, and L = 15 mm. Here, W is the width of the transmission path (21a, 21b), t is the thickness of the transmission path (21a, 21b), H1 is the thickness of the insulating layer (27), H2 is the thickness of the insulating layer (22), and H3 is the insulating layer. The thickness of the layer (24), Gap is the distance between the transmission paths (21a, 21b), and L is the length of the transmission paths (21a, 21b). The relative permittivity (Er) of the insulating layers (22, 24, 27) was 4.3.

  FIG. 7 is a simulation result of the TDR method, in which the horizontal axis represents time (ns), the vertical axis represents impedance (Ω), the solid line represents differential impedance, and the broken line represents in-phase impedance. As is clear from FIG. 7, the common-mode impedance is considerably larger than the differential impedance, and it can be confirmed that the common-mode removal filter function can be implemented on the stripline. Other configurations, operations, and effects of the second embodiment are the same as those of the first embodiment.

<Embodiment 3>
FIG. 8 is an exploded perspective view showing the wiring board of the third embodiment. FIG. 9 is an enlarged view showing a cross section taken along line IX-IX in FIG. FIG. 10 is an enlarged view showing a cross section taken along line XX in FIG. 9 and 10 show a state in which the layers in FIG. 8 are stacked.

  As shown in FIGS. 8 to 10, the wiring board (30) of the third embodiment includes a pair of signal lines (31a, 31b) for transmitting a differential signal and a first insulating layer (32) for determining a differential impedance. ), A second insulating layer (34), a first conductor pattern (33) disposed at a position facing the pair of signal lines (31a, 31b) and not physically connected to any part, and a first insulating layer (32). And two sets of second conductor patterns (35, 37) and a second insulating layer (34, 36) that are connected to ground or a power supply.

Layer (31) on which a pair of signal lines (31a, 31b) are arranged, first insulating layer (32), first second conductor pattern (35), first second insulating layer (34), first conductive layer The pattern (33), the second second insulating layer (36), and the second second conductor pattern (37) are laminated in this order.

Both ends (311 and 312) of the pair of signal lines (31a and 31b) of the wiring board 30 are non-coupled differential wirings, and a central part (313) is a coupled differential wiring. The first and second second conductor patterns (35, 37) are provided with holes (351, 371) in portions facing the central portions (313) of the pair of signal lines (31a, 31b). A first conductor pattern (33) having the same shape as the hole is placed at a position facing the hole. Each layer of the wiring board (30) is divided into a central portion (321) and a peripheral portion (322) surrounding the central portion (321) in plan view.

  The transmission paths (31a, 31b) are formed in the signal layer (31) together with the GND connection pattern (31c). The wiring board (30) has two through-holes (38) formed at four corners thereof. The GND connection pattern (31c) and the GND planes (35, 37) are electrically connected by the through through holes (38). The wiring board (30) is accommodated in the shield box (39), and the GND connection pattern (31c) and the shield box (39) are electrically connected.

The in-phase impedance and the differential impedance of the impedance of the peripheral portions (311 and 312) of the pair of signal lines (31a and 31b) are determined by the line width (W) of the signal lines and the thickness of the first insulating layer (32).

The differential impedance of the central portion (313) is the sum of the distance (Gap1) between the pair of signal lines (31a, 31b), the thickness of the first insulating layer (32), and the thickness of the first second insulating layer (34) ( H1 + H2). As the interval (Gap1) becomes closer, the degree of electromagnetic coupling increases, and the differential impedance decreases. As the insulating layer becomes thicker, the capacitance decreases and the differential impedance increases.

The outer shield box (39) functions as an impedance plane for an in-phase signal component with respect to the central portion (313) of the pair of signal lines (31a, 31b).

  In the third embodiment, the transmission path (31a, 31b) is an example of a “pair of signal lines”, the insulating layer (32) is an example of a “first insulating layer”, and the FP pattern is an example of a “first conductor pattern”. 33), an insulating layer (34) as an example of a "first second insulating layer", a GND plane (35) connected to a ground potential as an example of a "first second conductor pattern", a "second An insulating layer (36) is taken as an example of the "second insulating layer", and a GND plane (37) connected to the ground potential is taken as an example of the "second second conductor pattern".

The material of each layer of the wiring board (30) conforms to those of a general wiring board or a multilayer wiring board. The method for manufacturing the wiring board (30) conforms to a general method for manufacturing a wiring board or a multilayer wiring board. The wiring board (30) has a wiring configuration in which non-coupled differential transmission paths and coupled differential transmission paths coexist, and has an in-phase signal removal filter function. The transmission paths (31a, 31b) may be a plurality of pairs, and each layer of the wiring board (30) may be composed of a plurality of layers.

An example of a method for designing the wiring board 30 will be described below.
○ A differential transmission line consisting of microstrip lines.
In the transmission lines (31a, 31b), the line distance between both end portions (311, 312) is increased, and the line distance between the intermediate portions (313) is reduced.
The line width W of the transmission path (31a, 31b) is kept constant over the entire length.
○ A GND plane (35) is provided with the insulating layer (32) interposed therebetween. The GND plane (35) forms a pattern facing the intermediate portion (331) with a reduced distance between lines in a hollow frame shape.
The thickness of the insulating layer (32) is set to, for example, 0.2 mm, and the line width W is set to, for example, 50Ω when the single-ended operation is performed. The FP plane (33) is an island pattern facing the hollowed portion of the GND plane (35).
O The thickness of the insulating layer (34) is, for example, 0.2 mm, and the differential impedance of the wiring having the line width W is, for example, 100Ω with respect to the total thickness of the insulating layer (32) and the insulating layer (34). Set the distance between lines so that
○ The GND plane (37) is provided with the insulating layer (36) interposed therebetween. The GND plane (37) has a frame shape in which a pattern facing the intermediate portion (313) is hollowed out, and is used for connection with the external connector GND.
The two GND planes (35, 37) are connected to the GND connection pattern (31c) by using the through-holes (38).

  FIG. 11 is a graph showing a characteristic impedance by simulation of a specific example of the third embodiment. The wiring board (30) is one in which a common mode removal filter function is mounted on a wiring in which a non-coupled differential transmission path and a coupled differential transmission path are mixed, and a simulation model is created as follows.

  The parameters shown in FIG. 8 are W = 0.33 mm, t = 0.035 mm, H1 = H2 = H3 = 0.2 mm, Gap1 = 0.18 mm, Gap2 = 4.0 mm, L1 = 30 mm, and L2 = 10 mm. . Here, W is the width of the transmission path (31a, 31b), t is the thickness of the transmission path (31a, 31b), H1 is the thickness of the insulation layer (32), H2 is the thickness of the insulation layer (34), and H3 is the insulation. The thickness of the layer (36), Gap1 is the distance between the transmission paths (31a, 31b) in the central part (313), Gap2 is the gap between the transmission paths (31a, 31b) in the peripheral parts (311, 312), and L1 is the wiring board The total length of L30, L2, is the gap length in the length direction of the GND plane (35, 37). The relative permittivity (Er) of the insulating layers (32, 34, 36) was 4.3.

  FIG. 11 shows a simulation result of the TDR method, in which the horizontal axis represents time (ns), the vertical axis represents impedance (Ω), the solid line represents differential impedance, and the broken line represents in-phase impedance. As is clear from FIG. 11, the common-mode impedance is considerably larger than the differential impedance, and the common-mode removing filter function can be implemented on the wiring in which the uncoupled differential transmission path and the coupled differential transmission path are mixed. Can be confirmed. Other configurations, operations, and effects of the third embodiment are the same as those of the first and second embodiments.

<Embodiment 4>
FIG. 12 is an exploded perspective view showing the wiring board according to the fourth embodiment. FIG. 13 is an enlarged view showing a cross section taken along line XIII-XIII in FIG. FIG. 14 is an enlarged view showing a cross section taken along line XIV-XIV in FIG. 13 and 14 show a state in which the respective layers in FIG. 12 are stacked.

  As shown in FIGS. 12 to 14, the wiring board (40) of the fourth embodiment includes a pair of signal lines (41a, 41b) for transmitting a differential signal and a first insulating layer (42) for determining a differential impedance. ), A frame-shaped hole (423) is drilled in the center, and the second conductor pattern (44) is connected to the ground potential, and is physically connected anywhere inside the frame-shaped hole (423). And a double-sided wiring board on which a first conductive pattern (43) is disposed.

  In the fourth embodiment, the transmission path (41a, 41b) is an example of a “pair of signal lines”, the insulating layer (42) is an example of a “first insulating layer”, and the FP pattern is an example of a “first conductor pattern”. 43), a GND plane (44) connected to the ground potential is taken as an example of the "second conductor pattern". The gap between the GND plane (44) and the FP pattern (43) is referred to as an O-shaped slit (423).

  The transmission lines (41a, 41b) are formed from the signal layer (41) together with the GND connection pattern (41c). The wiring board (40) has two through-holes (45) at four corners. The GND connection pattern (41c) and the GND plane (44) are electrically connected by the through hole (45). The FP pattern (43) and the GND plane (44) formed on the same surface are O-type slits having a gap between Gap2 (47) and Gap3 (48). The wiring board (40) is housed in a shield box (49). Each layer of the wiring board (40) is divided into a central part (421) and a peripheral part (422) surrounding it in plan view.

  In other words, the GND plane (34) is formed in a frame shape on the peripheral portion (422) on the lower surface of the insulating layer (42), and the FP pattern (43) is formed on the central portion (421) on the lower surface of the insulating layer (42). It is formed in a shape. The material of each layer of the wiring board (40) conforms to those of a general wiring board or a multilayer wiring board. The method of manufacturing the wiring board (40) conforms to the method of manufacturing a general wiring board or a multilayer wiring board. The wiring board (40) has an in-phase signal removal filter function constituted by an O-shaped slit (423).

An example of a method for designing the wiring board (40) will be described below.
○ Use differential transmission lines using microstrip lines.
The transmission lines (41a, 41b) are arranged on the surface of the insulating layer (42).
The FP pattern (43) and the GND plane (44) surrounding the FP pattern (43) are arranged on the transmission lines (41a, 41b) with the insulating layer (42) interposed therebetween.
○ The FP pattern (43) is in a floating state where it is not physically connected to any part. Make them approach each other.
Gap2 (47) where the transmission path of the O-shaped slit (423) intersects is set narrow so that the continuity of impedance can be maintained. Gap3 (48) where transmission lines do not intersect is set wide so that the electrostatic coupling between the FP pattern (43) and the GND plane (44) is reduced.

  FIG. 15 is a graph showing a characteristic impedance by simulation of a specific example of the fourth embodiment. The wiring board (40) has a common plane elimination filter function implemented by forming an O-shaped slit in a GND plane on a board using a microstrip line. The parameters of the simulation model are shown below.

  The parameters shown in FIG. 12 are: W = 0.3 mm, t = 0.035 mm, H = 0.2 mm, Gap1 = 1.0 mm, Gap2 = 0.15 mm, Gap3 = 0.5 mm, L1 = 9 mm, L2 = 4 mm And Here, W is the width of the transmission line (41a, 41b), t (47) is the thickness of the transmission line (41a, 41b), H is the thickness of the insulating layer (42), and Gap1 (46) is the transmission line (41a, 41b). Gap2 (47) is the distance between the pattern of the central part (421) and the pattern of the peripheral part (422) at the position where the transmission lines (41a, 41b) intersect. Gap3 (48) is a gap between the central pattern (421) and the peripheral pattern (422) at a position where the transmission lines (41a, 41b) do not intersect. The relative dielectric constant (Er) of the insulating layer (42) was 4.3.

  FIG. 15 shows a simulation result of the TDR method. The horizontal axis represents time (ns), the vertical axis represents impedance (Ω), the solid line represents differential impedance, and the broken line represents in-phase impedance. As is clear from FIG. 15, the common-mode impedance is considerably larger than the differential impedance, and it can be confirmed that the common-mode removal filter function can be implemented in the microstrip line by the O-slit structure. Other configurations, operations, and effects of the fourth embodiment are the same as those of the first to third embodiments.

<Examples and comparative examples>
The measurement results of Examples and Comparative Examples will be described below. In the example, a cable is wired on a wiring board to which the first embodiment is applied. (That is, a cable assembly using a board with an in-phase signal removal filter function) In a comparative example, a cable is wired on a wiring board according to a conventional technique. (That is, a cable assembly using a through connection board) Each of the cable lengths is 1 m.

  FIG. 16 is a graph showing impedance characteristics obtained from measured values of the example and the comparative example. From this figure, it can be confirmed that when the present embodiment is compared with the comparative example, the differential impedance has almost no difference, but the common-mode impedance of the present embodiment is larger than that of the comparative example.

  FIG. 17 is a graph showing the insertion loss of the differential signal and the insertion of the in-phase signal by the actual measurement in the example and the comparative example. FIG. 18 is a graph showing the in-phase signal rejection performance (CMR) by actual measurement for the example and the comparative example. From FIGS. 17 and 18, it can be confirmed that in the present embodiment, the in-phase signal can be largely removed without attenuating the differential signal. That is, it can be confirmed that the common mode removal filter function has been implemented.

<Effect of the present invention>
The present invention provides a solution to all the items listed as “desired functions of a common-mode signal rejection filter provided in a differential transmission line” in the subject section.

(1) Applicable to a differential transmission line arranged in an inner layer.
In the second embodiment, a method of adding a common-mode signal component removal filter function to a differential transmission line using a stripline has been described. It has been shown that a common-mode signal component elimination filter function can be incorporated in a very simple manner into a differential transmission line arranged in an inner layer, which has been difficult with conventional techniques.

(2) There is no cutoff frequency and high-speed transmission is possible.
According to the present invention, the cutoff frequency does not change even if the in-phase signal component removal filter function is added. That is, it is possible to add the in-phase signal component removal function to the entire frequency band of the transmission line. The measurement results of the embodiment shown in FIG. 18 indicate a common mode signal component rejection ratio (CMR) characteristic of −13 dB at 10 GHz (fundamental frequency at 20 Gbps) and -6 dB or more from there to 20 GHz. In the measurement results of the comparative example shown in FIG. 16, the fact that the common-mode impedance of the receptacle and the connector plug portion is large indicates that the electromagnetic coupling between the differential signal lines in the connector is large.

(3) Only the in-phase signal component can be removed without increasing the insertion loss for the differential signal.
From the measurement results of the examples shown in FIGS. 16 and 17, it can be confirmed that even when the common mode filter function is incorporated, the differential impedance does not change and the differential insertion loss (Sdd21) does not change.

(4) Have a flat count delay characteristic.
By not using a magnetic material in each embodiment, generation of intersymbol interference jitter due to group delay characteristics is avoided.

(5) The FP pattern can be mounted with the minimum board area. The FP pattern is installed at the position facing the differential transmission signal, but it can be installed on other power supply layers, GND layers, signal layers, etc. The in-phase signal component removal filter function can be implemented without occupation.

(6) It can be manufactured stably without requiring a special process.
There is no need to add a fine pattern or through-hole in order to implement the in-phase signal component removal filter function, and the device can be manufactured using a normal manufacturing process.

<Effect on board design>
When a differential transmission signal is wired between semiconductor chips from a coaxial connector or the like installed at a distant position, non-coupled differential wiring and coupled differential wiring are used in combination. In the coupled differential wiring portion, it was necessary to reduce the pattern width and perform wiring in order to correct the effect of reducing the differential impedance due to the electromagnetic coupling between the paired wires.

  Since it is necessary to form the pattern width in a tapered shape at the portion where the pattern width is switched, it is extremely troublesome to design the pattern. In the structure shown in the third embodiment, since the differential transmission lines can be arranged while keeping the width of the signal line constant, the pattern design becomes simple and it is easy to make the lengths of the pair lines completely the same. Now it can be realized.

  In addition, since the skin effect becomes remarkable in a portion where the line width is small, the insertion loss increases. This problem can be avoided by wiring with the same line width

<Effects as a wiring system>
The present invention removes a noise signal from the EMI signal source itself, that is, a common-mode signal component, by mounting a common mode filter function on the differential transmission line itself. In addition, the skew in the pair does not increase in proportion to the wiring length, and it is possible to push the limit of the transmission distance. This means that intra-pair skew is no longer the main limiting factor of the transmission rate limit.

  The present invention enables a great deal of flexibility in system design. By combining the techniques shown in Embodiments 1 to 4 and the techniques based on the basic principle of the present invention with the multilayer wiring of the printed wiring board according to the design needs, a means for realizing an optimal circuit design is provided. Can be provided.

<Others>
As described above, the present invention has been described with reference to each of the above embodiments. However, the present invention is not limited to the configuration and operation of each of the above embodiments, and can be made by those skilled in the art within the scope of the present invention. Of course, the possible variations and modifications are included. Further, the present invention also includes a configuration in which some or all of the configurations of the above embodiments are appropriately combined with each other.

  In other words, the present invention can be summarized as follows.

  The present invention uses a differential transmission wiring having a common-mode signal removal filter function capable of attenuating a common-mode signal component without attenuating a differential signal component, using only a substrate wiring on which electronic components such as semiconductor components and connectors are mounted. Provide a pattern design method that can be realized by

  One of the main factors that determines the operation limit of differential transmission communication using metal wiring is skew within a pair. The causes of the intra-pair skew include variations in the wiring length of one set of differential transmission signals, variations in the characteristics of the transmission path, and variations in the output signals of the integrated circuits that drive the signals. At transmission speeds exceeding 10 Gbps, the performance of removing common-mode signal components by the conventionally used common mode choke has reached its limit, and an alternative solution is required.

  The present invention forms a high-speed differential transmission line having a common-mode signal elimination filter function for eliminating only a common-mode signal component without increasing loss of a differential transmission signal on a laminated substrate using only a wiring pattern. By adding a function to suppress intra-pair skew to the transmission line itself, which caused intra-pair skew, the intra-pair skew was reduced, the transmission speed limit of high-speed differential transmission was expanded, and the EMI Suppress the occurrence.

  The above object is achieved by realizing a wiring structure of a substrate on which the differential impedance and the common mode impedance of the differential transmission line can be independently set. Since the common-mode signal rejection filter function realized by the present invention has a wide band and does not use components such as a common mode choke, the common-mode signal rejection filter function can be applied to the differential transmission line wired in the inner layer of the substrate. Can be incorporated. Also, since the common mode choke uses a magnetic material, the group delay has a frequency characteristic, and the waveform of a transmission signal is distorted, so that it is difficult to operate at 10 Gbps or more. Is avoiding.

Actual measurement results of four specific design examples, one example, and a comparative example are shown.
Design example 1
The wiring board 10 is disposed at a position facing the pair of signal lines (11a, 11b) for transmitting differential signals, the first insulating layer (12), and the pair of signal lines (11a, 11b), and is physically disposed. A first conductor pattern (13) not connected to anywhere, a second insulating layer (14), and a second conductor pattern (15) connected to ground or a power supply with the second insulating layer (14) interposed therebetween; A pair of signal lines (11a, 11b), a first insulating layer (12), a first conductor pattern (13), a second insulating layer (14), and a second conductor pattern (15) are laminated in this order.

  INDUSTRIAL APPLICABILITY The present invention can be suitably used for an ultrahigh-speed differential transmission line using a differential interface such as LVDS (Low Voltage Differential Signal).

<First embodiment>
Reference Signs List 10 wiring board 11 signal layer 11a, 11b transmission line (pair of signal lines)
12 Insulating layer (first insulating layer)
13 FP pattern (first conductor pattern)
14 Insulating layer (second insulating layer)
15 GND plane (second conductor pattern)
<Embodiment 2>
Reference Signs List 20 wiring board 21 signal layer 21a, 21b transmission line (pair of signal lines)
22 Insulating layer (second insulating layer)
23 FP pattern (second first conductor pattern)
24 Insulating layer (second insulating layer)
25 GND plane (second conductor pattern)
26 FP pattern (first conductor pattern)
27 Insulating layer (first insulating layer)
<Embodiment 3>
Reference Signs List 30 wiring board 31 signal layer 31a, 31b transmission line (pair of signal lines)
31c GND connection pattern 311, 312 Non-coupled differential transmission section 313 Coupled differential transmission section 32 Insulating layer (first insulating layer)
321 Central part 322 Peripheral part 33 FP pattern (first conductor pattern)
34 insulating layer (first insulating layer)
35 GND plane (first second conductor pattern)
36 insulating layer (second insulating layer)
37 GND plane (second second conductor pattern)
38 Through Through Hole 39 Shield Box 311, 312 Both Ends 351,371 Hole <Embodiment 4>
Reference Signs List 40 Wiring board 41 Signal layer 41a, 41b Transmission line (pair of signal lines)
41c GND connection pattern 42 Insulating layer (first insulating layer)
421 central part 422 peripheral part 423 0 type slit 43 FP pattern (first conductor pattern)
44 GND plane (second conductor pattern)
45 Penetration through hole 47 Crevice between central part and peripheral part where transmission line intersects 48 Gap between central part and peripheral part where transmission line does not intersect 49 Shield box

Claims (5)

  In addition to a pair of signal lines transmitting a differential signal, a first insulating layer, and a second conductor pattern connected to a ground or a power supply disposed at a position facing the pair of signal lines, at least the first insulating layer A high-speed differential transmission line formed on a laminated substrate, in which a first conductor pattern that is not physically connected to anywhere, such as the second conductor pattern, is disposed in an arbitrary layer at a position opposed to the pair of signal lines with a layer interposed therebetween. . Further comprising a second insulating layer,
The pair of signal lines, the first insulating layer, the first conductor pattern, the second insulating layer, and the second conductor pattern were stacked in this order,
A high-speed differential transmission line formed on the laminated substrate according to claim 1. Further comprising a second insulating layer,
The first conductive pattern includes a first and a second, and the first insulating layer includes a first and a second,
A first first conductive pattern, a first first insulating layer, the pair of signal lines, a second first insulating layer, a second first conductive pattern, the second insulating layer, And, the second conductor pattern is laminated in this order,
A high-speed differential transmission line formed on the laminated substrate according to claim 1. Further comprising a second insulating layer,
The second conductive pattern includes a first and a second, and the second insulating layer includes a first and a second,
Both ends of the pair of signal lines are non-coupled differential wiring, and a central part is coupled differential wiring,
The first and second second conductor patterns are perforated in portions facing the central portion of the pair of signal lines,
The first conductor pattern is disposed only in a portion facing the central portion of the pair of signal lines,
The pair of signal lines, the first insulating layer, a first second conductive pattern, a first second insulating layer, a first conductive pattern, a second second insulating layer, and two The second conductor pattern of the eye was laminated in this order,
A high-speed differential transmission line formed on the laminated substrate according to claim 1. The first conductive pattern is arranged in an island shape at a position facing a central portion of the pair of signal lines,
The second conductive pattern is arranged on the same layer as the first conductive pattern so as to surround the first conductive pattern,
The pair of signal lines, the first insulating layer, and the first conductor pattern and the second conductor pattern arranged in the same layer were stacked in this order,
A high-speed differential transmission line formed on the laminated substrate according to claim 1.

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