JP2019220604A - Heat dissipation mechanism of semiconductor element - Google Patents

Heat dissipation mechanism of semiconductor element Download PDF

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JP2019220604A
JP2019220604A JP2018117787A JP2018117787A JP2019220604A JP 2019220604 A JP2019220604 A JP 2019220604A JP 2018117787 A JP2018117787 A JP 2018117787A JP 2018117787 A JP2018117787 A JP 2018117787A JP 2019220604 A JP2019220604 A JP 2019220604A
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semiconductor element
heat
back surface
heat dissipation
solvent
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森山　豊
Yutaka Moriyama
豊 森山
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Sumitomo Electric Industries Ltd
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Sumitomo Electric Industries Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors

Abstract

To provide a semiconductor element heat dissipation mechanism that allows semiconductor elements to be mounted at high reliability and at low cost.SOLUTION: A semiconductor element includes a semiconductor element that has a front surface and a back surface and is provided with a plurality of bump electrodes on the surface, a mounting substrate that has a pad facing the surface and physically contacts each of the plurality of bump electrodes, and a heat pipe 30 that contacts the back surface of the semiconductor element and radiates heat to the semiconductor element. The heat pipe includes a solvent conduction portion 31 through which a solvent circulates, and a crushed portion 33 provided at an end portion of the solvent conduction portion and formed in a substantially flat plate shape. The crushed portion is in contact with the back surface of the semiconductor element via a silver paste adhesive.SELECTED DRAWING: Figure 1

Description

本発明は、半導体素子の放熱機構に関し、詳しくは、半導体素子を冷却するためにヒートパイプを用いた半導体素子の放熱機構に関する。   The present invention relates to a heat dissipation mechanism for a semiconductor element, and more particularly, to a heat dissipation mechanism for a semiconductor element using a heat pipe to cool the semiconductor element.

半導体素子の高機能化・高性能化に伴い、半導体素子の発熱量は増加しやすくなる。また、実装基板のコンパクト化を達成するために半導体素子を小型にした場合にも、発熱量は増加する。半導体素子の発熱量の増加は半導体素子の性能に影響を与えることが多い。このため、例えば、特許文献１、２には、ヒートパイプを利用して半導体素子を冷却する構造が開示されている。また、特許文献３には、ヒートパイプの構造が開示されている。   As the function and performance of the semiconductor element become higher and higher, the amount of heat generated by the semiconductor element tends to increase. Also, when the size of the semiconductor element is reduced in order to achieve a compact mounting board, the amount of heat generated also increases. An increase in the amount of heat generated by a semiconductor element often affects the performance of the semiconductor element. For this reason, for example, Patent Documents 1 and 2 disclose a structure for cooling a semiconductor element using a heat pipe. Patent Document 3 discloses a structure of a heat pipe.

特開平０２−２６０５５６号公報JP-A-02-260556 特開平０１−１５２６９１号公報JP-A-01-152691 特開２０００−１７１１８２号公報JP 2000-171182 A

ところで、ＷＬＣＳＰ（Wafer Level Chip Size Package）のような小型の集積回路では、半導体素子（ベアチップともいう）は、その表面に多数のバンプ電極を形成し、各バンプ電極を実装基板上のパッドに接触させて実装する（フェイスダウン実装）。
一般に、フェイスアップ実装では、半導体素子の裏面全体が実装基板に直接接触しているので、半導体素子で生じた熱は、半導体素子の裏面から実装基板に放熱される。 By the way, in a small-sized integrated circuit such as a WLCSP (Wafer Level Chip Size Package), a semiconductor element (also referred to as a bare chip) has a large number of bump electrodes formed on its surface, and each bump electrode contacts a pad on a mounting board. And implement (face-down implementation).
In general, in face-up mounting, the entire back surface of the semiconductor element is in direct contact with the mounting substrate, so that heat generated in the semiconductor element is radiated from the back surface of the semiconductor element to the mounting substrate.

しかし、ＷＬＣＳＰでは、半導体素子の裏面は実装基板に対し物理的に接触していないため、放熱放射によるものが支配的となる。また、半導体素子の表面と実装基板の表面との間には、バンプ電極の高さに相当するギャップが必然的に形成されていることから、半導体素子の表面と実装基板の表面との間で効率的な熱的接触を得ることは難しい。なお、このギャップにアンダーフィル材（樹脂溶剤）を充填する手法も知られているが、樹脂部材は一般的に熱伝導率の劣るものであり、また、樹脂部材がギャップ内にのみ充填され、半導体素子の設置範囲からはみ出ないような対策が別途必要になる。   However, in the WLCSP, since the back surface of the semiconductor element is not in physical contact with the mounting substrate, the radiation by heat radiation is dominant. In addition, since a gap corresponding to the height of the bump electrode is inevitably formed between the surface of the semiconductor element and the surface of the mounting substrate, the gap between the surface of the semiconductor element and the surface of the mounting substrate is formed. It is difficult to obtain efficient thermal contact. Although a method of filling the gap with an underfill material (resin solvent) is also known, the resin member generally has poor thermal conductivity, and the resin member is filled only in the gap. A separate countermeasure that does not protrude from the installation range of the semiconductor element is required.

近年、ＧａＡｓを主材料とする化合物半導体デバイスに加えて、ＧａＮを主材料とする化合物半導体デバイスが実用化され始めている。後者のデバイスでは、基板材としてＳｉＣ、サファイア等の使用が一般的である。これら基板材の熱伝導率は、ＧａＡｓ、あるいはＳｉに比較して非常に良好であり、この基板材の良熱伝導性を有効に利用するためにも、半導体素子の裏面に対する放熱機構が望まれる。   In recent years, compound semiconductor devices using GaN as a main material in addition to compound semiconductor devices using GaAs as a main material have begun to be put into practical use. In the latter device, SiC, sapphire, or the like is generally used as a substrate material. The thermal conductivity of these substrate materials is much better than that of GaAs or Si. To effectively utilize the good thermal conductivity of this substrate material, a heat dissipation mechanism for the back surface of the semiconductor element is desired. .

本発明は、上述のような実情に鑑みてなされたもので、半導体素子を高信頼性、かつ、低コストで実装させる半導体素子の放熱機構を提供することを目的とする。   SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a semiconductor device heat radiation mechanism for mounting a semiconductor device with high reliability and low cost.

本発明の一態様に係る半導体素子の放熱機構は、表面と裏面を有し、前記表面に複数のバンプ電極を設けた半導体素子と、前記表面と対向し、複数の前記ンプ電極それぞれと物理的に接触するパッドを有する実装基板と、前記半導体素子の前記裏面に接触して該半導体素子を放熱させるヒートパイプと、を備え、該ヒートパイプは、その内部を溶媒が循環する溶媒伝導部と、該溶媒伝導部の端部分に設けられ、略平板状に形成された圧潰部と、を有し、該圧潰部が、銀ペースト接着剤を介して前記半導体素子の前記裏面に接触している。   A heat dissipation mechanism for a semiconductor element according to one embodiment of the present invention includes a semiconductor element having a front surface and a back surface, a plurality of bump electrodes provided on the front surface, and a plurality of bump electrodes facing the front surface and physically connected to each of the plurality of pump electrodes. A mounting substrate having a pad in contact with, and a heat pipe that contacts the back surface of the semiconductor element and radiates the semiconductor element, and the heat pipe has a solvent conduction section through which a solvent circulates, And a crushed portion formed in a substantially flat plate shape, provided at an end portion of the solvent conducting portion, and the crushed portion is in contact with the back surface of the semiconductor element via a silver paste adhesive.

上記によれば、半導体素子を高信頼性、かつ、低コストで実装することができる。   According to the above, the semiconductor element can be mounted with high reliability and at low cost.

本発明の一実施形態に係る半導体素子の放熱機構のヒートパイプを説明するための図である。It is a figure for explaining the heat pipe of the heat dissipation mechanism of the semiconductor device concerning one embodiment of the present invention. ヒートパイプの拡大図である。It is an enlarged view of a heat pipe. 半導体素子の放熱機構による半導体素子の冷却を説明するための図である。It is a figure for explaining cooling of a semiconductor element by a heat dissipation mechanism of a semiconductor element. 半導体素子の放熱機構による半導体素子の冷却を説明するための図である。It is a figure for explaining cooling of a semiconductor element by a heat dissipation mechanism of a semiconductor element.

［本発明の実施形態の詳細］
以下、添付図面を参照しながら、本発明に係る半導体素子の放熱機構の具体例について説明する。図１は、本発明の一実施形態に係る半導体素子の放熱機構のヒートパイプを説明するための図であり、図２は、ヒートパイプの拡大図である。
図１に示すように、ヒートパイプ３０は、細長い棒状で形成され、その内部に溶媒を循環させて、吸熱箇所と放熱箇所との間の熱の授受を行うデバイスである。 [Details of Embodiment of the Present Invention]
Hereinafter, specific examples of the heat dissipation mechanism of the semiconductor device according to the present invention will be described with reference to the accompanying drawings. FIG. 1 is a view for explaining a heat pipe of a heat dissipation mechanism of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is an enlarged view of the heat pipe.
As shown in FIG. 1, the heat pipe 30 is a device that is formed in an elongated rod shape and circulates a solvent therein to transfer heat between a heat absorbing portion and a heat radiating portion.

詳しくは、図１（Ａ）に示すように、ヒートパイプ３０は、中央位置に溶媒伝導部３１を有し、溶媒伝導部３１の一端には吸熱部３１ａが設けられ、他端には放熱部３１ｂが設けられている。溶媒伝導部３１は内壁に毛細管構造（ウイックともいう）を有し、溶媒伝導部３１の内部には溶媒（例えば水、アルコール等）が密封されている。
吸熱部３１ａでは、外部から熱を奪って溶媒が蒸発する。蒸気が放熱部３１ｂに向けて移動すると、放熱部３１ｂでは、凝縮線熱を放出して溶媒が液化する。これにより、吸熱部３１ａと放熱部３１ｂとの間の熱の授受を行うことができる。なお、溶媒はウイックの毛細管力によって還流する。 Specifically, as shown in FIG. 1A, the heat pipe 30 has a solvent conducting part 31 at a central position, a heat absorbing part 31a is provided at one end of the solvent conducting part 31, and a heat radiating part is provided at the other end. 31b is provided. The solvent conducting section 31 has a capillary structure (also called a wick) on the inner wall, and a solvent (eg, water, alcohol, etc.) is sealed inside the solvent conducting section 31.
In the heat absorbing portion 31a, heat is taken from the outside and the solvent evaporates. When the vapor moves toward the heat radiating portion 31b, the solvent liquefies by releasing the condensation linear heat in the heat radiating portion 31b. Thus, heat can be transferred between the heat absorbing portion 31a and the heat radiating portion 31b. Note that the solvent is refluxed by the capillary force of the wick.

吸熱部３１ａから放熱部３１ｂまでの長さは４０（ｍｍ）以上で形成されており、吸熱部３１ａや放熱部３１ｂの幅は３（ｍｍ）程度で、厚みが０．４（ｍｍ）程度である。
また、吸熱部３１ａの端部には、圧潰部３３が溶接部３２を介して設けられ、放熱部３１ｂの端部にも、圧潰部３３が溶接部３２を介して設けられている。
各圧潰部３３は、後述するベアチップ１０の裏面１２や放熱デバイス２０との接触面積を増やすために、上下方向（ベアチップ１０の表面１１と裏面１２を結ぶ方向）で潰れた略平板状に形成されている。吸熱部３１ａ側の圧潰部３３は、ベアチップ１０の熱を吸熱部３１ａに伝え、放熱部３１ｂ側の圧潰部３３は、放熱部３１ｂの熱を放熱デバイス２０に伝える。なお、圧潰部３３は正面視で五角形状に形成されているが、四角形状でもよい。 The length from the heat absorbing section 31a to the heat radiating section 31b is formed to be 40 (mm) or more, the width of the heat absorbing section 31a and the heat radiating section 31b is about 3 (mm), and the thickness is about 0.4 (mm). is there.
A crushed portion 33 is provided at an end of the heat absorbing portion 31a via a welded portion 32, and a crushed portion 33 is provided at an end of the heat dissipation portion 31b via the welded portion 32.
Each crushing portion 33 is formed in a substantially flat plate shape that is crushed in the vertical direction (the direction connecting the front surface 11 and the back surface 12 of the bare chip 10) in order to increase the contact area with the back surface 12 of the bare chip 10 and the heat dissipation device 20 described later. ing. The crushing portion 33 on the heat absorbing portion 31a transmits the heat of the bare chip 10 to the heat absorbing portion 31a, and the crushing portion 33 on the heat radiating portion 31b transmits the heat of the heat radiating portion 31b to the heat radiating device 20. Although the crushing portion 33 is formed in a pentagonal shape when viewed from the front, it may be formed in a quadrangular shape.

各圧潰部３３のうち、吸熱部３１ａに連結した圧潰部３３には、複数（例えば５個）の貫通穴３４が設けられている。具体的には、図１（Ｂ）や図２に示すように、圧潰部３３は、ベアチップ１０の裏面１２に対向する下面３３ｂと、この下面３３ｂの反対側に位置する上面３３ａとを有し、貫通穴３４が上面３３ａと下面３３ｂとを貫通して設けられている。   Among the crushing portions 33, a plurality (for example, five) of through holes 34 are provided in the crushing portion 33 connected to the heat absorbing portion 31a. Specifically, as shown in FIGS. 1B and 2, the crushing portion 33 has a lower surface 33 b facing the back surface 12 of the bare chip 10 and an upper surface 33 a located on the opposite side of the lower surface 33 b. , A through hole 34 is provided through the upper surface 33a and the lower surface 33b.

貫通穴３４は、例えば直径０．５ｍｍ程度で形成されて上面３３ａや下面３３ｂで開口しており、圧潰部３３の中央位置と、この中央位置を挟んでヒートパイプ３０の長手方向に１個ずつ形成され、また、この中央位置を挟んでヒートパイプ３０の短手方向にも１個ずつ形成されている。   The through-holes 34 are formed, for example, with a diameter of about 0.5 mm and open at the upper surface 33a and the lower surface 33b. One through hole 34 is provided in the longitudinal direction of the heat pipe 30 with the central position of the crushed portion 33 interposed therebetween. The heat pipes 30 are formed one by one in the short direction of the heat pipe 30 with the central position interposed therebetween.

図３、４は、半導体素子の放熱機構による半導体素子の冷却を説明するための図である。
図３（Ａ）に示すように、ベアチップ１０はプリント基板２に実装される。プリント基板２の下側には、例えば銅板等のヒートシンク１が設置されている。なお、ベアチップ１０が本発明の半導体素子に、プリント基板２が本発明の実装基板にそれぞれ相当する。 3 and 4 are diagrams for explaining cooling of the semiconductor element by the heat dissipation mechanism of the semiconductor element.
As shown in FIG. 3A, the bare chip 10 is mounted on the printed circuit board 2. Below the printed circuit board 2, a heat sink 1 such as a copper plate is provided. The bare chip 10 corresponds to the semiconductor element of the present invention, and the printed board 2 corresponds to the mounting board of the present invention.

ベアチップ１０は数ｍｍ2程度の表面１１や裏面１２を有し、表面１１に複数のバンプ電極４０が形成されている。そして、裏面１２を上方に、表面１１を下方に向けた姿勢で、バンプ電極４０それぞれをプリント基板２のパッド（図示省略）と物理的に接触させる（半田リフロー実装工程）。放熱デバイス２０は、エアファンや金属筐体（ヒートシンク）等であり、プリント基板２上の適宜位置に実装される。 The bare chip 10 has a front surface 11 and a back surface 12 of about several mm 2 , and a plurality of bump electrodes 40 are formed on the front surface 11. Then, with the back surface 12 facing upward and the front surface 11 facing downward, each of the bump electrodes 40 is physically brought into contact with a pad (not shown) of the printed circuit board 2 (a solder reflow mounting process). The heat dissipation device 20 is an air fan, a metal housing (heat sink), or the like, and is mounted at an appropriate position on the printed circuit board 2.

次に、図３（Ｂ）に示すように、ベアチップ１０の表面１１とプリント基板２との間に、アンダーフィル４１を流入させる（アンダーフィル注入工程）。これにより、後述する余ったナノ銀ペーストがベアチップ１０の表面１１とプリント基板２との間に流入するのも防止できる。   Next, as shown in FIG. 3B, an underfill 41 is caused to flow between the surface 11 of the bare chip 10 and the printed board 2 (underfill injection step). Thus, it is possible to prevent the surplus nano silver paste described later from flowing between the surface 11 of the bare chip 10 and the printed board 2.

続いて、図３（Ｃ）に示すように、ベアチップ１０の裏面１２に、ナノ銀ペースト４２を塗布する（ナノ銀ペースト塗布工程）。ナノ銀ペーストは、熱伝導性が優れており、１８０℃程度の低温で硬化・接合可能であり、かつ、硬化後は銀とほぼ同じ熱伝導率を有している。なお、ナノ銀ペーストが本発明の銀ペースト接着剤に相当する。   Subsequently, as shown in FIG. 3C, a nano silver paste 42 is applied to the back surface 12 of the bare chip 10 (nano silver paste application step). The nanosilver paste has excellent thermal conductivity, can be cured and joined at a low temperature of about 180 ° C., and has almost the same thermal conductivity as silver after curing. Note that the nano silver paste corresponds to the silver paste adhesive of the present invention.

吸熱部３１ａ側の圧潰部３３とベアチップ１０の裏面１２とを気密に接合させるために、ナノ銀ペースト４２を多量に使用すると、ベアチップ１０の裏面１２からベアチップ１０の側面やプリント基板２上に濡れ広がり、プリント基板２の導体パターン等をショートさせることがある。このため、ナノ銀ペースト４２は塗布量を予め評価してベアチップ１０の裏面１２に塗布する。また、図３（Ｃ）に示すように、放熱デバイス２０にもナノ銀ペースト４２を塗布する。   If a large amount of the nano silver paste 42 is used to airtightly join the crushed portion 33 on the heat absorbing portion 31a side and the back surface 12 of the bare chip 10, the side surface of the bare chip 10 and the side surface of the bare chip 10 and the printed circuit board 2 may be wet. The printed circuit board 2 may spread and short-circuit the conductor pattern of the printed circuit board 2. For this reason, the nano silver paste 42 is applied to the back surface 12 of the bare chip 10 after evaluating the application amount in advance. Further, as shown in FIG. 3C, the nano silver paste 42 is applied to the heat dissipation device 20 as well.

次いで、図４（Ａ）に示すように、ベアチップ１０から放熱デバイス２０まで届く適当な長さのヒートパイプ３０を準備し、吸熱部３１ａ側の圧潰部３３をベアチップ１０の裏面１２に、放熱部３１ｂ側の圧潰部３３を放熱デバイス２０にそれぞれ位置合わせする（ヒートパイプセット工程）。
圧潰部３３の下面３３ｂがナノ銀ペースト４２を用いてベアチップ１０の裏面１２に接触しているので、小型サイズの表面１１にバンプ電極４０を形成した場合にも、ヒートパイプ３０をベアチップ１０に確実に接合・固定することができる。このように、ベアチップ１０の裏面１２からの放熱パスを、ヒートパイプ３０やナノ銀ペースト４２を用いて確保したことにより、ベアチップ１０を高信頼性、かつ、低コストで実装することができる。 Next, as shown in FIG. 4A, a heat pipe 30 of an appropriate length reaching from the bare chip 10 to the heat dissipation device 20 is prepared, and the crushed portion 33 on the heat absorbing portion 31a side is attached to the back surface 12 of the bare chip 10 and the heat dissipation portion. The crushing portions 33 on the 31b side are aligned with the heat dissipation device 20 (heat pipe setting step).
Since the lower surface 33b of the crushed portion 33 is in contact with the back surface 12 of the bare chip 10 using the nano silver paste 42, even when the bump electrode 40 is formed on the small-sized surface 11, the heat pipe 30 can be securely connected to the bare chip 10. Can be joined and fixed. As described above, by securing the heat radiation path from the back surface 12 of the bare chip 10 by using the heat pipe 30 and the nano silver paste 42, the bare chip 10 can be mounted with high reliability and at low cost.

上記のようにナノ銀ペースト４２の塗布量を管理しても、多量に塗布される場合があるが、吸熱部３１ａ側の圧潰部３３には、余ったナノ銀ペースト４２を逃がすことができる例えば５個の貫通穴３４が形成されている。つまり、ナノ銀ペースト４２が圧潰部３３に押されてベアチップ１０の裏面１２上で余ったとしても、図４（Ｂ）に示すように、毛細現象によって圧潰部３３の内部を、下面３３ｂから上面３３ａに向けて這い上がる。這い上がたナノ銀ペースト４２は、その状態で硬化できるので、ベアチップ１０の側面やプリント基板２上に濡れ広がるのを確実に防止できる。   Even if the application amount of the nano silver paste 42 is controlled as described above, the nano silver paste 42 may be applied in a large amount. However, the surplus nano silver paste 42 can escape to the crushing portion 33 on the heat absorbing portion 31a side. Five through holes 34 are formed. That is, even if the nano silver paste 42 is pushed by the crushing portion 33 and remains on the back surface 12 of the bare chip 10, the inside of the crushing portion 33 is moved from the lower surface 33b to the upper surface by the capillary phenomenon as shown in FIG. Crawl up to 33a. Since the crawled-up nano silver paste 42 can be cured in that state, it can be reliably prevented from spreading on the side surface of the bare chip 10 and the printed circuit board 2.

このヒートパイプセット工程に続き、オモリ治具４３を吸熱部３１ａ側の圧潰部３３と、放熱部３１ｂ側の圧潰部３３とにそれぞれ載せる。そして、所定の効果条件（例えば５０ｇ重程度の加圧しながら、１８０℃で２時間程度の加熱）でナノ銀ペースト４２を硬化させ、ヒートパイプ３０とベアチップ１０や放熱デバイス２０とを接合する（ヒートパイプ接合工程）。   Following the heat pipe setting step, the weight jig 43 is placed on the crushed portion 33 on the heat absorbing portion 31a side and on the crushed portion 33 on the heat radiating portion 31b side. Then, under predetermined effect conditions (for example, heating at 180 ° C. for about 2 hours while applying a pressure of about 50 g weight), the nano silver paste 42 is cured, and the heat pipe 30 is joined to the bare chip 10 and the heat dissipation device 20 (heat). Pipe joining process).

今回開示された実施の形態はすべての点で例示であって制限的なものではないと考えられるべきである。本発明の範囲は、上記した意味ではなく、特許請求の範囲によって示され、特許請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。   The embodiments disclosed this time are to be considered in all respects as illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

１…ヒートシンク、２…プリント基板、１０…ベアチップ、１１…表面、１２…裏面、２０…放熱デバイス、３０…ヒートパイプ、３１…溶媒伝導部、３１ａ…吸熱部、３１ｂ…放熱部、３２…溶接部、３３…圧潰部、３３ａ…上面、３３ｂ…下面、３４…貫通穴、４０…バンプ電極、４１…アンダーフィル、４２…ナノ銀ペースト、４３…オモリ治具。 DESCRIPTION OF SYMBOLS 1 ... Heat sink, 2 ... Printed circuit board, 10 ... Bare chip, 11 ... Front surface, 12 ... Back surface, 20 ... Heat dissipation device, 30 ... Heat pipe, 31 ... Solvent conduction part, 31a ... Heat absorption part, 31b ... Heat dissipation part, 32 ... Welding Part, 33: crushed part, 33a: upper surface, 33b: lower surface, 34: through hole, 40: bump electrode, 41: underfill, 42: nano silver paste, 43: weight jig.

Claims (2)

表面と裏面を有し、前記表面に複数のバンプ電極を設けた半導体素子と、
前記表面と対向し、複数の前記ンプ電極それぞれと物理的に接触するパッドを有する実装基板と、
前記半導体素子の前記裏面に接触して該半導体素子を放熱させるヒートパイプと、を備え、
該ヒートパイプは、その内部を溶媒が循環する溶媒伝導部と、該溶媒伝導部の端部分に設けられ、略平板状に形成された圧潰部と、を有し、
該圧潰部が、銀ペースト接着剤を介して前記半導体素子の前記裏面に接触している、半導体素子の放熱機構。 A semiconductor element having a front surface and a back surface, and a plurality of bump electrodes provided on the front surface;
A mounting substrate having a pad facing the surface and physically contacting each of the plurality of pump electrodes,
A heat pipe that contacts the back surface of the semiconductor element to dissipate the heat of the semiconductor element,
The heat pipe has a solvent conduction section through which the solvent circulates, and a crushed section provided at an end portion of the solvent conduction section and formed in a substantially flat plate shape,
A heat dissipation mechanism for a semiconductor device, wherein the crushed portion is in contact with the back surface of the semiconductor device via a silver paste adhesive. 前記圧潰部が、前記半導体素子の前記表面と前記裏面を結ぶ方向で貫通する貫通穴を有する、請求項１に記載の半導体素子の放熱機構。   2. The heat dissipation mechanism for a semiconductor device according to claim 1, wherein the crushing portion has a through hole penetrating in a direction connecting the front surface and the back surface of the semiconductor device. 3.
JP2018117787A 2018-06-21 2018-06-21 Heat dissipation mechanism of semiconductor element Pending JP2019220604A (en)

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