JP2019175003A - Server, control method by server and program - Google Patents

Abstract

To provide a server capable of enhancing the control reliability of a power source shared with two or more nodes in a multi-node server.SOLUTION: When receiving instruction information including an instruction to turn on a main power source, a multi-node server 1 generates a power control signal for turning on the main power source and for supplying power to a supply destination, a shared PLD for outputting the power supply control signal to a PSU that supplies power to the supply destination, and individual PLDs 103a and 103b for outputting the instruction information to the shared PLD via an I2C bus.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a server, a control method using the server, and a program.

As a server having a higher density than a rack mount server, there is a multi-node server having a plurality of nodes in a chassis. In a multi-node server, each node is physically divided except for the power supply. A PSU (Power Supply Unit) as the power source is shared between two nodes in the multi-node server. In a multi-node server, a shared PSU is generally controlled by a BMC (Baseboard Management Controller) provided in each of the two nodes. In the multi-node server, when the shared PSU is controlled by the BMC provided in each of the two nodes, the BMC provided in one of the two nodes is a master, and the BMC provided in the other of the two nodes is a slave. The BMCs communicate with each other, perform life and death monitoring, and control the PSU.
In Patent Document 1, as a related technique, the upper limit power value of each information processing device is set in each information processing device so that the sum of the upper limit power values of a plurality of information processing devices does not exceed the upper limit power value of the entire system. A technique related to a control device that sets a value in an individual power value range that includes a value in a possible predetermined range is disclosed.

JP 2017-142575 A

However, as described above, when the BMC provided in the two nodes becomes the master and the slave and controls the PSU shared by the two nodes, the communication between the two BMCs fails or the alive monitoring process fails. There is a possibility that two BMCs cannot control the PSU normally.
Therefore, there is a need for a technology that can improve the reliability of control of the power source shared by two nodes in a multi-node server.

  It is an object of each aspect of the present invention to provide a server, a control method using the server, and a program that can solve the above-described problems.

  In order to achieve the above object, according to one aspect of the present invention, a server generates and supplies a power control signal for causing a predetermined state when receiving information indicating an instruction for making a predetermined state. A shared PLD that outputs the power control signal to the PSU that supplies power first, and an individual PLD that outputs the instruction information to the shared PLD via an I2C bus.

  According to another aspect of the present invention, a control method by a server is a control method by a server including a shared PLD and an individual PLD, wherein instruction information including an instruction to set a predetermined state is transmitted via an I2C bus. Outputting to the shared PLD; generating a power control signal that causes the predetermined state when receiving the instruction information; and outputting the power control signal to a PSU that supplies power to a supply destination; including.

  According to another aspect of the present invention, a program outputs instruction information including an instruction to set a predetermined state to a shared PLD via a I2C bus to a computer of a server including a shared PLD and an individual PLD. And generating a power control signal to be brought into the predetermined state when the instruction information is received, and outputting the power control signal to the PSU that supplies power to the supply destination.

  According to each aspect of the present invention, in a multi-node server, it is possible to improve the reliability of control of a power source shared by two or more nodes.

It is a figure which shows the structure of the multi-node server by one Embodiment of this invention. It is a 1st figure which shows the processing flow of the multi-node server by one Embodiment of this invention. It is a 2nd figure which shows the processing flow of the multi-node server by one Embodiment of this invention. It is a figure which shows the minimum structure of the multi-node server by one Embodiment of this invention. It is a schematic block diagram which shows the structure of the computer which concerns on at least 1 embodiment.

<Embodiment>
Hereinafter, embodiments will be described in detail with reference to the drawings.
A multi-node server 1 (an example of a server) according to an embodiment of the present invention includes nodes 10a and 10b, interfaces (hereinafter referred to as “I / F”) 20a and 20b, a shared PLD (Programmable Logic Device) 30, and I2C ( An inter-integrated circuit (Switch) circuit 40 and a plurality of power supply units (PSUs) 50 are provided.

  The node 10a is connected to the shared PLD 30 via the I / F 20a. The node 10b is connected to the shared PLD 30 via the I / F 20b. The shared PLD 30 is connected to the PSU 50 via the I2C switch 40.

  The node 10a includes a BMC (Baseboard Management Controller) 101a, an I2C bus 102a, and a Par-N1_PLD 103a (an example of an individual PLD).

The BMC 101a is an LSI (Large Scale Integrated circuit) in which firmware for performing state control in the multi-node server 1 (hereinafter referred to as “BMC_FW”) is stored. The BMC 101a stores a power redundancy setting input by a user from, for example, a web browser. Non-redundant or redundant can be set as the power redundancy setting. Non-redundant is a setting in which the power required by the multi-node server 1 cannot be supplied if one PSU 50 fails, that is, no spare PSU 50 is prepared. Redundancy is a setting in which the power is turned on in advance for the number of redundancy so that the power required by the multi-node server 1 can be supplied even when one or more PSUs 50 are broken. The BMC 101a outputs power redundancy setting information indicating whether the power redundancy setting set in the BMC 101a itself is non-redundant or redundant to the shared PLD 30 via the Par-N1_PLD 103a. The BMC 101a includes an I2C bus port 1011a.
The I2C bus port 1011a is a port for the BMC 101a to access the PSU 50 via the I2C bus.

The Par-N1_PLD 103a is an LSI that can define and change an internal logic circuit after manufacturing. The Par-N1_PLD 103a includes a control window 1031a.
The control window 1031a is a register for the Par-N1_PLD 103a to communicate with the shared PLD 30 via the I / F 20a.
The Interrupt 104a is an interrupt signal for informing the BMC 101a that the contents of the control window 1031a of the Par-N1_PLD 103 have been changed.

  The I / F 20a is provided between the Par-N1_PLD 103a and the shared PLD 30. The I / F 20a is connected to the Par-N1_PLD 103a and the shared PLD 30.

  Similar to the node 10a, the node 10b includes a BMC 101b, an I2C bus 102b, and a Par-N2_PLD 103b (an example of an individual PLD).

The BMC 101b is an LSI in which BMC_FW that performs state control in the multi-node server 1 is stored. The BMC 101b stores a power redundancy setting input by a user from a Web browser, for example. The BMC 101b outputs power redundancy setting information indicating whether the power redundancy setting set in the BMC 101b itself is non-redundant or redundant to the shared PLD 30 via the Par-N2_PLD 103b. The BMC 101b includes an I2C bus port 1011b.
The I2C bus port 1011b is a port for the BMC 101b to access the PSU 50 via the I2C bus.

The Par-N2_PLD 103b is an LSI that can define and change an internal logic circuit after manufacturing. The Par-N2_PLD 103b includes a control window 1031b.
The control window 1031b is a register for the Par-N2_PLD 103b to communicate with the shared PLD 30 via the I / F 20b.
The Interrupt 104b is an interrupt signal for notifying the BMC 101b that the contents of the control window 1031b of the Par-N2_PLD 103 have been changed.

  The I / F 20b is provided between the Par-N2_PLD 103b and the shared PLD 30. The I / F 20b is connected to the Par-N2_PLD 103b and the shared PLD 30.

The shared PLD 30 controls the PSU 50 via the I2C bus. The shared PLD 30 receives the power redundancy setting information from each of the BMCs 101a and BMC 101b and stores the received power redundancy setting information. The shared PLD 30 operates with a standby power supply. The shared PLD 30 includes I2C bus ports 301 and 302.
Each of the I2C bus ports 301 and 302 is connected to the I2C switch 40. Each of the I2C bus ports 301 and 302 is a port used when the shared PLD 30 accesses the PSU 50.
The shared PLD 30 can access the PSU 50 via the I2C bus, and can be accessed between the I2C bus port 301 and the I2C bus port 302 when the access fails for a predetermined number of times (threshold). Attempt to continue access to PSU 50 by switching ports.

The I2C switch 40 connects the I2C bus port 301 or the I2C bus port 302 to the PSU 50.
The PSU 50 supplies power to the multi-node server 1. The PSU 50 is a main power source for the multi-node server 1.

  Next, processing of the multi-node server 1 according to an embodiment of the present invention will be described. Here, the process in which the BMC 101a turns on the main power supply of its own domain in the multi-node server 1 will be described with reference to FIGS. Here, the process of the multi-node server 1 will be described by taking the BMC 101a as an example, but the BMC 101b may perform the same process as the BMC 101a.

  When the PSU 50 is connected to a distribution board or PDU (Power Distribution Unit) via an AC cable and power is supplied from the standby power source to the multi-node server 1, the shared PLD 30 immediately controls the control window included in each node, that is, Configuration information is acquired and stored from each of the control windows 1031a and 1031b (step S1). The shared PLD 30 controls reading / writing of configuration information (step S2). The configuration information is information indicating the configuration of a supply destination device to which the PSU 50 supplies power. The shared PLD 30 always performs the processes of step S1 and step S2.

  In a situation where the shared PLD 30 is constantly performing the processing of step S1 and step S2, the BMC 101a writes instruction information including an instruction to turn on the main power supply to the control window 1031a (step S11).

The Par-N1_PLD 103a outputs the instruction information to the shared PLD 30 via the I / F 20a (Step S12).
The shared PLD 30 receives instruction information from the Par-N1_PLD 103a. When the shared PLD 30 receives the instruction information, the shared PLD 30 calculates the required number of PSUs 50 based on the configuration information and the power redundancy setting information (step S13).
The shared PLD 30 generates a power supply control signal that turns on the main power supply and supplies power to the supply destination (step S14). The shared PLD 30 outputs the generated power control signal to the calculated number of PSUs 50 through the I2C bus (step S15). At this time, for example, the shared PLD 30 assigns a number to each PSU 50 in advance, and selects the PSU 50 corresponding to the number of power supply control signals by selecting the PSU 50 corresponding to the number from the smallest number among the unused PSUs 50. PSU 50 is determined. Further, the shared PLD 30 may determine, for example, the number of PSUs 50 for outputting power control signals by randomly selecting the number of PSUs 50 from among the unused PSUs 50.
The PSU 50 that has received the power control signal from the shared PLD 30 turns on the main power and supplies power to the power supply destination.

When the shared PLD 30 outputs the power control signal, the shared PLD 30 writes a process completion notification indicating that the process is completed in the control window 1031a (step S16).
The Par-N1_PLD 103a outputs to the BMC 101a by the Interrupt 104a including the processing completion notification signal that notifies the completion of the processing (Step S17).
The BMC 101a receives a processing completion notification signal from the Par-N1_PLD 103a. Upon receiving the processing completion notification signal, the BMC 101a reads a processing completion notification from the control window 1031a (step S18).

The multi-node server 1 according to the embodiment of the present invention has been described above. In the multi-node server 1 according to the embodiment of the present invention, the Par-N1_PLD 103a outputs instruction information including an instruction to turn on the main power supply to the shared PLD 30. When the shared PLD 30 receives the instruction information, the shared PLD 30 turns on the main power supply and generates a power supply control signal for supplying power to the supply destination. The shared PLD 30 outputs the generated power control signal to the calculated number of PSUs 50 via the I2C bus.
In this way, in the multi-node server, communication via the I2C bus having higher communication reliability than LAN communication can be established, and the power control signal can be transmitted and received, which is shared by two or more nodes The reliability of power supply control can be improved.
In the multi-node server 1 according to the embodiment of the present invention, the shared PLD 30 includes a plurality of ports, and the communication path can be made redundant by switching the ports to be used according to the number of communication errors. The reliability of control of the power source shared by two or more nodes can be improved.

FIG. 4 is a diagram showing a minimum configuration of the multi-node server 1 according to the embodiment of the present invention.
As shown in FIG. 4, the multi-node server 1 includes a PLD 103 (an example of an individual PLD) and a shared PLD 30.
The PLD 103 outputs instruction information to the shared PLD 30. The instruction information is information including an instruction to turn on the main power supply.
When the shared PLD 30 receives the instruction information, the shared PLD 30 generates a power control signal and outputs the power control signal to the PSU that supplies power to the supply destination. The power supply control signal is a signal for turning on the main power supply and supplying power to the supply destination.

  In the above-described embodiment of the present invention, the multi-node server 1 has been described as including the node 10a and the node 10b. However, in another embodiment of the present invention, the multi-node server 1 includes three or more nodes, and the BMC included in each node performs the same processing as the BMC 101a according to the above-described embodiment of the present invention. May be.

  In the above-described embodiment of the present invention, the multi-node server 1 has been described on the assumption that the power control signal is a signal for turning on the main power and supplying power to the supply destination. However, in another embodiment of the present invention, the power control signal may be other than a signal for turning on the main power and supplying power to the supply destination. For example, the power control signal may be a signal that controls a function called a PSU information acquisition function that periodically acquires information from the PSU 50 and enables the BMC 101a to acquire the information. Also, the power control signal enables the BMC 101a to enable / disable the PSU 50 via the Par-N1_PLD 103a, and is disabled when the shared PLD 30 detects a PSU 50-related error such as failure of the PSU 50 or access_error of the PSU 50. The PSU 50 may be a signal that controls a function called an enabled / disabled function. Further, the power control signal is input with PWROK_signal indicating that the power supply of the PSU 50 can be turned on, detects failure (not_PWROK) indicating that the power supply of the PSU 50 cannot be turned on, and sets Par-N1_PLD. It may be a signal for controlling a function called a failure detection function of the PSU 50 to be notified to the BMC 101a. The power supply control signal may be a signal for controlling a function called a FAN control function of the PSU 50 that enables the BMC 101a to set the rotation speed of the FSU of the PSU 50 via the Par-N1_PLD 103a. The power supply control signal allows the BMC 101a to notify the power consumption corresponding to the BMC 101a via the Par-N1_PLD 103a, and the shared PLD 30 combines the power consumption corresponding to the BMC 101a and the power consumption of the shared PLD 30. Power redundancy control function that calculates the amount of power used, performs a power redundancy check based on the amount of power that can be supplied by the PSU 50 and the power redundancy mode, and notifies the BMC 101a of the results (“insufficient”, “non-redundant”, “redundant”) It may be a signal for controlling a function called. In addition, the power control signal uses the PSU 50 information acquired by the PSU information acquisition function to check the different types of PSU 50 and the different power sources. When an error is detected, the PSU 50 detects different types and different power sources. It may be a signal for controlling a function called a function.

  Note that the processing order of the processing according to the embodiment of the present invention may be changed within a range in which appropriate processing is performed.

  Each of the storage unit and other storage devices in the embodiment of the present invention may be provided anywhere within a range in which appropriate information is transmitted and received. In addition, each of the storage unit and other storage devices may exist in a range in which appropriate information is transmitted and received, and data may be distributed and stored.

Although the embodiment of the present invention has been described, the above-described multi-node server 1 and other control devices may have a computer system therein. The process described above is stored in a computer-readable recording medium in the form of a program, and the above process is performed by the computer reading and executing this program. A specific example of a computer is shown below.
FIG. 5 is a schematic block diagram illustrating a configuration of a computer according to at least one embodiment.
As shown in FIG. 5, the computer 5 includes a CPU 6, a main memory 7, a storage 8, and an interface 9.
For example, each of the above-described multi-node server 1 and other control devices is mounted on the computer 5. The operation of each processing unit described above is stored in the storage 8 in the form of a program. The CPU 6 reads the program from the storage 8 and develops it in the main memory 7 and executes the above processing according to the program. Further, the CPU 6 secures a storage area corresponding to each of the above-described storage units in the main memory 7 according to the program.

  Examples of the storage 8 include an HDD (Hard Disk Drive), an SSD (Solid State Drive), a magnetic disk, a magneto-optical disk, a CD-ROM (Compact Disc Read Only Memory), and a DVD-ROM (Digital Versatile Memory Disc). And semiconductor memory. The storage 8 may be an internal medium directly connected to the bus of the computer 5 or an external medium connected to the computer 5 via the interface 9 or a communication line. When this program is distributed to the computer 5 through a communication line, the computer 5 that has received the distribution may develop the program in the main memory 7 and execute the above processing. In at least one embodiment, the storage 8 is a non-transitory tangible storage medium.

  The program may realize part of the functions described above. Further, the program may be a so-called difference file (difference program) that can realize the above-described functions in combination with a program already recorded in the computer system.

  Although several embodiments of the present invention have been described, these embodiments are examples and do not limit the scope of the invention. These embodiments may be variously added, omitted, replaced, and changed without departing from the gist of the invention.

1 ... multi-node server 5 ... computer 6 ... CPU
7 ... Main memory 8 ... Storage 9, 20a, 20b ... Interface 10a, 10b ... Node 30 ... Shared PLD
40 ... I2C switch 50 ... PSU
101a, 101b ... BMC
102a, 102b ... I2C bus 103 ... PLD
103a ... Par-N1_PLD
103b ... Par-N2_PLD
104a, 104b ... Interrupt
1011a, 1011b ... I2C bus ports 1031a, 1031b ... Control Window

In order to achieve the above object, according to one aspect of the present invention, a server includes a plurality of ports, and when receiving instruction information including an instruction to set a predetermined state, the power supply control to set the predetermined state A shared PLD that generates a signal and outputs the power supply control signal to a PSU that supplies power to a supply destination, wherein the PSU is accessed using one of the plurality of ports, and the access is performed A shared PLD that switches the one port to another one of the plurality of ports when it fails more than a predetermined number of times, and an individual PLD that outputs the instruction information to the shared PLD via an I2C bus; Is provided.

According to another aspect of the present invention, a control method by a server is a control method by a server including a shared PLD having a plurality of ports and an individual PLD, and includes instruction information including an instruction to set a predetermined state. When outputting to the shared PLD via the I2C bus and receiving the instruction information, a power control signal for generating the predetermined state is generated, and the power control signal is supplied to the PSU that supplies power to the supply destination. Output, and when the PSU is accessed using one of the plurality of ports and the access fails more than a predetermined number of times, the one port is separated from the plurality of ports. Switching to one port .

According to another aspect of the present invention, a program sends instruction information including an instruction to set a predetermined state to a computer of a server including a shared PLD having a plurality of ports and an individual PLD via the I2C bus. and outputting the shared PLD, and that when receiving the instruction information, the generated power control signal to a predetermined state, and outputs the power control signal to the PSU to supply power to the supply destination, a plurality The PSU is accessed using one of the ports, and when the access fails for a predetermined number of times, the one port is switched to another one of the plurality of ports. And execute.

Claims (6)

A shared PLD that generates a power control signal to be put into the predetermined state when receiving instruction information including an instruction to make a predetermined state, and outputs the power control signal to a PSU that supplies power to a supply destination;
An individual PLD that outputs the instruction information to the shared PLD via an I2C bus;
A server comprising The shared PLD is:
The number of necessary PSUs is calculated based on the configuration information indicating the configuration of the supply destination device to which the PSU supplies power and the power redundancy setting information indicating how many of the PSUs are prepared as spares. Outputting the power control signal to the number of PSUs.
The server according to claim 1. The shared PLD is:
A plurality of ports, wherein one of the plurality of ports is used to access the PSU, and when the access fails a predetermined number of times, the one port is Switch to another port,
The server according to claim 1 or 2. The instruction information includes
Including instructions to turn on the main power,
The shared PLD is:
Generating a power control signal for supplying power to a supply destination by turning on the main power supply, and outputting the power control signal to a PSU that supplies power to the supply destination;
The server according to any one of claims 1 to 3. A control method by a server including a shared PLD and an individual PLD,
Outputting instruction information including an instruction to enter a predetermined state to the shared PLD via the I2C bus;
When receiving the instruction information, generating a power control signal to make the predetermined state, outputting the power control signal to a PSU that supplies power to a supply destination;
Control method by server including. In a server computer comprising a shared PLD and an individual PLD,
Outputting instruction information including an instruction to enter a predetermined state to the shared PLD via the I2C bus;
When receiving the instruction information, generating a power control signal to make the predetermined state, outputting the power control signal to a PSU that supplies power to a supply destination;
A program that executes

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