JP2019166064A5 - - Google Patents

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Publication number
JP2019166064A5
JP2019166064A5 JP2018056204A JP2018056204A JP2019166064A5 JP 2019166064 A5 JP2019166064 A5 JP 2019166064A5 JP 2018056204 A JP2018056204 A JP 2018056204A JP 2018056204 A JP2018056204 A JP 2018056204A JP 2019166064 A5 JP2019166064 A5 JP 2019166064A5
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JP
Japan
Prior art keywords
predetermined
game medal
control board
time
upper cover
Prior art date
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Granted
Application number
JP2018056204A
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Japanese (ja)
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JP6933811B2 (en
JP2019166064A (en
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Publication date
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Priority to JP2018056204A priority Critical patent/JP6933811B2/en
Priority claimed from JP2018056204A external-priority patent/JP6933811B2/en
Publication of JP2019166064A publication Critical patent/JP2019166064A/en
Publication of JP2019166064A5 publication Critical patent/JP2019166064A5/ja
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Description

本発明は、以下の解決手段によって上述の課題を解決する(かっこ書きで、対応する実施形態の構成を示す。)。
本発明は、
遊技メダル投入口(メダル投入口47)と、
ブロッカ(ブロッカ45)と、
演算機能を備えた所定のIC(メインCPU55)と、
所定の制御基板(メイン制御基板50)と、
所定の制御基板を収容する基板ケース(基板ケース56)と
を備え、
所定の状況にて、電源の供給が遮断される事象が発生した時から、当該電源の供給が遮断される事象を検知し、電源断処理を実行する時までの期間の設計値をT1(図5中、「T1」)とし、
所定の状況にて、遊技メダル投入口から遊技メダルが投入される場合における、当該遊技メダルが投入される時から、当該遊技メダルがブロッカに到達する直前までの期間の設計値をT2(明細書「0227」に記載の「T2’」に相当)としたとき、
T1<T2
となっており、
基板ケースは上カバー(上カバー57)と下カバー(下カバー58)とから構成されており、
上カバーの或る面には、上カバーの成型時のゲート跡(ゲート跡57b及び58b)を有し、
所定の制御基板の一方の面には所定のICが搭載されており、
基板ケースに所定の制御基板が収容されている状態では、上カバーを介して所定のICが視認可能となっており、
上カバーの或る面に対して垂直な方向における所定のICと重なる範囲には、ゲート跡を有さないよう構成されている
The present invention solves the above-mentioned problems by the following means (in parentheses, the configuration of the corresponding embodiment is shown).
The present invention
Game medal slot (medal slot 47) and
Blocker (blocker 45) and
A predetermined IC (main CPU 55) equipped with a calculation function and
A predetermined control board (main control board 50) and
With a board case (board case 56) that houses a predetermined control board
With
The design value of the period from when the event that the power supply is cut off occurs in a predetermined situation to the time when the event that the power supply is cut off is detected and the power supply cutoff process is executed is T1 (Fig. In 5, "T1"),
In a predetermined situation, when a game medal is inserted from the game medal insertion slot, the design value of the period from the time when the game medal is inserted to immediately before the game medal reaches the blocker is T2 (specification). Corresponds to "T2'" described in "0227")
T1 <T2
And
The board case is composed of an upper cover (upper cover 57) and a lower cover (lower cover 58).
On one surface of the upper cover, there are gate marks (gate marks 57b and 58b) at the time of molding the upper cover.
A predetermined IC is mounted on one surface of a predetermined control board.
When the predetermined control board is housed in the board case, the predetermined IC can be visually recognized through the upper cover.
It is configured so that there is no gate mark in the range overlapping the predetermined IC in the direction perpendicular to a certain surface of the upper cover .

Claims (1)

遊技メダル投入口と、
ブロッカと、
演算機能を備えた所定のICと、
所定の制御基板と、
所定の制御基板を収容する基板ケースと
を備え、
所定の状況にて、電源の供給が遮断される事象が発生した時から、当該電源の供給が遮断される事象を検知し、電源断処理を実行する時までの期間の設計値をT1とし、
所定の状況にて、遊技メダル投入口から遊技メダルが投入される場合における、当該遊技メダルが投入される時から、当該遊技メダルがブロッカに到達する直前までの期間の設計値をT2としたとき、
T1<T2
となっており、
基板ケースは上カバーと下カバーとから構成されており、
上カバーの或る面には、上カバーの成型時のゲート跡を有し、
所定の制御基板の一方の面には所定のICが搭載されており、
基板ケースに所定の制御基板が収容されている状態では、上カバーを介して所定のICが視認可能となっており、
上カバーの或る面に対して垂直な方向における所定のICと重なる範囲には、ゲート跡を有さないよう構成されている
遊技機。
Game medal slot and
With a blocker
A predetermined IC with a calculation function and
With a given control board
With a board case that houses a predetermined control board
With
In a predetermined situation, the design value of the period from the time when the power supply cutoff event occurs to the time when the power supply cutoff event is detected and the power supply cutoff process is executed is set to T1.
When the design value of the period from the time when the game medal is inserted to the time immediately before the game medal reaches the blocker is T2 when the game medal is inserted from the game medal insertion slot in a predetermined situation. ,
T1 <T2
And
The board case consists of an upper cover and a lower cover.
On one side of the top cover, there is a gate mark when the top cover is molded,
A predetermined IC is mounted on one surface of a predetermined control board.
When the predetermined control board is housed in the board case, the predetermined IC can be visually recognized through the upper cover.
A gaming machine configured so as not to have a gate mark in a range overlapping a predetermined IC in a direction perpendicular to a certain surface of the upper cover.
JP2018056204A 2018-03-23 2018-03-23 Pachinko machine Active JP6933811B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2018056204A JP6933811B2 (en) 2018-03-23 2018-03-23 Pachinko machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2018056204A JP6933811B2 (en) 2018-03-23 2018-03-23 Pachinko machine

Publications (3)

Publication Number Publication Date
JP2019166064A JP2019166064A (en) 2019-10-03
JP2019166064A5 true JP2019166064A5 (en) 2021-03-04
JP6933811B2 JP6933811B2 (en) 2021-09-08

Family

ID=68105979

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018056204A Active JP6933811B2 (en) 2018-03-23 2018-03-23 Pachinko machine

Country Status (1)

Country Link
JP (1) JP6933811B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020031920A (en) * 2018-08-30 2020-03-05 サミー株式会社 Game machine

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4048190B2 (en) * 2004-06-21 2008-02-13 株式会社北電子 Slot machine
JP6353250B2 (en) * 2014-03-25 2018-07-04 株式会社三共 Game machine
JP2016019645A (en) * 2014-07-15 2016-02-04 株式会社大一商会 Game machine

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