JP2019165373A - Image forming apparatus and program - Google Patents

Abstract

To solve the problem in which, since it takes time to change an operation mode of peripheral image forming hardware, if a clock frequency of a processor is changed at the same time as changing to the operating mode, power consumption until a change to a desired operation mode is completed cannot be managed.SOLUTION: Peripheral image forming hardware such as a scanner 125 and a printer 126 has a first image forming operation mode and a second operation mode that is different from the first operation mode. When a controller 124 changes a setting from the first operation mode to the second operation mode, upon the completion of the change to the second operation mode, the controller controls so that a clock frequency of a CPU is different.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an image forming apparatus and a program.

  Patent Document 1 describes an image forming apparatus that balances PDL data development processing and image forming processing while suppressing power consumption. In response to the amount of image data stored in the storage means that is not used in the image forming process being equal to or greater than the first threshold, the processing speed of the development process is changed from the second processing speed to the second processing speed. The developing unit is controlled so as to decrease the processing speed to 1, and the image forming unit is controlled so as to increase the image forming speed of the image forming process from the first image forming speed to the second image forming speed.

JP 2008-238592 A

  When reducing the processing speed of the CPU as the developing means from the second processing speed to the first processing speed and increasing the processing speed of the printer as the image forming means from the first processing speed to the second processing speed. Since a certain transition time is required until the printer actually shifts from the first processing speed to the second processing speed, in the configuration in which the CPU processing speed is reduced at the same time as the printer processing speed is changed, the printer There is a problem that power consumption cannot be managed until the processing speed is completely changed to the desired speed.

  The present invention requires a certain amount of time to change the operation mode of peripheral image forming hardware of a processor (CPU or the like). Compared with the case where the clock frequency of the processor is switched at the same time as changing to the desired operation mode. It is to provide a technology capable of appropriate power consumption management.

  According to the first aspect of the present invention, the peripheral image forming hardware of the processor has a first operation mode and a second operation mode in which the operation differs from the first operation mode, and the second operation from the first operation mode. The image forming apparatus includes a control unit that controls the clock frequency of the processor to be different when the change to the second operation mode is completed when the mode is changed.

  According to a second aspect of the present invention, the control unit sets the clock frequency to the first clock frequency when the peripheral image forming hardware is in the first operation mode, and when the change to the second operation mode is completed. The clock frequency is a second clock frequency different from the first clock frequency, and the clock frequency is different from the first clock frequency and the second clock frequency during a period of switching from the first operation mode to the second operation mode. The image forming apparatus according to claim 1, wherein the image forming apparatus is controlled to a 3-clock frequency.

According to a third aspect of the present invention, the second operation mode has an operation speed higher than that of the first operation mode, and the control unit includes the first clock frequency, the second clock frequency, and the first operation mode. 3 clock frequency,
3. The image forming apparatus according to claim 2, wherein control is performed such that the first clock frequency> the second clock frequency> the third clock frequency.

According to a fourth aspect of the present invention, the second operation mode has an operation speed higher than that of the first operation mode, and the control unit includes the first clock frequency, the second clock frequency, and the first operation frequency. 3 clock frequency,
3. The image forming apparatus according to claim 2, wherein control is performed such that the second clock frequency> the first clock frequency> the third clock frequency.

According to a fifth aspect of the present invention, the first operation mode is an operation stop, the second operation mode is an operating mode, and the control unit is configured to control the first clock frequency, the second clock frequency, and the second operation mode. 3 clock frequency,
3. The image forming apparatus according to claim 2, wherein control is performed such that the second clock frequency> the third clock frequency> the first clock frequency.

  According to a sixth aspect of the present invention, the peripheral image forming hardware includes at least first image forming hardware and second image forming hardware, and the control unit includes the first image forming hardware and the second image forming hardware. The image forming apparatus according to claim 1, wherein control is performed so that a clock frequency of the processor is different according to an operation mode of image forming hardware.

  According to a seventh aspect of the present invention, the first operation mode of the first image forming hardware is stopped, the second operation mode is operating, and the first operation mode of the second image forming hardware is Is stopped, the second operation mode is in operation, and the control unit sets the clock frequency when both the first image forming hardware and the second image forming hardware are in the first operation mode. A first clock frequency, and when both the first image forming hardware and the second image forming hardware are in the second operation mode, the clock frequency is set to a second clock frequency different from the first clock frequency; At least one of the first image forming hardware and the second image forming hardware is switched from the first operation mode to the second operation mode. The period is the image forming apparatus according to claim 6 for controlling the third clock frequency different to the clock frequency and the first clock frequency and the second clock frequency.

  According to an eighth aspect of the present invention, the control unit includes a period until the first image forming hardware changes from the first operation mode to the second operation mode, and the second image forming hardware includes the second image forming hardware. The image forming apparatus according to claim 6, wherein the clock frequency of the processor is controlled to be different according to a longer period of the period from the first operation mode to the second operation mode. .

  According to a ninth aspect of the present invention, in the first aspect, the control unit controls the clock frequency of the processor to be different according to a change completion notification to the second operation mode from the peripheral image forming hardware. The image forming apparatus described.

  According to a tenth aspect of the present invention, in the computer, when the peripheral image forming hardware of the processor is in the first operation mode, the clock frequency of the processor is set to the first clock frequency; and the peripheral image forming hardware Setting the processor clock frequency to a second clock frequency different from the first clock frequency when the peripheral image forming hardware is in the first operation mode. A program for executing a step of setting a clock frequency of the processor to a third clock frequency different from the first clock frequency and the second clock frequency during a period of switching from the first operation mode to the second operation mode.

  According to the first to tenth aspects of the present invention, it is possible to appropriately reduce the power consumption as compared with a case where the clock frequency of the processor is switched at the same time when the operation mode of the peripheral image forming hardware of the processor is changed to a desired operation mode. It can be managed.

  According to the sixth aspect of the present invention, when there are a plurality of peripheral image forming hardware, the clock frequency of the processor can be controlled in accordance with these operation modes.

It is a configuration block diagram of an embodiment. It is a functional block diagram of an embodiment. It is operation mode switching explanatory drawing of embodiment. It is another operation mode switching explanatory drawing of an embodiment. FIG. 10 is still another operation mode switching explanatory diagram of the embodiment. FIG. 10 is still another operation mode switching explanatory diagram of the embodiment. FIG. 10 is still another operation mode switching explanatory diagram of the embodiment. It is a processing flowchart of an embodiment. It is another process flowchart of embodiment. It is operation mode switching explanatory drawing of a modification.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a configuration block diagram of an image forming system including an image forming apparatus according to the present embodiment.

  The image forming system includes a terminal device 10 and an image forming device 12. The terminal device 10 and the image forming apparatus 12 are connected via a communication line 14, and the communication line 14 is a data communication network such as a LAN (local area network). The communication line 14 may be either wired or wireless.

  The terminal device 10 is a PC, a smartphone, or the like, and transmits a print job including a document print command in accordance with a user instruction.

  The image forming apparatus 12 includes an operation unit 121, a communication interface (I / F) 122, a storage device 123, a controller 124, a scanner 125, and a printer 126.

  The operation unit 121 includes a touch panel, and displays application icons corresponding to various functions (copy, scan, fax, mail, etc.) provided in the image forming apparatus 12 in response to a control command from the controller 124. For example, a copy icon corresponding to a copy function, a fax icon corresponding to a fax, a scan-to-mail icon corresponding to a function of scanning a document and sending it by e-mail, and the like. The user instructs the controller 124 to execute various jobs by touching the operation unit 121.

  The communication I / F 122 receives a print job or the like from the terminal device 10 via the communication line 14 and outputs it to the controller 124. The job processing result is returned to the terminal device 10 via the communication line 14.

  The storage device 123 is configured by an HDD (Hard Disk Drive), an SSD (Solid State Drive), or the like, and stores raster image data and a processing program.

  A controller 124 including one or more processors such as a CPU accepts a print job command or the like from the terminal device 10 via the communication I / F 122 according to a processing memory stored in a program memory such as a ROM or a storage device 123. The intermediate data is generated by interpreting the PDL data, and the drawing data (raster data) is further generated from the generated intermediate data. Further, the controller 124 executes various application commands such as copy, scan, fax, and mail received from the operation unit 121.

  The scanner 125 functions as peripheral image forming hardware of the processor, reads an image from a document, and converts it into electronic data. Here, “peripheral image forming hardware of the processor” means hardware related to image formation provided around the processor and operating to supply data to the processor or receiving data from the processor. To do.

  The printer 126 functions as peripheral image forming hardware of the processor, and has, for example, a known inkjet configuration and prints drawing data on paper. Liquid or molten solid ink is discharged from a nozzle or the like, and recording is performed on paper, film, or the like. As a method for ejecting ink, a drop-on-demand method (pressure pulse method) in which ink is ejected using electrostatic attraction force, and ink is ejected using pressure generated by forming and growing bubbles by high heat. There are thermal ink jet methods. The recording head includes, for example, a head that discharges cyan ink, a head that discharges magenta ink, a head that discharges yellow ink, and a head that discharges black ink, and each head has a line having a width at least equal to the width of the paper. A head is used. Ink droplets of each color are ejected and recorded on the intermediate transfer member by the recording head, and then transferred to paper and printed.

  In addition to these, a fax module, a mail module that executes an e-mail function, a paper feed module that transports paper from the paper tray to the printer 126, a document feed module that transports paper from the document tray to the fax module, a scanner An image processing accelerator that performs compression / decompression processing in conjunction with 125 may be provided.

  The image forming apparatus 12 further includes a finisher that performs punching and sorting of paper, a USB, an IC card reader, and the like, and an authentication unit that authenticates a user, a charging unit, a human sensor, a face camera, and the like. May be. The image forming apparatus 12 may be connected to the Internet and an external server (network server) via the communication line 14, and may include Ethernet (registered trademark) or WiFi.

  FIG. 2 shows a functional block diagram of the controller 124. The controller 124 includes a clock frequency control unit 124a, a scanner / printer operation speed control unit 124b, a job execution unit 124c, and a memory 124d as functional blocks.

  The clock frequency control unit 124a functions as a control unit and controls the operation clock frequency of the CPU. The operation clock frequency of the CPU is obtained by multiplying the system clock by a PLL (Phase Locked Loop), and the operation clock frequency can be changed by changing the multiplication factor of the PLL. The clock frequency control unit 124a variably controls the clock frequency of the CPU according to the operation speed of the scanner 125 or the printer 126 as the peripheral image forming hardware of the CPU. Specifically, the switching table stored in the memory 124d is referred to control the clock frequency according to the operating speed of the scanner 125 and the printer 126.

  The scanner / printer operation speed control unit 124 b controls the operation speeds of the scanner 125 and the printer 126. The operation speeds of the scanner 125 and the printer 126 are determined by the operation of the operation unit 121 by the user, or are determined according to the job load to be executed.

  The memory 124d is a built-in memory of the controller 124 and stores a switching table. The switching table defines the correspondence between the CPU clock frequency and the operation speed of the peripheral image forming hardware. Specifically, the switching table includes a correspondence relationship between the CPU clock frequency and the operation speed of the scanner 125, a correspondence relationship between the CPU clock frequency and the operation speed of the printer 126, a CPU clock frequency and the operation speed of the scanner 125. A correspondence relationship with the operation speed of the printer 126 is defined. In the present embodiment, the switching table defines the correspondence between the CPU clock frequency and the peripheral image forming hardware operating speed, and the correspondence between the CPU clock frequency and the peripheral image forming hardware operating speed switching period. Stipulate. This means that there is a CPU clock frequency particularly corresponding to the operation speed switching period of the peripheral image forming hardware.

  The job execution unit 124c performs various jobs such as a print job under the CPU clock frequency set by the clock frequency control unit 124a and the peripheral image forming hardware operation speed set by the scanner / printer operation speed control unit 124b. And copy jobs.

  The clock frequency control unit 124a, the scanner / printer operation speed control unit 124b, and the job execution unit 124c are realized by the CPU reading and executing the processing program stored in the program memory.

  Prior to describing the relationship between the CPU clock frequency and the peripheral image forming hardware operating speed in the present embodiment, the conventional relationship between the CPU clock frequency and the peripheral image forming hardware operating speed will be described.

  FIG. 3 is a timing chart showing the relationship between the conventional CPU clock frequency and the peripheral image forming hardware operating speed. FIG. 3A shows temporal changes in the CPU clock frequency, and FIG. 3B shows the operation speed (printing speed) of the printer 126 as peripheral image forming hardware.

  When the time required for the PDL data development process becomes a bottleneck in printing performance, the printing performance of the printer 126 is slightly reduced to reduce power consumption, and the CPU clock frequency is increased by that amount to increase the PDL data development performance. By increasing the power consumption, it is possible to reduce the amount of decrease in printing performance while suppressing an increase in power consumption of the entire apparatus. However, since it is difficult to accurately know the time required to expand the PDL data until the PDL data is actually expanded, the raster image data accumulated in the storage device 123 after the PDL data expansion processing is completed. The power consumption of the printer 126 and the CPU clock frequency are adjusted according to the number of pages.

Now, the CPU clock frequency is switched in two steps, high and low, the CPU power consumption when the CPU clock frequency is high is A1, and the CPU power consumption when the CPU clock frequency is low is A2 (A1> A2). To do. In addition, the printing speed is switched between two levels of high and low, the power consumption of the printer 126 is B1 when the printing speed is high (fast), and the power consumption of the printer 126 is B2 when the printing speed is low (slow) (B1> B2). And Let C be the power consumed by the entire apparatus other than the CPU and printer 126, and M be the upper limit power consumption that can be consumed by the entire apparatus. At this time, the CPU clock frequency and the printing speed in the printer 126 are determined in advance so that the following relational expression is satisfied.
A1 + B1 + C> M
A1 + B2 + C <M
A2 + B1 + C <M
Thus, if at least one of the CPU clock frequency and the printer 126 printing speed is lowered, the power consumption of the entire apparatus can be suppressed to the maximum power consumption M or less.

  As shown in FIG. 3, at the start of a print job including PDL data, the clock frequency control unit 124a increases the clock frequency of the CPU to improve the development performance of PDL data. In addition, the scanner / printer operation speed control unit 124b sets the printing speed of the printer 126 to be low so as to perform power saving control.

  When the number of unprinted pages stored in the storage device 123 exceeds the threshold value, the scanner / printer operation speed control unit 124b switches the printing speed of the printer 126 to a higher speed. At the same time, the clock frequency control unit 124a reduces the CPU clock frequency to reduce the power consumption by the CPU. Thereafter, the CPU clock frequency is lowered, the printing speed of the printer 126 is increased, and the PDL data expansion process and the printing operation are executed in parallel.

  Thereafter, when the printing speed of the printer 126 exceeds the PDL data development capability and the number of pages of unprinted raster image data stored in the storage device 123 decreases and becomes smaller than the threshold value, the scan / printer operation speed control unit 124b switches the printing speed of the printer 126 to a low speed to control the power saving of the printer 126. At the same time, the clock frequency control unit 124a increases the CPU clock frequency to improve the performance of developing PDL data, and performs the subsequent processing of developing PDL data at high speed.

  As described above, in the configuration in which the operation speed of the printer 126 is switched from low speed to high speed and at the same time the CPU clock frequency is switched from high frequency to low frequency, a certain time is required until the operation speed of the printer 126 is actually switched from low speed to high speed. Since a (switching period) occurs, if the CPU clock frequency is switched to a low frequency during this switching period, the clock frequency is not appropriate for the operation speed of the printer 126, and power consumption in the CPU is wasted. .

  Similarly, in the configuration in which the operation speed of the printer 126 is switched from the high speed to the low speed and at the same time the CPU clock frequency is switched from the low frequency to the high frequency, the operation speed of the printer 126 is actually constant until the high speed is switched to the low speed. Since time (switching period) occurs, if the clock frequency of the CPU is switched to a high frequency during this switching period, the clock frequency is not appropriate for the operation speed of the printer 126, and power consumption in the CPU is wasted. Become.

  On the other hand, FIG. 4 is a timing chart showing the relationship between the clock frequency of the CPU and the operating speed of the peripheral image forming hardware in this embodiment. 4A shows temporal changes in the CPU clock frequency, and FIG. 4B shows the operation speed (printing speed) of the printer 126 as peripheral image forming hardware.

The operation speed of the printer 126 is switched in two steps, high and low, but the CPU clock frequency is switched in three steps: a first low frequency, a second low frequency, and a high frequency. here,
The relationship is first low frequency <second low frequency <high frequency.

  When the operation speed of the printer 126 is low, the CPU clock frequency is set to a high frequency. When the operation speed of the printer 126 is high, the CPU clock frequency is controlled to the second low frequency. In the switching period in which the operation speed is switched from low speed to high speed and in the switching period in which the operation speed of the printer 126 is switched from high speed to low speed, the clock frequency control unit 124a controls the clock frequency of the CPU to the first low frequency. A clock frequency when the operating speed of the printer 126 is low, a clock frequency when the operating speed of the printer 126 is high, a clock frequency when the operating speed of the printer 126 is high, a switching period during which the operating speed of the printer 126 is switched from low speed to high speed, When the clock frequency in the switching period in which the operation speed of the printer 126 is switched from high speed to low speed is the third clock frequency, the high frequency corresponds to the first clock frequency, the second low frequency corresponds to the second clock frequency, One low frequency corresponds to the third clock frequency.

  More specifically, when the operation speed of the printer 126 is switched from low speed to high speed, the switching period is switched from the timing at which the operation speed change command is output from the scanner / printer operation speed control unit 124b to the high speed from the printer 126. Since this is the period until the completion notification is received, the clock frequency control unit 124a is configured to output the CPU clock frequency at the timing when the control command for switching the operation speed from low to high is output from the scanner / printer operation speed control unit 124b. Is switched from the high frequency to the first low frequency, and the clock frequency of the CPU is switched from the first low frequency to the second low frequency at the timing when the notification of completion of the high speed switching from the printer 126 is received.

  The switching period when the operation speed of the printer 126 is switched from high speed to low speed is a notification of completion of switching from the printer 126 to the low speed from the timing when the operation speed change command is output from the scanner / printer operation speed control unit 124b. Since this is the period until the reception timing, the clock frequency control unit 124a sets the CPU clock frequency to the second at the timing when the control command for switching the operation speed from high speed to low speed is output from the scanner / printer operation speed control section 124b. The CPU clock frequency is switched from the first low frequency to the high frequency at the timing when the low frequency is switched to the first low frequency and the low speed switching completion notification from the printer 126 is received.

  In this way, wasteful power consumption in the switching period can be suppressed by switching the CPU clock frequency to the first low frequency in the switching period.

The correspondence relationship between the CPU clock frequency defined by the switching table and the operation speed of the printer 126 is shown below.
(CPU clock frequency, printer 126 operating speed) = (high frequency, low speed), (second low frequency, high speed), (first low frequency, switching period)

  In FIG. 4, the CPU clock frequency is controlled to be the same first low frequency in the two switching periods, but the first low frequency in the switching period when the operation speed of the printer 126 is switched from the low speed to the high speed. And the value of the first low frequency in the switching period when the operation speed of the printer 126 is switched from high speed to low speed may be different from each other. For example, the value of the first low frequency in the switching period when the operation speed of the printer 126 is switched from the high speed to the low speed is set to a value of the first low frequency in the switching period when the operation speed of the printer 126 is switched from the high speed to the low speed. Increase it. This is because when the clock frequency in the switching period in which the operation speed of the printer 126 is switched from low speed to high speed and in the switching period in which the operation speed of the printer 126 is switched from high speed to low speed is the third clock frequency, the former case and the latter case. This means that the value of the third clock frequency can be different from each other.

  FIG. 5 is a timing chart showing another relationship between the clock frequency of the CPU and the operation speed of the peripheral image forming hardware in this embodiment. FIG. 5A shows temporal changes in the CPU clock frequency, and FIG. 5B shows the operation speed (scanning speed) of the scanner 125 as peripheral image forming hardware.

  In the case where the electronic data obtained by scanning with the scanner 125 is processed and the CPU performs OCR processing, fax processing, or mail transmission processing, the scanner 125 is within the allowable range of power consumption of the entire apparatus. When the scanning speed of the CPU increases, the CPU clock frequency is also operated accordingly to increase the processing speed.

The operation speed of the scanner 125 is switched in two steps, high and low, and the CPU clock frequency is switched in three steps, a first low frequency, a second low frequency, and a high frequency. here,
The relationship is first low frequency <second low frequency <high frequency.

  When the operation speed of the scanner 125 is low, the CPU clock frequency is set to the second low frequency. When the operation speed of the scanner 125 is high, the CPU clock frequency is controlled to a high frequency. In the switching period in which the operation speed is switched from low speed to high speed and in the switching period in which the operation speed of the scanner 125 is switched from high speed to low speed, the clock frequency control unit 124a controls the CPU clock frequency to the first low frequency.

  More specifically, the switching period when the operation speed of the scanner 125 is switched from low to high is switched from the timing at which the operation speed change command is output from the scanner / printer operation speed control unit 124b to the high speed from the scanner 125. Since this is the period until the completion notification is received, the clock frequency control unit 124a is configured to output the CPU clock frequency at the timing when the control command for switching the operation speed from low to high is output from the scanner / printer operation speed control unit 124b. Is switched from the second low frequency to the first low frequency, and the clock frequency of the CPU is switched from the first low frequency to the high frequency at the timing when the notification of the completion of the high speed switching from the scanner 125 is received.

  The switching period when the operation speed of the scanner 125 is switched from high speed to low speed is a notification of completion of switching from the scanner 125 to low speed from the timing when the operation speed change command is output from the scanner / printer operation speed control unit 124b. Since it is a period until the reception timing, the clock frequency control unit 124a sets the CPU clock frequency to the high frequency at the timing when the control command for switching the operation speed from high speed to low speed is output from the scanner / printer operation speed control unit 124b. From the first low frequency to the second low frequency at the timing when the low speed switch completion notification from the scanner 125 is received.

  In this way, wasteful power consumption in the switching period can be suppressed by switching the CPU clock frequency to the first low frequency in the switching period.

The correspondence relationship between the CPU clock frequency defined by the switching table and the operation speed of the scanner 125 is shown below.
(CPU clock frequency, scanner 125 operating speed) = (second low frequency, low speed), (high frequency, high speed), (first low frequency, switching period)

  4 and 5, attention is paid to the switching of the operation speed of the printer 126 and the scanner 125 as the peripheral image forming hardware of the CPU. However, the operation mode of the peripheral image forming hardware of the CPU is not limited to the speed. There can be switching between operation stop and operation. It can be said that the operation stop is a power saving mode and the normal operation mode is in operation. The CPU clock frequency can be switched in accordance with the switching of the operation state of the peripheral image forming hardware.

  FIG. 6 is a timing chart showing the relationship between the CPU clock frequency and the operation state of the peripheral image forming hardware in this embodiment. 6A shows a temporal change in the CPU clock frequency, and FIG. 6B shows a temporal change in the operating state of the peripheral image forming hardware, for example, the scanner 125.

The operation state of the scanner 125 is switched between two states of operation (normal operation) and operation stop (power saving mode). The CPU clock frequency is divided into three stages of a first low frequency, a second low frequency, and a high frequency. Switch. here,
<Second low frequency <First low frequency <High frequency.

  When the operation state of the scanner 125 is stopped, the CPU clock frequency is set to the second low frequency. When the operation state of the scanner 125 is in operation, the CPU clock frequency is controlled to a high frequency. The clock frequency control unit 124a controls the CPU clock frequency to the first low frequency in the switching period in which the operation state of 125 switches from the stop to the operation and the switching period in which the operation state of the scanner 125 switches from the operation to the stop. .

  More specifically, the switching period when the operation state of the scanner 125 is switched from the stop to the operation is from the timing at which the operation state change command is output from the scanner / printer operation speed control unit 124b to the operation from the scanner 125. Therefore, the clock frequency control unit 124a determines that the CPU / CPU operation speed control unit 124b outputs a control command for switching the operation state from stop to operation. The clock frequency of the CPU is switched from the second low frequency to the first low frequency, and the clock frequency of the CPU is switched from the first low frequency to the high frequency at the timing when the notification of switching completion during operation from the scanner 125 is received.

  Further, the switching period when the operation state of the scanner 125 is switched from being operated to being stopped is a notification of completion of switching from the scanner 125 to the stop from the timing at which the operation state change command is output from the scanner / printer operation speed control unit 124b. Therefore, the clock frequency control unit 124a sets the CPU clock frequency at the timing when the scanner / printer operation speed control unit 124b outputs a control command for switching the operation state from operating to stop. The high frequency is switched to the first low frequency, and the clock frequency of the CPU is switched from the first low frequency to the second low frequency at the timing when the notification of completion of switching from the scanner 125 to the stop is received.

  In this way, wasteful power consumption in the switching period can be suppressed by switching the CPU clock frequency to the first low frequency in the switching period.

The correspondence relationship between the CPU clock frequency specified by the switching table and the operating state of the scanner 125 is shown below.
(CPU clock frequency, scanner 125 operating state) = (second low frequency, stopped), (high frequency, operating), (first low frequency, switching period)

  In FIG. 6, attention is paid to switching of the operation state of the scanner 125 as the peripheral image forming hardware of the CPU, but attention is paid to switching of operation states of a plurality of peripheral image forming hardware, for example, the scanner 125 and the printer 126. The clock frequency of the CPU may be switched and controlled. The scanner 125 and the printer 126 can operate simultaneously when executing a copy job in the image forming apparatus 12.

  FIG. 7 is a timing chart showing the relationship between the CPU clock frequency and the operation state of the peripheral image forming hardware in this embodiment. 7A shows a temporal change in the CPU clock frequency, FIG. 7B shows a temporal change in the operating state of the peripheral image forming hardware, for example, the scanner 125, and FIG. 7C shows a peripheral image formation. This is a time change of the operating state of hardware, for example, the printer 126.

The operation states of the scanner 125 and the printer 126 are switched between two states of operation (normal operation) and operation stop (power saving mode), respectively. The CPU clock frequency is the first low frequency, the second low frequency, and the first low frequency. Switching is performed in four stages of high frequency and second high frequency. here,
There is a relationship of second low frequency <first low frequency <first high frequency <second high frequency.

  When the operation state of the scanner 125 and the printer 126 is stopped, the CPU clock frequency is set to the second low frequency. When the operation state of the scanner 125 and the printer 126 is active, the CPU clock frequency is set to the second low frequency. In the switching period in which the operation state of the scanner 125 and the printer 126 is switched from the stop to the operation, and in the switching period in which the operation state of the scanner 125 and the printer 126 is switched from the operation to the stop, the clock frequency control unit 124a is controlled. Controls the CPU clock frequency to the first low frequency or the first high frequency.

  More specifically, during the switching period (operation setting period) in which the operation state of the scanner 125 is switched from the stop state to the operation state, and the operation state of the printer 126 is in the stop state, the clock frequency control unit 124a The clock frequency is controlled to the first low frequency. Further, in the switching period (operation setting period) in which the operation state of the scanner 125 is in operation (for example, during the scanning of the first page) and the operation state of the printer 126 is switched from stop to operation, the clock frequency control unit 124a. Controls the clock frequency of the CPU to the first high frequency. When the scanner 125 is operating (for example, scanning the second page) and the operating state of the printer 126 is operating (during printing of the first page), the clock frequency control unit 124a sets the CPU clock frequency to the first frequency. Control to 2 high frequency.

  Similarly, in a switching period in which the operation state of the scanner 125 is switched from being operated to being stopped, and in a period in which the operation state of the printer 126 is being operated (for example, printing N pages), the clock frequency control unit 124 a The clock frequency is controlled to the first high frequency. Further, in the switching period in which the operation state of the scanner 125 is stopped and the operation state of the printer 126 is switched from being operated to being stopped, the clock frequency control unit 124a controls the clock frequency of the CPU to the first low frequency.

  In this way, wasteful power consumption in the switching period can be suppressed by switching the clock frequency of the CPU to the first low frequency or the first high frequency in the switching period of the plurality of peripheral hardware.

The correspondence relationship between the CPU clock frequency defined by the switching table and the operating states of the scanner 125 and the printer 126 is shown below.
(CPU clock frequency, scanner 125 operating state, printer 126 operating state) = (second low frequency, stop, stop), (first low frequency, switching period, stop), (first high frequency, operating) , Switching period), (second high frequency, operating, operating), (first high frequency, switching period, operating), (first low frequency, stop, switching period)

  FIG. 8 shows a processing flowchart of the present embodiment. This is processing corresponding to the timing chart of FIG.

  First, the clock frequency control unit 124a sets the CPU clock frequency to the first low frequency (S101).

  Next, for example, the job execution unit 124c acquires print job information from the terminal device 10 (S102).

  Next, the clock frequency control unit 124a determines whether or not it is necessary to set the CPU clock frequency to a high frequency and to set the printing speed as the operation mode of the printer 126 to a low speed based on the print job information. Determine (S103). This determination can be made with high or low processing load such as whether the content of the print job is color or black and white, the resolution is high or low, single-sided or double-sided, and the paper size is A4 or A3. Further, as described above, the CPU clock frequency may always be set to a high frequency at the start of a print job, and the printing speed of the printer 126 may be set to a low speed.

  When it is necessary to set the CPU clock frequency to a high frequency and to set the printing speed of the printer 126 to a low speed (YES in S103), the clock frequency control unit 124a is the same as the previous job. It is determined whether the printing speed is reached or not (S104).

  If the print speed is not the same as the previous print job (NO in S104), the scanner / printer operation speed control unit 124b switches the operation speed of the printer 126 to a low speed (S105). Then, the clock frequency control unit 124a determines whether or not the operation speed of the printer 126 has been switched to a low speed (S106).

  The switching is not completed until the switching command is output from the scanner / printer operation speed control unit 124b and the low-speed switching completion notification is received from the printer 126 (NO in S106). During this period, the CPU clock frequency is The first low frequency set in S101 is maintained. On the other hand, when the low-speed switching completion notification is received from the printer 126 (YES in S106), the clock frequency control unit 124a sets the clock frequency from the first low frequency to the high frequency (S107), and executes the job. The print job is executed by the unit 124c (S108). That is, the intermediate data is generated by interpreting the PDL data, and further drawing data (raster data) is generated from the generated intermediate data and printed.

  Then, the job execution unit 124c determines whether there is a next print job (S109), and if there is, repeats the processing from S101.

  On the other hand, if it is determined in S103 that the print job requires the CPU to be high speed and the operation speed of the printer 126 to be low, but the operation speed of the printer 126 in the previous print job is already set to low speed. (YES in S104), since it is not necessary to switch the speed of the printer 126 to a low speed, the processing of S105 to S106 is skipped, and the clock frequency control unit 124a sets the clock frequency to a high frequency (S107), and the job execution unit A print job is executed at 124c (S108).

  If it is determined that the print job does not require the CPU to operate at a high speed and the printer 126 to operate at a low speed (NO in S103), that is, the CPU needs to operate at a low speed and the printer 126 must operate at a high speed. If it is determined as a job, the clock frequency control unit 124a determines whether the same printing speed as the previous job is present (S110).

  If the print speed is not the same as the previous print job (NO in S110), the scanner / printer operation speed control unit 124b switches the operation speed of the printer 126 to a high speed (S111). Then, the clock frequency control unit 124a determines whether or not the operation speed of the printer 126 has been switched to a high speed (S112).

  The switching is not completed until the switching instruction is output from the scanner / printer operation speed control unit 124b and the high-speed switching completion notification is received from the printer 126 (NO in S112). During this period, the CPU clock frequency is The first low frequency set in S101 is maintained. On the other hand, when the high-speed switching completion notification is received from the printer 126 (YES in S112), the clock frequency control unit 124a sets the clock frequency from the first low frequency to the second low frequency (S113). The job execution unit 124c executes a print job (S108).

  FIG. 9 shows a process flowchart of the present embodiment. This is processing corresponding to the timing chart of FIG.

  First, the clock frequency control unit 124a sets the CPU clock frequency to the first low frequency (S201).

  Next, the scanner / printer operation speed control unit 124b sets the operation state of peripheral hardware, for example, the scanner 125 (S202).

  Next, the clock frequency control unit 124a determines whether or not the peripheral hardware operation setting has been completed (S203).

  The switching is not completed until the switching command is output from the scanner / printer operation speed control unit 124b and the switching completion notification is received from the peripheral hardware (NO in S203). During this period, the CPU clock frequency is S201. The set first low frequency is maintained. On the other hand, when the switching completion notification is received from the peripheral hardware (YES in S203), the clock frequency control unit 124a sets the clock frequency from the first low frequency to the high frequency (S204), and the job execution unit 124c. The job is executed (S205).

  Then, the job execution unit 124c determines whether or not there is a next job (S206). If there is, the process from S205 is repeated.

  On the other hand, if there is no next job (NO in S206), the clock frequency control unit 124a sets the clock frequency to the first low frequency again (S207).

  Next, the scanner / printer operation speed control unit 124b stops the operation of the peripheral hardware (S208).

  Next, the clock frequency control unit 124a determines whether the operation of the peripheral hardware is stopped (S209).

  The stop is not completed until a stop command is output from the scanner / printer operation speed control unit 124b and a stop completion notification is received from the peripheral hardware (NO in S209). During this period, the CPU clock frequency is S207. The set first low frequency is maintained. On the other hand, when the stop completion notification is received from the peripheral hardware (YES in S209), the clock frequency control unit 124a sets the clock frequency from the first low frequency to the second low frequency (S210).

  The embodiments of the present invention have been described above. However, the present invention is not limited to the embodiments, and there are various cases in which the CPU clock frequency is switched and controlled according to the operation modes of a plurality of peripheral image forming hardware. Deformation is possible. Here, the “operation mode” means the operation speed of the peripheral image forming hardware and the operation state (normal operation or power saving) of the peripheral image forming hardware. Hereinafter, modified examples will be described.

<Modification 1>
When the CPU clock frequency is controlled to be switched according to the operation mode of a plurality of peripheral image forming hardware, if there is a difference in the operation mode transition time between the plurality of peripheral image forming hardware, the transition time is the longest. The clock frequency of the CPU may be switched and controlled in accordance with the peripheral image forming hardware.

  Specifically, the scanner 125 and the printer 126 exist as peripheral image forming hardware, and the switching from the stop of the printer 126 to the operation is performed more than the switching time until the scanner 125 shifts from the stop to the operation. When the time is longer, the clock frequency is controlled in accordance with the operation state of the printer 126 having a long switching time.

  FIG. 10 is a timing chart showing the relationship between the CPU clock frequency and the operation state of the peripheral image forming hardware in this case. 10A shows a temporal change in the clock frequency of the CPU, FIG. 10B shows a temporal change in the operating state of peripheral hardware, for example, the scanner 125, and FIG. 10C shows a peripheral hardware, for example, This is a time change of the operation state of the printer 126.

The operation states of the scanner 125 and the printer 126 are switched between two states of operation (normal operation) and operation stop (power saving mode), respectively. The CPU clock frequency is the first low frequency, the second low frequency, and the high frequency. Switch in three stages. here,
The second low frequency <the first low frequency <the high frequency.

  When the operation state of the scanner 125 and the printer 126 is stopped, the CPU clock frequency is set to the second low frequency. When the operation state of the scanner 125 and the printer 126 is active, the CPU clock frequency is set to the high frequency. However, in the switching period (operation setting period) in which the operation states of the scanner 125 and the printer 126 are switched from the stop state to the operation state, the clock frequency control unit 124a controls the clock frequency of the CPU to the first low frequency.

  At this time, there is a difference in switching time between the scanner 125 and the printer 126 until the transition from the stop to the operation, and the printer 126 is longer than the switching time (operation setting period) until the scanner 125 shifts from the stop to the operation. When the switching time (operation setting period) from the stop to the transition to the operation is longer, the CPU clock frequency is switched from the first low frequency to the high frequency in accordance with the operation state of the printer 126 having a long switching time. Control.

<Modification 2>
In the embodiment, as the operation mode of the peripheral image forming hardware, the stop and operation of the scanner 125 and the stop and the switch of the printer 126 are switched. However, other than this, the operation mode of the scanner 125 can be stopped, There may be operation modes such as double-sided scan, single-sided scan, color scan, black and white scan, A3 scan, and A4 scan. Further, the operation state of the printer 126 can be stopped, double-sided printing, single-sided printing, color printing, black and white printing, A3 printing, A4 printing, and the like. Therefore, the CPU clock frequency may be adaptively switched and controlled according to the combination of the operation modes of the scanner 125 and the printer 126. For example, in the switching table, the correspondence relationship between the CPU clock frequency and the operation modes of the scanner 125 and the printer 126 can be defined as follows.
(CPU clock frequency, scanner 125 operation mode, printer 126 operation mode) = (second low frequency, stop, stop), (first low frequency, switching period, stop), (first low frequency, stop, (Switching period), (first high frequency, during black and white scanning, during black and white printing), (second high frequency, during color scanning, during color printing)
However,
Second low frequency <first low frequency <first high frequency <second high frequency.

<Modification 3>
In the embodiment, the scanner 125 and the printer 126 are illustrated as peripheral image forming hardware of the CPU. However, in addition to these, the data to be processed by the CPU is supplied to the CPU, or the data processed by the CPU is received. Further, any image processing hardware to be processed (including logic circuits) may be included.

10 terminal device, 12 image forming device, 14 communication line, 121 operation unit, 122 communication interface (I / F), 123 storage device, 124 controller, 125 scanner, 126 printer.

Claims (10)

When the peripheral image forming hardware of the processor has a first operation mode and a second operation mode whose operation is different from the first operation mode, the setting is changed from the first operation mode to the second operation mode. An image forming apparatus comprising: a control unit that controls the clock frequency of the processor to be different when the change to the two operation modes is completed. The control unit sets the clock frequency to the first clock frequency when the peripheral image forming hardware is in the first operation mode, and sets the clock frequency to the first clock frequency when the change to the second operation mode is completed. 2. The clock frequency is controlled to a third clock frequency different from the first clock frequency and the second clock frequency during a period in which the second clock frequency is different from the first operation mode and the second operation mode is switched to the second operation mode. The image forming apparatus described in 1. The second operation mode has a higher operation speed than the first operation mode,
The control unit determines the first clock frequency, the second clock frequency, and the third clock frequency.
The image forming apparatus according to claim 2, wherein control is performed such that the first clock frequency> the second clock frequency> the third clock frequency. The second operation mode has a higher operation speed than the first operation mode,
The control unit determines the first clock frequency, the second clock frequency, and the third clock frequency.
The image forming apparatus according to claim 2, wherein control is performed such that the second clock frequency> the first clock frequency> the third clock frequency. The first operation mode is an operation stop, the second operation mode is an operating mode,
The control unit determines the first clock frequency, the second clock frequency, and the third clock frequency.
The image forming apparatus according to claim 2, wherein control is performed such that the second clock frequency> the third clock frequency> the first clock frequency. The peripheral image forming hardware includes at least first image forming hardware and second image forming hardware,
The image forming apparatus according to claim 1, wherein the control unit controls the clock frequency of the processor to be different according to an operation mode of the first image forming hardware and the second image forming hardware. The first operation mode of the first image forming hardware is stopped, and the second operation mode is operating.
The first operation mode of the second image forming hardware is stopped, and the second operation mode is active;
The control unit sets the clock frequency to the first clock frequency when both the first image forming hardware and the second image forming hardware are in the first operation mode, and the first image forming hardware and the When both the second image forming hardware are in the second operation mode, the clock frequency is set to a second clock frequency different from the first clock frequency, and the first image forming hardware and the second image forming hardware The image according to claim 6, wherein the clock frequency is controlled to a third clock frequency different from the first clock frequency and the second clock frequency in a period when at least one of the first operation mode is switched to the second operation mode. Forming equipment. The control unit includes a period until the first image forming hardware changes from the first operation mode to the second operation mode, and the second image forming hardware changes from the first operation mode to the second operation mode. The image forming apparatus according to claim 6, wherein the clock frequency of the processor is controlled to be different according to the longer period of the period until the mode is changed. The image forming apparatus according to claim 1, wherein the control unit controls the clock frequency of the processor to be different according to a change completion notification to the second operation mode from the peripheral image forming hardware. On the computer,
Setting the processor clock frequency to the first clock frequency when the peripheral imaging hardware of the processor is in the first operation mode;
Setting the processor clock frequency to a second clock frequency different from the first clock frequency when the peripheral image forming hardware is in a second operation mode different from the first operation mode;
Setting a clock frequency of the processor to a third clock frequency different from the first clock frequency and the second clock frequency during a period in which the peripheral image forming hardware switches from the first operation mode to the second operation mode. The program to be executed.

Images