JP2019161685A - Ac/dc converter - Google Patents

Abstract

To provide an AC/DC converter capable of easily suppressing occurence of overcurrent by preventing simultaneous turning-on of two FETs serially connected to a pair of input terminals.SOLUTION: A rectifier circuit 311 is composed of MOSFET Q1-Q4. A smooth capacitor Cis connected to an output of the rectifier circuit 311. Driver circuits Dr1-Dr4 on-off control the MOSFET Q1-Q4, respectively. The driver circuits Dr1-Dr4 have, respectively, comparators CP1-CP4 which compare the voltage of a source with the voltage of a drain of each of the MOSFET Q1-Q4, a pull-up resistance Rconnected between output terminals outputting the outputs of the comparators CP1-CP4 and output voltage Vof an AC/DC converter 32, and gate drivers GD1-GD4 turning on or off each of the MOSFET Q1-Q4 on the basis of the outputs of the comparators CP1-CP4. A resistance value of the pull-up resistance Ris set not to turn on simultaneously the MOSFET Q1, Q2, MOSFET Q3, Q4.SELECTED DRAWING: Figure 2

Description

  The present invention relates to an AC / DC converter.

  As the above-described AC / DC converter, for example, one having a rectifier circuit that rectifies alternating current using four diodes is known (Patent Document 1). In order to reduce the loss in the diode and improve the rectification efficiency, the four diodes are replaced with four FETs (switches), and the two FETs are turned on alternately to rectify the alternating current. Is considered.

  However, when the diode is replaced with a pair of FETs, there is a problem in that an overcurrent is generated when the two FETs connected in series to the pair of input terminals are turned on at the same time.

JP 2017-112763 A

  The present invention has been made in view of the above-described background. An AC / DC conversion that easily suppresses the occurrence of overcurrent by preventing two FETs connected in series to a pair of input terminals from being simultaneously turned on. The purpose is to provide a vessel.

  An AC / DC converter according to an aspect of the present invention is connected in parallel to first and second switches connected in series to a pair of input terminals to which an AC voltage is input, and the first and second switches. A rectifier circuit composed of third and fourth switches, a smoothing capacitor connected to the output of the rectifier circuit, and first to fourth switch controllers for controlling on / off of the first to fourth switches, respectively. In the AC / DC converter provided, each of the first to fourth switch control units compares a voltage between one end and the other end of each of the first to fourth switches, and an output of the comparator. A pull-up resistor connected between the output of the AC / DC converter and a drive circuit for turning on and off the first to fourth switches based on the output of the comparator; , Second switch, the third and fourth switches So as not to turn on at, characterized in that the resistance value of the pull-up resistor is set.

  The time from when the potentials at one end and the other end of the first to fourth switches are reversed until the drive circuit turns off the first to fourth switches is one end of the first to fourth switches. The resistance value of the pull-up resistor may be set so as to be shorter than the time from when the potential at the other end is inverted to when the drive circuit turns on the first to fourth switches. However, this is not the case when the AC / DC converter is in the voltage doubler rectification operation mode and the second and fourth switches are not switched.

Ｒａ：プルアップ抵抗の抵抗値
Ｔ_ＯＦＦ：前記第１〜第４スイッチの一端と他端との電位が反転してから前記駆動回路が前記第１〜第４スイッチをオフするまでの時間
Ｃ：前記比較器出力の対地容量
Ｖ_ｔｈ：前記駆動回路の入力閾値電圧
Ｖ_ＤＤ：前記ＡＣ／ＤＣ変換器の出力電圧 Further, the resistance value of the pull-up resistor may be set in a range represented by the following formula.

Ra: resistance value of the pull-up resistor T _OFF : time from when the potentials at one end and the other end of the first to fourth switches are inverted until the drive circuit turns off the first to fourth switches C: Ground capacitance of the comparator output V _th : Input threshold voltage of the drive circuit V _DD : Output voltage of the AC / DC converter

  An AC / DC converter according to an aspect of the present invention includes a first and a second switch connected in series to a pair of input terminals to which an AC voltage is input, and a parallel connection to the first and second switches. A rectifier circuit composed of third and fourth switches, a smoothing capacitor connected to the output of the rectifier circuit, and first to fourth switch controllers for controlling on / off of the first to fourth switches, respectively. The first to fourth switch control units each include a comparator for comparing voltages between one end and the other end of each of the first to fourth switches, and the comparator. A pull-up resistor connected between the output and the output of the AC / DC converter, and a drive circuit for turning on and off the first to fourth switches based on the output of the comparator, Features a variable pull-up resistor To.

  The pair of switches includes a first capacitor connected in parallel to the second switch, a second capacitor connected in parallel to the fourth switch, and an adjustment unit that adjusts a resistance value of the pull-up resistor, The adjustment unit monitors the voltage across the second and fourth switches, and when the second and fourth switches are not turned on without being inverted for a predetermined period or longer, the adjustment unit lowers the pull-up resistor. You may do it.

  As described above, according to the aspect, after the potentials at one end and the other end of the first to fourth switches are inverted according to the value of the pull-up resistor, the drive circuit switches the first to fourth switches. Focusing on the fact that the time until turning on can be adjusted, the resistance value of the pull-up resistor is set so that the first to fourth switches are not turned on simultaneously. Thereby, it is possible to easily prevent the first to fourth switches from being turned on and suppress the occurrence of overcurrent.

It is a circuit diagram showing one embodiment of a non-contact electric power transmission system of vehicles incorporating an AC / DC converter of the present invention. It is a circuit diagram which shows the detail of the AC / DC converter shown in FIG. FIG. 2 is a circuit diagram showing details of the drive circuit shown in FIG. 1 in the first embodiment. FIG. 2 is a circuit diagram showing details of the drive circuit shown in FIG. 1 in the first embodiment. 2 is a time chart of voltages V _C11 and V _C12 and MOSFETs Q2 and Q4 across the capacitors C ₁₁ and C ₁₂ when the capacitances of the capacitors C ₁₁ and C ₁₂ shown in FIG. 1 are small. 2 is a time chart of voltages V _C11 and V _C12 and MOSFETs Q2 and Q4 across the capacitors C ₁₁ and C ₁₂ when the capacitances of the capacitors C ₁₁ and C ₁₂ shown in FIG. 1 are large to some extent. 2 is a time chart of voltages V _C11 and V _C12 and MOSFETs Q2 and Q4 across the capacitors C ₁₁ and C ₁₂ when the capacitances of the capacitors C ₁₁ and C ₁₂ shown in FIG. 1 are considerably large. FIG. 5 is an explanatory diagram for explaining an operation of the drive circuit shown in FIGS. 3 and 4. 5 is a time chart of the output of the comparator shown in FIGS. 3 and 4. FIG. 5 is a circuit diagram showing a part of the drive circuit shown in FIG. 1 in a second embodiment.

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS. A non-contact power transmission system 1 shown in FIG. 1 includes a power transmission device 2 that transmits AC power and a power reception device 3 that receives AC power transmitted from the power transmission device 2.

  The power transmission device 2 is provided outside a vehicle such as a charging station. The power transmission device 2 includes an AC power source 21 that outputs AC power and a power transmission coil 22 that transmits the AC power output from the AC power source 21.

  The power receiving device 3 is mounted on a vehicle. The power receiving device 3 includes a power receiving coil 31 that receives AC power from the power transmitting coil 22 in a contactless manner, an AC / DC converter 32 that converts AC power received by the power receiving coil 31 into direct current, and an AC / DC converter 32. And a battery 33 charged with DC power from the battery.

The AC / DC converter 32 includes a rectifier circuit 311, smoothing capacitors C ₁₁ , C ₁₂ , and C _2, and drive circuits Dr 1 to Dr 4 as first to fourth switch control units.

The rectifier circuit 311 is a circuit that rectifies AC power received by the power receiving coil 31, and includes MOSFETs Q1 to Q4. The MOSFET Q1 as the first switch and the MOSFET Q2 as the second switch are connected in series between a pair of input terminals T _{IN +} and T _IN− to which an AC voltage is input. The MOSFET Q1 is connected to the input terminal TIN ₊ side. The MOSFET Q1 is composed of a PMOSFET and is connected so that the forward direction of the parasitic diode D1 is directed to the input terminal T _IN− side.

The MOSFET Q2 is connected to the input terminal T _IN− side. The MOSFET Q2 is composed of a PMOSFET, and is connected such that the forward direction of the parasitic diode D2 is directed to the input terminal _{TIN +} . That is, the parasitic diodes D1 and D2 of the MOSFETs Q1 and Q2 are connected between the pair of input terminals T _{IN +} and T _IN− so that the forward direction is reversed.

The MOSFET Q3 as the third switch and the MOSFET Q4 as the fourth switch are connected in series between the pair of input terminals T _{IN +} and T _IN− and are connected in parallel to the MOSFETs Q1 and Q2. The MOSFET Q3 is connected to the input terminal TIN ₊ side. The MOSFET Q3 is composed of an NMOSFET, and is connected so that the forward direction of the parasitic diode D3 is directed to the input terminal _{TIN +} .

The MOSFET Q4 is connected to the input terminal T _IN− side. The MOSFET Q4 is composed of an NMOSFET and is connected such that the forward direction of the parasitic diode D4 is directed to the input terminal T _IN− side. That is, the parasitic diodes D3 and D4 of the MOSFETs Q3 and Q4 are connected between the pair of input terminals T _{IN +} and T _IN− so that the forward direction is reversed.

The smoothing capacitor _C 11 of the first capacitor is connected in parallel to MOSFET Q2. Smoothing capacitor _C 12 of the second capacitor are connected in parallel to the MOSFET Q4. A smoothing capacitor _{C 11} and _{C 12} is constituted by a variable capacitance element, for example, by a not-shown microcomputer, the output terminal _T OUT _+, capacitance is adjusted by the impedance of the _{T OUT-} side.

Smoothing capacitor _{C 2} is connected in parallel to the smoothing capacitor _{C 11} and _{C 12.} Both ends of the smoothing capacitor _{C 2} is output _T OUT _{+, T OUT-,} and the DC voltage is outputted. The output terminal T _OUT− is connected to the ground.

In the rectifier circuit 311, the MOSFETs Q1 and Q4 are turned on and the MOSFETs Q2 and Q3 are turned off while the AC voltage (input voltage) is positive. Accordingly, the smoothing capacitor _{C 11} current flows is charged along a path I1 through the MOSFETs Q1. At this time, the smoothing capacitor C ₁₁ is charged so that the output terminal T _{OUT +} side is + and the output terminal T _OUT− side is −. On the other hand, the electric charge charged in the smoothing capacitor C12 is discharged through the MOSFET Q4.

On the other hand, while the AC voltage is negative, MOSFETs Q2 and Q3 are turned on and MOSFETs Q1 and Q4 are turned off. Accordingly, the smoothing capacitor _{C 12} current flow is charged along a path I2 through the MOSFET Q3. Meanwhile, the electric charge charged in the smoothing capacitor _{C 11} through MOSFETQ2 is discharged.

A voltage obtained by synthesizing the charging voltages of the smoothing capacitors C ₁₁ and C ₁₂ is smoothed by the smoothing capacitor C ₂ and output from the output terminals T _{OUT +} and T _OUT− .

As a result, the capacitors C ₁₁ and C ₁₂ alternately repeat charging and discharging of the output voltage V _DD in opposite phases, as shown in FIGS. When the capacitances of the capacitors C ₁₁ and C ₁₂ are small, as shown in FIG. Therefore, both-end voltages V _C11 and V _C12 of the capacitors C ₁₁ and C ₁₂ have substantially the same shape as the waveform of the input voltage (voltage input to the input ends T _{IN +} and T _IN− ) (FIGS. 5 to 7 are (The case where the input waveform is a rectangular wave is shown.)

Capacitor _{C 11,} connected in parallel to _{C 12} MOSFET Q2, Q4 are turned on at the timing when the voltage across _{V C11, V C12} is below the 0V near the threshold of the comparator CP2, CP4 in the drive circuit Dr2, Dr4 described later To do. Therefore, the MOSFETs Q2 and Q4 perform switching with a duty ratio of 50%. Then, the AC / DC converter 32 performs a diode bridge operation and outputs an output voltage V _DD having the same magnitude as the amplitude of the input voltage.

Further, when the capacitances of the capacitors C ₁₁ and C ₁₂ are large to some extent, as shown in FIG. 6, the both-end voltages V _C11 and V _C12 are somewhat distorted. For this reason, the duty ratios of the MOSFETs Q2 and Q4 are smaller than 50%. The AC / DC converter 32 operates so as to be positioned between the diode bridge and the voltage doubler rectifier circuit, and outputs an output voltage V _DD that is larger than the amplitude of the input voltage and smaller than twice the amplitude. As the capacitances of the capacitors C ₁₁ and C ₁₂ are increased, the duty ratios of the MOSFETs Q2 and Q4 are decreased and the output voltage V _DD is increased.

When the capacitances of the capacitors C ₁₁ and C ₁₂ become considerably large, the capacitors C ₁₁ and C ₁₂ cannot be charged / discharged from the lowest value 0V to the highest value V _DD . For this reason, the duty ratio of the MOSFETs Q2 and Q4 is zero. The AC / DC converter 32 operates as a voltage doubler rectifier circuit, and outputs an output voltage V _DD that is twice the amplitude of the input voltage.

  In other words, the AC / DC converter 32 outputs a DC voltage having an input voltage / output voltage ratio corresponding to the duty ratio of the MOSFETs Q2 and Q4 within the same range as the amplitude of the input AC voltage to twice the amplitude. .

Normally, when the load value fluctuates in the AC / DC converter 32, the input voltage current (impedance) fluctuates. In this embodiment, by adjusting the capacitance of the smoothing capacitor _{C 11} and _{C 12,} by controlling the duty of the MOSFET Q2, Q4, by adjusting the input voltage / output voltage ratio of the AC / DC converter 32, The impedance fluctuation is suppressed and the efficiency of the non-contact power transmission system 1 is improved by impedance matching.

  Drive circuits Dr1 to Dr4 are provided for MOSFETs Q1 to Q4, respectively. As shown in FIGS. 3 and 4, each of the drive circuits Dr1 to Dr4 includes comparators CP1 to CP4, a pull-up resistor RA, and gate drivers GD1 to GD4 as drive circuits. The comparators CP1 to CP4 are composed of open collector type comparators.

  As shown in FIGS. 3 and 4, the source (one end) voltages of the MOSFETs Q <b> 1 to Q <b> 4 are input to the + input ends of the comparators CP <b> 1 to CP <b> 4. The drain (other end) voltages of the MOSFETs Q1 to Q4 are input to the negative input terminals of the comparators CP1 to CP4. Therefore, the comparators CP1 to CP4 invert the output from low to high or from high to low when the source and drain potentials of the MOSFETs Q1 to Q4 are inverted.

The pull-up resistor _RA is connected between the outputs of the comparators CP1 to CP4 and the output V _{OUT + from} which the output voltage V _DD is output.

The gate drivers GD1 to GD4 turn on the MOSFETs Q1 to Q4 when the outputs from the comparators CP1 to CP4 exceed the input threshold voltage _Vth . The gate drivers GD1 to GD4 have a hysteresis characteristic, and the width of the hysteresis potential is set to a width that prevents chattering that occurs when the comparators CP1 to CP4 are switched.

With the above configuration, the comparator CP1 compares the output potential V _DD output from the output terminal T _{OUT +} with the AC potential input to the input terminal T _{IN +} , and according to the result, the comparator CP1 is high (= V _DD ) or Outputs low (0V). The comparator CP2 compares the output potential V _DD output to the output terminal T _{OUT +} with the AC potential input to the input terminal T _IN− and outputs high or low according to the result.

The comparator CP3 compares 0V output from the output terminal T _OUT− with the AC potential input to the input terminal T _{IN +} , and outputs high or low according to the result. The comparator CP4 compares 0V output from the output terminal T _OUT− with the AC potential input to the input terminal T _IN− and outputs high or low according to the result.

  As a result, the MOSFETs Q1 and Q4 are turned on and the MOSFETs Q2 and Q3 are turned off while the alternating voltage is positive, and the MOSFETs Q2 and Q3 are turned on and the MOSFETs Q1 and Q4 are turned off while the alternating voltage is negative.

In this embodiment, the value of the pull-up resistor _RA is adjusted to provide a dead timing at which both of the MOSFETs Q1 and Q2 are turned on and the MOSFETs Q3 and Q4 are turned on and off. This prevents the MOSFETs Q1 and Q2 from being simultaneously turned on and the MOSFETs Q3 and Q4 from being simultaneously turned on when switching on and off.

By doing so, the MOSFETs Q1 and Q2 are simultaneously turned on, or the MOSFETs Q3 and Q4 are simultaneously turned on, so that the low resistance MOSFETs Q1 and Q2 are connected in series between the pair of input terminals T _{IN +} and T _IN− , and overcurrent Can be solved.

The principle of providing the dead time by adjusting the pull-up resistor _RA will be described below with reference to FIGS. _A differential voltage V _RA (= V _DD −V _OUT ) between the output voltage V _DD and the outputs V _OUT of the comparators CP1 to CP4 is applied to the pull-up resistor _RA . When comparator CP1~CP4 is switched from low output to high output, the output of the comparator CP1~CP4, the current earth capacitance C between the output and ground flows through the pull-up resistor _{R A I} RA (= V _RA / R _A ) and charged to a high output.

The rising speed of the output of the comparator CP1~CP4 depends on the magnitude of the current _{I RA.} For this reason, adjustment can be made such that if the pull-up resistor _RA is increased, the rise is accelerated, and if the pull-up resistor _RA is decreased, the rise is delayed. In other words, since the rise of the output V _OUT of the comparators CP1 to CP4 depends on the time constant τ = R _A · C due to the pull-up resistor _RA and the ground capacitance C, the resistance value of the pull-up resistor _RA is adjusted. Thus, the rising speed of the outputs of the comparators CP1 to CP4 can be adjusted.

Here, the rising waveform of the outputs of the MOSFETs Q1 to Q4 from low to high is represented by the following equation (1) as shown in FIG.

Now, let the input threshold voltage of the gate drives GD1 to GD4 be _Vth . The time T _ON required for the drive circuits Dr1 to D4 to turn on the MOSFETs Q1 to Q4 after the drain and source potentials of the MOSFETs Q1 to Q4 in the off state are inverted is T _ON = −R _A · C · ln (1 represented by -V _th / _{V DD).} On the other hand, let T _OFF be the time taken for the drive circuits Dr1 to Dr3 to turn off the MOSFETs Q1 to A4 after the drain and source potentials of the MOSFETs Q1 to Q4 in the on state are inverted.

In order to provide dead time without simultaneously turning on the MOSFETs Q1, Q2, and the MOSFETs Q3, Q4, it is necessary that T _ON > T _OFF . Therefore, dead time can be provided by adjusting the pull-up resistor _RA as shown in the following equation (2). Therefore, in the present embodiment, the pull-up resistor _RA is adjusted within the range shown in the following formula (2). T _OFF is known because it is determined by the falling speeds of the comparators CP1 to CP4.

According to the embodiment described above, for example, by setting the pull-up resistor _RA to a value adjusted at the design stage, it is possible to easily prevent the MOSFETs Q1, Q2, MOSFETs Q3, Q4 from being turned on simultaneously.

  During the dead time period, the MOSFETs Q1 to Q4 are in an off state. In the present embodiment, while the MOSFETs Q1 to Q4 are off, a rectification operation is performed by passing current through the parasitic diodes D1 and D3 of the MOSFETs Q1 to Q4. For this reason, if dead time is provided more than necessary, the losses due to the parasitic diodes D1 and D3 increase, and the rectification efficiency decreases.

Since T _ON as described above can be adjusted by the pull-up resistor R _A, the dead time can also be adjusted by the pull-up resistor R _A. Therefore, the pull-up resistor _RA is adjusted so that the dead time does not become longer than necessary according to the response and disturbance characteristics of the comparators CP1 to CP4, the switching characteristics of the MOSFETs Q1 to Q4, and the layout of the applied circuit. Yes.

Note that according to the first embodiment described above, the smoothing capacitor C _11, C _12, which had been constructed from the variable capacitance element, not limited to this. The smoothing capacitors C ₁₁ and C ₁₂ may have a fixed capacitance.

The gate drivers GD1 to GD4 may have a low voltage lockout function that keeps the MOSFETs Q1 to Q4 off until the output voltage V _DD is stabilized. If the low voltage lockout function is not provided, MOSFETs Q1 to Q4 may be simultaneously turned on before the comparators CP1 to CP4 start to operate, and an overcurrent may flow, or a current flowing through the rectifier circuit 311 may flow backward. By providing the gate drivers GD1 to GD4 with an undervoltage lockout function, the AC / DC converter 32 can be stably operated.

Further, according to the first embodiment described above, the pull-up resistor _RA is configured by a fixed resistor having a value adjusted at the time of design, but is not limited thereto. _A variable resistor may be used as the pull-up resistor _RA . In this case, the adjusted pull-up resistor R _A to the adjusted value at the time of design, easily can be carried out design changes of the pull-up resistor R _A.

(Second Embodiment)
Next, a second embodiment will be described. In the first embodiment described above, the capacitances of the smoothing capacitors C ₁₁ and C ₁₂ are adjusted by the impedances on the output terminals T _{OUT +} and T _OUT− side. Therefore, MOSFET Q2 of the right side by the size of the smoothing capacitor _{C 11, C 12,} Q4 is present completely mode without switching. In this case, since the smoothing capacitors C ₁₁ and C ₁₂ are not discharged, a double voltage rectification operation is performed in which a DC voltage approximately twice the amplitude of the AC voltage is output from the output terminals T _{OUT +} and T _OUT− .

  In this case, the MOSFETs Q1 and Q2, and the MOSFETs Q3 and Q4 are not turned on at the same time, so that it is not necessary to provide a dead time. The pull-up resistor only needs to satisfy a value that suppresses the output current of the comparators CP1 to CP4 within the rating. Therefore, in the second embodiment, the pull-up resistor can be adjusted as shown in FIG.

In the second embodiment, two pull-up resistors R _A1 and R _A2 connected in parallel to each other are connected between the comparators CP1 to CP4 and the output terminal T _{OUT + from} which the output voltage V _DD is output. . A switch SW is connected in parallel with the pull-up resistor R _A1 and in series with the pull-up resistor R _A2 .

With the above configuration, connection / disconnection of the pull-up resistor _RA2 is controlled by turning on / off the switch SW. On / off of the switch SW is controlled by a microcomputer (not shown). The microcomputer turns on the switch SW when the drains and sources of the MOSFETs Q2 and Q4 on the right side are not inverted for a certain period and the MOSFETs Q2 and Q4 are not turned on.

When the switch SW is turned on and the pull-up resistor _RA2 is connected, the pull-up resistor value is lowered and the dead time is shortened. Thereby, at the time of the voltage doubler rectification operation in which the MOSFETs Q2 and Q4 are not turned on, the dead time can be shortened and the efficiency of the rectifier circuit 311 can be improved.

Further, the microcomputer turns off the switch SW while the MOSFETs Q1, Q2 and the MOSFETs Q3, Q4 are alternately turned on. When the switch SW is turned off and the pull-up resistor _RA2 is not connected, the pull-up resistor value decreases and the dead time increases. As a result, as in the first embodiment, MOSFETs Q1, Q2, MOSFETs Q3, Q4 are not turned on at the same time, and overcurrent can be suppressed.

  Further, according to the first and second embodiments described above, PMOSFETs are used as the MOSFETs Q1 and Q2, but the present invention is not limited to this. A floating power supply using a bootstrap circuit may be inserted into the MOSFETs Q1 and Q2, and an NMOSFET may be used instead of the PMOSFET.

  The present invention is not limited to the above embodiment. That is, various modifications can be made without departing from the scope of the present invention.

31 AC / DC converter 311 Rectifier circuit C ₁₁ Smoothing capacitor (first capacitor)
C ₁₂ smoothing capacitor (second capacitor)
C ₂ smoothing capacitor CP1~CP4 comparator Dr1~Dr4 driver circuit (first to fourth switch control unit)
GD1 to GD4 Gate driver (drive circuit)
Q1 MOSFET (first switch)
Q2 MOSFET (second switch)
Q3 MOSFET (third switch)
Q4 MOSFET (4th switch)
R _A pull-up resistor R _A1 pull-up resistor R _A2 pull-up resistor

Claims (5)

A first and second switch connected in series to a pair of input terminals to which an AC voltage is input, and a rectifier circuit including a third and a fourth switch connected in parallel to the first and second switches; An AC / DC converter comprising a smoothing capacitor connected to the output of the rectifier circuit, and first to fourth switch controllers for controlling on / off of the first to fourth switches, respectively.
The first to fourth switch control units each compare a voltage between one end and the other end of each of the first to fourth switches, an output of the comparator, and an output of the AC / DC converter. A pull-up resistor connected between and a drive circuit for turning on and off each of the first to fourth switches based on an output of the comparator,
An AC / DC converter, wherein a resistance value of the pull-up resistor is set so that the first, second switch, third, and fourth switches are not turned on simultaneously.   The time from when the potentials at one end and the other end of the first to fourth switches are inverted until the drive circuit turns off the first to fourth switches is one end of the first to fourth switches and the other. The resistance value of the pull-up resistor is set so as to be shorter than the time from when the potential at the terminal is inverted until the drive circuit turns on the first to fourth switches. Item 2. The AC / DC converter according to Item 1. The AC / DC converter according to claim 1 or 2, wherein a resistance value of the pull-up resistor is set in a range represented by the following expression.

R _A : Resistance value of pull-up resistor T _OFF : Time from when the potential of one end and the other end of the first to fourth switches is inverted until the drive circuit turns off the first to fourth switches C : Ground capacitance of the comparator output V _th : Input threshold voltage of the drive circuit V _DD : Output voltage of the AC / DC converter A first and second switch connected in series to a pair of input terminals to which an AC voltage is input, and a rectifier circuit including a third and a fourth switch connected in parallel to the first and second switches; An AC / DC converter comprising a smoothing capacitor connected to the output of the rectifier circuit, and first to fourth switch controllers for controlling on / off of the first to fourth switches, respectively.
The first to fourth switch control units each compare a voltage between one end and the other end of each of the first to fourth switches, an output of the comparator, and an output of the AC / DC converter. A pull-up resistor connected between and a drive circuit for turning on and off each of the first to fourth switches based on an output of the comparator,
An AC / DC converter characterized in that the pull-up resistor is variably provided. A first capacitor connected in parallel to the second switch;
A second capacitor connected in parallel to the fourth switch;
An adjustment unit for adjusting the resistance value of the pull-up resistor,
The adjusting unit monitors a voltage across the second and fourth switches, and when the second and fourth switches are not turned on without being inverted for a predetermined period or longer, the adjustment unit lowers the pull-up resistor. The AC / DC converter according to claim 4.

Images