JP2019159949A - Data recording device and method for recording data - Google Patents

Abstract

To provide a data recording device for which data loss is minimized even under severe circumstances at a low cost.SOLUTION: According to an embodiment, the data recording device includes: a nonvolatile recording medium; a data recording application; a cache memory; and a recording manager. The data recording application records data acquired through a transmission path into the recording medium. The cache memory is provided in each of storage step layers from the data recording application to the recording medium. The recording manager regularly issues a synchronization command to each cache memory and makes the content of each cache memory reflected in the recording medium forcibly.SELECTED DRAWING: Figure 1

Description

  Embodiments described herein relate generally to a data recording apparatus and a data recording method.

  For example, a data recording device used in an industrial control system or the like is placed in an extremely harsh environment as compared with a device for consumer use. For example, requirements such as continuous operation time, resistance to dust and vibration, and temperature environment are very strict, and in addition, continuity of recording is required even in unexpected situations such as instantaneous power failure. Even if data is lost due to a power failure, it is required to minimize the number of bytes of lost data or at least keep it constant. Moreover, it is not uncommon to have an environment where the uninterruptible power supply in preparation for a momentary power failure cannot be used.

JP 2012-151742 A JP 2009-175068 A

  The cost of a data recording device that is operated in a harsh environment is generally high. One of the reasons is the instability of power supply and storage media (for example, RAID (Redundant Arrays of Independent Disks), HDD (Hard Disk Drive), SSD (Solid State Drive), etc.)) This is because the vendor's unique technology is taken into account, which has led to higher costs and lower versatility. In addition, since the data storage format depends on the apparatus system, the data cannot be reproduced except by the recording system.

  An object of the present invention is to provide a data recording apparatus and a data recording method that minimize data loss even in a harsh environment at a low cost.

  According to the embodiment, the data recording apparatus includes a non-volatile recording medium, a data recording application, a cache memory, and a recording manager. The data recording application records data acquired via the transmission path on a recording medium. The cache memory is provided in each storage hierarchy from the data recording application to the recording medium. The recording manager periodically issues a synchronization command to each of the cache memories to forcibly reflect the contents of each cache memory on the recording medium.

FIG. 1 is a functional block diagram illustrating an example of a data recording apparatus according to the embodiment. FIG. 2 is a timing chart showing an example of fluctuation related to data recording. FIG. 3 is a diagram illustrating an example of a storage hierarchy in the data recording apparatus of the embodiment. FIG. 4 is a flowchart illustrating an example of a processing procedure performed by the recording manager 200.

  FIG. 1 is a functional block diagram illustrating an example of a data recording apparatus according to the embodiment. The data recording apparatus includes CPU (Central Processing Unit) cards 1 and 2 as substrates each having a processor. These are connected to be communicable with each other via the VPX bus 30. The VPX bus 30 is an example of a serial transmission path, and a data transmission path is formed between the bus protocol conversion unit 13 of the CPU card 1 and the bus protocol conversion unit 23 of the CPU card 2. That is, the CPU cards 1 and 2 are connected via the VPX bus 30 and the bus bridge (bus protocol conversion units 13 and 23) so as to be able to transmit data.

  In the CPU card 1, an external memory 15 and an OS (Operating System) SSD 14 are connected to the bus protocol conversion unit 13. The CPUs 11 and 12 are connected to the bus protocol conversion unit 13 via the CPU bus 17. Further, the communication interface unit 16 with the network 40 is connected to the bus protocol conversion unit 13 via the internal bus 18.

  The OS SSD 14 is a device that records a general-purpose operating system such as UNIX (registered trademark) or Linux (registered trademark). When the system is activated, the OS image recorded on the OS SSD 14 is read into the external memory 15, the initial address is passed to the CPUs 11 and 12, and the OS is activated. Next, a data recording application functioning on the OS is started. The external memory 15 is a large-capacity volatile storage device such as a page memory.

  The CPU card 2 includes a recording device 26 in addition to the same functional blocks as the CPU 1. The recording device 26 is a non-volatile recording medium such as an SSD. In the CPU card 2, the external memory 25 and the OS SSD 24 are connected to the bus protocol conversion unit 23. The CPUs 21 and 22 are connected to the bus protocol conversion unit 23 via the CPU bus 27. The recording device 26 is connected to the bus protocol conversion unit 23 via the internal bus 28.

  The OS SSD 24 is also a device that records a general-purpose operating system, such as UNIX (registered trademark), Linux (registered trademark), or Windows (registered trademark). When the system is activated, the OS image is read from the OS SSD 24 to the external memory 25, the initial address is passed to the CPUs 21 and 22, and the OS is activated. Next, a data recording application functioning on the OS is started. The external memory 25 is a large-capacity volatile storage device such as a page memory.

  The recording device 26 in the embodiment is an SSD device including a plurality of NAND flash memories (NAND FLASH ARRAY) arranged in an array. Here, the SSD paging block size of the recording device 26 is, for example, 128 kbytes.

  FIG. 2 is a timing chart showing an example of fluctuation related to data recording. In FIG. 2, processing from the input function to the recording function (data recording application) is executed in synchronization with the external trigger. However, since the data recording application accesses the hardware (recording device 26) via the general-purpose OS, the processing time fluctuates due to access to various cache memories existing in each storage hierarchy.

  For example, there is a fluctuation of t1 seconds or t2 seconds from the call of the open system call to the end. For this reason, the calling interval of the write system call becomes uneven. Also, it takes a time of t3 or t4 seconds from the calling to the end of the write system call, and this also changes depending on the data size to be recorded. If it is not completed in a single process, it takes time until t5, and the close system call calling interval is also uneven. That is, real-time performance cannot be expected from the general-purpose OS, and the situation is the same in COTS (Commercial off-the-shelf) software.

  FIG. 3 is a diagram illustrating an example of a storage hierarchy in the data recording apparatus of the embodiment. In FIG. 3, a plurality of cache memories having different purposes of use are provided in each storage hierarchy from the data recording application 100 to the NAND FLASH ARRAY 264 of the recording device 26.

  In the application layer, a high-level input / output cache 300 is provided. In the OS layer (OS area), a buffer cache 400 is provided in the file system. The recording device 26 that is a physical layer is also provided with a cache memory 263 and a controller 262 that controls data writing / reading. These are all intended to maximize the write throughput. However, when a power failure (instantaneous power failure) occurs, the contents of these cache memories are all lost (lost). In other words, minimization of write performance and disappearance size is a conflicting phenomenon.

  Therefore, in this embodiment, a recording manager 200 is provided between the data recording application 100 and the recording device. The recording manager 200 periodically issues a synchronization command to each of the high-level input / output cache 300, the buffer cache 400, and the cache memory 263 (controller 262), forcing the contents of each cache memory to the NAND FLASH ARRAY 264. To reflect.

  Further, the recording device 26 includes a synchronization function 261 provided between the controller 262 and the cache memory 263. When the synchronization function 261 receives a notification of the occurrence of a power failure from a main power supply (not shown), the synchronization function 261 forcibly outputs a synchronization command before the backup power supply 265 in preparation for a momentary power interruption ends. With the cache memory synchronization control as described above, it is possible to minimize lost data when a power failure occurs and to minimize deterioration in data writing performance. That is, even if data is lost, the number of bits can be suppressed to 128 kByte, which is the minimum block size of the NAND FLASH ARRAY 264 of the recording device 26, and can be set to a constant value (minimization).

  FIG. 4 is a flowchart illustrating an example of a processing procedure performed by the recording manager 200. When the data recording process is started (step S1), the recording manager 200 calculates a use band of data within a specified time in order to obtain an occupied band of data to be recorded (step S2). In the embodiment, the occupied band is divided into, for example, three stages of “low band”, “medium band”, and “high band”, and the recording manager 200 controls the issuance interval of the synchronization command according to each use state ( Step S3).

  That is, the recording manager 200 adaptively controls the issuance interval of the synchronization command to the cache memory 263 of the recording device 26 based on the occupied band of data to be recorded. If the data occupation band is low, the recording manager 200 sets the synchronization command issuance interval to the shortest (step S4). If the data band is high, the recording manager 200 sets the synchronization command issuance interval to the longest (step S4). Step S6). If the data use state is the middle band, the recording manager 200 sets the issuance interval of the synchronization command to an intermediate value (step S5). The boundaries of “low bandwidth”, “medium bandwidth”, and “high bandwidth” can be determined based on a predetermined bandwidth threshold, and the synchronization command issuance interval is determined in advance according to the system specifications. What is necessary is just to use the set three-stage value.

  Then, Steps S2 to S6 are repeated until a certain time (the specified time in Step S2) related to the calculation of the used bandwidth has elapsed (Step S7), and when the certain time has elapsed, the recording manager 200 outputs a synchronization command ( Issuance) (step S8).

  As described above, in this embodiment, a synchronization command is periodically issued to each of the cache memories 300, 400, and 263 provided in each of the storage hierarchies from the data recording application 100 to the recording device 26, and each cache memory 300 is issued. , 400, 263 are forcibly reflected in the recording device 26. As a result, lost data when a failure such as a power failure or a momentary power failure occurs can be minimized.

  In this embodiment, the recording manager 200 adjusts the output interval of the synchronization command according to the fluctuation of the data storage band. As a result, it is possible to suppress the deterioration of the data writing performance.

  In other words, it is necessary to erase data before writing data to the NAND FLASH element. Since erasure is performed in block size units, the write efficiency can be maximized by the recording manager 200 outputting a synchronization command when the write size exceeds the block size.

  Thus, in this embodiment, the synchronization command issuance interval is dynamically controlled using the use band measured from the past specified time. Since it did in this way, it becomes possible to suppress degradation of recording performance by writing to the recording device 26 to the minimum, and to minimize degradation of data writing performance.

  Therefore, it is possible to provide a data recording apparatus and a data recording method that minimize data loss even in a harsh environment at a low cost.

  Although an embodiment has been described, this embodiment is presented as an example and is not intended to limit the scope of the invention. The novel embodiment can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. This embodiment and its modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

1, 2 ... CPU card, 11, 12 ... CPU, 13, 23 ... bus protocol conversion unit, 14, 24 ... SSD for OS, 15, 25 ... external memory, 16 ... communication interface unit, 17, 27 ... CPU bus, 18, 28 ... Internal bus, 21, 22 ... CPU, 26 ... Recording device, 30 ... VPX bus, 40 ... Network, 100 ... Data recording application, 200 ... Recording manager, 261 ... Synchronization function, 262 ... Controller, 263 ... Cache Memory, 265 ... backup power supply, 300 ... high level input / output cache, 400 ... buffer cache.

Claims (8)

Non-volatile recording media;
A data recording application for recording data acquired via a transmission path on the recording medium;
A plurality of cache memories provided in each storage hierarchy from the data recording application to the recording medium;
A data recording apparatus comprising: a recording manager that periodically issues a synchronization command to each of the cache memories and forcibly reflects the contents of each cache memory on the recording medium.   The data recording apparatus according to claim 1, wherein the transmission path is a serial transmission path that connects different substrates each having a processor.   The data recording apparatus according to claim 1, wherein the data recording application functions on a general-purpose operating system.   The data recording apparatus according to claim 1, wherein the recording medium is a recording device including a plurality of semiconductor storage elements arranged in an array. The semiconductor memory element is a NAND flash memory,
The data recording apparatus according to claim 4, wherein the recording manager issues the synchronization command so that the content of the cache memory is equal to or less than a minimum block size of the NAND flash memory.   The data recording apparatus according to claim 1, wherein the recording manager adaptively controls an issuance interval of the synchronization command to a cache memory of the recording medium based on an occupied band of the data. A data recording method for recording data acquired via a transmission line connecting different substrates having a processor capable of executing a data recording application on a non-volatile recording medium,
At least one processor periodically issues a synchronization command to each of a plurality of cache memories provided in each storage hierarchy from the data recording application to the recording medium, and the contents of each cache memory are transferred to the recording medium. A data recording method including a process of forcibly reflecting.   The data recording method according to claim 7, wherein the at least one processor adaptively controls an issuance interval of the synchronization command with respect to a cache memory of the recording medium based on an occupied band of the data.