JP2019146411A - Step-up converter - Google Patents

Abstract

To provide a step-up converter that can appropriately protect a small rated switch from excess current.SOLUTION: A step-up converter 10 comprises first to third reactors 11a to 11c, first to third lower arm switches S1L to S3L, first to third upper arm switches S1H to S3H, and a control device 30. A rated current Irc1 of the first lower arm switch S1L is smaller than rated currents Irc2 and Irc3 of the second and third lower arm switches S2L and S3L. The control device 30 performs switching control between the lower arm switches S1L to S3L so as to make a protection degree of the first lower arm switch S1L from excess current larger than a protection degree of the second and third lower arm switches S2L and S3L from excess current.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a boost converter.

  Conventionally, as can be seen in Patent Document 1, there is known a boost converter including two reactors, a switch provided individually corresponding to each reactor, and a diode provided individually corresponding to each reactor. ing. The input side of the boost converter is connected to the first end of each reactor. A switch is connected to the second end of each reactor. The second end of each reactor and the output side of the boost converter are connected by a diode.

Japanese Patent No. 4844696

  Among the switches of the boost converter, there is a configuration in which the rated current of the small rated switch that is one switch is smaller than the rated current of the large rated switch that is the other switch. In this configuration, it is required to properly protect the small-rated switch from overcurrent.

  The main object of the present invention is to provide a boost converter capable of appropriately protecting a small-rated switch from overcurrent.

  The present invention relates to a plurality of reactors having a first end connected to the input side, a switch provided individually corresponding to each of the reactors, connected to a second end of the reactor, and each of the reactors. And connecting the second end of the reactor and the output side, allowing the flow of current in the direction from the reactor toward the output side, and allowing the flow of current in the direction opposite to that direction. A rectifying element for blocking, and a control device for switching-controlling the switch so as to step up a DC voltage input from the input side and output the boosted voltage from the output side. Among the switches, the rated current of the small rated switch that is at least one and a part of the switches is smaller than the rated current of the large rated switch that is the remaining switches. The control device performs switching control of the small-rated switch and the large-rated switch so that the degree of protection against the overcurrent of the small-rated switch is larger than the degree of protection against the overcurrent of the large-rated switch.

  According to the present invention, a small-rated switch having a rated current smaller than that of a large-rated switch can be properly protected from overcurrent.

  Here, as a configuration embodying a method for switching control of the small rated switch and the large rated switch so that the degree of protection against the overcurrent of the small rated switch is larger than the degree of protection against the overcurrent of the large rated switch. For example, the configuration described below can be cited. The control device makes one switching cycle of the small rated switch shorter than one switching cycle of the large rated switch.

  According to this configuration, the current control response of the small-rated switch can be made higher than the current control response of the large-rated switch. For this reason, it is possible to appropriately protect a small rated switch having a smaller rated current than a large rated switch from an overcurrent.

  Further, as a configuration embodying a method for switching control of the small rated switch and the large rated switch so that the degree of protection against the overcurrent of the small rated switch is larger than the degree of protection against the overcurrent of the large rated switch. For example, the structure described below is also included. The step-up converter is connected to the small rated switch of each of the reactors, a large rated side detection unit that detects a current flowing in a large rated side reactor that is a reactor connected to the large rated switch of each of the reactors. A small-rated-side detection unit that detects a current flowing through a small-rated reactor that is a reactor, and the control device controls the current detected by the large-rated side detecting unit to a large-rated-side command current in an average current mode control. In order to control by the peak current mode control to control the current detected by the small rated side detection unit to the small rated side command current to control the large rated switch by the peak current mode control A small-rated-side control unit that performs switching control of the switch.

  In the peak current mode control, the peak value of the current flowing through the small rated switch can be limited by the small rated side command current. For this reason, it is possible to appropriately protect the small-rated switch from the overcurrent as compared with the large-rated switch that is switched by the average current mode control.

  Further, as a configuration embodying a method for switching control of the small rated switch and the large rated switch so that the degree of protection against the overcurrent of the small rated switch is larger than the degree of protection against the overcurrent of the large rated switch. For example, the structure described below is also included. The control device includes a large-rated-side control unit that performs switching control of the large-rated switch in order to control the current detected by the large-rated-side detection unit to a large-rated-side command current by peak current mode control, and the small-rated side A small-rated-side control unit that performs switching control of the small-rated switch in order to control the current detected by the side-detecting unit to a small-rated-side command current by peak current mode control. It is set smaller than the large rated side command current.

  According to this configuration, the peak value of the current flowing through the small rated switch can be made smaller than the peak value of the current flowing through the large rated switch. Thereby, a small rating switch can be protected appropriately from overcurrent.

The figure which shows the boost converter which concerns on 1st Embodiment. The figure which shows the current-voltage characteristic of a switch. The block diagram which shows the process of a control apparatus. The time chart which shows switching control of each switch. The figure which shows the responsiveness of electric current control. The block diagram which shows the process of the control apparatus which concerns on 2nd Embodiment. The block diagram which shows the process of the control apparatus which concerns on 3rd Embodiment. The figure which shows the boost converter which concerns on 4th Embodiment.

<First Embodiment>
Hereinafter, a first embodiment embodying a boost converter according to the present invention will be described with reference to the drawings. The boost converter is mounted on a vehicle, for example.

  As shown in FIG. 1, the boost converter 10 includes first to third reactors 11a to 11c, first to third upper arm switches S1H to S3H corresponding to rectifying elements, and first to third lower arm switches S1L to S3L. , Input side capacitor 12, output side capacitor 13, and control device 30.

  In the present embodiment, the first upper and lower arm switches S1H and S1L are N-channel MOSFETs as SiC devices. Therefore, in the first upper and lower arm switches S1H and S1L, the high potential side terminal is the drain and the low potential side terminal is the source. Body diodes are connected in antiparallel to the first upper and lower arm switches S1H and S1L. The second, third upper and lower arm switches S2H, S3H, S2L, S3L are IGBTs as Si devices. Therefore, in the second, third upper, and lower arm switches S2H, S3H, S2L, and S3L2, the high potential side terminal is a collector and the low potential side terminal is an emitter. Freewheel diodes are connected in antiparallel to the second, third, and upper arm switches S2H, S3H, S2L, and S3L.

  FIG. 2 shows the relationship between the current flowing through the switch and the voltage Von between the terminals of the switch. Specifically, FIG. 2 shows the voltage-current characteristics of the MOSFET source-drain voltage Vds and drain current Id, and the IGBT collector-emitter voltage Vce and collector-current Ic voltage-current characteristics.

  As shown in FIG. 2, in the small current region where the current is smaller than the predetermined current Iα, the drain-source voltage Vds for the drain current Id is lower than the collector-emitter voltage Vce for the collector current Ic. That is, in the small current region, the on-resistance of the MOSFET is smaller than the on-resistance of the IGBT. On the other hand, in the large current region where the current is larger than the predetermined current Iα, the collector-emitter voltage Vce for the collector current Ic is lower than the drain-source voltage Vds for the drain current Id. That is, in the large current region, the on-resistance of the IGBT is smaller than the on-resistance of the MOSFET.

  In the present embodiment, the first rated current Irc1 that is the rated current of the first upper and lower arm switches S1H and S1L is the second rated current Irc1 that is the rated current of the second upper and lower arm switches S2H and S2L, and 3 Lower than the third rated current Irc3 which is the rated current of the upper and lower arm switches S3H, S3L. The second rated current Irc1 and the third rated current Irc3 are the same value. In the present embodiment, the first lower arm switch S1L corresponds to a small rated switch, and the second and third lower arm switches S2L, S3L correspond to large rated switches.

  Returning to the description of FIG. 1, the positive terminal of the DC power supply 20 is connected to the high potential side input terminal TIH of the boost converter 10. The negative potential terminal of the DC power supply 20 is connected to the low potential side input terminal TIL of the boost converter 10. The high potential side input terminal TIH and the low potential side input terminal TIL are connected by an input side capacitor 12.

  A high potential side input terminal TIH is connected to the first ends of the first to third reactors 11a to 11c. The source of the first upper arm switch S1H and the drain of the first lower arm switch S1L are connected to the second end of the first reactor 11a. The source of the second upper arm switch S2H and the drain of the second lower arm switch S2L are connected to the second end of the second reactor 11b. The second end of the third reactor 11c is connected to the source of the third upper arm switch S3H and the drain of the third lower arm switch S3L.

  The high potential side output terminal TOH of the boost converter 10 is connected to the drains of the upper arm switches S1H to S3H. The sources of the lower arm switches S1L to S3L are connected to the low potential side output terminal TOL of the boost converter 10. The high potential side output terminal TOH and the low potential side output terminal TOL are connected by an output side capacitor 13. The high potential side terminal of the power supply target device 21 is connected to the high potential side output terminal TOH, and the low potential side terminal of the power supply target device 21 is connected to the low potential side output terminal TOL. The power supply target device includes, for example, a storage battery and an electric load.

  In the present embodiment, the inductance La of the first reactor 11a is larger than the inductances Lb and Lc of the second and third reactors 11b and 11c. This is because the first upper arm switch is used when overcurrent flows between the high potential side input terminal TIH and the high potential side output terminal TOH via the reactors 11a to 11c and the upper arm switches S1H to S3H. This is to protect S1H from overcurrent.

  That is, when the inductance La of the first reactor 11a is larger than the inductances Lb and Lc of the second and third reactors 11b and 11c, when the overcurrent tends to flow, the second and third reactors 11b and 11c Also, it becomes difficult for overcurrent to flow through the first reactor 11a. As a result, the first upper arm switch S1H having a smaller rated current than the second and third upper arm switches S2H and S3H can be protected from overcurrent.

  The overcurrent flows when, for example, a slip grip is generated in which the wheels grip the road surface after the wheels of the vehicle are idle. Further, the inductance Lb of the second reactor 11b and the inductance of the third reactor 11c are the same value. Further, the first reactor 11a corresponds to a small rated side reactor, and the second and third reactors 11b and 11c correspond to a large rated side reactor.

  Boost converter 10 includes first to third current sensors 14 a to 14 c and voltage sensor 15. The first current sensor 14a detects a current flowing through the first reactor 11a as a first reactor current IL1. The second current sensor 14b detects the current flowing through the second reactor 11b as the second reactor current IL2. The third current sensor 14c detects the current flowing through the third reactor 11c as a third reactor current IL3. Voltage sensor 15 detects the voltage across terminals of output side capacitor 13 as output voltage Vout of boost converter 10. In the present embodiment, it is assumed that the responsiveness of the first to third current sensors 14a to 14c is the same. As the first to third current sensors 14a to 14c, for example, those having Hall elements can be used. In the present embodiment, the first current sensor 14a corresponds to a small rating side detection unit, and the second and third current sensors 14b and 14c correspond to a large rating side detection unit. Detection values of the sensors 14 a to 14 c and 15 are input to the control device 30.

  The control device 30 boosts the input voltage input from the input terminals TIH and TIL and outputs the lower arm switches S1L to S3L and the upper arm switches S1H to S3H to output from the output terminals TOH and TOL. Turn on alternately. In each phase, the upper arm switch and the lower arm switch are alternately turned on in order to perform synchronous rectification. When not performing synchronous rectification, each upper arm switch S1H-S3H should just be always turned off.

  In the present embodiment, control device 30 determines which one of first to third lower arm switches S1L to S3L is to be driven based on command output power Wout that is output power required for boost converter 10. To do. Specifically, when it is determined that the command output power Wout is less than the first power W1, the control device 30 drives only the first lower arm switch S1L among the first to third lower arm switches S1L to S3L. . When it is determined that the command output power Wout is greater than or equal to the first power W1 and less than the second power W2, the control device 30 first and second lower of the first to third lower arm switches S1L to S3L. Only the arm switches S1L and S2L are driven. When it is determined that the command output power Wout is equal to or greater than the second power W2, the control device 30 drives all of the first to third lower arm switches S1L to S3L. The following description is based on the assumption that all of the first to third lower arm switches S1L to S3L are driven.

  The control device 30 feedback-controls the detected first, second, and third reactor currents IL1, IL2, and IL3 to the first, second, and third command currents Iref1, Iref2, and Iref3 by average current mode control. Control device 30 calculates total command current Itotal that is an output current required for boost converter 10 based on command output power Wout and output voltage Vout. The control device 30 sets the command currents Iref1, Iref2, and Iref3 so that the sum of the command currents Iref1, Iref2, and Iref3 becomes the total command current Itotal. In the present embodiment, it is assumed that the first command current Iref1 is smaller than the second and third command currents Iref2 and Iref3, and the second command current Iref2 and the third command current Iref3 have the same value. Each command current Iref1, Iref2, Iref3 is smaller than each rated current Irc1, Irc2, Irc3, for example.

  As illustrated in FIG. 3, the control device 30 includes first to third control units 31 to 33. The first control unit corresponds to a small rating side control unit, and the second and third control units 32 and 33 correspond to a large rating side control unit. The first control unit 31 controls the first reactor current IL1 to the first command current Iref1 (corresponding to the small rated side command current) by the average current mode control. Specifically, the first control unit 31 includes a first current deviation calculation unit 31a, a first feedback control unit 31b, a first comparator 31c, and a first carrier generation unit 31d. The first current deviation calculation unit 31a calculates the first current deviation ΔI1 by subtracting the first reactor current IL1 from the first command current Iref1.

  The first feedback control unit 31b calculates a first duty ratio Duty1 as an operation amount for performing feedback control of the first current deviation ΔI1 to zero. In the present embodiment, this feedback control is proportional-integral control. Therefore, the first duty ratio Duty1 is calculated as an addition value of the multiplication value of the first current deviation ΔI1 and the first proportional gain Kp1, the time integration value of the first current deviation ΔI1 and the multiplication value of the first integration gain Ki1. Is done. In the present embodiment, the first duty ratio Duty1 can take a value from 0 to 1.

  The first duty ratio Duty1 calculated by the first feedback control unit 31b is input to the non-inverting input terminal of the first comparator 31c. The first carrier signal of the first carrier generation unit 31d is input to the inverting input terminal of the first comparator 31c. In the present embodiment, the first carrier signal is a sawtooth signal having a minimum value of 0 and a maximum value of 1. One cycle of the first carrier signal is a first switching cycle Tsw1 that is one switching cycle of the first upper and lower arm switches S1H and S1L. When the first duty ratio Duty1 is larger than the first carrier signal, the logic of the first gate signal G1 that is the output signal of the first comparator 31c becomes H. As a result, the first lower arm switch S1L is turned on and the first upper arm switch S1H is turned off. On the other hand, when the first duty ratio Duty1 is smaller than the first carrier signal, the logic of the first gate signal G1 becomes L. As a result, the first upper arm switch S1H is turned on for synchronous rectification, and the first lower arm switch S1L is turned off.

  The second control unit 32 controls the second reactor current IL2 to the second command current Iref2 (corresponding to the large rated side command current) by the average current mode control. Specifically, the second control unit 32 includes a second current deviation calculation unit 32a, a second feedback control unit 32b, a second comparator 32c, and a second carrier generation unit 32d. The second current deviation calculation unit 32a calculates the second current deviation ΔI2 by subtracting the second reactor current IL2 from the second command current Iref2.

  The second feedback control unit 32b calculates the second duty ratio Duty2 as an operation amount for performing feedback control of the second current deviation ΔI2 to zero. In the present embodiment, this feedback control is proportional-integral control. Therefore, the second duty ratio Duty2 is calculated as an addition value of the multiplication value of the second current deviation ΔI2 and the second proportional gain Kp2, the time integration value of the second current deviation ΔI2 and the multiplication value of the second integration gain Ki2. Is done. In the present embodiment, the second duty ratio Duty2 can take a value from 0 to 1.

  The second duty ratio Duty2 calculated by the second feedback control unit 32b is input to the non-inverting input terminal of the second comparator 32c. The second carrier signal of the second carrier generation unit 32d is input to the inverting input terminal of the second comparator 32c. In the present embodiment, the second carrier signal is a sawtooth signal having a minimum value of 0 and a maximum value of 1. One cycle of the second carrier signal is twice as long as one cycle of the first carrier signal, and one cycle of the second carrier signal is one switching cycle of the second upper and lower arm switches S2H and S2L. The switching cycle is Tsw2 (= Tsw1 × 2). When the second duty ratio Duty2 is larger than the second carrier signal, the logic of the second gate signal G2 that is the output signal of the second comparator 32c becomes H. As a result, the second lower arm switch S2L is turned on and the second upper arm switch S2H is turned off. On the other hand, when the second duty ratio Duty2 is smaller than the second carrier signal, the logic of the second gate signal G2 becomes L. As a result, the second upper arm switch S2H is turned on for synchronous rectification, and the second lower arm switch S2L is turned off.

  The second switching cycle Tsw2 of the second and third lower arm switches S2L and S3L that are large rated switches is equal to the number of large rated switches in the first switching cycle Tsw1 of the first lower arm switch S1L that is a small rated switch. It can also be seen that the value is set to a value multiplied by “2”.

  The third control unit 33 controls the third reactor current IL3 to the third command current Iref3 (corresponding to the large rated side command current) by the average current mode control. Specifically, the third control unit 33 includes a third current deviation calculation unit 33a, a third feedback control unit 33b, a third comparator 33c, and a third carrier generation unit 33d. The third current deviation calculation unit 33a calculates the third current deviation ΔI3 by subtracting the third reactor current IL3 from the third command current Iref3.

  The third feedback control unit 33b calculates a third duty ratio Duty3 as an operation amount for performing feedback control of the third current deviation ΔI3 to zero. In the present embodiment, this feedback control is proportional-integral control. The second duty ratio Duty2 is calculated as an addition value of the multiplication value of the third current deviation ΔI3 and the second proportional gain Kp2, the time integration value of the third current deviation ΔI3 and the multiplication value of the second integration gain Ki2. In the present embodiment, the third duty ratio Duty3 can take a value from 0 to 1.

  The third duty ratio Duty3 calculated by the third feedback control unit 33b is input to the non-inverting input terminal of the third comparator 33c. The third carrier signal of the third carrier generation unit 33d is input to the inverting input terminal of the third comparator 33c. In the present embodiment, the third carrier signal is a sawtooth signal having a minimum value of 0 and a maximum value of 1. One period of the third carrier signal is the same period as one period of the second carrier signal, and one period of the third carrier signal is one switching period of the third upper and lower arm switches S3H and S3L. Tsw2. When the third duty ratio Duty3 is larger than the third carrier signal, the logic of the third gate signal G3 that is the output signal of the third comparator 33c becomes H. As a result, the third lower arm switch S3L is turned on and the third upper arm switch S3H is turned off. On the other hand, when the third duty ratio Duty3 is smaller than the third carrier signal, the logic of the third gate signal G3 becomes L. As a result, the third upper arm switch S3H is turned on for synchronous rectification, and the third lower arm switch S3L is turned off.

  In the present embodiment, the responsiveness of the first reactor current IL1 to the first command current Iref1 by the average current mode control of the first control unit 31 is the second response by the average current mode control of the second and third control units 32 and 33. , The responsiveness of the second and third reactor currents IL2 and IL3 with respect to the third command currents Iref2 and Iref3 is set higher. As an example, in the present embodiment, the first proportional gain Kp1 is set larger than the second proportional gain Kp2, and the first integral gain Ki1 is set larger than the second integral gain Ki2. However, in order to make the responsiveness in the first control unit 31 higher than the responsiveness in the second and third control units 32 and 33, the condition that the first proportional gain Kp1 is larger than the second proportional gain Kp2, and It is not essential to satisfy both the conditions that the first integral gain Ki1 is larger than the second integral gain Ki2. For example, the first proportional gain Kp1 may be larger than the second proportional gain Kp2, and the first integral gain Ki1 may be equal to or less than the second integral gain Ki2.

  FIG. 4 shows a switching mode of each of the lower arm switches S1L to S3L of the present embodiment. FIG. 4 illustrates a case where the respective time ratios Duty1 to Duty3 are 0.5 (50%) in the current continuous mode.

  As shown in FIG. 4A, the first lower arm switch S1L is turned on / off in the first switching period Tsw1. As shown in FIG. 4B, the second lower arm switch S2L is turned on / off in the second switching period Tsw2. The ON switching timing of the first lower arm switch S1L is synchronized with the ON switching timing of the second lower arm switch S2L.

  As shown in FIG. 4C, the third lower arm switch S3L is turned on / off in the second switching period Tsw2. The ON switching timing of the third lower arm switch S3L and the ON switching timing of the second lower arm switch S2L are shifted by ½ of the second switching cycle Tsw2.

  With the switching modes shown in FIGS. 4A to 4C, the fluctuation cycle of the total current of the second reactor current IL2 and the third reactor current IL3 becomes equal to the fluctuation cycle of the first reactor current IL1. Further, the phase of the first reactor current IL1 with respect to the total current is shifted by a half of the fluctuation period of the total current. Thereby, the ripple of the output current of boost converter 10 can be reduced.

  According to the embodiment described in detail above, the following effects can be obtained.

  The first switching period Tsw1 of the first lower arm switch S1L having a small rated current is set shorter than the second switching period Tsw2 of the second and third lower arm switches S2L and S3L having a large rated current. For this reason, the responsiveness of the current control of the first lower arm switch S1L can be made higher than the responsiveness of the current control of the second and third lower arm switches S2L, S3L. Thereby, 1st lower arm switch S1L with a small rated current can be protected appropriately from an overcurrent.

  In step-up converter 10, the phase having the first upper and lower arm switches S1H and S1L is the first phase, the phase having the second upper and lower arm switches S2H and S2L is the second phase, and the third upper, lower The phase having the arm switches S3H and S3L is the third phase. Instead of increasing only the responsiveness of the current control of the first phase, a configuration of increasing the responsiveness of the current control of all phases is also conceivable. However, in this case, it is necessary to use a high processing capability as the control device 30, and the cost of the boost converter 10 increases. On the other hand, when a control device having a high processing capacity cannot be used, the processing load of the control device 30 exceeds the allowable value, and there is a concern that the control device 30 cannot properly perform current control.

  The responsiveness of the first reactor current IL1 to the first command current Iref1 by the average current mode control of the first control unit 31 is the second and third command currents by the average current mode control of the second and third control units 32 and 33. The responsiveness of the second and third reactor currents IL2 and IL3 with respect to Iref2 and Iref3 is set higher. Thereby, 1st lower arm switch S1L can be protected more appropriately from overcurrent.

Second Embodiment
Hereinafter, the second embodiment will be described with reference to the drawings with a focus on differences from the first embodiment. In the present embodiment, the control device 30 includes a first control unit 40 that performs peak current mode control instead of the first control unit 31 that performs average current mode control. By the peak current mode control, the first reactor current IL1 is controlled to the first command current Iref1.

  Further, the current responsiveness of the first current sensor 14a is higher than the responsiveness of the second and third current sensors 14b and 14c. In the present embodiment, a current transformer is used as the first current sensor 14a. Thereby, the cost of step-up converter 10 can be reduced as compared with the case where all the current sensors 14a to 14c have current lances. FIG. 5 shows the transition of the detected value of the first current sensor 14a by a solid line when the current actually flowing through each reactor changes in a step shape as shown by a one-dot chain line, and shows the second and third currents. Transition of detection values of the sensors 14b and 14c is indicated by a broken line.

  FIG. 6 shows a block diagram of the first control unit 40. The first control unit 40 includes a first comparator 40a, a first adder 40b, and a first RS flip-flop 40c. The first command current Iref1 is input to the inverting input terminal of the first comparator 40a. The first adder 40b outputs the added value of the first reactor current IL1 and the slope compensation signal Slope as the first compensated current. The first post-compensation current is input to the non-inverting input terminal of the first comparator 40a. The first comparator 40a outputs a logic L signal when the first compensated current is smaller than the first command current Iref1. On the other hand, the first comparator 40a outputs a logic H signal when the first post-compensation current is larger than the first command current Iref1.

  The output signal of the first comparator 40a is input to the R terminal of the first RS flip-flop 40c. A clock signal is input to the S terminal of the first RS flip-flop 40c. The output signal of the first RS flip-flop 40c is the first gate signal G1. Note that one cycle of the clock signal input to the S terminal of the first RS flip-flop 40c is set to the first switching cycle Tsw1.

  In the peak current mode control, the peak value of the current flowing through the first lower arm switch S1L can be limited by the first command current Iref1. Therefore, the first lower arm switch S1L can be appropriately protected from overcurrent as compared with the second and third lower arm switches S2L and S3L that are switching-controlled by the average current mode control. In addition, the fact that the responsiveness of the first current sensor 14a is higher than the responsiveness of the second and third current sensors 14b and 14c also contributes to appropriate protection from overcurrent.

<Third Embodiment>
Hereinafter, the third embodiment will be described with reference to the drawings with a focus on differences from the second embodiment. In the present embodiment, instead of the second and third control units 32 and 33 that perform average current mode control, the control device 30 includes second and third control units 50 and 51 that perform peak current mode control. . The second and third reactor currents IL2 and IL3 are controlled to the second and third command currents Iref2 and Iref3 by the peak current mode control. In addition, the control apparatus 30 is provided with the 1st control part 40 of FIG.

  FIG. 7 shows a block diagram of the second and third control units 50 and 51.

  The second control unit 50 includes a second comparator 50a, a second adder 50b, and a second RS flip-flop 50c. The second command current Iref2 is input to the inverting input terminal of the second comparator 50a. The second adder 50b outputs the added value of the second reactor current IL2 and the slope compensation signal Slope as the second post-compensation current. The second post-compensation current is input to the non-inverting input terminal of the second comparator 50a.

  The output signal of the second comparator 50a is input to the R terminal of the second RS flip-flop 50c. A clock signal is input to the S terminal of the second RS flip-flop 50c. The output signal of the second RS flip-flop 50c becomes the second gate signal G2. Note that one cycle of the clock signal input to the S terminal of the second RS flip-flop 50c is set to the second switching cycle Tsw2.

  The third control unit 51 includes a third comparator 51a, a third adder 51b, and a third RS flip-flop 51c. The third command current Iref3 is input to the inverting input terminal of the third comparator 51a. The third adder 51b outputs the added value of the third reactor current IL3 and the slope compensation signal Slope as the third post-compensation current. The third post-compensation current is input to the non-inverting input terminal of the third comparator 51a. Note that the third command current Iref3 and the second command current Iref2 are set to the same value, for example.

  The output signal of the third comparator 51a is input to the R terminal of the third RS flip-flop 51c. A clock signal is input to the S terminal of the third RS flip-flop 51c. The output signal of the third RS flip-flop 51c is the third gate signal G3. Note that one cycle of the clock signal input to the S terminal of the third RS flip-flop 51c is set to the second switching cycle Tsw2. Further, the phase of this clock signal and the phase of the clock signal input to the S terminal of the second RS flip-flop 50c are shifted by ½ of the second switching period Tsw2.

  In the present embodiment, the first command current Iref1 is set smaller than the second and third command currents Iref2 and Iref3. For this reason, the peak value of the current flowing through the first lower arm switch S1L having a small rated current can be made smaller than the peak value of the current flowing through the second and third lower arm switches S2L and S3L having a large rated current. Thereby, 1st lower arm switch S1L can be protected appropriately from an overcurrent.

  Incidentally, each command current is calculated as an operation amount for feedback-controlling the detected output voltage Vout to the command output voltage Vo * of the boost converter 10, for example. In this case, the proportional gain used in the feedback control for calculating the first command current Iref1 and the feedback gain such as the integral gain are proportional to the proportional gain used in the feedback control for calculating the second and third command currents Iref2 and Iref3. It may be larger than a feedback gain such as an integral gain.

<Fourth embodiment>
Hereinafter, the fourth embodiment will be described with reference to the drawings with a focus on differences from the first embodiment. In the present embodiment, the method for detecting the reactor current is changed.

  FIG. 8 shows a boost converter 10 according to the present embodiment. In FIG. 8, the same components as those shown in FIG. 1 are given the same reference numerals for the sake of convenience.

  The first lower arm switch S1L includes a first sense terminal St1 that outputs a minute current having a correlation with a current flowing through the first lower arm switch S1L. The output current of the first sense terminal St1 during the period in which the first lower arm switch S1L is on is detected as the current flowing through the first reactor 11a. The output current of the first sense terminal St1 is input to the control device 30. In the present embodiment, the first sense terminal St1 corresponds to a low-rated side sense terminal.

  The second lower arm switch S2L includes a second sense terminal St2 that outputs a minute current having a correlation with a current flowing through the second lower arm switch S2L. The output current of the second sense terminal St2 during the period when the second lower arm switch S2L is on is detected as the current flowing through the second reactor 11b. The third lower arm switch S3L includes a third sense terminal St3 that outputs a minute current having a correlation with a current flowing through the third lower arm switch S3L. The output current of the third sense terminal St3 during the period when the third lower arm switch S3L is on is detected as the current flowing through the third reactor 11c. The output currents of the second and third sense terminals St2 and St3 are input to the control device 30. In the present embodiment, the second and third sense terminals St2 and St3 correspond to the large rating side sense terminals.

  In this embodiment, instead of the detection values of the current sensors 14a to 14c, the output currents of the sense terminals St1 to St3 are used in the average current mode control shown in FIG.

  Incidentally, in the configuration shown in FIG. 8, each of the current sensors 14a to 14c is not essential. Since each current sensor 14a to 14c is not provided in boost converter 10, the number of components of boost converter 10 can be reduced, and the cost of boost converter 10 can be reduced.

  According to the present embodiment described above, the same effect as that of the first embodiment can be obtained.

<Other embodiments>
Each of the above embodiments may be modified as follows.

  -In each feedback control part 31b, 32b, 33b of FIG. 3, for example, differentiation control may be included.

  The rectifying element is not limited to the upper arm switches S1H to S3H, and may be a diode, for example. In this case, the cathode of the diode is connected to the high potential side output terminal TOH, and the anode is connected to the reactor.

  In FIG. 3, the proportional gain of the second feedback control unit 32b and the proportional gain of the third feedback control unit 33b may be different. Further, the integral gain of the second feedback control unit 32b and the integral gain of the third feedback control unit 33b may be different.

  -It is good also as Tsw1 <> Tsw2 / 2 on the condition that 1st switching period Tsw1 is shorter than 2nd switching period Tsw2.

  -The number of sets of reactors and lower arm switches is not limited to three, and may be two or four or more.

  -The combination of the lower arm switch is not limited to the combination of IGBT and MOSFET, but may be other combinations.

  DESCRIPTION OF SYMBOLS 10 ... Boost converter, 11a-11c ... 1st-3rd reactor, 30 ... Control apparatus, S1L-S3L ... 1st-3rd lower arm switch, S1H-S3H ... 1st-3rd upper arm switch.

Claims (10)

A plurality of reactors (11a to 11c) whose first ends are connected to the input side;
A switch (S1L to S3L) provided individually corresponding to each of the reactors and connected to a second end of the reactor;
Provided individually corresponding to each reactor and connecting the second end of the reactor and the output side, allowing the flow of current in the direction from the reactor to the output side, and opposite to that direction Rectifying elements (S1H to S3H) for blocking the flow of current in the direction;
A control device (30) for switching control of the switch to boost the DC voltage input from the input side and output the DC voltage from the output side,
The rated current of the small rated switch (S1L) which is at least one of the switches and a part of the switches is made smaller than the rated current of the large rated switches (S2L, S3L) which are the remaining switches. And
The control device is a boost converter (10) that performs switching control of the small-rated switch and the large-rated switch so that the degree of protection of the small-rated switch against overcurrent is larger than the degree of protection of the large-rated switch against overcurrent. .   2. The boost converter according to claim 1, wherein the control device makes one switching cycle of the small-rated switch shorter than one switching cycle of the large-rated switch.   The fluctuation cycle of the current flowing to the output side by switching control of the small-rated switch is equal to the fluctuation cycle of the current flowing to the output side by switching control of the large-rated switch, and the switching of the small-rated switch The control device is configured so that the phase of the current flowing to the output side by control and the current flowing to the output side by switching control of the large rated switch is shifted by a half of the fluctuation period. The boost converter according to claim 2, wherein both of the rated switches are switching-controlled. A large rated side detector (14b, 14c, St2, St3) for detecting a current flowing through a large rated side reactor (11b, 11c) that is a reactor connected to the large rated switch among the reactors;
A small rated side detector (14a, St1) that detects a current flowing through a small rated side reactor (11a) that is a reactor connected to the small rated switch among the reactors,
The controller is
A large rated side control unit (32, 33) for controlling the switching of the large rated switch so as to control the current detected by the large rated side detection unit to a large rated side command current by average current mode control;
2. A small-rated side control unit (40) that performs switching control of the small-rated switch so as to control the current detected by the small-rated side detection unit to a small-rated side command current by peak current mode control. Boost converter described in 1. The large rated side detection unit includes large rated side sense terminals (St2, St3) that output a minute current having a correlation with a current flowing through the large rated switch, and outputs an output current of the large rated side sense terminal to the large rated side sense terminal. Detects the current flowing through the rated reactor,
The small rated side detection unit has a small rated side sense terminal (St1) that outputs a minute current having a correlation with a current flowing through the small rated switch, and outputs an output current of the small rated side sense terminal to the small rated side. The boost converter according to claim 4, wherein the boost converter detects the current flowing through the reactor.   The responsiveness of the current detected by the small rated side detector to the change in the current flowing through the small rated side reactor corresponds to the current detected by the large rated side detector from the change in the current flowing through the large rated side reactor. 6. The boost converter according to claim 4 or 5, wherein the boost converter is higher than the responsiveness. A large rated side detector (14b, 14c, St2, St3) for detecting a current flowing through a large rated side reactor (11b, 11c) that is a reactor connected to the large rated switch among the reactors;
A small rated side detector (14a, St1) that detects a current flowing through a small rated side reactor (11a) that is a reactor connected to the small rated switch among the reactors,
The controller is
A large rated side control unit (50, 51) for switching the large rated switch so as to control the current detected by the large rated side detection unit to a large rated side command current by peak current mode control;
A small-rated-side control unit (40) that controls the small-rated switch so as to control the current detected by the small-rated-side detecting unit to a small-rated-side command current by peak current mode control,
2. The boost converter according to claim 1, wherein the small rated side command current is set smaller than the large rated side command current.   The feedback gain of feedback control used in the small rated side control unit is set larger than the feedback gain of feedback control used in the large rated side control unit. Boost converter.   Among the reactors, the inductance of the small-rated reactor (11a) that is a reactor connected to the small-rated switch is the large-rated reactor (11b, 11) that is the reactor connected to the large-rated switch among the reactors. The boost converter according to any one of claims 1 to 8, wherein the boost converter is larger than the inductance of 11c). The small rated switch has an on-resistance smaller than the large rated switch in a small current region smaller than a predetermined current (Iα),
The boost converter according to any one of claims 1 to 9, wherein the large-rated switch has an on-resistance that is smaller than that of the small-rated switch in a large current region that is equal to or greater than the predetermined current.

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