JP2019133474A - Information processing apparatus, setting method and program - Google Patents

Abstract

To provide an information processing apparatus capable of changing settings of a circuit board in consideration of a module connected to the circuit board.SOLUTION: The information processing apparatus (image forming apparatus 10) that is capable of changing function of circuits and that is connectable to a circuit board connected to a module includes: a reception unit that receives determination data transmitted by the module and setting data transmitted by the circuit board; a module determination unit that determines a type of the module on the basis of the determination data; a comparison unit that compares stored data based on the type of the module with the setting data; and a transmission unit that transmits the stored data to the circuit board when the setting data and the stored data are different from each other.SELECTED DRAWING: Figure 3

Description

  The present invention relates to an information processing apparatus, a setting method, and a program.

  There is known a method in which a plurality of circuit boards are mounted on a collective board called a so-called mother board and the like, and an electronic device performs information processing using the plurality of circuit boards.

  For example, first, an electronic device including a plurality of substrates stores function information to be set on each substrate. And if a board | substrate is mounted | worn, an electronic device will distribute function information. As described above, a method for realizing an electronic device having a desired performance with certainty by simply mounting a circuit board on a collective board is known (for example, see Patent Document 1).

  However, a module may be further connected to the circuit board connected to the information processing apparatus. In such a case, the circuit board is often set in consideration of the module to be connected. On the other hand, in the conventional method, since the circuit board is not set in consideration of the module to be connected, a problem often occurs.

  An object of one embodiment of the present invention is to provide an information processing device capable of changing settings of a circuit board in consideration of a module connected to the circuit board.

An information processing apparatus that can change the function of a circuit according to an embodiment of the present invention and can be connected to a circuit board connected to a module,
A receiving unit for receiving determination data transmitted by the module and setting data transmitted by the circuit board;
A module determination unit that determines the type of the module based on the determination data;
A comparison unit for comparing the stored data based on the type of the module and the setting data;
When the setting data and the stored data are different, a transmission unit that transmits the stored data to the circuit board is provided.

  The information processing apparatus according to the embodiment of the present invention can change the setting of the circuit board in consideration of the module connected to the circuit board.

1 is a schematic diagram illustrating an example of an overall configuration of an image forming apparatus having an information processing apparatus according to a first embodiment. 1 is a block diagram illustrating a hardware configuration example of an image forming apparatus having an information processing apparatus according to a first embodiment. It is a functional block diagram which shows the function structural example of the information processing apparatus which concerns on 1st Embodiment. It is a flowchart which shows the example of the whole process by the information processing apparatus which concerns on 1st Embodiment. It is a block diagram which shows the hardware structural example of the image forming apparatus which has the information processing apparatus which concerns on 2nd Embodiment. It is a functional block diagram which shows the function structural example of the information processing apparatus which concerns on 2nd Embodiment. It is a flowchart which shows the example of the whole process by the information processing apparatus which concerns on 2nd Embodiment.

  Hereinafter, embodiments for carrying out the invention will be described with reference to the drawings.

<First Embodiment>
<Example of Overall Configuration of Image Forming Apparatus Having Information Processing Apparatus>
FIG. 1 is a schematic diagram illustrating an overall configuration example of an image forming apparatus having an information processing apparatus according to the first embodiment. For example, the mother board is used in the image forming apparatus 10 as shown in the figure.

  The image forming apparatus 10 includes peripheral devices having functions such as paper feeding, folding, stapling, cutting, or a combination thereof.

  Specifically, in the illustrated example, the image forming apparatus 10 is connected to a large-capacity paper feeding unit 101 and the like. For example, the large-capacity paper feeding unit 101 supplies paper or the like to the image forming apparatus 10. In this example, the server 3 or the like is connected to the image forming apparatus 10. For example, the server 3 transmits various data to the image forming apparatus 10. Further, in this example, an inserter 4 or the like is connected to the image forming apparatus 10. For example, the inserter 4 is used for using a cover or the like. Furthermore, in this example, the image forming apparatus 10 is connected to a folding unit 104 or the like. For example, the folding unit 104 performs a process of bending a sheet or the like into a predetermined shape. In this example, the finisher 6 and the like are connected to the image forming apparatus 10. For example, the finisher 6 performs stapling and punching on a sheet or the like. Further, in this example, the image forming apparatus 10 is connected to a cutting machine 7 or the like. For example, the cutting machine 7 cuts paper or the like into a predetermined size. The peripheral devices as described above are connected to the image forming apparatus 10, but the peripheral devices may be combined in various ways depending on applications.

  The image forming apparatus 10 includes an information processing apparatus such as a motherboard. Hereinafter, an example in which the information processing apparatus is a motherboard will be described. The mother board has a slot and the like for connecting the circuit board. That is, by inserting the circuit board into the slot, the motherboard can connect the circuit board and expand the function.

  Hereinafter, as illustrated, an example in which a mother board is connected to an image reading device 108 and an image data transmission device 109 via a circuit board will be described. In this example, the mother board receives image data transmitted from each device from the image reading device 108 and the image data transmission device 109. The image data is subjected to processing such as image processing by each circuit board. Next, the image data processed by the circuit board is sent to the motherboard.

  For example, the image reading device 108 is a sensor or the like. Accordingly, the image reading device 108 reads an image printed on a sheet and generates image data. On the other hand, the image data transmission device 109 is a so-called controller in an image forming apparatus, for example. Therefore, the image data transmission apparatus 109 can generate image data by performing image processing or the like on input data or the like.

  If each circuit board performs the same image processing, the mother board outputs image data indicating the result of the circuit board performing image processing on the image read by the sensor and the image sent by the controller. Thus, it can be compared with image data indicating the result of image processing performed by the circuit board. Then, the mother board can perform correction processing and the like based on the comparison result. As described above, the image forming apparatus 10 can improve the image quality by performing the correction process or the like.

<Hardware configuration example>
FIG. 2 is a block diagram illustrating a hardware configuration example of an image forming apparatus having the information processing apparatus according to the first embodiment. Hereinafter, as illustrated, a case where two PCBs (Printed Circuit Boards), which are examples of circuit boards, are connected to the motherboard 10H3 will be described as an example.

  First, the motherboard 10H3 includes a slot 10H31, a slot 10H32, a CPU (Central Processing Unit) 10H33, a ROM (Read-Only Memory) 10H34, a RAM (Random Access Memory) 10H37, and the like.

  Then, the CPU 10H33 included in the motherboard 10H3 uses the RAM 10H37 as a work area, executes a program stored in the ROM 10H34, and controls each module. The CPU 10H33 included in the motherboard 10H3 executes a program stored in the ROM 10H34 or the like, and executes processing on the image data.

  The slot 10H31 and the slot 10H32 are connectors or the like for electrically and mechanically connecting the PCB to the motherboard 10H3.

  The CPU 10H33 is an example of an arithmetic device and a control device.

  The ROM 10H34 is an example of a storage device that can store various data.

  Hereinafter, a PCB connected to the motherboard 10H3 through the slot 10H31 is referred to as a first PCB 10H1, and a PCB connected to the motherboard 10H3 through the slot 10H32 is referred to as a second PCB 10H2. In the example described below, it is assumed that the first PCB 10H1 and the second PCB 10H2 have the same configuration.

  As shown in the figure, the first PCB 10H1 includes a field-programmable gate array (FPGA) 10H11 and a ROM 10H12. Similarly, the second PCB 10H2 includes an FPGA 10H21 and a ROM 10H22.

  FPGA10H11 and FPGA10H21 are examples of PLD (Programmable Logic Device).

  The ROM 10H12 and the ROM 10H22 are examples of storage devices that store setting data and the like for setting each FPGA included in each PCB.

  The setting data stored in the ROM 10H12 and the ROM 10H22 is data for so-called configuration. Therefore, the setting data is downloaded from the ROM to the FPGA, for example, when the power is turned on, and used for configuration.

  That is, the user can change the function of the FPGA by rewriting the setting data. Specifically, first, the user inputs parameters and the like in accordance with the process desired to be executed by the FPGA, and setting data is generated. The setting data is stored in advance in a non-volatile storage device such as the ROM 10H12 using a JTAG (Joint Test Action Group) or the like. If it does in this way, the function of the circuit mounted on a circuit board can be changed.

  Further, a module is connected to each circuit board. Hereinafter, as illustrated, it is assumed that the first module M1 is connected to the first PCB 10H1, while the second module M2 is connected to the second PCB 10H2.

  The module is, for example, a device such as a sensor or a controller as shown in FIG. Further, as shown in the figure, the module has an IC (Integrated Circuit) M11 and ICM21, and can transmit data such as image data and determination data to the circuit board.

  The setting data is generated in consideration of the module type and the like. For example, when a module transmits image data to a circuit board, the size of the image data is often determined by the module specifications and the like. In this case, the size of the image data to be received is set in advance in the circuit on the receiving side based on the setting data. Thus, a module is a device that affects the setting of a circuit that is a destination of data to be transmitted, depending on the type or the like. Therefore, the module does not have to be a sensor or a controller as described above, and may be another type of information processing apparatus.

  The type of module may not be a so-called model. That is, the module type may be a mode that affects the setting of a circuit that is a data transmission destination. Specifically, even in the same module, if the mode is different, the image data transmitted by the module may be different in size. In such a case, the module type may be determined in consideration of the mode or the like.

  Hereinafter, the setting data that is written in the ROM of each PCB and sets the functions of the FPGA of each PCB is simply referred to as “setting data”. In order to distinguish the setting data set in each PCB, the setting data stored in the first PCB 10H1 is referred to as “first setting data D11”. On the other hand, the setting data stored in the second PCB 10H2 is referred to as “second setting data D12”.

  Therefore, since the setting data differs depending on the function of each PCB, different data is used depending on the type of module connected to each PCB. Therefore, when the function that each PCB should have is determined by the specification or the like, the setting data to be used is determined based on the function.

  The setting data is separately stored in advance in the ROM 10H34 of the motherboard 10H3. Hereinafter, the setting data stored in the ROM 10H34 of the motherboard 10H3 is referred to as “stored data”. The saved data is saved for each PCB, for example, corresponding to the function of each PCB. Hereinafter, the storage data for the first PCB 10H1 is referred to as “first storage data D21” in order to distinguish the storage data for each PCB. On the other hand, the storage data for the second PCB 10H2 is referred to as “second storage data D22”.

<Functional configuration example>
FIG. 3 is a functional block diagram illustrating a functional configuration example of the information processing apparatus according to the first embodiment. Specifically, the motherboard 10H3 includes, for example, a reception unit FN1, a module determination unit FN2, a comparison unit FN3, a transmission unit FN4, and the like. Further, as illustrated, the motherboard 10H3 preferably further includes an acquisition unit FN5, a storage unit FN6, and the like. Hereinafter, a functional configuration as illustrated will be described as an example.

<Motherboard>
Each function of the reception unit FN1, the module determination unit FN2, the comparison unit FN3, the transmission unit FN4, the acquisition unit FN5, and the like included in the motherboard 10H3 is realized by executing a program stored in the ROM 10H34 included in the motherboard 10H3, for example. The The storage unit FN6 included in the motherboard 10H3 is realized by, for example, the ROM 10H34 included in the motherboard 10H3.

  The receiving unit FN1 receives the first determination data DJ1 sent from the first data transmitting / receiving unit F10 included in the first PCB 10H1. Then, the reception unit FN1 outputs the received first determination data DJ1 to the module determination unit FN2.

  Similarly, the receiving unit FN1 receives the second determination data DJ2 sent from the second data transmitting / receiving unit F20 included in the second PCB 10H2. Then, the reception unit FN1 outputs the received second determination data DJ2 to the module determination unit FN2.

  The receiving unit FN1 receives the first setting data D11 stored in the first data storage unit F13 included in the first PCB 10H1. Then, the reception unit FN1 outputs the received first setting data D11 to the comparison unit FN3.

  Similarly, the receiving unit FN1 receives the second setting data D12 stored in the second data storage unit F23 included in the second PCB 10H2. Then, the reception unit FN1 outputs the received second setting data D12 to the comparison unit FN3.

  The module determination unit FN2 determines the type of the first module M1 based on the first determination data DJ1 received from the reception unit FN1. Then, the module determination unit FN2 outputs the determination result to the comparison unit FN3.

  Similarly, the module determination unit FN2 determines the type of the second module M2 based on the second determination data DJ2 received from the reception unit FN1. Then, the module determination unit FN2 outputs the determination result to the comparison unit FN3.

  The storage unit FN6 stores first saved data D21 and second saved data D22.

  In response to a request from the transmission unit FN4 or the comparison unit FN3, the acquisition unit FN5 reads stored data stored in the storage unit FN6 and outputs the stored data to the transmission unit FN4 or the comparison unit FN3.

  The transmission unit FN4 sends a transmission request to the first data transmission / reception unit F10 so as to send the first determination data DJ1 of the first module M1 to the reception unit FN1.

  Similarly, the transmission unit FN4 sends a transmission request to the second data transmission / reception unit F20 so as to send the second determination data DJ2 of the second module M2 to the reception unit FN1.

  Further, the transmission unit FN4 sends a transmission request to the first data transmission / reception unit F10 so that the first data reading unit F12 reads the first setting data D11 and sends the first setting data D11 to the reception unit FN1.

  Similarly, the transmission unit FN4 sends a transmission request to the second data transmission / reception unit F20 so that the second data reading unit F22 reads the second setting data D12 and sends the second setting data D12 to the reception unit FN1.

  Further, the transmission unit FN4 requests the acquisition unit FN5 to read each setting data according to the comparison result by the comparison unit FN3, and the acquisition unit FN5 acquires the first data transmission / reception unit F10 or the second data transmission / reception unit F20. The first saved data D21 or the second saved data D22 is transmitted.

  Based on the first determination data DJ1 received from the reception unit FN1, the comparison unit FN3 reads the first saved data D21, which is setting data to be set in the first PCB 10H1, by the acquisition unit FN5. Then, the comparison unit FN3 compares the first saved data D21 received from the acquisition unit FN5 with the first setting data D11 received from the first data transmission / reception unit F10, and outputs the comparison result to the transmission unit FN4.

  Similarly, based on the second determination data DJ2 received from the reception unit FN1, the comparison unit FN3 reads the second saved data D22 that is setting data to be set in the second PCB 10H2 by the acquisition unit FN5. Then, the comparison unit FN3 compares the second saved data D22 received from the acquisition unit FN5 with the second setting data D12 received from the second data transmission / reception unit F20, and outputs the comparison result to the transmission unit FN4.

  In addition, based on the comparison result received from the comparison unit FN3, the transmission unit FN4 acquires the first storage data D21 in the acquisition unit FN5 when the first setting data D11 and the first storage data D21 do not match. Request to do. Then, the transmission unit FN4 transmits the acquired first saved data D21 to the first data transmission / reception unit F10. Subsequently, the transmission unit FN4 requests the first PCB 10H1 to rewrite the function of the FPGA.

  On the other hand, when the first setting data D11 and the first saved data D21 match based on the comparison result received from the comparing unit FN3, the transmitting unit FN4 transmits the first saved data D21 to the first data transmitting / receiving unit. It does not transmit to F10, nor does it make a request to rewrite the FPGA function.

  Similarly, based on the comparison result received from the comparison unit FN3, the transmission unit FN4 sends the second storage data D22 to the acquisition unit FN5 when the second setting data D12 and the second storage data D22 do not match. Request to get. Then, the transmission unit FN4 transmits the acquired second saved data D22 to the second data transmission / reception unit F20. Subsequently, the transmission unit FN4 requests the second PCB 10H2 to rewrite the function of the FPGA.

  On the other hand, if the second setting data D12 and the second saved data D22 match based on the comparison result received from the comparing unit FN3, the transmitting unit FN4 transmits the second saved data D22 to the second data transmitting / receiving unit. It does not transmit to F20 and does not make a request to rewrite the FPGA function.

<PCB>
The functions of the first data transmitting / receiving unit F10, the first data writing unit F11, the first data reading unit F12, and the like included in the first PCB 10H1 are determined by the FPGA 10H11 according to setting data stored in the ROM 10H12 of the first PCB 10H1, for example. This is a function to be realized. Or each function of 1st PCB10H1 may be implement | achieved when CPU10H33 which motherboard 10H3 has reads a program from ROM10H34 and sets FPGA10H11.

  The functions of the second data transmitting / receiving unit F20, the second data writing unit F21, the second data reading unit F22, the second data storage unit F23, and the like included in the second PCB 10H2 are the same as those of the first PCB 10H1, and the description thereof is omitted. To do.

  The first data transmission / reception unit F10 receives each request sent from the transmission unit FN4 and performs processing according to the received request. Specifically, upon receiving a transmission request for transmitting the first determination data DJ1 to the reception unit FN1, the first data transmission / reception unit F10 transmits the first determination data DJ1 to the first determination data transmission unit M1F1. A transmission request is sent to the part F10. And the 1st data transmission / reception part F10 will transmit the received 1st determination data DJ1 to the receiving part FN1, if the 1st determination data DJ1 is received.

  Further, upon receiving a transmission request to send the first setting data D11 from the transmission unit FN4, the first data transmission / reception unit F10 reads the first setting data D11 from the first data storage unit F13 to the first data reading unit F12. Let it come out. Then, the first data transmitting / receiving unit F10 transmits the read first setting data D11 to the receiving unit FN1.

  Further, when the first data transmitting / receiving unit F10 receives the request for rewriting the FPGA function of the first PCB 10H1 and the first stored data D21 from the transmitting unit FN4, the first stored data is sent to the first data writing unit F11. D21 is output.

  The first data writing unit F11 rewrites the first setting data D11 stored in the first data storage unit F13 based on the first saved data D21 received from the first data transmitting / receiving unit F10.

  The first data storage unit F13 stores first setting data D11 in order to realize the FPGA function of the first PCB 10H1.

  The first data reading unit F12 reads the first setting data D11 stored in the first data storage unit F13. Then, the read first setting data D11 is transmitted to the reception unit FN1.

<Module>
The first determination data transmission unit M1F1 included in the first module M1 is a function realized by the ICM 11 included in the first module M1.

  The first determination data transmission unit M1F1 transmits the first determination data DJ1 stored in the ROM or the like included in the first module M1 to the first data transmission / reception unit F10 of the first PCB 10H1.

  Note that the second determination data transmission unit M2F1 included in the second module M2 is the same as the first module M1, and thus the description thereof is omitted.

  With the functional configuration as described above, the motherboard 10H3 can change the setting of the circuit board in consideration of the connected module. For example, if the setting data according to the type of module is not used, the circuit board is liable to cause problems such as malfunction, malfunction or failure.

  On the other hand, in a configuration having a connection portion or the like to which a plurality of circuit boards can be connected, for example, recycling or a circuit board may be erroneously inserted into an incorrect connection portion. As described above, even if there is an erroneous insertion, the circuit board to be connected may be specified by checking the ID set in advance on the circuit board to prevent a problem.

  However, since the ID is determined in advance on the circuit board, the module connected to the circuit board is often not changed by checking the ID. For this reason, when there is a change in the module, the module type and the circuit board setting often do not match. Therefore, when there is a change in the module or the like, problems are likely to occur in the circuit board.

  On the other hand, with the functional configuration as illustrated, for example, even if there is a change in which the first module and the second module are connected in reverse, the mother board 10H3 is connected to each circuit board. Send the setting data according to the type. Each circuit board is changed to setting data transmitted from the motherboard 10H3. When such a change is made, the circuit board is set according to the type of the module, so that each circuit board can reduce the occurrence of problems. Therefore, the motherboard 10H3 can compensate for the operation of the circuit board even if there is a change in the connection status such as erroneous insertion of the circuit board or reverse connection of the module.

<Example of overall processing>
FIG. 4 is a flowchart illustrating an example of overall processing performed by the information processing apparatus according to the first embodiment. Hereinafter, as an example of the hardware configuration illustrated in FIG. 2, processing performed when power is turned on after the first module M1, the first PCB 10H1, the second module M2, the second PCB 10H2, and the motherboard 10H3 are connected. explain.

  First, steps S101 to S113 are processing examples for the first module M1, the first PCB 10H1, and the motherboard 10H3.

  In step S101, the transmission unit FN4 included in the motherboard 10H3 requests the first PCB 10H1 for the first determination data DJ1.

  In step S102, the first data transmitter / receiver F10 included in the first PCB 10H1 requests the first determination data DJ1 from the first module M1.

  In step S103, the first determination data transmitter M1F1 included in the first module M1 transmits the first determination data DJ1 to the first data transmitter / receiver F10 included in the first PCB 10H1.

  In step S104, the first data transmitter / receiver F10 included in the first PCB 10H1 transmits the first determination data DJ1 to the receiver FN1 included in the motherboard 10H3.

  Each determination data is an ID (Identification) that can identify the type of module. Each determination data is set in advance in, for example, an IC included in each module. That is, each determination data may be in a format that can identify the type of module. For example, the determination data may be an identification number or the like, or may be a character, a symbol, a number indicating a model number, or a combination thereof.

  In step S105, the module determination unit FN2 included in the motherboard 10H3 determines the type of the first module M1 based on the first determination data DJ1. As described above, since there is the first determination data DJ1 transmitted in step S104, the module determination unit FN2 included in the motherboard 10H3 can determine the type of the module.

  In step S106, the transmission unit FN4 included in the motherboard 10H3 requests the first setting data D11 from the first PCB 10H1.

  In step S107, the first data reading unit F12 included in the first PCB 10H1 reads the first setting data D11 from the ROM 10H12 in response to the request in step S106.

  In step S108, the first data transmitter / receiver F10 included in the first PCB 10H1 transmits the first setting data D11 to the receiver FN1 included in the motherboard 10H3 in response to the request in step S106.

  In step S109, the acquisition unit FN5 included in the motherboard 10H3 reads the first saved data D21 from the ROM 10H34 based on the determination result of the type of the first module M1.

  In step S110, the comparison unit FN3 included in the motherboard 10H3 compares the first setting data D11 and the first saved data D21. That is, the comparison unit FN3 included in the motherboard 10H3 determines whether or not the first setting data D11 and the first saved data D21 match.

  In step S111, the comparison unit FN3 provided in the motherboard 10H3 determines whether or not the first setting data D11 and the first saved data D21 are different. That is, as a result of the comparison in step S110, if the first setting data D11 and the first saved data D21 do not match (YES in step S111), the motherboard 10H3 proceeds to step S112. On the other hand, as a result of the comparison in step S110, if the first setting data D11 and the first saved data D21 match (NO in step S111), the motherboard 10H3 proceeds to step S121.

  In step S112, the transmission unit FN4 included in the motherboard 10H3 transmits the first saved data D21 to the first data transmission / reception unit F10 included in the first PCB 10H1.

  In step S113, the first data transmitting / receiving unit F10 included in the first PCB 10H1 receives the first saved data D21 transmitted in step S112, and writes the first saved data D21 in the ROM 10H12. In this way, the first setting data written in advance in the ROM 10H12 is overwritten on the first saved data D21.

  In addition, the same processing as in steps S101 to S113 is performed in steps S121 to S133 for the second PCB 10H2 and the second module M2. When there are three or more circuit boards, the same processing as in steps S101 to S113 is further performed as in steps S121 to S133.

<Second Embodiment>
The second embodiment is an image forming apparatus including an information processing apparatus such as a mother board, for example, as in the first embodiment. Hereinafter, as in the first embodiment, an image forming apparatus including a mother board will be taken as an example, and the description will be centered on differences from the first embodiment, and redundant description will be omitted.

<Hardware configuration example>
FIG. 5 is a block diagram illustrating a hardware configuration example of an image forming apparatus having the information processing apparatus according to the second embodiment. Compared to the hardware configuration shown in FIG. 2, the hardware configuration shown is different in that two LEDs (Light Emitting Diodes) are added.

  The first LED 10H35 and the second LED 10H36 are examples of display devices that are turned on or off based on control by the CPU 10H33.

  In the illustrated example, the first LED 10H35 corresponds to the first PCB 10H1. Similarly, the second LED 10H36 corresponds to the second PCB 10H2. When the CPU 10H33 determines, for example, a so-called error, the CPU 10H33 controls the LED corresponding to the PCB determined to be an error to be lit.

  Note that the number of LEDs need not be two as illustrated. That is, the number of LEDs may be, for example, three or more or one. The display device may be a device other than the LED.

<Functional configuration example>
FIG. 6 is a functional block diagram illustrating a functional configuration example of the information processing apparatus according to the second embodiment. Compared to the first embodiment, the second embodiment is different in that a first signal transmission unit F14, a second signal transmission unit F24, a determination unit FN7, and a display control unit FN8 are added. In the following, the same components as those shown in FIG.

<Motherboard>
The determination unit FN7 is realized by the CPU 10H33 included in the motherboard 10H3 executing a program stored in the ROM 10H34 included in the motherboard 10H3 using the RAM 10H37 as a work area. The display unit is realized by an LED or the like.

  The determination unit FN7 determines whether or not a write completion signal is received from the first signal transmission unit F14. Then, the determination unit FN7 outputs the determination result to the display control unit FN8. Similarly, the determination unit FN7 determines whether a write completion signal has been received from the second signal transmission unit F24. Then, the determination unit FN7 outputs the determination result to the display control unit FN8.

  The display control unit FN8 performs LED lighting control based on the determination result output from the determination unit FN7. Specifically, if the determination result is determined by the determination unit FN7 that the display control unit FN8 has not received the write completion signal from the first signal transmission unit F14 included in the first PCB 10H1, the display control unit FN8 In order to notify the user that writing to the first data storage unit F13 included in the 1PCB 10H1 is not normally completed, the first LED 10H35 is turned on.

  Similarly, if the display control unit FN8 determines that the determination unit FN7 has not received the write completion signal from the second signal transmission unit F24 included in the second PCB 10H2, the display control unit FN8 determines that the second PCB 10H2 The second LED 10H36 is lit to notify the user that writing to the second data storage unit F23 provided does not end normally.

<PCB>
The first signal transmission unit F14 included in the first PCB 10H1 has successfully completed writing to the first data storage unit F13 based on the first stored data D21 received by the first data writing unit F11 from the first data transmission / reception unit F10. Is sent to the receiving unit FN1.

  Similarly, the second signal transmission unit F24 included in the second PCB 10H2 normally writes to the second data storage unit F23 based on the second stored data D22 received by the second data writing unit F21 from the second data transmission / reception unit F20. A write completion signal notifying the end is transmitted to the reception unit FN1.

  As described above, when there is no abnormality and the setting data is normally overwritten on the circuit board, the motherboard 10H3 can determine that the setting of the circuit board has been changed based on a signal such as a write completion signal.

  On the other hand, if any one of the transmission, reading, and writing of each data is abnormal, the setting data may not be overwritten normally, so the circuit board settings may not be changed. Is expensive. Even in such a case, the motherboard 10H3 can display the occurrence of the abnormality and the circuit board or the like in which the abnormality has occurred. Then, the user can specify from the display that an abnormality has occurred and a circuit board in which the abnormality has occurred.

<Example of overall processing>
FIG. 7 is a flowchart illustrating an example of overall processing performed by the information processing apparatus according to the second embodiment. Hereinafter, the same processes as those shown in FIG. 4 are denoted by the same reference numerals, and the description thereof is omitted. Note that the overall processing according to the second embodiment differs from the overall processing according to the first embodiment in that steps S201 to S205 are added as processing for the first PCB. Further, in the configuration having a plurality of circuit boards as shown in FIG. 5, the same processing as Step S201 to Step S205 is added as Step S211 to Step S215 for the second PCB.

  In step S201, the determination unit FN7 included in the motherboard 10H3 determines whether the first determination data DJ1 transmitted in step S104 has been normally received. For example, in step S104, the first determination data transmission unit M1F1 included in the first module M1 transmits a transmission completion signal when transmitting the first determination data DJ1. Then, when the determination unit FN7 included in the motherboard 10H3 receives the transmission completion signal, the determination unit FN7 determines whether the first determination data DJ1 is received via the first PCB 10H1. Subsequently, when the first determination data DJ1 has already been received, the determination unit FN7 included in the motherboard 10H3 determines that the first determination data DJ1 has been normally received. On the other hand, if the transmission completion signal is received but the determination data is not received or the first determination data DJ1 is incomplete data, the determination unit FN7 included in the motherboard 10H3 receives the first determination data DJ1. Judge that it is not received normally.

  Next, when the determination unit FN7 included in the motherboard 10H3 determines that the first determination data DJ1 has been normally received (YES in Step S201), the determination unit FN7 included in the motherboard 10H3 proceeds to Step S105. On the other hand, when the determination unit FN7 included in the motherboard 10H3 determines that the first determination data DJ1 is not normally received (NO in step S201), the motherboard 10H3 proceeds to step S205.

  In step S202, the determination unit FN7 included in the motherboard 10H3 determines whether or not the first setting data D11 transmitted in step S108 has been normally received. For example, in step S104, the first signal transmission unit F14 included in the first PCB 10H1 transmits a transmission completion signal when transmitting the first setting data D11. And the determination part FN7 with which motherboard 10H3 is provided judges whether the 1st setting data D11 was received, if the transmission completion signal is received. Subsequently, when the first setting data D11 has already been received, the determination unit FN7 included in the motherboard 10H3 determines that the first setting data D11 has been normally received. On the other hand, if the transmission completion signal is received but the first setting data D11 is not received or the first setting data D11 is incomplete data, the determination unit FN7 included in the motherboard 10H3 determines the first setting data. It is determined that the data D11 has not been received normally.

  Next, when the determination unit FN7 included in the motherboard 10H3 determines that the first setting data D11 has been normally received (YES in step S202), the motherboard 10H3 proceeds to step S109. On the other hand, when the determination unit FN7 included in the motherboard 10H3 determines that the first setting data D11 is not normally received (NO in step S202), the motherboard 10H3 proceeds to step S205.

  In step S203, the first signal transmission unit F14 included in the first PCB 10H1 transmits a write completion signal to the motherboard 10H3. The write completion signal is a signal for writing to the ROM the first saved data D21 received by the first PCB 10H1 in step S113 and notifying that the overwrite has been completed.

  In step S204, the determination unit FN7 provided in the motherboard 10H3 determines whether or not the writing of the first saved data D21 has been normally completed in step S113. That is, when the write completion signal transmitted in step S203 is received, the determination unit FN7 provided in the motherboard 10H3 determines that the writing of the first saved data D21 has been completed normally. On the other hand, if the write completion signal has not been received, the determination unit FN7 included in the motherboard 10H3 determines that the writing of the first saved data D21 has not been completed normally.

  Next, when it is determined that the writing of the first saved data D21 has been completed normally (YES in step S204), the motherboard 10H3 proceeds to step S121. On the other hand, if it is determined that the writing of the first saved data D21 is not normally completed (NO in step S204), the motherboard 10H3 proceeds to step S205.

  In step S205, the display control unit FN8 included in the motherboard 10H3 turns on the LED. That is, the motherboard 10H3 performs a display notifying that an abnormality has occurred in the first PCB 10H1. In the hardware configuration shown in FIG. 5, the motherboard 10H3, for example, turns on the first LED 10H35 out of the two LEDs. As described above, when the display control unit FN8 included in the motherboard 10H3 performs display using the LED or the like, it can notify the user that an abnormality has occurred in data transmission, writing, reading, or the like. Further, by turning on the corresponding LED, the mother board 10H3 can notify which circuit board of the plurality of circuit boards is abnormal.

  In addition, the same processing as in steps S201 to S205 is performed in steps S211 to S215 for the second PCB 10H2 and the second module M2. In step S215, for example, the motherboard 10H3 turns on the second LED 10H36 out of the two LEDs.

<Other embodiments>
The number of circuit boards connected to the motherboard may be one. On the other hand, the mother board has a connection portion realized by a slot or the like that can connect a plurality of circuit boards, and three or more circuit boards may be connected.

  In addition, the apparatus including the motherboard which is the information processing apparatus of the present invention is not limited to the image forming apparatus, and may be an apparatus that can be connected to an external apparatus such as a PC (Personal Computer).

  Note that the mother board or the like does not have to be composed of a single device. That is, in the embodiment according to the present invention, the mother board may be a system constituted by a plurality of devices.

  Note that all or part of each processing according to the present invention may be described in a low-level language such as an assembler or a high-level language such as an object-oriented language, and realized by a program for causing a computer to execute a setting method. . Therefore, when the setting method is executed based on the program, the calculation device and the control device included in the computer perform calculation and control based on the program in order to execute each process. In addition, a storage device included in the computer stores data used for processing based on a program in order to execute each processing.

  Further, the program can be recorded and distributed on a computer-readable recording medium. The recording medium is a medium such as a magnetic tape, a flash memory, an optical disk, a magneto-optical disk, or a magnetic disk. Furthermore, the program can be distributed through a telecommunication line.

  As mentioned above, although the example in embodiment was demonstrated, this invention is not limited to the said embodiment. That is, various modifications and improvements are possible within the scope of the present invention.

10 Image forming apparatus M1 First module M2 Second module 10H1 First PCB
10H2 2nd PCB
D11 first setting data D12 second setting data DJ1 first determination data DJ2 second determination data D21 first storage data D22 second storage data FN1 reception unit FN2 module determination unit FN3 comparison unit FN4 transmission unit FN5 acquisition unit FN6 storage unit FN7 Judgment unit FN8 Display control unit

JP 2012-146189 A

Claims (7)

An information processing apparatus capable of changing the function of a circuit and connectable to a circuit board connected to a module,
A receiving unit for receiving determination data transmitted by the module and setting data transmitted by the circuit board;
A module determination unit that determines the type of the module based on the determination data;
A comparison unit for comparing the stored data based on the type of the module and the setting data;
An information processing apparatus comprising: a transmission unit configured to transmit the stored data to the circuit board when the setting data and the stored data are different. The information processing apparatus includes:
A storage unit for storing the saved data;
An acquisition unit for acquiring the stored data from the storage unit;
Further comprising
The acquisition unit
Based on the determination result by the module determination unit, the storage data is acquired from the storage unit,
The comparison unit includes:
The information processing apparatus according to claim 1, wherein the stored data acquired by the acquisition unit is compared with the setting data. The information processing apparatus includes:
A determination unit that determines whether the setting of the circuit board has been changed based on the setting data;
When it is determined that the setting of the circuit board could not be changed by the determination unit, a display control unit that performs display,
The information processing apparatus according to claim 1, further comprising: The information processing apparatus includes:
The information processing apparatus according to claim 1, further comprising a connection unit capable of connecting a plurality of the circuit boards. A setting method performed by an information processing apparatus that can change the function of a circuit and that can be connected to a circuit board connected to a module,
A receiving step in which the information processing apparatus receives determination data transmitted by the module and setting data transmitted by the circuit board;
A module determination step in which the information processing apparatus determines the type of the module based on the determination data;
An information processing apparatus, a comparison step of comparing the stored data based on the type of the module and the setting data;
An information processing apparatus, comprising: a transmission step of transmitting the stored data to the circuit board when the setting data is different from the stored data. 6. The setting method according to claim 5, further comprising a determination step of determining whether or not the setting of the circuit board has been changed based on the stored data. A program that allows a computer that can change the function of a circuit and that can be connected to a circuit board connected to a module to execute a setting method,
A receiving step in which the computer receives determination data transmitted by the module and setting data transmitted by the circuit board;
A module determining step of determining a type of the module based on the determination data;
A computer comparing the stored data based on the module type with the setting data;
A program for causing a computer to execute a transmission step of transmitting the stored data to the circuit board when the setting data is different from the stored data.

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