JP2019092222A - Receiver and receiving method - Google Patents

Abstract

To ensure error correction performance and information transmission efficiency even when an encoder/decoder terminates using LDPC-CC (low density parity check-convolutional codes).SOLUTION: A termination sequential length determination section 631 determines the length of a termination sequence which is transmitted being added to the tail of the information sequence according to the information length (information size) and the coding rate of the information sequence. A parity calculation section 632 performs an LDPC-CC encoding on a known information sequence which is required for generating the termination sequence of the information sequence and the determined termination sequential length, and calculates the parity sequence.SELECTED DRAWING: Figure 24

Description

  The present invention relates to a receiving apparatus and receiving method using Low Density Parity Check (LDPC-CC) capable of coping with a plurality of coding rates.

  2. Description of the Related Art In recent years, attention has been focused on low density parity check (LDPC) codes as error correction codes that can realize high error correction capability with a feasible circuit scale. Since the LDPC code has a high error correction capability and is easy to implement, it is adopted in an error correction coding system such as an IEEE 802.11n high-speed wireless LAN system or a digital broadcast system.

  An LDPC code is an error correction code defined by a low density parity check matrix H. Also, the LDPC code is a block code having a block length equal to the number N of columns of the parity check matrix H. For example, Non-Patent Document 1, Non-Patent Document 2, Non-Patent Document 3, and Non-Patent Document 4 propose random LDPC codes, Array LDPC codes, and QC-LDPC codes (QC: Quasi-Cyclic).

  However, many of the current communication systems, like Ethernet (registered trademark), are characterized by transmitting transmission information collectively in variable length packets or frames. When applying an LDPC code which is a block code to such a system, for example, there arises a problem of how to correspond a block of a fixed length LDPC code to a variable length Ethernet (registered trademark) frame. In IEEE 802.11n, the length of the transmission information sequence and the block length of the LDPC code are adjusted by performing padding processing and puncturing processing on the transmission information sequence, but the coding rate changes due to padding and puncturing. It is difficult to avoid sending out redundant or redundant sequences.

  For an LDPC code of such a block code (hereinafter, referred to as an LDPC-BC: Low-Density Parity-Check Block Code), encoding / decoding for an information sequence of an arbitrary length is performed. Investigation of possible low-density parity-check convolutional codes (LDPC-CC) has been conducted (see, for example, Non-Patent Document 1 and Non-Patent Document 2).

LDPC-CC is a convolutional code defined by a low density parity check matrix, and for example, parity check matrix H ^T [0, n] of LDPC-CC with coding rate R = 1/2 (= b / c) Is shown in FIG. Here, the element h ₁ ^(m) (t) of H ^T [0, n] takes 0 or 1. Also, all elements except h ₁ ^(m) (t) are zero. M represents a memory length in LDPC-CC, and n represents a codeword length of LDPC-CC. As shown in FIG. 1, in the LDPC-CC parity check matrix, 1 is placed only in the diagonal terms of the matrix and the elements in the vicinity thereof, and the elements in the lower left and upper right of the matrix are zero, and parallelograms It is characterized by being a matrix of type.

Here, when h ₁ ⁽⁰⁾ (t) = 1, h ₂ ⁽⁰⁾ (t) = 1, the encoder of the LDPC-CC defined by the parity check matrix H ^T [0, n] T is It is represented in FIG. As shown in FIG. 2, the LDPC-CC encoder is composed of shift registers M + 1 bit length c and a mod 2 adder (exclusive OR operation). Therefore, the LDPC-CC encoder can be realized by a circuit that is much simpler than the circuit that performs multiplication of the generator matrix and the LDPC-BC encoder that performs the operation based on the backward (forward) substitution method. It has the feature of being able to Further, since FIG. 2 is an encoder of a convolutional code, it is not necessary to divide the information sequence into fixed length blocks and encode it, and an information sequence of an arbitrary length can be encoded.

R. G. Gallager, “Low-density parity check codes,” IRE Trans. Inform. Theory, IT-8, pp 21-28, 1962. D. J. C. Mackay, “Good error-correcting codes based on very sparse matrixes,” IEEE Trans. Inform. Theory, vol. 45, no. 2, pp 399-431, March 1999. J. L. Fan, “Array codes as low-density parity-check codes,” proc. Of 2nd Int. Symp. On Turbo Codes, pp. 543-546, Sep. 2000. M. P. C. Fossorier, "Quasi-cyclic low-density codes from circulant permutation matrices," IEEE Trans. Inform. Theory, vol. 50, no. 8, pp. 1788-1793, Nov. 2001. MPC Fossorier, M. Mihaljevic, and H. Imai, “Reduced complexity iterative decoding of parity check codes based on belief propagation,” IEEE Trans. Commun., Vol. 47., no. 5, pp. 673-680, May 1999. J. Chen, A. Dholakia, E. Eleftheriou, MPC Fossorier, and X.-Yu Hu, “Reduced-complexity decoding of LDPC codes,” IEEE Trans. Commun., Vol. 53., no. 8, pp. 1288 -1299, Aug. 2005. J. Zhang, and M. P. C. Fossorier, "Shuffled iterative decoding," IEEE Trans. Commun., Vol. 53, no. 2, pp. 209-213, Feb. 2005. S. Lin, D. J. Jr., Costello, “Error control coding: Fundamentals and applications,” “Prentice-Hall. Tadashi Wadayama, "Low-density parity check code and its decoding method," Triceps.

  However, sufficient consideration has not been made on LDPC-CC and its encoders and decoders, which have multiple coding rates, low computation scale, and good reception quality of data.

  For example, Non-Patent Document 8 shows that puncturing is used to correspond to a plurality of coding rates. When puncturing is used to cope with a plurality of coding rates, first, a base code, that is, a mother code is prepared, a coding sequence in the mother code is created, and transmission is not performed from the coding sequence (puncture) Select a bit And, by changing the number of bits not to be transmitted, it corresponds to a plurality of coding rates. As a result, since both the encoder and the decoder can cope with all the coding rates by the encoder for the mother code and the decoder, there is an advantage that the operation scale (circuit size) can be reduced. .

  On the other hand, there is a method of preparing different codes for each coding rate (Distributed Codes) as a method of supporting a plurality of coding rates, and in particular, in the case of an LDPC code, as described in Non-Patent Document 9 Since it has the flexibility to be able to easily configure various code lengths and coding rates, it is general to use a plurality of codes for a plurality of coding rates. At this time, there is a disadvantage that the operation scale (circuit size) is large because a plurality of codes are used, but the data reception quality is very good as compared with the case where a plurality of coding rates are handled by puncturing. Have an advantage.

  When the above points are taken into consideration, by preparing a plurality of codes to correspond to a plurality of coding rates up to now, the operation scale of the encoder and the decoder can be ensured while securing the reception quality of data. There are few documents that discuss the generation method of the LDPC code that can reduce the error, and if it is possible to establish the generation method of the LDPC code that realizes this, improvement of the reception quality of data and reduction of the operation scale has been difficult until now. It becomes possible to achieve both.

  Further, since LDPC-CC is a kind of convolutional code, termination and tail biting are required to ensure reliability in decoding of information bits. However, sufficient consideration has not been made on LDPC-CC and its encoder and decoder that can reduce the number of terminations as much as possible while securing the reception quality of data.

  The object of the present invention is to prevent degradation of the error correction capability and avoid a reduction in the information transmission efficiency even when termination is performed in an encoder and a decoder using LDPC-CC. A receiving device and a receiving method are provided.

  The receiving apparatus according to the present invention is a low density parity check convolutional code (LDPC--) for an information sequence composed of a plurality of bits and known information added to the information sequence and changing according to a coding rate. A power line communication receiving unit for receiving a power line communication signal including a parity bit generated by an encoding operation using CC) and the information sequence, and a code of the LDPC-CC included in the received power line communication signal A control information generation unit that determines the length of the known information according to the coding rate used for the quantization operation; and a likelihood corresponding to the known information according to the length of the known information; A likelihood ratio generator that generates the likelihood of the information sequence, the likelihood of the parity bit, the likelihood of the information sequence, the likelihood of the parity bit, and the known bit rate, from the received power line communication signal Love Using the corresponding likelihood is subjected to a decoding operation comprises a decoding unit for decoding the information sequence, a configuration of a reception apparatus using a power line communication.

  The receiving method according to the present invention is characterized in that a low density parity check convolutional code (LDPC-) is applied to an information sequence composed of a plurality of bits and known information added to the information sequence and changing according to the coding rate. Receiving the power line communication signal including the parity bit generated by the encoding operation using CC) and the information sequence, and using the encoding operation of the LDPC-CC included in the received power line communication signal The length of the known information is determined according to the coding rate, the likelihood corresponding to the known information is generated according to the length of the known information, and the information from the received power line communication signal is The likelihood of the sequence, the likelihood of the parity bit are generated, and the decoding operation is performed using the likelihood of the information sequence, the likelihood of the parity bit, and the likelihood corresponding to the known information, Said information Decoding a row, a configuration of the receiving method using the power line communication.

  According to the present invention, even in the case of performing termination, it is possible to prevent the degradation of the transmission efficiency of the information without deteriorating the error correction capability.

Diagram showing the parity check matrix of LDPC-CC Diagram showing the configuration of an LDPC-CC encoder The figure which shows an example of a structure of the check matrix of the LDPC-CC of the time varying period 4 Diagram showing the configuration of parity check polynomial and parity check matrix H of an LDPC-CC with time varying period 3 The figure which shows the relationship of the reliability propagation between each item regarding X (D) of "examination formula # 1"-"examination formula # 3" of FIG. 4A. The figure which shows the relationship of the degree of reliability propagation of each item about X (D) of "examination formula # 1"-"examination formula # 6" (7, 5) Diagram of parity check matrix of convolutional code A diagram showing an example of the configuration of a parity check matrix H of an LDPC-CC with a coding rate of 2/3 and a time varying period of 2 The figure which shows an example of a structure of the parity check matrix of the coding rate 2/3 and the time varying period m LDPC-CC A diagram showing an example of the configuration of a parity check matrix of an LDPC-CC with a coding rate (n-1) / n and a time varying period m A diagram showing an example of a configuration of an LDPC-CC coding unit Diagram for explaining the method of "Information-zero-termination" Block diagram showing the main configuration of the encoder according to Embodiment 3 of the present invention Block diagram showing the main configuration of the first information calculation unit according to the third embodiment Block diagram showing the main configuration of the parity operation unit according to the third embodiment Block diagram showing another main configuration of the encoder according to Embodiment 3. Block diagram showing the main configuration of the decoder according to the third embodiment Diagram for explaining the operation of the log likelihood ratio setting unit in the case of coding rate 1/2 Diagram for explaining the operation of the log likelihood ratio setting unit in the case of the coding rate 2/3 The figure which shows an example of a structure of the communication apparatus which mounts the encoder based on Embodiment 3. Diagram showing an example of transmission format The figure which shows an example of a structure of the communication apparatus which mounts the decoder based on Embodiment 3. Diagram showing an example of the relationship between the information size and the number of terminations Diagram showing another example of the relationship between the information size and the number of terminations Diagram showing an example of the relationship between the information size and the number of terminations FIG. 16 is a block diagram showing the main configuration of a communication apparatus equipped with the encoder according to Embodiment 5 of the present invention Diagram for explaining how to determine termination sequence length Diagram for explaining how to determine termination sequence length Diagram showing an example of transmission format FIG. 16 is a block diagram showing the main configuration of a communication apparatus equipped with the decoder according to the fifth embodiment. A diagram showing an example of the flow of information between a communication apparatus equipped with an encoder and a communication apparatus equipped with a decoder A diagram showing an example of the flow of information between a communication apparatus equipped with an encoder and a communication apparatus equipped with a decoder Diagram showing an example of a correspondence table showing the relationship between the information size and the number of terminations Diagram showing BER / BLER characteristics when termination sequence is added to information sequence with information size of 512 bits Diagram showing BER / BLER characteristics when termination sequence is added to information sequence with information size of 1024 bits Diagram showing BER / BLER characteristics when termination sequence is added to information sequence with information size of 2048 bits Figure showing BER / BLER characteristics when termination sequence is added to information sequence with information size 4096 bits Diagram showing correspondence table between information size and support coding rate FIG. 16 is a block diagram showing the main configuration of a communication apparatus equipped with the encoder according to Embodiment 6 of the present invention A diagram showing an example of the flow of information between a communication apparatus equipped with an encoder and a communication apparatus equipped with a decoder FIG. 16 is a block diagram showing the main configuration of a communication apparatus equipped with the decoder according to the sixth embodiment FIG. 16 is a block diagram showing the main configuration of an encoder according to Embodiment 7 of the present invention FIG. 16 is a block diagram showing the main configuration of a decoder according to a seventh embodiment FIG. 16 is a block diagram showing the main configuration of an encoder according to Embodiment 8 of the present invention

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

Embodiment 1
First, in the present embodiment, an LDPC-CC having good characteristics will be described.

(LDPC-CC with good properties)
In the following, an LDPC-CC having a time-variant cycle g with good characteristics will be described.

  First, an LDPC-CC with a time-variant cycle 4 with good characteristics will be described. In the following, the case of the coding rate 1/2 will be described as an example.

Equations (1-1) to (1-4) will be considered as parity check polynomials of LDPC-CC with a time-variant period of four. At this time, X (D) is a polynomial expression of data (information), and P (D) is a polynomial expression of parity. Here, in Equations (1-1) to (1-4), the parity check polynomial is such that there are four terms in each of X (D) and P (D), but this is a good reception quality. It is preferable to use four terms to obtain.

In Formula (1-1), a1, a2, a3, and a4 are integers (however, a1 ≠ a2 ≠ a3 ≠ a4 and all of a1 to a4 are different). Note that, hereinafter, when “X「 Y ≠... ≠ Z ”is described, X, Y,..., Z are all different from each other. Further, b1, b2, b3 and b4 are integers (where b1 ≠ b2 ≠ b3 ≠ b4). The parity check polynomial of equation (1-1) is referred to as “check equation # 1”, and the submatrix based on the parity check polynomial of equation (1-1) is referred to as a first submatrix H ₁ .

Further, in the formula (1-2), A1, A2, A3 and A4 are integers (however, A1 ≠ A2 ≠ A3 ≠ A4). Further, B1, B2, B3 and B4 are integers (where B1 ≠ B2 ≠ B3 ≠ B4). The parity check polynomial of equation (1-2) is referred to as “check equation # 2”, and the submatrix based on the parity check polynomial of equation (1-2) is referred to as a second submatrix H ₂ .

Further, in the formula (1-3), α1, α2, α3 and α4 are integers (however, α1 ≠ α2 ≠ α3 ≠ α4). Further, β1, β2, β3 and β4 are integers (where β1 ≠ β2 ≠ β3 ≠ β4). The parity check polynomial of equation (1-3) is referred to as “check equation # 3”, and the submatrix based on the parity check polynomial of equation (1-3) is referred to as a third submatrix H ₃ .

Further, in the formula (1-4), E1, E2, E3 and E4 are integers (where E1 ≠ E2 ≠ E3 ≠ E4). Further, F1, F2, F3 and F4 are integers (where F1 ≠ F2FF3 ≠ F4). The parity check polynomial of equation (1-4) is referred to as “check equation # 4”, and the sub matrix based on the parity check polynomial of equation (1-4) is referred to as a fourth sub-matrix H ₄ .

The first sub-matrix _{H 1,} second sub-matrix _{H 2,} third sub-matrix _{H 3,} fourth sub-matrix _{H 4,} the LDPC-CC of varying period 4 when generating a check matrix as shown in FIG. 3 Think.

  At this time, in formulas (1-1) to (1-4), combinations of the orders of X (D) and P (D) (a1, a2, a3, a4), (b1, b2, b3, b4), (A1, A2, A3, A4), (B1, B2, B3, B4), (α1, α2, α3, α4), (β1, β2, β3, β4), (E1, E2, E3, E4), Assuming that the remainder obtained by dividing each value of (F1, F2, F3, F4) by 4 is k, the remainder of the four coefficient sets (for example, (a1, a2, a3, a4)) represented as described above 0, 1, 2 and 3 are included one by one, and all of the above four coefficient sets are satisfied.

  For example, assuming that each order (a1, a2, a3, a4) of X (D) of “check equation # 1” is (a1, a2, a3, a4) = (8, 7, 6, 5), each order The remainder k obtained by dividing (a1, a2, a3, a4) by 4 is (0, 3, 2, 1), and one remainder (k) 0, 1, 2, 3 is included in the four coefficient sets. Will be included. Similarly, assuming that each order (b1, b2, b3, b4) of P (D) in “checking formula # 1” is (b1, b2, b3, b4) = (4, 3, 2, 1), The remainder k obtained by dividing the order (b1, b2, b3, b4) by 4 is (0, 3, 2, 1), and 0, 1, 2, 3 is given as the remainder (k) to the four coefficient sets. It will be included one by one. The above “remainder” also applies to the four coefficient sets of X (D) and P (D) of the other inspection formulas (“inspection formula # 2”, “inspection formula # 3”, “inspection formula # 4”) It is assumed that the condition is satisfied.

  By doing this, it is possible to form a regular LDPC code in which the column weights of the parity check matrix H configured by the equations (1-1) to (1-4) are 4 in all the columns. . Here, the regular LDPC code is an LDPC code defined by a parity check matrix in which each column weight is fixed, and is characterized in that the characteristics are stable and an error floor is unlikely to occur. In particular, when the column weight is 4, since the characteristics are good, by generating LDPC-CC as described above, it is possible to obtain LDPC-CC with good reception performance.

Table 1 is an example (LDPC-CC # 1 to # 3) of an LDPC-CC with a time-variant period of 4 and a coding rate of 1/2 in which the condition regarding the above "remainder" holds. In Table 1, LDPC-CC with time varying period 4 is defined by four parity check polynomials of “check polynomial # 1”, “check polynomial # 2”, “check polynomial # 3”, and “check polynomial # 4”. Ru.

  In the above, the coding rate 1/2 has been described as an example, but even when the coding rate is (n-1) / n, the information X1 (D), X2 (D),. In each of the four coefficient sets in 1 (D), if the above condition regarding “remainder” is satisfied, it will be a regular LDPC code, and good reception quality can be obtained.

  In addition, also in the case of the time change period 2, it was confirmed that the code | symbol with a favorable characteristic can be searched if the conditions regarding the said "remainder" are applied. Hereinafter, an LDPC-CC with a time-variant cycle 2 with good characteristics will be described. In the following, the case of the coding rate 1/2 will be described as an example.

Equations (2-1) and (2-2) will be considered as parity check polynomials of LDPC-CC with a time-variant period of 2. At this time, X (D) is a polynomial expression of data (information), and P (D) is a polynomial expression of parity. Here, in Equations (2-1) and (2-2), the parity check polynomial is such that there are four terms in each of X (D) and P (D). It is preferable to use four terms to obtain.

In Formula (2-1), a1, a2, a3, and a4 are integers (however, a1 ≠ a2 ≠ a3 ≠ a4). Further, b1, b2, b3 and b4 are integers (where b1 ≠ b2 ≠ b3 ≠ b4). The parity check polynomial of equation (2-1) is referred to as “check equation # 1”, and the submatrix based on the parity check polynomial of equation (2-1) is referred to as a first submatrix H ₁ .

Further, in the formula (2-2), A1, A2, A3 and A4 are integers (where A1 ≠ A2 ≠ A3 ≠ A4). Further, B1, B2, B3 and B4 are integers (where B1 ≠ B2 ≠ B3 ≠ B4). Referred to parity check polynomial of equation (2-2) and "check equation # 2", the sub-matrix based on a parity check polynomial of equation (2-2), the second sub-matrix H _2.

Then, consider an LDPC-CC of time varying period 2 generated from the first submatrix H ₁ and the second submatrix H ₂ .

  At this time, combinations of the orders of X (D) and P (D) in formulas (2-1) and (2-2) (a1, a2, a3, a4), (b1, b2, b3, b4), Assuming that the remainder obtained by dividing each value of (A1, A2, A3, A4) and (B1, B2, B3, B4) by 4 is k, four coefficient sets expressed as described above (for example, (a1, One remainder of 0, 1, 2, and 3 is included in each of a2, a3, and a4), and all of the above four sets of coefficients are satisfied.

  For example, assuming that each order (a1, a2, a3, a4) of X (D) of “check equation # 1” is (a1, a2, a3, a4) = (8, 7, 6, 5), each order The remainder k obtained by dividing (a1, a2, a3, a4) by 4 is (0, 3, 2, 1), and one remainder (k) 0, 1, 2, 3 is included in the four coefficient sets. Will be included. Similarly, assuming that each order (b1, b2, b3, b4) of P (D) in “checking formula # 1” is (b1, b2, b3, b4) = (4, 3, 2, 1), The remainder k obtained by dividing the order (b1, b2, b3, b4) by 4 is (0, 3, 2, 1), and 0, 1, 2, 3 is given as the remainder (k) to the four coefficient sets. It will be included one by one. The condition regarding the above "remainder" is assumed to hold also for each of the four coefficient sets of X (D) and P (D) in "Inspection Formula # 2".

  By doing this, it is possible to form a regular LDPC code in which the column weights of the parity check matrix H composed of the equations (2-1) and (2-2) become 4 in all the columns. . Here, the regular LDPC code is an LDPC code defined by a parity check matrix in which each column weight is fixed, and is characterized in that the characteristics are stable and an error floor is unlikely to occur. In particular, when the row weight is 8, since the characteristics are good, by generating the LDPC-CC as described above, it is possible to obtain an LDPC-CC that can further improve the reception performance. Become.

Table 2 shows an example (LDPC-CC # 1, # 2) of a time-varying cycle 2 and a coding rate 1/2 LDPC-CC in which the condition regarding the above "remainder" holds. In Table 2, LDPC-CC with time varying period 2 is defined by two parity check polynomials of “check polynomial # 1” and “check polynomial # 2”.

  In the above description (LDPC-CC with time variation period 2) and coding rate 1/2 have been described as an example, information X1 (D), even when the coding rate is (n-1) / n, In each of the four coefficient sets in X 2 (D),..., X n -1 (D), if the above condition regarding “remainder” is satisfied, it will be a regular LDPC code again to obtain good reception quality it can.

  Moreover, also in the case of the time variation period 3, it was confirmed that the code with a favorable characteristic can be searched if the following conditions regarding "remainder" are applied. Hereinafter, an LDPC-CC with a time-variant period of 3 with good characteristics will be described. In the following, the case of the coding rate 1/2 will be described as an example.

Equations (3-1) to (3-3) will be considered as parity check polynomials of LDPC-CC with a time varying period of 3. At this time, X (D) is a polynomial expression of data (information), and P (D) is a polynomial expression of parity. Here, in equations (3-1) to (3-3), parity check polynomials are assumed such that three terms are present in each of X (D) and P (D).

In Formula (3-1), a1, a2, and a3 are integers (however, a1 ≠ a2 ≠ a3). Further, b1, b2 and b3 are integers (where b1 ≠ b2 ≠ b3). The parity check polynomial of equation (3-1) is referred to as “check equation # 1”, and the submatrix based on the parity check polynomial of equation (3-1) is referred to as a first submatrix H ₁ .

Moreover, in Formula (3-2), let A1, A2, and A3 be integers (however, A1 ≠ A2 ≠ A3). Further, B1, B2 and B3 are integers (where B1 ≠ B2 ≠ B3). Referred to parity check polynomial of equation (3-2) and "check equation # 2", the sub-matrix based on a parity check polynomial of equation (3-2), the second sub-matrix H _2.

Further, in the formula (3-3), α1, α2 and α3 are integers (where α1 整数 α2 ≠ α3). Further, β1, β2 and β3 are integers (here, β1 ≠ β2 ≠ β3). The parity check polynomial of equation (3-3) is referred to as “check equation # 3”, and the submatrix based on the parity check polynomial of equation (3-3) is referred to as a third submatrix H ₃ .

Then, consider an LDPC-CC of time varying period 3 generated from the first submatrix H ₁ , the second submatrix H ₂ , and the third submatrix H ₃ .

  At this time, in the formulas (3-1) to (3-3), combinations of the orders of X (D) and P (D) (a1, a2, a3), (b1, b2, b3), (A1, A2) , A3), (B1, B2, B3), (α1, α2, α3), (β1, β2, β3) divided by 3 and the remainder is k, the three shown above A set of coefficients (for example, (a1, a2, a3)) includes one remainder of 0, 1 and 2 respectively, and all of the above three sets of coefficients are satisfied.

  For example, assuming that each order (a1, a2, a3) of X (D) of “check equation # 1” is (a1, a2, a3) = (6, 5, 4), each order (a1, a2, a3) The remainder k obtained by dividing) by 3 is (0, 2, 1), and the remainder (k) 0, 1, 2 is included in each of the three coefficient sets. Similarly, assuming that each order (b1, b2, b3) of P (D) of “check equation # 1” is (b1, b2, b3) = (3, 2, 1), each order (b1, b2, The remainder k obtained by dividing b3) by 4 is (0, 2, 1), and one of 0, 1 and 2 is included as a remainder (k) in the three coefficient sets. It is assumed that the condition regarding the above "remainder" is satisfied also for three coefficient sets of X (D) and P (D) of "Inspection Formula # 2" and "Inspection Formula # 3".

  By generating LDPC-CC in this manner, it is possible to generate a regular LDPC-CC code in which row weights are equal in all rows and column weights are equal in all rows, with some exceptions. it can. The exception means that the row weight and the column weight are not equal to the other row weights and column weights in the first part and the last part of the parity check matrix. Furthermore, when BP decoding is performed, the reliability in "check equation # 2" and the reliability in "check equation # 3" are properly propagated to "check equation # 1", and "check equation # 1". Confidence in “Procedure # 3” is properly propagated to “Examination Formula # 2”, and reliability in “Examination Formula # 1” and reliability in “Examination Formula # 2” are Properly propagate to "Examination formula # 3". Therefore, it is possible to obtain an LDPC-CC with better reception quality. This is because, when considered in units of columns, the position at which “1” exists is arranged to properly propagate the reliability as described above.

  Hereinafter, the above-described reliability propagation will be described with reference to the drawings. FIG. 4A shows the configuration of the parity check polynomial and parity check matrix H of an LDPC-CC with a time varying period of 3.

  In “parity check polynomial of equation (3-1),“ check equation # 1 ”is (a1, a2, a3) = (2, 1, 0), (b1, b2, b3) = (2, 1, 0) In the case of), the remainder of dividing each coefficient by 3 is (a1% 3, a2% 3, a3% 3) = (2, 1, 0), (b1% 3, b2% 3, b3% 3) ) = (2, 1, 0). “Z% 3” represents the remainder obtained by dividing Z by 3 (the same applies hereinafter).

  In “parity check polynomial of equation (3-2)”, “check equation # 2” is (A1, A2, A3) = (5, 1, 0), (B1, B2, B3) = (5, 1, 0) In the case of), the remainder of dividing each coefficient by 3 is (A1% 3, A2% 3, A3% 3) = (2, 1, 0), (B1% 3, B2% 3, B3% 3) ) = (2, 1, 0).

  In “parity check polynomial of equation (3-3),“ check equation # 3 ”is (α1, α2, α3) = (4, 2, 0), (β1, β2, β3) = (4, 2, 0) And the remainder of dividing each coefficient by 3 is (.alpha.1% 3, .alpha.2% 3, .alpha.3% 3) = (1,2,0), (.beta.1% 3, .beta.2% 3, .beta.3% 3). ) = (1, 2, 0).

Therefore, the example of the LDPC-CC with the time varying period 3 shown in FIG. 4A is the condition regarding the “remainder” described above, that is,
(A1% 3, a2% 3, a3% 3),
(B1% 3, b2% 3, b3% 3),
(A1% 3, A2% 3, A3% 3),
(B1% 3, B2% 3, B3% 3),
(Α1% 3, α2% 3, α3% 3),
(Β1% 3, β2% 3, β3% 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) It meets the condition of becoming

  Referring back to FIG. 4A again, confidence propagation will be described. According to the column operation of column 6506 in BP decoding, “1” in the region 6501 of “check equation # 1” is “1” in the region 6504 of “check matrix # 2” and “6” in the region 6505 of “check matrix # 3”. From 1 ", the degree of confidence is propagated. As described above, “1” in the region 6501 of “checking formula # 1” is a coefficient such that the remainder divided by 3 is 0 (a3% 3 = 0 (a3 = 0) or b3% 3 = 0 (b3 = 0)). In addition, “1” of the region 6504 of “check matrix # 2” is a coefficient such that the remainder after division by 3 is 1 (A2% 3 = 1 (A2 = 1) or B2% 3 = 1 (B2) = 1)). In addition, “1” of the region 6505 of “check formula # 3” is a coefficient such that the remainder divided by 3 is 2 (α 2% 3 = 2 (α 2 = 2) or β 2% 3 = 2 (β 2 = 2)).

  In this way, “1” in the region 6501 where the remainder is 0 in the coefficient of “check equation # 1” has a remainder of 1 in the coefficient of “check equation # 2” in the column operation of column 6506 in BP decoding. The reliability is propagated from “1” of the area 6504 and “1” of the area 6505 in which the remainder is 2 in the coefficient of “check formula # 3”.

  Similarly, “1” in the region 6502 where the remainder is 1 in the coefficient of “check equation # 1” is a region where the remainder is 2 in the coefficient of “check equation # 2” in the column operation of column 6509 in BP decoding. The reliability is propagated from “1” of 6507 and “1” of the area 6508 where the remainder is 0 in the coefficient of “check formula # 3”.

  Similarly, “1” in a region 6503 where the remainder is 2 in the coefficient of “check equation # 1” is a region in which the remainder is 0 in the coefficient of “check equation # 2” in column calculation of column 6512 in BP decoding. The reliability is propagated from “1” of 6510 and “1” of the area 6511 where the remainder is 1 in the coefficient of “check formula # 3”.

  Supplementary explanation of the reliability propagation will be given using FIG. 4B. FIG. 4B shows the relationship between the degree of confidence propagation among the terms related to X (D) of “Inspection Formula # 1” to “Inspection Formula # 3” in FIG. 4A. “Examination formula # 1” to “examination formula # 3” in FIG. 4A are (a1, a2, a3) = (2,,) in the section related to X (D) of formulas (3-1) to (3-3). This is the case of 1, 0), (A1, A2, A3) = (5, 1, 0), (α1, α2, α3) = (4, 2, 0).

  In FIG. 4B, the squared terms (a 3, A 3, α 3) indicate coefficients whose remainder divided by 3 is zero. Further, the encircled terms (a2, A2, α1) indicate coefficients whose remainder after division by 3 is 1. Further, the terms (a1, A1, α2) surrounded by rhombuses indicate coefficients whose remainder after division by 3 is 2.

  As can be seen from FIG. 4B, the reliability of a1 of “check equation # 1” is propagated from A3 of “check equation # 2” different in remainder after division by 3 and α1 of “check equation # 3”. The reliability of a2 of “Examination Formula # 1” is propagated from A1 of “Examination Expression # 2” and the α3 of “Examination Formula # 3” that are different by dividing by 3. The reliability of a3 of "Examination formula # 1" is propagated from A2 of "Examination expression # 2" and a2 of "Examination formula # 3" that are different by dividing by 3, and the remainder is different. FIG. 4B shows the relationship between the reliability propagation of each term related to X (D) of “Examination formula # 1” to “Examination formula # 3”, but the same applies to each term related to P (D) It can be said.

  As described above, the reliability is propagated to “inspection formula # 1” from the coefficients of which the remainder divided by 3 is 0, 1 or 2 among the coefficients of “inspection formula # 2”. That is, in the “check equation # 1”, the reliability is propagated from the coefficients of which the remainder divided by 3 among the coefficients of the “check equation # 2” are all different. Therefore, all the confidences with low correlation will be propagated to “check equation # 1”.

  Similarly, the reliability of “Inspection Formula # 2” is propagated from the coefficients whose remainder divided by 3 is 0, 1 or 2 among the coefficients of “Inspection Formula # 1”. That is, in the “check equation # 2”, the reliability is propagated from the coefficients of which the remainder divided by 3 among the coefficients of the “check equation # 1” are all different. Further, in “Inspection Formula # 2”, the reliability is propagated from the coefficients whose remainder divided by 3 is 0, 1 or 2 among the coefficients of “Inspection Formula # 3”. That is, in the “check equation # 2”, the reliability is propagated from the coefficients of which the remainder divided by 3 among the coefficients of the “check equation # 3” are all different.

  Similarly, the reliability of "Inspection Formula # 3" is propagated from the coefficients whose remainder divided by 3 among the coefficients of "Inspection Formula # 1" is 0, 1 and 2. That is, in the “check equation # 3”, the reliability is propagated from coefficients among all the coefficients divided by 3 among the coefficients of “check equation # 1” that are different. Further, in “Inspection Formula # 3”, the reliability is propagated from the coefficients whose remainder divided by 3 is 0, 1 or 2 among the coefficients of “Inspection Formula # 2”. That is, in the “check equation # 3”, the reliability is propagated from the coefficients of which the remainder divided by 3 among the coefficients of the “check equation # 2” are all different.

  As described above, by setting each degree of the parity check polynomials of Equations (3-1) to (3-3) to satisfy the condition regarding “remainder” described above, the reliability is always required in all column operations. As it becomes propagated, it becomes possible to propagate the reliability efficiently in all the check formulas, and it is possible to further enhance the error correction capability.

  As described above, although the case of coding rate 1/2 has been described as an example for LDPC-CC with time-variant cycle 3, the coding rate is not limited to 1/2. In the case of a coding rate (n-1) / n (n is an integer of 2 or more), three coefficients in information X1 (D), X2 (D), ... Xn-1 (D) In the set, if the above condition regarding “remainder” is satisfied, it becomes a regular LDPC code again, and good reception quality can be obtained.

  Hereinafter, the case of the coding rate (n-1) / n (n is an integer of 2 or more) will be described.

Equations (4-1) to (4-3) will be considered as parity check polynomials of LDPC-CC with a time varying period of 3. In this _{case, X 1 (D), X} 2 (D), ··· X n-1 (D) is data _{(information)} X _1, X 2, a polynomial representation of ··· _{X n-1,} P (D) is a polynomial expression of parity. Here, in the formulas (4-1) to (4-3), three terms are included in each of X ₁ (D), X ₂ (D), ... X _{n -1} (D), P (D) Let it be a parity check polynomial that exists.

In formula (4-1), a _{i, 1} , a _{i, 2} , a _{i, 3} (i = 1, 2,..., N-1) are integers (where a _{i, 1} ia _i, Let ₂ ≠ a _{i, 3} ). Further, b1, b2 and b3 are integers (where b1 ≠ b2 ≠ b3). The parity check polynomial of equation (4-1) is referred to as “check equation # 1”, and the submatrix based on the parity check polynomial of equation (4-1) is referred to as a first submatrix H ₁ .

Further, in the formula (4-2), A _{i, 1} , A _{i, 2} , A _{i, 3} (i = 1, 2, ..., n-1 is an integer (where A _{i, 1} ≠ A _{i , 2} ≠ A _{i, 3} ) and B1, B2 and B3 are integers (where B1 ≠ B2 ≠ B3) The parity check polynomial of equation (4-2) is "check equation # 2" call, the sub-matrix based on a parity check polynomial of equation (4-2), the second sub-matrix _{H 2.}

Further, in the formula (4-3), α _{i, 1} , α _{i, 2} , α _{i, 3} (i = 1, 2,..., N−1 are integers, where α _{i, 1} ≠ α _{i , 2} ≠ α _{i, 3} ), β 1, β 2 and β 3 are integers (where β 1 ≠ β 2 ≠ β 3) The parity check polynomial of equation (4-3) is "check equation # 3" A submatrix based on the parity check polynomial of equation (4-3) is called a third submatrix H ₃ .

Then, consider an LDPC-CC of time varying period 3 generated from the first submatrix H ₁ , the second submatrix H ₂ , and the third submatrix H ₃ .

At this time, in the formulas (4-1) to (4-3), a combination of the orders of X ₁ (D), X ₂ (D), ... X _{n -1} (D) and P (D) ₁ , ₁ , a ₁ , ₂ , a ₁ , ₃ ),
(A _2,1 , a _2,2 , a _2,3 ), ...,
( _An-1 , ₁ a _n-1 , ₂ a _n-1 , ₃ ),
(B1, b2, b3),
(A _1,1 , A _1,2 , A _1,3 ),
(A _2,1 , A _2,2 , A _2,3 ), ...,
(A _{n -1,1} , A _{n -1,2} , A _{n -1,3} ),
(B1, B2, B3),
(Α _1,1 , α _1,2 , α _1,3 ),
(Α _2,1 , α _2,2 , α _2,3 ), ...,
(Α _{n -1} , ₁ , α _{n -1} , ₂ , α _{n -1} , ₃ ),
(Β1, β2, β3)
Where k is the remainder of dividing each value by 3 into three coefficient sets (for example, (a _1,1 , a _1,2 , a _1,3 )) represented as described above. One and two are included one by one, and the above three coefficient sets are satisfied.

In other words,
(A _1,1 % 3, a _1,2 % 3, a _1,3 % 3),
(A _{2, 1} % 3, a ₂ , ₂ % 3, a ₂ , ₃ % 3), ...,
( _{An -1, 1} % 3, an _-1 , ₂ % 3, an _-1 , ₃ % 3),
(B1% 3, b2% 3, b3% 3),
(A _1,1 % 3, A _1,2 % 3, A _1,3 % 3),
(A _{2, 1} % 3, A ₂ , ₂ % 3, A ₂ , ₃ % 3), ...,
(A _{n -1, 1} % 3, A _{n -1} , ₂ % 3, A _{n -1} , ₃ % 3),
(B1% 3, B2% 3, B3% 3),
(Α _1,1 % 3, α _1,2 % 3, α _1,3 % 3),
(Α2, ₁ % 3, α2, ₂ % 3, α2, ₃ % 3), ...,
(Α _{n -1, 1} % 3, α _{n -1} , ₂ % 3, α _{n -1} , ₃ % 3),
(Β1% 3, β2% 3, β3% 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) To be

  By generating LDPC-CC in this manner, a regular LDPC-CC code can be generated. Furthermore, when BP decoding is performed, the reliability in "check equation # 2" and the reliability in "check equation # 3" are properly propagated to "check equation # 1", and "check equation # 1". Confidence in “Procedure # 3” is properly propagated to “Examination Formula # 2”, and reliability in “Examination Formula # 1” and reliability in “Examination Formula # 2” are Properly propagate to "Examination formula # 3". Therefore, as in the case of the coding rate 1/2, it is possible to obtain an LDPC-CC with better reception quality.

Note that Table 3 shows an example of an LDPC-CC with a time-variant period of 3 and a coding rate of 1/2 where the condition regarding the above “remainder” holds (LDPC-CC # 1, # 2, # 3, # 4, # 4, # 5 ). In Table 3, LDPC-CC with a time-varying cycle 3 is determined by three parity check polynomials of “test (polynomial) equation # 1”, “test (polynomial) equation # 2”, and “test (polynomial) equation # 3”. It is defined.

  In addition, as with time-varying cycle 3, the following conditions for "remainder" apply to LDPC-CC with time-varying cycle multiples of 3 (for example, time-varying cycles 6, 9, 12, ...) Then, it was confirmed that a code with good characteristics can be searched. In the following, LDPC-CC at multiples of the time-variant period 3 with good characteristics will be described. In the following, the case of LDPC-CC with a coding rate of 1/2 and a time-variant cycle of 6 will be described as an example.

Formulas (5-1) to (5-6) will be considered as parity check polynomials of an LDPC-CC having a time varying period of six.

At this time, X (D) is a polynomial expression of data (information), and P (D) is a polynomial expression of parity. In the LDPC-CC with time varying period 6, assuming that i% 6 = k, parity Pi and information Xi at time i (k = 0, 1, 2, 3, 4, 5) The parity check polynomial of) is established. For example, if i = 1, then i% 6 = 1 (k = 1), and equation (6) holds.

  Here, in equations (5-1) to (5-6), parity check polynomials are assumed such that three terms are present in each of X (D) and P (D).

In Formula (5-1), a1,1 and a1,2, a1,3 are integers (however, a1,1 ≠ a1,2 ≠ a1,3). Further, b1,1, b1,2, b1,3 are integers (where b1,1 ≠ b1,2 ≠ b1,3). The parity check polynomial of equation (5-1) is referred to as “check equation # 1”, and the sub-matrix based on the parity check polynomial of equation (5-1) is referred to as a first sub-matrix H ₁ .

Further, in the formula (5-2), a2,1, a2,2 and a2,3 are integers (however, a2,1 ≠ a2,2 ≠ a2,3). Further, b2,1, b2,2, b2,3 are integers (where b2,1 ≠ b2,2 ≠ b2,3). Referred to parity check polynomial of equation (5-2) and "check equation # 2", the sub-matrix based on a parity check polynomial of equation (5-2), the second sub-matrix H _2.

Further, in the formula (5-3), a3, 1, a3, 2, a3, 3 are integers (however, a3, 1 ≠ a3, 2 ≠ a3, 3). Further, b3,1, b3,2, b3,3 are integers (where b3,1 ≠ b3,2 ≠ b3,3). The parity check polynomial of equation (5-3) is referred to as “check equation # 3”, and the submatrix based on the parity check polynomial of equation (5-3) is referred to as a third submatrix H ₃ .

Further, in the formula (5-4), a4,1, a4,2, a4,3 are integers (however, a4,1 ≠ a4,2 ≠ a4,3). Further, b4,1, b4,2, b4,3 are integers (where b4,1 ≠ b4,2 ≠ b4,3). The parity check polynomial of equation (5-4) is called “check equation # 4”, and the sub-matrix based on the parity check polynomial of equation (5-4) is called fourth sub-matrix H ₄ .

Moreover, in Formula (5-5), a5,1, a5,2, a5,3 are integers (however, a5,1 ≠ a5,2 ≠ a5,3). Further, b5, 1, b5, 2, b5, 3 are integers (where b5, 1 ≠ b5, 2 ≠ b5, 3). Referred to parity check polynomial of equation (5-5) and "check equation # 5", a sub-matrix based on a parity check polynomial of equation (5-5), the fifth sub-matrix H _5.

Further, in the formula (5-6), a6, 1, a6, 2, a6, 3 are integers (however, a6, 1 ≠ a6, 2 ≠ a6, 3). Further, b6, 1, b6, 2, b6, 3 are integers (where b6, 1 ≠ b6, 2 ≠ b6, 3). The parity check polynomial of equation (5-6) is referred to as “check equation # 6”, and the submatrix based on the parity check polynomial of equation (5-6) is referred to as a sixth submatrix H ₆ .

The first sub-matrix _{H 1,} second sub-matrix _{H 2,} third sub-matrix _{H 3,} fourth sub-matrix _{H 4,} fifth sub-matrix _{H 5,} varying period 6 when generating the sixth sub-matrix _{H 6} Consider the LDPC-CC of

At this time, in the formulas (5-1) to (5-6), a combination of the orders of X (D) and P (D) (a1,1, a1,2, a1,3),
(B1,1, b1,2, b1,3),
(A2, 1, a2, 2, a2, 3),
(B2, 1, b2, 2, b2, 3),
(A3, 1, a3, 2, a3, 3),
(B3, 1, b3, 2, b3, 3),
(A4, 1, a4, 2, a4, 3),
(B4, 1, b4, 2, b4, 3),
(A5, 1, a5, 2, a5, 3),
(B5, 1, b5, 2, b5, 3),
(A6, 1, a6, 2, a6, 3),
(B6, 1, b6, 2, b6, 3)
Where the remainder k is the remainder when dividing each value by three, the remainders of 0, 1, and so on in the three coefficient sets (eg, (a1, 1, a1, 2, a1, 3)) represented as described above Two are included one by one, and all the above three sets of coefficients are satisfied. In other words,
(A1,1% 3, a1,2% 3, a1,3% 3),
(B1,1% 3, b1,2% 3, b1,3% 3),
(A2, 1% 3, a2, 2% 3, a2, 3% 3),
(B2, 1% 3, b2, 2% 3, b2, 3% 3),
(A3, 1% 3, a3, 2% 3, a3, 3% 3),
(B3, 1% 3, b3, 2% 3, b3, 3% 3),
(A4, 1% 3, a4, 2% 3, a4, 3% 3),
(B4, 1% 3, b4, 2% 3, b4, 3% 3),
(A5, 1% 3, a5, 2% 3, a5, 3% 3),
(B5, 1% 3, b5, 2% 3, b5, 3% 3),
(A6, 1% 3, a6, 2% 3, a6, 3% 3),
(B6, 1% 3, b6, 2% 3, b6, 3% 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become.

  In this way, when an Tanner graph is drawn for “Inspection Formula # 1” by generating LDPC-CC, if there is an edge, exactly “Inspection Formula # 2 or Inspection Formula # 5”. The “degree of reliability” in “The examination formula # 3 or the examination formula # 6” properly propagates.

  In addition, when the Tanner graph is drawn for “Inspection Formula # 2”, if there is an edge, the reliability in “Inspection Formula # 1 or Inspection Formula # 4”, “Inspection Formula # 3, Or, the degree of reliability in the inspection formula # 6 is properly transmitted.

  In addition, when the Tanner graph is drawn for “Inspection Formula # 3”, if there is an edge, the reliability in “Inspection Formula # 1 or Inspection Formula # 4”, “Inspection Formula # 2, Or, the degree of reliability in the inspection formula # 5 is properly transmitted. When the Tanner graph is drawn for “Inspection Formula # 4”, if an edge is present, the reliability in “Inspection Formula # 2 or Inspection Formula # 5”, “Inspection Formula # 3 or The reliability in the inspection formula # 6 is properly transmitted.

  In addition, when the Tanner graph is drawn, if there is an edge, the reliability in “Inspection Formula # 1 or Inspection Formula # 4” is accurately compared with “Inspection Formula # 5”, “Inspection Formula # 3, Or, the degree of reliability in the inspection formula # 6 is properly transmitted. In addition, when the Tanner graph is drawn for “Inspection Formula # 6”, if there is an edge, the reliability in “Inspection Formula # 1 or Inspection Formula # 4”, “Inspection Formula # 2, Or, the degree of reliability in the inspection formula # 5 is properly transmitted.

  For this reason, as in the case where the time variation period is 3, the LDPC-CC with the time variation period 6 holds better error correction capability.

  Regarding this, reliability propagation will be described using FIG. 4C. FIG. 4C shows the relationship between the degree of confidence propagation among the terms related to X (D) of “Inspection Formula # 1” to “Inspection Formula # 6”. In FIG. 4C, a square indicates a coefficient with a remainder of 0 divided by 3 in ax, y (x = 1, 2, 3, 4, 5, 6; y = 1, 2, 3).

  In addition, circles indicate coefficients of ax, y (x = 1, 2, 3, 4, 5, 6; y = 1, 2, 3) and a remainder of 1 divided by 3. In addition, the rhombus indicates a coefficient with a remainder of 2 divided by 3 (x = 1, 2, 3, 4, 5, 6; y = 1, 2, 3) in ax, y.

  As can be seen from FIG. 4C, when the Tanner graph is drawn, if there is an edge, “a1,1 of“ Examination formula # 1 ”is different in remainder by division by“ Examination formula # 2 or # 5 ”and“ A ” Confidence is propagated from inspection equation # 3 or # 6. Similarly, when the Tanner graph is drawn, if there is an edge, a1 and 2 of the “check equation # 1” are different by “3” divided by 3 and “check equation # 2 or # 5” and “check equation # 3” Or the degree of confidence is propagated from # 6 ".

  Similarly, when the Tanner graph is drawn, if there is an edge, a1, 3 of the "check equation # 1" is different from the remainder divided by 3, "check equation # 2 or # 5" and "check equation # 3 Or the degree of confidence is propagated from # 6 ". Although FIG. 4C shows the relationship between the reliability propagation of each term related to X (D) of “Inspection Formula # 1” to “Inspection Formula # 6,” the same applies to each term related to P (D). It can be said.

  As described above, the reliability is propagated to each node in the Tanner graph of “check equation # 1” from the coefficient nodes other than “check equation # 1”. Therefore, all the confidences with low correlation are propagated to “check equation # 1”, and it is considered that the error correction capability is improved.

  In FIG. 4C, attention is paid to “inspection formula # 1”, but a Tanner graph can be similarly drawn for “inspection formula # 2” to “inspection formula # 6”, and “Tanagraph of inspection formula #K” is drawn. The reliability is propagated to each node from coefficient nodes other than “check equation #K”. Therefore, all the confidences with low correlation are propagated to “check formula #K”, and it is considered that the error correction capability is improved. (K = 2, 3, 4, 5, 6)

  As described above, by setting each degree of the parity check polynomials of the equations (5-1) to (5-6) to satisfy the condition regarding the “remainder” described above, the reliability can be efficiently obtained in all the check equations. Can be propagated, and the possibility of further enhancing the error correction capability is increased.

Although the case of coding rate 1/2 has been described as an example for LDPC-CC with time-variant cycle 6 above, the coding rate is not limited to 1/2. In the case of the coding rate (n-1) / n (n is an integer of 2 or more), the respective information X ₁ (D), X ₂ (D), ... X _n-1 (D) If the above “remainder” condition is satisfied in the three coefficient sets, it is again likely that good reception quality can be obtained.

  Hereinafter, the case of the coding rate (n-1) / n (n is an integer of 2 or more) will be described.

Equations (7-1) to (7-6) are considered as parity check polynomials of LDPC-CC with a time varying period of six.

At this time, X ₁ (D), X ₂ (D),..., X _n-1 (D) is a polynomial expression of data (information) X1, X2,. Is a polynomial representation of parity. Here, in the formulas (7-1) to (7-6), three terms are included in each of X ₁ (D), X ₂ (D), ... X _{n -1} (D), P (D) Let it be a parity check polynomial that exists. In the case of the above coding rate 1/2, and in the same way as in the case of the time varying cycle 3, time varying cycle 6 represented by the parity check polynomial of equations (7-1) to (7-6) If the following condition (<condition # 1>) is satisfied in the LDPC-CC with the conversion rate (n-1) / n (n is an integer of 2 or more), it is possible that higher error correction capability can be obtained Increase.

However, in an LDPC-CC with a time-variant period of 6, coding rate (n-1) / n (n is an integer of 2 or more), the parity of time i is Pi and the information is Xi _{, 1} , Xi _{, 2} , ··· Expressed by X _{i, n−1} . At this time, assuming that i% 6 = k (k = 0, 1, 2, 3, 4, 5), the parity check polynomial of the equation (7- (k + 1)) is established. For example, if i = 8, then i% 6 = 2 (k = 2), and equation (8) holds.

<Condition # 1>
In the formulas (7-1) to (7-6), the combination of the orders of X ₁ (D), X ₂ (D), ... X _{n -1} (D) and P (D) satisfies the following conditions Fulfill.
_{(A # 1,1,1% 3, a} # 1,1,2% 3, a # 1,1,3% 3),
_{(A # 1,2,1% 3, a} # 1,2,2% 3, a # 1,2,3% 3), ···,
(A _{# 1, k, 1} % 3, a _{# 1, k, 2} % 3, a _{# 1, k, 3} % 3), ...,
(A _{# 1, n-1 and 1} % 3, a _{# 1, n-1 and 2} % 3, a _{# 1 and n-1 and 3} % 3),
(B _{# 1,1} % 3, b _{# 1,2} % 3, b _{# 1,3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (K = 1, 2, 3, ..., n-1)
And,
_{(A # 2,1,1% 3, a} # 2,1,2% 3, a # 2,1,3% 3),
_{(A # 2,2,1% 3, a} # 2,2,2% 3, a # 2,2,3% 3), ···,
(A _{# 2, k, 1} % 3, a _{# 2, k, 2} % 3, a _{# 2, k, 3} % 3), ...,
(A _{# 2, n -1, 1} % 3, a _{# 2, n -1, 2} % 3, a _{# 2, n -1 , 3} % 3),
(B _{# 2, 1} % 3, b _{# 2, 2} % 3, b _{# 2, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (K = 1, 2, 3, ..., n-1)
And,
(A _# 3, _{1, 1} % 3, a _# 3, _{1, 2} % 3, a _# 3, _1, 3% 3),
(A _# 3, ₂ , ₁ % 3, a _# 3, _{2, 2} % 3, a _{# 3} , ₂ , ₃ % 3), ...,
(A _{# 3, k, 1} % 3, a _{# 3, k, 2} % 3, a _{# 3, k, 3} % 3), ...,
(A _{# 3, n -1, 1} % 3, a _{# 3, n -1 , 2} % 3, a _{# 3, n -1 , 3} % 3),
(B _{# 3, 1} % 3, b _{# 3, 2} % 3, b _{# 3, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (K = 1, 2, 3, ..., n-1)
And,
(A _{# 4,1,1} % 3, a _{# 4,1,2} % 3, a _{# 4,1,3} % 3),
_{(A # 4,2,1% 3, a} # 4,2,2% 3, a # 4,2,3% 3), ···,
(A _{# 4, k, 1} % 3, a _{# 4, k, 2} % 3, a _{# 4, k, 3} % 3), ...,
(A _{# 4, n -1, 1} % 3, a _{# 4, n -1 , 2} % 3, a _{# 4, n -1 , 3} % 3),
(B _{# 4, 1} % 3, b _{# 4, 2} % 3, b _{# 4, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (K = 1, 2, 3, ..., n-1)
And,
(A _{# 5,1,1} % 3, a _{# 5,1,2} % 3, a _{# 5,1,3} % 3),
(A _{# 5,2,1} % 3, a _{# 5,2,2} % 3, a _{# 5,2,3} % 3), ...,
(A _{# 5, k, 1} % 3, a _{# 5, k, 2} % 3, a _{# 5, k, 3} % 3), ...,
(A _{# 5, n-1 and 1} % 3, a _{# 5, n-1 and 2} % 3, a _{# 5 and n-1 and 3} % 3),
(B _{# 5,1} % 3, b _{# 5,2} % 3, b _{# 5,3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (K = 1, 2, 3, ..., n-1)
And,
(A _{# 6,1,1} % 3, a _{# 6,1,2} % 3, a _{# 6,1,3} % 3),
(A _{# 6,} 2, 1% 3, a _{# 6, 2, 2} % 3, a _{# 6, 2,} 3% 3), ...,
(A _{# 6, k, 1} % 3, a _{# 6, k, 2} % 3, a _{# 6, k, 3} % 3), ...,
(A _{# 6, n -1, 1} % 3, a _{# 6, n -1 , 2} % 3, a _{# 6, n -1 , 3} % 3),
(B _{# 6,1} % 3, b _{# 6,2} % 3, b _{# 6,3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (K = 1, 2, 3, ..., n-1)

  In the above, a code with high error correction capability has been described for LDPC-CC with time-varying cycle 6, but as with the design method for LDPC-CC with time-varying cycles 3 and 6, time-varying cycle 3g (g = 1 , 2, 3, 4,...) (That is, LDPC-CC with a time-variant period of multiples of 3), it is possible to generate a code with high error correction capability. Below, the configuration method of the code is explained in detail.

As a parity check polynomial of an LDPC-CC with a time variation period of 3 g (g = 1, 2, 3, 4,...) And a coding rate (n-1) / n (n is an integer of 2 or more) Consider (9-1) to (9-3 g).

In this _{case, X 1 (D), X} 2 (D), ··· X n-1 (D) is data _{(information)} X _1, X 2, a polynomial representation of ··· _{X n-1,} P (D) is a polynomial expression of parity. Here, in the formulas (9-1) to (9-3g), three terms are respectively included in X ₁ (D), X ₂ (D),... X _{n -1} (D), P (D) Let it be a parity check polynomial that exists.

  Similar to LDPC-CC with time-variant period 3 and LDPC-CC with time-variant period 6, time-variant period 3g and coding rate represented by parity check polynomials of equations (9-1) to (9-3g) In the (n-1) / n (n is an integer of 2 or more) LDPC-CC, when the following condition (<condition # 2>) is satisfied, the possibility that higher error correction capability can be obtained is increased.

However, in an LDPC-CC with a time varying period of 3g and a coding rate (n-1) / n (n is an integer of 2 or more), the parity of time i is Pi and the information is X _{i, 1} , X _{i, 2} , ··· Expressed by X _{i, n−1} . At this time, assuming that i% 3g = k (k = 0, 1, 2,..., 3g-1), a parity check polynomial of equation (9- (k + 1)) is established. For example, if i = 2, then i% 3g = 2 (k = 2), and equation (10) holds.

Further, in formulas (9-1) to (9-3g), a _{# k, p, 1} , a _{# k, p, 2} and a _{# k, p, 3} are integers (where a _{# k, p , 1} ≠ a _{#k, p, 2} ≠ a _{#k, p, 3} ) (k = 1, 2, 3, ..., 3g: p = 1, 2, 3, ..., n- 1). Also, let b _{#k, 1} , b _{# k, 2} , b _{# k, 3} be integers (where b _{# k, 1} ≠ b _{# k, 2} ≠ b _{# k, 3} ). The parity check polynomial (k = 1, 2, 3,..., 3g) in equation (9-k) is called “check equation #k”, and a submatrix based on the parity check polynomial in equation (9-k) is , And the k-th submatrix H _k . Then, consider an LDPC-CC with a time varying period of 3 g generated from the first sub matrix H ₁ , the second sub matrix H ₂ , the third sub matrix H ₃ ,..., The third g sub matrix H _{3 g} .

<Condition # 2>
In formulas (9-1) to (9-3g), the combination of the orders of X ₁ (D), X ₂ (D),... X _{n -1} (D) and P (D) satisfies the following conditions: Fulfill.
_{(A # 1,1,1% 3, a} # 1,1,2% 3, a # 1,1,3% 3),
_{(A # 1,2,1% 3, a} # 1,2,2% 3, a # 1,2,3% 3), ···,
(A _{# 1, p, 1} % 3, a _{# 1, p, 2} % 3, a _{# 1, p, 3} % 3), ...,
(A _{# 1, n-1 and 1} % 3, a _{# 1, n-1 and 2} % 3, a _{# 1 and n-1 and 3} % 3),
(B _{# 1,1} % 3, b _{# 1,2} % 3, b _{# 1,3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1)
And,
_{(A # 2,1,1% 3, a} # 2,1,2% 3, a # 2,1,3% 3),
_{(A # 2,2,1% 3, a} # 2,2,2% 3, a # 2,2,3% 3), ···,
(A _{# 2, p, 1} % 3, a _{# 2, p, 2} % 3, a _{# 2, p, 3} % 3), ...,
(A _{# 2, n -1, 1} % 3, a _{# 2, n -1, 2} % 3, a _{# 2, n -1 , 3} % 3),
(B _{# 2, 1} % 3, b _{# 2, 2} % 3, b _{# 2, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1)
And,
(A _# 3, _{1, 1} % 3, a _# 3, _{1, 2} % 3, a _# 3, _1, 3% 3),
(A _# 3, ₂ , ₁ % 3, a _# 3, _{2, 2} % 3, a _{# 3} , ₂ , ₃ % 3), ...,
(A _{# 3, p, 1} % 3, a _{# 3, p, 2} % 3, a _{# 3, p, 3} % 3), ...,
(A _{# 3, n -1, 1} % 3, a _{# 3, n -1 , 2} % 3, a _{# 3, n -1 , 3} % 3),
(B _{# 3, 1} % 3, b _{# 3, 2} % 3, b _{# 3, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1)
And,
・
・
・
And,
(A _{# k, 1,1} % 3, a _{# k, 1,2} % 3, a _{# k, 1,3} % 3),
(A _{# k, 2, 1} % 3, a _{# k, 2, 2} % 3, a _{# k, 2, 3} % 3), ...,
(A _{# k, p, 1} % 3, a _{# k, p, 2} % 3, a _{# k, p, 3} % 3), ...,
(A _{# k, n -1, 1} % 3, a _{# k, n -1, 2} % 3, a _{# k, n -1, 3} % 3),
(B _{#k, 1} % 3, b _{# k, 2} % 3, b _{# k, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1) (Thus, k = 1, 2, 3, ..., 3 g)
And,
・
・
・
And,
(A _{# 3g-2,1} and ₁ % 3, a _{# 3g-2,1} and ₂ % 3, a _{# 3g-2,1 and 3} % 3),
(A _{# 3 g-} 2, 2 1% 3, a _{# 3 g} 2, 2, 2% 3, a _{# 3 g-} 2, _{2 3} % 3), ...,
(A _{# 3 g-2, p, 1} % 3, a _{# 3 g-2, p, 2} % 3, a _{# 3 g-2, p, 3} % 3), ...,
(A _{# 3 g-2, n -1, 1} % 3, a _{# 3 g-2, n -1, 2} % 3, a _{# 3 g-2, n -1 , 3} % 3),
(B _{# 3g-2, 1} % 3, b _{# 3g-2, 2} % 3, b _{# 3g-2, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1)
And,
(A _{# 3g-1,1,1} % 3, a _{# 3g-1,1,2} % 3, a _{# 3g-1,1,3} % 3),
_{(A # 3g-1,2,1% 3} , a # 3g-1,2,2% 3, a # 3g-1,2,3% 3), ···,
(A _{# 3 g-1, p, 1} % 3, a _{# 3 g-1, p, 2} % 3, a _{# 3 g-1, p, 3} % 3), ...,
(A _{# 3g-1, n-1, 1} % 3, a _{# 3g-1, n-1, 2} % 3, a _{# 3g-1, n-1, 3} % 3),
(B _{# 3g-1, 1} % 3, b _{# 3g-1, 2} % 3, b _{# 3g-1, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1)
And,
(A _{# 3 g, 1, 1} % 3, a _{# 3 g, 1, 2} % 3, a _{# 3 g, 1, 3} % 3),
(A _{# 3g, 2, 1} % 3, a _{# 3g, 2, 2} % 3, a _{# 3g, 2, 3} % 3), ...,
(A _{# 3 g, p, 1} % 3, a _{# 3 g, p, 2} % 3, a _{# 3 g, p, 3} % 3), ...,
(A _{# 3 g, n -1, 1} % 3, a _{# 3 g, n -1 , 2} % 3, a _{# 3 g, n -1 , 3} % 3),
(B _{# 3g, 1} % 3, b _{# 3g, 2} % 3, b _{# 3g, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1)

However, considering that encoding is easily performed, in the equations (9-1) to (9-3g),
It is good if there is one “0” out of three (b _{#k, 1} % 3, b _{# k, 2} % 3, b _{# k, 3} % 3) (where k = 1, 2, ... 3g). At this time, if D ⁰ = 1 exists and b _{# k, 1} , b _{# k, 2} , b _{# k, 3} are integers of 0 or more, the parity P can be determined sequentially Because it has

Also, in order to associate parity bits and data bits at the same point in time and easily search for a code with high correction capability,
There is one “0” out of three of (a _{#k, 1, 1} % 3, a _{#k, 1, 2} % 3, a _{#k, 1, 3} % 3),
There is one “0” out of three of (a _{#k, 2, 1} % 3, a _{#k, 2, 2} % 3, a _{#k, 2 , 3} % 3),
・
・
・
There is one “0” among three of (a _{#k, p, 1} % 3, a _{#k, p, 2} % 3, a _{#k, p, 3} % 3),
・
・
・
It is good if there is one “0” out of three (a _{# k, n – 1, 1} % 3, a _{# k, n – 1, 2} % 3, a _{# k, n – 1, 3} % 3) (However, k = 1, 2, ... 3 g).

Next, an LDPC-CC with a time varying period of 3 g (g = 2, 3, 4, 5,...) In consideration of easy encoding will be considered. At this time, when the coding rate is (n-1) / n (n is an integer of 2 or more), the parity check polynomial of LDPC-CC can be expressed as follows.

In this _{case, X 1 (D), X} 2 (D), ··· X n-1 (D) is data _{(information)} X _1, X 2, a polynomial representation of ··· _{X n-1,} P (D) is a polynomial expression of parity. Here, in the equations (11-1) to (11-3 g), three terms are included in each of X ₁ (D), X ₂ (D), ... X _n-1 (D), P (D) Let it be a parity check polynomial that exists. However, in an LDPC-CC with a time varying period of 3g and a coding rate (n-1) / n (n is an integer of 2 or more), the parity of time i is Pi and the information is X _{i, 1} , X _{i, 2} , ··· Expressed by X _{i, n−1} . At this time, assuming that i% 3g = k (k = 0, 1, 2,..., 3g-1), a parity check polynomial of equation (11- (k + 1)) is established. For example, if i = 2, then i% 3g = 2 (k = 2), and equation (12) holds.

  At this time, when <condition # 3> and <condition # 4> are satisfied, the possibility of being able to create a code having a higher error correction capability is increased.

<Condition # 3>
In formulas (11-1) to (11-3 g), the combination of the orders of X1 (D), X2 (D),... Xn-1 (D) satisfies the following conditions.
_{(A # 1,1,1% 3, a} # 1,1,2% 3, a # 1,1,3% 3),
_{(A # 1,2,1% 3, a} # 1,2,2% 3, a # 1,2,3% 3), ···,
(A _{# 1, p, 1} % 3, a _{# 1, p, 2} % 3, a _{# 1, p, 3} % 3), ...,
(A _{# 1, n-1 and 1} % 3, a _{# 1, n-1 and 2} % 3, a _{# 1 and n-1 and 3} % 3) are
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1)
And,
_{(A # 2,1,1% 3, a} # 2,1,2% 3, a # 2,1,3% 3),
_{(A # 2,2,1% 3, a} # 2,2,2% 3, a # 2,2,3% 3), ···,
(A _{# 2, p, 1} % 3, a _{# 2, p, 2} % 3, a _{# 2, p, 3} % 3), ...,
(A _{# 2, n -1, 1} % 3, a _{# 2, n -1, 2} % 3, a _{# 2, n -1 , 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1)
And,
(A _# 3, _{1, 1} % 3, a _# 3, _{1, 2} % 3, a _# 3, _1, 3% 3),
(A _# 3, ₂ , ₁ % 3, a _# 3, _{2, 2} % 3, a _{# 3} , ₂ , ₃ % 3), ...,
(A _{# 3, p, 1} % 3, a _{# 3, p, 2} % 3, a _{# 3, p, 3} % 3), ...,
(A _{# 3, n -1, 1} % 3, a _{# 3, n -1} , ₂ % 3, a _{# 3, n -1 , 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1)
And,
・
・
・
And,
(A _{# k, 1,1} % 3, a _{# k, 1,2} % 3, a _{# k, 1,3} % 3),
(A _{# k, 2, 1} % 3, a _{# k, 2, 2} % 3, a _{# k, 2, 3} % 3), ...,
(A _{# k, p, 1} % 3, a _{# k, p, 2} % 3, a _{# k, p, 3} % 3), ...,
(A _{# k, n -1, 1} % 3, a _{# k, n -1, 2} % 3, a _{# k, n -1, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1) (Thus, k = 1, 2, 3, ..., 3 g)
And,
・
・
・
And,
(A _{# 3g-2,1} and ₁ % 3, a _{# 3g-2,1} and ₂ % 3, a _{# 3g-2,1 and 3} % 3),
(A _{# 3 g-} 2, 2 1% 3, a _{# 3 g} 2, 2, 2% 3, a _{# 3 g-} 2, _{2 3} % 3), ...,
(A _{# 3 g-2, p, 1} % 3, a _{# 3 g-2, p, 2} % 3, a _{# 3 g-2, p, 3} % 3), ...,
(A _{# 3 g-2, n-1 and 1} % 3, a _{# 3 g-2, n-1 and 2} % 3, a _{# 3 g-2, n-1 and 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1)
And,
(A _{# 3g-1,1,1} % 3, a _{# 3g-1,1,2} % 3, a _{# 3g-1,1,3} % 3),
_{(A # 3g-1,2,1% 3} , a # 3g-1,2,2% 3, a # 3g-1,2,3% 3), ···,
(A _{# 3 g-1, p, 1} % 3, a _{# 3 g-1, p, 2} % 3, a _{# 3 g-1, p, 3} % 3), ...,
(A _{# 3 g-1, n-1, 1} % 3, a _{# 3 g-1, n -1, 2} % 3, a _{# 3 g-1, n-1, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1)
And,
(A _{# 3 g, 1, 1} % 3, a _{# 3 g, 1, 2} % 3, a _{# 3 g, 1, 3} % 3),
(A _{# 3g, 2, 1} % 3, a _{# 3g, 2, 2} % 3, a _{# 3g, 2, 3} % 3), ...,
(A _{# 3 g, p, 1} % 3, a _{# 3 g, p, 2} % 3, a _{# 3 g, p, 3} % 3), ...,
(A _{# 3 g, n -1, 1} % 3, a _{# 3 g, n -1} , ₂ % 3, a _{# 3 g, n -1 , 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (P = 1, 2, 3, ..., n-1)

In addition, in the equations (11-1) to (11-3 g), the combination of the orders of P (D) satisfies the following conditions.
(B _{# 1,1} % 3, b _{# 1,2} % 3),
(B _{# 2,1} % 3, b _{# 2,2} % 3),
(B _{# 3, 1} % 3, b _{# 3, 2} % 3), ...,
(B _{# k, 1} % 3, b _{# k, 2} % 3), ...,
(B _{# 3g-2, 1} % 3, b _{# 3g-2, 2} % 3),
(B _{# 3g-1, 1} % 3, b _{# 3g-1, 2} % 3),
(B _{# 3g, 1} % 3, b _{# 3g, 2} % 3),
(1, 2) or (2, 1) (k = 1, 2, 3,..., 3 g).

  <Condition # 3> for the equations (11-1) to (11-3 g) has the same relationship as <condition # 2> for the equations (9-1) to (9-3 g). By adding the following condition (<condition # 4>) in addition to <condition # 3> to formulas (11-1) to (11-3g), an LDPC-CC with higher error correction capability is created. The possibility of doing is increased.

<Condition # 4>
The following conditions are satisfied in the order of P (D) of formulas (11-1) to (11-3 g).
(B _{# 1,1} % 3g, b _{# 1,2} % 3g),
(B _{# 2, 1} % 3 g, b _{# 2, 2} % 3 g),
(B _{# 3, 1} % 3 g, b _{# 3, 2} % 3 g), ...,
(B _{# k, 1} % 3 g, b _{# k, 2} % 3 g), ...,
(B _{# 3 g-2, 1} % 3 g, b _{# 3 g-2, 2} % 3 g),
(B _{# 3g-1, 1} % 3g, b _{# 3g-1, 2} % 3g),
The values of 6g orders ((b _{# 3g, 1} % 3g, b _{# 3g, 2} % 3g) (the two orders make up a set, so there are 6g of orders forming 3g sets), Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist.

  By the way, in the parity check matrix, there is a high possibility that good error correction capability can be obtained if there is regularity at the position where “1” exists, but there is randomness. Time-varying period 3 g (g = 2, 3, 4, 5,...) Having parity check polynomials of equations (11-1) to (11-3 g), coding rate (n-1) / n (n-1) In an LDPC-CC in which n is an integer of 2 or more, adding a condition of <Condition # 4> in addition to <Condition # 3> to create a code has regularity at the position where “1” exists in the parity check matrix. However, since it is possible to provide randomness, the possibility of obtaining a good error correction capability is increased.

Next, in time-varying cycle 3g (g = 2, 3, 4, 5,...), Encoding can be easily performed, and parity bits and data bits at the same point in time can be related to each other. Consider an LDPC-CC. At this time, when the coding rate is (n-1) / n (n is an integer of 2 or more), the parity check polynomial of LDPC-CC can be expressed as follows.

In this _{case, X 1 (D), X} 2 (D), ··· X n-1 (D) is data _{(information)} X _1, X 2, a polynomial representation of ··· _{X n-1,} P (D) is a polynomial expression of parity. Then, in the formula _{(13-1) ~ (13-3g),} X 1 (D), X 2 (D), is _{··· X n-1 (D)} , P (D) 3 three terms, each present It is assumed that the parity check polynomial is such that X ₁ (D), X ₂ (D),..., X _{n -1} (D) and P (D) have a term of D ⁰ . (K = 1, 2, 3, ..., 3 g)

However, in an LDPC-CC with a time varying period of 3g and a coding rate (n-1) / n (n is an integer of 2 or more), the parity of time i is Pi and the information is X _{i, 1} , X _{i, 2} , ··· Expressed by X _{i, n−1} . At this time, assuming that i% 3g = k (k = 0, 1, 2,..., 3g-1), a parity check polynomial of equation (13- (k + 1)) is established. For example, if i = 2, then i% 3g = 2 (k = 2), and equation (14) holds.

  At this time, if the following conditions (<condition # 5> and <condition # 6>) are satisfied, the possibility that codes with higher error correction capability can be created is increased.

<Condition # 5>
In formulas (13-1) to (13-3g), the combination of the orders of X ₁ (D), X ₂ (D),..., X _n-1 (D) satisfies the following conditions.
_{(A # 1,1,1% 3, a} # 1,1,2% 3),
(A _{# 1,2,1} % 3, a _{# 1,2,2} % 3), ...,
(A _{# 1, p, 1} % 3, a _{# 1, p, 2} % 3), ...,
(A _{# 1, n-1 and 1} % 3, a _{# 1 and n-1 and 2} % 3) are
It becomes either (1, 2) or (2, 1). (P = 1, 2, 3, ..., n-1)
And,
_{(A # 2,1,1% 3, a} # 2,1,2% 3),
(A _# 2, 2, 1% 3, a _{# 2, 2, 2} % 3), ...,
(A _{# 2, p, 1} % 3, a _{# 2, p, 2} % 3), ...,
(A _{# 2, n-1 and 1} % 3, a _{# 2, n-1 and 2} % 3) are
It becomes either (1, 2) or (2, 1). (P = 1, 2, 3, ..., n-1)
And,
_{(A # 3,1,1% 3, a} # 3,1,2% 3),
(A _# 3, ₂ , ₁ % 3, a _# 3, _{2, 2} % 3), ...,
(A _{# 3, p, 1} % 3, a _{# 3, p, 2} % 3), ...,
(A _{# 3, n -1, 1} % 3, a _{# 3, n -1 , 2} % 3)
It becomes either (1, 2) or (2, 1). (P = 1, 2, 3, ..., n-1)
And,
・
・
・
And,
(A _{# k, 1,1} % 3, a _{# k, 1,2} % 3),
(A _{# k, 2, 1} % 3, a _{# k, 2, 2} % 3), ...,
(A _{# k, p, 1} % 3, a _{# k, p, 2} % 3), ...,
(A _{# k, n -1, 1} % 3, a _{# k, n -1, 2} % 3),
It becomes either (1, 2) or (2, 1). (P = 1, 2, 3, ..., n-1) (Thus, k = 1, 2, 3, ..., 3 g)
And,
・
・
・
And,
(A _{# 3g-2,1} and ₁ % 3, a _{# 3g-2,1 and 2} % 3),
(A _{# 3 g-2,2 1} % 3, a _{# 3 g 2,2 2} % 3), ...,
(A _{# 3 g-2, p, 1} % 3, a _{# 3 g-2, p, 2} % 3), ...,
(A _{# 3 g-2, n -1, 1} % 3, a _{# 3 g-2, n -1 , 2} % 3),
It becomes either (1, 2) or (2, 1). (P = 1, 2, 3, ..., n-1)
And,
(A _{# 3 g -1,1,1} % 3, a _{# 3 g -1,1,2} % 3),
(A _{# 3 g -1} , _{2, 1} % 3, a _{# 3 g -1} , _{2, 2} % 3), ...,
(A _{# 3 g-1, p, 1} % 3, a _{# 3 g-1, p, 2} % 3), ...,
(A _{# 3 g-1, n -1, 1} % 3, a _{# 3 g-1, n -1, 2} % 3),
It becomes either (1, 2) or (2, 1). (P = 1, 2, 3, ..., n-1)
And,
(A _{# 3g, 1,1} % 3, a _{# 3g, 1,2} % 3),
(A _{# 3 g, 2, 1} % 3, a _{# 3 g, 2, 2} % 3), ...,
(A _{# 3g, p, 1} % 3, a _{# 3g, p, 2} % 3), ...,
(A _{# 3 g, n -1, 1} % 3, a _{# 3 g, n -1 , 2} % 3),
It becomes either (1, 2) or (2, 1). (P = 1, 2, 3, ..., n-1)

In addition, in formulas (13-1) to (13-3g), the combination of the orders of P (D) satisfies the following conditions.
(B _{# 1,1} % 3, b _{# 1,2} % 3),
(B _{# 2,1} % 3, b _{# 2,2} % 3),
(B _{# 3, 1} % 3, b _{# 3, 2} % 3), ...,
(B _{# k, 1} % 3, b _{# k, 2} % 3), ...,
(B _{# 3g-2, 1} % 3, b _{# 3g-2, 2} % 3),
(B _{# 3g-1, 1} % 3, b _{# 3g-1, 2} % 3),
(B _{# 3g, 1} % 3, b _{# 3g, 2} % 3),
(1, 2) or (2, 1) (k = 1, 2, 3,..., 3 g).

  <Condition # 5> for the equations (13-1) to (13-3g) has the same relationship as <condition # 2> for the equations (9-1) to (9-3g). By adding the following condition (<condition # 6>) to the equations (13-1) to (13-3g) in addition to <condition # 5>, it is possible to create an LDPC-CC with high error correction capability. The possibility is high.

<Condition # 6>
The following conditions are satisfied in the order of X ₁ (D) of formulas (13-1) to (13-3 g).
(A _{# 1,1,1} % 3g, a _{# 1,1,2} % 3g),
_{(A # 2,1,1% 3g, a} # 2,1,2% 3g), ···,
(A _{# p, 1, 1} % 3 g, a _{# p, 1, 2} % 3 g), ...,
The 6 g values of (a _{# 3 g, 1, 1} % 3 g, a _{# 3 g, 1, 2} % 3 g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (P = 1, 2, 3, ..., 3 g)
And,
The following conditions are satisfied in the order of X ₂ (D) in formulas (13-1) to (13-3 g).
(A _{# 1,2,1} % 3g, a _{# 1,2,2} % 3g),
(A _{# 2} , 2, 1% 3 g, a _{# 2, 2, 2} % 3 g), ...,
(A _{# p, 2, 1} % 3 g, a _{# p, 2, 2} % 3 g), ...,
The 6 g values of (a _{# 3 g, 2, 1} % 3 g, a _{# 3 g, 2, 2} % 3 g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (P = 1, 2, 3, ..., 3 g)
And,
The following conditions are satisfied in the order of X ₃ (D) in formulas (13-1) to (13-3 g).
_{(A # 1,3,1% 3g, a} # 1,3,2% 3g),
_{(A # 2,3,1% 3g, a} # 2,3,2% 3g), ···,
(A _{# p, 3, 1} % 3 g, a _{# p, 3, 2} % 3 g), ...,
The 6 g values of (a _{# 3 g, 3, 1} % 3 g, a _{# 3 g, 3, 2} % 3 g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (P = 1, 2, 3, ..., 3 g)
And,
・
・
・
And,
The following conditions are satisfied in the orders of X _k (D) in formulas (13-1) to (13-3 g).
(A _{# 1, k, 1} % 3 g, a _{# 1, k, 2} % 3 g),
(A _{# 2, k, 1} % 3 g, a _{# 2, k, 2} % 3 g), ...,
(A _{# p, k, 1} % 3 g, a _{# p, k, 2} % 3 g), ...,
The 6g values of (a _{# 3g, k, 1} % 3g, a _{# 3g, k, 2} % 3g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (P = 1, 2, 3, ..., 3 g)
(K = 1, 2, 3, ..., n-1)
And,
・
・
・
And,
The following conditions are satisfied in the order of X _n-1 (D) in formulas (13-1) to (13-3 g).
(A _{# 1, n−1, 1} % 3 g, a _{# 1, n−1, 2} % 3 g),
(A _{# 2, n -1, 1} % 3 g, a _{# 2, n -1 , 2} % 3 g), ...,
(A _{# p, n -1, 1} % 3 g, a _{# p, n -1 , 2} % 3 g), ...,
The 6 g values of (a _{# 3 g, n -1, 1} % 3 g, a _{# 3 g, n -1 , 2} % 3 g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (P = 1, 2, 3, ..., 3 g)
And,
The following conditions are satisfied in the order of P (D) of formulas (13-1) to (13-3 g).
(B _{# 1,1} % 3g, b _{# 1,2} % 3g),
(B _{# 2, 1} % 3 g, b _{# 2, 2} % 3 g),
(B _{# 3, 1} % 3 g, b _{# 3, 2} % 3 g), ...,
(B _{# k, 1} % 3 g, b _{# k, 2} % 3 g), ...,
(B _{# 3 g-2, 1} % 3 g, b _{# 3 g-2, 2} % 3 g),
(B _{# 3g-1, 1} % 3g, b _{# 3g-1, 2} % 3g),
The 6g values of (b _{# 3g, 1} % 3g, b _{# 3g, 2} % 3g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (K = 1, 2, 3, ..., 3 g)

  By the way, in the parity check matrix, there is a high possibility that good error correction capability can be obtained if there is regularity at the position where “1” exists, but there is randomness. Time-varying period 3g (g = 2, 3, 4, 5,...) Having parity check polynomials of equations (13-1) to (13-3 g), coding rate (n-1) / n ( In an LDPC-CC in which n is an integer of 2 or more, adding a condition of <Condition # 6> in addition to <Condition # 5> to create a code results in regularity at the position where “1” exists in the parity check matrix. However, it is possible to give randomness while having a higher probability of obtaining a better error correction capability.

  Also, instead of <Condition # 6>, <Condition # 6 '> is used, that is, even if <Condition # 6'> is added in addition to <Condition # 5> to create a code, higher error correction There is a high probability of being able to create a capable LDPC-CC.

<Condition # 6 '>
The following conditions are satisfied in the order of X ₁ (D) of formulas (13-1) to (13-3 g).
(A _{# 1,1,1} % 3g, a _{# 1,1,2} % 3g),
_{(A # 2,1,1% 3g, a} # 2,1,2% 3g), ···,
(A _{# p, 1, 1} % 3 g, a _{# p, 1, 2} % 3 g), ...,
The 6 g values of (a _{# 3 g, 1, 1} % 3 g, a _{# 3 g, 1, 2} % 3 g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (P = 1, 2, 3, ..., 3 g)
Or
The following conditions are satisfied in the order of X ₂ (D) in formulas (13-1) to (13-3 g).
(A _{# 1,2,1} % 3g, a _{# 1,2,2} % 3g),
(A _{# 2} , 2, 1% 3 g, a _{# 2, 2, 2} % 3 g), ...,
(A _{# p, 2, 1} % 3 g, a _{# p, 2, 2} % 3 g), ...,
The 6 g values of (a _{# 3 g, 2, 1} % 3 g, a _{# 3 g, 2, 2} % 3 g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (P = 1, 2, 3, ..., 3 g)
Or
The following conditions are satisfied in the order of X ₃ (D) in formulas (13-1) to (13-3 g).
_{(A # 1,3,1% 3g, a} # 1,3,2% 3g),
_{(A # 2,3,1% 3g, a} # 2,3,2% 3g), ···,
(A _{# p, 3, 1} % 3 g, a _{# p, 3, 2} % 3 g), ...,
The 6 g values of (a _{# 3 g, 3, 1} % 3 g, a _{# 3 g, 3, 2} % 3 g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (P = 1, 2, 3, ..., 3 g)
Or
・
・
・
Or
The following conditions are satisfied in the orders of X _k (D) in formulas (13-1) to (13-3 g).
(A _{# 1, k, 1} % 3 g, a _{# 1, k, 2} % 3 g),
(A _{# 2, k, 1} % 3 g, a _{# 2, k, 2} % 3 g), ...,
(A _{# p, k, 1} % 3 g, a _{# p, k, 2} % 3 g), ...,
The 6g values of (a _{# 3g, k, 1} % 3g, a _{# 3g, k, 2} % 3g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (P = 1, 2, 3, ..., 3 g)
(K = 1, 2, 3, ..., n-1)
Or
・
・
・
Or
The following conditions are satisfied in the order of X _n-1 (D) in formulas (13-1) to (13-3 g).
(A _{# 1, n−1, 1} % 3 g, a _{# 1, n−1, 2} % 3 g),
(A _{# 2, n -1, 1} % 3 g, a _{# 2, n -1 , 2} % 3 g), ...,
(A _{# p, n -1, 1} % 3 g, a _{# p, n -1 , 2} % 3 g), ...,
The 6 g values of (a _{# 3 g, n -1, 1} % 3 g, a _{# 3 g, n -1 , 2} % 3 g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (P = 1, 2, 3, ..., 3 g)
Or
The following conditions are satisfied in the order of P (D) of formulas (13-1) to (13-3 g).
(B _{# 1,1} % 3g, b _{# 1,2} % 3g),
(B _{# 2, 1} % 3 g, b _{# 2, 2} % 3 g),
(B _{# 3, 1} % 3 g, b _{# 3, 2} % 3 g), ...,
(B _{# k, 1} % 3 g, b _{# k, 2} % 3 g), ...,
(B _{# 3 g-2, 1} % 3 g, b _{# 3 g-2, 2} % 3 g),
(B _{# 3g-1, 1} % 3g, b _{# 3g-1, 2} % 3g),
The 6g values of (b _{# 3g, 1} % 3g, b _{# 3g, 2} % 3g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (K = 1, 2, 3, ..., 3 g)

  Heretofore, LDPC-CCs with a time-variant period of 3 g and a coding rate (n-1) / n (n is an integer of 2 or more) have been described. The condition of the order of the parity check polynomial of the LDPC-CC with a time-variant period of 3 g and a coding rate of 1/2 (n = 2) will be described below.

Equations (15-1) to (15) are used as parity check polynomials of LDPC-CC with a time-variant period of 3 g (g = 1, 2, 3, 4,...) And a coding rate of 1/2 (n = 2). Consider 15-3g).

  At this time, X (D) is a polynomial expression of data (information) X, and P (D) is a polynomial expression of parity. Here, in the equations (15-1) to (15-3g), parity check polynomials are set such that three terms are present in each of X (D) and P (D).

  Similar to LDPC-CC with time-variant period 3 and LDPC-CC with time-variant period 6, time-variant period 3g represented by parity check polynomials of equations (15-1) to (15-3g), coding rate In the 1/2 (n = 2) LDPC-CC, if the following condition (<condition # 2-1>) is satisfied, the possibility that higher error correction capability can be obtained is increased.

However, in an LDPC-CC with a time varying period of 3 g and a coding rate of 1/2 (n = 2), the parity at time i is represented by Pi and the information by Xi _{, 1} . At this time, assuming that i% 3g = k (k = 0, 1, 2,..., 3g-1), a parity check polynomial of equation (15- (k + 1)) is established. For example, if i = 2, then i% 3g = 2 (k = 2), so equation (16) holds.

Further, in formulas (15-1) to (15-3g), a _{# k, 1} , ₁ , a _{# k, 1} , ₂ , a _{# k, 1, 3} are integers ( _{where , 1} ≠ a _{# k, 1,2} ≠ a _{# k, 1,3} ) (k = 1, 2, 3, ..., 3g). Also, let b _{#k, 1} , b _{# k, 2} , b _{# k, 3} be integers (where b _{# k, 1} ≠ b _{# k, 2} ≠ b _{# k, 3} ). The parity check polynomial (k = 1, 2, 3,..., 3g) in equation (15-k) is called “check equation #k”, and , And the k-th submatrix H _k . Then, consider an LDPC-CC with a time varying period of 3 g generated from the first sub matrix H ₁ , the second sub matrix H ₂ , the third sub matrix H ₃ ,..., The third g sub matrix H _{3 g} .

<Condition # 2-1>
In formulas (15-1) to (15-3g), the combination of the orders of X (D) and P (D) satisfies the following conditions.
_{(A # 1,1,1% 3, a} # 1,1,2% 3, a # 1,1,3% 3),
(B _{# 1,1} % 3, b _{# 1,2} % 3, b _{# 1,3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become.
And,
_{(A # 2,1,1% 3, a} # 2,1,2% 3, a # 2,1,3% 3),
(B _{# 2, 1} % 3, b _{# 2, 2} % 3, b _{# 2, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become.
And,
(A _# 3, _{1, 1} % 3, a _# 3, _{1, 2} % 3, a _# 3, _1, 3% 3),
(B _{# 3, 1} % 3, b _{# 3, 2} % 3, b _{# 3, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become.
And,
・
・
・
And,
(A _{# k, 1,1} % 3, a _{# k, 1,2} % 3, a _{# k, 1,3} % 3),
(B _{#k, 1} % 3, b _{# k, 2} % 3, b _{# k, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become. (Thus, k = 1, 2, 3, ..., 3 g)
And,
・
・
・
And,
(A _{# 3g-2,1} and ₁ % 3, a _{# 3g-2,1} and ₂ % 3, a _{# 3g-2,1 and 3} % 3),
(B _{# 3g-2, 1} % 3, b _{# 3g-2, 2} % 3, b _{# 3g-2, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become.
And,
(A _{# 3g-1,1,1} % 3, a _{# 3g-1,1,2} % 3, a _{# 3g-1,1,3} % 3),
(B _{# 3g-1, 1} % 3, b _{# 3g-1, 2} % 3, b _{# 3g-1, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become.
And,
(A _{# 3 g, 1, 1} % 3, a _{# 3 g, 1, 2} % 3, a _{# 3 g, 1, 3} % 3),
(B _{# 3g, 1} % 3, b _{# 3g, 2} % 3, b _{# 3g, 3} % 3),
(0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0) Become.

However, in view of easy encoding, in equations (15-1) to (15-3g),
It is good if there is one “0” out of three (b _{#k, 1} % 3, b _{# k, 2} % 3, b _{# k, 3} % 3) (where k = 1, 2, ... 3g). At this time, if D ⁰ = 1 exists and b _{# k, 1} , b _{# k, 2} , b _{# k, 3} are integers of 0 or more, the parity P can be determined sequentially Because it has

Also, in order to associate parity bits and data bits at the same point in time and easily search for a code with high correction capability, (a _{# k, 1, 1} % 3, a _{# k, 1, It is desirable that} one of three of ₂ % 3, a _{# k, 1, 3} % 3) be “0” (however, k = 1, 2,... 3g).

Next, an LDPC-CC with a time varying period of 3 g (g = 2, 3, 4, 5,...) In consideration of easy encoding will be considered. At this time, assuming that the coding rate is 1/2 (n = 2), the parity check polynomial of the LDPC-CC can be expressed as follows.

At this time, X (D) is a polynomial expression of data (information) X, and P (D) is a polynomial expression of parity. Here, in Equations (17-1) to (17-3g), parity check polynomials are assumed such that three terms are present in each of X and P (D). However, in an LDPC-CC with a time varying period of 3 g and a coding rate of 1/2 (n = 2), the parity at time i is represented by Pi and the information by Xi _{, 1} . At this time, assuming that i% 3g = k (k = 0, 1, 2,..., 3g-1), a parity check polynomial of equation (17- (k + 1)) is established. For example, if i = 2, then i% 3g = 2 (k = 2), and equation (18) holds.

  At this time, when <condition # 3-1> and <condition # 4-1> are satisfied, the possibility of being able to create a code having a higher error correction capability is increased.

<Condition # 3-1>
In formulas (17-1) to (17-3g), the combination of the orders of X (D) satisfies the following conditions.
_{(A # 1,1,1% 3, a} # 1,1,2% 3, a # 1,1,3% 3) is (0,1,2), (0,2,1), ( It becomes one of 1, 0, 2), (1, 2, 0), (2, 0, 1), and (2, 1, 0).
And,
_{(A # 2,1,1% 3, a} # 2,1,2% 3, a # 2,1,3% 3) is (0,1,2), (0,2,1), ( It becomes one of 1, 0, 2), (1, 2, 0), (2, 0, 1), and (2, 1, 0).
And,
(A _# 3, _{1, 1} % 3, a _# 3, _{1, 2} % 3, a _# 3, _1, 3% 3) are (0, 1, 2), (0, 2, 1), ( It becomes one of 1, 0, 2), (1, 2, 0), (2, 0, 1), and (2, 1, 0).
And,
・
・
・
And,
(A _{# k, 1,1} % 3, a _{# k, 1,2} % 3, a _{# k, 1,3} % 3) are (0,1,2), (0,2,1), ( It becomes one of 1, 0, 2), (1, 2, 0), (2, 0, 1), and (2, 1, 0). (Thus, k = 1, 2, 3, ..., 3 g)
And,
・
・
・
And,
(A _{# 3 g-2, 1, 1} % 3, a _{# 3 g-2, 1, 2} % 3, a _{# 3 g-2, 1, 3} % 3), (0, 1, 2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0).
And,
(A _{# 3g-1,1,1} % 3, a _{# 3g-1,1,2} % 3, a _{# 3g-1,1,3} % 3) are (0,1,2), (0, 2, 1), (1, 0, 2), (1, 2, 0), (2, 0, 1), (2, 1, 0).
And,
(A _{# 3g, 1,1} % 3, a _{# 3g, 1,2} % 3, a _{# 3g, 1,3} % 3) are (0,1,2), (0,2,1), ( It becomes one of 1, 0, 2), (1, 2, 0), (2, 0, 1), and (2, 1, 0).

In addition, in Equations (17-1) to (17-3g), the combination of the orders of P (D) satisfies the following conditions.
(B _{# 1,1} % 3, b _{# 1,2} % 3),
(B _{# 2,1} % 3, b _{# 2,2} % 3),
(B _{# 3, 1} % 3, b _{# 3, 2} % 3), ...,
(B _{# k, 1} % 3, b _{# k, 2} % 3), ...,
(B _{# 3g-2, 1} % 3, b _{# 3g-2, 2} % 3),
(B _{# 3g-1, 1} % 3, b _{# 3g-1, 2} % 3),
(B _{# 3g, 1} % 3, b _{# 3g, 2} % 3),
(1, 2) or (2, 1) (k = 1, 2, 3,..., 3 g).

  <Condition # 3-1> for the expressions (17-1) to (17-3g) has the same relationship as <condition # 2-1> for the expressions (15-1) to (15-3g). When the following condition (<condition # 4-1>) is added to the expressions (17-1) to (17-3g) in addition to <condition # 3-1>, an LDPC with higher error correction capability -The possibility of being able to create a CC is increased.

<Condition # 4-1>
The following conditions are satisfied in the order of P (D) of formulas (17-1) to (17-3 g)
(B _{# 1,1} % 3g, b _{# 1,2} % 3g),
(B _{# 2, 1} % 3 g, b _{# 2, 2} % 3 g),
(B _{# 3, 1} % 3 g, b _{# 3, 2} % 3 g), ...,
(B _{# k, 1} % 3 g, b _{# k, 2} % 3 g), ...,
(B _{# 3 g-2, 1} % 3 g, b _{# 3 g-2, 2} % 3 g),
(B _{# 3g-1, 1} % 3g, b _{# 3g-1, 2} % 3g),
The 6g values of (b _{# 3g, 1} % 3g, b _{# 3g, 2} % 3g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist.

  By the way, in the parity check matrix, there is a high possibility that good error correction capability can be obtained if there is regularity at the position where “1” exists, but there is randomness. Time variant period 3 g (g = 2, 3, 4, 5,...) Having parity check polynomials of equations (17-1) to (17-3 g), coding rate 1/2 (n = 2) In the LDPC-CC, if the condition # 4-1 is added to the condition # 3-1 to create a code, randomness is obtained in the parity check matrix while having regularity at the position where “1” exists. As a result, it is possible to obtain better error correction capability.

Next, in time-varying cycle 3g (g = 2, 3, 4, 5,...), Encoding can be easily performed, and parity bits and data bits at the same point in time can be related to each other. Consider an LDPC-CC. At this time, assuming that the coding rate is 1/2 (n = 2), the parity check polynomial of the LDPC-CC can be expressed as follows.

At this time, X (D) is a polynomial expression of data (information) X, and P (D) is a polynomial expression of parity. Then, in Equations (19-1) to (19-3g), parity check polynomials such that there are three terms in each of X (D) and P (D) are defined as X (D) and P (D) There will be a term for D ⁰ . (K = 1, 2, 3, ..., 3 g)

However, in an LDPC-CC with a time varying period of 3 g and a coding rate of 1/2 (n = 2), the parity at time i is represented by Pi and the information by Xi _{, 1} . At this time, assuming that i% 3g = k (k = 0, 1, 2,..., 3g-1), a parity check polynomial of equation (19- (k + 1)) is established. For example, if i = 2, then i% 3g = 2 (k = 2), so equation (20) holds.

  At this time, if the following conditions (<condition # 5-1> and <condition # 6-1>) are satisfied, the possibility of being able to create a code having a higher error correction capability is increased.

<Condition # 5-1>
In formulas (19-1) to (19-3 g), the combination of the orders of X (D) satisfies the following conditions.
_{(A # 1,1,1% 3, a} # 1,1,2% 3) is a one of the (1,2), (2,1).
And,
_{(A # 2,1,1% 3, a} # 2,1,2% 3) is a one of the (1,2), (2,1).
And,
(A _# 3, _{1, 1} % 3, a _{# 3, 1, 2} % 3) is either (1, 2) or (2, 1).
And,
・
・
・
And,
(A _{# k, 1, 1} % 3, a _{# k, 1, 2} % 3) is either (1, 2) or (2, 1). (Thus, k = 1, 2, 3, ..., 3 g)
And,
・
・
・
And,
(A _{# 3 g-2, 1, 1} % 3, a _{# 3 g-2, 1, 2} % 3) is either (1, 2) or (2, 1).
And,
(A _{# 3g-1,1,1} % 3, a _{# 3g-1,1,2} % 3) is either (1,2) or (2,1).
And,
(A _{# 3 g, 1, 1} % 3, a _{# 3 g, 1, 2} % 3) is either (1, 2) or (2, 1).

In addition, in the formulas (19-1) to (19-3g), the combination of the orders of P (D) satisfies the following conditions.
(B _{# 1,1} % 3, b _{# 1,2} % 3),
(B _{# 2,1} % 3, b _{# 2,2} % 3),
(B _{# 3, 1} % 3, b _{# 3, 2} % 3), ...,
(B _{# k, 1} % 3, b _{# k, 2} % 3), ...,
(B _{# 3g-2, 1} % 3, b _{# 3g-2, 2} % 3),
(B _{# 3g-1, 1} % 3, b _{# 3g-1, 2} % 3),
(B _{# 3g, 1} % 3, b _{# 3g, 2} % 3),
(1, 2) or (2, 1) (k = 1, 2, 3,..., 3 g).

  The <condition # 5-1> for the formulas (19-1) to (19-3 g) has the same relationship as the <condition # 2-1> for the formulas (15-1) to (15-3 g). With the following conditions (<condition # 6-1>) in addition to <condition # 5-1> with respect to formulas (19-1) to (19-3g), an LDPC with higher error correction capability -The possibility of being able to create a CC is increased.

<Condition # 6-1>
The following conditions are satisfied in the order of X (D) of formulas (19-1) to (19-3 g).
(A _{# 1,1,1} % 3g, a _{# 1,1,2} % 3g),
_{(A # 2,1,1% 3g, a} # 2,1,2% 3g), ···,
(A _{# p, 1, 1} % 3 g, a _{# p, 1, 2} % 3 g), ...,
The 6 g values of (a _{# 3 g, 1, 1} % 3 g, a _{# 3 g, 1, 2} % 3 g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (P = 1, 2, 3, ..., 3 g)
And,
The following conditions are satisfied in the order of P (D) of formulas (19-1) to (19-3 g).
(B _{# 1,1} % 3g, b _{# 1,2} % 3g),
(B _{# 2, 1} % 3 g, b _{# 2, 2} % 3 g),
(B _{# 3, 1} % 3 g, b _{# 3, 2} % 3 g), ...,
(B _{# k, 1} % 3 g, b _{# k, 2} % 3 g), ...,
(B _{# 3 g-2, 1} % 3 g, b _{# 3 g-2, 2} % 3 g),
(B _{# 3g-1, 1} % 3g, b _{# 3g-1, 2} % 3g),
The 6 g (3 g × 2) values of (b _{# 3 g, 1} % 3 g, b _{# 3 g, 2} % 3 g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (K = 1, 2, 3, ..., 3 g)

  By the way, in the parity check matrix, if there is regularity at the position where “1” exists, but there is randomness, it is highly possible that good error correction capability can be obtained. In an LDPC-CC with a time-varying period 3g (g = 2, 3, 4, 5,...) Having a parity check polynomial of Equations (19-1) to (19-3g) and a coding rate of 1/2: If a code is created by adding the condition of <condition # 6-1> in addition to <condition # 5-1>, randomness is given to the parity check matrix while having regularity at the position where "1" exists. Can increase the possibility of obtaining a better error correction capability.

  Also, instead of <Condition # 6-1>, <Condition # 6'-1> is used, that is, in addition to <Condition # 5-1>, <Condition # 6'-1> is added to create a code Even then, the possibility of being able to create an LDPC-CC with higher error correction capability is increased.

<Condition # 6'-1>
The following conditions are satisfied in the order of X (D) of formulas (19-1) to (19-3 g).
(A _{# 1,1,1} % 3g, a _{# 1,1,2} % 3g),
_{(A # 2,1,1% 3g, a} # 2,1,2% 3g), ···,
(A _{# p, 1, 1} % 3 g, a _{# p, 1, 2} % 3 g), ...,
The 6 g values of (a _{# 3 g, 1, 1} % 3 g, a _{# 3 g, 1, 2} % 3 g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (P = 1, 2, 3, ..., 3 g)
Or
The following conditions are satisfied in the order of P (D) of formulas (19-1) to (19-3 g).
(B _{# 1,1} % 3g, b _{# 1,2} % 3g),
(B _{# 2, 1} % 3 g, b _{# 2, 2} % 3 g),
(B _{# 3, 1} % 3 g, b _{# 3, 2} % 3 g), ...,
(B _{# k, 1} % 3 g, b _{# k, 2} % 3 g), ...,
(B _{# 3 g-2, 1} % 3 g, b _{# 3 g-2, 2} % 3 g),
(B _{# 3g-1, 1} % 3g, b _{# 3g-1, 2} % 3g),
The 6g values of (b _{# 3g, 1} % 3g, b _{# 3g, 2} % 3g)
Of the integers from 0 to 3g-1 (0, 1, 2, 3, 4, ..., 3g-2, 3g-1), a multiple of 3 (that is, 0, 3, 6, ..., 3g All values other than -3) exist. (K = 1, 2, 3, ..., 3 g)

As an example, LDPC-CC with a coding rate of 1/2 and a time varying period of 6 with good error correction capability is listed in Table 4.

Hereinabove, the LDPC-CC having a time-variant cycle g with good characteristics has been described. The LDPC-CC can obtain encoded data (code word) by multiplying the information vector n by the generator matrix G. That is, the encoded data (code word) c can be expressed as c = n × G. Here, the generation matrix G is obtained corresponding to the parity check matrix H designed in advance. Specifically, the generator matrix G is a matrix that satisfies G × H ^T = 0.

ここで、Ｄは、遅延演算子である。 For example, consider a convolutional code of code rate 1/2 and generator polynomial G = [1 G ₁ (D) / G ₀ (D)] as an example. At this time, G ₁ represents a feed forward polynomial, and G ₀ represents a feedback polynomial. Assuming that the polynomial expression of the information sequence (data) is X (D) and the polynomial expression of the parity sequence is P (D), the parity check polynomial is expressed as the following equation (21).

Here, D is a delay operator.

The information regarding the convolutional code of (7, 5) is described in FIG. The generator matrix of the (7, 5) convolutional code is expressed as G = [1 (D ² +1) / (D ² + D + 1)]. Therefore, the parity check polynomial is expressed by the following equation (22).

Here, data at time point i is represented as X _i , parity as P _i, and a transmission sequence W _i = (X _i , P _i ). The transmission vector w is represented as ^T = (X ₁ , P ₁ , X ₂ , P ₂ ,..., X _i , P _i . Then, from equation (22), the parity check matrix H can be expressed as shown in FIG. At this time, the following equation (23) is established.

  Therefore, on the decoding side, using parity check matrix H, min-sum decoding approximating BP (Belief Propagation) (reliability propagation) decoding and BP decoding as shown in Non-Patent Document 5 to Non-Patent Document 7 It is possible to perform decoding using reliability propagation such as offset BP decoding, Normalized BP decoding, and shuffled BP decoding.

(Time-invariant, time-variant LDPC-CC based on convolutional code (coding rate (n-1) / n) (n: natural number))
The outline of time-invariant and time-varying LDPC-CC based on convolutional codes will be described below.

Information X ₁ , X ₂ ,..., X _n-1 polynomial expression of coding rate R = (n−1) / n, X ₁ (D), X ₂ (D) _{,. Let} P (D) be a polynomial expression of ₋₁ (D) and parity P, and consider a parity check polynomial expressed as shown in equation (24).

In equation (24), at this time, a _{p, p} (p = 1, 2,..., N−1; q = 1, 2,..., Rp) are, for example, natural numbers, a _{p, p 1} ≠ a _{p, 2} ≠ ... ≠ a _{p, rp} is satisfied. Further, b _q (q = 1, 2,..., S) is a natural number and satisfies b ₁ ≠ b ₂ ≠... ≠ b _s . At this time, a code defined by a parity check matrix based on the parity check polynomial of Equation (24) is referred to herein as time-invariant LDPC-CC.

ここで、ｉ＝０，１，・・・，ｍ−１である。 Prepare m different parity check polynomials based on equation (24) (m is an integer of 2 or more). The parity check polynomial is expressed as follows.

Here, i = 0, 1, ..., m-1.

ここで、「ｊ ｍｏｄ ｍ」は、ｊをｍで除算した余りである。 Then, the information X ₁ , X ₂ ,..., X _n-1 at the time point j is expressed as X _{1, j} , X _{2, j} ,..., X _{n -1, j,} and the parity P at the time point j is Pj and _{represents, u j = (X 1,} j, X 2, j, ···, X n-1, j, Pj) and ^T. At this time, the information X _{1, j} , X _{2, j} ,..., X _{n -1, j of} the time point j and the parity P _j satisfy the parity check polynomial of the equation (26).

Here, “j mod m” is the remainder of dividing j by m.

  A code defined by a parity check matrix based on the parity check polynomial of Equation (26) is referred to herein as time-variant LDPC-CC. At this time, the time-invariant LDPC-CC defined by the parity check polynomial of equation (24) and the time-variant LDPC-CC defined by the parity check polynomial of equation (26) sequentially register and exclude parity. It has the feature that it can be easily obtained by dynamic OR.

  For example, FIG. 6 shows the configuration of parity check matrix H of LDPC-CC with a time varying period of 2 based on equations (24) to (26) at a coding rate of 2/3. The two different check polynomials of the time-variant cycle 2 based on the equation (26) are named “check equation # 1” and “check equation # 2”. In FIG. 6, (Ha, 111) is a portion corresponding to "inspection formula # 1", and (Hc, 111) is a portion corresponding to "inspection formula # 2". Hereinafter, (Ha, 111) and (Hc, 111) are defined as submatrices.

  As described above, the first sub-matrix representing the parity check polynomial of the “checking equation # 1” and the parity check polynomial of the “checking equation # 2” are represented by the parity check polynomial H of the LDPC-CC of time variation period 2 of the present proposal. It can be defined by representing a second submatrix. Specifically, in the parity check matrix H, the first sub matrix and the second sub matrix are alternately arranged in the row direction. In the case of the coding rate 2/3, as shown in FIG. 6, the sub-matrix is shifted by three columns to the right between the i-th row and the (i + 1) -th row.

In addition, in the case of time-variant LDPC-CC with time-variant period 2, the sub-matrix in the i-th row and the sub-matrix in the (i + 1) -th row are different sub-matrices. That is, one of the submatrices (Ha, 11) or (Hc, 11) is the first submatrix, and the other is the second submatrix. The transmit vector _{u, u = (X 1,0,} X 2,0, P 0, X 1,1, X 2,1, P 1, ···, X 1, k, X 2, k, P k ,...) If ^T , then Hu = 0 holds (see equation (23)).

Next, in the case of a coding rate of 2/3, consider an LDPC-CC in which the time variation period is m. As in the case of the time varying period 2, m parity check polynomials represented by equation (24) are prepared. Then, “inspection formula # 1” represented by formula (24) is prepared. Similarly, “Inspection Formula #m” is prepared from “Inspection Formula # 2” represented by Expression (24). Data X and parity P at time _{mi + 1} are represented as X _{mi + 1} and P _{mi + 1} , respectively, and data X and parity P at time mi + 2 are compared with X _{mi +2} and P _{mi +2} , respectively, ..., data X and parity P at time mi + m And X _{mi + m} and P _{mi + m} , respectively (i: integer).

At this time, the parity P _{mi + 1} at the time point mi + 1 is determined using “check equation # 1”, the parity P _{mi + 2} at the time point mi + 2 is determined using “check equation # 2”,..., The parity P _{mi + m} at time point mi + m Consider an LDPC-CC obtained by using “check equation #m”. Such an LDPC-CC code is
The encoder can be easily configured, and the parity can be determined sequentially. The terminal bits can be reduced, and the reception quality at the time of puncturing at the end can be expected to be improved.

FIG. 7 shows the configuration of the LDPC-CC parity check matrix with a coding rate of 2/3 and a time-variant period of m described above. In FIG. 7, (H ₁ , 111) is a portion corresponding to “inspection formula # 1”, (H ₂ , 111) is a portion corresponding to “inspection formula # 2”,. _m , 111) is a portion corresponding to “inspection formula #m”. Hereinafter, (H ₁ , 111) is defined as a first submatrix, (H ₂ , 111) is defined as a second submatrix,..., (H _m , 111) is defined as an mth submatrix Do.

  As described above, the parity check matrix H of the LDPC-CC of the time-varying period m of the present proposal represents the first sub-matrix representing the parity check polynomial of “check equation # 1” and the parity check polynomial of “check equation # 2” The second sub-matrix can be defined by an m-th sub-matrix representing a parity check polynomial of the second sub-matrix,. Specifically, in the parity check matrix H, the first sub-matrix to the m-th sub-matrix are arranged periodically in the row direction (see FIG. 7). In the case of the coding rate 2/3, the sub matrix is shifted to the right by three columns in the i-th row and the (i + 1) -th row (see FIG. 7).

The transmit vector _{u, u = (X 1,0,} X 2,0, P 0, X 1,1, X 2,1, P 1, ···, X 1, k, X 2, k, P k ,...) If ^T , then Hu = 0 holds (see equation (23)).

  In the above description, as an example of the time-invariant and time-variant LDPC-CC based on the convolutional code of the coding rate (n-1) / n, the case of the coding rate 2/3 is taken as an example. Thus, it is possible to create a parity check matrix of time-invariant and time-varying LDPC-CC based on a convolutional code of coding rate (n-1) / n.

That is, in the case of the coding rate 2/3, (H ₁ , 111) is a portion (first submatrix) corresponding to “check equation # 1” in FIG. 7, and (H ₂ 111) is “check (H _m , 111) is a portion (the mth submatrix) corresponding to “check equation #m”, which is a portion (the second submatrix) corresponding to equation # 2 ”, In the case of the coding rate (n-1) / n, the result is as shown in FIG. That is, the part (first submatrix) corresponding to "check equation # 1" is represented by (H ₁ , 11 ... 1), and "check equation # k" (k = 2, 3, ... , M) are represented by (H _k , 11... 1). At this time, in the k-th submatrix, the number of “1” s in the portion excluding H _k is n−1. Then, in the parity check matrix H, in the i-th row and the (i + 1) -th row, the sub-matrix is shifted to the n-1 column right (see FIG. 8).

The transmit vector _{u, u = (X 1,0,} X 2,0, ···, X n-1,0, P 0, X 1,1, X 2,1, ···, X n-1 _{, 1, P 1, ···,} X 1, k, X 2, k, ···, X n-1, k, P k, ····) When ^T, Hu = 0 is satisfied ( Formula (23)).

  Note that FIG. 9 shows an example of the configuration of an LDPC-CC encoder in the case of a coding rate R = 1/2, as an example. As shown in FIG. 9, the LDPC-CC encoder 100 mainly includes a data operation unit 110, a parity operation unit 120, a weight control unit 130, and a mod 2 adder (exclusive OR operation) unit 140.

  The data operation unit 110 includes shift registers 111-1 to 111-M and weight multipliers 112-0 to 112-M.

  The parity operation unit 120 includes shift registers 121-1 to 121-M and weight multipliers 122-0 to 122-M.

The shift registers 111-1 to 111-M and 121-1 to 121-M are registers for holding v1 _{, t-i} and v2 _{, t-i} (i = 0, ..., M), respectively. At the input timing of the input of, the value held is outputted toward the shift register adjacent on the right, and the value outputted from the shift register adjacent on the left is newly held. The initial state of the shift register is all zero.

Weight multipliers 112-0 to 112 -M and 122-0 to 122 -M each 0/1 of the values of h ₁ ^(m) and h ₂ ^(m) according to the control signal output from weight control section 130. Switch to

The weight control unit 130 outputs the values of h ₁ ^(m) and h ₂ ^(m) at that timing based on the parity check matrix held internally, and weight multipliers 112-0 to 112 -M and 122-0. ~ 12-M supply.

The mod 2 adder 140 adds all the calculation results of mod 2 to the outputs of the weight multipliers 112-0 to 112 -M and 122-0 to 122 -M to calculate p _i .

  By adopting such a configuration, LDPC-CC encoder 100 can perform LDPC-CC encoding according to a parity check matrix.

  When the arrangement of the rows of the parity check matrix held by the weight control unit 130 is different for each row, the LDPC-CC encoder 100 is a time varying convolutional encoder. Further, in the case of LDPC-CC at a coding rate (q-1) / q, (q-1) data arithmetic units 110 are provided, and the mod2 adder 140 adds mod 2 to the output of each weight multiplier ( An exclusive OR operation may be performed.

Second Embodiment
Next, in the present embodiment, a method of searching for an LDPC-CC that can cope with a plurality of coding rates with a low calculation scale in an encoder / decoder will be described. By using the LDPC-CC searched by the method described below, the decoder can realize high data reception quality.

  In the LDPC-CC search method according to the present embodiment, for example, among the LDPC-CCs with good characteristics as described above, the coding rate 2/3, based on the coding rate 1/2 LDPC-CC, LDPC-CC of 3/4, 4/5, ..., (q-1) / q is sequentially searched. As a result, in the encoding and decoding processes, by preparing the encoder and the decoder at the highest coding rate (q-1) / q, the highest coding rate (q-1) can be obtained. It becomes possible to perform coding and decoding of a coding rate (s-1) / s (s = 2, 3,..., Q-1) smaller than / q.

  In addition, below, it demonstrates using LDPC-CC of the time variable period 3 as an example. As mentioned above, LDPC-CC with time varying period 3 has very good error correction capability.

(LDPC-CC Search Method)
(1) Coding rate 1/2
First, an LDPC-CC with a coding rate of 1/2 is selected as the underlying LDPC-CC. As the underlying coding rate 1/2 LDPC-CC, an LDPC-CC with good characteristics as described above is selected.

In the following, the case where parity check polynomials represented by Equations (27-1) to (27-3) are selected as parity check polynomials of an LDPC-CC with a base coding rate of 1/2 will be described. (In the examples of the formulas (27-1) to (27-3), the LDPC-CC having the time varying period 3 is 3 because it is expressed in the same form as the above (LDPC-CC having good characteristics). Can be defined by one parity check polynomial.)

Expressions (27-1) to (27-3), as described in Table 3, are an example of parity check polynomials of LDPC-CC with a time-variant period of 3 and a coding rate of 1/2 with good characteristics. . Then, as described above (LDPC-CC having good characteristics), information X ₁ at time point j is represented as X _{1, j} , parity P at time point j is represented as P _j , and u _j = (X _{1 , J} , Pj) Let ^T be. At this time, the information X _{1, j} at time point j and the parity P _j are
"When j mod 3 = 0, the parity check polynomial of equation (27-1) is satisfied."
“When j mod 3 = 1, the parity check polynomial of equation (27-2) is satisfied.”
“When j mod 3 = 2, the parity check polynomial of equation (27-3) is satisfied.”
At this time, the relationship between the parity check polynomial and the parity check matrix is the same as that described above (LDPC-CC having good characteristics).

(2) Coding rate 2/3
Then, a parity check polynomial of LDPC-CC with a coding rate of 2/3 is created based on a parity check polynomial of a code rate of 1/2 with good characteristics. Specifically, the parity check polynomial of the LDPC-CC with a coding rate of 2/3 is configured to include the parity check polynomial of the coding rate with a base of 1/2.

The parity check polynomial of the LDPC-CC with a coding rate of 2/3 when the equations (27-1) to (27-3) are used for the LDPC-CC with a base coding rate of 1/2, 1) to expression (28-3).

The parity check polynomials shown in the equations (28-1) to (28-3) have a configuration in which the term of X ₂ (D) is added to the equations (27-1) to (27-3) respectively. . The parity check polynomial of the coding rate 2/3 LDPC-CC using Equations (28-1) to (28-3) is the basis of a parity check polynomial of a coding rate 3/4 described later.

In Expressions (28-1) to (28-3), each order of X ₂ (D), (α1, β1), (α2, β2), and (α3, β3) satisfy the above condition (< When setting so as to satisfy the conditions # 1> to <condition # 6> and the like), an LDPC-CC with good characteristics can be obtained even in the case of the coding rate 2/3.

Then, as described above (LDPC-CC having good characteristics), information X _{1 and} X ₂ at time point j are represented as X _{1, j,} X _{2 and j,} and parity P at time point j is P j and Let u _j = (X _{1, j} , X _{2, j} , Pj) ^T. At this time, the information X _{1, j,} X _{2, j} at time point j and the parity P _j are
"When j mod 3 = 0, the parity check polynomial of equation (28-1) is satisfied."
“When j mod 3 = 1, the parity check polynomial of equation (28-2) is satisfied.”
“When j mod 3 = 2, the parity check polynomial of equation (28-3) is satisfied.”
At this time, the relationship between the parity check polynomial and the parity check matrix is the same as that described above (LDPC-CC having good characteristics).

(3) Coding rate 3/4
Then, based on the parity check polynomial of the coding rate 2/3 described above, a parity check polynomial of an LDPC-CC with a coding rate 3/4 is created. Specifically, the parity check polynomial of the coding rate 3/4 LDPC-CC is configured to include the underlying coding rate 2/3 parity check polynomial.

The parity check polynomial of the LDPC-CC with a coding rate of 3/4 when the formulas (28-1) to (28-3) are used for the LDPC-CC with a base coding rate of 2/3, 1) to formula (29-3).

The parity check polynomials shown in the equations (29-1) to (29-3) have a configuration in which the term of X ₃ (D) is added to the equations (28-1) to (28-3) respectively. . Note that in the equations (29-1) to (29-3), each of the orders of X ₃ (D), (γ1, δ1), (γ2, δ2), (γ3, δ3) is an LDPC with good characteristics. If setting is made to satisfy the condition (<condition # 1> to <condition # 6> etc.) of the order of CC, an LDPC-CC with good characteristics can be obtained even in the case of 3/4 coding rate. .

And, as described above (LDPC-CC having good characteristics), information X _1, X _2, X ₃ at time point _j is expressed as X _{1, j,} X _{2, j,} X _{3, j} , The parity P at time point j is represented by Pj, and u _j = (X _{1, j} , X _{2, j} , X _{3, j} , Pj) ^T. At this time, information X _{1, j,} X _{2, j,} X _{3, j} and parity P _j at time point _j are
"When j mod 3 = 0, the parity check polynomial of equation (29-1) is satisfied."
“When j mod 3 = 1, the parity check polynomial of equation (29-2) is satisfied.”
“When j mod 3 = 2, the parity check polynomial of equation (29-3) is satisfied.”
At this time, the relationship between the parity check polynomial and the parity check matrix is the same as that described above (LDPC-CC having good characteristics).

Formulas (30-1) to (30- (q-1)) show general formulas of parity check polynomials of the LDPC-CC with the time varying period g in the case of searching as described above.

  However, since Formula (30-1) is expressed by a general formula, it is expressed as Formula (30-1), but as described in the above (LDPC-CC having good characteristics) In fact, since the time variation period is g, equation (30-1) is expressed by g parity check polynomials. (As described in the present embodiment, for example, in the case of the time varying period 3, three parity check polynomials are expressed as in the equations (27-1) to (27-3).) Similar to the equation (30-1), each of the equations (30-2) to (30- (q-1)) is also expressed by g parity check polynomials because the time variation period is g.

  Here, g parity check polynomials of the equation (30-1) can be expressed by the equations (30-1-1), (30-1-1), (30-1-2),. It will be expressed as 30-1- (g-2) and formula (30-1- (g-1)).

  Similarly, the equation (30−w) is expressed by g parity check polynomials (w = 2, 3,..., Q−1). Here, g parity check polynomials of the equation (30-w) can be expressed by the equation (30-w-0), the equation (30-w-1), the equation (30-w-2),. It will be expressed as 30-w- (g-2) and formula (30-w- (g-1)).

In Expressions (30-1) to (30- (q-1)), X _{1, i} , X _{2, i} ,..., X _{q-1, i} represent information X ₁ at time point i, X ₂ ,..., X _q-1 are shown, and P _i is the parity P at time point i. Also, let A _{xr, k} (D) be the time i of the coding rate (r-1) / r (r = 2, 3,..., Q (q is a natural number of 3 or more)), k = i mod g It is a term of X _r (D) in the parity check polynomial of k obtained as Further, B _k (D) is a term of P (D) in the parity check polynomial of k obtained as k i mod g at a time i of the coding rate (r−1) / r. Also, "i mod g" is the remainder of dividing i by g.

  That is, equation (30-1) is a parity check polynomial of LDPC-CC with a time varying period g corresponding to coding rate 1/2, and equation (30-2) corresponds to coding rate 2/3. The parity check polynomial of the LDPC-CC with time-varying cycle g, ..., equation (30- (q-1)) is an LDPC-CC with time-varying cycle g corresponding to the coding rate (q-1) / q. It is a parity check polynomial of CC.

  In this way, based on equation (30-1), which is a parity check polynomial of LDPC-CC of code rate 1/2 with good characteristics, a parity check polynomial of LDPC-CC with code rate 2/3 30-2).

  Furthermore, the parity check polynomial (30-3) of the coding rate 3/4 LDPC-CC is generated on the basis of the parity check polynomial (30-2) of the coding rate 2/3 LDPC-CC. Similarly, based on the LDPC-CC of the coding rate (r-1) / r, the parity check polynomial of the LDPC-CC of the coding rate r / (r + 1) is generated. (R = 2, 3, ..., q-2, q-1)

  Another way of expressing the above parity check polynomial configuration method will be described. Consider an LDPC-CC with a time varying period g, which is a coding rate (y-1) / y, and an LDPC-CC with a time varying cycle g, which is a coding rate (z-1) / z. However, the maximum coding rate is (q-1) / q among the coding rates for sharing circuits of the encoder and sharing circuits of the decoder, and g is 2 or more. The integer, y is an integer of 2 or more, z is an integer of 2 or more, and the relationship of y <z ≦ q is established. The sharing of the circuit of the encoder is sharing of the circuit inside the encoder, not sharing of the circuit of the encoder and the decoder.

At this time, Formula (30-w-0), Formula (30-w) expressing g parity check polynomials described in describing Formulas (30-1) to (30- (q-1)) -1), Formula (30-w-2), ..., Formula (30-w- (g-2)), Formula (30-w- (g-1)), w = y-1 and The g parity check polynomials at the time are calculated by the equations (31-1) to (31-g).

  In the formulas (31-1) to (31-g), the formulas (31-w) and (31-w ′) are equivalent formulas, and are hereinafter described as the formula (31-w) May be replaced with the formula (31-w ′) (w = 1, 2,..., G).

Then, as described above (LDPC-CC having good characteristics), information X _1, X _2, ..., X _y-1 at time point j is X _{1, j,} X _{2, j,.} · · · X _{y -1, j} , parity P at time j is P _j , u _j = (X _{1, j} , X _{2, j,} ..., X _{y -1, j} , ^P _j ) ^T I assume. At this time, the information X _{1, j,} X _{2, j,} ..., X _{y -1, j of} the time point _j and the parity P _j are
"When j mod g = 0, the parity check polynomial of equation (31-1) is satisfied."
“When j mod g = 1, the parity check polynomial of equation (31-2) is satisfied.”
“When j mod g = 2, the parity check polynomial of equation (31-3) is satisfied.”
・
・
・
“When j mod g = k, the parity check polynomial of equation (31− (k + 1)) is satisfied.”
・
・
・
“When j mod g = g−1, the parity check polynomial of equation (31-g) is satisfied.”
At this time, the relationship between the parity check polynomial and the parity check matrix is the same as that described above (LDPC-CC having good characteristics).

Next, the equation (30-w-0) representing the g parity check polynomials described when describing the equations (30-1) to (30- (q-1)), the equation (30-w) -1), Formula (30-w-2), ..., Formula (30-w- (g-2)), Formula (30-w- (g-1)), w = z-1 Formula (32-1)-Formula (32-g) express g parity check polynomial when it carries out. (It can be expressed as Expression (32-1) to Expression (32-g) from the relationship of y <z ≦ q.)

  In the formulas (32-1) to (32-g), the formula (32-w) and the formula (32-w ') are equivalent formulas, and are hereinafter described as the formula (32-w) May be replaced with the formula (32-w ′) (w = 1, 2,..., G).

Then, as described above (LDPC-CC having good characteristics), the information X _1, X _2, ..., X _{y -1,} ..., X _s ,. _Denote X _z-1 as X _{1, j,} X _{2, j,} ..., X _{y-1, j,} ..., X _{s, j,} ..., X _{z-1, j} , at time j Parity P in P is denoted by Pj, u _j = (X _{1, j} , X _{2, j,} ..., X _{y-1, j,} ..., X _{s, j,} ..., X _{z-1 , J} , Pj) Let ^T (therefore, s = y, y + 1, y + 2, y + 3,..., Z-3, z-2, z-1 from the relationship of y <z ≦ q). At this time, information _X 1 point _{j, j, X 2, j} , ···, X y-1, j, ···, X s, j, ···, X z-1, j and parity P _j is
"When j mod g = 0, the parity check polynomial of equation (32-1) is satisfied."
“When j mod g = 1, the parity check polynomial of equation (32-2) is satisfied.”
“When j mod g = 2, the parity check polynomial of equation (32-3) is satisfied.”
・
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・
"When j mod g = k, the parity check polynomial of equation (32-(k + 1)) is satisfied."
・
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・
“When j mod g = g−1, the parity check polynomial of equation (32-g) is satisfied.” At this time, the relationship between the parity check polynomial and the check matrix is as described above (LDPC-CC having good characteristics) It is the same as the case described above.

  In the case where the above relationship is established, LDPC-CC with a time-variant period g at coding rate (y-1) / y and LDPC-CC with a time-variant period g at coding rate (z-1) / z If the following conditions hold, an LDPC-CC encoder with a time-varying cycle g at a coding rate (y-1) / y and a time-varying cycle g at a coding rate (z-1) / z The LDPC-CC encoder can share the circuit, and an LDPC-CC decoder with a time-variant period g at a coding rate (y−1) / y, and a coding rate (z− The LDPC-CC decoder with time varying period g in 1) / z can share the circuit. The conditions are as follows.

First, the following relationship is established between the equation (31-1) and the equation (32-1).
"What is an _{A X1,0} (D) of the formula (31-1) _{A X1,0} of (D) and formula (32-1), the equal sign is established."
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・
・
“The same sign is established between A _{xf, 0} (D) of formula (31-1) and A _{xf, 0} (D) of formula (32-1).”
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・
・
"The same sign holds for A _{Xy -1,0} (D) of Formula (31-1) and A _{Xy -1,0} (D) of Formula (32-1)."
That is, the above relationship is established at f = 1, 2, 3, ..., y-1.

Also, the following relationship is established for parity.
“The same sign is established between B ₀ (D) in equation (31-1) and B ₀ (D) in equation (32-1).”

Similarly, the following relationship is established between the equation (31-2) and the equation (32-2).
"What is an _{A X1,1} (D) of the formula (31-2) _{A X1,1} of (D) and formula (32-2), the equal sign is established."
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“The same sign is established between A _{xf, 1} (D) of formula (31-2) and A _{xf, 1} (D) of formula (32-2).”
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"Equation (31-2) of _{A Xy-1, 1} (D) and _{A Xy-1, 1} (D) of the formula (32-2), the equality is satisfied."
That is, the above relationship is established at f = 1, 2, 3, ..., y-1.

Also, the following relationship is established for parity.
“The same sign is established between B ₁ (D) of formula (31-2) and B ₁ (D) of formula (32-2).”

(Abbreviated)

Similarly, the following relationship is established between the equation (31-h) and the equation (32-h).
"The equal sign is established between A _{X1, h-1} (D) of formula (31-h) and A _{X1, h-1} (D) of formula (32-h)"
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・
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"The same sign is established between A _{xf, h-1} (D) of formula (31-h) and A _{xf, h-1} (D) of formula (32-h)"
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・
・
“The same sign holds for A _{Xy−1, h−1} (D) of Formula (31-h) and A _{Xy−1, h−1} (D) of Formula (32-h)”
That is, the above relationship is established at f = 1, 2, 3, ..., y-1.

Also, the following relationship is established for parity.
"The equal sign is established between B _h-1 (D) of formula (31-h) and B _h-1 (D) of formula (32-h)"

(Abbreviated)

Similarly, the following relationship is established between the equation (31-g) and the equation (32-g).
"The equal sign is established between A _{X1, g-1} (D) of formula (31-g) and A _{X1, g-1} (D) of formula (32-g)"
・
・
・
"The same sign is established between A _{xf, g-1} (D) of formula (31-g) and A _{xf, g-1} (D) of formula (32-g)."
・
・
・
“The same sign holds for A _{Xy−1, g−1} (D) of Formula (31-g) and A _{Xy−1, g−1} (D) of Formula (32-g).”
That is, the above relationship is established at f = 1, 2, 3, ..., y-1.

Also, the following relationship is established for parity.
"The same sign holds for B _g-1 (D) of formula (31-g) and B _g-1 (D) of formula (32-g)."
(Thus, h = 1, 2, 3, ..., g-2, g-1, g.)

  When the above relationship is established, the LDPC-CC encoder of the time varying cycle g at the coding rate (y−1) / y and the time varying cycle g at the coding rate (z−1) / z The LDPC-CC encoder can share the circuit, and the LDPC-CC decoder and coding rate (z-1 at time-varying cycle g at coding rate (y-1) / y) The LDPC-CC decoder with a time-varying period g in /) can share the circuit. However, the method of sharing the circuit of the encoder and the method of sharing the circuit of the decoder will be described in detail in the following (Configuration of encoder and decoder).

Table 5 shows an example of a parity check polynomial of an LDPC-CC with a time-variant period of 3 and a corresponding coding rate of 1/2, 2/3, 3/4, 5/6, which satisfies the above conditions. However, the format of the parity check polynomial is expressed in the same format as the format of Table 3. Thereby, when the transmitting device and the receiving device correspond to the coding rates of 1/2, 2/3, 3/4 and 5/6, (or coding of two or more of the four coding rates is performed. When the transmission rate and the reception rate correspond to each other, it is possible to share the circuit of the encoder and share the circuit of the decoder while reducing the operation scale (circuit size) (distributed codes). (Circuit size can be reduced) and the receiving apparatus can obtain high data reception quality.

  It will be described that the LDPC-CC with time-variant cycle 3 in Table 5 satisfies the above conditions. For example, consider an LDPC-CC with time varying period 3 at coding rate 1/2 in Table 5 and an LDPC-CC with time varying period 3 at coding rate 2/3 in Table 5. That is, y = 2 in (31-1) to (31-g), and z = 3 in (32-1) to (32-g).

Then, according to LDPC-CC of time variation period 3 at coding rate 1/2 in Table 5, A _X1,0 (D) in equation (31-1) becomes D ³⁷³ + D ⁵⁶ +1, and the coding rate in Table 5 From LDPC-CC of time-varying period 3 in 2/3, A _X1,0 (D) in equation (32-1) becomes D ³⁷³ + D ⁵⁶ +1, “A _X1,0 (D in equation (31-1) And A _X1,0 (D) in the equation (32-1), an equal sign is established. "

Further, from LDPC-CC of time variation period 3 at coding rate 1/2 in Table 5, B ₀ (D) in equation (31-1) becomes D ⁴⁰⁶ + D ²¹⁸ +1, and coding rate 2/7 in Table 5 From LDPC-CC of time varying period 3 at time 3, the B ₀ (D) = D ⁴⁰⁶ + D ²¹⁸ +1 of the equation (32-1) is obtained, and “B ₀ (D of the equation (31-1) An equal sign is established with B ₀ (D) of 1). "

Similarly, according to LDPC-CC of time varying period 3 at coding rate 1/2 in Table 5, A _X1,1 (D) = D ⁴⁵⁷ + D ¹⁹⁷ +1 in equation (31-2), and coding in Table 5 From LDPC-CC with a time-variant period of 3 at a rate of 2/3, A _X1,1 (D) = D ⁴⁵⁷ + D ¹⁹⁷ +1 of Formula (32-2), “A _X1,1 (D of Formula (31-2) And A _X1,1 (D) in the equation (32-2), an equal sign is established. "

Further, from LDPC-CC of time-variant period 3 at coding rate 1/2 in Table 5, B ₁ (D) in equation (31-2) becomes D ⁴⁹¹ + D ²² +1, and coding rate 2/7 in Table 5 From LDPC-CC of time-varying period 3 in 3, it becomes B ₁ (D) = D ⁴⁹¹ + D ²² +1 in equation (32-2), “B ₁ (D in equation (31-2) and equation (32-) An equal sign is established with B ₁ (D) of 2). "

Similarly, from LDPC-CC of time-varying period 3 at coding rate 1/2 in Table 5, A _X1,2 (D) in equation (31-3) becomes D ⁴⁸⁵ + D ⁷⁰ +1, and coding in Table 5 From the LDPC-CC of the time varying period 3 at a rate of 2/3, A _X1,2 (D) = D ⁴⁸⁵ + D ⁷⁰ +1 in the equation (32-3), “A _X1,2 (in the equation (31-3) An equality sign is established between D) and A _X1,2 (D) in the equation (32-3). "

Further, from LDPC-CC of time-variant period 3 at coding rate 1/2 in Table 5, B ₂ (D) in equation (31-3) becomes D ²³⁶ + D ¹⁸¹ +1, and coding rate 2/7 in Table 5 From the LDPC-CC of the time varying period 3 in 3, the B ₂ (D) in the equation (32-3) becomes D ²³⁶ + D ¹⁸¹ +1, and “the B ₂ (D in the equation (31-3) and the equation (32—) An equal sign is established with B ₂ (D) in 3). "

  As can be seen from the above, LDPC-CC with time-varying cycle 3 at coding rate 1/2 in Table 5 and LDPC-CC with time-varying cycle 3 at coding rate 2/3 in Table 5 satisfy the above conditions. It can be confirmed that

  In the same manner as described above, in the LDPC-CC of time-variant cycle 3 in Table 5, time-variant cycle 3 of two different code rates among the code rates 1/2, 2/3, 3/4, and 5/6. If an LDPC-CC is selected and it is verified that the above conditions are satisfied, it can be confirmed that the above conditions are satisfied in any selection pattern.

  In addition, since LDPC-CC is a kind of convolutional code, termination and tail biting are required to ensure reliability in decoding of information bits. Here, it is assumed that the method of setting the state of data (information) X to zero (hereinafter referred to as “Information-zero-termination”) is performed.

  FIG. 10 shows a method of “Information-zero-termination”. As shown in FIG. 10, the information bit (final transmission bit) to be transmitted last in the information sequence to be transmitted is Xn (110). If the transmitting device decodes data only when the transmitting device transmits data only up to the parity bit generated by the encoder along with the final information bit Xn (110), the reception quality of the information is greatly degraded. . In order to solve this problem, encoding is performed on the assumption that the information bit (called “virtual information bit”) after the final information bit Xn (110) is “0”, and a parity bit (130) is generated. Do.

  At this time, since the receiving apparatus knows that the virtual information bit (120) is "0", the transmitting apparatus does not transmit the virtual information bit (120) and is generated by the virtual information bit (120). Only the parity bit (130) is transmitted (this parity bit becomes a redundant bit that must be transmitted. Therefore, this parity bit is called a redundant bit). Then, as a new problem, in order to simultaneously improve the data transmission efficiency and secure the data reception quality, the parity bit (120) generated by the virtual information bit (120) is secured while securing the data reception quality. 130) needs to be as small as possible.

  At this time, in order to reduce the number of parity bits generated by virtual information bits as much as possible while securing the reception quality of data, it is important that the terms related to the parity of the parity check polynomial play an important role. It was confirmed by simulation.

ただし、ｉ＝０、１、・・・、ｍ−１とする。また、Ａ_Ｘ１，ｉ（Ｄ）に存在するＤの次数は０以上の整数しか存在せず（例えば、Ａ_Ｘ１，１（Ｄ）＝Ｄ^１５＋Ｄ^３＋Ｄ^０のように、Ｄについて存在する次数は１５、３、０のように、全てが０以上の次数で構成される）、Ｂ_ｉ（Ｄ）に存在するＤの次数も０以上の次数しか存在しないものとする（例えば、Ｂ_ｉ（Ｄ）＝Ｄ^１８＋Ｄ^４＋Ｄ^０のように、Ｄについて存在する次数は１８、４、０のように、全てが０以上の次数で構成される）。 As an example, an LDPC-CC with a time variation period m (m is an integer and m ≧ 2) and a coding rate of 1/2 will be described as an example. The m parity check polynomials that are required when the time varying period is m is expressed by the following equation.

However, it is assumed that i = 0, 1, ..., m-1. Also, the order of D present in A _{X1, i} (D) is only an integer greater than or equal to 0 (for example, the order existing for D such as A _X1,1 (D) = D ¹⁵ + D ³ + D ⁰ Let Z be 1, 3, 0, and all be composed of orders of 0 or more, and the order of D present in B _i (D) is also assumed to have only orders of 0 or more (eg, B _i ( As D) = D ¹⁸ + D ⁴ + D ⁰ , the orders present for D are all composed of orders of 0 or more, such as ^{18, 4} , 0).

At this time, at time j, the parity check polynomial of the following equation is established.

And, in X ₁ (D), _assuming that the highest order of D in A _X1,1 (D) is α ₁ (for example, A _X1,1 (D) = D ¹⁵ + D ³ + D ⁰ , the order 15 for D There is an order 3 and an order 0, and the highest order of D ₁ is α ₁ = 15), and the highest order of D in A _X1,2 (D) is α ₂ , ..., A _{X1, i} (D The highest order of D in ( ₁ ) is α _i ,..., And the highest order of D in (D) is α _m-1 . Then, the _{α i (i = 0,1,2, ···} , m-1) largest value and alpha.

On the other hand, in P (D), the highest order of D in B ₁ (D) is β ₁ , and the highest order of D in B ₂ (D) is β ₂ ,..., D of B _i (D) the highest degree β _i, ···, the highest order of D in _{B m-1} (D) and beta _m-1. Then, in the _{β i (i = 0,1,2, ···} , m-1) largest value and beta.

  Then, in order to reduce the number of parity bits generated by virtual information bits as much as possible while securing the reception quality of data, it is preferable to set β to 1/2 or less of α.

  Here, the case of the coding rate 1/2 has been described, but the case of a coding rate higher than that can also be considered similarly. At this time, in particular, in the case of a coding rate of 4/5 or more, necessary redundancy to satisfy the condition that the number of parity bits generated by virtual information bits is reduced as much as possible while securing the reception quality of data. The bit tends to be very large, and the condition considered in the same way as above is to reduce the number of parity bits generated by virtual information bits as much as possible while securing the reception quality of data. It becomes important.

ただし、ｉ＝０、１、・・・、ｍ−１とする。また、Ａ_Ｘ１，ｉ（Ｄ）に存在するＤの次数は０以上の整数しか存在せず（例えば、Ａ_Ｘ１，１（Ｄ）＝Ｄ^１５＋Ｄ^３＋Ｄ^０のように、Ｄについて存在する次数は１５、３、０のように、全てが０以上の次数で構成される）、同様に、Ａ_Ｘ２，ｉ（Ｄ）に存在するＤの次数は０以上の整数しか存在せず、Ａ_Ｘ３，ｉ（Ｄ）に存在するＤの次数は０以上の整数しか存在せず、Ａ_Ｘ４，ｉ（Ｄ）に存在するＤの次数は０以上の整数しか存在せず、Ｂ_ｉ（Ｄ）に存在するＤの次数も０以上の次数しか存在しないものとする（例えば、Ｂ_ｉ（Ｄ）＝Ｄ^１８＋Ｄ^４＋Ｄ^０のように、Ｄについて存在する次数は１８、４、０のように、全てが０以上の次数で構成される）。 As an example, an LDPC-CC with a time variation period m (m is an integer and m ≧ 2) and a coding rate of 4/5 will be described as an example. The m parity check polynomials that are required when the time varying period is m is expressed by the following equation.

However, it is assumed that i = 0, 1, ..., m-1. Also, the order of D present in A _{X1, i} (D) is only an integer greater than or equal to 0 (for example, the order existing for D such as A _X1,1 (D) = D ¹⁵ + D ³ + D ⁰ Is composed of all orders of 0 or more, such as 15, 3, 0), and similarly, the order of D present in A _{X2, i} (D) is only an integer of 0 or more, A _{X3 , I} (D) has only an integer greater than or equal to 0, and the order of D present in A _{X4, i} (D) has only an integer greater than or equal to 0, and B _i (D) has It is assumed that there is only an order of zero or more of the order of D (eg, B _i (D) = D ¹⁸ + D ⁴ + D ⁰ , and the order of existence for D is ^{18, 4, 0} , etc.) All consist of orders of 0 or more).

At this time, at time j, the parity check polynomial of the following equation is established.

And, in X ₁ (D), _assuming that the highest order of D in A _X1,1 (D) is α _1,1 (for example, A _X1,1 (D) = D ¹⁵ + D ³ + D ⁰ , the order of D is 15, the order 3 and the order 0 exist, and the highest order of D _1,1 = _1.15 ), the highest order of D in A _{X 1,2} (D) is α _1,2 , ..., The highest order of D in A _{X1, i} (D) is α _{1, i} ..., And the highest order of D in A _{X 1, m-1} (D) is α _{1, m-1} . Then, alpha _1, in _{i (i = 0,1,2, ···,} m-1) largest value and alpha _1.

_Assuming that in X ₂ (D), the highest order of D in A X _{2, 1} (D) is α _{2, 1} (eg, A _{X 2, 1} (D) = D ¹⁵ + D ³ + D ⁰ , the order 15 for D There is an order 3 and an order 0, and the highest order of D ₂ is α _2,1 = 15.), the highest order of D in A _X2,2 (D) is α _2,2 ..., A _{X2 , I} (D), the highest order of D in α _{2, i} ,..., A _{X2, m−1} (D) is α _{2, m−1} . Then, alpha _2, the _{i (i = 0,1,2, ···,} m-1) largest value and alpha _2.

In X ₃ (D), _assuming that the highest order of D in A _{X3, 1} (D) is α _{3, 1} (eg, A _{X 3, 1} (D) = D ¹⁵ + D ³ + D ⁰ , the order 15 for D degree 3, there is order 0, the highest order alpha _{3, 1} = 15 in _D.), the highest order of D in _{a X3,2 (D) α 3,2,} ···, a X3 _{, I} (D), the highest order of D in α _{3, i 2} ,..., A _{X 3, m−1} (D) is α _{3, m−1} . Then, alpha _3, in _{i (i = 0,1,2, ···,} m-1) and the largest value alpha _3.

In X ₄ (D), _assuming that the highest order of D in A _{X4, 1} (D) is α _{4, 1} (eg, A _{X 4, 1} (D) = D ¹⁵ + D ³ + D ⁰ , the order 15 for D degree 3, there is order 0, the highest order alpha _{4, 1} = 15 in _D.), the highest order of D in _{a X4,2 (D) α 4,2,} ···, a X4 _{, I} (D), the highest order of D in α _{4, i 1} ,..., A _{X 4, m−1} (D) is α _{4, m−1} . Then, alpha _4, in _{i (i = 0,1,2, ···,} m-1) and the largest value alpha _4.

In P (D), the highest order of D in B ₁ (D) is β ₁ , the highest order of D in B ₂ (D) is β ₂ ,..., The highest in D in B _i (D) The highest order of D in the order of β _i ,..., B _m-1 (D) is taken as β _{m -1} . Then, in the _{β i (i = 0,1,2, ···} , m-1) largest value and beta.

Then, in order to reduce the number of parity bits generated by virtual information bits as much as possible while securing the reception quality of data,
"Beta is alpha ₁ 1/2 or less, and, beta is alpha ₂ 1/2 or less, and, beta is alpha ₃ of 1/2 or less, and, beta is less half the alpha _4"
In particular, there is a high possibility of ensuring good data reception quality.

Also,
"Beta is alpha ₁ 1/2 or less, or, beta is alpha ₂ 1/2 or less, or, beta is alpha ₃ of 1/2 or less, or, beta is less half the alpha _4"
However, while it is possible to reduce the number of parity bits generated by virtual information bits as much as possible while securing the reception quality of data, there may be a slight deterioration in the reception quality of data (however, However, it does not necessarily lead to deterioration of the reception quality of data.)

  Therefore, in the case of LDPC-CC when the time variation period m (m is an integer and m ≧ 2) and the coding rate is (n−1) / n, the following can be considered.

ただし、ｉ＝０、１、・・・、ｍ−１とする。また、Ａ_Ｘ１，ｉ（Ｄ）に存在するＤの次数は０以上の整数しか存在せず（例えば、Ａ_Ｘ１，１（Ｄ）＝Ｄ^１５＋Ｄ^３＋Ｄ^０のように、Ｄについて存在する次数は１５、３、０のように、全てが０以上の次数で構成される）、同様に、Ａ_Ｘ２，ｉ（Ｄ）に存在するＤの次数は０以上の整数しか存在せず、Ａ_Ｘ３，ｉ（Ｄ）に存在するＤの次数は０以上の整数しか存在せず、Ａ_Ｘ４，ｉ（Ｄ）に存在するＤの次数は０以上の整数しか存在せず、・・・、Ａ_Ｘｕ，ｉ（Ｄ）に存在するＤの次数は０以上の整数しか存在せず、・・・、Ａ_{Ｘｎ−１，ｉ}（Ｄ）に存在するＤの次数は０以上の整数しか存在せず、Ｂ_ｉ（Ｄ）に存在するＤの次数も０以上の次数しか存在しないものとする（例えば、Ｂ_ｉ（Ｄ）＝Ｄ^１８＋Ｄ^４＋Ｄ^０のように、Ｄについて存在する次数は１８、４、０のように、全てが０以上の次数で構成される）（ｕ＝１、２、３、・・・、ｎ−２、ｎ−１）。 The m parity check polynomials that are required when the time varying period is m is expressed by the following equation.

However, it is assumed that i = 0, 1, ..., m-1. Also, the order of D present in A _{X1, i} (D) is only an integer greater than or equal to 0 (for example, the order existing for D such as A _X1,1 (D) = D ¹⁵ + D ³ + D ⁰ Is composed of all orders of 0 or more, such as 15, 3, 0), and similarly, the order of D present in A _{X2, i} (D) is only an integer of 0 or more, A _{X3 , I} (D) has only an integer greater than or equal to 0, and the order of D present in A _{X4, i} (D) has only an integer greater than or equal to 0, ..., A _{Xu , I} (D) has only an integer greater than or equal to 0,..., A _{Xn−1, i} (D) has an order of D greater than or equal to 0, It is assumed that the order of D present in B _i (D) is also an order of 0 or more (eg, B _i (D) = D ¹⁸ + D ⁴ + D ⁰ Thus, the orders existing for D are all composed of orders of 0 or more, such as 18, 4, 0. (u = 1, 2, 3,..., N-2, n-1) .

  At this time, at time j, the parity check polynomial of the following equation is established.

And, in X ₁ (D), _assuming that the highest order of D in A _X1,1 (D) is α _1,1 (for example, A _X1,1 (D) = D ¹⁵ + D ³ + D ⁰ , the order of D is 15, the order 3 and the order 0 exist, and the highest order of D _1,1 = _1.15 ), the highest order of D in A _{X 1,2} (D) is α _1,2 , ..., The highest order of D in A _{X1, i} (D) is α _{1, i} ..., And the highest order of D in A _{X 1, m-1} (D) is α _{1, m-1} . Then, alpha _1, in _{i (i = 0,1,2, ···,} m-1) largest value and alpha _1.

_Assuming that in X ₂ (D), the highest order of D in A X _{2, 1} (D) is α _{2, 1} (eg, A _{X 2, 1} (D) = D ¹⁵ + D ³ + D ⁰ , the order 15 for D There is an order 3 and an order 0, and the highest order of D ₂ is α _2,1 = 15.), the highest order of D in A _X2,2 (D) is α _2,2 ..., A _{X2 , I} (D), the highest order of D in α _{2, i} ,..., A _{X2, m−1} (D) is α _{2, m−1} . Then, alpha _2, the _{i (i = 0,1,2, ···,} m-1) largest value and alpha _2.
・
・
・

In X _u (D), _{assuming that} the highest order of D in A X _{u , 1} (D) is α _{u, 1} (eg, A X _{u , 1} (D) = D ¹⁵ + D ³ + D ⁰ , the order 15 for D) There is an order 3 and an order 0, and the highest order of D is α _{u, 1} = 15.), the highest order of D in A _{Xu, 2} (D) is α _{u, 2} , ..., A _{Xu , I} (D) is denoted by α _{u, i} ,..., A _{X u , m−1} (D) is denoted by α _{u, m−1} . Then, the largest value of (i = 0, 1, 2,..., M-1) in α _{u, i} is set as α _u . (U = 1, 2, 3, ..., n-2, n-1)
・
・
・

In _{X n-1 (D),} A Xn-1,1 highest order of D in (D) α _{n-1,1 ^{(e.g., A Xn-1,1 (D)}} = D 15 + D 3 + D 0 Then, there is an order 15, an order 3, and an order 0 for D, and the highest order of D is α _{n -1,1} = 15.), the highest order of D in A _{X n -1,2} (D) The highest order of D in α _{n -1,2} , ..., A _{X n -1, i} (D) is α _{n -1, i} , ..., A _{X n -1, m -1} (D) The highest order of D in is denoted by α _{n -1, m-1} . Then, the largest value of (i = 0, 1, 2,..., M-1) in α _{n−1, i} is set as α _n−1 .

In P (D), the highest order of D in B ₁ (D) is β ₁ , the highest order of D in B ₂ (D) is β ₂ ,..., The highest in D in B _i (D) The highest order of D in the order of β _i ,..., B _m-1 (D) is taken as β _{m -1} . Then, in the _{β i (i = 0,1,2, ···} , m-1) largest value and beta.

Then, in order to reduce the number of parity bits generated by virtual information bits as much as possible while securing the reception quality of data,
“Β is 1⁄2 or less of α ₁ , and β is 1⁄2 or less of α ₂ ,..., And β is 1⁄2 or less of α _u , and. Is 1/2 or less of α _n-1 (u = 1, 2, 3,..., N-2, n-1) "
In particular, there is a high possibility that the reception quality of good data can be secured.

Also,
[Beta] is 1/2 or less of [alpha] ₁ , or [beta] is 1/2 or less of [alpha] ₂ , or [beta] is 1/2 or less of [alpha] _u or [beta] or [beta] Is 1/2 or less of α _n-1 (u = 1, 2, 3,..., N-2, n-1) "
However, while it is possible to reduce the number of parity bits generated by virtual information bits as much as possible while securing the reception quality of data, there may be a slight deterioration in the reception quality of data (however, However, it does not necessarily lead to deterioration of the reception quality of data.)

  Table 6 shows the LDPC-CC with a time-varying period of 3 and coding rates of 1/2, 2/3, 3/4, and 4/5, which can reduce redundant bits while ensuring data reception quality. An example of a parity check polynomial is shown. In LDPC-CC of time-variant cycle 3 in Table 6, LDPC-CC of time-variant cycle 3 of two different coding rates among code rates 1/2, 2/3, 3/4, and 4/5. When selected, it is verified whether it satisfies the conditions that can share the already described encoder and decoder, and in any selected pattern, it is the same as the LDPC-CC with time-varying cycle 3 in Table 5. In addition, it can be confirmed that the encoder and the decoder can satisfy the condition that can be made common.

  It should be noted that at coding rate 5/6 in Table 5, 1000 or more redundant bits are required, but when coding rate 4/5 in Table 6, it can be confirmed that redundant bits are 500 bits or less. ing.

Further, in the code of Table 6, different numbers of redundant bits (redundant bits added for “Information-zero-termination”) are obtained for each coding rate. At this time, the number of redundant bits tends to increase as the coding rate increases. However, it does not necessarily mean that it will be that tendency. In addition, when the coding rate is large and the information size (information size) is large, the number of redundant bits tends to be large. That is, when codes are prepared as shown in Tables 5 and 6, there are codes of coding rate (n-1) / n and codes of coding rate (m-1) / m (n> m) The number of redundant bits (redundant bits added for “Information-zero-termination”) required for the code of coding rate (n−1) / n is the rate of coding rate (m−1) / m It tends to be larger than the number of redundant bits required for the code (redundant bits added for “Information-zero-termination”), and the redundancy required for the code rate (n−1) / n code When the information size is small, the number of bits tends to be larger than the number of redundant bits required for a code rate (m-1) / m code. However, this is not necessarily the case.

  As described above, the maximum coding rate is (q-1) / q among the coding rates for sharing the circuit of the encoder and sharing the circuit of the decoder, and the coding rate (r− 1) A parity check polynomial of an LDPC-CC having a time varying period g of / r (r = 2, 3,..., Q (q is a natural number of 3 or more)) has been described (g is an integer of 2 or more).

  Here, an LDPC-CC with a time-varying cycle g of at least a coding rate (y-1) / y and an LDPC-CC with a time-varying cycle g with a coding rate (z-1) / z are provided. LDPC-CC of a transmitter (y ≠ z), an LDPC-CC of at least a time-varying period g of coding rate (y-1) / y and an LDPC-CC of a time-varying period g of coding rate A receiver including a decoder, a method of generating a parity check polynomial of an LDPC-CC with a time-varying cycle g capable of reducing the operation scale (circuit scale), and the features of the parity check polynomial have been described.

  Here, the transmitting apparatus is a modulated signal for transmitting an LDPC-CC coded sequence of at least a time-varying period g of a coding rate (y-1) / y, or a coding rate (z-1) / This is a transmitter capable of generating a modulated signal of any one of modulated signals for transmitting an LDPC-CC coded sequence of time varying period g of z.

  Also, the receiving apparatus may receive at least a received signal including an LDPC-CC coded sequence of a time-varying period g with a coding rate (y−1) / y, or at a coding rate (z−1) / z. It is a receiver which demodulates and decodes any received signal of the received signal containing the coding sequence of the LDPC-CC of variable period g.

  By using the LDPC-CC with the time varying period g proposed in the present invention, it is possible to reduce the operation scale (circuit size) of the transmitting device having the encoder and the receiving device having the decoder ( It is possible to share the circuit).

  Furthermore, by using the LDPC-CC with the time varying period g proposed in the present invention, there is an effect that the receiving apparatus can obtain high data reception quality at any coding rate. The configuration of the encoder, the configuration of the decoder, and the operation thereof will be described in detail below.

  Further, in the equations (30-1) to (30- (q-1)), in the case of the coding rate 1/2, 2/3, 3/4,..., (Q-1) / q Although the LDPC-CC having the time varying period g has been described, a transmitter including an encoder and a receiver including a decoder may be configured to have coding rates of 1/2, 2/3, 3/4,. · · It is not necessary to support all of (q-1) / q, and if at least two or more different coding rates are supported, reduction of the arithmetic scale (circuit scale) of the transmitter and the receiver (code It is possible to obtain the effect that the compositor, the circuit of the decoder can be made common, and the receiving device can obtain high data reception quality.

  In addition, if all the coding rates supported by the transmission / reception device (coder / decoder) are codes based on the method described in this embodiment, the highest coding among the supported coding rates By having the rate encoder / decoder, it is possible to easily cope with the encoding and decoding of all the encoding rates, and at this time, the effect of reducing the operation scale is very large.

  Further, although the present embodiment has been described based on the code of (LDPC-CC having good characteristics) described in the first embodiment, the explanation is not necessarily made on the above (LDPC-CC having good characteristics). It is not necessary to satisfy the above conditions, and in the case of an LDPC-CC with a time varying period g based on a parity check polynomial of the type described in (LDPC-CC having good characteristics) described above, the present embodiment is similarly implemented. Can be (g is an integer of 2 or more). This is clear from the relationship between (31-1) to (31-g) and (32-1) to (32-g).

  Naturally, for example, the transmitter / receiver (coder / decoder) corresponds to the coding rate 1/2, 2/3, 3/4, 5/6, the coding rate 1/2, If 2/3 and 3/4 use LDPC-CC based on the above rule, and the coding rate 5/6 uses a code not based on the above rule, the encoder / decoder Is possible to share circuits for coding rates 1/2, 2/3, and 3/4, and it is difficult to share circuits for coding rates 5/6.

Third Embodiment
In this embodiment, a method of sharing the circuit of the encoder of the LDPC-CC formed using the search method described in the second embodiment and a method of sharing the circuit of the decoder will be described in detail.

  First, let (q-1) / q be the highest coding rate of the coding rates for sharing circuits of the encoder and sharing circuits of the decoder according to the present invention (for example, Assuming that the transmitting / receiving apparatus sets the corresponding coding rates to 1/2, 2/3, 3/4, 5/6, the codes of the coding rates 1/2, 2/3, 3/4 are the encoder / It is assumed that the circuit is shared in the decoder, and that the code rate 5/6 does not make the circuit common in the encoder / decoder, where the highest code rate (q- 1) / q is 3/4), LDPC with a time-varying cycle g (g is a natural number) that can cope with multiple coding rates (r-1) / r (r is an integer of 2 or more and q or less) An encoder for creating a CC is described.

  FIG. 11 is a block diagram showing an example of the main configuration of the encoder according to the present embodiment. The encoder 200 illustrated in FIG. 11 is an encoder capable of coping with coding rates of 1/2, 2/3, and 3/4. The encoder 200 of FIG. 11 includes an information generation unit 210, a first information calculation unit 220-1, a second information calculation unit 220-2, a third information calculation unit 220-3, a parity calculation unit 230, and an addition unit 240. The coding rate setting unit 250 and the weight control unit 260 are mainly provided.

The information generation unit 210 sets the information X _{1, i} of the time point _i , the information X _{2, i} , and the information X _{3, i} according to the coding rate designated by the coding rate setting unit 250. For example, when the coding rate setting unit 250 sets the coding rate to 1/2, the information generation unit 210 sets the input information data S _j in the information X _{1, i} at the point i, and the information X at the point i 0 is set to the information X _{3, i} of _{2, i} and the time point i.

Further, in the case of the coding rate 2/3, the information generation unit 210 sets the input information data S _j to the information X _{1, i} at the time point _i and the input information data S _{j + 1} to the information X _{2, i} at the time point i. The setting is made, and 0 is set to the information X _{3, i} of the point i.

Further, in the case of the coding rate 3/4, the information generation unit 210 sets the input information data S _j to the information X _{1, i} at the time point _i and the input information data S _{j + 1} to the information X _{2, i} at the time point i. The input information data S _{j + 2} is set to the information X _{3, i} at the point i.

Thus, according to the coding rate set by the coding rate setting unit 250, the information generation unit 210 receives input information data as information X _{1, i} at time _i , information X _{2, i} , information X _{3 , I} , and outputs the information X _{1, i} after the setting to the first information calculation unit 220-1, and outputs the information X _{2, i} after the setting to the second information calculation unit 220-2. And outputs the information X _{3, i} after setting to the third information calculation unit 220-3.

The first information operation unit 220-1 calculates X ₁ (D) according to A _{X1, k} (D) in the equation (30-1). Similarly, the second information operation unit 220-2 calculates X ₂ (D) according to A _{X2, k} (D) of Expression (30-2). Similarly, the third information calculation unit 220-3 calculates X ₃ (D) according to A _{X3, k} (D) of Expression (30-3).

  At this time, as described in the second embodiment, assuming that the coding rate is switched from the condition satisfied in (31-1) to (31-g) and (32-1) to (32-g). Also, there is no need to change the configuration of the first information calculation unit 220-1, and similarly, there is no need to change the configuration of the second information calculation unit 220-2, and the third information calculation unit 220 There is no need to change the configuration of 3.

  Therefore, when dealing with a plurality of coding rates, based on the configuration of the coder with the highest coding rate among the code rates that can be shared by the encoder circuits, the above operation , Other coding rates can be accommodated. That is, the first information operation unit 220-1, the second information operation unit 220-2, and the third information operation unit 220-3, which are the main parts of the encoder, are made common regardless of the coding rate. LDPC-CC described in the second embodiment has the advantage of being able to And, for example, the LDPC-CC shown in Table 5 has an advantage of providing good data reception quality regardless of the coding rate.

  FIG. 12 shows an internal configuration of the first information calculation unit 220-1. The first information operation unit 220-1 in FIG. 12 includes shift registers 221-1 to 221-M, weight multipliers 222-0 to 222-M, and an addition unit 223.

The shift registers 221-1 to 221 -M are registers that respectively hold X _{1, it} (t = 0,..., M−1), and are held at the timing when the next input comes in. Send the current value to the shift register on the right and hold the value output from the shift register on the left.

The weight multipliers 222-0 to 222 -M switch the value of h ₁ ^(m) to 0 or 1 in accordance with the control signal output from the weight control unit 260.

The adder 223 performs an exclusive OR operation on the outputs of the weight multipliers 222-0 to 222-M, calculates an operation result Y _{1, i,} and calculates Y _{1, i} as shown in FIG. The signal is output to the adding unit 240.

The internal configurations of the second information calculating unit 220-2 and the third information calculating unit 220-3 are the same as those of the first information calculating unit 220-1, and thus the description thereof is omitted. The second information calculation unit 220-2 calculates the calculation result Y _{2, i} in the same manner as the first information calculation unit 220-1, and outputs the calculated Y _{2, i} to the addition unit 240. The third information calculation unit 220-3 calculates the calculation result Y _{3, i} in the same manner as the first information calculation unit 220-1, and directs the calculated Y _{3, i} to the addition unit 240 of FIG. Output.

The parity operation unit 230 in FIG. 11 calculates P (D) according to B _k (D) in Expressions (30-1) to (30-3).

  FIG. 13 shows an internal configuration of the parity calculation unit 230 of FIG. The parity operation unit 230 of FIG. 13 includes shift registers 231-1 to 231 -M, weight multipliers 232-0 to 232 -M, and an addition unit 233.

The shift registers 231-1 to 231 -M are registers that respectively hold P _{i -t} (t = 0,..., M-1), and are held at the timing when the next input is received. Sends the value to the shift register next to the right, and holds the value output from the shift register next to the left.

The weight multipliers 232-0 to 232 -M switch the value of h ₂ ^(m) to 0 or 1 in accordance with the control signal output from the weight control unit 260.

The addition unit 233 performs an exclusive OR operation on the outputs of the weight multipliers 232-0 to 232 -M to calculate an operation result Z _i, and directs the calculated Z _i to the addition unit 240 in FIG. 11. Output.

Referring back to FIG. 11 again, the adding unit 240 performs calculations output from the first information calculating unit 220-1, the second information calculating unit 220-2, the third information calculating unit 220-3, and the parity calculating unit 230. results _{Y 1, i, Y 2,,} Y 3, i, performs an XOR operation of _{Z i,} to obtain a parity _{P i} at time i, and outputs. The adder 240 also outputs the parity P _i at time i to the parity calculator 230.

  The coding rate setting unit 250 sets the coding rate of the encoder 200, and outputs information on the coding rate to the information generation unit 210.

The weight control unit 260 sets one of the equations (30-1) to (30-3) based on the parity check matrix corresponding to the equations (30-1) to (30-3) held in the weight control unit 260. The value of h ₁ ^(m) at time i based on the parity check polynomial is directed to the first information operation unit 220-1, the second information operation unit 220-2, the third information operation unit 220-3, and the parity operation unit 230. Output. Also, based on parity check matrices corresponding to equations (30-1) to (30-3) held in weight control unit 260, weight control unit 260 sets the value of h ₂ ^(m) at that timing to 232 Output toward -0 to 232-M.

  FIG. 14 shows another configuration example of the encoder according to the present embodiment. In the encoder of FIG. 14, the same components as in the encoder of FIG. 11 are assigned the same reference numerals as in FIG. In the encoder 200 of FIG. 14, the coding rate setting unit 250 has information on coding rates as a first information computing unit 220-1, a second information computing unit 220-2, a third information computing unit 220-3, The present embodiment differs from the encoder 200 of FIG. 11 in that the data is output to the parity calculator 230.

When the coding rate is 1/2, the second information operation unit 220-2 outputs 0 as the operation result Y2 _{, i} to the addition unit 240 without performing the operation process. When the coding rate is 1/2 or 2/3, the third information calculation unit 220-3 does not perform calculation processing, and directs 0 as the calculation result Y _{3, i} to the addition unit 240. Output.

In the encoder 200 of FIG. 11, the information generation unit 210 sets the information X _{2, i} and the information X _{3, i} at time point _i to 0 according to the coding rate, while FIG. In the encoder 200, the second information arithmetic unit 220-2 and the third information arithmetic unit 220-3 stop the arithmetic processing according to the coding rate, and calculate the arithmetic results as Y2 _{, i} , Y3 _{, i.} Since 0 is output, the operation result obtained is the same as that of the encoder 200 of FIG.

  Thus, in the encoder 200 of FIG. 14, the second information operation unit 220-2 and the third information operation unit 220-3 stop the operation processing according to the coding rate, so the code of FIG. The arithmetic processing can be reduced compared to the transform unit 200.

  Next, the method of sharing the circuit of the LDPC-CC decoder described in Embodiment 2 will be described in detail.

  FIG. 15 is a block diagram showing the main configuration of a decoder according to this embodiment. Note that the decoder 300 shown in FIG. 15 is a decoder that can handle coding rates of 1/2, 2/3, and 3/4. The decoder 300 in FIG. 14 mainly includes a log likelihood ratio setting unit 310 and a matrix processing operation unit 320.

  Log likelihood ratio setting unit 310 receives the reception log likelihood ratio and coding rate calculated by the log likelihood ratio calculation unit (not shown), and the reception log likelihood ratio is known according to the coding rate. Insert log likelihood ratio.

For example, when the coding rate is 1/2, the encoder 200 corresponds to transmitting "0" as X2 _{, i} and X3 _{, i.} Therefore, the log likelihood ratio setting unit 310 , A fixed log likelihood ratio corresponding to a known bit "0" is inserted as a log likelihood ratio of X2 _{, i} , X3 _{, i} , and the log likelihood ratio after insertion is directed to the matrix processing operation unit 320. Output. Hereinafter, description will be made with reference to FIG.

As shown in FIG. 16, in the case of coding rate 1/2, log likelihood ratio setting section 310 receives reception log likelihood ratios LLR _{X1, i} , LLR _Pi corresponding to X _{1, i} and P _i as inputs. Do. Therefore, log likelihood ratio setting section _{310, X} 2, _{i, X 3,} reception log likelihood ratios _LLR corresponding to _i X2, i, inserts the _{LLR 3, i.} 16, the received log-likelihood ratio which is surrounded by a dotted circle indicates log likelihood ratio setting section 310 receives the log-likelihood ratio _LLR X2 inserted by, i, the _{LLR 3, i.} The log likelihood ratio setting unit 310 inserts a log likelihood ratio of a fixed value as the reception log likelihood ratio LLR _{X2, i} , LLR3 _{, i} .

When the coding rate is 2/3, the encoder 200 corresponds to transmitting “0” as X _{3, i.} Therefore, the log likelihood ratio setting unit 310 determines that the known bit “0” is transmitted. A fixed log likelihood ratio corresponding to “ _{3. i”} is inserted as a log likelihood ratio of X _{3, i} , and the log likelihood ratio after insertion is output to the matrix processing operation unit 320. Hereinafter, the description will be made with reference to FIG.

As shown in FIG. 17, when the coding rate 2/3, log likelihood ratio setting section _{310, X 1, i, X 2} , i and _{P i} corresponding to the received log-likelihood ratio _{LLR X1,} i, LLR _{X2, i} and LLR _Pi are input. Therefore, the log likelihood ratio setting unit 310 inserts the reception log likelihood ratio LLR _{3, i} corresponding to X _{3, i} . In FIG. 17, the reception log likelihood ratio surrounded by a dotted circle indicates the reception log likelihood ratio LLR _{3, i} inserted by the log likelihood ratio setting unit 310. The log likelihood ratio setting unit 310 inserts a fixed value log likelihood ratio as the reception log likelihood ratio LLR _{3, i} .

  The matrix processing operation unit 320 in FIG. 15 includes a storage unit 321, a row processing operation unit 322, and a column processing operation unit 323.

The storage unit 321 holds the reception log likelihood ratio, the external value α _mn obtained by the row process, and the prior value β _mn obtained by the column process.

The row processing operation unit 322 holds the weight pattern in the row direction of the parity check matrix H of the LDPC-CC with the maximum coding rate 3/4 among the coding rates supported by the encoder 200. The row processing operation unit 322 reads a necessary advance value β _mn from the storage unit 321 according to the weight pattern in the row direction, and performs a row processing operation.

In row processing computation, row processing computation section 322, using a priori value beta _mn, it performs decoding of a single parity check codes, obtains external value alpha _mn.

ここで、Φ（ｘ）は、Ｇａｌｌａｇｅｒのｆ関数と呼ばれ、次式で定義される。

The m-th line process will be described. However, let it be assumed that a binary MxN matrix H = {H _mn } is a parity check matrix of an LDPC code to be decoded. For all pairs (m, n) satisfying H _mn = 1, the external value α _mn is updated using the following update equation.

Here, Φ (x) is called Gallager's f-function and is defined by the following equation.

The column processing operation unit 323 holds the weight pattern in the column direction of the parity check matrix H of the LDPC-CC with the maximum coding rate 3/4 among the coding rates supported by the encoder 200. The column processing operation unit 323 reads the necessary external value α _mn from the storage unit 321 according to the weight pattern in the column direction, and obtains the prior value β _mn .

In the column processing operation, the column processing operation unit 323 obtains the prior value β _mn by iterative decoding using the input log likelihood ratio λ _n and the external value α _mn .

The m-th column process will be described.
For all pairs (m, n) satisfying H _mn = 1, update β _mn using the following update equation. However, calculation is performed as α _mn = 0 only in the case of q = 1.

  The decoder 300 obtains the a posteriori log likelihood ratio by repeating the above-described row processing and column processing a predetermined number of times.

As described above, in the present embodiment, among the applicable coding rates, the highest coding rate is (q-1) / q, and the coding rate setting unit 250 sets the coding rate (s When 1) / s is set, the information generation unit 210 sets the information from the information Xs _{, i} to the information _{Xq-1, i} to zero. For example, in the case where the corresponding coding rate is 1/2, 2/3, 3/4 (q = 4), the first information operation unit 220-1 inputs the information X1 _{, i} at the time point i, and Calculate the X ₁ (D) term of (30-1). Further, the second information calculation unit 220-2 receives the information X _{2, i} at the point i and calculates the X ₂ (D) term of the equation (30-2). In addition, the third information calculation unit 220-3 inputs the information X _{3, i} at the point i and calculates the X ₃ (D) term of the equation (30-3). The parity calculator 230 also receives the parity P _i-1 at time i−1, and calculates the P (D) terms of the equations (30-1) to (30-3). Further, the adding unit 240 performs an exclusive OR operation of the calculation result of the first information calculating unit 220-1, the second information calculating unit 220-2, the third information calculating unit 220-3, and the calculation result of the parity calculating unit 230. , As the parity P _{i of} time i.

  According to this configuration, even in the case of creating LDPC-CCs corresponding to different coding rates, the configuration of the information calculation unit in the present description can be made common, so a plurality of coding rates can be obtained with a low calculation scale. It is possible to provide an LDPC-CC encoder and decoder that can support.

In addition, A _{X1, k} (D) to A _{Xq-1, k} (D) satisfy <Condition # 1> to <Condition # 6> and the like described in the above-mentioned “LDPC-CC having good characteristics”. In such a case, it is possible to provide an encoder and decoder capable of coping with different coding rates with a low computational scale, and allow the receiver to obtain good reception quality of data. . However, as described in the second embodiment, the method of generating LDPC-CC is not limited to the above-mentioned “LDPC-CC having good characteristics”.

Then, in the decoder 300 of FIG. 15, the configuration of the decoder corresponding to the maximum coding rate among the coding rates enabling sharing of the circuit of the decoder, the log likelihood ratio setting unit By adding 310, decoding can be performed corresponding to a plurality of coding rates. Note that the log likelihood ratio setting unit 310 calculates the log likelihood corresponding to (q−2) pieces of information from the information X _{r, i} at the point _i to the information X _{q−1, i} according to the coding rate. Set the ratio to the default value.

In the above description, the case has been described where the maximum coding rate supported by the encoder 200 is 3/4, but the maximum supported coding rate is not limited to this, and the coding rate (q-1 The present invention is also applicable to the case of supporting / q (q is an integer of 5 or more) (as a matter of course, the maximum coding rate may be 2/3). In this case, the encoder 200 is configured to include the first to (q-1) information operation units, and the adding unit 240 is the operation result and parity of the first to (q-1) information operation units. The exclusive OR of the calculation result of the calculation unit 230 may be obtained as the parity P _{i at} time i.

  In addition, when all the coding rates supported by the transmission / reception apparatus (coder / decoder) are codes based on the method described in the second embodiment, among the supported coding rates, By having an encoder / decoder with a high coding rate, it is possible to cope with coding and decoding of a plurality of coding rates, and at this time, the effect of reducing the operation scale is very large.

  In the above, sum-product decoding has been described as an example of the decoding scheme, but the decoding method is not limited to this, and is disclosed in Non-Patent Documents 5 to 7, for example, min The same method can be implemented using a decoding method (BP decoding) using a message-passing algorithm such as -sum decoding, Normalized BP (Belief Propagation) decoding, Shuffled BP decoding, and Offset BP decoding.

  Next, an embodiment in which the present invention is applied to a communication apparatus that adaptively switches the coding rate according to the communication situation will be described. Although the case where the present invention is applied to a wireless communication device will be described below as an example, the present invention is not limited to this, and a power line communication (PLC) device, a visible light communication device, or an optical communication device is described. Is also applicable.

  FIG. 18 shows the configuration of communication apparatus 400 that adaptively switches the coding rate. The coding rate determination unit 410 of the communication apparatus 400 of FIG. 18 receives a reception signal (for example, feedback information transmitted by the communication partner) transmitted from the communication apparatus of the communication partner, and performs reception processing and the like on the reception signal. Then, the coding rate determination unit 410 may communicate information on the communication status with the communication apparatus of the communication partner, such as information on bit error rate, packet error rate, frame error rate, received electric field strength, etc. (for example, feedback information And determine the coding rate and modulation scheme from the information on the communication status with the communication apparatus of the communication partner. Then, the coding rate determination unit 410 outputs the determined coding rate and modulation scheme to the encoder 200 and the modulation unit 420 as a control signal.

  For example, the coding rate determination unit 410 uses the transmission format as shown in FIG. 19 to include the information of the coding rate in the control information symbol, so that the coding rate used by the encoder 200 becomes the communication of the communication partner. Notify the device. However, although not shown in FIG. 19, it is assumed that the other party of communication includes, for example, known signals (preamble, pilot symbols, reference symbols, etc.) necessary for demodulation and channel estimation.

  In this manner, the coding rate determination unit 410 receives the modulated signal transmitted by the communication apparatus 500 at the other end of communication, and determines the coding rate of the modulated signal to be transmitted based on the communication status. Adaptively switch the conversion rate. The encoder 200 performs LDPC-CC encoding in the above-described procedure based on the coding rate designated by the control signal. Modulating section 420 modulates the encoded sequence using the modulation scheme specified by the control signal.

  FIG. 20 shows a configuration example of a communication apparatus of a communication counterpart who communicates with the communication apparatus 400. The control information generation unit 530 of the communication device 500 of FIG. 20 extracts control information from the control information symbol included in the baseband signal. The control information symbol includes coding rate information. The control information generator 530 outputs the extracted information of the coding rate to the log likelihood ratio generator 520 and the decoder 300 as a control signal.

  The receiving unit 510 performs processing such as frequency conversion and quadrature demodulation on the received signal corresponding to the modulation signal transmitted from the communication device 400 to obtain a baseband signal, and transmits the baseband signal to the log likelihood ratio generation unit 520. Directly output. In addition, receiving section 510 estimates channel fluctuation in a (for example, wireless) transmission path between communication apparatus 400 and communication apparatus 500 using a known signal included in the baseband signal, and estimates the channel estimation signal. The signal is output to the log likelihood ratio generation unit 520.

  Also, the receiving unit 510 estimates channel fluctuation in a (for example, wireless) transmission path between the communication device 400 and the communication device 500 using a known signal included in the baseband signal, and determines the state of the propagation path. To generate and output feedback information (channel fluctuation itself, for example, Channel State Information is an example). This feedback information is transmitted to the communication partner (the communication device 400) as a part of control information through a transmission device (not shown). Log likelihood ratio generation section 520 obtains the log likelihood ratio of each transmission sequence using the baseband signal, and outputs the obtained log likelihood ratio to decoder 300.

As described above, the decoder 300 copes with the information from the information Xs _{, i} at the point _i to the information Xs _{-1, i} according to the coding rate (s-1) / s indicated by the control signal. Set the log likelihood ratio to be set to the default value and perform BP decoding using the LDPC-CC parity check matrix according to the maximum coding rate among the coding rates for which circuit sharing has been performed in the decoder .

  In this manner, the coding rates of the communication apparatus 400 to which the present invention is applied and the communication apparatus 500 of the other party of communication can be adaptively changed according to the communication situation.

  The method of changing the coding rate is not limited to this, and the communication apparatus 500 which is the other party of communication may be provided with the coding rate determination unit 410 to specify a desired coding rate. Also, the communication apparatus 400 may estimate the fluctuation of the transmission path from the modulated signal transmitted by the communication apparatus 500 to determine the coding rate. In this case, the above feedback information is not necessary.

Embodiment 4
In the first embodiment, the LDPC-CC having a high error correction capability has been described. In the present embodiment, an LDPC-CC with a time-variant cycle 3 with high error correction capability will be supplementarily described. In the case of LDPC-CC with time-variant period 3, generating a regular LDPC code can create a code with high error correction capability.

  The parity check polynomial of the LDPC-CC with time varying period 3 is shown again.

For code rate 1/2:

In the case of the coding rate (n-1) / n:

  Here, in order to make the parity check matrix be full rank and to easily obtain parity bits one by one, the following conditions are satisfied.

b3 = 0, that is, D ^b3 = 1
B3 = 0, that is, D ^B3 = 1
β3 = 0, that is, D ^β3 = 1

Also, in order to make the relationship between information and parity easy to understand, the following conditions should be satisfied.
ai, 3 = 0, that is, D ^{ai, 3} = 1 (i = 1, 2, ..., n-1)
Ai, 3 = 0, that is, D ^{Ai, 3} = 1 (i = 1, 2, ..., n-1)
αi, 3 = 0, that is, D ^{αi, 3} = 1 (i = 1, 2, ..., n-1)
However, ai, 3% 3 = 0, Ai, 3% 3 = 0, and αi, 3% 3 = 0 may be satisfied.

  At this time, the following conditions must be satisfied in order to generate a regular LDPC code with high error correction capability by reducing the number of loops 6 in the Tanner graph.

That is, when focusing on the coefficients of the information Xk (k = 1, 2,..., N−1), one of # Xk1 to # Xk14 must be satisfied.
# Xk1: (ak, 1% 3, ak, 2% 3) = [0, 1], (Ak, 1% 3, Ak, 2% 3) = [0, 1], (αk, 1% 3, α k, 2% 3) = [0, 1]
#X k2: (ak, 1% 3, ak, 2% 3) = [0, 1], (Ak, 1% 3, Ak, 2% 3) = [0, 2], (α k, 1% 3, α k, 2% 3) = [1, 2]
# X k 3: (ak, 1% 3, ak, 2% 3) = [0, 1], (Ak, 1% 3, Ak, 2% 3) = [1, 2], (αk, 1% 3, α k, 2% 3) = [1, 1]
# X k 4: (ak, 1% 3, ak, 2% 3) = [0, 2], (Ak, 1% 3, Ak, 2% 3) = [1, 2], (αk, 1% 3, α k, 2% 3) = [0, 1]
# Xk5: (ak, 1% 3, ak, 2% 3) = [0, 2], (Ak, 1% 3, Ak, 2% 3) = [0, 2], (αk, 1% 3, α k, 2% 3) = [0, 2]
# X k 6: (ak, 1% 3, ak, 2% 3) = [0, 2], (Ak, 1% 3, Ak, 2% 3) = [2, 2], (αk, 1% 3, α k, 2% 3) = [1, 2]
# X k 7: (ak, 1% 3, ak, 2% 3) = [1, 1], (Ak, 1% 3, Ak, 2% 3) = [0, 1], (α k, 1% 3, α k, 2% 3) = [1, 2]
# X k 8: (ak, 1% 3, ak, 2% 3) = [1, 1], (Ak, 1% 3, Ak, 2% 3) = [1, 1], (α k, 1% 3, α k, 2% 3) = [1, 1]
# X k 9: (ak, 1% 3, ak, 2% 3) = [1, 2], (Ak, 1% 3, Ak, 2% 3) = [0, 1], (α k, 1% 3, α k, 2% 3) = [0, 2]
# Xk10: (ak, 1% 3, ak, 2% 3) = [1, 2], (Ak, 1% 3, Ak, 2% 3) = [0, 2], (αk, 1% 3, α k, 2% 3) = [2, 2]
# X k 11: (ak, 1% 3, ak, 2% 3) = [1, 2], (Ak, 1% 3, Ak, 2% 3) = [1, 1], (αk, 1% 3, α k, 2% 3) = [0, 1]
# X k 12: (ak, 1% 3, ak, 2% 3) = [1, 2], (Ak, 1% 3, Ak, 2% 3) = [1, 2], (α k, 1% 3, α k, 2% 3) = [1, 2]
# X k 13: (ak, 1% 3, ak, 2% 3) = [2, 2], (Ak, 1% 3, Ak, 2% 3) = [1, 2], (α k, 1% 3, α k, 2% 3) = [0, 2]
# X k 14: (ak, 1% 3, ak, 2% 3) = [2, 2], (Ak, 1% 3, Ak, 2% 3) = [2, 2], (α k, 1% 3, α k, 2% 3) = [2, 2]

  In the above, in the case of a = b, (x, y) = [a, b] represents x = y = a (= b), and in the case of a) b, (x, y) = [a , b] represents x = a, y = b, or x = b, y = a, and so on.

Similarly, when focusing on the parity coefficient, one of # P1 to # P14 must be satisfied.
# P1: (b1% 3, b2% 3) = [0,1], (B1% 3, B2% 3) = [0,1], (β1% 3, β2% 3) = [0,1]
# P2: (b1% 3, b2% 3) = [0,1], (B1% 3, B2% 3) = [0,2], (β1% 3, β2% 3) = [1,2]
# P3: (b1% 3, b2% 3) = [0,1], (B1% 3, B2% 3) = [1,2], (β1% 3, β2% 3) = [1,1]
# P4: (b1% 3, b2% 3) = [0, 2], (B1% 3, B2% 3) = [1, 2], (β1% 3, β2% 3) = [0, 1]
# P5: (b1% 3, b2% 3) = [0, 2], (B1% 3, B2% 3) = [0, 2], (β1% 3, β2% 3) = [0, 2]
# P6: (b1% 3, b2% 3) = [0, 2], (B1% 3, B2% 3) = [2, 2], (β1% 3, β2% 3) = [1, 2]
# P7: (b1% 3, b2% 3) = [1,1], (B1% 3, B2% 3) = [0,1], (β1% 3, β2% 3) = [1,2]
# P8: (b1% 3, b2% 3) = [1,1], (B1% 3, B2% 3) = [1,1], (β1% 3, β2% 3) = [1,1]
# P9: (b1% 3, b2% 3) = [1,2], (B1% 3, B2% 3) = [0,1], (β1% 3, β2% 3) = [0,2]
# P10: (b1% 3, b2% 3) = [1, 2], (B1% 3, B2% 3) = [0, 2], (β1% 3, β2% 3) = [2, 2]
# P11: (b1% 3, b2% 3) = [1,2], (B1% 3, B2% 3) = [1,1], (β1% 3, β2% 3) = [0,1]
# P12: (b1% 3, b2% 3) = [1,2], (B1% 3, B2% 3) = [1,2], (β1% 3, β2% 3) = [1,2]
# P13: (b1% 3, b2% 3) = [2, 2], (B1% 3, B2% 3) = [1, 2], (β1% 3, β2% 3) = [0, 2]
# P14: (b1% 3, b2% 3) = [2, 2], (B1% 3, B2% 3) = [2, 2], (β1% 3, β2% 3) = [2, 2]

  Among the above conditions, the LDPC-CC having good characteristics described in the first embodiment is an LDPC-CC satisfying the conditions of # Xk12 and # P12. Further, when used in combination with the second embodiment, when dealing with a plurality of coding rates, the circuit scale of the encoder and decoder can be reduced, and high error correction capability can be obtained.

  An example of a parity check polynomial of an LDPC-CC with a time varying period of 3 that satisfies the conditions of any of # Xk1 to # Xk14 and any of # P1 to # P14 is shown below.

Code rate R = 1/2:

Code rate R = 2/3:

Code rate R = 3/4:

Code rate R = 4/5:

  In addition, since the parity check polynomial of the above-mentioned LDPC-CC satisfies the conditions described in the second embodiment, sharing of the circuit of the encoder and sharing of the decoder can be achieved.

  By the way, when the parity check polynomials of the LDPC-CC shown in the equations (44-i), (45-i), (46-i) and (47-i) are used (i = 1, 2, 3) It is confirmed that the number of terminations required varies depending on the number of bits of data (information) X (hereinafter referred to as “information size”) as shown in FIG. Here, the termination number is the number of parity bits generated by the virtual known information bit “0” by performing the above-mentioned Information-zero-termination, and is the number of redundant bits actually transmitted. In FIG. 21, Real R (effective coding rate) indicates a coding rate when a termination sequence composed of redundant bits is considered.

  Another example of the parity check polynomial of the LDPC-CC of the time-varying cycle 3 satisfying the condition of any of # Xk1 to # Xk14 and any of # P1 to # P14 will be shown below.

Code rate R = 1/2:

Code rate R = 2/3:

Code rate R = 3/4:

Code rate R = 4/5:

  FIG. 22 shows the case where the parity check polynomial of the LDPC-CC shown in the equation (48-i), the equation (49-i), the equation (50-i) and the equation (51-i) is used (i = 1, 2, 3) An example of the number of terminations required will be shown.

なお、ｋ＝Ｉ_ｓ％（ｎ−１）である。 FIG. 23 shows information (i = 1, 2, 3) at each coding rate shown in Equation (48-i), Equation (49-i), Equation (50-i), and Equation (51-i). The relationship between the size I _s and the termination number m _t is shown. When the number of virtual known information bits (“0”) inserted to create a termination sequence is m _z , in the case of a coding rate (n−1) / n, between m _t and m _z The following relationship is established.

Here, k = I _s % (n−1).

Fifth Embodiment
In this embodiment, when using LDPC-CC having good characteristics as described in the fourth embodiment, a communication apparatus which can avoid degradation of the transmission efficiency of information without degrading the error correction capability. And the communication method will be described.

  From FIGS. 21 and 22, it was confirmed that the number of terminations required at the time of Information-zero-termination differs depending on the information size. Therefore, in order to fix the termination number uniformly regardless of the information size and not to deteriorate the error correction capability, it is necessary to set the termination number to a large number, and Real R (effective coding rate) decreases. The transmission efficiency of information may be reduced.

  Therefore, in the present embodiment, a communication apparatus and communication method will be described in which the number of terminations transmitted as redundant bits is changed according to the information size. As a result, it is possible to prevent the degradation of the information transmission efficiency without degrading the error correction capability.

  FIG. 24 is a block diagram showing the main configuration of communication apparatus 600 according to the present embodiment.

  The coding rate setting unit 610 receives a control information signal including information on the coding rate set by the device itself or a feedback signal transmitted from the communication device of the communication partner. When the control information signal is input, the coding rate setting unit 610 sets the coding rate from the information of the coding rate included in the control information signal.

  Also, when a feedback signal is input, the coding rate setting unit 610 includes information on the communication status with the communication apparatus of the communication partner included in the feedback signal, for example, a bit error rate, a packet error rate, and a frame. Information capable of estimating communication quality such as error rate and received electric field strength is acquired, and a coding rate is set from information of communication status with the communication apparatus of the communication partner. The coding rate setting unit 610 includes information of the set coding rate in the set coding rate signal, and directs the set coding rate signal to the termination sequence length determination unit 631 and the parity calculation unit 632 in the coding unit 630. Output. Also, the coding rate setting unit 610 outputs information of the set coding rate to the transmission information generation and information length detection unit 620.

  The transmission information generation and information length detection unit 620 generates or acquires transmission data (information), and outputs an information sequence composed of the transmission data (information) to the parity calculation unit 632. In addition, transmission information generation and information length detection unit 620 detects the sequence length of transmission data (information) (hereinafter referred to as “information length”), that is, the information size, and includes the detected information size information in the information length signal. The information length signal is output to the termination sequence length determination unit 631. Transmission information generation and information length detection unit 620 is formed of known information bits (for example, “0”) necessary to generate redundant bits for the termination sequence length notified from termination sequence length determination unit 631. Known information sequence is added to the end of the information sequence.

  The termination sequence length determination unit 631 determines the termination sequence length (number of terminations) according to the information size indicated by the information length signal and the coding rate indicated by the set coding rate signal. A specific method of determining the termination sequence length will be described later. The termination sequence length determination unit 631 includes the determined termination sequence length in the termination sequence length signal, and outputs the termination sequence length signal to the transmission information generation and information length detection unit 620 and the parity calculation unit 632.

  The parity calculator 632 calculates the parity for the information sequence and the known information sequence, and outputs the obtained parity to the modulator 640.

  The modulation unit 640 performs modulation processing on the information sequence and the parity (including the termination sequence).

  In FIG. 24, “Information Length (Information Length) Signal” is described, but it is not limited to this, and any signal may be used as long as it is information serving as an index for controlling termination sequence length. May be For example, the frame length of the transmission signal is obtained from the information of the sum of the number of information excluding termination and the number of parity (Length information), and the information number and modulation scheme information, and the frame length can be used instead of the information length signal. Good.

  Next, a method of determining the termination sequence length in termination sequence length determination section 631 will be described using FIG. FIG. 25 shows an example in which the termination sequence length is switched to two steps based on the information size and each coding rate. In FIG. 25, it is assumed that the minimum size of the information size is set to 512 bits in the communication apparatus 600. However, the minimum size may not necessarily be determined.

  In FIG. 25, α is the information length of transmission data (information) to be transmitted. For example, when the coding rate is 1/2, the termination sequence length determination unit 631 sets the termination sequence length to 380 bits in 512 ≦ α ≦ 1023, and the termination sequence length determination unit 631 in 1024 ≦ α. Set termination sequence length to 340 bits. In this way, the termination sequence length does not degrade the error correction capability by setting the termination sequence length based on the information length α of the transmission data (information) in this manner. It becomes set to the sequence length which can prevent the fall of the transmission efficiency of information.

  In the above, the case where the termination sequence length is switched to two steps at each coding rate has been described as an example, but it is not limited thereto. For example, three or more steps as shown in FIG. The termination sequence length may be switched in In this manner, by switching the termination sequence length (number of terminations) to a plurality of steps based on the information length (information size), the termination sequence length does not deteriorate the error correction capability, and the information transmission efficiency decreases. Can be set to a suitable sequence length that can prevent.

  Communication apparatus 600 uses, for example, a transmission format as shown in FIG. 27 to include the coding rate information in the symbol related to the coding rate, thereby making the coding rate used by coding unit 630 the communication apparatus of the communication partner. Notify Further, the communication apparatus 600 notifies information on the information length (information size) to the communication apparatus of the communication counterpart by including information on the information length (information size) in the symbol related to the information size. Further, communication apparatus 600 includes a modulation method, a transmission method, or information for identifying the other party of communication in a control information symbol, and notifies the communication apparatus of the other party of communication. Further, communication apparatus 600 includes an information sequence and parity in data symbols and notifies the communication apparatus of the communication partner.

  FIG. 28 shows a configuration example of the communication apparatus 700 of the communication partner that communicates with the communication apparatus 600. In the communication apparatus 700 of FIG. 28, the same components as in FIG. 20 will be assigned the same reference numerals as in FIG. 20 and the description will be omitted. The communication device 700 in FIG. 28 includes a control information generation unit 710 and a decoder 720 instead of the control information generation unit 530 and the decoder 300 in the communication device 500 in FIG.

  Control information generation section 710 extracts coding rate information from symbols related to the coding rate obtained by demodulating (and decoding) the baseband signal. Also, the control information generation unit 710 extracts information of information length (information size) from a symbol related to the information size obtained by demodulating (and decoding) the baseband signal. Also, the control information generation unit 710 extracts, from the control information symbol, information for identifying a modulation scheme, a transmission method, or a communication counterpart. The control information generator 710 outputs a control signal including the extracted information of the coding rate and the information length (information size) to the log likelihood ratio generator 520 and the decoder 720.

  The decoder 720 holds a table of the relationship between the information size and the termination sequence length at each coding rate as shown in FIG. 25 or 26, and this table, information of the coding rate, and The termination sequence length included in the data symbol is determined from the information length (information size). The decoder 720 performs BP decoding based on the coding rate and the determined termination sequence length. Thus, communication apparatus 700 can perform decoding with high error correction capability.

  FIGS. 29 and 30 are diagrams showing an example of the flow of information between the communication device 600 and the communication device 700. FIG. 29 and FIG. 30 differ in which of the communication device 600 and the communication device 700 sets the coding rate. Specifically, FIG. 29 shows the flow of information when the communication apparatus 600 determines the coding rate, and FIG. 30 shows the flow of information when the communication apparatus 700 determines the coding rate. .

  As described above, in the present embodiment, termination sequence length determination section 631 sets the sequence length of the termination sequence to be added and transmitted at the end of the information sequence according to the information length (information size) and the coding rate. The parity operation unit 632 performs LDPC-CC coding on the information sequence and the known information sequence required to generate the termination sequence for the determined termination sequence length, and calculates the parity sequence. I made it. As a result, it is possible to prevent the degradation of the information transmission efficiency without degrading the error correction capability.

Sixth Embodiment
The fifth embodiment has described the case where the termination sequence length to be added to the end of the information sequence is determined (changed) according to the information length (information size) and the coding rate. As a result, it is possible to prevent the degradation of the information transmission efficiency without degrading the error correction capability.

  In the present embodiment, as in the fifth embodiment, in the case of changing the termination sequence length according to the information length (information size), a case will be described where a restriction is placed on the coding rate that can be used. Thereby, the deterioration of the error correction capability can be avoided.

  31 uses the parity check polynomials of the LDPC-CC shown in the equations (44-i), (45-i), (46-i) and (47-i) as in FIG. The relationship between the number of terminations required for (i = 1, 2, 3) and the coding rate is shown. As understood from FIG. 31, when the information size is 512 bits, 1024 bits, and 2048 bits, the effective encoding rate (Real R) of the encoding rate 3/4 and the effective encoding rate of the encoding rate 4/5 are obtained. In comparison, there is no big difference between the two. For example, when the information size is 1024 bits, the effective coding rate is 0.5735 at coding rate 3/4, while the effective coding rate is 0.5626 at coding rate 4/5, and the difference is small. To about 0.01. Further, the effective coding rate of the coding rate 3/4 is larger than the effective coding rate of the coding rate 4/5, and the magnitude of the effective coding rate is reversed. Therefore, depending on the information size, there are cases where even if the coding rate 3/4 is used, high error correction capability can not be obtained and transmission efficiency can not be improved.

  32A, 32B, 32C, and 32D show the bit error rates when the termination sequence of the sequence length shown in FIG. 31 is added to the information sequence of 512 bits, 1024 bits, 2048 bits, and 4096 bits in information size. (Bit Error Rate: BER) / Block Error Rate (BLER) characteristics are shown. 32A, 32B, 32C, and 32D, the horizontal axis represents SNR (Signal-to-Noise power ratio) [dB], the vertical axis represents BER / BLER characteristics, and the solid lines represent bit error rate characteristics, broken lines. Indicates a block error rate characteristic. Also, in FIGS. 32A, 32B, 32C, and 32D, TMN indicates a termination number.

  As can be seen from FIGS. 32A, 32B, 32C, and 32D, when considering the termination sequence, the BER / BLER characteristic of the coding rate R = 3/4 is the coding rate R for any information size. It can be seen that the BER / BLER characteristic is superior to 4/5.

  From these two points, in order to realize both the improvement of the error correction capability and the improvement of the transmission efficiency of information, for example, if the information size is less than 4096 bits, the coding rate R = 4/5 is not supported, that is, When the information size is less than 4096 bits, only the coding rate R = 1/2, 2/3, 3/4 is supported, and when the information size is 4096 bits or more, the coding rate R = 1/2, 2/3 , 3/4 and 4/5, if the information size is less than 4096 bits, a coding rate R = 4/5, which has a transmission efficiency worse than the coding rate R = 3/4, is used. Since this is eliminated, it is possible to achieve both the improvement of the error correction capability and the improvement of the information transmission efficiency.

  Further, FIGS. 32A, 32B, 32C and 32D show that the BER / BLER characteristics with an information size of 512 bits (see FIG. 32A) are significantly superior to the BER / BLER characteristics with other information sizes. . For example, when the information size is 512 bits, the BER characteristics of the coding rate 2/3 have almost the same characteristics as the BER / BLER characteristics of the coding rate 1/2 when the information size is 1024 bits, When the information size is 512 bits, the BER / BLER characteristic up to the coding rate 1/2 may not actually be necessary. The lower the coding rate, the lower the propagation efficiency. Therefore, in consideration of these points, for example, when the information size is 512 bits, it is possible to adopt a method of not supporting the coding rate 1/2. .

  FIG. 33 is a correspondence table between the information size and the support coding rate. As shown in FIG. 33, depending on the information size, there is an unsupported coding rate. Regardless of the information size, if the supported coding rate is constant, communication apparatus 600 and communication apparatus 700 can communicate with each other in either of FIG. 29 and FIG. However, as shown in FIG. 33, in the present embodiment, since the unsupported coding rate exists depending on the information size, it is necessary to adjust the designated coding rate. The communication apparatus according to the present embodiment will be described below.

  FIG. 34 is a block diagram showing the main configuration of communication apparatus 600A in accordance with the present embodiment. In the communication device 600A of FIG. 34, the same components as in FIG. 24 will be assigned the same reference numerals as in FIG. The communication device 600A of FIG. 34 includes an encoder 630A instead of the encoder 630 of FIG. The encoder 630A adopts a configuration in which a coding rate adjustment unit 633 is added to the encoder 630.

  The coding rate adjustment unit 633 performs setting encoding input from the coding rate setting unit 610 based on the information length (information size) included in the information length signal input from the transmission information generation and information length detection unit 620. Adjust the coding rate included in the rate signal. Specifically, the coding rate adjustment unit 633 holds the correspondence table between the information size and the support coding rate as shown in FIG. 33, and sets the coding rate set based on the control information signal or the feedback signal. Adjust the coding rate against the correspondence table. For example, when the information length (information size) is 1024 bits and the set coding rate signal indicates the coding rate 4/5, from the correspondence table, the coding rate 4/5 is not supported, so the coding rate adjustment The section 633 sets 3/4, which has the largest value, of the coding rates smaller than the coding rate 4/5 as the coding rate. As shown in FIG. 31, when the information length (information size) is 1024 bits, Real R for a coding rate of 4/5 is 0.5626, and Real R (0.5735) for a coding rate of 3/4. It becomes smaller, and as shown in FIG. 32B, the BER / BLER characteristic is also better at a coding rate of 3/4. Therefore, when the information length (information size) is 1024, the error correction capability is not deteriorated by using the coding rate 3/4 instead of the coding rate 4/5, and the information Transmission efficiency can be prevented.

  In other words, the first effective coding corresponding to the first coding rate (3/4) when the first coding rate (3/4) <the second coding rate (4/5). If the second coding rate is specified if the rate (0.5735) is approximately the same as the second effective coding rate (0.5626) corresponding to the second coding rate (4/5), the code The coding rate adjustment unit 633 adjusts the coding rate to the first coding rate. As a result, it is possible to prevent the error correction capability from being degraded and to prevent the information transmission efficiency from being lowered.

  Also, for example, when the information length (information size) is 512 bits and the set coding rate signal indicates the coding rate 1/2, from the correspondence table, the coding rate 1/2 is not supported, so the code The coding rate adjustment unit 633 sets 2/3, which is the smallest value, of the coding rates larger than the coding rate 1/2 as the coding rate. As shown in FIG. 32A, the BER / BLER characteristic of the coding rate 1/2 is extremely good, so even if the coding rate is 2/3, the error correction capability is not degraded and the information is transmitted. It is possible to prevent the efficiency from being reduced.

  In other words, when the first coding rate with extremely good BER / BLER characteristics is specified, the coding rate adjusting unit 633 has a coding rate larger than the first coding rate and a predetermined channel quality. The coding rate is adjusted to a second coding rate that can ensure.

  As described above, in the present embodiment, the number of coding rates supported by the communication device 600A is changed based on the information length (information size). For example, in the example shown in FIG. 33, when the information length (information size) is less than 512 bits, the communication device 600A supports only two coding rates, and when the information length (information size) is 512 bits or more and less than 4096 bits. It supports three coding rates, and supports an information length (information size) of 4096 or more with four coding rates. By changing the coding rate to be supported, it is possible to achieve both improvement in error correction capability and improvement in information transmission efficiency.

  As described above, according to the present embodiment, coding rate adjustment section 633 changes the number of coding rates supported by communication device 600A according to the information length (information size), and sets the coding rate. Adjusted to one of the supported coding rates. As a result, it is possible to prevent the error correction capability from being degraded and to prevent the information transmission efficiency from being lowered.

  In addition, the communication apparatus 600A is configured to support a coding rate with a smaller value among coding rates with similar effective coding rates. Also, the communication device 600A does not include the coding rate that supports very good BER / BLER characteristics in the coding rate, and supports only the coding rate that can ensure a predetermined channel quality. As a result, it is possible to avoid a decrease in transmission efficiency while securing a predetermined channel quality.

  As described above, by changing the number of coding rates to be supported according to the information length (information size), it is possible to achieve both improvement in error correction capability and improvement in information transmission efficiency.

  When changing the number of supported coding rates according to the information length (information size), as shown in FIG. 29, the communication device 600A adjusts the coding rate, sets the termination sequence length, and When the information on the coding rate and the information on the information length (information size) (or the information on the termination sequence length) are simultaneously transmitted to the communication apparatus 700 of the communication counterpart, the communication apparatus 700 can correctly decode.

  Naturally, the present embodiment may be used in combination with the fifth embodiment. That is, the number of terminations may be changed according to the coding rate and the information size (Information size).

  On the other hand, as shown in FIG. 30, before the communication apparatus 600A determines the information length (information size), the communication apparatus of the communication partner of the communication apparatus 600 sets the coding rate, or as shown in FIG. As described above, when the communication apparatus 600A sets the coding rate before the communication apparatus 600A determines the information length (information size), the communication apparatus of the communication partner of the communication apparatus 600A is based on the information length (information size). It is necessary to adjust the coding rate. FIG. 36 is a block diagram showing a configuration of communication apparatus 700A in this case.

  In the communication device 700A of FIG. 36, the same components as in FIG. 28 will be assigned the same reference numerals as in FIG. 28 and descriptions thereof will be omitted. Communication apparatus 700A in FIG. 36 adopts a configuration in which a coding rate adjustment unit 730 is added to communication apparatus 700 in FIG.

  In the following, when the information length (information size) is less than 4096 bits, the communication apparatus 600A supports coding rates 1/2, 2/3, 3/4, and when the information length (information size) is 4097 bits, the code The case of supporting the conversion rates 1/2, 2/3, 3/4 and 5/5 will be described.

  At this time, before the information length (information size) is determined, the coding rate of the information sequence to be transmitted is determined to 4/5, and the communication device 600A and the communication device 700A share the information of this coding rate. It shall be. When the information length (information size) is 512 bits, as described above, the coding rate adjustment unit 633 of the communication device 600A adjusts the coding rate to 3/4. If this rule is determined in advance between the communication device 600A and the communication device 700A, the communication device 600A and the communication device 700A can correctly communicate.

  Specifically, as in the case of the coding rate adjustment unit 633, the coding rate adjustment unit 730 receives a control signal including information on the coding rate and information on the information length (information size), and receives the information length (information Adjust the coding rate based on the size). For example, when the information length (information size) is 512 bits and the coding rate is 4/5, the coding rate adjusting unit 730 adjusts the coding rate to 3/4. . As a result, it is possible to prevent the error correction capability from being degraded and to prevent the information transmission efficiency from being lowered.

  As another coding rate adjustment method, a method may be considered in which the number of terminations is made constant regardless of the coding rate. In the example of FIG. 21, when the information length (information size) is 6144 or more, the termination number is uniform as 340 bits. Therefore, when the information length (information size) is 6144 bits or more, the coding rate adjustment unit 633 and the coding rate adjustment unit 730 may make the number of terminations constant regardless of the coding rate. . When the information length (information size) is less than 6144, the coding rate adjustment unit 633 and the coding rate adjustment unit 730 use, for example, another parity check polynomial for which the termination number 340 bits is suitable. It may correspond to the coding rate. Also, completely different codes may be used. For example, a block code may be used.

Seventh Embodiment
In each of the above embodiments, the LDPC-CC has been described in which circuits corresponding to a plurality of coding rates of coding rate 1/2 or more can be shared in the encoder / decoder. Specifically, an LDPC-CC capable of coping with a code and capable of coping with a coding rate (n-1) / n (n = 2, 3, 4, 5) has been described. In the present embodiment, a method for coping with a coding rate 1/3 will be described.

  FIG. 37 is a block diagram showing an example of the configuration of the encoder according to the present embodiment. In the encoder 800 in FIG. 37, the coding rate setting unit 810 outputs the coding rate to the control unit 820, the parity calculation unit 830, and the parity calculation unit 840.

  When coding rate setting unit 810 designates coding rates 1/2, 2/3, 3/4, and 5/5, control unit 820 controls parity operation unit 840 so that information is not input. Further, when the coding rate 1/3 is set, the control unit 820 controls so that the same information as the information input to the parity calculation unit 830 is input to the parity calculation unit 840.

  The parity operation unit 830 is, for example, a code (i = 1, 2, 3) defined by Equation (44-i), Equation (45-i), Equation (46-i), and Equation (47-i), It is an encoder for obtaining parity of the coding rate 1/2, 2/3, 3/4, 5/5.

  Then, when the coding rate setting unit 810 designates the coding rates 1/2, 2/3, 3/4, 5/5, the parity computing unit 830 performs coding based on the corresponding parity check polynomial. , Output parity.

  Then, when the coding rate setting unit 810 designates the coding rate 1/3, the parity computing unit 830 performs the coding rate 1/2 (equation (44-1), equation (44-2), equation (4)). 44-3) performs encoding based on the parity check polynomial of the LDPC-CC of time-variant period 3 defined in 44-3) and outputs a parity P.

  The parity calculation unit 840 is an encoder that calculates parity of a coding rate 1/2. When the coding rate setting unit 810 specifies the coding rates 1/2, 2/3, 3/4, and 5/5, the parity computing unit 840 does not output the parity.

  Then, when the coding rate setting unit 810 designates the coding rate 1/3, the parity computing unit 840 takes the same information as the information input to the parity computing unit 830 as the input, and the coding rate 1/2. It performs coding based on the parity check polynomial of the LDPC-CC with time varying period 3 and outputs parity Pa.

  In this way, since the encoder 800 will output information, parity P and parity Pa, the encoder 800 will be able to support a coding rate of 1/3.

  FIG. 38 is a block diagram showing an example of a configuration of a decoder according to the present embodiment. The decoder 900 of FIG. 38 is a decoder corresponding to the encoder 800 of FIG.

  Control section 910 receives coding rate information indicating the coding rate and the log likelihood ratio as input, and when the coding rate is 1/2, 2/3, 3/4, 5/5, BP decoding section 930 is performed. Control so that the log likelihood ratio is not input. In addition, when the coding rate is 1/3, control unit 910 performs control such that a log likelihood ratio that is the same as the log likelihood ratio input to BP decoding unit 920 is input to BP decoding unit 930.

  The BP decoding unit 920 operates at all coding rates. Specifically, when the coding rate is 1/3, the BP decoding unit 920 performs BP decoding using the parity check polynomial of the coding rate 1/2 used by the parity calculation unit 830. When the coding rate is 1/3, the BP decoding unit 920 outputs, to the BP decoding unit 930, the log likelihood ratio corresponding to each bit obtained by performing the BP decoding. On the other hand, when the coding rate is 1/2, 2/3, 3/4, 5/5, the BP decoding unit 920 uses the coding rates 1/2, 2/3, 3 used in the parity calculation unit 830. BP decoding is performed using a parity check polynomial of / 4, 4/5. The BP decoding unit 920 outputs the obtained log likelihood ratio after performing iterative decoding a predetermined number of times.

  The BP decoding unit 930 operates only when the coding rate is 1/3. Specifically, the BP decoding unit 930 performs BP decoding using the parity check polynomial of the coding rate 1/2 used by the parity operation unit 840 to each bit obtained by performing BP decoding. The corresponding log likelihood ratio is output to the BP decoding unit 920, and after iterative decoding is performed a predetermined number of times, the obtained log likelihood ratio is output.

  In this manner, the decoder 900 performs iterative decoding while exchanging log likelihood ratios, performs decoding such as turbo decoding, and performs decoding at a coding rate of 1/3.

Eighth Embodiment
In the second embodiment, coding for creating an LDPC-CC having a time varying period g (g is a natural number) that can correspond to a plurality of coding rates (r-1) / r (r is an integer of 2 or more and q or less) Explained about the In this embodiment, another LDPC-CC is created that has a time varying period g (g is a natural number) that can correspond to a plurality of coding rates (r-1) / r (r is an integer of 2 or more and q or less). 2 shows an exemplary configuration of an encoder.

  FIG. 39 is a configuration example of the encoder according to the present embodiment. In the encoder of FIG. 39, the same components as in FIG. 37 will be assigned the same reference numerals as in FIG. 37 and the description will be omitted.

  The encoder 800 in FIG. 37 is an encoder in which the parity operation unit 830 obtains parity of the coding rates 1/2, 2/3, 3/4, and 5/5, and the parity operation unit 840 is an encoder. While the encoder 800A of FIG. 39 is a coder that obtains parity of the coding rate 1/2, when both the parity operation unit 830A and the parity operation unit 840A are, for example, the coding rate 2/3. It is characterized in that it performs LDPC-CC coding of variable period 3 and that the parity operation unit 830A and the parity operation unit 840A are codes defined by different parity check polynomials.

  When coding rate setting unit 810 specifies coding rate 2/3, control unit 820A controls parity operation unit 840A so that no information is input. Further, when coding rate 1/2 is set, control unit 820A performs control such that the same information as that input to parity operation unit 830A is input to parity operation unit 840A.

  The parity operation unit 830A is, for example, an encoder that calculates parity of a coding rate 2/3 defined by Equation (45-1), Equation (45-2), and Equation (45-3). Then, when the coding rate setting unit 810 specifies the coding rates 1/2 and 2/3, the parity computing unit 830A outputs the parity P.

  The parity calculation unit 840A is an encoder that calculates parity of a coding rate 2/3 defined by a parity check polynomial different from the parity calculation unit 830A. The parity calculator 840A outputs the parity Pa only when the coding rate setting unit 810 specifies a coding rate of 1/2.

  Thereby, when the coding rate 1/2 is designated, the encoder 800A outputs the parity P and the parity Pa for 2 bits of information, so the encoder 800A performs the coding rate 1/2. It can be realized.

  As a matter of course, in FIG. 39, the coding rates of the parity calculator 830A and the parity calculator 840A are not limited to 2/3, but may be 3/4, 4/5,. The coding rates of the parity calculator 830A and the parity calculator 840A may be the same.

  The embodiments of the present invention have been described above. The invention relating to the LDPC-CC described in the first to fourth embodiments and the invention relating to the relationship between the information size and the termination size described in the fifth and subsequent embodiments can be established independently of each other. .

  Furthermore, the present invention is not limited to the above embodiments, and can be implemented with various modifications. For example, although the above embodiments mainly describe the case where the present invention is realized by the encoder and the decoder, the present invention is not limited to this, and can be applied to the case where the present invention is realized by a power line communication device. is there.

  Moreover, it is also possible to perform this encoding method and the decoding method as software. For example, a program for executing the encoding method and the communication method may be stored in advance in a ROM (Read Only Memory), and the program may be operated by a CPU (Central Processor Unit).

  Further, a program for executing the above encoding method and decoding method is stored in a computer readable storage medium, the program stored in the storage medium is recorded in a RAM (Random Access Memory) of the computer, and the computer is It may be made to operate according to a program.

  Moreover, it goes without saying that the present invention is useful not only in wireless communication but also in power line communication (PLC: Power Line Communication), visible light communication, and optical communication.

  The receiving apparatus and the receiving method according to the present invention can prevent the degradation of the error correction capability and avoid the degradation of the information transmission efficiency even when the termination is performed.

100 LDPC-CC encoder 110 data operation unit 120, 230, 632, 830, 830A, 840, 840A parity operation unit 130, 260 weight control unit 140 mod 2 adder 111-1 to 111-M, 121-1 to 121 -M, 221-1 to 221-M, 231-1 to 231-M Shift register 112-0 to 112-M, 122-0 to 122-M, 222-0 to 222-M, 232-0 to 232- M weight multiplier 200, 630, 630A, 800, 800A Encoder 210 Information generator 220-1 First information calculator 220-2 Second information calculator 220-3 Third information calculator 240 Adder 250, 610 , 810 Code rate setting unit 300, 720, 900 Decoder 310 Log likelihood ratio setting unit 320 Matrix processing operation unit 32 DESCRIPTION OF SYMBOLS 1 Storage part 322 line process calculating part 323 Column process calculating part 400, 500, 600, 600A, 700, 700A Communication apparatus 410 Code rate determination part 420, 640 Modulation part 510 Reception part 520 Log likelihood ratio generation part 530, 710 Control information generation unit 620 Transmission information generation and information length detection unit 631 Termination sequence length determination unit 633, 730 Code rate adjustment unit 820, 820 A, 910 Control unit 920, 930 BP decoding unit

Claims (6)

Coding using a low density parity check convolutional code (LDPC-CC) for an information sequence composed of a plurality of bits and known information added to the information sequence and changing according to the coding rate A power line communication receiving unit for receiving a power line communication signal including a parity bit generated by operation and the information sequence;
A control information generation unit configured to determine the length of the known information according to the coding rate used for the coding operation of the LDPC-CC included in the received power line communication signal;
The likelihood corresponding to the known information is generated according to the length of the known information, and the likelihood of the information sequence and the likelihood of the parity bit are generated from the received power line communication signal A generation unit,
A decoding unit that performs a decoding operation using the likelihood of the information sequence, the likelihood of the parity bit, and the likelihood corresponding to the known information to decode the information sequence;
A receiver using power line communication. The known information is zero information,
A receiver using the power line communication according to claim 1. The length of the known information is of a plurality of types for each coding rate,
The control information generation unit
Furthermore, according to the sequence length of the information sequence, the length of the known information is determined from the plurality of types.
A receiver using the power line communication according to claim 1 or 2. Coding using a low density parity check convolutional code (LDPC-CC) for an information sequence composed of a plurality of bits and known information added to the information sequence and changing according to the coding rate Receiving a power line communication signal including parity bits generated by operation and the information sequence;
The length of the known information is determined according to the coding rate used for the coding operation of the LDPC-CC included in the received power line communication signal,
The likelihood corresponding to the known information is generated according to the length of the known information, and the likelihood of the information sequence and the likelihood of the parity bit are generated from the received power line communication signal,
A decoding operation is performed using the likelihood of the information sequence, the likelihood of the parity bit, and the likelihood corresponding to the known information to decode the information sequence.
Receiving method using power line communication. The known information is zero information,
A reception method using power line communication according to claim 4. The length of the known information is of a plurality of types for each coding rate,
The length of the known information is further determined according to the sequence length of the information sequence, the length of the known information from the plurality of types.
A receiving method using the power line communication according to claim 4 or 5.

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