JP2019080360A - Ad converter, ad converter device, photoelectric conversion device, imaging system, and ad conversion method - Google Patents

Abstract

To solve the following problem: There are concerns that a dynamic range for an incident ray volume becomes insufficient and power consumption becomes large.SOLUTION: When the magnitude of an analog signal is under a threshold value, a comparator compares the analog signal to a first reference signal, thereby acquiring a digital signal of a p bit. When the magnitude of the analog signal is over the threshold value, the comparator compares the analog signal to a second reference signal having a larger change rate to time than a first reference signal, thereby acquiring a digital signal of q bit smaller than p bit.SELECTED DRAWING: Figure 5

Description

  The present invention relates to a photoelectric conversion device, an imaging system, and a driving method of the photoelectric conversion device, and more particularly to one including an AD converter.

Patent Document 1 describes an image sensor that compares an analog signal with a threshold obtained by dividing the amplitude of a full scale analog signal by 2 ^k times. In Patent Document 1, n-bit digital data on the MSB side is obtained when the analog signal is larger than the threshold value, and n-bit digital data on the LSB side is obtained when the analog signal is less than the threshold value. .

JP, 2010-045789, A

  In the image sensor described in Patent Document 1, digital data on the MSB side and the LSB side are both n bits. However, in the case of a high luminance signal, the data on the MSB side does not have to have n-bit resolution. Therefore, if n-bit digital data is acquired even in the case of a high luminance signal, power consumption may be large. .

  An object of the present invention is to provide a technology capable of reducing power consumption while securing a dynamic range in view of the above problems.

  A photoelectric conversion device according to one aspect of the present invention includes a plurality of pixels, and includes a plurality of analog signal output units that output analog signals based on the plurality of pixels, and each includes a comparison unit, the plurality of analog signals A plurality of column signal processing units provided corresponding to any of the signal output units, a first reference signal whose signal level changes at a first change rate with respect to time, and the first change rate A reference signal generation unit that generates a second reference signal whose signal level changes at a high second change rate, and each of the plurality of column signal processing units determines the magnitude of the analog signal Is lower than the threshold value, the comparator compares the analog signal with the first reference signal to obtain a p-bit digital signal, and the magnitude of the analog signal exceeds the threshold value. , The analog signal at the comparator By comparison with the second reference signal, characterized by obtaining a digital signal of less q bits than the p bits.

  According to the present invention, power consumption can be reduced while securing a dynamic range.

It is a figure which shows the relationship of the analog signal and reference signal which an AD converter compares. It is a figure which shows the structural example of a photoelectric conversion apparatus. It is a figure which shows the structural example of a pixel. It is a timing chart for explaining operation. It is a figure which shows the signal amplitude of an analog signal, and the relationship of digital data. It is a figure which shows the detailed structural example of DSP. It is a figure which shows the change over time of a reference signal. It is a figure which shows the change with respect to time of the reference signal which concerns on a present Example. It is a figure which shows the change over time of a reference signal. It is a figure which shows the time change of a ramp signal. It is a figure which shows the structural example of a photoelectric conversion apparatus. FIG. 2 is a diagram showing a detailed configuration example of a column signal processing unit 20. It is a figure for demonstrating the operation | movement sequence of an imaging system. It is a figure for demonstrating operation. It is a figure for demonstrating operation. It is a figure which shows the structural example of a photoelectric conversion apparatus. It is a figure which shows the structural example of an amplifier circuit. It is a figure which shows the relationship between an imaging sensitivity, the amplification factor of an amplifier circuit, and a lamp signal. It is a figure showing an example of composition of an imaging system.

  Below, the case where it applies to a photoelectric conversion apparatus as an example of application of an AD conversion apparatus is explained.

Example 1
FIG. 1 is a diagram showing the relationship between an analog signal to be compared by an AD converter and a reference signal. The horizontal axis represents time, and the vertical axis represents signal level. The lamp signal which is a reference signal describes the lamp L and the lamp H. Since the maximum value of the ramp signal H is VH, by using the ramp signal H, it is possible to AD convert an analog signal whose signal level is from 0 to VH. On the other hand, since the ramp signal L is VL whose maximum value of the signal level is lower than VH, AD conversion can not be performed when the level of the analog signal exceeds VL. That is, when the lamp L is used, the dynamic range of the AD converter is narrower than when the lamp H is used. By using the ramp signal L when the analog signal is lower than VL and using the ramp signal H when the analog signal is higher than VL, the AD converter can increase the resolution of relatively low luminance signals. Dynamic range can be broadened.

  FIG. 2 is a view showing a configuration example of the photoelectric conversion device according to the present embodiment. The photoelectric conversion device 1 includes a pixel array 10, a row selection unit 15, a column signal processing unit 20, a reference signal generation unit 30, a counter 40, a column selection unit 50, a DSP 60, and an output unit 70.

  The pixel array 10 includes a plurality of pixels 11 arranged in a matrix. FIG. 2 exemplifies 2 rows × 2 columns of pixels 11. In the present embodiment, the pixel array 10 is an analog signal output unit.

  The column signal processing unit 20 is provided corresponding to the column of the pixel array 10, and includes a comparison unit 22 and a memory unit 24. The comparison unit 22 includes a comparator 221 and a selection circuit 222. The signal output from the pixel array 10 is input to one input terminal of the corresponding comparator 221. The signal output from the reference signal generation unit 30 is input to the other input terminal of the comparator 221 via the selection circuit 222. The reference signal generation unit 30 outputs a signal serving as a threshold and a reference signal whose signal level changes with time. The selection circuit 222 selects one of the signals output from the reference signal generation unit 30 and supplies it to the other input terminal of the comparator 221.

  The counter 40 outputs a count signal by, for example, counting a clock signal supplied from a timing control unit (not shown).

  The memory unit 24 includes a flag memory 241, an S memory 242, and an N memory 243. The flag memory 241 holds a flag signal described later. The S memory 242 and the N memory 243 receive the output of the comparator 221, that is, hold the count signal supplied from the counter 40 in response to a change in magnitude relationship between the analog signal and the reference signal.

  The column selection unit 50 is configured to select the memory unit 24 and to transfer the signal held in the selected memory unit 24 to the DSP 60.

  The DSP 60 corrects the signal based on the flag signal. Also, difference processing between the signal held in the S memory 242 and the signal held in the N memory 243 may be performed.

  The output unit 70 outputs the signal output from the DSP 60. The output unit 70 may have a buffer function.

  The timing generation unit 80 supplies a signal related to the operation of the photoelectric conversion device 1.

  FIG. 3 shows a configuration example of the pixel 11 according to the present embodiment. The pixel 11 includes a photodiode PD, an amplification transistor SF, a transfer transistor TX, a reset transistor RES, and a selection transistor SEL. The transfer transistor TX, the reset transistor RES, and the selection transistor SEL are switched to conduction or non-conduction respectively by the signals φT, φR, and φSEL. The ground potential is applied to the anode of the photodiode PD, and the cathode is connected to the floating diffusion FD via the transfer transistor TX. The gate of the amplification transistor SF is connected to the floating diffusion portion FD and is connected to the power supply SVDD via the reset transistor RES. One main node of the amplification transistor SF is connected to the power supply SVDD, and the other main node is connected to the output node PIXOUT via the selection transistor SEL. The amplification transistor SF constitutes a source follower circuit together with the current source IR when the selection transistor SEL becomes conductive.

  FIG. 4 is a timing chart for explaining the operation according to this embodiment. When focusing on a certain column, the ramp signal VRAMP input to the other input terminal of the comparator 221, the signal output from the pixel 11, that is, the signal level Va of one input terminal of the comparator 221, and the selection circuit A signal S supplied from the comparator 221 is shown at 222.

  A period Tad is a period for AD converting an analog signal. In the period Tad, first, the signal S is at the low level (hereinafter, referred to as L level), and therefore, the selection circuit 222 is configured such that the rate of change with time of the reference signals supplied from the reference signal generator 30 is relatively large. A low reference signal is provided.

  In the pixel 11, when the gate of the amplification transistor SF is reset by the reset transistor RES, the pixel 11 outputs a reference signal. The reference signal includes noise components associated with the reset. After the output of the pixel 11 is settled to the reference signal, the ramp signal R is supplied to the comparator 221 in a period Td. A period Td is a period during which the reference signal is AD converted. As the signal level of the ramp signal R starts to change at a first rate of change with respect to time, the counting operation of the counter 40 also starts. When the ramp signal R exceeds the reference signal after a lapse of time Tr from the start of the period Td, the output of the comparator 221 changes, and the count signal output from the counter 40 is held in the N memory 243 in response thereto. Be done.

  When the charge accumulated in the photodiode PD of the pixel 11 is transferred to the gate of the amplification transistor SF via the transfer transistor TX after the period Td, the pixel 11 outputs a valid signal. The effective signal is a signal in which a component corresponding to the amount of charge accumulated in the photodiode PD is superimposed on the reference signal.

  The period Tj is a determination period. In period Tj, comparator 221 is supplied with comparison voltage VREF as a threshold. The comparator 221 compares the valid signal with the comparison voltage VREF in the period Tj. When the valid signal exceeds the comparison voltage VREF, the selection circuit 222 outputs an H level signal, and the flag memory 241 stores a flag signal indicating that the valid signal exceeds the comparison voltage VREF. On the other hand, when the valid signal falls below the comparison voltage VREF, the selection circuit 222 outputs a signal at L level, and the flag memory 241 stores a flag signal indicating that the valid signal falls below the comparison voltage VREF.

  A period Tu is a period during which the effective signal is AD converted. During this period, the inclination of the reference signal supplied to the comparator 221 differs depending on the output of the selection circuit 222. When the output of selection circuit 222 is at H level, that is, when the effective signal exceeds comparison voltage VREF, ramp signal H having a relatively large change rate with respect to time is supplied to comparator 221. This is shown by the solid line in FIG. When the output of the selection circuit 222 is at L level, that is, when the effective signal is lower than the comparison voltage VREF, the ramp signal L having a relatively small change rate with respect to time is supplied to the comparator 221. This situation is shown by the dotted line in FIG. As the signal level of the ramp signal H which is the second reference signal starts to change at a second rate of change with respect to time, the counting operation of the counter 40 also starts. When the ramp signal H exceeds the reference signal after a lapse of time Ts from the start of the period Tu, the output of the comparator 221 changes, and the count signal output from the counter 40 is held in the S memory 242 in response thereto. Be done. Hereinafter, the ramp signal L is also referred to as a first reference signal, and the ramp signal H is also referred to as a second reference signal. In the present embodiment, when performing AD conversion of the effective signal using the ramp signal H, the counter 40 is compared with the case where AD conversion of the effective signal is performed using the ramp signal L that is the first reference signal. Halve the operating frequency of Thus, when the analog signal exceeds the threshold, power consumption can be reduced by converting it into a digital signal having a smaller number of bits than the case where the analog signal falls below the threshold. When the ramp signal L is used, a p-bit digital signal is obtained, and when the ramp signal H is used, a q-bit digital signal smaller than p bits is obtained.

FIG. 5 is a diagram showing the relationship between the signal amplitude of an analog signal and digital data. The horizontal axis shows the amplitude of the analog signal. This corresponds to the amount of light incident on the photodiode. The vertical axis represents the value of the digital signal after AD conversion. Here, it is assumed that D1 = 2047 (= 10 ¹¹ −1) is a full scale digital value.

In the figure, when the analog signal is in the range up to VL, the ramp signal L is used to convert the analog signal into a 10-bit (= 10 ¹⁰ = 1024 steps) digital signal. On the other hand, when the analog signal exceeds VL, the ramp signal H is used to convert the analog signal into a digital signal. However, as described above, in the present embodiment, the operating frequency of the counter 40 is lowered to 1⁄2. In addition, since the rate of change of the ramp signal H with respect to time is twice the rate of time change of the ramp signal L, the slope of the digital signal relative to the analog signal in the range of VL to VH is in the range of 0 to VL. It becomes 1/4 against. Therefore, digital signals obtained when converting an analog signal using the ramp signal H are D8 (= 255 = (1024/4) -1) to D4 (= 511 = (2048/4) -1). . This corresponds to a value of 1⁄4 of the digital signal obtained when AD converting the analog signal in the range of VL to VH using the ramp signal L temporarily. When forming an image from the obtained digital signal, since 1023-255 = 768 is added to the Dh signal, the image is treated as a signal corresponding to Dh ′. Further, by performing gamma processing on the signal whose characteristics are indicated by DI and Dh ', the characteristic as shown by Do is obtained.

  On the other hand, in the technique described in Patent Document 1, even when performing AD conversion using a relatively large reference signal, a digital signal having the same number of bits as performing AD conversion using a relatively small reference signal. You are going to get Therefore, when applied to FIG. 5, the analog signals in the range of VL to VH become 10-bit data of data D2 (1023) to data D1 (2047). However, if 10-bit data is acquired for this range, there is a concern that the power consumption is large.

  On the other hand, in the present invention, the low luminance component is converted by 10 bits, and the high luminance component can be acquired as a compressed signal with low power consumption. The low luminance component is an area important as an image because changes in luminance are easily seen by human eyes. On the other hand, the high luminance component is less likely to cause a problem even if it is compressed because the change in luminance is less visible to human eyes than the low luminance component.

  As described above, according to this embodiment, power consumption can be reduced.

  So far, in order to simplify the description, the case where the analog signal is equal to the threshold is not described, and the case where the analog signal is above and below the threshold is described separately. When the analog signal is equal to the threshold value, the same processing as when the analog signal exceeds or falls below the threshold value may be performed.

  In FIG. 4, three reference signals R, L and H have been described. Among them, since the ramp signal R and the ramp signal L are both used to convert low-amplitude analog signals, the time change rates may be the same. By sharing the both, there is an advantage that the number of wirings for supplying the reference signal can be reduced. In addition, a circuit for changing the time change rate of the ramp signal may be provided in the selection circuit 222 of each column, and the ramp signals R, L, and H may be generated by each selection circuit. In that case, the number of wirings connected from the reference signal generation unit 30 to the selection circuit 222 in each column can be further reduced. The ramp signal H changes at a second change rate higher than the first change rate with respect to the ramp signals R and L changing at a first change rate.

  Further, the reference signal converted by the ramp signal R is mainly a noise component, so the signal level is not large. Therefore, the maximum value that the ramp signal R can take can be set lower than the maximum value that the ramp signal L can take. Thus, the length of the AD conversion period Td of the reference signal can be shortened.

  The comparison voltage VREF as a threshold used in determining the signal level of the valid signal may supply a fixed voltage, or stop the time change of the ramp signal when the signal level of the ramp signal reaches the threshold. It may be generated by Although the comparison voltage VREF may be equal to the maximum value VL that the ramp signal L can take, it is preferable that the comparison voltage VREF is lower than the maximum value VL that the ramp signal L can take. This is because each comparator 221 has an offset, so if the comparison voltage VREF is not set sufficiently higher than VL, the offset of the comparator 221 may prevent correct determination. Therefore, it is preferable to set the comparison voltage VREF to a signal level sufficiently lower than the maximum value VL of the ramp signal L in consideration of the offset variation of each comparator 221.

  In the above, it demonstrated converting a digital signal Dh into Dh ', and performing gamma processing, referring FIG. These processes are performed, for example, in the DSP 60. Specifically, when the flag signal output from the flag memory 241 indicates that the analog signal is determined to exceed the threshold, the digital signal Dh is level shifted to Dh '.

  A more detailed configuration example of the DSP 60 is shown in FIG. 6 is a diagram extracting and showing the comparison unit 22, the flag memory 241, the S memory 242, the N memory 243, the column selection unit 50, the DSP 60, and the output circuit 70 in FIG.

  The DSP 60 includes a gain ratio / slope ratio error correction unit 62, a slope ratio error detection unit 64, and a difference processing unit 66. The gain ratio / slope ratio error correction unit 62 identifies which ramp signal is used to AD convert the signal output from the S memory 242 based on the flag signal FG output from the flag memory 241. Then, based on the result of identification, the signal output from the S memory is corrected. As a result, the digital signal L-DATA obtained using the ramp signal L and the digital signal H-DATA obtained using the ramp signal H are selected and made available. This corresponds to converting signal Dh into signal Dh 'in FIG.

  The inclination ratio detection unit 64 detects a ratio of time change rates of the lamp signal L and the lamp signal H, that is, an inclination ratio. In the present embodiment, although the time change rate of the ramp signal L and the ramp signal H is set to be doubled, in reality, it is not always exactly doubled. Therefore, the inclination ratio detector 64 detects the inclination ratio of the two ramp signals, that is, the ratio of time change rate, and the gain ratio / inclination ratio error correction unit 62 performs correction processing based on the result. The difference processing unit 66 performs difference processing between L′-DATA or H′-DATA output from the gain ratio / slope ratio error correction unit 62 and N-DATA output from the N memory 243.

  It is difficult to manufacture the slope ratio of the ramp signal L and the ramp signal H as designed. The error of the time change rate generates a signal step around the signal level VL which is the boundary between the range where the ramp signal L and the ramp signal H are used. Although the error of the time change rate may be measured and corrected by a DSP described later, since the AD conversion by the lamp signal H compresses the high luminance signal, there is often no problem on the image, and correction is not performed. Also good.

  In the case of the ramp signal L and the ramp signal L8 in the embodiment of FIG. 9 described later, since the step generated around the signal level V8 is an important part of the image signal, the image quality is not deteriorated if the inclination ratio error is corrected. The measurement of the inclination ratio error will be described later.

(Example 2)
FIG. 7 is a diagram showing the change with time of the reference signal according to the present embodiment.

  In the present embodiment, when AD conversion is performed using the ramp signal H in the period Tu of FIG. 4, the counter 40 is caused to perform the counting operation at the same operating frequency as when performing AD conversion using the ramp signal L. Then, the ramp signal H is caused to reach the maximum value VH in a period T2 (= T1 / 2) which is a half of the time until the ramp signal L reaches the maximum value VL.

  According to this embodiment, since the AD conversion period in the case of performing AD conversion using the ramp signal H can be shortened, power consumption can be reduced.

(Example 3)
FIG. 8A is a diagram showing the change with time of the reference signal according to the present embodiment. In the following, differences from the first embodiment will be mainly described.

  In the first embodiment, it is effective to perform AD conversion using the ramp signal L, and to operate the counter 40 at a frequency lower than that using the ramp signal L while performing the AD conversion using the ramp signal H. It has been described that it is selectively performed according to the signal level of the signal. The difference between the present embodiment and the first embodiment is that, in the embodiment, the ramp signal having a time change rate lower than that of the ramp signal L with respect to the signal in the signal range (0 to VL) converted using the ramp signal L The point is to convert the effective signal using L8.

  In this embodiment, AD conversion is performed on the effective signal in the range of 0 to V8 = VH / 8 using the ramp signal L8 having a time change rate of 1⁄4 of the ramp signal L. At this time, the operating frequency of the counter 40 is the same as in the case of using the ramp signal L.

For the maximum value VH of the ramp signal H, VL has a relationship of VL = VH / 2. That is, assuming h = 1, VL = VH (1/2 ^h ). On the other hand, V8 becomes j = 2 and V8 = VH / 8 = {VH · (1/2 ^h )} · (1/2 ^j ) = VL · (1/2 ^j ). Here, the case where the maximum value of the analog signal that can be converted by the AD converter is VH is described as an example.

Therefore, assuming that the counter 40 outputs a p-bit count signal, a p-bit digital signal is obtained when the effective signal is AD converted using the ramp signal L8. Also when the effective signal is AD converted using the ramp signal L, a digital signal of p bits can be obtained. A digital signal obtained using the ramp signal L8 can be treated as p bits on the LSB side, and a digital signal obtained using the ramp signal L can be treated as p bits on the MSB side. Therefore, by multiplying the p-bit digital signal on the MSB side by 2 ^j, it can be treated as equivalent to performing AD conversion with a resolution of (p + j) bits for the valid signal in the range from 0 to VL. That is, AD conversion can be performed with high resolution for a signal range where the signal level is low.

  When AD conversion is performed using the ramp signal H, q-bit AD conversion smaller than p is performed.

  The operation according to this embodiment is different from the operation shown in FIG. 4 in the ramp signal VRAMP and the output S of the selection circuit 222. FIG. 8B shows only the ramp signal VRAMP.

  The reference signal generation unit 30 outputs a second comparison voltage VREF2 lower than the first comparison voltage VREF in the determination period Tj. The comparator 221 compares the valid signal with the second comparison voltage VREF2 which is the second threshold. If it is determined that the valid signal falls below the second comparison voltage VREF2, the selection circuit 222 is set to supply the ramp signal L8 to the comparator 221 in the AD conversion period Tu. Then, the flag memory 241 stores a signal indicating that the valid signal is lower than the second comparison voltage VREF2.

  Subsequently, the reference signal generation unit 30 outputs the first comparison voltage VREF. If it is determined that the effective signal is larger than the second comparison voltage and lower than the first comparison voltage VREF as a result of the comparator 221 comparing the effective signal with the first comparison voltage VREF, the selection circuit 222 outputs AD In the conversion period Tu, the ramp signal L is set to be supplied to the comparator 221. Then, the flag memory 241 stores a signal indicating that the valid signal is lower than the first comparison voltage VREF. On the other hand, when it is determined that the valid signal exceeds the first comparison voltage VREF, the selection circuit 222 is set to supply the ramp signal VH to the comparator 221 in the AD conversion period Tu. Then, the flag memory 241 stores a signal indicating that the valid signal exceeds the first comparison voltage VREF.

  Thereafter, the result of AD conversion in the AD conversion period Tu is stored in the S memory 242 and processed by the DSP to perform difference processing with the signal stored in the N memory 243, offset correction, gain correction, gamma processing, etc. Signal processing is performed.

  In the present embodiment, when the analog signal falls below a second threshold below the first threshold VREF, the analog signal is compared with the ramp signal L8 to obtain a p-bit digital signal. The ramp signal L8 is a third reference signal whose time change rate is lower than that of the ramp signal L which is the first reference signal.

  In the present embodiment, when the analog signal falls below a second threshold below the first threshold VREF, the analog signal is compared with the ramp signal L8 to obtain a p-bit digital signal. The ramp signal L8 is a third reference signal whose time change rate is lower than that of the ramp signal L which is the first reference signal.

  Also in the present embodiment, it is preferable that the second comparison voltage VREF2 be set lower than the maximum value of the ramp signal L2.

  In this embodiment, an analog signal which is a low luminance signal lower than the signal level VL is increased in bit by (p + j) bits, and an effective signal exceeding the signal level VL is AD converted using the ramp signal VH. By setting the operating frequency of the counter 40 to 1/2 as compared with the case of performing AD conversion using the ramp signal VL, it is possible to reduce power consumption while securing the dynamic range.

  The tilt ratio error will be further described.

  FIG. 9 shows the waveform of the ramp signal H when the ramp signal H has an error with respect to the ideal inclination. In the timing chart of FIG. 4, the determination period Tj is omitted.

  In FIG. 9, it is assumed that the ramp signal L used to AD convert the reference signal has a rate of change with respect to time k. At this time, the period T1 is the time required to AD convert the reference signal.

  On the other hand, the ideal ramp signal H 'used for AD conversion of the effective signal has a time change rate of a · k. The actual rate of change of the ramp signal H has an error of β with respect to the ideal value, and the temporal rate of change is a · β · k. When the effective signal is AD converted using the ideal ramp signal H ′, the time required for the AD conversion is T2 ′ + T3 ′, whereas the effective signal is AD converted using the actual ramp signal H. In this case, the time required for AD conversion is T2 + T3.

  Since the slope ratio of the ramp signal L and the ramp signal H 'is a, T1 = a · T2'. Therefore, when differential processing between the effective signal and the reference signal is performed, a. (T2 '+ T3')-T1 = a.T3 'is obtained. However, when differential processing between the effective signal obtained by the actual ramp signal H and the reference signal is performed, a (T2 + T3) −T1 =, and there is an error with respect to the case where the ideal ramp signal H ′ is used. . Therefore, if the inclination ratio error β is known, a correction process of dividing (T2 + T3) by β can be performed to obtain {a · (T2 + T3) / β} −T1 = a · T3 ′.

  A method for detecting the slope ratio error β will be described. In short, if you obtain the ratio of the digital signal obtained by comparing the effective signal of the same level with the ramp signal L and the ramp signal H, a · β is obtained, so with this set slope ratio a By dividing, a slope ratio error β is obtained.

  The slope ratio error β obtained in this manner may be held in the slope ratio error detection unit 64 to correct the signal. The inclination ratio error may be detected at the time of manufacture, or may be detected prior to the imaging operation to detect the inclination ratio error reflecting the influence of the temperature condition or the like at the time of imaging.

(Example 4)
In the present embodiment, the combination of the imaging sensitivity set in the imaging system and the lamp signal used in each imaging sensitivity will be described.

  FIG. 10A is a diagram showing a time change of the ramp signal according to the present embodiment. Here, four ramp signals H, M, L1 and L2 are shown. The maximum value that can be taken by the ramp signals M, L1, and L2 is set as follows: VM = (VH / 2), VL1 = (VH / 4), VL2 = (VH / 8) where VH is the maximum value that the ramp signal H can take ). The ramp signals H, M, and L1 reach the maximum value at time T1, but the ramp signal L2 reaches the maximum value VL2 at time T2 = 2 · T1.

  FIG. 10B is a view showing the imaging sensitivity set in the imaging system and the lamp signal used in each imaging sensitivity. The vertical axis indicates four types of ISO sensitivity 100, 200, 400, 800 as the imaging sensitivity. The horizontal axis indicates the type of lamp signal. A cell marked with "o" indicates that a ramp signal is used. Specifically, in the setting of the ISO sensitivity 100, only the lamp signal H is used, and in the setting of the ISO sensitivity 200, the lamp signals H and M are used. In the case of the ISO sensitivity 400, the lamp signals M and L1 are used, and in the case of the ISO sensitivity 800, the lamp signals M and L2 are used.

  Generally, in order to lower the ISO sensitivity when photographing a high luminance subject, only the lamp signal H is used in the setting of the ISO sensitivity 100 so that a signal of high luminance can also be AD converted. On the other hand, since it is general to set the ISO sensitivity high as the luminance of the subject decreases, two types of lamp signals are used at an ISO sensitivity of 200 or more. When AD converting an effective signal using two types of ramp signals, the operating frequency of the counter 40 in the case of using a ramp signal with a high time change rate is set lower than in the case of using a ramp signal with a low time change rate . As a result, as in the embodiments described above, power consumption can be reduced while the dynamic range is expanded.

  Further, although it has been described here that two types of lamp signals are used for each ISO sensitivity, three or more types of lamp signals may be used as in the third embodiment.

  FIG. 10C shows time change of the lamp signal in the case where power consumption is reduced by shortening the change period of the lamp signal without changing the operating frequency of the counter 40 as in the second embodiment. FIG.

  For example, in the setting of the ISO sensitivity 200, the ramp signal HH is used when the effective signal exceeds VM, and the ramp signal M is used when the effective signal is below VM. For example, in the ISO sensitivity 400, the lamp signal MM is used when the effective signal is in the range of VL1 to VM, and the lamp signal VL1 is used when the effective signal is lower than VL1.

  Also in the present embodiment, the power consumption can be reduced while the dynamic range is expanded. In addition, by changing the lamp signal to be used according to the setting of the photographing sensitivity, AD conversion suitable for the photographing scene can be realized.

(Example 5)
In Examples 1 to 3, AD conversion of the effective signal is performed by the lamp comparison method based on comparison with the ramp signal. In this embodiment, an example will be described in which a hybrid AD conversion AD converter is used, which combines two of a successive approximation method and a ramp comparison method.

  FIG. 11 is a configuration example of the photoelectric conversion device according to the present embodiment. The configuration of the column signal processing unit and the reference signal generation unit is different from that of the photoelectric conversion device illustrated in FIG. Other configurations can be as shown in FIG. 2 and are not shown here.

  The reference signal generation unit 30 in the present embodiment includes a reference voltage generation unit 103 in addition to the ramp signal generation unit 104.

  The column signal processing unit 20 in the present embodiment includes a switch / capacitor group 106, a comparator 107, a control circuit 108, a counter 109, and a memory 110.

  The detailed configuration of the column signal processing unit 20 is shown in FIG. The switch / capacitor group 106 includes a successive approximation capacitance unit SA and an input capacitance Cin. The output from the pixel array 10 is supplied to the non-inversion input terminal of the comparator 107 via the input capacitance Cin.

  In the successive approximation capacitance unit SA, capacitance elements of capacitance values 1C, 1C, 2C, and 4C are connected in parallel, and are configured to be able to perform binary weighting on the reference voltage VRF. In this embodiment, 2-bit sequential comparison can be realized. A switch connected in series to each of the capacitive elements of capacitance values 1C, 2C, 4C selectively connects the corresponding capacitive element to the reference voltage VRF and the ground potential GND. The switch connected in series to the capacitive element having a capacitance value of 1 C is configured to selectively supply the RMPL signal which is the ramp signal L and the VRMPH which is the ramp signal H to the corresponding capacitive element. .

  The comparator 107 is configured such that its input terminal can be reset to the ground potential GND, and its output terminal is connected to the control circuit 108.

  The counter 109 operates under the control of the control circuit 108.

  FIG. 13A is a diagram for describing an operation sequence in the case where the imaging sensitivity of the imaging system is ISO100. A signal supplied from the successive comparison unit SA to the comparator 107 is shown. First, AD conversion is performed on the upper two bits of the valid signal by comparing the voltages VRF / 2 and VRF / 4 with the valid signal. This is hereinafter referred to as the first process. Thereafter, the lower 8-bit AD conversion is performed by comparing the lower analog signal corresponding to the least significant bit of the digital signal obtained in the first process with the ramp signal VRMPH. The AD conversion range in this case is 0 to VRF.

  On the other hand, FIG. 13B is a diagram for describing an operation sequence when the imaging sensitivity of the imaging system is ISO200. What is different from FIG. 13A is that the signal reference voltage to be compared in the successive comparison operation is performed for VRF / 4 and VRF / 8, and the ramp signal VRMPL is used. However, if such processing is performed, the AD conversion range in the ISO sensitivity 200 is half that in the case of the ISO sensitivity 100.

  Next, the operation according to the present embodiment will be described.

  FIG. 14 is a timing chart for explaining the operation in the case where the effective signal is a low luminance signal (A_IN <VRF / 2) lower than VRF / 2 in the ISO sensitivity 200. When the signals S0 to S1 are at the H level, the corresponding switch supplies the reference voltage VRF to the corresponding capacitive element, and when the signal S0 to S1 is at the low level, the ground potential GND is supplied.

  In the period T1 to T3, the effective signal is AD converted by 2-bit successive approximation. In period T1, the magnitude with respect to voltage VRF / 2 is determined, and in accordance with the determination result, voltages to be compared with the valid signal in periods T2 and T3 are determined. In FIG. 14, "10" is obtained as a digital code. Since it is known from the determination result in the period T1 that A_IN <VRF / 2, the control circuit controls the switch so that the ramp signal VRMPL is supplied to the capacitive element having the capacitance value 1C. As a result, in the period T4, 8-bit AD conversion is performed using the ramp signal VRMPL having a relatively low time change rate.

  FIG. 15 is a timing chart for explaining the operation when the ISO sensitivity is 200 but the effective signal is a high luminance signal (A_IN> VRF / 2) exceeding VRF / 2.

  In this case, after performing AD conversion by 2-bit successive approximation, 7-bit AD conversion is performed using a ramp signal VRMPH having a relatively high time change rate. When 7-bit AD conversion is performed, as described in each of the above-described embodiments, the operation frequency of the counter 109 is changed, or the period in which the ramp signal shows temporal change is changed to perform dynamic. The power consumption can be reduced while the range is expanded. In addition, the effective signals in the range of VRF / 2 to VRF which can not be AD converted in the case of FIG. 13 can also be AD converted.

(Example 6)
In each of the above-described embodiments, the gain for the signal is increased by reducing the time rate of change of the ramp signal. However, in reality there is noise due to the comparator and the reference signal generator, so if the time change rate of the lamp signal is small, it may not be possible to determine whether it is an effective signal or noise.

  Therefore, in the present embodiment, an amplifier is provided in the analog signal processing unit to reduce the influence of noise.

  FIG. 16 is a view showing a configuration example of the photoelectric conversion device according to the present example. The difference from FIG. 2 is that an amplification circuit 210 is provided in each column of the pixel array 10.

  The detailed configuration of the amplifier circuit 210 is shown in FIG. The amplification circuit 210 includes a differential amplifier 211, an input capacitance C0, feedback capacitances C1 and C2, switches SW1, SW2 and SW3, and a current source I for supplying current to the differential amplifier 211. The current source I is a variable current source capable of switching the current supplied to the differential amplifier 211 between I1 and I2. Here, it is assumed that I2 = I1 / 2. The switches SW1 to SW4 are controlled by the timing generation unit 80. The amplification factor of the amplifier circuit 210 is determined by the ratio of the capacitance value of the active feedback capacitance on the feedback path of the differential amplifier 211 and the capacitance value of the input capacitance C0. Since the amplification circuit 210 can be operated as a clamp circuit by a known method, it is possible to amplify a signal obtained by reducing the reference signal from the effective signal.

  Usually, when the ISO sensitivity of the imaging apparatus is changed, the amplification factor of the amplification circuit is switched in conjunction with that, but in that case, the dynamic range is narrowed. In this embodiment, the dynamic range is expanded by setting the change range of the amplification factor due to the ISO sensitivity small and changing the time change rate of the lamp signal.

  FIG. 18A is a table showing the relationship among the ISO sensitivity, the amplification factor of the amplifier circuit (amplifier gain), and the lamp signal in the present embodiment. In the present embodiment, when the ISO sensitivity is 100, 200, and 400, the amplifier gain is fixed at 1 ×, while the combination of lamp signals used for AD conversion is changed. Similarly, when the ISO sensitivity is 800 or 1600, the amplifier gain is fixed twice, while the combination of lamp signals used for AD conversion is changed. The combination of the ramp signals is the same as in FIG. 10, so the description is omitted.

  The relationship between the amount of light incident on the photoelectric conversion device and the signal level corresponding to the amount of light incident is shown in FIG. When the ISO sensitivity is 100, 200, and 400, since the amplifier gain is G1 = 1, it is possible to cope with incident light amounts from 0 to L1. On the other hand, when the ISO sensitivity is 800 or 1600, the amplifier gain is G2 = 2, which corresponds to the amount of incident light from 0 to L2 (= L1 / 2).

  When the ISO sensitivity is 100, AD conversion is performed using only the lamp signal H. When the ISO sensitivity is 200, a signal in the range of 0 to V2 is AD converted using the lamp signal M, and a signal in the range of V2 to V1 is AD converted using the lamp signal H. Similarly, when the ISO sensitivity is 400, a signal in the range of 0 to V4 is AD converted using the ramp signal L, and a signal in the range of V4 to V1 is AD converted using the ramp signal H.

  Also according to this embodiment, the power consumption can be reduced while the dynamic range is expanded.

  In addition, the current consumption of the amplifier circuit may be changed according to the operation mode of the imaging system. Specifically, in the moving image mode, the current of I2 is supplied to the differential amplifier in order to lower the drive capability of the amplification circuit, and in the still image mode, the current of I1 is supplied to the differential amplifier.

(Example 7)
FIG. 19 is a diagram showing an example of the configuration of an imaging system according to this embodiment. The imaging system 800 includes, for example, an optical unit 810, an imaging device 100, a video signal processing unit 830, a recording and communication unit 840, a timing control unit 850, a system control unit 860, and a reproduction and display unit 870. The imaging device 820 includes an imaging element 100 and a video signal processing unit 830. The photoelectric conversion device described in the previous embodiment is used as the imaging element 100.

  An optical unit 810, which is an optical system such as a lens, forms an image of a subject by forming light from the subject on the pixel unit 10 in which a plurality of pixels are two-dimensionally arrayed in the imaging device 100. The imaging element 100 outputs a signal according to the light focused on the pixel unit 10 at a timing based on the signal from the timing control unit 850. A signal output from the imaging element 100 is input to a video signal processing unit 830 which is a video signal processing unit, and the video signal processing unit 830 performs signal processing according to a method defined by a program or the like. A signal obtained by the processing in the video signal processing unit 830 is sent to the recording / communication unit 840 as image data. The recording and communication unit 840 sends a signal for forming an image to the reproduction and display unit 870, and causes the reproduction and display unit 870 to reproduce and display a moving image or a still image. Recording / communication unit 840 also receives a signal from video signal processing unit 830 to communicate with system control unit 860, and also performs an operation of recording a signal for forming an image on a recording medium (not shown). Do.

  The system control unit 860 controls the operation of the imaging system in an integrated manner, and controls the driving of the optical unit 810, the timing control unit 850, the recording and communication unit 840, and the reproduction and display unit 870. The system control unit 860 also includes, for example, a storage device (not shown), which is a recording medium, and programs and the like necessary to control the operation of the imaging system are recorded therein. In addition, the system control unit 860 supplies a signal for switching the drive mode to the imaging system, for example, in accordance with the user's operation. As specific examples, there are a change of a line to be read out and a line to be reset, a change of the angle of view accompanying the electronic zoom, a shift of the angle of view accompanied by the electronic image stabilization, and the like. The timing control unit 850 controls drive timings of the imaging device 100 and the video signal processing unit 830 based on control by the system control unit 860. The timing control unit 850 can also function as a sensitivity setting unit that sets the imaging sensitivity of the imaging device 100.

(Others)
Each of the above-described embodiments is an example for practicing the present invention, and modifications can be made without departing from the technical concept of the present invention, or elements of a plurality of embodiments can be combined.

Reference Signs List 10 pixel array 11 pixel 20 column signal processing unit 22 comparison unit 221 comparator 24 memory unit 30 reference signal generation unit 40 counter

A photoelectric conversion device according to one aspect of the present invention is a photoelectric conversion device that performs an operation corresponding to imaging sensitivity, and compares a reference signal generation unit that outputs a lamp signal, the lamp signal and an analog signal. In the first case where the imaging sensitivity is a first imaging sensitivity, the reference signal generation unit comprises a ramp signal of a first slope, and the first signal. A plurality of lamp signals including a lamp signal having a second slope different from the slope are output in parallel to the AD converter, and the imaging sensitivity is a second imaging sensitivity different from the first imaging sensitivity. In the second case, the reference signal generation unit is a photoelectric conversion device characterized in that a ramp signal with a third slope is output to the AD converter.

Claims (15)

An AD converter for converting an analog signal to a digital signal,
Converting the analog signal to a p-bit digital signal if the magnitude of the analog signal is below a threshold;
Converting the analog signal to a q-bit digital signal less than the p bits if the magnitude of the analog signal exceeds the threshold;
AD converter characterized by   The AD converter according to claim 1, wherein the analog signal is converted to the digital signal by comparing the analog signal with a reference signal whose signal level changes. Converting the analog signal to the p-bit digital signal by comparing it to a first reference signal changing at a first rate of change,
The digital signal of q bits is converted by comparing the analog signal with a second reference signal which changes at a second change rate higher than the first reference signal. AD converter as described in.   The AD converter according to claim 3, wherein the threshold is a signal level lower than a maximum value of the second reference signal. When the time change rate of the second reference signal is 2 ^j times the change rate of the first reference signal,
4. The AD converter according to claim 3, wherein the threshold is a value obtained by dividing the maximum value of the convertible analog signal by 2 ^j . A counter that counts the clock signal and outputs the count signal;
A memory for holding the count signal in response to a change in magnitude between an analog signal and the reference signal;
The clock according to any one of claims 3 to 5, wherein the clock has a lower frequency when converting the analog signal into the q-bit digital signal than when converting the analog signal into the p-bit digital signal. AD converter according to any one.   The AD converter according to any one of claims 3 to 6, further comprising a correction unit that corrects an inclination ratio error of the first and second reference signals. If the analog signal falls below a second threshold below the threshold,
8. The p-bit digital signal according to any one of claims 3 to 7, wherein the analog signal is converted to the p-bit digital signal by comparing it with a third reference signal having a time change rate lower than that of the first reference signal. AD converter described in. As the first process, the analog signal is converted to a first digital signal by a successive approximation method,
Converting the low-order analog signal into a second digital signal by comparing a low-order analog signal corresponding to the least significant bit of the digital signal obtained in the first process with a reference signal whose signal level changes The AD converter according to claim 1, characterized in that A plurality of AD converters according to any one of claims 1 to 9,
Each of the plurality of AD converters includes a plurality of analog signal outputs that output analog signals;
An AD converter, further comprising: column signal processing units respectively provided corresponding to the plurality of analog signal output units. And a reference signal generation unit provided commonly to the plurality of column signal processing units,
The plurality of column signal processing units convert the analog signal into the digital signal by comparing the analog signal with a reference signal generated by the reference signal generation unit whose signal level changes. The AD converter according to claim 10, wherein The AD converter according to claim 10 or 11, comprising:
A photoelectric conversion device characterized in that each of the plurality of analog signal output units includes a pixel that outputs the analog signal based on incident light. A photoelectric conversion device according to claim 12;
An optical system for forming an image on the plurality of pixels;
An image signal processing unit configured to process the signal output from the photoelectric conversion device to generate image data. Photoelectric conversion device,
And a sensitivity setting unit configured to set an imaging sensitivity of the photoelectric conversion device, wherein the photoelectric conversion device includes:
A plurality of analog signal outputs, each comprising a pixel that outputs an analog signal based on incident light;
Each having a plurality of column signal processing units provided corresponding to one of the plurality of analog signal output units;
Each of the column signal processing units
Converting the analog signal to a p-bit digital signal by comparing it to a first reference signal changing at a first rate of change,
Converting the analog signal to a q-bit digital signal less than the p bits by comparing it to a second reference signal that changes at a second rate of change higher than the first reference signal;
An imaging system, wherein a combination of the first and the second change rates at different photographing sensitivities are different from each other. An AD conversion method for converting an analog signal to a digital signal
Converting the analog signal to a p-bit digital signal if the magnitude of the analog signal is below a threshold;
Converting the analog signal to a q-bit digital signal less than the p bits if the magnitude of the analog signal exceeds the threshold;
AD conversion method characterized by

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