JP2019045551A - Image processing apparatus, display, and method for controlling image processing apparatus - Google Patents

Abstract

To provide a technology that can inhibit operation of a plurality of image processing units from becoming unstable.SOLUTION: An image processing apparatus comprises: a first image processing unit that executes first image processing; a second image processing unit that executes second image processing; and a control unit that controls a difference between first operation timing at which the first image processing unit executes the first image processing and second operation timing at which the second image processing unit executes the second image processing.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an image processing apparatus, a display apparatus, and a control method of the image processing apparatus.

  Patent Document 1 describes a projector having a plurality of image processing units (specifically, a gamma correction processing unit, a resolution conversion processing unit, and a color conversion processing unit). Each image processing unit executes image processing when the data enable signal is active.

JP, 2009-300961, A

In the plurality of image processing units, when the data enable signal is activated at the same timing, the plurality of image processing units operate at the same timing, and the current consumed by the plurality of image processing units is rapid. To increase. The power supply voltage may also fluctuate rapidly in response to the rapid increase of the current.
Further, when the data enable signal is inactivated at the same timing in the plurality of image processing units, the plurality of image processing units are inactivated at the same timing, and the entire image processing units are consumed. Current decreases sharply. The power supply voltage may also fluctuate rapidly in response to the rapid decrease of the current.
Such sudden fluctuations in the power supply voltage cause overshoot and undershoot in the power supply voltage. Overshoot and undershoot may make the operation of the image processing unit unstable.

  The present invention has been made in view of the above-described circumstances, and an object of the present invention is to provide a technology capable of suppressing the instability of operations of a plurality of image processing units.

One aspect of the image processing apparatus according to the present invention is a first image processing unit that performs a first image processing, a second image processing unit that performs a second image processing, and the first image processing unit performs the first image processing unit. The control unit may control a difference between a first operation timing to execute image processing and a second operation timing to execute the second image processing by the second image processing unit.
According to this aspect, the difference between the first operation timing at which the first image processing unit executes the first image processing and the second operation timing at which the second image processing unit executes the second image processing can be controlled. It becomes possible to reduce the fluctuation of the power supply voltage due to the difference between the one operation timing and the second operation timing. Therefore, it becomes possible to suppress the operation of the first image processing unit and the second image processing unit becoming unstable due to the fluctuation of the power supply voltage.

In one aspect of the image processing apparatus described above, it is desirable that the first image processing apparatus and the second image processing unit be mounted on a common chip.
According to this aspect, even if the first image processing unit and the second image processing unit are mounted on a common chip, fluctuations in the power supply voltage can be suppressed.

In one aspect of the image processing apparatus described above, it is preferable that the control unit controls a difference between the first operation timing and the second operation timing by delaying the second operation timing.
According to this aspect, it is possible to control the difference between the first operation timing and the second operation timing by delaying the second operation timing.

In one aspect of the image processing apparatus described above, it is preferable that the control unit receives delay amount information related to a delay amount, and determines the delay amount of the second operation timing based on the delay amount information.
According to this aspect, for example, the delay amount of the second operation timing can be determined by externally inputting delay amount information.

In one aspect of the image processing apparatus described above, the first image processing unit is one of one or more third image processing units, and the second image processing unit is configured to receive the second operation timing by the control unit. The third image processing unit according to any one or more of the fourth image processing units to be delayed, wherein the control unit changes a timing delay amount which is a delay amount of the second operation timing. It is desirable to determine the timing delay amount based on the operation state of the four image processing units.
According to this aspect, the timing delay amount is determined based on the actual operation state of the image processing unit when the delay amount of the operation timing of the image processing unit is changed. Therefore, the timing delay amount can be determined in consideration of individual differences of the image processing apparatus.

In one aspect of the image processing apparatus described above, the control unit gradually changes the timing delay amount within a predetermined range, and the third image processing is performed at each of the steps of the change of the timing delay amount. A maximum value of the number of simultaneously operating image processing units operating at the same time in the second image processing unit and the fourth image processing unit, and causing the smallest value among the maximum values of the respective steps within the predetermined range It is desirable to determine the delay amount as the timing delay amount.
The number of simultaneously operating image processing units is likely to affect the current consumption of the image processing apparatus. The current consumption of the image processing apparatus affects the fluctuation of the power supply voltage. Therefore, according to this aspect, it is possible to determine the amount of timing delay based on the current consumption of the image processing apparatus, and further based on the fluctuation of the power supply voltage.

In one aspect of the image processing apparatus described above, the control unit gradually changes the timing delay amount within a predetermined range, and the third image processing is performed at each of the steps of the change of the timing delay amount. The fluctuation range of the number of simultaneously operating image processing units operating at the same time in the unit and the fourth image processing unit is specified, and in the predetermined range, the smallest fluctuation range among the fluctuation ranges of the respective steps is caused. It is desirable to determine the delay amount as the timing delay amount.
The fluctuation range of the number of simultaneously operating image processing units is likely to affect the fluctuation range of the current consumption of the image processing apparatus. The fluctuation range of the current consumption of the image processing apparatus affects the fluctuation of the power supply voltage. Therefore, according to this aspect, it is possible to determine the amount of timing delay based on the fluctuation range of the current consumption of the image processing apparatus, and further based on the fluctuation of the power supply voltage.

In one aspect of the image processing apparatus described above, the control unit counts the number of the simultaneous operation image processing units by weighting according to a load when the simultaneous operation image processing unit executes the image processing. Is desirable.
According to this aspect, it is possible to determine the amount of timing delay in consideration of the load when image processing is performed.

In one aspect of the image processing apparatus described above, the control unit gradually changes the timing delay amount within a predetermined range, and the third image processing is performed at each of the steps of the change of the timing delay amount. A maximum value of the number of simultaneous non-operation image processing units that are inoperative simultaneously in the second image processing unit and the fourth image processing unit, and the third of the maximum values of the steps in the predetermined range It is desirable to determine, as the timing delay amount, a delay amount that causes a value smaller than the total number of the image processing unit and the fourth image processing unit.
The number of simultaneously inactive image processing units is likely to affect the current consumption of the image processing apparatus. The current consumption of the image processing apparatus affects the fluctuation of the power supply voltage. Therefore, according to this aspect, it is possible to determine the amount of timing delay based on the current consumption of the image processing apparatus, and further based on the fluctuation of the power supply voltage.

In one aspect of the image processing apparatus described above, the control unit gradually changes the timing delay amount within a predetermined range, and the third image processing is performed at each of the steps of the change of the timing delay amount. A maximum value of the number of simultaneous non-operation image processing units which are simultaneously inoperative among the image processing unit and the fourth image processing unit, and the maximum value of each step corresponds to the third image processing unit and the fourth image In the case where the total number of processing units matches, the shortest period during which all of the third image processing unit and the fourth image processing unit are the simultaneous non-operation image processing unit is the shortest among the delay amounts of each stage. It is desirable to determine the following delay amount as the timing delay amount.
As the period during which all of the third image processing unit and the fourth image processing unit become the simultaneous non-operation image processing unit is longer, for example, the time of each data enable signal of the third image processing unit and the fourth image processing unit The degree of overlap on the axis is likely to be high. The higher the degree of overlap of the data enable signals on the time axis, the more likely overshoots and undershoots occur in the power supply voltage.
According to this aspect, the delay amount in which the period in which all of the third image processing unit and the fourth image processing unit are in the simultaneous non-operation image processing unit is the shortest is determined as the timing delay amount. Therefore, the occurrence of overshoot and undershoot in the power supply voltage can be suppressed.

In one aspect of the above-described image processing apparatus, it is preferable that the control unit determines the timing delay amount in response to activation of the image processing apparatus.
According to this aspect, it is possible to suppress the fluctuation of the power supply voltage from the start of the image processing apparatus.

One aspect of a display device according to the present invention includes the above-described image processing device.
According to this aspect, the difference between the first operation timing at which the first image processing unit executes the first image processing and the second operation timing at which the second image processing unit executes the second image processing can be controlled. It becomes possible to reduce the fluctuation of the power supply voltage due to the difference between the one operation timing and the second operation timing. Therefore, it becomes possible to suppress the operation of the first image processing unit and the second image processing unit becoming unstable due to the fluctuation of the power supply voltage.

One aspect of a control method of an image processing apparatus according to the present invention executes a first image processing, executes a second image processing, and executes a first operation timing to execute the first image processing and the second image processing. It is characterized by controlling the difference with the 2nd operation timing to perform.
According to this aspect, since the difference between the first operation timing to execute the first image processing and the second operation timing to execute the second image processing can be controlled, the difference between the first operation timing and the second operation timing can be obtained. It is possible to reduce the resulting fluctuation of the power supply voltage. Therefore, the operation of the first image processing and the second image processing can be suppressed from becoming unstable due to the fluctuation of the power supply voltage.

FIG. 1 is a diagram showing a projector 100 according to a first embodiment. FIG. 6 is a view showing an example of a projection unit 7; FIG. 5 is a diagram showing an example of a timing adjustment unit 3; 5 is a flowchart for explaining the operation of the projector 100. FIG. 6 is a diagram showing an example of data enable signals DE1, DE2 and DE3. FIG. 7 is a diagram showing another example of data enable signals DE1, DE2 and DE3.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, the dimensions and the scale of each part are appropriately different from the actual ones. In addition, the embodiments described below are preferable specific examples of the present invention. For this reason, various limitations that are technically preferable are attached to the present embodiment. However, the scope of the present invention is not limited to these embodiments unless specifically described in the following description.

First Embodiment
FIG. 1 is a view showing a projector 100 according to the first embodiment. The projector 100 is an example of a display device.

  The projector 100 includes an image input unit 1, an image processing unit 2, a timing adjustment unit 3, an image processing unit 4, an image processing unit 5, a light valve drive unit 6, and a projection unit 7.

The image input unit 1, the image processing unit 2, the timing adjustment unit 3, the image processing unit 4, the image processing unit 5, and the light valve drive unit 6 are formed as a SoC (System on Chip) 8 . In other words, the image input unit 1, the image processing unit 2, the timing adjustment unit 3, the image processing unit 4, the image processing unit 5, and the light valve drive unit 6 are mounted on one chip (common chip) It is done.
The image processing unit 2, the timing adjustment unit 3, the image processing unit 4, and the image processing unit 5 are included in the image processing apparatus 9.

A power supply voltage is supplied to the image processing apparatus 9, and more specifically, the SoC 8 through a power supply line (not shown). That is, the image input unit 1, the image processing unit 2, the timing adjustment unit 3, the image processing unit 4, the image processing unit 5, and the light valve drive unit 6 have a power supply voltage via a common power supply line. Supplied.
For example, in the image processing apparatus 9, when the image processing units 2, 4 and 5 operate at the same timing, the power supply voltage largely fluctuates, and the fluctuation of the power supply voltage makes the operation of the image processing apparatus 9 unstable. There is a fear.
Therefore, in the present embodiment, the timing adjustment unit 3 is the difference between the operation timing when the image processing unit 2 performs the image processing and the operation timing when the image processing unit 4 performs the image processing, and the image processing unit 2 The difference between the operation timing at which the processing is performed and the operation timing at which the image processing unit 5 executes the image processing is controlled to suppress the instability of the operation of the image processing apparatus 9 due to the fluctuation of the power supply voltage.
The operation timing at which the image processing unit 2 executes the image processing is an example of a first operation timing. The operation timing at which the image processing unit 4 executes the image processing is an example of a second operation timing. The operation timing at which the image processing unit 5 executes the image processing is another example of the second operation timing.

The image input unit 1 receives input image information I0 from a PC (personal computer) 200. The input image information I0 includes an input image signal G0 and a data enable signal DE0. The image input unit 1 outputs the input image information I0 received from the PC 200.
Hereinafter, in order to simplify the description, the input image information I0 output from the image input unit 1 will be referred to as "first image information I1". The input image signal G0 included in the first image information I1 is referred to as a "first image signal G1". The data enable signal DE0 included in the first image information I1 is referred to as "data enable signal DE1".

  The image processing unit 2 is an example of a first image processing unit. The image processing unit 2 is an example of one or more third image processing units whose operation timing is not delayed by the timing adjustment unit 3. The image processing unit 2 executes scaler processing on the first image information I1 received from the image input unit 1 to generate second image information I2. Scaler processing is image processing that adjusts the resolution of an image. Scaler processing is an example of first image processing.

  In the present embodiment, the image processing unit 2 performs scaler processing on the first image signal G1 to generate a second image signal G2 while the data enable signal DE1 is in an active state (for example, an “H” state). The image processing unit 2 generates and outputs second image information I2 including the second image signal G2 and the data enable signal DE1. Hereinafter, in order to simplify the description, the data enable signal DE1 included in the second image information I2 is referred to as a "data enable signal DE2".

  Further, the image processing unit 2 outputs the data enable signal DE 1 to the timing adjustment unit 3. When the data enable signal DE1 is in the active state, the timing adjustment unit 3 determines that the image processing unit 2 is operating (during image processing). Further, when the data enable signal DE1 is in the inactive state (for example, the “L” state), the timing adjustment unit 3 determines that the image processing unit 2 is not in operation (image processing is not performed).

The timing adjustment unit 3 is an example of a control unit. The timing adjustment unit 3 controls the difference between the operation timing at which the image processing unit 2 performs the image processing and the operation timing at which the image processing unit 4 performs the image processing (hereinafter also referred to as “first timing difference”). Furthermore, the timing adjustment unit 3 controls the difference between the operation timing at which the image processing unit 2 executes image processing and the operation timing at which the image processing unit 5 executes image processing (hereinafter also referred to as “second timing difference”). .
Hereinafter, the operation timing at which the image processing unit 2 executes the image processing is also referred to as “operation timing of the image processing unit 2”. Further, the operation timing at which the image processing unit 4 executes the image processing is also referred to as “operation timing of the image processing unit 4”. The operation timing at which the image processing unit 5 executes the image processing is also referred to as “operation timing of the image processing unit 5”.
In the present embodiment, the timing adjustment unit 3 controls the first timing difference and the second timing difference by delaying the second image information I2 received from the image processing unit 2. In this control, the timing adjustment unit 3 controls the first timing difference by delaying the operation timing of the image processing unit 4, and the timing adjustment unit 3 delays the operation timing of the image processing unit 5. 2 means to control the timing difference.

  The image processing unit 4 is an example of a second image processing unit. The image processing unit 4 is an example of one or more fourth image processing units whose operation timing is delayed by the timing adjustment unit 3. The image processing unit 4 executes image quality adjustment processing on the second image information I2 delayed by the timing adjustment unit 3 to generate third image information I3. The image quality adjustment processing is image processing for adjusting the brightness of an image, the contrast of the image, the sharpness of the image, the color tone of the image, and the like. Image quality adjustment processing is an example of second image processing.

  In the present embodiment, the image processing unit 4 performs the image quality adjustment process on the second image signal G2 to generate the third image signal G3 while the data enable signal DE2 is in the active state. The image processing unit 4 generates and outputs third image information I3 including the third image signal G3 and the data enable signal DE2. Hereinafter, in order to simplify the description, the data enable signal DE2 included in the third image information I3 is referred to as a "data enable signal DE3".

  Further, the image processing unit 4 outputs the data enable signal DE 2 to the timing adjustment unit 3. The timing adjustment unit 3 determines that the image processing unit 4 is operating when the data enable signal DE2 is in the active state. Further, when the data enable signal DE2 is in the inactive state, the timing adjustment unit 3 determines that the image processing unit 4 is not in operation.

  The image processing unit 5 is another example of the second image processing unit and another example of the fourth image processing unit. The image processing unit 5 executes color unevenness correction processing on the third image information I3 received from the image processing unit 4 to generate fourth image information I4. Color unevenness correction processing is image processing for correcting color unevenness of an image. Color unevenness correction processing is another example of the second image processing.

  In the present embodiment, while the data enable signal DE3 is in the active state, the image processing unit 5 performs the color non-uniformity correction process on the third image signal G3 to generate the fourth image signal G4. The image processing unit 5 generates and outputs fourth image information I4 including the fourth image signal G4 and the data enable signal DE3. Hereinafter, in order to simplify the description, the data enable signal DE3 included in the fourth image information I4 is referred to as a "data enable signal DE4".

  Further, the image processing unit 5 outputs the data enable signal DE3 to the timing adjustment unit 3. When the data enable signal DE3 is in the active state, the timing adjustment unit 3 determines that the image processing unit 5 is in operation. Further, when the data enable signal DE3 is in the inactive state, the timing adjustment unit 3 determines that the image processing unit 5 is not in operation.

  Each of the input image information I0, the first image information I1, the second image information I2, the third image information I3 and the fourth image information I4 includes a synchronization signal (for example, a vertical synchronization signal and a horizontal synchronization signal). Be

  The light valve drive unit 6 generates a drive signal (for example, a drive voltage signal) D for driving the projection unit 7 based on the fourth image information I4.

  The projection unit 7 projects and displays an image corresponding to the drive signal D on the projection surface 300. The projection unit 7 is an example of a display unit. The projection surface 300 is, for example, a screen or a wall, and is an example of a display surface. The projection surface 300 is not included in the display unit.

  FIG. 2 is a view showing an example of the projection unit 7. The projection unit 7 includes a light source 71, three liquid crystal light valves 72 (72R, 72G, 72B) which are an example of a light modulation device, and a projection lens 73 which is an example of a projection optical system. The projection unit 7 modulates the light emitted from the light source 71 by the liquid crystal light valve 72 to form a display image (image light), and enlarges and projects the display image from the projection lens 73. The display image is displayed on the projection surface 300. The display image which the projection part 7 projects may generally be called a "projection image."

  The light source 71 includes a light source unit 71a including a xenon lamp, an ultrahigh pressure mercury lamp, an LED (Light Emitting Diode), or a laser light source, and a reflector 71b that reduces variation in the direction of light emitted by the light source unit 71a. In the light emitted from the light source 71, the dispersion of the luminance distribution is reduced by an integrator optical system (not shown), and thereafter, red (R) and green (G) which are the three primary colors of light by a color separation optical system (not shown). It is separated into blue (B) color light components. The R, G, and B color light components enter the liquid crystal light valves 72R, 72G, and 72B, respectively.

  The liquid crystal light valve 72 is configured of a liquid crystal panel or the like in which liquid crystal is sealed between a pair of transparent substrates. In the liquid crystal light valve 72, a rectangular pixel area 72a composed of a plurality of pixels 72p arranged in a matrix is formed. The liquid crystal light valve 72 can apply the drive signal D to the liquid crystal for each pixel 72p. When the light valve drive unit 6 (see FIG. 1) applies a drive signal D corresponding to the fourth image information I4 to each pixel 72p, each pixel 72p is set to the light transmittance according to the drive signal D. Therefore, the light emitted from the light source 71 is modulated by transmitting through the pixel area 72a, and a display image according to the drive signal D is formed for each color light.

  The images of the respective colors are combined for each pixel 72p by a color combining optical system (not shown) to generate projected image light (projected image) which is color image light (color image). The projection image light is enlarged and projected onto the projection surface 300 by the projection lens 73.

FIG. 3 is a diagram showing an example of the timing adjustment unit 3 shown in FIG.
The timing adjustment unit 3 can delay the operation timing of the image processing units 4 and 5 without delaying the operation timing of the image processing unit 2. The timing adjustment unit 3 delays the operation timing of the image processing units 4 and 5 based on the operation state of the image processing units 2, 4 and 5 when the delay amount of the operation timing of the image processing units 4 and 5 is changed. Determine the amount. The delay amount of the operation timing of the image processing units 4 and 5 is an example of the timing delay amount.

For example, the timing adjustment unit 3 determines the delay amount of the operation timing of the image processing units 4 and 5 as follows.
The timing adjustment unit 3 changes the delay amount of the operation timing of the image processing units 4 and 5 stepwise within a predetermined range. The timing adjustment unit 3 is an image processing unit (hereinafter referred to as “the image processing units operating simultaneously in the image processing units 2, 4 and 5 at each stage of the change of the delay amount of the operation timing of the image The maximum value of the number of “simultaneous action image processing units” is specified. A specific example of the number of simultaneous motion image processing units will be described later with reference to FIGS. 5 and 6. The timing adjustment unit 3 determines, as a delay amount of the operation timing of the image processing units 4 and 5, the delay amount that causes the minimum value among the maximum values of the respective steps in the predetermined range.

  The timing adjustment unit 3 includes an image input unit 31, a delay unit 32, an image output unit 33, a count unit 34, a storage unit 35, and a delay amount control unit 36.

  The image input unit 31 receives the second image information I2 from the image processing unit 2. The image input unit 31 outputs the second image information I2 to the delay unit 32.

  The delay unit 32 delays the second image information I2. The delay unit 32 is configured by, for example, a buffer such as a static random access memory (SRAM) or a dynamic random access memory (DRAM).

  The image output unit 33 receives the second image information I2 delayed by the delay unit 32. The image output unit 33 outputs the second image information I2 to the image processing unit 4.

Count unit 34 receives data enable signal DE1 from image processing unit 2, receives data enable signal DE2 from image processing unit 4, and receives data enable signal DE3 from image processing unit 5.
The count unit 34 counts the number of data enable signals that are simultaneously in the active state among the data enable signals DE1, DE2, and DE3. Each of the image processing units 2, 4 and 5 performs image processing while the input data enable signal is active. Each of the image processing units 2, 4 and 5 does not execute image processing while the input data enable signal is inactive. Therefore, among the data enable signals DE1, DE2 and DE3, the number of data enable signals that are in the active state at the same time means the number of simultaneously operating image processing units.

  The storage unit 35 is a computer readable recording medium. The storage unit 35 is, for example, a flash memory. The storage unit 35 is not limited to the flash memory and can be appropriately changed. The storage unit 35 stores, for example, a program executed by the delay amount control unit 36 and various information.

  The delay amount control unit 36 is, for example, a computer such as a central processing unit (CPU). The delay amount control unit 36 may be configured by one or more processors. The delay amount control unit 36 controls the delay unit 32 by reading and executing the program stored in the storage unit 35.

  For example, the delay amount control unit 36 controls the delay amount of the second image information I2 in the delay unit 32 based on the count value in the counting unit 34. Here, the delay amount of the second image information I2 means a timing delay amount.

  As an example, the delay amount control unit 36 changes the delay amount of the second image information I2 in the delay unit 32 stepwise, and based on the count value in the count unit 34 in each step, the delay amount control unit 36 in the delay unit 32. The delay amount of the second image information I2 is determined.

  The delay amount control unit 36 changes the delay amount of the second image information I2 in the delay unit 32 each time a predetermined time elapses. The delay amount control unit 36 uses one horizontal scanning period specified by the horizontal synchronization signal as the fixed time. Therefore, the second image information I2 is input to the delay amount control unit 36.

Next, the operation will be described.
FIG. 4 is a flowchart for explaining the operation of the projector 100.
For example, when the power switch (not shown) of the projector 100 is operated to start the projector 100 (or, more specifically, the image processing apparatus 9) in a situation where the input image information I0 is supplied to the projector 100, the delay amount control unit 36 The delay amount of the delay unit 32 is set to "0" (step S1).

  Subsequently, the image input unit 1 receives the input image information I0 and outputs the input image information I0 to the image processing unit 2 as first image information I1.

  The image processing unit 2 performs scaler processing on the first image signal G1 included in the first image information I1 to generate a second image signal G2. The image processing unit 2 separately outputs the second image information I2 including the second image signal G2 and the data enable signal DE1 to the timing adjustment unit 3.

  In the timing adjustment unit 3, the image input unit 31 outputs the second image information I 2 received from the image processing unit 2 to the delay unit 32. The delay unit 32 delays the second image information I2 by the set delay amount (in this case, the delay amount “0”) and outputs the second image information I2 to the image output unit 33. The image output unit 33 outputs the second image information I2 output from the delay unit 32 to the image processing unit 4.

  The image processing unit 4 performs an image quality adjustment process on the second image signal G2 included in the second image information I2 to generate a third image signal G3. The image processing unit 4 outputs the third image information I3 including the third image signal G3 to the image processing unit 5. Further, the image processing unit 4 outputs the data enable signal DE 2 to the timing adjustment unit 3.

  The image processing unit 5 executes color unevenness correction processing on the third image signal G3 included in the third image information I3 to generate a fourth image signal G4. The image processing unit 5 outputs the fourth image information I4 including the fourth image signal G4 to the light valve driving unit 6. The light valve driving unit 6 causes the projection unit 7 to project an image according to the fourth image information I4. Further, the image processing unit 5 outputs the data enable signal DE3 to the timing adjustment unit 3.

  The counting unit 34 receives the data enable signal DE1 from the image processing unit 2, receives the data enable signal DE2 from the image processing unit 4, and receives the data enable signal DE3 from the image processing unit 5 (step S2).

  Subsequently, the counting unit 34 counts the number of data enable signals simultaneously in the active state among the data enable signals DE1, DE2 and DE3, that is, the number of simultaneously operating image processing units. The count unit 34 outputs the count value to the delay amount control unit 36. The delay amount control unit 36 monitors the count value of the count unit 34 during one horizontal scanning period H specified by the horizontal synchronization signal, and measures the maximum value of the count value in one horizontal scanning period H (step S3). ).

  FIG. 5 is a diagram showing an example of the data enable signals DE1, DE2 and DE3 in a situation where the delay amount of the delay unit 32 is "0". The horizontal synchronization signal Hsync is also shown in FIG.

  As shown in FIG. 5, even when the delay amount of the delay unit 32 is "0", the timing Tb when the data enable signal DE1 becomes active, the timing Tc when the data enable signal DE2 becomes active, and the data The timing Td at which the enable signal DE3 is in the active state is different from each other. This is because the data enable signal DE2 has a delay due to the image processing in the image processing unit 2, and the data enable signal DE3 has a delay due to the image processing in the image processing unit 4.

In the example shown in FIG. 5, the number of data enable signals simultaneously in the active state in one horizontal scanning period H, that is, the number of simultaneously operating image processing units changes as follows.
In the period of timing Ta to Tb, the number of simultaneous operation image processing units is “0”.
In the period from timing Tb to Tc, the number of simultaneous operation image processing units is “1”.
In the period from timing Tc to Td, the number of simultaneous operation image processing units is “2”.
In the period from timing Td to Te, the number of simultaneous operation image processing units is “3”.
In the period from timing Te to Tf, the number of simultaneous operation image processing units is “2”.
In the period from timing Tf to Tg, the number of simultaneous operation image processing units is “1”.
In the period from timing Tg to Th, the number of simultaneous operation image processing units is “0”.
Therefore, in the example illustrated in FIG. 5, the delay amount control unit 36 specifies “3” as the maximum value of the count value in one horizontal scanning period H.

  Subsequently, the delay amount control unit 36 records the measurement result in step S3 in the storage unit 35 in association with the delay amount at that time (in this case, the delay amount “0”) (step S4).

Subsequently, when the delay amount set in the delay unit 32 is not the maximum delay amount (step S 5: NO), the delay amount control unit 36 increases the delay amount of the delay unit 32 by “predetermined amount X” (step S6).
Here, as the maximum delay amount, for example, the maximum delay amount that can be executed by the delay unit 32 is used. The maximum delay amount is not limited to the maximum delay amount that can be executed by the delay unit 32, and can be changed as appropriate. The range from the delay amount “0” to the maximum delay amount is an example of a predetermined range. As the predetermined amount X, for example, a period of 1/100 of one horizontal scanning period H is used. The predetermined amount X is not limited to a period of 1/100 of one horizontal scanning period H, and can be appropriately changed.
Subsequently, the process returns to step S2.

  FIG. 6 is a diagram showing an example of the horizontal synchronization signal Hsync and the data enable signals DE1, DE2, and DE3 in a situation where the delay amount of the delay unit 32 is "D1".

In the example shown in FIG. 6, the number of data enable signals simultaneously in the active state in one horizontal scanning period H, that is, the number of simultaneously operating image processing units changes as follows.
In the period from timing Ti to Tj, the number of simultaneous operation image processing units is “2”.
In the period of timings Tj to Tk, the number of simultaneous operation image processing units is “1”.
In the period from timing Tk to Tl, the number of simultaneous operation image processing units is "2".
In the period of timings T1 to Tm, the number of simultaneous operation image processing units is “1”.
In the period of timings Tm to Tn, the number of simultaneous operation image processing units is “2”.
In the period of timing Tn to To, the number of simultaneous operation image processing units is “1”.
In the period from timing To to Tp, the number of simultaneous operation image processing units is “2”.
Therefore, in the example illustrated in FIG. 6, the delay amount control unit 36 measures “2” as the maximum value of the count value in one horizontal scanning period H.
As can be understood by comparing the example shown in FIG. 5 with the example shown in FIG. 6, the maximum value of the simultaneous operation image processing unit in one horizontal scanning period H according to the change of the delay amount in the delay unit 32. Changes.

In step S5, when the delay amount set in the delay unit 32 becomes the maximum delay amount (step S5: YES), the delay amount control unit 36 determines, among the measurement results (maximum value) recorded in the storage unit 35, Identify the minimum measurement result (minimum value).
Subsequently, the delay amount control unit 36 sets in the delay unit 32 the delay amount corresponding to the minimum measurement result, that is, the delay amount that has caused the minimum value among the maximum values of the respective stages where the delay amount is changed. It is determined as the delay amount to be set (step S7).
Subsequently, the delay amount control unit 36 sets the delay amount determined in step S7 in the delay unit 32 (step S8).

  According to the image processing apparatus 9, the projector 100, and the control method of the image processing apparatus 9 according to the present embodiment, since the first timing difference and the second timing difference can be controlled, it is caused by the first timing difference and the second timing difference It is possible to reduce the fluctuation of the power supply voltage. Therefore, the operation of the image processing apparatus 9 can be suppressed from becoming unstable due to the fluctuation of the power supply voltage.

  Further, in the present embodiment, the delay amount in the delay unit 32 is determined based on the actual operation state of the image processing units 2, 4 and 5 when the delay amount of the operation timing of the image processing units 4 and 5 is changed. It is determined. Therefore, it is possible to determine the delay amount in the delay unit 32 in consideration of the individual differences of the image processing units 2, 4 and 5.

  Further, in the present embodiment, the amount of delay in the delay unit 32 is determined based on the number of simultaneous operation image processing units. The number of simultaneously operating image processing units is likely to affect the current consumption of the image processing apparatus 9. The current consumption of the image processing apparatus affects the fluctuation of the power supply voltage. Therefore, it is possible to determine the delay amount in the delay unit 32 based on the current consumption of the image processing device 9 and, further, based on the fluctuation of the power supply voltage.

<Modification>
The present invention is not limited to the embodiment described above, and various modifications as described below are possible, for example. In addition, one or a plurality of modifications arbitrarily selected from the embodiments of the modifications described below can be combined as appropriate.

<Modification 1>
The delay amount control unit 36 may receive delay amount information indicating the delay amount set by the user, and determine the delay amount (timing delay amount) in the delay unit 32 as the delay amount indicated by the delay amount information .
For example, the delay amount control unit 36 has a manual mode and an automatic mode as an operation mode, and in the case of the manual mode, when the projector 100 (or, more specifically, the image processing apparatus 9) is activated, The delay amount indicated by the received delay amount information is determined as the delay amount of the delay unit 32. On the other hand, in the case of the automatic mode, the delay amount control unit 36 executes the process shown in FIG.
According to the first modification, it is possible for the user to adjust the delay amount of the delay unit 32.

<Modification 2>
Steps S3 and S7 shown in FIG. 4 may be modified as follows.

  The delay amount control unit 36 executes a process of specifying the fluctuation range of the count value in one horizontal scanning period H instead of step S3. The delay amount control unit 36 uses the fluctuation range specified in this process instead of the measurement result of step S3. For example, in the example shown in FIG. 5, the fluctuation range is “3” of “0” to “3”, and in the example shown in FIG. 6, the fluctuation range is “1” of “1” to “2”.

  The delay amount control unit 36 specifies the smallest fluctuation range among the measurement results (variation width) recorded in the storage unit 35 instead of step S7, and the delay amount that caused the minimum fluctuation range Execute processing to determine as the delay amount to be set to 32.

  According to the second modification, the delay amount in the delay unit 32 is determined based on the fluctuation range of the number of simultaneous operation image processing units. The fluctuation range of the number of simultaneous operation image processing units is likely to affect the fluctuation range of the current consumption of the image processing apparatus 9. The fluctuation range of the current consumption of the image processing apparatus 9 affects the fluctuation of the power supply voltage. Therefore, it is possible to determine the delay amount in the delay unit 32 based on the fluctuation range of the current consumption of the image processing apparatus 9 and, further, based on the fluctuation of the power supply voltage.

<Modification 3>
In the embodiment and the modification 2 described above, the timing adjustment unit 3 counts the number of simultaneous operation image processing units by weighting according to the load when the simultaneous operation image processing unit executes the image processing. Good.

For example, when the image processing unit 2 using the data enable signal DE1 performs the image processing, the count unit 34 uses the data enable signal DE1 for “1” instead of “1” as the number of data enable signals DE1 in the active state. Use numerical values with appropriate weights. Furthermore, the count unit 34 sets the load when the image processing unit 4 using the data enable signal DE2 performs image processing to “1” instead of “1” as the number of data enable signals DE2 in the active state. Use numerical values with appropriate weights. Furthermore, the count unit 34 does not use “1” as the number of data enable signals DE3 in the active state, and the load when the image processing unit 5 using the data enable signal DE3 performs image processing on “1”. Use numerical values with appropriate weights.
For example, when the relationship between the load sizes of the image processing units 2, 4 and 5 is 2: 1: 3, "2", "1", "3" are used as the weights of the data enable signals DE1, DE2 and DE3. Is used.

  According to the third modification, it is possible to determine the delay amount in the delay unit 32 in consideration of the load when the image processing unit executes the image processing.

<Modification 4>
Count unit 34 counts not the number of data enable signals simultaneously in active state but the number of data enable signals simultaneously in inactive state, and delay amount control unit 36 simultaneously becomes inactive. The amount of delay in the delay unit 32 may be determined based on the number of data enable signals. Here, the number of data enable signals in the inactive state at the same time is the image processor (hereinafter referred to as "simultaneous inactive image processor") in the image processors 2, 4 and 5 which are simultaneously inactivated. Also referred to as

In this case, in step S3 shown in FIG. 4, the delay amount control unit 36 counts the count value in one horizontal scanning period H (the number of data enable signals that are in the inactive state at the same time, To measure the maximum value of
Then, instead of step S7, the delay amount control unit 36 sets a value smaller than the total number “3” of the image processing units 2, 4 and 5 among the measurement results (maximum value) recorded in the storage unit 35. A process of determining the amount of delay caused as the amount of delay set in the delay unit 32 is executed.

  Here, when there are a plurality of values smaller than the total number “3” in the measurement results, the delay amount control unit 36, for example, determines the delay amount that caused the smallest value among the measurement results (maximum value). The delay amount is set as the delay amount to be set in the delay unit 32.

  When all the measurement results agree with the total number “3”, the delay amount control unit 36 minimizes the period in which all of the image processing units 2, 4 and 5 become the simultaneous non-operational image processing unit. The delay amount is determined as the delay amount to be set in the delay unit 32.

According to the fourth modification, the delay amount in the delay unit 32 is determined based on the number of simultaneous non-operational image processing units. The number of simultaneously inactive image processing units is likely to affect the current consumption of the image processing apparatus 9. The current consumption of the image processing apparatus affects the fluctuation of the power supply voltage. Therefore, it is possible to determine the delay amount in the delay unit 32 based on the current consumption of the image processing device 9 and, further, based on the fluctuation of the power supply voltage.
Further, as the period in which the image processing units 2, 4 and 5 become the simultaneous non-operation image processing unit is longer, for example, the degree of overlapping of the data enable signals DE1, DE2 and DE3 on the time axis becomes higher. The higher the degree of overlap of the data enable signals on the time axis, the more likely overshoots and undershoots occur in the power supply voltage. Therefore, according to the fourth modification, the occurrence of overshoot and undershoot in the power supply voltage can be suppressed.

<Modification 5>
Although the image processing unit 2 is used as an example of the third image processing unit in which the operation timing is not delayed by the timing adjustment unit 3, the number of third image processing units may be plural. When a plurality of third image processing units are used, the plurality of third image processing units may be connected in series or in parallel with each other.
Although the image processing units 4 and 5 are used as an example of the fourth image processing unit whose operation timing is delayed by the timing adjustment unit 3, the number of fourth image processing units may be “1” or “three or more It may be a number. When a plurality of fourth image processing units are used, the plurality of fourth image processing units may be connected to one another in series or in parallel.

<Modification 6>
In the timing adjustment unit 3, each of the count unit 34, the storage unit 35, and the delay amount control unit 36 may be mounted on a chip different from the SoC 8.

<Modification 7>
Although the liquid crystal light valve is used as the light modulation device in the projection unit 7, the light modulation device is not limited to the liquid crystal light valve, and can be appropriately changed. For example, the light modulation device may be configured to use three reflective liquid crystal panels. The light modulation device may be configured as a method using one liquid crystal panel, a method using three digital mirror devices (DMD), a method using one digital mirror device, or the like. When only one liquid crystal panel or DMD is used as the light modulation device, members corresponding to the color separation optical system or the color combining optical system are not necessary. Moreover, the structure which can modulate the light which the light source emitted besides a liquid crystal panel and DMD is employable as a light modulation apparatus.

<Modification 8>
Although a projector is used as the display device, the display device is not limited to the projector, and can be appropriately changed. For example, the display may be a direct view display. In this case, instead of the projection unit 7, for example, a direct view type display unit such as a liquid crystal display is used.

<Modification 9>
The delay amount control unit 36 may be realized by hardware by an electronic circuit such as, for example, a field programmable gate array (FPGA) or an application specific IC (ASIC), or may be realized by cooperation of software and hardware. Good.
Also, the counting unit 34 and the delay amount control unit 36 may be realized by a computer (for example, a processor) that reads and executes a program.

DESCRIPTION OF SYMBOLS 1 ... image input part, 2 ... image processing part, 3 ... timing adjustment part, 4,5 ... image processing part, 6 ... light valve drive part, 7 ... projection part, 31 ... image input part, 32 ... delay part, 33 ... image output unit, 34 ... count unit, 35 ... storage unit, 36 ... delay amount control unit.

Claims (13)

A first image processing unit that executes first image processing;
A second image processing unit that executes a second image processing;
A control unit configured to control a difference between a first operation timing at which the first image processing unit executes the first image processing and a second operation timing at which the second image processing unit executes the second image processing;
An image processing apparatus comprising: The image processing apparatus according to claim 1, wherein the first image processing unit and the second image processing unit are mounted on a common chip. The image processing apparatus according to claim 1, wherein the control unit controls a difference between the first operation timing and the second operation timing by delaying the second operation timing. The image processing apparatus according to claim 3, wherein the control unit receives delay amount information related to a delay amount, and determines the delay amount of the second operation timing based on the delay amount information. The first image processing unit is one of one or more third image processing units,
The second image processing unit is one of one or more fourth image processing units whose second operation timing is delayed by the control unit,
The control unit determines the timing delay amount based on the operation state of the third image processing unit and the fourth image processing unit when the timing delay amount which is the delay amount of the second operation timing is changed. The image processing apparatus according to claim 3, characterized in that: The control unit
The timing delay amount is stepwise changed within a predetermined range,
At each stage of the change in the amount of timing delay, at this stage, the maximum value of the number of simultaneously operating image processors operating simultaneously among the third image processor and the fourth image processor is specified;
The image processing apparatus according to claim 5, wherein a delay amount that causes a minimum value among the maximum values of the respective steps in the predetermined range is determined as the timing delay amount. The control unit
The timing delay amount is stepwise changed within a predetermined range,
At each stage of the change in the amount of timing delay, at this stage, the fluctuation range of the number of simultaneously operating image processors operating simultaneously among the third image processor and the fourth image processor is specified,
The image processing apparatus according to claim 5, wherein a delay amount that causes a minimum fluctuation range among the fluctuation ranges of each step in the predetermined range is determined as the timing delay amount. 8. The control method according to claim 6, wherein the control unit counts the number of the simultaneous motion image processing units according to a load corresponding to a load when the simultaneous motion image processing unit executes the image processing. Image processing apparatus as described. The control unit
The timing delay amount is stepwise changed within a predetermined range,
At each stage of the change in the amount of timing delay, at this stage, the maximum value of the number of simultaneously inactive image processors which are simultaneously inactivated in the third image processor and the fourth image processor is selected. Identify
The amount of delay that caused a smaller value than the total number of the third image processing unit and the fourth image processing unit in the maximum value of each step in the predetermined range is determined as the timing delay amount. The image processing apparatus according to claim 5, characterized in that The control unit
The timing delay amount is stepwise changed within a predetermined range,
At each stage of the change in the amount of timing delay, at this stage, the maximum value of the number of simultaneously inactive image processors which are simultaneously inactivated in the third image processor and the fourth image processor is selected. Identify
In the case where the maximum value of each step matches the total number of the third image processing unit and the fourth image processing unit, the delay amount of each step is determined by the third image processing unit and the fourth image processing unit. The image processing apparatus according to claim 5, wherein a delay amount in which a period during which all are in the simultaneous non-operation image processing unit is shortest is determined as the timing delay amount. The image processing apparatus according to any one of claims 5 to 10, wherein the control unit determines the timing delay amount according to activation of the image processing apparatus. A display device comprising the image processing device according to any one of claims 1 to 11. Execute the first image processing,
Execute the second image processing,
A control method of an image processing apparatus, comprising: controlling a difference between a first operation timing to execute the first image processing and a second operation timing to execute the second image processing.

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