JP2019015983A - Display device, method of controlling display of display device, and control program - Google Patents

Abstract

To provide a display device, a method for controlling the display device, a control program, and an electronic apparatus that can suppress electricity consumption to improve driving time for an electronic apparatus while satisfactorily providing various types of information to users.SOLUTION: In an electronic apparatus 10, two operating circuit parts 100 and 200 with different processing capacities are connected to a driver circuit 420 via individual interfaces I/F(A) and I/F(B). The driver circuit 420 is configured to sequentially overwrite image data separately written from the operating circuit parts 100 and 200. Further, a predetermined image is displayed in a display panel 410 on the basis of image data generated by the operating circuit part 100. Moreover, a specific image involving continuous update or change is displayed in a specific region 416 of the display region of the display panel 410 on the basis of image data generated by the operating circuit part 200, and the operating circuit part 100 is set to be in an electric power saving mode during the display of the specific image.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a display device that displays various types of information, and more particularly, to a display device provided in an electronic device worn or carried by a user, a display control method thereof, and a control program.

  2. Description of the Related Art In recent years, various products have been developed and marketed for wearing on the human body and recording and analyzing various data during exercise such as running, cycling, swimming, trekking, and daily life. Portable electronic devices such as mobile phones, smartphones (high-function mobile phones), and tablet terminals are also widely used. Most of such devices are equipped with a display device for providing various information to the user.

  For example, Patent Literature 1 and Patent Literature 2 are equipped with a function to display various data collected on the user's body, collected during exercise, or analyzed on a display device and provided to the user. A so-called sports watch is disclosed.

JP 2013-143996 A JP 2013-140158 A

  In recent wearable and portable electronic devices such as the above-mentioned sports watches and smart phones, sensors such as acceleration sensors, gyro sensors (angular velocity sensors), and positioning sensors such as GPS (Global Positioning System) And various data communication functions. These sensors and communication functions are set to always operate when the electronic device is carried or used, and various information acquired by the sensors is displayed to the user through the display device. Provided from time to time in form. Thereby, the user can grasp | ascertain an own exercise state, a movement path | route, etc. easily.

  However, in such an electronic device, when the latest information or the like is frequently displayed on the display device or when a smooth moving image or animation is displayed, generally, in an arithmetic processing circuit (processor) that drives and controls the display device. Processing load increases and power consumption increases. Therefore, there has been a problem that the driving time of an electronic device such as a sports watch driven by a battery becomes very short.

  Accordingly, in view of the above-described problems, the present invention provides a display device capable of suppressing power consumption and improving the driving time of an electronic device while providing various kinds of information to users, and the display thereof. An object is to provide a control method and a control program.

One embodiment of the present invention provides:
A display unit (400) for displaying image data;
A first arithmetic processing circuit (100);
A second arithmetic processing circuit (200) that consumes less power than the first arithmetic processing circuit (100);
The first arithmetic processing circuit (100) and the second arithmetic processing circuit (200) are connected to each other by individual signal lines, and the first interface (A) and the second interface (B) having different standards are connected. A driver circuit (420) having a built-in frame memory accessed via
The driver circuit (420) is in a state where image data from one of the first arithmetic processing circuit (100) and the second arithmetic processing circuit (200) is written in the frame memory. From the image data already written in the frame memory, the latter is overwritten so that the latter image data becomes valid and the address is specified when the image data is written. Configured so that only the image data of the address to be overwritten is overwritten,
Image data for one screen generated by the first arithmetic processing circuit (100) is sequentially transmitted via the first interface (A) and stored in the frame memory of the driver circuit (420). The image data stored in the frame memory includes a first display state in which a predetermined image is displayed on the entire display area of the display unit (400) by the driver circuit (420);
When the predetermined image is switched according to an application or an input operation, the first arithmetic processing circuit (100) is configured such that the image after the switching is an image having a capacity smaller than a predetermined number, If the change is less than a predetermined image, the image processing device generates an image data and shifts to a power saving state in which most functions including the operation of writing to the driver circuit (420) are suspended, and the second arithmetic processing circuit ( 200) generates image data for a specific area in which a specific image that is continuously updated or changed is displayed among the images displayed in the entire display area of the display unit (400), and designates an address. Sequentially write to the frame memory of the driver circuit (420) via the second interface (B), and add the address specified in the frame memory. Scan image data is overwritten, and a second display state in which the image is rewritten only for a specific area in the display area of the display unit (400),
It is a display device characterized by having.

  ADVANTAGE OF THE INVENTION According to this invention, while providing various information favorably to a user, consumption of electric power can be suppressed and the drive time of an electronic device can be improved.

It is a schematic perspective view which shows the specific example of the electronic device provided with the display apparatus which concerns on this invention. It is a schematic block diagram which shows 1st Embodiment of the electronic device provided with the display apparatus which concerns on this invention. It is a timing chart which shows an example of the control method of the display apparatus which concerns on 1st Embodiment, and a figure which shows the example of the screen display of the display panel in each timing. It is a figure which shows the other example of the screen display of the display panel in the display apparatus which concerns on 1st Embodiment. It is a schematic block diagram which shows the comparative example for demonstrating the effect of 1st Embodiment. It is a timing chart which shows the control method in a comparative example, and a figure which shows the example of a screen display. It is a schematic block diagram which shows 2nd Embodiment of the electronic device provided with the display apparatus which concerns on this invention. It is a figure which shows the example of the screen display in the display apparatus which concerns on 2nd Embodiment.

Hereinafter, a display device, a display control method thereof, and a control program according to the present invention will be described in detail with reference to an embodiment of an electronic apparatus including the display device.
<First Embodiment>
(Display device, electronic equipment)
FIG. 1 is a schematic perspective view showing a specific example of an electronic apparatus provided with a display device according to the present invention. FIG. 2 is a schematic block diagram showing a first embodiment of an electronic apparatus provided with a display device according to the present invention.

  An electronic apparatus 10 including a display device according to the present invention has a configuration including a display panel 40 for displaying at least various kinds of information, as shown in FIGS. . Here, for example, as shown in FIG. 1A, the electronic device 10 is a sports watch or smart watch having a wristwatch type or wristband type appearance and worn on the body of a user (user). Also good. Further, the electronic device 10 may be, for example, a smartphone or a mobile phone as shown in FIG. 1B, or various mobile devices (for example, GPS logger) used outdoors as shown in FIG. 1C. It may be. 1A to 1C, reference numeral 20 denotes an input operation unit such as a button switch, and reference numeral 30 denotes an output unit such as a speaker or a buzzer.

  Specifically, the electronic apparatus 10 according to the present embodiment, for example, as illustrated in FIG. 2, includes two sets of arithmetic circuit units (first arithmetic processing circuits) 100 and an arithmetic circuit unit (second arithmetic processing circuits). 200. At least an input operation unit (detection unit) 120, a memory unit 140, a light source unit 300, and a display unit 400 are connected to the arithmetic circuit unit 100. Further, at least a sensor unit (detection unit) 210, an input operation unit (detection unit) 220, an output unit 230, a memory unit 240, and a display unit 400 are connected to the arithmetic circuit unit 200.

The arithmetic circuit unit 100 is an arithmetic device such as a CPU (central processing unit) or MPU (microprocessor), and executes a predetermined control program or algorithm program in accordance with an operation signal in the input operation unit 120. Control, display of various types of information on the display unit 400 described later, and the like are controlled. The arithmetic circuit unit 100 is connected to the display unit 400 via an interface corresponding to a standard having a relatively high data transfer speed, such as a serial interface such as MIPI (Mobile Industry Processor Interface) or various parallel interfaces. Then, by transmitting / receiving a predetermined signal including image data generated in the arithmetic circuit unit 100 to / from the display unit 400, a predetermined image is displayed on the display unit 400. In addition, the arithmetic circuit unit 100 includes a cooperative communication unit 150, and transmits and receives a predetermined cooperative signal to and from the arithmetic circuit unit 200, which will be described later, so that at least the display unit 400 cooperates and synchronizes with the arithmetic circuit unit 200. Control the display state of. The cooperative communication unit 150 has a connection port of a synchronous serial communication standard such as UART (Universal Asynchronous Receiver Transmitter) and I ² C (Inter-Integrated Circuit), for example. A predetermined cooperation signal for controlling the display state on the display unit 400 is transmitted and received.

  Here, the arithmetic circuit unit 100 applied to the present embodiment has at least a processing capability capable of controlling high-performance display on the display unit 400. Here, in the present embodiment, high-functional display means, for example, an image or screen with a large capacity of image data, such as a high-definition color image, a smooth moving image or animation display, or a visual effect such as a transition effect. This refers to the display of images with a large number of display updates (update frequency) and changes (movements). That is, an arithmetic circuit having a relatively high processing capability is applied to the arithmetic circuit unit 100. Such an arithmetic circuit generally consumes a large amount of power because various processing operations are performed at a high operating frequency. In other words, this means that an arithmetic circuit (high power, high performance processor) having a relatively high processing capacity and high power consumption needs to be applied as the arithmetic circuit unit 100. In the present embodiment, the arithmetic circuit unit 100 has a relatively high operating frequency of, for example, about several hundred MHz to 1 GHz in order to realize image writing at a relatively high frame rate of, for example, 30 fps or 60 fps. Apply. Here, the control program and algorithm program executed in the arithmetic circuit unit 100 may be stored in the memory unit 140 or may be incorporated in the arithmetic circuit unit 100 in advance. Also good.

  The input operation unit 120 is an input unit such as a touch panel disposed on the visual field side of a display panel (corresponding to the display panel 40 shown in FIGS. 1A to 1C) provided in the display unit 400 described later. Various operation signals resulting from user input operations are output to the arithmetic circuit unit 100. Thereby, in the arithmetic circuit unit 100, selection and setting of items and information to be displayed on the display unit 400 are performed.

  The memory unit 140 stores data used when a predetermined control program or algorithm program is executed in the arithmetic circuit unit 100, data generated at that time, data to be displayed on the display unit 400, and the like. The memory unit 140 may store a control program or an algorithm program executed in the arithmetic circuit unit 100. Note that a part or all of the memory unit 140 may have a form as a removable storage medium such as a memory card, and may be configured to be detachable from the electronic device 10.

  Similar to the arithmetic circuit unit 100 described above, the arithmetic circuit unit 200 is an arithmetic device such as a CPU or MPU, and by executing a predetermined control program or algorithm program, a sensing operation or input operation in the sensor unit 210 is performed. The processing operation according to the operation signal in the unit 220, the provision of various types of information in the output unit 230, the display of various types of information in the display unit 400 described later, and the like are controlled. The arithmetic circuit unit 200 is connected to the display unit 400 via an interface corresponding to a standard with a relatively low data transmission speed, such as SPI (Serial Peripheral Interface), and includes image data generated by the arithmetic circuit unit 200. By transmitting / receiving a predetermined signal to / from the display unit 400, a predetermined image is displayed on the display unit 400. The arithmetic circuit unit 200 includes a cooperative communication unit 250 having a configuration equivalent to that of the cooperative communication unit 150 provided in the arithmetic circuit unit 100 described above, and sends a predetermined cooperative signal to the arithmetic circuit unit 100 described above. By transmitting and receiving, at least the display state of the display unit 400 is controlled in cooperation with and in synchronization with the arithmetic circuit unit 100.

  Here, the arithmetic circuit part 200 applied to this embodiment should just have the processing capability of the grade which can control the sensor part 210 etc. which perform a sensing operation periodically. That is, the arithmetic circuit unit 200 can use an arithmetic circuit with relatively low processing capability. Since such an arithmetic circuit generally has only to execute a processing operation at a low operating frequency, power consumption can be kept low. In other words, as the arithmetic circuit unit 200, an arithmetic circuit (low power) that is already provided in the electronic device 10 for uses such as a watch that continues to operate at all times and has relatively low processing capability and low power consumption. Means that a low performance processor) can be applied. In the present embodiment, as the arithmetic circuit unit 200, for example, in order to realize a good sensing operation in the sensor unit 210, one having a relatively low operating frequency, for example, about several MHz to several tens MHz is applied. That is, the arithmetic circuit unit 200 has a lower operating frequency than that of the arithmetic circuit unit 100, and thus the arithmetic circuit unit 200 when the arithmetic circuit unit 200 and the arithmetic circuit unit 100 are operated under the same conditions. Power consumption is reduced. Here, the control program and the algorithm program executed in the arithmetic circuit unit 200 may be stored in the memory unit 240 or may be incorporated in the arithmetic circuit unit 200 in advance. Also good.

  The sensor unit 210 is, for example, a sensor unit such as an acceleration sensor, a gyro sensor, a geomagnetic sensor, an atmospheric pressure sensor, a temperature / humidity sensor, a pulse sensor, a heart rate sensor, or a positioning unit including a GPS receiver, Various physical, biological, and geographical data in daily life (hereinafter collectively referred to as “sensor data”) are acquired and output to the arithmetic circuit unit 200. Here, the sensors such as an acceleration sensor, a gyro sensor, and a geomagnetic sensor execute a sensing operation at a cycle of 100 times or more per second (a sampling frequency of 100 Hz or more), for example, during the user's movement, and the sensor circuit 200 Output to. Moreover, the positioning means by GPS executes a sensing operation at a cycle of about once every 1 to several seconds, for example, and outputs positioning data to the arithmetic circuit unit 200.

  The input operation unit 220 is input means such as a button switch, a slide switch, or a microphone provided in the casing of the electronic device 10 (corresponding to the input operation unit 20 shown in FIGS. 1A to 1C). Yes, various operation signals resulting from user input operations are output to the arithmetic circuit unit 200. Thereby, in the arithmetic circuit unit 200, setting and control of the sensing operation in the sensor unit 210 described above, selection and setting of items and information displayed on the display unit 400, and the like are performed.

  The output unit 230 is an acoustic unit such as a buzzer or a speaker, or a vibrating unit such as a vibration motor or a vibrator. The output unit 230 is a predetermined tone color or sound pattern, sound information such as a voice message, or a predetermined vibration pattern or its strength. By generating the vibration information, various information is provided or notified to the user through hearing or touch. Here, the output unit 230 may generate predetermined sound information and vibration information in conjunction with various types of information displayed on the display unit 400 described later.

  The memory unit 240 stores sensor data and the like acquired by the sensor unit 210 in a predetermined storage area. The memory unit 240 stores data used when a predetermined control program or algorithm program is executed in the arithmetic circuit unit 200, data generated at that time, and the like. The memory unit 240 may store a control program or an algorithm program executed in the arithmetic circuit unit 200. Note that the memory unit 240 may be configured integrally with the memory unit 140 connected to the arithmetic circuit unit 100 described above.

  Although not shown, the light source unit 300 includes a backlight and a backlight driving circuit. The light source unit 300 includes a backlight and a backlight driving circuit. The light source unit 300 includes a backlight and a backlight driving circuit. Controls the light emission state. The backlight is disposed on the back side of the transmissive display panel (on the side opposite to the user's field of view). For example, the backlight includes a plurality of LEDs (light emitting elements) and various optical members such as a light guide plate and a light diffusion film. The surface light source used is applied. Based on the control signal output from the arithmetic circuit unit 100, the backlight driving circuit controls the lighting (ON) and extinguishing (OFF) states of the backlight and the light emission luminance. Note that the backlight drive circuit controls the light emission state of the backlight based on a control signal from the arithmetic circuit unit 200 that operates in cooperation with the arithmetic circuit unit 100 in addition to the control signal from the arithmetic circuit unit 100. It may be a thing.

  As shown in FIG. 2, the display unit 400 includes a transmissive display panel (first display panel) 410 and a driver circuit (indicated as “driver IC” in the figure) 420 incorporating a frame memory. ing. As the display panel 410, for example, a transmissive TFT (Thin Film Transistor) color liquid crystal panel can be applied, and various kinds of information generated in the arithmetic circuit unit 100 and the arithmetic circuit unit 200 are displayed in a predetermined form. Here, in the present embodiment, the display panel 410 is controlled by the driver circuit 420 so as to realize a highly functional display. The driver circuit 420 has a plurality of interfaces for receiving predetermined signals including image data from each of the arithmetic circuit unit 100 and the arithmetic circuit unit 200 via individual signal lines. Specifically, the driver circuit 420 is connected to the arithmetic circuit unit 100 via a serial interface such as MIPI or a parallel interface (denoted as “I / F (A)” in the drawing), and also, for example, an SPI or the like. Are connected to the arithmetic circuit unit 200 via a serial interface (denoted as “I / F (B)” in the figure). In particular, in the present embodiment, the driver circuit 420 sequentially overwrites and saves image data and the like transmitted via the individual interfaces in a built-in frame memory. That is, when image data from one of the arithmetic circuit unit 100 and the arithmetic circuit unit 200 is written in the frame memory and image data is written from the other, the latter image data is overwritten so that it becomes valid. Saved. Here, by designating an address when writing image data, only the image data at the corresponding address is overwritten among the image data already written in the frame memory. Note that the timing at which image data is transmitted from each of the arithmetic circuit unit 100 and the arithmetic circuit unit 200 to the driver circuit 420 is that the arithmetic circuit unit 100 and the arithmetic circuit unit 200 transmit and receive a cooperative signal to cooperate with each other. It is controlled by synchronizing.

  Thus, in the present embodiment, based on the characteristics of the transmissive color display panel, in a state where a predetermined color image or a moving image based on the image data generated by the arithmetic circuit unit 100 is displayed on the display panel 410, By turning on the backlight provided on the back side, a high-luminance color image or the like is projected and visually recognized by the user. When the data capacity of the image displayed on the display panel 410 is small (small), or when the number of screen display updates (update frequency) or change (movement) is small, the arithmetic circuit unit 100 according to the display state. And the arithmetic circuit unit 200 cooperates and synchronizes, and the specific image (specific image) based on the image data generated by the arithmetic circuit unit 200 is displayed in the specific display area (specific area) in which the address is specified. The method for displaying an image on the display unit 400 will be described in detail later.

  And each structure mentioned above implement | achieves each function with the drive electric power supplied from the power supply part 500, as shown in FIG. Here, in the portable electronic device 10, for example, a primary battery such as a commercially available coin-type battery or button-type battery, or a secondary battery such as a lithium ion battery or a nickel metal hydride battery is applied to the power source unit 500. In addition to the primary battery and secondary battery described above, the power supply unit 500 can be used alone or in combination with a power source using energy harvesting technology that generates power using energy such as vibration, light, heat, and electromagnetic waves. You may apply.

  In the present embodiment, as shown in FIG. 2, the arithmetic circuit unit 100 and the arithmetic circuit unit 200 are illustrated as separate configurations, but the present invention is not limited to this configuration. The arithmetic circuit unit 100 and the arithmetic circuit unit 200 may be, for example, in the form of a system-on-a-chip (SOC) and mounted and integrated on a single semiconductor. Good. Also in this case, interfaces I / F (A) and I / F (B) for connecting the respective arithmetic circuit units 100 and 200 and the display unit 400 and transmitting and receiving predetermined signals are individually provided.

  Although not shown in the above-described embodiment (FIG. 2), the arithmetic circuit unit 100 and the arithmetic circuit unit 200 include devices provided outside the electronic device 10 (hereinafter referred to as “external devices”). And a communication interface unit (hereinafter abbreviated as “communication I / F unit”) that transmits and receives various data and signals by a predetermined communication method using wired or wireless communication. . Here, a communication I / F unit is provided in the (high-power, high-performance) arithmetic circuit unit 100, and data and the like are exchanged with an external device (for example, a high-performance information processing device such as a smartphone or a personal computer) by wireless communication. Wireless communication system that can transmit and receive relatively large amounts of data at high speed, such as Bluetooth (registered trademark) communication and Wi-Fi (wireless fidelity (registered trademark)) communication. Applies. On the other hand, a communication I / F unit is provided in the arithmetic circuit unit 200 (of low power and low performance), and data and the like are transmitted to and received from an external device (for example, a sensor device attached to another part of the body) by wireless communication. In this case, for example, a low-power-consumption wireless communication method such as Bluetooth® low energy (LE) communication is applied.

(Control method of display device)
Next, a display device control method applied to the electronic apparatus according to the present embodiment will be described. Here, when the user wears or carries the portable electronic device 10 as shown in FIG. 1 and performs exercise such as running or walking and daily life, various information is displayed on the display panel 40. A control method for displaying and providing will be described. Here, a series of processing operations shown below is realized by executing a predetermined algorithm program in the arithmetic circuit unit 100 and the arithmetic circuit unit 200.

  FIG. 3 is a timing chart showing an example of the control method of the display device according to the present embodiment, and a diagram showing an example of screen display on the display panel at each timing. Here, description will be made with reference to the configuration of the electronic device (see FIG. 2) as appropriate. FIG. 4 is a diagram showing another example of the screen display of the display panel in the display device according to the present embodiment.

  In the control method of the display device according to the present embodiment, first, in the electronic device 10 worn (or carried) on the user's body, when the operation power is turned on, the driving power is supplied from the power supply unit 500, for example, As shown in (a) of the timing chart in the lower part of FIG. 3, a normal operation for performing high function display is executed. In this normal operation, image data for one screen of the display panel 410 generated by the arithmetic circuit unit 100 is sequentially transmitted via the interface I / F (A) and stored in the frame memory of the driver circuit 420. . The image data stored in the frame memory is output to the display panel 410 by the driver circuit 420 at a predetermined frame rate, and a predetermined high function image is displayed on the entire display area of the display panel 410. Here, in the high function display, for example, as shown in (a) of the screen display in the upper part of FIG. 3, a high function image 412 is displayed. At this time, the arithmetic circuit unit 100 controls the backlight of the light source unit 300 provided on the back side of the display panel 410 to be in a lighting state. As a result, when the backlight light is irradiated from the back side of the display panel 410, the high-function image 412 displayed on the display panel 410 is projected onto the user's visual field side and viewed.

  Next, in the above-described high function display, as shown in (b) of the timing chart in the lower part of FIG. 3 and (b) of the screen display in the upper part of FIG. 3, for example, an application executed in the electronic device 10 or an input by the user When an image is switched by an operation (abbreviated as “user operation” in FIG. 3), the arithmetic circuit unit 100 displays a predetermined image corresponding to the application or input operation. Here, the input operation by the user is, for example, when the user consciously operates the touch panel of the input operation unit 120, the button switch of the input operation unit 220, or the like, or is in a stationary state (for example, a state where the user is stationary on the table) It corresponds to an operation of lifting the electronic device 10 in the above) or giving a specific vibration, impact, inclination or the like. The operation on the touch panel of the input operation unit 120 is directly detected by the arithmetic circuit unit 100. Further, an operation on a button switch or the like of the input operation unit 220 is detected by the arithmetic circuit unit 200, and the detection result is transmitted to the arithmetic circuit unit 100 by a cooperation signal. The operation of lifting the electronic device 10 or giving a specific vibration, impact, tilt, etc. is monitored by the arithmetic circuit unit 200 by monitoring outputs from various sensors (for example, an acceleration sensor) of the sensor unit 210. The monitoring result is transmitted to the arithmetic circuit unit 100 by the cooperation signal.

  At this image switching timing, the arithmetic circuit unit 100 generates image data for one screen corresponding to the application and input operation, and writes it to the frame memory of the driver circuit 420 via the interface I / F (A). . Thereby, as shown in (c) of the timing chart in the lower part of FIG. 3, the normal operation for performing the entire display is executed in which a predetermined image corresponding to the application and the input operation is displayed in the entire display area of the display panel 410. Is done. Here, since the image data is generated by the arithmetic circuit unit 100 (of high power and high performance) and a predetermined image is displayed on the display panel 410, the image displayed on the display panel 410 is the above-described one. The high function image 412 is instantly switched to a predetermined image corresponding to an application or input operation.

  The image after being switched by the arithmetic circuit unit 100 is, for example, an image with a relatively small amount of image data, an image with a small number of screen display updates or changes (hereinafter referred to as a “simple image” for convenience). In this case, the arithmetic circuit unit 100 transmits a cooperative signal for notifying the transition of the operation state to the arithmetic circuit unit 200 via the cooperative communication unit 150. Thereby, the arithmetic circuit unit 100 shifts to a state where most of the functions including the operation of generating the image data and writing the image data to the driver circuit 420 are suspended. Here, (c) of the screen display in the upper part of FIG. 3 shows an image of “12:05:01” hour / minute / second used for so-called digital clock display as an example of a simple image 414. Moreover, the transition to the power saving state of the arithmetic circuit unit 100 is realized by blocking or suppressing the supply of driving power to the arithmetic circuit unit 100 in the power supply unit 500 by the arithmetic circuit unit 100 or the arithmetic circuit unit 200, for example. The Here, the power saving state is a state in which power is controlled so as to supply power only to the minimum necessary components. For example, ACPI (Advanced Configuration, which is an open unified standard related to power control and components) Among the sleeping modes S0 to S5 defined by (and Power Interface), this is a state called S1 or S3 standby or sleep. The power saving state may be referred to as a standby mode, a sleep mode, a hibernation state, or the like. On the other hand, when the image after being switched by the arithmetic circuit unit 100 is a high-function image, or when a relatively wide area of the display area of the display panel 410 is an image that is frequently updated or changed, The arithmetic circuit unit 100 does not transmit a cooperation signal to the arithmetic circuit unit 200, maintains a normal operation for performing high function display, and does not shift to the power saving state.

  And the arithmetic circuit part 200 which received the cooperation signal from the arithmetic circuit part 100 is the specific area | region where the specific image accompanying an update or a change is continuously displayed among the images displayed on the whole display area of the display panel 410. Image data is generated, and an address is designated and sequentially written into the frame memory of the driver circuit 420 via the interface I / F (B). Here, the specific area is set to a sufficiently narrow display area as compared with the entire display area of the display panel 410, for example. As a result, as shown in (d) of the timing chart in the lower part of FIG. 3, the image data at the address specified in the frame memory is overwritten, and the image is rewritten only in a specific area of the display area of the display panel 410. The normal operation for displaying the area is continuously executed. Further, the image data written to the frame memory of the driver circuit 420 from the entire display in the arithmetic circuit unit 100 described above is retained as it is except for the overwritten image data of the specific area. A state in which the previous image is displayed is maintained in the entire area of the display area excluding the specific area. This area display continues until an image displayed on the display panel 410 is updated or changed in a relatively wide area of the display area of the display panel 410. Specifically, in the area display, for example, as shown in (d) of the screen display in the upper part of FIG. 3, among the simple images 414 in the hour, minute, and second shown in (c) of the screen display of the upper part of FIG. In the hour / minute display area, the image data written in the frame memory of the driver circuit 420 is held as it is, so the image does not change. On the other hand, for the second display area (specific area) 416 whose display changes every second in the simple image 414 of hour, minute, second, image data is generated by the arithmetic circuit unit 200 and the frame memory of the driver circuit 420 is displayed. Is written in the order of “01” → “02” →... → “59” every second.

  When the image displayed on the display panel 410 is updated or changed in an area wider than the specific area 416, for example, in (d) of the screen display in the upper part of FIG. When a change occurs in the hourly display when the display changes, the arithmetic circuit unit 200 transmits a cooperative signal notifying the transition of the operation state to the arithmetic circuit unit 100 via the cooperative communication unit 250. Thereby, the arithmetic circuit unit 200 temporarily stops or interrupts the operation of generating the image data of the specific area 416 and writing it in the driver circuit 420. On the other hand, the arithmetic circuit unit 100 that has received the cooperation signal from the arithmetic circuit unit 200 returns from the power saving state and has the entire display area having an hour, minute, and second display as shown in (e) of the timing chart in the lower part of FIG. Image data is generated and written to the driver circuit 420 for overall display. Here, the return from the power saving state of the arithmetic circuit unit 100 to the normal operation is realized by supplying or recovering driving power from the power source unit 500 to the arithmetic circuit unit 100 by the arithmetic circuit unit 100 or the arithmetic circuit unit 200, for example. Is done. That is, when the second display of the simple image 414 having the hour / minute / second display reaches “59”, the arithmetic circuit unit 200 does not generate or write the image data of the next second display “00”. On the other hand, as shown in (e) of the screen display in the upper part of FIG. 3, the arithmetic circuit unit 100 generates image data including the hour and minute display in addition to the second display and writes it in the frame memory of the driver circuit 420. An image “12:06:00” is displayed in the entire display area of the display panel 410. The hour / minute / second display on the display panel 410 is rewritten in order of “12:06:00” → “12:07:00” →. Thereafter, the arithmetic circuit unit 100 transmits a cooperation signal to the arithmetic circuit unit 200 and shifts again to the power saving state. That is, the arithmetic circuit unit 100 is theoretically set to the power saving state for 59 seconds. As shown in (f) of the timing chart in the lower part of FIG. 3, the arithmetic circuit part 200 receives the cooperation signal from the arithmetic circuit part 100, as in (d) of the timing chart in the lower part of FIG. Of the display area of the display panel 410, the area display for rewriting the image is performed only for the specific area 416 for performing the second display.

  Next, in the area display described above, as shown in the timing chart (g) in the lower part of FIG. 3 and the screen display (g) in the upper part of FIG. 3, for example, an application executed in the electronic device 10 or an input operation by the user When the switching of the images occurs, the arithmetic circuit unit 200 transmits a cooperative signal notifying the transition of the operation state to the arithmetic circuit unit 100 via the cooperative communication unit 250. As a result, the arithmetic circuit unit 200 stops or interrupts the operation of generating the image data of the specific area 416 and writing it to the driver circuit 420. On the other hand, the arithmetic circuit unit 100 that has received the cooperation signal from the arithmetic circuit unit 200 recovers from the power saving state as shown in (h) of the timing chart in the lower part of FIG. Is written into the frame memory of the driver circuit 420. Thereby, the whole display which displays the predetermined | prescribed image according to an application or input operation is performed in the whole display area of the display panel 410. FIG. Also in this case, since the control circuit unit 100 (of high power and high performance) generates image data and performs control to display the image on the display panel 410, the image displayed on the display panel 410 can be displayed as an application or The image can be instantly switched to a predetermined image corresponding to the input operation.

  Here, the image after being switched by the arithmetic circuit unit 100 is a high function image 412 as shown in (h) of the screen display in the upper part of FIG. When the target wide area is an image that is frequently updated or changed, the arithmetic circuit unit 100 continues to perform the normal operation for performing the high function display. On the other hand, when the image after being switched by the arithmetic circuit unit 100 is a simple image, the arithmetic circuit unit 100 transmits a cooperation signal to the arithmetic circuit unit 200, and the above-described lower part of FIG. Similar to (d) and (f) of the timing chart, the arithmetic circuit unit 200 displays an area in which an image is rewritten only for the specific area 416 in the display area of the display panel 410.

  In the present embodiment, the above-described series of processing operations are repeatedly executed. Here, during the execution of the series of processing operations described above, the arithmetic circuit units 100 and 200 constantly monitor the input operation and the change in the operation state that interrupt or end the processing operation, and detect the input operation and the state change. In the case, the processing operation is forcibly terminated. Specifically, the arithmetic circuit units 100 and 200 detect a series of operations such as an operation power-off (OFF) operation by the user, a decrease in the remaining battery level in the power source unit 500, an abnormality in a function or application being executed, and the like. The processing operation is forcibly interrupted and terminated.

  In the series of processing operations described above, the arithmetic circuit unit 200 generates at least image data in a state where the arithmetic circuit unit 100 is performing a high function display or in a state where the power saving state returns to the normal operation. Then, the operation of writing to the driver circuit 420 is stopped or interrupted, and the normal operation of performing the sensing operation or the like in the sensor unit 210 with low power consumption is executed.

  In the present embodiment, as an example of screen display, a simple image 414 including hour / minute / second display such as a so-called digital clock display is displayed on the display panel 410, and a calculation is performed for a specific region 416 for performing second display. Although the case where image data is generated by the circuit unit 200 and the second display on the display panel 410 is sequentially rewritten has been described (FIG. 3), the present invention is not limited to this. As another example of the screen display according to the present invention, as shown in FIG. 4A, for example, a simple image 414 composed of hour / minute / second hands (Hh, Hm, Hs) such as an analog clock display is displayed on the display panel 410. For the specific area 416 where the second hand Hs is displayed, image data is generated by the arithmetic circuit unit 200 and the second display on the display panel 410 is rewritten every second. In addition, regarding the display of the hour hand Hh and the minute hand Hm, image data may be generated by the arithmetic circuit unit 100 and the entire display area of the display panel 410 may be rewritten every minute. In this case, the specific area 416 is an area that moves or changes relative to the display area of the display panel 410. That is, the specific area 416 does not have to be a fixed area in the display area of the display panel 410 as shown in the above-described embodiment, and may be an area whose position changes.

  Further, examples of screen display including hour / minute / second display such as digital clock display shown in the above-described embodiment (FIG. 3) and screen display including hour / minute / second hands such as analog clock display shown in FIG. In the above description, a case has been described in which only the second display or the second hand display is used as the specific area, and the display is rewritten by the arithmetic circuit unit 200 having a low processing capability. That is, by slightly shifting the display rewriting timing of the arithmetic circuit unit 200 having a low processing capability, the arithmetic circuit unit 200 having a low processing capability also for the hour / minute display between the rewriting operations of the second display every second. The display may be rewritten. According to this, it is possible to set the arithmetic circuit unit 100 having a high processing capability to a power saving state for a longer time (for example, a period in which clock display is continued on the display panel 410).

  Still another example of the screen display according to the present invention is, as shown in FIGS. 4B and 4C, for example, first, image data generated by the arithmetic circuit unit 100 over the entire display area of the display panel 410. A high-function image 412 such as a color image based on is displayed. In the state where the number of updates and changes in the screen display of the high function image 412 are small, the area is sufficiently narrow as compared with the display area of the display panel 410 and has a small data capacity, and is continuously updated or changed. For specific areas 416 and 418 in which specific images such as characters, graphics, marks, etc., that are accompanied by (that is, updated frequently) are displayed, image data is generated by the arithmetic circuit unit 200 and the images are sequentially rewritten. Also good. Even in this case, on the basis of the image data written in the frame memory of the driver circuit 420 by the arithmetic circuit unit 100, for example, a map image, a notification image, or the like is displayed over the entire display area of the display panel 410 except for the specific areas 416 and 418. The state in which various high function images 412 are displayed is maintained. In addition, based on the image data sequentially written by the arithmetic circuit unit 200, the specific areas 416 and 418 of the display panel 410 on which the high-function image 412 is displayed are displayed, for example, characters indicating movement distance, pace, etc., weather Various specific images that are continuously updated or changed, such as marks indicating information and operation states, are rewritten.

  In the present embodiment, the specific area in which images are sequentially rewritten by the arithmetic circuit unit 200 is sufficiently narrow as compared with the entire display area of the display panel 410, such as a second display area in hour / minute / second display. Although the case of the display area has been described, the present invention is not limited to this. That is, in the specific area, the image data generated by the low-power, low-performance arithmetic circuit unit 200 is written to the driver circuit 420 via the interface I / F (B) having a low data transfer speed, and the image is displayed on the display panel 410. It is only necessary that the display area is large enough to be visually recognized by the user without causing disturbance or interruption of the image. Therefore, when the data capacity of the image (specific image) displayed in the specific area is small, or when the number of screen display updates and changes are small, the specific area is set wider than the display area of the display panel 410. It may be.

(Verification of effects)
Next, the effects of the electronic apparatus including the display device according to the present embodiment and the control method thereof will be specifically described with reference to a comparative example.
FIG. 5 is a schematic block diagram showing a comparative example for explaining the operational effects of the present embodiment, and FIG. 6 is a timing chart showing the control method and an example of screen display. Here, in order to clarify the comparison of the configuration and the control method between the present embodiment and the comparative example, the same configuration and control method as the present embodiment will be described with the same reference numerals.

  As shown in FIG. 5, for example, the display device in the comparative example is roughly divided into an arithmetic circuit unit 100P and a display unit 400P. The display unit 400P includes a transmissive display panel 410P and a frame memory. And a driver circuit 420P. Although not shown, a backlight (light source unit) is disposed on the back side of the transmissive display panel 410P. In such a display device, as in the above-described embodiment, the image data generated by the arithmetic circuit unit 100P in accordance with the application or input operation is written in the frame memory of the driver circuit 420, thereby the display panel 410. A predetermined image is displayed over the entire display area. And by irradiating the light of a backlight from the back side of the display panel 410P, the image displayed on the display panel 410P is projected and visually recognized on the user's visual field side.

  Here, in order to display the above-described high-definition color image or a high-function image such as a smooth moving image or animation on the display panel 410, the arithmetic circuit unit 100P has a relatively high processing capability and It is necessary to apply a high power consumption arithmetic circuit (high power, high performance processor). In addition, it is necessary to connect the arithmetic circuit unit 100P and the driver circuit 420P by an interface I / F (P) corresponding to a standard with a relatively high data transfer speed, such as MIPI or a parallel interface.

  In such a display device, for example, as shown in FIG. 6C, even when a simple image 414 is displayed on the display panel 410P, an image (for example, in the figure) that is continuously updated or changed. 2nd display), it is necessary to continue the operation of generating the image data of the entire display area of the display panel 410P by the arithmetic circuit unit 100P and writing it to the driver circuit 420P via the interface I / F (P). is there. Therefore, the arithmetic circuit unit 100P cannot be shifted to the power saving state. On the other hand, for example, as shown in FIGS. 6 (a) and 6 (e), when a display panel 410P displays an image (e.g., a map or an exercise support image) with a small number of screen display updates and changes for a certain period, the image is displayed. Is the high-function image 412, the image data generated by the arithmetic circuit unit 100P and written in the driver circuit 420P is held in the frame memory. Therefore, while the image is being displayed, the next image data generation request Until there is, the arithmetic circuit unit 100P can be shifted to the power saving state. In the example of timing and screen display shown in FIG. 6, as in the embodiment of the present invention described above, the hour / minute / second display is performed by an input operation or the like by the user during the period when the high-function image 412 is displayed. A control method in the case of switching to a simple image 414 including the image will be described.

  As described above, in the display device in the comparative example, the arithmetic circuit unit 100P alone controls the display state of the display unit 400P. Therefore, when displaying an image frequently updated or changed, the arithmetic circuit unit 100P. Therefore, it is necessary to generate image data more frequently and continue writing to the driver circuit 420P. Therefore, the arithmetic circuit unit 100P cannot shift to the power saving state during display of such an image, and the power consumption of the arithmetic circuit unit 100P cannot be sufficiently reduced. Further, even when a simple image 414 is displayed on the display panel 410P, it is necessary to use the (high power, high performance) arithmetic circuit unit 100P, so that the processing capability of the arithmetic circuit unit 100P becomes a surplus state. Therefore, the arithmetic circuit unit 100P cannot be used effectively.

  In contrast, the present embodiment described above includes two arithmetic circuit units 100 and 200 having different processing capabilities, each of which is displayed via an individual interface I / F (A) or I / F (B). The driver circuit 420 of the unit 400 is connected. The driver circuit 420 includes a frame memory, and is configured to sequentially overwrite image data individually written from the arithmetic circuit units 100 and 200. When the high-function image 412 is displayed on the display panel 410, image data is generated by the arithmetic circuit unit 100 having a high processing capability and written to the driver circuit 420 via the interface I / F (A). On the other hand, when the simple image 414 is displayed on the display panel 410, the arithmetic circuit unit 100 and the arithmetic circuit unit 200 cooperate with each other to continuously update or change the display area of the display panel 410 ( For a specific area 416 where a specific image having a high update frequency or a specific image having a small data capacity is displayed, image data is generated by the arithmetic circuit unit 200 having a low processing capacity and is transmitted via the interface I / F (B). Data is sequentially written in the driver circuit 420. In this period, the arithmetic circuit unit 100 shifts to the power saving state and maintains the state.

  As described above, in this embodiment, a high-definition color image, a high-function image such as a smooth moving image or animation display is favorably displayed by the arithmetic circuit unit 100 having a high processing capability, and various information is presented to the user. Can be provided satisfactorily. In addition, a simple image such as an image with a small amount of image data or an image with a small number of screen display updates and changes can be displayed well by linking the arithmetic circuit unit 200 with a low processing capability, The arithmetic circuit unit 100 having a high processing capability can be shifted to the power saving state as much as possible. Therefore, according to the present embodiment, in a state where the processing load related to image display on the display unit 400 is relatively small, instead of the arithmetic circuit unit 100 having a high processing capability, the processing capability is low but the operation is always continued. Since a part of the function is executed by the arithmetic circuit unit 200 and the period during which the arithmetic circuit unit 100 is set to the power saving state can be made as long as possible, power consumption in the arithmetic circuit unit 100 can be reduced. The driving time of the electronic device can be improved.

<Second Embodiment>
Next, a second embodiment of an electronic apparatus including the display device according to the present invention will be described in detail with reference to the drawings.
FIG. 7 is a schematic block diagram showing a second embodiment of an electronic apparatus provided with the display device according to the present invention. Here, about the structure equivalent to 1st Embodiment mentioned above, the same code | symbol is attached | subjected and the description is simplified. FIG. 8 is a diagram illustrating an example of screen display in the display device according to the present embodiment.

  In the first embodiment, only one display panel 410 is provided in the display unit 400, and the display state of the display panel 410 is calculated by the arithmetic circuit unit 100 and the arithmetic circuit unit 200 connected to the driver circuit 420 having a plurality of interfaces. The configuration for controlling the above has been described. In the second embodiment, a plurality of display panels (here, two) are provided in the display unit 400, the display state of the first display panel is controlled by the arithmetic circuit unit 100, and the second display panel is controlled by the arithmetic circuit unit 200. A display pattern for controlling the display state of the display panel and a display pattern for controlling the display state of the first display panel by the arithmetic circuit unit 100 and the arithmetic circuit unit 200 are provided.

  As shown in FIG. 7, for example, the electronic device 10 according to the second embodiment schematically includes two sets of arithmetic circuit units 100 and 200 having different processing capabilities, and two sets of display panels (first display). Panel) 410 and a display unit 400 provided with a display panel (second display panel) 430. Here, in the present embodiment, the other configuration shown in FIG. 7 is the same as that of the above-described first embodiment, and thus the description thereof is omitted.

  The display unit 400 is provided with a driver circuit 420 having a built-in frame memory for displaying an image on the display panel 410 and a driver circuit 440 having a built-in frame memory for displaying an image on the display panel 430. Here, the display panel 410 and the driver circuit 420 have the same configurations and functions as those of the first embodiment, and the driver circuit 420 has interfaces I / F (A) and I / F having different data transfer rates, respectively. It is connected to the arithmetic circuit unit 100 and the arithmetic circuit unit 200 via (B). That is, the display panel 410 displays a predetermined image based on the image data generated by the arithmetic circuit unit 100 and the arithmetic circuit unit 200. The driver circuit 440 is connected to the arithmetic circuit unit 200 via an interface I / F (C) corresponding to a standard with a relatively low data transfer rate such as SPI. That is, the display panel 430 displays a predetermined image based on the image data generated by the arithmetic circuit unit 200. Note that image data generated by the arithmetic circuit unit 200 is controlled to be selectively written to either the driver circuit 420 or the driver circuit 440 in accordance with the display pattern on the display unit 400.

  In this embodiment, at least one of the display panels 410 and 430 is a transmissive display panel, and the backlight of the light source unit 300 is disposed on the back side of the transmissive display panel. . Here, the display panels 410 and 430 may have a configuration in which the display panels 410 and 430 are arranged in parallel or independently without overlapping in plan view as viewed from the user's visual field side. Further, when both of the display panels 410 and 430 are transmissive display panels, for example, the display panels 410 and 430 have a configuration in which the display panels 410 and 430 are arranged so as to overlap in a plan view and the backlight is arranged on the backmost side. May be.

  As shown in the first embodiment, the arithmetic circuit unit 100 that controls the display state of the display panel 410 is an arithmetic circuit (high power, high performance processor) having a relatively high processing capability. Thereby, the display panel 410 can be applied to a display panel that can realize high-functional display. Specifically, as the display panel 410, for example, a transmissive TFT color liquid crystal panel or the like can be applied as in the first embodiment described above.

  On the other hand, as shown in the first embodiment, the arithmetic circuit unit 200 that controls the display state of the display panel 410 or the display panel 430 is an arithmetic circuit (low power, low performance processor) having relatively low processing capability. ) Applies. Here, the arithmetic circuit unit 200 selectively controls the display state of either the display panel 410 or the display panel 430 according to the display pattern on the display unit 400. Accordingly, the display panel 430 is applied to a display panel that can be driven for display with relatively low power consumption or a screen display that can be displayed with low power consumption. Specifically, as the display panel 430, for example, a PN (Polymer Network) type or PD (Polymer Dispersed) type liquid crystal panel having high reflection and excellent outdoor visibility, a display panel used for electronic paper, and the like are preferably applied. Can do. Alternatively, the display panel 430 displays an image that can be driven with low power consumption, a clock display, a simple graphic display, a still image or a screen display with a small number of updates and changes, and the like. In the latter case, the display panel 430 is not limited to a PN-type or PD-type liquid crystal panel, electronic paper, or the like, and a TFT color liquid crystal panel or the like is applied in the same manner as the display panel 410. Also good.

  In the display device having such a configuration, the arithmetic circuit unit 100 performs high-performance display on the display panel 410, and the arithmetic circuit unit 200 performs simple display on the display panel 430. As shown in the first embodiment, when a simple image is displayed on the display panel 410 by the arithmetic circuit unit 100 and the arithmetic circuit unit 200, the second display pattern that performs display with low power consumption is selectively used. Controlled to be executed. In such display pattern control in the display unit 400, the arithmetic circuit unit 100 and the arithmetic circuit unit 200 cooperate and synchronize with each other by transmitting and receiving a cooperation signal via the cooperation communication units 150 and 250. Thus, the image data generated by the arithmetic circuit unit 100 and the arithmetic circuit unit 200 and the writing destination of the image data are determined in accordance with the display state of each of the display panels 410 and 420. That is, in the first display pattern, the image data generated by the arithmetic circuit unit 100 is written to the driver circuit 420 via the interface I / F (A), and the image data generated by the arithmetic circuit unit 200 is the interface. Data is written to the driver circuit 440 via the I / F (C). On the other hand, in the first display pattern, the image data generated by the arithmetic circuit unit 100 is written to the driver circuit 420 via the interface I / F (A), and the image data generated by the arithmetic circuit unit 200 is interfaced. Data is written to the driver circuit 420 via the I / F (B). Here, the driver circuit 420 sequentially overwrites and saves the image data transmitted from the arithmetic circuit unit 100 and the arithmetic circuit unit 200 in the frame memory.

  Thereby, in the first display pattern, for example, the display state as shown in FIGS. 8A to 8C is realized, and in the second display pattern, for example, the display as shown in FIG. A state is realized. In FIG. 8, both the display panel 410 and the display panel 430 are transmissive display panels, and the display panel 430 is disposed on the user's visual field side and the display panel 410 is disposed on the rear surface side so as to overlap with each other. The screen display in the case of being configured as described above is conceptually shown.

  In the display state shown in FIG. 8A, the arithmetic circuit unit 100 is controlled so that nothing is displayed on the display panel 410 (lower part of FIG. 8A), and the image data generated by the arithmetic circuit unit 200 is displayed. Based on this, a simple image 414 is displayed on the display panel 430 (middle of FIG. 8A). In such a display state, as shown in the upper part of FIG. 8A, a simple image 414 displayed on the display panel 430 arranged on the visual field side is directly visually recognized by the user. Further, in this display state, the arithmetic circuit unit 200 can control the display state of the display panel 430 with low power consumption, and the arithmetic circuit unit 100 can be set in a power saving state. Power consumption can be greatly reduced.

  Further, in the display state shown in FIG. 8B, a high function image 412 such as a color image is displayed on the display panel 410 based on the image data generated by the arithmetic circuit unit 100 (the lower part of FIG. 8B). ), And is controlled so that nothing is displayed on the display panel 430 by the arithmetic circuit unit 200 (actually, it is set to the full transmission state) (middle stage in FIG. 8B). In such a display state, as shown in the upper part of FIG. 8B, the high function image 412 displayed on the display panel 410 disposed on the back side is visible to the user through the display panel 430. . Further, in this display state, the operation of generating image data and writing to the driver circuit 440 by the arithmetic circuit unit 200 can be stopped or interrupted, so that the arithmetic circuit unit 200 can be operated with low power consumption. The power consumption in the display panel 430 and the driver circuit 440 can be suppressed, and the power consumption of the electronic device 10 can be suppressed.

  Further, in the display state shown in FIG. 8C, a high-function image 412 such as a color image is displayed on the display panel 410 based on the image data generated by the arithmetic circuit unit 100 (the lower part of FIG. 8C). ), A simple image 414 is displayed on the display panel 430 based on the image data generated by the arithmetic circuit unit 200 (middle of FIG. 8C). In such a display state, as shown in the upper part of FIG. 8C, when the high function image 412 displayed on the display panel 410 is transmitted through the display panel 430, the simple image displayed on the display panel 430 is displayed. The user can visually recognize images of various display forms combined with (or superimposed on) the image 414.

  Further, in the display state shown in FIG. 8D, based on the image data generated by the arithmetic circuit unit 100, a high-function image 412 such as a color image is displayed over the entire display area of the display panel 410. Based on the image data generated by the circuit unit 200, specific images such as characters, figures, and marks that are continuously updated or changed are displayed in the specific regions 416 and 418 in the display region of the display panel 410. (FIG. 8 (d) bottom). That is, a predetermined image including a specific image is displayed on the display panel 410 as in the first embodiment described above. The arithmetic circuit unit 200 controls the display panel 430 so that nothing is displayed (actually, it is set to the full transmission state) (middle stage in FIG. 8D). In such a display state, as shown in the upper part of FIG. 8D, a high-function image 412 including a specific image displayed on the display panel 410 arranged on the back side is transmitted through the display panel 430 and transmitted to the user. Visible to. Further, in this display state, only one display panel 410 can display images having various display forms equivalent to the composite image shown in FIG. 8C and are specified by the arithmetic circuit unit 200. Since the arithmetic circuit unit 100 can be set in the power saving state during the period during which the image is displayed, the power consumption of the electronic device 10 can be significantly suppressed.

  As described above, in the present embodiment, by providing the two display panels 410 and 430, it is possible to display various types of images and to provide various kinds of information to the user satisfactorily. Similarly to the first embodiment described above, in a state where the processing load related to image display on the display unit 400 is relatively small, the processing circuit is low but the normal operation is performed instead of the arithmetic circuit unit 100 having high processing capability. A part of the function can be executed by the continued arithmetic circuit unit 200 to shift the arithmetic circuit unit 100 to the power saving state. Thereby, since the period of the power saving state in the arithmetic circuit unit 100 can be made as long as possible, the power consumption in the arithmetic circuit unit 100 can be reduced, and the driving time of the electronic device can be improved.

As mentioned above, although some embodiment of this invention was described, this invention is not limited to embodiment mentioned above, It includes the invention described in the claim, and its equivalent range.
Hereinafter, the invention described in the scope of claims of the present application will be appended.

(Appendix)
[1]
A first arithmetic processing circuit;
A second arithmetic processing circuit;
A driver having a frame memory and overwriting and saving the first image data generated by the first arithmetic processing circuit and the second image data generated by the second arithmetic processing circuit in the frame memory Circuit,
A first display panel on which a predetermined image is displayed based on the first image data and the second image data stored in the frame memory;
Have
The first arithmetic processing circuit and the second arithmetic processing circuit cooperate with each other to sequentially overwrite and store the first image data and the second image data in the frame memory. When the image based on said 2nd image data is displayed on the display panel, the said 1st arithmetic processing circuit is set to a power saving state, The display apparatus characterized by the above-mentioned.

[2]
The driver circuit displays a second image based on the second image data in an area narrower than a display area of the first display panel that displays the first image based on the first image data. [1] The display device according to [1].

[3]
The display device according to [2], wherein the second image is an image having a higher update frequency or a smaller image data capacity than the first image.

[4]
A second display panel whose display state is controlled by the second arithmetic processing circuit;
The display according to any one of [1] to [3], wherein the second arithmetic processing circuit selectively controls display states of the first display panel and the second display panel. apparatus.

[5]
The display device according to any one of [1] to [4], wherein the second arithmetic processing circuit has an operating frequency lower than that of the first arithmetic processing circuit.

[6]
The display device according to any one of [1] to [4], wherein the second arithmetic processing circuit has lower power consumption when operated under the same conditions as the first arithmetic processing circuit. .

[7]
A first arithmetic processing circuit;
A second arithmetic processing circuit;
A driver having a frame memory and overwriting and saving the first image data generated by the first arithmetic processing circuit and the second image data generated by the second arithmetic processing circuit in the frame memory Circuit,
A first display panel on which a predetermined image is displayed based on the first image data and the second image data stored in the frame memory;
A detection unit for detecting a signal related to a user's input operation;
Have
The first arithmetic processing circuit and the second arithmetic processing circuit cooperate with each other depending on the display state of the image on the first display panel or the presence or absence of an input operation by the user, When the first image data and the second image data are sequentially overwritten and stored in the frame memory, and an image based on the second image data is displayed on the first display panel, An electronic apparatus, wherein the first arithmetic processing circuit is set in a power saving state.

[8]
A second display panel whose display state is controlled by the second arithmetic processing circuit;
The electronic apparatus according to [7], wherein the second arithmetic processing circuit selectively controls display states of the first display panel and the second display panel.

[9]
The electronic device according to [7] or [8], wherein the second arithmetic processing circuit has an operating frequency lower than that of the first arithmetic processing circuit.

[10]
The electronic device according to [7] or [8], wherein the second arithmetic processing circuit has lower power consumption when operated under the same conditions as the first arithmetic processing circuit.

[11]
A first arithmetic processing circuit, a second arithmetic processing circuit, and a frame memory are provided, and image data generated by the first arithmetic processing circuit or the second arithmetic processing circuit is overwritten and stored in the frame memory. A driver circuit, and a first display panel on which a predetermined image is displayed based on the image data stored in the frame memory,
Linking the first arithmetic processing circuit and the second arithmetic processing circuit to each other, sequentially overwriting and storing the first image data and the second image data in the frame memory;
A region narrower than a region where the first image based on the first image data of the first display panel is displayed based on the second image data generated by the second arithmetic processing circuit. To display the second image,
A method for controlling a display device, wherein when the second image is displayed on the first display panel, the first arithmetic processing circuit is set in a power saving state.

[12]
A second display panel whose display state is controlled by the second arithmetic processing circuit;
The display device control method according to [11], wherein display states of the first display panel and the second display panel are selectively controlled by the second arithmetic processing circuit.

[13]
A first arithmetic processing circuit, a second arithmetic processing circuit, and a frame memory are provided, and image data generated by the first arithmetic processing circuit or the second arithmetic processing circuit is overwritten and stored in the frame memory. A driver circuit, and a first display panel on which a predetermined image is displayed based on the image data stored in the frame memory,
In a computer comprising the first arithmetic processing circuit and the second arithmetic processing circuit,
The first arithmetic processing circuit and the second arithmetic processing circuit are linked to each other, and the first image data and the second image data are sequentially overwritten and stored in the frame memory,
A region narrower than a region where the first image based on the first image data of the first display panel is displayed based on the second image data generated by the second arithmetic processing circuit. To display the second image,
A control program for a display device, wherein when the second image is displayed on the first display panel, the first arithmetic processing circuit is set to a power saving state.

[14]
A second display panel whose display state is controlled by the second arithmetic processing circuit;
The display apparatus control program according to [13], wherein the second arithmetic processing circuit selectively controls display states of the first display panel and the second display panel.

DESCRIPTION OF SYMBOLS 10 Electronic device 40 Display panel 100, 200 Arithmetic circuit part 120, 220 Input operation part 140, 240 Memory part 150, 250 Cooperation communication part 210 Sensor part 300 Light source part 400 Display part 410, 430 Display panel 412 High functional image 414 Simple Image 416, 418 Specific area 420, 440 Driver circuit 500 Power supply I / F (A) to I / F (C) Interface

However, in such an electronic device, when the latest information or the like is frequently displayed on the display device or when a smooth moving image or animation is displayed, generally, in an arithmetic processing circuit (processor) that drives and controls the display device. The processing burden increases .

Accordingly, the present invention is, in view of the problems described above, a display device and a display control method thereof Rukoto satisfactorily Hisage Kyosu various information to the user, and to provide a control program.

One embodiment of the present invention provides:
And Table radical 113,
A first arithmetic processing unit for transmitting data relating to display contents displayed on the display unit by the display unit and the first interface ;
And a second arithmetic processing unit that transmits the data according to the display contents displayed on the display unit by the display unit and the second interface,
The first arithmetic processing unit is configured to transmit the second arithmetic processing before changing the display type of the display unit in an operation state in which data related to display contents displayed on the display unit is transmitted by the first interface. Send a predetermined first notification signal to the
The second arithmetic processing unit, after receiving the first notification signal, transits to an operation state in which data related to display content displayed on the display unit is transmitted by the second interface.
It is a display device comprising a call.

According to the present invention, it is Rukoto satisfactorily Hisage Kyosu various information to the user.

Claims (14)

A display unit (400) for displaying image data;
A first arithmetic processing circuit (100);
A second arithmetic processing circuit (200) that consumes less power than the first arithmetic processing circuit (100);
The first arithmetic processing circuit (100) and the second arithmetic processing circuit (200) are connected to each other by individual signal lines, and the first interface (A) and the second interface (B) having different standards are connected. A driver circuit (420) having a built-in frame memory accessed via
The driver circuit (420) is in a state where image data from one of the first arithmetic processing circuit (100) and the second arithmetic processing circuit (200) is written in the frame memory. From the image data already written in the frame memory, the latter is overwritten so that the latter image data becomes valid and the address is specified when the image data is written. Configured so that only the image data of the address to be overwritten is overwritten,
Image data for one screen generated by the first arithmetic processing circuit (100) is sequentially transmitted via the first interface (A) and stored in the frame memory of the driver circuit (420). The image data stored in the frame memory includes a first display state in which a predetermined image is displayed on the entire display area of the display unit (400) by the driver circuit (420);
When the predetermined image is switched according to an application or an input operation, the first arithmetic processing circuit (100) is configured such that the image after the switching is an image having a capacity smaller than a predetermined number, If the change is less than a predetermined image, the image processing device generates an image data and shifts to a power saving state in which most functions including the operation of writing to the driver circuit (420) are suspended, and the second arithmetic processing circuit ( 200) generates image data for a specific area in which a specific image that is continuously updated or changed is displayed among the images displayed in the entire display area of the display unit (400), and designates an address. Sequentially write to the frame memory of the driver circuit (420) via the second interface (B), and add the address specified in the frame memory. Scan image data is overwritten, and a second display state in which the image is rewritten only for a specific area in the display area of the display unit (400),
A display device comprising:   In the second display state, the image data generated for the specific area is sequentially written in the frame memory, and the image data at the address specified in the frame memory is overwritten, and the display of the display unit (400) The image is rewritten only for the specific area of the area, and the state where the previous image is displayed is maintained in the entire area except for the specific area of the display area of the display unit (400). The display device according to claim 1.   The display device according to claim 1, wherein the specific area is set to a display area that is sufficiently narrow as compared with an entire display area of the display unit.   The display device according to claim 1, wherein the second display state is a clock display state.   In the second display state, hour / minute / second display is performed as the specific image. Of the hour / minute / second image (414), the second display specific region (416) whose display changes every second. With respect to the display area of the display unit (400), second display is performed by generating image data by the second arithmetic processing circuit (200) and writing it into the frame memory of the driver circuit (420). 5. The display device according to claim 4, wherein the image is rewritten only for the specific area (416) to be performed, and the second display is rewritten every second.   What displays hour, minute and second as the specific image in the second display state is an analog display of a clock, and the specific area (416) of the second display is a second hand (Hh) of analog display. Item 5. The display device according to Item 4.   When switching of images occurs due to an input operation by an application or a user, the second arithmetic processing circuit (200) transmits an operation state transition to the first arithmetic processing circuit (100), and The first arithmetic processing circuit (100) returns from the power saving state, and the second arithmetic processing circuit (200) generates image data of the specific area (416) and writes it to the driver circuit (420). The display device according to claim 1, wherein the operation is stopped or interrupted.   The display device according to claim 1, wherein the first interface (A) has a relatively high transfer rate, and the second interface (B) has a relatively low transfer rate.   The display device according to claim 1, wherein the power saving state of the first processor is a sleeping mode determined by an ACPI (Advanced Configuration and Power Interface).   The display device according to claim 1, wherein the first arithmetic processing circuit (100) and the second arithmetic processing circuit (200) are mounted on a single semiconductor in a system-on-chip form. The display unit (400) includes a first display unit (410) and a second display unit (430),
The display state of the first display unit (410) is controlled by the first arithmetic processing circuit (100), and the display state of the second display unit (430) is controlled by the second arithmetic processing circuit (200). A first display pattern for controlling
A second display pattern for controlling a display state of the first display unit (410) by the first arithmetic processing circuit (100) and the second arithmetic processing circuit (200);
The display device according to claim 1, comprising: The display unit (400) includes a first display unit (410) and a second display unit (430),
Based on the image data generated by the first arithmetic processing circuit (100), an image (412) is displayed over the entire display area of the first display unit (410), and the second arithmetic processing circuit. On the basis of the image data generated in (200), characters, figures, and marks that are continuously updated or changed in the specific area (416, 418) of the display area of the first display unit (410). The display device according to claim 1, wherein the display device has a third display pattern on which a specific image is displayed. A display unit (400) for displaying image data, a first arithmetic processing circuit (100), a second arithmetic processing circuit (200) that consumes less power than the first arithmetic processing circuit (100), The first arithmetic processing circuit (100) and the second arithmetic processing circuit (200) are connected to each other by individual signal lines, and the first interface (A) and the second interface (B) having different standards are connected. And a driver circuit (420) with a built-in frame memory accessed via
The driver circuit (420) is in a state where image data from one of the first arithmetic processing circuit (100) and the second arithmetic processing circuit (200) is written in the frame memory. From the image data already written in the frame memory, the latter is overwritten so that the latter image data becomes valid and the address is specified when the image data is written. Only the image data of the address to be overwritten,
Image data for one screen generated by the first arithmetic processing circuit (100) is sequentially transmitted via the first interface (A) and stored in the frame memory of the driver circuit (420). The image data stored in the frame memory includes a first display state in which a predetermined image is displayed on the entire display area of the display unit (400) by the driver circuit (420);
When the predetermined image is switched according to an application or an input operation, the first arithmetic processing circuit (100) is configured such that the image after the switching is an image having a capacity smaller than a predetermined number, If the change is less than a predetermined image, the image processing device generates an image data and shifts to a power saving state in which most functions including the operation of writing to the driver circuit (420) are suspended, and the second arithmetic processing circuit ( 200) generates image data for a specific area in which a specific image that is continuously updated or changed is displayed among the images displayed in the entire display area of the display unit (400), and designates an address. Sequentially write to the frame memory of the driver circuit (420) via the second interface (B), and add the address specified in the frame memory. Scan image data is overwritten, and a second display state in which the image is rewritten only for a specific area in the display area of the display unit (400),
A display control method comprising:   A program for causing a computer to execute the display control method according to claim 13.

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