JP2018198358A - Error correction program, and error correction device - Google Patents

Abstract

To suppress a processing load in error correction of data.SOLUTION: An error correction program generates redundant data from A data (n) of N, and generates the A data (n) from the redundant data. Assuming a bit string indicated by the A data (n) is A(n), integers corresponding to respective A(n) are S(n), and the bit string corresponding to the A(n) is B(n), the B(n) indicates a value obtained by multiplying a value obtained by raising S(n) to an exponent to 2, and the value indicated by A(n). Furthermore, assuming the data indicating exclusive OR of all A(n) is P1 data, and the data indicating exclusive OR of all B(n) is P2 data, the error correction program generates P1 data and P2 data based on the A data (n), and causes these data and additional data for detecting data error, generated for each of these data, to be redundant data.SELECTED DRAWING: Figure 3

Description

  The present disclosure relates to an error correction program and the like.

  When data is written to and read from a storage medium, or when data is transmitted and received, there is a risk of data corruption due to physical noise, equipment failure, or the like. In order to cope with this risk, data can be made redundant at the time of writing or sending, and even if a part of the data is damaged, the data can be restored if the damage is within a certain range. Technology has been developed.

  In Patent Document 1, as a technique capable of restoring such data, data is divided into a certain size, a data block is generated, and two types including parity based on Galois field product operation using the data block are disclosed. Is generated, and data blocks and these parities are used as redundant data.

Japanese Patent No. 4935367

However, the technique disclosed in Patent Document 1 (hereinafter, “prior art”) has a problem that the processing load is large because parity is generated based on a Galois field product operation.
An object of the present disclosure is to reduce processing load in error correction of data.

  An error correction program according to one aspect of the present invention made in view of the above problem is provided with N pieces of N data (where N is an integer of 2 or more) A data (n) (n is 0 to N-1). Redundant data is generated from the integer) and the computer is operated as a device that generates A data (n) from the redundant data. The error correction program includes a generation unit, a specification unit, and a restoration unit.

  Here, a sequence of 0 or 1 values in binary values is a bit string. A bit string indicated by A data (n) is A (n). An integer corresponding to each of A (n) and each integer having a value different from the other integers is S (n), and the maximum value of S (n) is Smax. A bit string corresponding to A (n) and having a bit length obtained by adding Smax and l is B (n), and B (n) is a power of 2 with S (n) as an exponent. A value obtained by multiplying the obtained value by the value indicated by A (n) is shown. Further, data indicating P1 which is a bit string indicating exclusive OR of all A (n) is P1 data, and data indicating P2 which is a bit string indicating exclusive OR of all B (n) is Let it be P2 data.

  The generation unit generates P1 data and P2 data based on the A data (n), and generates additional data for detecting an error in the data for each of the A data (n), P1 data, and P2 data. The A data (n), P1 data, P2 data, and additional data are made redundant data.

  Further, the specifying unit specifies damaged data among the A data (n), the P1 data, and the P2 data included in the redundant data based on the additional data included in the redundant data.

  In addition, in the redundant data, the restoration unit is damaged based on the redundant data when two of the A data (n) are damaged and the P1 data and the P2 data are not damaged. The two existing A data (n) are restored.

  The values of n of the two damaged A data (n) are f0 and f1 (f0 and f1 are integers of 0 to N-1), and the value of n of the A data (n) that is not damaged Is t (t is an integer of 0 to N-1 and is an integer other than f0 and f1). A bit string indicating the exclusive OR of A (f0) and A (f1) is X0, and a bit string indicating the exclusive OR of B (f0) and B (f1) is X1. Also, in B (f0), the positions of the bits corresponding to the least significant bit and the most significant bit of A (f0) included in the B (f0) are bl and bm, respectively, and from bl to bm in X1 Let the bit string be X1A.

  Further, the restoration unit calculates X0 by calculating an exclusive OR of all A (t) and P1, and calculates all B (t) and P2 calculated based on A (t). X1A is calculated based on the exclusive OR. A value obtained by dividing the absolute value of the difference between S (f0) and S (f1) by an exponent is set to S, and S is a value obtained by dividing the value indicated by A (f1) by S. Or a bit string having a bit length of 1 from the least significant bit in a bit string indicating a value obtained by multiplying the value indicated by A (f1) by S and the value indicated by A (f1) is A ′ (f1). The restoration unit calculates X2 which is the exclusive OR of A (f1) and A ′ (f1) by calculating the exclusive OR of X0 and X1A, and calculates A (f1) based on X2. Based on the identified A (f1) and P1 or P2, the A (f0) is identified, and the A data (f0) and the A data (f1) are identified based on the identified A (f0) and A (f1). ).

  According to such a configuration, since error correction of data is performed using exclusive OR or the like without using Galois field product operation, the processing load can be suppressed in error correction of data.

  In the above configuration, the restoration unit has corrupted A data (f2) (f2 is an integer from 0 to N-1) which is one of A data (n), and P1 data is corrupted. If not, A data (n) that is not damaged is A data (t) (t is an integer from 0 to N-1 and is an integer other than f2), and all A (t) An exclusive OR with P1 may be calculated as A (f2), and A data (f2) may be restored based on the calculated A (f2).

According to such a configuration, damaged data can be identified when P1 is not damaged.
Further, in the above configuration, the restoration unit has corrupted A data (f3) (f3 is an integer of 0 to N-1) which is one of A data (n), and P2 data is corrupted. If not, A data (n) that is not damaged is A data (t) (t is an integer from 0 to N-1 and is an integer other than f3), and all B (t) and An exclusive OR with P2 may be calculated as B (f3), and A data (f3) may be restored based on the calculated B (f3).

According to such a structure, when P2 is not damaged, the damaged data can be specified.
In the above configuration, the error correction program may be configured to output the redundant data as one computer file. According to such a configuration, the redundant data can be handled as one data, so that convenience for the user is improved.

  Note that an error correction apparatus corresponding to a computer that operates according to the above-described error correction program may be configured. Even in such a case, the same effect can be obtained.

FIG. 1A is a block diagram showing the configuration of the error correction apparatus (PC) of this embodiment. FIG. 1B is an explanatory diagram showing a configuration of redundant data. FIG. 2A is an explanatory diagram illustrating generation of P1, and FIG. 2B is an explanatory diagram illustrating generation of P2. FIG. 3 is a flowchart of the redundancy process. FIG. 4 is a flowchart of the restoration process. FIG. 5 is a flowchart of the first restoration process. 6A is an explanatory diagram illustrating an example in which A (1) and A (2) are damaged, FIG. 6B is an explanatory diagram illustrating the calculation of X0, and FIG. 6C illustrates the calculation of X1. FIG. 6D is an explanatory diagram of A ′ (f1). 7A and 7B are explanatory diagrams for the calculation of X2. FIG. 8 is an explanatory diagram for calculating X2. FIGS. 9A to 9D are explanatory diagrams of a specifying method of A (2) and A (1). FIG. 10A is a flowchart of the second restoration process, FIG. 10B is an explanatory diagram illustrating an example in which A (1) is damaged and P1 is not damaged, and FIG. 10C is a diagram of the third restoration process. FIG. 10D is a flowchart illustrating an example in which A (1) is damaged and P2 is not damaged.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. The embodiment of the present invention is not limited to the following embodiment, and can take various forms as long as they belong to the technical scope of the present invention.

[1. Description of configuration]
FIG. 1A shows a configuration of a well-known PC 1 that operates as an error correction device of the present embodiment. The PC 1 includes a display 10, an HDD 20, a CPU 30, a ROM 40, a RAM 50, an input device 60, and the like.

  The display 10 displays the video generated by the CPU 30 or the like based on the video signal. The input device 60 includes a keyboard, a mouse, and the like, and outputs a signal corresponding to an operation received from the user to the CPU 30. The ROM 40 is a read-only nonvolatile memory, and the HDD 20 is a readable / writable nonvolatile memory. In the ROM 40 and the HDD 20, programs that are read and executed by the CPU 30 are stored in advance. The RAM 50 is a readable / writable volatile memory. When the CPU 30 executes a program stored in the ROM 40 or the HDD 20, the RAM 50 is temporarily stored, or work data is temporarily stored. It is used as a storage area for

  The CPU 30 reads the OS from the HDD 20 and executes it, and executes various programs stored in the HDD 20 as processes on the OS. In this process, the CPU 30 receives a signal input from the input device 60, generates a video to be displayed on the display 10, and controls reading and writing of data to the RAM 50 and the HDD 20.

  The error correction program of this embodiment is installed in the PC1. The error correction program is one of applications that are stored in the HDD 20 and executed as a process on the OS. By operating the error correction program, the PC 1 operates as an error correction device. Note that the error correction device may be configured as an electronic device other than the PC 1.

[2. Explanation of operation]
(1) Outline First, the outline of the error correction program will be described. In the following description, it is described that the error correction program performs processing, but it goes without saying that this means that the CPU 30 of the PC 1 operating according to the error correction program performs processing.

  The error correction program includes a generating unit that generates redundant data from data to be redundant (hereinafter referred to as original data), a specific unit that identifies data that is damaged in the redundant data, and damaged data. And a restoration unit for restoring. Redundant data here refers to data in which original data is made redundant. Redundancy refers to improving fault tolerance by adding information other than the original data to the original data.

  The original data here refers to arbitrary data created using a program installed in the PC 1. In the original data, for example, a building such as a building or a house created using a program (a CAD program as an example) mounted on the PC 1 in accordance with an operation received from the user via the input device 60. Data representing three-dimensional design drawings for constructing various structures (hereinafter referred to as “constructions”) may be included. However, the present invention is not limited to this, and the original data can include data representing various design drawings created using a program installed in the PC 1.

  In the error correction program, the generation unit executes a redundancy process for generating redundant data as shown in FIG. In the error correction program, the specifying unit and the restoring unit specify damaged data in the redundant data and restore the damaged data, as shown in FIGS. Perform the restoration process. Hereinafter, it demonstrates in order.

(2) Redundancy processing (2-1) Overview of redundancy processing In the redundancy processing, the error correction program divides the original data into a certain size to generate a data block, and uses this data block. Two types of parity are generated, and redundant data including a data block and these parities is generated. Parity here refers to information used to identify a damaged data block based on an uncorrupted data block.

  The error correction program first generates data blocks (hereinafter also referred to as A data (n)) of N data of the same size from data to be redundant (hereinafter referred to as original data), and generates A data ( n) Redundant data is generated. N is an integer of 2 or more, and n is an integer of 0 to N-1. Further, when the size of the A data (n) is represented by a bit length, it is 1 bit, and when represented by a byte length, it is L bytes.

  The size of the original data is preferably an integer multiple of L, which is the size of the A data (n). If the size of the original data is not an integral multiple of L, for example, the last A when the data is divided in order such as A data (0), A data (1), A data (2),. The size of the data (N-1) may be less than L. In this case, the error correction program may adjust the size of the A data (n−1) to L by filling the shortage with 0.

  The error correction program generates two types of parity data and additional data h (n) in addition to the A data (n). The two types of parity data are P1 data and P2 data. The parity data is data for making it possible to restore the damaged A data (n) when one or two A data (n) is damaged.

The error correction program generates redundant data including A data (n), P1 data, P2 data, additional data, and other data such as management data.
In the present embodiment, management data is included as other data, but the present invention is not limited to this. The other data may include, for example, a header or a footer included in data transmitted / received in communication. The error correction program can be configured as data including at least A data (n), P1 data, P2 data, and additional data.

  Hereinafter, the bit strings indicated by the A data (n), the P1 data, and the P2 data are referred to as A (n), P1, and P2, respectively. The bit string means a sequence of 0 or 1 values in binary values. In order to facilitate understanding, when describing a specific example of the present embodiment, as shown in FIG. 1B, N = 4, and A (0), A (1), A (2), A (3) is described as A (n) (n is an integer of 0 to 3). However, it goes without saying that N is not limited to 4.

(2-1-1) Generation of P1 The error correction program calculates the exclusive OR of all A (n) as P1. Note that the size of P1 is 1 bit (in other words, L bytes). FIG. 2A shows how P1 is generated as an exclusive OR of A (0) to A (3) when N = 4 in this embodiment. Hereinafter, the exclusive OR is represented by the symbol “^”. That is, P1 is expressed as in equation (1).

P1 = A (0) ^ A (1) ^ A (2) ^ A (3) (1)
(2-1-2) Generation of P2 Here, N integers corresponding to each of A (n), each integer being an integer having a value different from the other integers, S (n) And S (n) may be an integer of 0 or more. The maximum value of S (n) is Smax. A bit string corresponding to A (n) is B (n). As for the size of B (n), the byte length is M and the bit length is m. Further, when the size of B (n) is expressed in bit length, it is a value obtained by adding Smax and l. B (n) represents a value obtained by multiplying the value indicated by A (n) by a value obtained by raising S (n) to an exponent of 2. In other words, B (n) indicates a value obtained by shifting A (n) to the upper side of S (n) bits. P2 represents an exclusive OR of all B (n).

  The shift means that the bit string is edited by moving the bit string indicated by the data stored in the predetermined memory area to the upper side or the lower side. Here, a predetermined positive integer is D. When the bit string is shifted to the upper side of D bits, 0 is set to the D bits arranged from the least significant bit to the upper side in the memory area after the shift. When the bit string is shifted to the lower side of D bits, 0 is set to the D bits arranged from the most significant bit to the lower side in the bit string after the shift. Then, the bit string indicated by the data stored in the memory area after the shift is obtained as a result of the shift.

  The error correction program calculates P2 based on A (n). Specifically, for example, by multiplying, dividing, adding, subtracting, or shifting data, or storing A data (n) at a predetermined address in the memory, A (n) to B (n ) Is calculated. Then, P2 is calculated by calculating an exclusive OR of all B (n). The size of P2 is M bytes (in other words, Smax + 1 bits).

FIG. 2B shows how P2 is generated as an exclusive OR of B (0) to B (3) when N = 4 in this embodiment. In this case, Smax is S (3).
Here, S (n) is represented as nk (k is an integer of 1 or more) as an example. As an example, k is a multiple of 8. That is, k = 8x (x is an integer equal to or greater than 1), that is, S (n) = 8nx. In this case, M, which is the byte length of P2, is L + (N-1) x bytes.

Moreover, although the example which set S (n) to nk was shown here, it is not limited to this. S (n) can be set randomly regardless of the increase in n.
Note that k can be set to an arbitrary value. However, as in this embodiment, k is preferably a byte unit such as 8, 16, 32,..., That is, a multiple of 8. More specifically, k is preferably equal to the computer bus width. For example, if a 64-bit bus is used in a 64-bit architecture computer, k = 64 is desirable.

  In the present embodiment, as an example, the calculation of B (n) and P2 is based on the memory transfer of A data (n), A (n), and the bit string indicated by the data stored in the memory transfer destination. It is realized in a lump by exclusive OR. That is, an area of M bytes is set in the memory as an area (P2 area) in which P2 data is stored in advance. Immediately before starting the calculation of P2, 0 is set in the P2 area. In the P2 area, R (n), which is a storage area for A (n), is defined. The start address of R (n) is adjusted so that the data stored in the P2 area indicates B (n) by transferring the A data (n) to R (n) in the P2 area where 0 is set. Has been. As an example, the head address of R (n) is an address offset by x (N-1-n) bytes from the head address of the P2 area to the tail side of the P2 area. The storage area R (n) for A data (n) partially overlaps the storage area for other A data (n).

  Then, when the A data (n) is transferred to R (n), an exclusive OR of the bit string indicated by the data stored in R (n) and A (n) is calculated. The calculated value is stored in R (n). For this reason, when all A data (n) is transferred to the P2 area, P2 data is generated in the P2 area. Accordingly, P2 can be generated by memory transfer without using multiplication / division and the like, so that the processing load can be suppressed.

  However, the generation method of P2 is not limited to this. For example, data indicating B (n) may be generated based on A (n), and P2 data may be generated from these data and stored in the P2 area.

Here, P2 is expressed as in equation (2).
P2 = B (0) ^ B (1) ^ B (2) ^ B (3) (2)
(2-1-3) Generation of Additional Data The error correction program generates additional data that is data for detecting an error in the data for each of the A data (n), the P1 data, and the P2 data. . Here, data indicating a hash value calculated from each of A data (n), P1 data, and P2 data is used as additional data. The hash value is a value obtained by performing a predetermined calculation process (hereinafter referred to as a hash function) on the original data. Hereinafter, data indicating the hash values calculated from each of the A data (n), the P1 data, and the P2 data are referred to as h (n), h (P1), and h (P2), respectively. Here, it is assumed that a hash value is calculated for each piece of data using the same hash function. h (n), h (P1), and h (P2) have predetermined data sizes (hereinafter referred to as hash sizes).

(2-1-4) Management Data Management data refers to various data whose values are determined in advance in the error correction program. The management data indicates, for example, N as the number of A (n), L as the size of A (n), hash size, and M as the sizes of B (n) and P2. Further, the management data may include data for associating n with S (n), such as k and x described above. These data and the like are stored in advance in the HDD 20, and are stored in the RAM 50 when the error correction program is executed.

(2-2) Redundancy Processing Next, the redundancy processing will be described with reference to FIG. The error correction program executes this redundancy processing when writing original data generated by the program on the PC 1 to the HDD 20, for example. Redundant data generated by this redundancy processing is stored in the HDD 20 as one computer file. One computer file means data handled as one file on the file system in the PC 1.

  In addition, when the subject is abbreviate | omitted in the following description, an error correction program is made into a subject. Also, it is assumed that the original data is stored in a predetermined area in the HDD 20.

First, in S110, management data is acquired from the RAM 50.
In S115, the HDD 20 sets an area (hereinafter referred to as a P1 area) and a P2 area where the size of the P1 data stored is L bytes. In this step, the P1 area and the P2 area are initialized to 0. N is initialized to 0.

  In S120 to S150, the process of generating L-byte A data (n) from the original data is repeatedly executed. Moreover, P1 data and P2 data are produced | generated by repeatedly performing S120-S150.

  Specifically, in S120, it is determined whether or not the size of data (hereinafter, unprocessed data) that is not the processing target in S120 to S150 in the original data is L or more. If the unprocessed data is L or more, the process proceeds to S130, and if it is less than L, the process proceeds to S125.

  In S125, unprocessed data plus data indicating a predetermined size of 0 is taken as L-byte data. Note that how to add data indicating 0 to unprocessed data is appropriately determined.

In S 130, L bytes of data are acquired from the original data as A data (n), and the A data (n) is stored in the HDD 20.
In S135, an exclusive OR of A (n) indicated by the A data (n) acquired in S130 and the bit string indicated by the data stored in the P1 area is calculated, and the calculation result is stored in the P1 area.

In S140, the A data (n) acquired in S130 is transferred to the memory in the P2 area as described above, and an exclusive OR is calculated.
In S145, the hash value h (n) for the A data (n) is calculated, and h (n) is stored in the HDD 20. In this step, n + 1 is stored again as new n.

  In S150, it is determined whether there is unprocessed data among the original data. If there is unprocessed data, the process proceeds to S120, and the processes of S120 to S150 are repeated. If there is no unprocessed data, the process proceeds to S155. As a result, A data (n) and h (n) (n is 0 to N-1), P1 data, and P2 data are generated and stored in the HDD 20 before the processing shifts to S155.

In S155, h (P1) indicating a hash value for the P1 data is generated, and h (P1) is stored in the HDD 20.
In S160, h (P2) indicating a hash value for the P2 data is generated, and h (P2) is stored in the HDD 20. And this redundancy process is complete | finished.

In this way, the A data (n), h (n), P1 data, h (P1), P2 data, h (P2), and management data are stored in the HDD 20 as redundant data.
(3) About Restoration Processing (3-1) Overview of Restoration Processing In the restoration processing, the error correction program identifies data that is damaged in the redundant data by the identifying unit. Subsequently, the error correction program is used when the restoration unit has a number of damaged data in the redundant data of 2 or less and 2 or less of the A data (n) are damaged. The damaged A data (n) is identified and restored. If both P1 data and P2 data are damaged, and if the number of damaged data is 3 or more, the error correction program cannot restore the damaged A data (n).

(3-2) Restoration Process Next, the restoration process executed by the specifying unit and the restoration unit in the error correction program will be described with reference to FIG. For example, the error correction program executes this restoration processing when reading redundant data from the HDD 20.

  First, in S210, damaged data is specified. Specifically, using h (n), h (P1), and h (P2) included in the redundant data, among the A data (n), P1 data, and P2 data included in the redundant data Identify corrupt data.

  That is, in this step, the hash value is calculated from the A data (n), P1 data, and P2 data included in the redundant data using the same hash function as that used when generating the redundant data. If the calculated hash value and h (n), h (P1), and h (P2) included in the redundant data do not match, the data that does not match is corrupted. As specified. Since a technique for identifying data that is damaged based on such a hash value is a known technique, a detailed description thereof is omitted.

  In S215, it is determined whether or not at least one A data (n) is damaged. If at least one A data (n) is damaged, the process proceeds to S220, and if not damaged, the restoration process is terminated.

  In S220, it is determined whether or not the number of damaged data among A data (n), P1 data, and P2 data is greater than two. If the number of damaged data is greater than 2, the process proceeds to S255, and if the number is 2 or less, the process proceeds to S225.

  In S225, it is determined whether or not the number of damaged A data (n) is two. If the number of damaged A data (n) is 2, the process proceeds to S230 and the first restoration process is executed. In the first restoration process, two damaged A (n) are restored, and the restoration process is terminated. If the number of damaged A data (n) is not 2, that is, 1, the process proceeds to S235.

  In S235, it is determined whether or not the P1 data is damaged. If the P1 data is not damaged, the process proceeds to S240 and the second restoration process is executed. In the second restoration process, one damaged A data (n) is restored, and this restoration process is terminated. If the P1 data is damaged, the process proceeds to S245.

  In S245, it is determined whether or not the P2 data is damaged. If the P2 data is not damaged, the process proceeds to S250 and the third restoration process is executed. In the third restoration process, one damaged A data (n) is restored, and this restoration process is terminated. If the P2 data is damaged, the process proceeds to S255.

  In S255 that is shifted when both the P1 data and the P2 data are damaged, and when the number of damaged data is 3 or more, as an example, an abnormal flag indicating that the restoration process has ended abnormally To complete the restoration process.

Next, the first restoration process, the second restoration process, and the third restoration process will be described.
(3-2-1) First Restoration Process Next, the first restoration process will be described with reference to FIG. In the first restoration process, when two of the A data (n) are damaged and the P1 data and the P2 data are not damaged, the two damaged A data (n) are restored. The Here, the value of n of the damaged A data (n) is set to f0, f1 (f0, f1 is an integer of 0 to N-1), and the value of n of the A data (n) that is not damaged is , T (t is an integer from 0 to N-1 and is an integer other than f0 and f1).

  FIG. 6A shows that in this embodiment, when N = 4, A data (1) and A data (2) are damaged, and A data (0), A data (3), and P1 And P2 are not damaged.

  In S310, X0, which is a bit string indicating the exclusive OR of A (f0) and A (f1), is calculated by calculating the exclusive OR of all A (t) and P1. That is, in the present embodiment, as shown in FIG. 6B, the exclusive OR of A (0), A (3), and P1 is calculated as X0. Since P1 is expressed by equation (1), X0 corresponds to an exclusive OR of A (1) and A (2) as expressed by the following equation (3).

P1 = A (0) ^ A (1) ^ A (2) ^ A (3)
A (0) ^ P1 = A (0) ^ A (0) ^ A (1) ^ A (2) ^ A (3)
A (0) ^ P1 = A (1) ^ A (2) ^ A (3)
A (3) ^ A (0) ^ P1 = A (3) ^ A (1) ^ A (2) ^ A (3)
A (3) ^ A (0) ^ P1 = A (1) ^ A (2) = X0 (3)
In S320, B (t) is calculated based on A (t). That is, in this embodiment, B (0) and B (3) are calculated based on A (0) and A (3) that are not damaged.

  In S330, the exclusive OR of all B (t) and P2 is calculated, thereby calculating X1, which is a bit string indicating the exclusive OR of B (f0) and B (f1). That is, in the present embodiment, as shown in FIG. 6C, an exclusive OR of B (0), B (3), and P2 is calculated as X1. Since P2 is expressed by equation (2), X1 corresponds to an exclusive OR of B (1) and B (2) as expressed by equation (4) below.

P2 = B (0) ^ B (1) ^ B (2) ^ B (3)
B (0) ^ B (3) ^ P2 = B (1) ^ B (2) = X1 (4)
In S340 to S360, A (f0) and A (f1) are restored as follows.

  First, in B (f0), the positions of bits corresponding to the least significant bit and the most significant bit of A (f0) are set to bl and bm, respectively. That is, the position of the least significant bit of the bit string occupied by A (f0) in B (f0) is set to bl, and the position of the most significant bit of the bit string is set to bm. A bit string from bl to bm in X1 is assumed to be X1A.

  In this embodiment, as an example, A data (1) and A data (2) are damaged. X1A in X1 is aligned with A (1) included in B (1) (f0 <f1, that is, f0 = 1, f1 = 2), or A (2) in B (2) Depending on whether they are aligned (f0> f1, that is, whether f0 = 2 and f1 = 1), the calculation method differs.

  That is, when f0 <f1 (in other words, f0 = 1 and f1 = 2), as shown in FIG. 6C, the least significant bit and the most significant bit of the portion occupied by A (1) in B (1) Are bl and bm, respectively. X1A indicates an exclusive OR of A (1) and a bit string from bl to bm in B (2). On the other hand, when f0> f1 (in other words, f0 = 2, f1 = 1), the least significant bit and the most significant bit of the portion occupied by A (2) in B (2) are bl and bm, respectively. It becomes. X1A indicates an exclusive OR of A (2) and a bit string from bl to bm in B (1).

  Also, as shown in FIG. 6D, when f0 <f1, A (f1) is the absolute value of the difference between S (f0) and S (f1) | S (f0) −S (f1) A data string shifted to the upper | bit is A ′ (f1). In this embodiment, | S (f0) −S (f1) | = k. Here, S is a value obtained by raising 2 with exponents of | S (f0) −S (f1) |. In other words, A ′ (f1) is a bit string whose data length is 1 from the least significant bit in the bit string obtained by multiplying the value indicated by A (f1) by S. On the other hand, when f0> f1, a data string obtained by shifting A (f1) to | S (f0) −S (f1) | bit lower side is set as A ′ (f1). In other words, A ′ (f1) is a bit string having a bit length of 1 indicating a value obtained by dividing the value indicated by A (f1) by S.

  Then, as shown in FIG. 7A, X2, which is an exclusive OR of X0 and X1A, is calculated. X2 corresponds to an exclusive OR of A (f1) and A ′ (f1). Further, A (f1) is specified based on X2, and A (f0) is specified based on the specified A (f1) and P1 or P2.

In the present embodiment, as an example, X2 is calculated after shifting X1 to the lower side.
First, the case where f0 <f1 is described. In S340, X1 ′ obtained by shifting X1 to the lower side of S (1) bits (in other words, k bits) is calculated. As shown in FIG. 7B, X1 ′ is a bit string having the same value as A (1) and a bit length of m, and a value obtained by shifting A (2) to the upper side of S (2) −S (1) bits. An exclusive OR with a bit string having the same bit length and a bit length of m is shown. Then, a bit string having a bit length of 1 arranged from the least significant bit in X1 ′ is specified as X1A.

  In S350, X2 which is an exclusive OR of X1A and X0 is calculated. As shown in FIG. 7B, X2 is an exclusive logic between A (2) and a bit string obtained by shifting A (2) to S (2) -S (1) bits (in other words, k bits). Equivalent to the sum.

  On the other hand, when f0> f1, X2 is calculated as follows. That is, in S340, X1 ′ obtained by shifting X1 to the lower side of S (2) bits is calculated. As shown in FIG. 8, X1 ′ indicates the same value as the bit string obtained by shifting A (1) to the lower side of S (1) bits, and the same value as A (2). The exclusive OR with the bit string whose bit length is m is shown. Then, a bit string having a bit length of 1 arranged from the least significant bit in X1 ′ is specified as X1A.

  In S350, X2 which is an exclusive OR of X1A and X0 is calculated. As shown in FIG. 8, X2 is an exclusive logic between A (1) and a bit string obtained by shifting A (1) to S (2) -S (1) bits (in other words, k bits). Equivalent to the sum.

  In addition, as an example, X0 ′ obtained by shifting a bit string having the same value as X0 and having a bit length of m to S (1) bits or S (2) bits higher side may be calculated. . Then, Y that is an exclusive OR of X0 ′ and X1 may be calculated. The bit string from bl to bm in Y is X2. X2 may be calculated from Y by a shift or the like.

Subsequently, in S360, A (f1) is specified based on X2, and then A (f0) is specified.
First, when f0 <f1, that is, when f1 = 2, X2 is a bit string obtained by shifting A (f1) and A (f1) to | S (f0) −S (f1) | It becomes an exclusive OR with a certain A ′ (f1). For this reason, in this embodiment, as shown in FIG. 7B, X2 sets A (2) and A (2) to the upper side of S (2) -S (1) bits (in other words, k bits). This corresponds to exclusive OR with the shifted bit string. First, A (f1) is specified based on X2. Below, the identification method of A (f1) is demonstrated.

  In X2 and A (2), a bit string having bit lengths S (2) -S (1) arranged from the least significant bit is represented by (a). Further, in A ′ (2), all bit strings having bit lengths S (2) −S (1) arranged from the least significant bit are 0. Therefore, as shown in FIG. 9A, (2) of X2 and A (2) match. Therefore, (A) of X2 can be specified as (A) in A (2).

  Next, in A (2) and X2, bit strings having a bit length k arranged from the bit adjacent to the upper side of (a) to the upper side are denoted by (A) and (C), respectively. As shown in FIG. 9B, (c) corresponds to an exclusive OR of (a) and (b). For this reason, (i) of A (2) can be specified by calculating the exclusive OR of (a) of A (2) and (c) of X2.

  Similarly, as shown in FIG. 9C, by repeatedly specifying the bits arranged in the upper side from the bits adjacent to the upper side of (A) in A (2) in units of bit strings having a bit length of k, A (2) is specified.

  On the other hand, when f0> f1, that is, when f1 = 1, X2 is a bit string obtained by shifting A (f1) and A (f1) to | S (f0) −S (f1) | It becomes an exclusive OR with a certain A ′ (f1). For this reason, in this embodiment, as shown in FIG. 8, X2 moves A (1) and A (1) to the lower side of S (2) -S (1) bits (in other words, k bits). This corresponds to exclusive OR with the shifted bit string. Similarly, first, A (f1) is specified based on X2.

  In X2 and A (1), a bit string having bit lengths S (2) -S (1) arranged from the most significant bit is represented by (a). Further, in A ′ (1), all bit strings having bit lengths S (2) −S (1) arranged from the most significant bit are 0. Therefore, as shown in FIG. 9D, X2 and A (1) (a) match. Therefore, (A) of X2 can be specified as (A) in A (1).

  Next, in A (1) and X2, bit strings having a bit length k arranged from the bit adjacent to the lower side of (a) to the lower side are set to (A) and (C), respectively. As shown in FIG. 9D, (c) corresponds to an exclusive OR of (a) and (b). Therefore, by calculating the exclusive OR of (A) of A (1) and (C) of X2, it is possible to specify (A) of A (1).

  Similarly, A (1) is specified by repeatedly specifying bits arranged in the lower order from the bits adjacent to the lower order side of (A) in A (1) in units of bit strings having a bit length of k. .

  Next, A (f0) is specified based on A (f1) and P1 or P2. Specifically, an exclusive OR of X0 and A (f1) calculated by exclusive OR of P1, A (t) may be calculated as A (f0). In addition, B (f1) may be calculated based on A (f1). Then, an exclusive OR of X1 and B (f1) may be calculated as B (f0), and A (f0) may be calculated based on B (f0).

  The error correction program restores these data by setting the specified A (f0) and A (f1) to the A data (f0) and A data (f1) in the redundant data. Then, the first restoration process is terminated.

(3-2-2) Second Restoration Process Next, the second restoration process will be described with reference to FIG. 10A. In the error correction program, in the second restoration process, A data (f2) (f2 is an integer of 0 to N−1) which is one of the A data (n) is damaged, and the P1 data is If it is not damaged, A (f2) can be specified. Here, the A data (n) which is not damaged is described as A data (t) (t is an integer of 0 to N-1 and is an integer other than f2).

  FIG. 10B shows, as an example, a state in which A data (1) among A data (0) to A data (3) is damaged, P2 data is damaged, and P1 data is not damaged. In this case, f2 = 1 and t is 0, 2, 3.

  In S410, the exclusive OR of the values indicated by all of A (t) and P1 is calculated as A (f2). Note that the A data (f2) may be restored by setting the calculated A (f2) to the A data (f2) in the redundant data. Then, the second restoration process is terminated.

(3-2-3) Third Restoration Process Next, the third restoration process will be described with reference to FIG. 10C. In the error correction program, in the third restoration process, one of the A data (n), A data (f3) (f3 is an integer of 0 to N-1) is damaged, and the P2 data is If it is not damaged, A (f3) can be specified. Here, the A data (n) which is not damaged is described as A data (t) (t is an integer from 0 to N−1 and is an integer other than f3).

  FIG. 10D shows, as an example, a state in which A data (1) among A data (0) to A data (3) is damaged, P1 data is damaged, and P2 data is not damaged. In this case, f3 = 1 and t is 0, 2, 3.

  In S510, B (t) is calculated based on A (t). That is, in this embodiment, B (0), B (2), and B (3) are calculated based on A (0), A (2), and A (3).

In S520, X3, which is a bit string indicating the exclusive OR of all B (t) and P2, is calculated.
Here, a value obtained by shifting X3 to the lower side of S (f3) bits is assumed to be X3 ′. In S530, X3 ′ is calculated based on X3. X3 ′ is calculated by, for example, division or shift. Then, a 1-bit bit string arranged from the least significant bit of X3 ′ is specified as A (f3). Note that the A data (f3) may be restored by setting the specified A (f3) as the A data (f3) in the redundant data. Then, the third restoration process is terminated.

[3. effect]
According to the error correction program of the present embodiment, since error correction of data is performed using exclusive OR or the like without using Galois field product operation, the processing load can be suppressed in data error correction. it can. Further, when generating redundant data, P2 data is generated by performing an exclusive OR while A (n) is transferred to the P2 area in the memory. For this reason, the processing load at the time of producing | generating redundant data can be suppressed.

[4. Other Embodiments]
As mentioned above, although embodiment of this indication was described, this indication is not limited to the above-mentioned embodiment, and can carry out various modifications.

  (4a) In the above embodiment, S (n) is set to a multiple of 8. However, the present invention is not limited to this. S (n) is a predetermined number such as a multiple of 8, such as S (0) = 2, S (1) = 8, S (2) = 0, S (3) = 4, etc. It is not a multiple and can be set arbitrarily. Note that, in the above embodiment and this example, data representing the correspondence between n and S (n) is included as management data. Further, the value of n itself may be used for S (n). In this case, data representing the correspondence between n and S (n) is not required as management data. Thereby, the storage area for the management data can be used for another purpose.

  (4b) You may comprise the error correction apparatus corresponded to the computer which operate | moves with the error correction program mentioned above. Even in this case, the same effect as that obtained by the error correction program can be obtained.

  (4c) In the above embodiment, the redundant data generated from the original data is stored as one computer file in the HDD 20, but the present invention is not limited to this. Redundant data can be divided and stored for each HDD for different HDDs. Redundant data can be transmitted and received after being divided into packets.

  In the HDD, data is written in units of sectors. Data corruption is highly likely to occur in these sector units and packet units. Data including A data (n) and h (n) generated from the A data (n) is referred to as a divided block. The size of the divided block is desirably set to be an integral multiple of the sector or packet. That is, it is desirable to set L as the size of the A data (n) so that the size of the divided block is an integral multiple of the sector or the packet.

  Further, according to this, since the boundary of the divided block and the boundary by the sector or the packet can be made coincident, it is possible to suppress the data corruption in the sector or the block from affecting the plurality of divided blocks. be able to.

  (4d) Although the hash value is used as additional data in the above embodiment, the present invention is not limited to this. The additional data may be information that can specify whether the A data (n), the P1 data, and the P2 data are damaged, such as a known parity code.

  (4e) In the above embodiment, the original data is divided to generate a plurality of A data (n), P1 data and P2 data are generated based on the A data (n), and at least redundant data including these is generated. Although it produced | generated, it is not limited to this. For example, the redundancy program may be configured to further divide each of the A data (n) into small division sizes K (K <L). The redundancy program may be configured to regard the data of the small division size K as A data (n) and similarly generate and store P1 data and P2 data. That is, not only one set of two parities such as P1 data and P2 data is generated for the entire original data, but a plurality of sets of P1 data and P2 data may be generated for the entire original data. According to this, the fault tolerance can be further improved.

  (4f) A plurality of functions of one constituent element in the embodiment may be realized by a plurality of constituent elements, or a single function of one constituent element may be realized by a plurality of constituent elements. . Further, a plurality of functions possessed by a plurality of constituent elements may be realized by one constituent element, or one function realized by a plurality of constituent elements may be realized by one constituent element. Moreover, you may abbreviate | omit a part of structure of the said embodiment. In addition, at least a part of the configuration of the above embodiment may be added to or replaced with the configuration of the other embodiment. In addition, all the aspects included in the technical idea specified from the wording described in the claims are embodiments of the present disclosure.

[5. Correspondence with Claims]
The correspondence between the terms used in the description of the above embodiment and the terms used in the description of the claims is shown. Redundancy processing (S110 to S160) corresponds to a generation unit, S210 corresponds to a specific unit, and S215 to S250 correspond to a restoration unit.

  DESCRIPTION OF SYMBOLS 1 ... PC, 10 ... Display, 20 ... HDD, 30 ... CPU, 40 ... ROM, 50 ... RAM, 60 ... Input device.

Claims (5)

Redundant data is generated from N pieces of N data (N is an integer of 2 or more) having a bit length of 1 (n is an integer of 0 to N-1), and the A data is generated from the redundant data. An error correction program for operating a computer as a device for generating (n),
A sequence of 0 or 1 values in a binary number is a bit string,
The bit string indicated by the A data (n) is A (n),
S (n) is an integer corresponding to each of the A (n), each integer having a value different from other integers, and the maximum value of the S (n) is Smax,
The bit string corresponding to A (n) and having a bit length obtained by adding Smax and l is B (n), and B (n) is an index of S (n). Represents a value obtained by multiplying a value obtained by raising 2 to the value indicated by A (n),
Data indicating P1 which is the bit string indicating the exclusive OR of all the A (n) is P1 data, and data indicating P2 which is the bit string indicating the exclusive OR of all the B (n) Is P2 data,
The P1 data and the P2 data are generated based on the A data (n), and additional data for detecting an error in the data for each of the A data (n), the P1 data, and the P2 data Generating the A data (n), the P1 data, the P2 data, and the additional data as the redundant data;
Based on the additional data included in the redundant data, a specifying unit that specifies damaged data among the A data (n), the P1 data, and the P2 data included in the redundant data; ,
In the redundant data, when two of the A data (n) are damaged and the P1 data and the P2 data are not damaged, the redundant data is damaged based on the redundant data. As a restoration unit for restoring the two A data (n), the computer is operated,
The values of n of the two damaged A data (n) are f0 and f1 (f0, f1 is an integer of 0 to N-1), and the value of n of the A data (n) that is not damaged , T (t is an integer from 0 to N-1 and is an integer other than f0 and f1),
The bit string indicating the exclusive OR of A (f0) and A (f1) is X0,
The bit string indicating the exclusive OR of B (f0) and B (f1) is X1,
In B (f0), the positions of the bits corresponding to the least significant bit and the most significant bit of A (f0) included in B (f0) are bl and bm, respectively, and from the bl in the X1 to the The bit string up to bm is X1A,
The restoration unit
X0 is calculated by calculating an exclusive OR of all the A (t) and P1.
Based on the exclusive OR of all the B (t) and P2 calculated based on the A (t), the X1A is calculated.
A value obtained by raising the absolute value of the difference between S (f0) and S (f1) to an exponent of 2 is defined as S,
In the bit string indicating the value obtained by dividing the value indicated by A (f1) by S, the bit string having a bit length of l, or the bit string indicating the value obtained by multiplying the value indicated by A (f1) by S , The bit string whose bit length arranged from the least significant bit is l is A ′ (f1),
By calculating the exclusive OR of X0 and X1A, X2 that is the exclusive OR of A (f1) and A ′ (f1) is calculated,
The A (f1) is identified based on the X2, the A (f0) is identified based on the identified A (f1) and the P1 or P2, and the identified A (f0) and A An error correction program for restoring the A data (f0) and the A data (f1) based on (f1). The error correction program according to claim 1,
The restoration unit
When the A data (f2) (f2 is an integer of 0 to N-1) which is one of the A data (n) is damaged and the P1 data is not damaged,
The A data (n) that is not damaged is the A data (t) (t is an integer of 0 to N-1 and is an integer other than f2),
An error correction program that calculates an exclusive OR of all the A (t) and the P1 as the A (f2) and restores the A data (f2) based on the calculated A (f2). The error correction program according to claim 1 or 2,
The restoration unit
When the A data (f3) (f3 is an integer of 0 to N-1) that is one of the A data (n) is damaged and the P2 data is not damaged,
The A data (n) that is not damaged is the A data (t) (t is an integer from 0 to N-1 and is an integer other than f3),
An error correction program that calculates an exclusive OR of all the B (t) and the P2 as the B (f3) and restores the A data (f3) based on the calculated B (f3). The error correction program according to any one of claims 1 to 3,
An error correction program for outputting the redundant data as one computer file. Redundant data is generated from N pieces of N data (N is an integer of 2 or more) having a bit length of 1 (n is an integer of 0 to N-1), and the A data is generated from the redundant data. An error correction device for operating a computer as a device for generating (n),
A sequence of 0 or 1 values in a binary number is a bit string,
The bit string indicated by the A data (n) is A (n),
S (n) is an integer corresponding to each of the A (n), each integer having a value different from other integers, and the maximum value of the S (n) is Smax,
The bit string corresponding to A (n) and having a bit length obtained by adding Smax and l is B (n), and B (n) is an index of S (n). Represents a value obtained by multiplying a value obtained by raising 2 to the value indicated by A (n),
Data indicating P1 which is the bit string indicating the exclusive OR of all the A (n) is P1 data, and data indicating P2 which is the bit string indicating the exclusive OR of all the B (n) Is P2 data,
The P1 data and the P2 data are generated based on the A data (n), and additional data for detecting an error in the data for each of the A data (n), the P1 data, and the P2 data Generating the A data (n), the P1 data, the P2 data, and the additional data as the redundant data;
Based on the additional data included in the redundant data, a specifying unit that specifies damaged data among the A data (n), the P1 data, and the P2 data included in the redundant data; ,
In the redundant data, when two of the A data (n) are damaged and the P1 data and the P2 data are not damaged, the redundant data is damaged based on the redundant data. A restoration unit for restoring the two A data (n),
The values of n of the two damaged A data (n) are f0 and f1 (f0, f1 is an integer of 0 to N-1), and the value of n of the A data (n) that is not damaged , T (t is an integer from 0 to N-1 and is an integer other than f0 and f1),
The bit string indicating the exclusive OR of A (f0) and A (f1) is X0,
The bit string indicating the exclusive OR of B (f0) and B (f1) is X1,
In B (f0), the positions of the bits corresponding to the least significant bit and the most significant bit of A (f0) included in B (f0) are bl and bm, respectively, and from the bl in the X1 to the The bit string up to bm is X1A,
The restoration unit
X0 is calculated by calculating an exclusive OR of all the A (t) and P1.
Based on the exclusive OR of all the B (t) and P2 calculated based on the A (t), the X1A is calculated.
A value obtained by raising the absolute value of the difference between S (f0) and S (f1) to an exponent of 2 is defined as S,
In the bit string indicating the value obtained by dividing the value indicated by A (f1) by S, the bit string having a bit length of l, or the bit string indicating the value obtained by multiplying the value indicated by A (f1) by S , The bit string whose bit length arranged from the least significant bit is l is A ′ (f1),
By calculating the exclusive OR of X0 and X1A, X2 that is the exclusive OR of A (f1) and A ′ (f1) is calculated,
The A (f1) is identified based on the X2, the A (f0) is identified based on the identified A (f1) and the P1 or P2, and the identified A (f0) and A An error correction device for restoring the A data (f0) and the A data (f1) based on (f1).

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