JP2018194798A - A/d conversion device and image formation device - Google Patents

Abstract

To easily set the order of the channel selection so that A/D conversion is performed at a desired cycle for each of a plurality of channels for A/D conversion.SOLUTION: An A/D conversion device 13 includes: an input switching unit 151 capable of selecting one from a plurality of analog input channels; an S/H unit 152; a quantization unit 153 for quantizing an analog signal and outputting digital data Dj; a channel control register 154 for storing the analog input channel to be selected by the input switching unit 151 and switching data D154 indicating the order of the selection; a conversion control unit 150 for referring to the channel control register 154 in each predetermined cycle, and performing a control so that the digital data Dj corresponding to the analog input channel to be selected that is indicated by the switching data D154 is obtained; and a switching control unit 15 for performing the switching so that the conversion control unit refers to the switching data D154 corresponding to an operation mode Dm after apparatus change.SELECTED DRAWING: Figure 3

Description

  The present invention relates to an A / D converter and an image forming apparatus.

  Image forming apparatuses such as printers, copiers, and multifunction machines include a controller that controls the image forming apparatus according to a control program. Various analog signals are input to the controller. For example, there are a sensor output, a feedback signal from a motor, and a monitor signal for power output. The input analog signal is converted into a digital signal by the controller and reflected in the control (Patent Document 1).

  An integrated circuit device including a multiplexer type A / D conversion circuit is used for analog / digital conversion (A / D conversion) of a plurality of analog signals. The A / D conversion circuit includes a plurality of channels (analog input ports), a multiplexer, an S / H unit (sample / hold unit), a quantization unit, and the like. A plurality of channels are sequentially selected by a multiplexer for a predetermined sampling time, and a capacitor (capacitance) in the S / H section is charged over the sampling time by an analog signal input to the selected channel. Then, the charge voltage value at the end of the sampling time is quantized by the quantization unit.

  As a prior art for improving the efficiency of multiplexer-type A / D conversion, there is a technique described in Patent Document 2.

  In Patent Document 2, the order of channel selection by the multiplexer is set so that a channel that is selected only once and a channel that is selected twice or more are mixed, so that the A / D conversion cycle of each channel is set to the channel. It is disclosed that each can be set.

JP 2009-025392 A JP 2002-314418 A

  In recent years, the number of sensors and motors mounted in an image forming apparatus is increasing as the speed and function of the image forming apparatus are increased. For this reason, there is an increasing need for an integrated circuit device having a large number of channels for A / D conversion.

  However, in the case where a plurality of channels are selected in order by the sampling time by the multiplexer as described above, when the number of channels is increased, the time required to complete the channel selection, that is, the A / D conversion cycle of each channel is long. turn into. Therefore, the control of the image forming apparatus performed based on the result of A / D conversion may be hindered. In order to obtain A / D conversion results for all channels in a period that does not hinder control, the sampling time of each channel must be shortened. If it does so, the capacitor | condenser of S / H part may not fully be charged, and there exists a possibility that the result of A / D conversion may become inaccurate. Therefore, it is difficult to increase the number of channels.

  According to the technique of Patent Document 2 described above, it is possible to eliminate waste due to performing A / D conversion in a short cycle even for channels that need only be subjected to A / D conversion in a relatively long cycle. However, as the number of channels increases, there is a problem that it becomes difficult to set the order of channel selection so that A / D conversion is performed at a necessary and sufficient cycle for all channels.

  The present invention has been made in view of the above-described problems, and it has conventionally been the case that the order of channel selection is set so that A / D conversion is performed at a desired cycle for each of a plurality of channels for A / D conversion. An object of the present invention is to provide an easy A / D converter.

  An A / D conversion device according to an embodiment of the present invention is an A / D conversion device provided in a device having a plurality of operation modes that are alternatively set, for inputting a plurality of analog signals. An input switching unit that includes a plurality of analog input channels, selects one analog input channel from the plurality of analog input channels, and an S / H unit that samples / holds an analog signal selected by the input switching unit A quantization unit that quantizes the analog signal sampled / held by the S / H unit and outputs digital data, and the analog input channel to be selected in the input switching unit among the plurality of analog input channels And a channel control register for storing switching data indicating the order of selection, and the channel at predetermined intervals. The input switching unit, the S / H unit, and the quantum so as to obtain the digital data corresponding to the analog input channel to be selected indicated by the switching data stored in the channel control register with reference to a control register A conversion control unit that controls the conversion unit, and a switching control unit that switches the switching data according to the changed operation mode to be referred to by the conversion control unit when the setting of the operation mode is changed, Have

  According to the present invention, the order of channel selection can be set more easily than before so that A / D conversion is performed at a desired cycle for each of a plurality of channels for A / D conversion.

1 is a diagram illustrating a hardware configuration of an image forming apparatus including an A / D conversion device according to an embodiment of the present disclosure. It is a figure which shows the example of the structure of the semiconductor integrated circuit used as a sub-control part. It is a figure which shows the example of a functional structure of an A / D converter. It is a figure which shows the functional structure of the input switching part, S / H part, and quantization part among the conversion process parts in an A / D converter. It is a figure which shows the structure of the conversion data storage part of the conversion process parts. It is a figure which shows the example of a structure of a channel control register, and the pattern of switching data. It is a figure which shows the modification of the pattern of switching data. It is a figure which shows the example of a structure of a sampling time control register. It is a figure which shows the example of a response | compatibility with a some channel and the analog signal input into these. It is a figure which shows the example of the switching data in starting mode. It is a figure which shows the example of the switching data in print mode. It is a figure which shows the example of the switching data in an image stabilization mode. It is a figure which shows the example of the switching data in sleep mode. It is a figure which shows the flow of a process in the mode management part and control process part of a main control part. It is a figure which shows the flow of a process in the switching control part of an A / D converter. It is a figure which shows the flow of a process in the conversion process part of an A / D converter. It is a figure which shows the flow of a designated channel process.

  FIG. 1 shows a hardware configuration of an image forming apparatus 1 including an A / D conversion device 13 according to an embodiment of the present invention.

  The image forming apparatus 1 is an MFP (Multi-functional Peripheral) in which functions such as a copier, a printer, a facsimile machine, and an image reader are integrated. The image forming apparatus 1 includes a control device (control board) 10, a scanner unit 21, an operation unit 22, a printer engine 23, a paper feed unit 24, a finisher 25, a LAN connection unit 26, a USB connection unit 27, a power supply unit 28, and a high voltage. A power supply 29 is provided.

  The control device 10 includes a main control unit (overall control unit) 11 that is responsible for overall control of the image forming apparatus 1 and a sub-control unit 12 that assists the control by the main control unit 11. The sub-control unit 12 is provided with a functional block (conversion processing unit 13) that performs A / D conversion on signals from the plurality of sensors 31, 32,. A / D conversion will be described in detail later.

  The main control unit 11 and the sub control unit 12 are both semiconductor integrated circuits and are mounted so as to communicate with each other. For example, the main control unit 11 can be configured using a general-purpose MPU (Micro Processing Unit), and the sub-control unit 12 can be configured using an ASIC (Application Specific Integrated Circuit). The main control unit 11 and the sub control unit 12 may be integrated into a single integrated circuit device.

  The scanner unit 21 optically reads an image recorded on a document sheet and generates image data. The scanner unit 21 includes, for example, a flatbed scanner and an automatic document feeder that transports a document sheet to a reading position of the scanner.

  The operation unit 22 includes a touch panel display that displays a screen for an input operation by a user and a key input unit on which hard keys are arranged, and outputs a signal corresponding to the input operation.

  The printer engine 23 prints an image on a sheet by electrophotography based on image data read by the scanner unit 21 or document data input through communication by the LAN connection unit 26. The printer engine 23 includes a cylindrical photosensitive member, a charger that charges the photosensitive member, a print head that exposes the photosensitive member to form an electrostatic latent image, a developing unit that exposes the electrostatic latent image with toner, and a toner. It is equipped with a fixing device that fixes the paper. The fixing device includes a heating roller that contacts the paper, a heater that heats the central portion and the end portion of the heating roller in the rotation axis direction, and the like.

  The paper feed unit 24 includes a plurality of paper feed cassettes capable of storing papers of different sizes, and feeds the paper from the selected paper feed cassette by a pickup roller and supplies the paper to the printer engine 23.

  The finisher 25 performs post-processing such as punch punching, stapling, tri-folding, and sorting on the printed paper carried from the printer engine 23.

  The LAN connection unit 26 communicates with an external device via a communication line using a protocol such as TCP / IP (Transmission Control Protocol / Internet Protocol).

  The USB connection unit 27 communicates with an external device compliant with the USB (Universal Serial Bus) standard.

  The power supply unit 28 generates low-voltage power of several tens of volts or less including the operating voltage of the control device 10 from commercial alternating current and supplies it to a supply destination that needs it.

  The high voltage power supply 29 supplies high voltage power of, for example, several hundred volts or more to a charging charger provided in the printer engine 23.

  By the way, the image forming apparatus 1 has a plurality of operation modes that are alternatively set according to the situation. For example, the start mode, the print mode, the sleep mode (power saving mode), the sleep release mode (return mode), and the image stabilization mode are this type of operation mode.

  The startup mode is set when the power switch is turned on. In the start-up mode, warm-up of the fixing unit of the printer engine 23 is performed.

  The print mode is set when a copy job, print job, or facsimile reception job is executed. In the print mode, the printer engine 23 and the mechanism for transporting the paper 9 are controlled to operate properly.

  The sleep mode is set when the no-operation state continues for a predetermined time. In the sleep mode, the supply of power to the printer engine 23 is stopped, and the printer engine 23 is put into a halt state.

  The sleep release mode is set instead of the sleep mode when it is detected that the user has approached the image forming apparatus 1 in the sleep mode or when an operation by the operation unit 22 is performed.

  The image stabilization mode is an operation mode for adjusting an operation condition (electrophotographic process condition) related to the image quality of the printer engine. The image stabilization mode is set when the execution of the print job ends or during the execution of the print job every time the cumulative number of printed sheets from the previous adjustment exceeds a predetermined value.

  FIG. 2 shows an example of the structure of a semiconductor integrated circuit used as the sub-control unit 12. In the sub-control unit 12, a semiconductor chip on which an integrated circuit is formed is fixed to a die pad of an interposer and is electrically connected to an external pattern by a bonding wire. And it is wired by the interposer from the external pattern to the terminal of the solder ball. The semiconductor chip and the external pattern are covered with a molding material (resin: resin).

  FIG. 3 shows an example of the functional configuration of the A / D conversion device 13. The A / D conversion device 13 includes a conversion processing unit 15 provided in the sub-control unit 12 and a switching control unit 16 provided in the main control unit 11.

  The conversion processing unit 15 includes an input switching unit 151, an S / H unit 152, a quantization unit 153, a channel control register 154, a sampling time control register 155, a conversion data storage unit 156, a conversion control unit 150, and the like. .

  The input switching unit 151 includes a plurality of analog input channels CH1, CH2, CH3,... CH18, CH19, CH20 for inputting a plurality of analog signals Sa1, Sa2, Sa3,... Sa18, Sa19, Sa20. In the present embodiment, the number of analog input channels CH1 to CH20 is 20. The input switching unit 151 is an analog input switching multiplexer that can select one analog input channel from a plurality of analog input channels CH1 to CH20 in any order.

  Hereinafter, the analog signals Sa1 to Sa20 may be referred to as “analog signal Sa” as a whole or each without being distinguished from each other. Further, an analog input channel may be abbreviated as “channel”, and the whole or each may be described as “channel CH” without distinguishing between channels CH1 to CH20.

  The S / H unit 152 samples / holds the analog signal Sa input to the channel CH selected by the input switching unit 151.

  The quantization unit 153 quantizes the analog signal (for example, its voltage value) sampled / held by the S / H unit 152 and outputs digital conversion data (digital data) Dj. The quantization unit 153 is a successive approximation (SAR) type. However, other conversion methods may be used.

  The channel control register 154 stores channel CH to be selected by the input switching unit 151 among the plurality of channels CH1 to CH20 and switching data D154 indicating the order of selection. The number of channels CH to be selected indicated by the switching data D154 is variable in the range of 20 or less of the total number of channels CH1 to CH20 in the present embodiment.

  The sampling time control register 155 stores sampling time data D155 indicating the sampling time Ts in the S / H unit 152. The sampling time data D155 is updated by the switching control unit 16 when the sampling time Ts needs to be changed. If the sampling time Ts is fixed, the sampling time control register 155 can be omitted and the sampling time Ts can be stored in the ROM.

  The conversion data storage unit 156 stores the conversion data Dj output from the quantization unit 153 for each channel CH. The conversion data Dj stored in the conversion data storage unit 156 is read by the control processing unit 18 of the main control unit 11 and used for controlling the image forming apparatus 1. The conversion data Dj is read, for example, every control cycle T1 (for example, 1 ms), which is a cycle of the control routine repeated by the control processing unit 18. However, the switching of the channel CH in the input switching unit 151 may be performed every time. Moreover, you may perform at arbitrary timings.

  The conversion control unit 150 refers to the channel control register 154 and the sampling time control register 155 for each control cycle T1. Then, the input switching unit 151, the S / H unit 152, and the quantization unit 153 are controlled so as to obtain conversion data Dj corresponding to the channel CH to be selected indicated by the switching data D154 stored in the channel control register 154. . Specifically, the control is performed as follows.

  The input switching unit 151 is controlled to sequentially select the channel CH to be selected.

  The S / H unit 152 is controlled to sample the selected analog signal Sa over the sampling time Ts indicated by the sampling time data D155 every time the channel CH is selected by the input switching unit 151. At this time, when the same channel CH is continuously selected, the analog signal Sa input to the S / H unit 152 is controlled to be sampled without being reset while being continuously selected.

  The quantization unit 153 is controlled to output the conversion data Dj every time the S / H unit 152 samples / holds.

  When the setting of the plurality of operation modes, which are alternatively set, is changed, the switching control unit 16 is configured so that the switching data D154 corresponding to the changed operation mode is referred to by the conversion control unit 150. Switch. In the present embodiment, the switching control unit 16 updates the stored contents of the channel control register 154 so that the switching data D154 corresponding to the changed operation mode is stored in the channel control register 154.

  Specifically, the switching control unit 16 confirms the latest set operation mode based on the mode setting information Dm from the mode management unit 17 for each control cycle T1. Then, when the current operation mode is different from the operation mode at the previous confirmation, the switching data D154 corresponding to the current operation mode is read from the switching setting database 161 and the contents of the channel control register 154 are changed. In the switching setting database 161, each of a plurality of operation modes is associated with switching data D154 suitable for it.

  The mode management unit 17 is provided in the main control unit 11 and changes the setting of the operation mode as necessary in response to a user operation or job input. Then, mode setting information Dm is output in response to the request. The mode setting information Dm is information indicating the current operation mode.

  FIG. 4 shows functional configurations of the input switching unit 151, the S / H unit 152, and the quantization unit 152 in the conversion processing unit 15.

  In FIG. 4, a filter circuit 50 including a resistor Rext and a capacitor Cext is externally attached to a pad (input terminal) 12 </ b> A of the sub-control unit 12. The pad 12A corresponds to one of the plurality of channels CH. The analog signal Sa is input to the pad 12A via the filter circuit 50. The filter circuit 50 becomes a part of the external impedance of the channel CH.

  When the input analog signal Sa is selected by the input switching unit 151, the switch SW1 of the S / H unit 152 is turned on. Thereafter, the switch SW1 is kept on until a sampling time Ts set as described later elapses. A period during which the switch SW1 is turned on is a sampling period in which sampling is performed once.

  In the sampling period, the sampling capacitor Cint1 of the S / H unit 152 is charged by the current flowing from the input switching unit 151 via the internal resistor Rint and the switch SW1.

  Note that the charging of the capacitor in this specification may include negative charging, that is, discharging of the capacitor. In particular, when the charge of the capacitor is not reset for each sample / hold, the capacitor is charged or discharged in accordance with the voltage level in the next sample / hold.

  When the sampling time Ts elapses, a hold command from the conversion control unit 150 is given to the S / H unit 152. The S / H unit 152 turns off the switch SW1 in accordance with the hold command. As a result, the voltage Va between the terminals of the sampling capacitor Cint1 at that time is held.

  The held voltage Va is taken into the capacitor Cint2 of the quantization unit 153 when the switch SW2 of the quantization unit 153 is turned on, and is quantized by the quantization unit 153. Since the circuit configuration of the quantization unit 153 is the same as that of a general successive approximation ADC circuit, detailed description of quantization is omitted here.

  The capacity of the capacitor Cint2 is much smaller than the capacity of the sampling capacitor Cint1 (Cint1 >> Cint2). Therefore, the charging of the capacitor Cint2 is completed with almost no change in the voltage of the sampling capacitor Cint1.

  When the charging of the capacitor Cint2 is completed or fully charged, the switch SW2 is turned off without waiting for the completion of the quantization, and the A / D conversion process (sampling and quantization) of the next channel CH is started. Control may be performed. That is, after the switch SW2 is turned off, the selection of the channel CH by the input switching unit 151 is switched, and the switch SW1 is turned on to charge the sampling capacitor Cint1 as described above.

  FIG. 5 shows the configuration of the conversion data storage unit 156 in the conversion processing unit 15. The conversion data storage unit 156 includes conversion data registers RE1, RE2, RE3,..., RE18, RE19, RE20, one for each of the channels CH1 to CH20. The conversion data registers RE1 to RE20 are overwritten each time the quantization unit 153 obtains the conversion data Dj of the corresponding channels CH1 to CH20. The conversion data registers RE1 to RE20 are configured such that the main control unit 11 can access and read the conversion data Dj at any time without using the conversion control unit 150.

  6 shows a configuration of the channel control register 154 and an example of the pattern of the switching data D154, and FIG. 7 shows a modification of the pattern of the switching data D154.

  The channel control register 154 performs channel designation as to which channel CH is to be processed for each value of the execution order K of the A / D conversion process so that the channel CH can be selected in an arbitrary order and number of times. It has a configuration. The value of the execution rank K is a value from 1 indicating the head rank to the maximum value Kmax indicating the final rank.

  The number of execution ranks K can be changed, and may be the same as the number of channels CH (20 in the present embodiment), or more or less.

  In FIG. 6A, the value of the execution order K is 1-20. That is, the maximum value Kmax is 20. The channel control register 154 stores switching data D154a indicating a combination of each of the execution order K values 1 to 20 and channel designation.

  The combination pattern (1) indicated by the switching data D154a is an “all selection pattern” in which all of the 20 channels CH1 to CH20 are channels to be selected. In the illustrated example, the selection order is the order of arrangement of the channels CH1 to CH20.

  A series of A / D conversion processes for the channels CH1 to CH20 according to the switching data D154a are repeatedly executed until an end command is issued from the switching control unit 16. In all the selection patterns, each A / D conversion process of channels CH1 to CH20 is performed once during a period in which the execution order K makes a round (hereinafter referred to as “round cycle T2”). The period of A / D conversion of CH20 is equal to one round period T2.

  In FIG. 6B, the maximum value Kmax of the execution order K is 20 as in the example of FIG. The combination pattern (2) indicated by the switching data D154b is a “partial selection pattern” in which a part of the 20 channels CH1 to CH20 is a channel to be selected. In the illustrated example, there are four channels CH1 to CH4 to be selected. The order of selection is to repeat the channels CH1 to CH4 five times in the order of arrangement. That is, the switching data D154b indicates that the channels CH1 to CH4 are selected five times discontinuously (in this case, every four ranks).

  Since each A / D conversion process of channels CH1 to CH4 is performed five times at regular intervals during one round cycle T2, the A / D conversion cycle of each channel CH1 to CH4 is 1/5 of one round cycle T2. Become.

  The partial selection pattern is provided based on the knowledge that the analog signal Sa that requires A / D conversion differs depending on the operation mode of the image forming apparatus 1, and A / D conversion is performed for all the channels CH1 to CH20. It is applied in an operation mode that does not need to be performed.

  According to the partial selection pattern, regardless of the total number of channels CH1 to CH20, the main control unit 11 acquires the latest conversion data Dj for the channel CH related to the control in the current operation mode at least for each round cycle T2. Can do. Further, by setting the switching data D154 so that the A / D conversion processing of the same channel CH is performed a plurality of times at equal intervals, the main control unit 11 sets the latest conversion data Dj for the channel CH from the round cycle T2. It can be acquired in a short cycle.

  In FIG. 6C, the maximum value Kmax of the execution order K is 30. The combination pattern (1b) indicated by the switching data D154c is an “all selection pattern” in which all 20 channels CH1 to CH20 are to be selected. However, unlike the pattern (1) in FIG. 6A, the channel CH selected only once and the channel CH selected multiple times are mixed.

  That is, channel CH1 is selected three times in ranks 1, 11, and 21, and channel CH2 is selected three times in ranks 2, 12, and 22. Channels CH3-CH8 are selected twice in ranks 3-8 and 25-30, and channels CH9-CH20 are selected once in ranks 9, 10, 11-20, 23, and 24.

  According to this pattern (1b), the A / D conversion cycle of the channels CH1 and CH2 is one third of the round cycle T2. That is, the main control unit 11 can acquire the latest conversion data Dj for the channels CH1 and CH2 for each one-third cycle of the round cycle T2. In other words, even if the number of channels CH that can update the conversion data Dj within the period in which the main control unit 11 requires the latest conversion data Dj is, for example, “10”, the main control unit 11 The conversion data Dj can be acquired and the image forming apparatus 1 can be controlled. For the remaining remaining channels CH3 to CH20, the latest conversion data Dj can be acquired at least every round cycle T2.

  In FIG. 7, the maximum value Kmax of the execution order K is 20 as in the examples of FIGS. 6 (A) and 6 (B). The combination pattern (2b) indicated by the switching data D154d is a “partial selection pattern” in which nine channels CH1 to CH9 are to be selected. The order of selection is that channel CH1 is selected twice in succession, then channel CH2 to CH9 are selected in the order of arrangement, and a total of 10 selections are repeated twice.

  That is, the switching data D154d performs two consecutive selections twice for the channel CH1 twice discontinuously (8 rank intervals), and twice for the channels CH2 to CH9 discontinuously (9 rank intervals). Indicates that the selection is made one by one. The main control unit 11 can acquire the latest conversion data Dj for the channels CH1 to CH9 every half of the control period T0.

  By selecting the channel CH1 twice in succession, the sampling period for the channel CH1 becomes substantially twice the sampling time Ts. Thereby, for example, even when the time required for sampling the analog signal Sa is longer than the sampling time Ts set for the other channel CH because the external impedance of the channel CH1 is high, a correct sampling result can be obtained. .

  FIG. 8 shows an example of the configuration of the sampling time control register 155. The sampling time control register 155 includes a count value register 155A and a count number register 155B.

  The count value register 155A stores, as part of the sampling time data D155, the count value Q of the counter that counts the clock in order to measure the sampling time Ts. The number of bits of the count value register 155A is 8, and a count value Q from 0 to 255 can be set. In the example of FIG. 8, all the bit values are 1 and the count value Q is 255.

  The count number register 155B stores, as the remaining part of the sampling time data D155, the repetition number m at which the counter repeatedly counts the count value. The number of bits of the count number register 155B is set to 8, and a repetition number m of 0 to 255 can be set. In the example of FIG. 6, the bit value of the first bit-1 that is the LSB and the second bit-2 next to the LSB is 1, and the repetition count m is 3.

  According to the sampling time control register 155, a time 1 to 65025 (255 × 255) times the clock period can be set as the sampling time Ts. For example, when the count value Q is 255 and the number of repetitions m is 3, a time corresponding to “255 × 3 = 765” counts is set as the sampling time Ts.

  The sampling period Ts may be varied stepwise by increasing the clock period, or the sampling period Ts may be varied substantially continuously by shortening the clock period. The number of bits (bit width) of each register is not limited to 8 as illustrated, and may be 7 or less or 9 or more.

  Next, an example of the switching data D154 applied in each operation mode of the image forming apparatus 1 will be given.

  FIG. 9 shows an example of the correspondence between the plurality of channels CH1 to CH20 and the analog signal Sa input thereto.

  A power consumption monitor signal indicating the output power amount of the power supply unit 28 is input to the channel CH1, and a monitor signal of the high voltage power supply 29 is input to the channel CH2.

  An output signal of a temperature sensor that detects the temperature of the central portion of the fixing roller in the axial direction of the heating roller is input to the channel CH3, and a temperature sensor that detects the temperature of the end portion of the heating roller in the axial direction is input to the channel CH4. Output signal is input.

  To channels CH3 to CH6, output signals of toner density sensors for detecting the density of toner in the K, C, M, and Y developing devices are input, respectively. Channels CH9 to CH13 indicate the rotational speed of the motor. Each motor monitor signal is input.

  An output signal of a thickness sensor that detects the thickness of the paper taken out from the paper cassette is input to the channel CH14, and an output signal of a sensor that detects the remaining amount of paper in the paper cassette is input to the channel CH15. Entered.

  An output signal of a sensor that detects the size of the original sheet set on the scanner unit 21 is input to the channel CH16, and an output signal of a sensor that detects the temperature and humidity of the use environment of the image forming apparatus 1 is input to the channel CH17. Is entered.

  An output signal of a sensor for detecting a state related to an optional function is input to the channel CH18, and an output signal of a sensor for detecting a user approaching the image forming apparatus 1 is input to the channels CH19 to CH20. Is done.

FIG. 10 shows an example of the switching data D154 in the start mode and the sleep release mode, and FIG. 11 shows an example of the switching data D154 in the print mode. FIG. 12 shows an example of switching data D154 in the image stabilization mode, and FIG. 13 shows an example of switching data D154 in the sleep mode. In these examples, the maximum value Kmax of the execution order K is assumed to be 20.
[Startup mode / sleep release mode]
When starting up or returning from sleep, it is necessary to simultaneously start many functions that have stopped operating. For this reason, a large amount of power is temporarily consumed. However, there is a limit to the power that can be supplied by the power supply unit 28. Therefore, while monitoring the power consumption monitor signal from the power supply unit 28, the activation timing of each function is controlled so as to suppress the power consumption amount to the upper limit of the amount of power that can be supplied by the power supply unit 28. In order to realize this control, in the start-up mode and the sleep release mode, the channel A1 is set to ranks 1 and 11 based on the setting table 91 shown in FIG. The result of / D conversion is obtained every half cycle of the round cycle T2 (10 times the sampling time Ts).

  Further, in the image forming apparatus 1, in order to shorten FCOT (First Copy Out Time), it is necessary to rapidly raise the temperature of the heater of the fixing device at the time of start-up or return from sleep. On the other hand, if the heater becomes too hot, inconvenience such as smoke may occur. Therefore, temperature control is performed to raise the temperature faster while monitoring the temperature of the fixing device. Therefore, by setting the channel CH3 in the ranks 2 and 12, the latest A / D conversion result can be obtained for each half of the cycle T2 with respect to the output signal from the temperature sensor at the center of the fixing device. I am doing so.

For the remaining ranks 3 to 10 and 13 to 20, a sufficient channel CH corresponding to the analog signal Sa is set as long as the latest A / D conversion result is obtained for each round cycle T2.
(Print mode)
At the time of printing, it is necessary to keep the temperature of the fixing device at an appropriate fixing temperature. Further, every time the number of sheets taken out from the sheet cassette becomes a certain number, it is necessary to lift up the sheet table in the sheet cassette so that the pickup roller contacts the uppermost sheet in the sheet cassette. Therefore, in the print mode, the channel CH1 is set for the ranks 1 and 11, the channel CH2 is set for the ranks 2 and 12, and the channels are set for the ranks 3 and 13 based on the setting table 92 shown in FIG. Set CH5. That is, the latest A / D conversion result is obtained for each half of the round cycle T2 with respect to the output signals from the temperature sensors at the center and the end of the fixing unit and the output signal from the paper amount sensor. ing.

For the remaining ranks 4 to 10 and 14 to 20, a sufficient channel CH corresponding to the analog signal Sa is set as long as the latest A / D conversion result is obtained for each round cycle T2.
(Image stabilization mode)
When a two-component developer composed of a toner and a carrier is used for developing a toner image during printing, if the development is repeated, only the toner is consumed and the toner concentration (the ratio of the toner amount to the carrier amount) decreases. In order to detect the decrease in the toner density, for example, a magnetic sensor for detecting the magnetic permeability of the developer is provided as a toner density sensor in each color (Y, M, C, K) developer.

  At the time of image stabilization, control is performed to drive a mechanism for supplying toner from the toner bottle to the developing device so that the toner density becomes a predetermined value. Therefore, in the image stabilization mode, channel CH5 is set for ranks 3 and 13, channel CH6 is set for ranks 4 and 14, and ranks 5 and 15 are set based on the setting table 93 shown in FIG. Channel CH7 is set for channel 6 and channel CH8 is set for ranks 6 and 16. In other words, the latest A / D conversion result for the output signal from the toner density sensor of each color is obtained every half of the round cycle T2.

  For the remaining ranks 1, 2, 7 to 12, and 17 to 20, a sufficient channel CH corresponding to the analog signal Sa is set as long as the latest A / D conversion result is obtained for each round cycle T2. .

Note that the image stabilization mode is an operation mode in which the supply of power by the power supply unit 28 is not imminent, and thus the output of the power supply unit 28 is not monitored at a cycle shorter than the one-round cycle T2.
〔sleep mode〕
During sleep, which is a power saving state, it is detected that the user is approaching to use the image forming apparatus 1 or that an operation to the operation unit (touch panel) 22 is started. Need to migrate. For this purpose, for example, a capacitive proximity sensor is provided as a user detection sensor in the operation unit 22 to detect that the user's finger is approaching, or to detect the intensity of radio waves from a wireless terminal carried by the user. Detecting user approach.

  In the sleep mode, A / D conversion of the output signal from the user detection sensor is completed by setting channels CH19 and 20 in the ranks 1 to 16 and 19 to 20 based on the setting table 94 shown in FIG. This is performed a plurality of times within the period T2.

  Note that a channel 17 is set for the rank 18 so that changes in temperature and humidity at the place where the image forming apparatus 1 is installed can be grasped for each cycle T2.

  FIG. 14 shows a flow in the mode management unit 17 and the control processing unit 18 in the main control unit 11.

  The operation mode is set according to the operation status (# 101). The conversion data storage unit 156 of the A / D conversion apparatus 13 is accessed to acquire the conversion data Dj (# 102), and the image forming apparatus 1 is controlled based on the acquired conversion data Dj (# 103).

  Then, the passage of a predetermined control cycle Tc is waited (# 104). That is, the timer for determining the control cycle Tc is awaited to end timing. When the control cycle Tc elapses (YES in # 104), it is checked whether there is an operation end event such as turning off the power switch (# 105). Steps # 101 to # 105 are repeated until an operation end event occurs.

  15 shows the flow of processing in the switching control unit 16 of the A / D conversion device 13, FIG. 16 shows the flow of processing in the conversion processing unit 15 of the A / D conversion device 13, and FIG. The flow of designated channel processing is shown respectively.

  In FIG. 15, the current operation mode is confirmed (# 201), and it is checked whether or not the operation mode has been changed after the previous confirmation (# 202). If not changed (NO in # 202), the process proceeds to step # 205.

  When the operation mode is changed (YES in # 202), the changed operation mode, that is, the switching data D154 corresponding to the current operation mode is read from the switching setting database 161 and stored in the channel control register 154 (#). 203, # 204).

  Then, it waits for the elapse of a predetermined switching cycle T2 (# 205). When the switching cycle T2 has elapsed (YES in # 205), the presence / absence of an operation end event is checked (# 206). Steps # 201 to # 206 are repeated until an operation end event occurs.

  In FIG. 16, first, the sampling time control register 155 and the channel control register 154 are referred to (# 301).

  If the sampling time Ts stored in the sampling time control register 155 has been changed from the previous one (YES in # 302), the currently stored sampling time Ts is set as the time to be applied to sampling. (# 303). If the sampling time Ts has not been changed (NO in # 302), the stored sampling time Ts is applied as it is.

  If the switching data D154 stored in the channel control register 154 has been changed from the previous one (YES in # 304), the data stored in the currently stored switching data D154 is applied to the A / D conversion process. (# 305). Then, the processing order k, which is the order of interest in the execution order K (1 to Kmax) in the channel control register 154, is initialized to 1 (# 306).

  If the switching data D154 has not been changed from the previous one (NO in # 304), the previous switching data D154 is continuously applied to perform the A / D conversion process. That is, the process proceeds to step # 307 as it is.

  Next, a designated channel processing routine for sampling the channel CH corresponding to the processing order k in the switching data D154 is executed (# 307).

  After executing the designated channel processing, the processing order k is compared with the maximum value Kmax of the execution order K (# 308). If the processing order k is smaller than the maximum value Kmax (YES in # 308), the processing order k is incremented by 1 (# 309). Then, it is confirmed that there is no end command from the main control unit 11 (YES in # 310), and the process returns to step # 307 to execute the designated channel process. If there is a termination command (NO in # 310), the process is terminated.

  On the other hand, if the processing order k is not smaller than the maximum value Kmax (when k = Kmax), if there is no termination command (YES in # 311), the process returns to step # 301. If there is a termination command (NO in # 311), the process is terminated. That is, while the end command is not given, the operation of sampling with the pattern indicated by the switching data D154 is repeated.

  In FIG. 17, a channel CH whose execution order K value in the channel control register 154 is the processing order k is selected by the input switching unit 151 and sampling is started (# 371). When the sampling time Ts ends (# 372), and when the sampling time Ts ends (YES in # 372), quantization is performed (# 373). Then, the conversion data Dj obtained by quantization is stored (# 374).

  According to the above embodiment, since it is only necessary to set the order for only the channel CH that requires the conversion data Dj according to the operation mode, the channel is configured to perform A / D conversion at a desired cycle for each of the plurality of channels CH. The order of selection can be set more easily than before.

  According to the embodiment described above, individual sampling times can be set for each analog signal without providing a register for storing the sampling time for each of the plurality of analog signals Sa.

  Since the sampling time control register 155 is provided, the setting of the sampling time Ts can be changed in accordance with the external impedance of the channel CH to be selected so as not to cause a wasteful waiting time in sampling.

  In the embodiment described above, when the setting of the operation mode is changed, the switching control unit 16 updates the storage content of the channel control register 154 with the switching data D154 corresponding to the changed operation mode. It may replace with this and may comprise as follows. That is, a storage area capable of storing a plurality of switching data D154 corresponding to a plurality of operation modes is provided in the channel control register 154, and the switching control unit 16 stores the channel control register 154 according to the changed operation mode. The areas may be switched.

  In the embodiment described above, the number of operation modes and the contents of the setting tables 91 to 94 are not limited to examples, and can be arbitrarily selected.

  In addition, the configuration of each or each part of the image forming apparatus 1 and the A / D conversion apparatus 13, the contents of processing, the order, the timing, and the like can be appropriately changed in accordance with the spirit of the present invention.

1 Image forming device (equipment)
10 Controller (Controller)
13 A / D converter 16 Switching control unit 23 Printer engine 31, 32 Sensor 150 Conversion control unit 151 Input switching unit 152 S / H unit 153 Quantization unit 154 Channel control register 155 Sampling time control registers CH, CH1, CH2, CH3 Channel (Analog input channel)
CH18, CH19, CH20 channels (analog input channels)
Dj conversion data (digital data)
D154 Switching data D155 Sampling time data Sa, Sa1, Sa2, Sa3 Analog signal Sa18, Sa19, Sa20 Analog signal T1 Control cycle (predetermined cycle)
Ts Sampling time

Claims (9)

An A / D converter provided in a device having a plurality of operation modes set alternatively,
An input switching unit comprising a plurality of analog input channels for inputting a plurality of analog signals, and selecting one analog input channel from among the plurality of analog input channels;
An S / H unit that samples / holds the analog signal selected by the input switching unit;
A quantization unit that quantizes the analog signal sampled / held by the S / H unit and outputs digital data;
A channel control register for storing switching data indicating the analog input channel to be selected in the input switching unit among the plurality of analog input channels and a selection order;
The input switching unit, S so as to obtain the digital data corresponding to the analog input channel to be selected, which is indicated by the switching data stored in the channel control register, with reference to the channel control register every predetermined period / H unit, and a conversion control unit for controlling the quantization unit;
A switching control unit that switches the switching data according to the changed operation mode to be referred to by the conversion control unit when the setting of the operation mode is changed,
An A / D converter characterized by the above. The switching control unit switches to update the storage content of the channel control register so that the switching data according to the changed operation mode is stored in the channel control register.
The A / D conversion device according to claim 1. The channel control register has a storage area capable of storing a plurality of the switching data according to the plurality of operation modes,
The switching control unit switches the storage area of the channel control register according to the changed operation mode.
The A / D conversion device according to claim 1. When the operation mode in which the digital data needs to be obtained at a time interval shorter than the period is set, the switching control unit selects the analog input channel corresponding to the digital data discontinuously several times. Switching so that the switching data indicating that
The A / D conversion device according to any one of claims 1 to 3. A sampling time control register for storing sampling time data indicating the sampling time in the S / H section;
The conversion control unit is configured to sample / hold the analog signal at each sampling time indicated by the sampling time data stored in the sampling time control register and obtain the digital data so as to obtain the digital data. Control
The A / D conversion device according to any one of claims 1 to 4. The input switching unit, the S / H unit, the quantization unit, the channel control register, and the conversion control unit are configured as one semiconductor integrated circuit.
The A / D conversion device according to any one of claims 1 to 4. The switching control unit is configured as one semiconductor integrated circuit different from the semiconductor integrated circuit;
The A / D conversion device according to claim 6. An image forming apparatus which is the device including the A / D conversion device according to claim 1,
A printer engine for forming an image on paper by electrophotography;
A plurality of sensors for outputting the plurality of analog signals;
A controller for controlling the printer engine based on digital data obtained by the A / D converter.
An image forming apparatus. As the plurality of operation modes,
At least two of a startup mode for warming up the printer engine, a power saving mode for pausing the printer engine, and an image stabilization mode for adjusting operating conditions related to image quality of the printer engine,
The image forming apparatus according to claim 8.

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