JP2018182811A - Power converter and control device therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power converter which reduces a harmonic wave component of a system by compensating for phase delay caused by a dead time such as delay of a control operation, and a control device therefor.SOLUTION: A power converter comprises: a dq transformer 1 which performs coordinate transformation on an AC signal of a system, thereby separating the AC signal into a fundamental wave component and a harmonic wave component; a harmonic wave extractor 2 which removes the fundamental wave component from the output, thereby extracting the harmonic wave component; harmonic wave axis coordinate transformation means B which performs coordinate transformation on the harmonic wave component on a γδ orthogonal rotation coordinate, thereby removing an initial phase of the harmonic wave component; a dead time compensator 6 which delays a reference phase during forward rotation of a dq orthogonal rotation coordinate just for a phase corresponding to a first correction amount in relative to during backward rotation; a dead time compensator 7 which delays a reference phase during forward rotation of the γδ orthogonal rotation coordinate just for a phase corresponding to a second correction amount in relative to during backward rotation; and an inverse dq transformer 5 which performs inverse transformation on output of the harmonic wave axis coordinate transformation means B on the dq orthogonal rotation coordinate, thereby generating a harmonic wave compensation signal. The first and second correction amounts are made equal.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a power converter and its control device, and more particularly to a technology for reducing harmonic current generated by a load connected to an AC power supply system by the operation of the power converter.

When a load including a rectifier circuit or the like is connected to an AC power supply system, the load current includes harmonic current. This harmonic current causes malfunction and noise of various electric devices such as a power converter connected to an AC power supply system.
A so-called active filter is known as one means for reducing this harmonic current.

FIG. 4 shows an application example of a conventional parallel active filter.
In FIG. 4, 101 is an AC power supply, 102 is an interconnection reactor, 103 is a voltage detector, 104 is a PLL (Phase Locked Loop) circuit for detecting the phase θ _{1 of the} grid voltage, and 105 is a current for detecting a load current i _S A detector 106 is a harmonic load including a rectifier etc. 107 is a load current detection filter for extracting a load current i _sens including a harmonic component to be compensated, 108 is an LCL filter, and 110 is a parallel active filter.

The parallel active filter 110 generates a harmonic current command i ^* based on the phase θ ₁ and the load current detection value i _sens , and generates a voltage command according to the harmonic current command i ^*. Semiconductor switching which is connected in parallel to the controller 112, the PWM circuit 113 which generates a PWM (pulse width modulation) pulse based on the voltage command, and the harmonic load 106, and which is turned on / off according to the PWM pulse It is comprised by power converters 114, such as an inverter provided with an element.
The parallel active filter 110 controls the power converter 114 to flow the current i _C that cancels the harmonic component contained in the load current i _S , thereby suppressing the harmonic current flowing to the AC power supply 101 side. There is.

However, in the circuit of FIG. 4, the harmonic current command i ^* is converted to a harmonic component of the load current i _S due to the dead time consisting of the detection delay time of the load current i _{S and} the delay time of the control calculation in the harmonic detection circuit 111. On the other hand, a phase delay occurs and an error occurs between the two. Therefore, even if the inverter 114 injects the current i _C into the system according to the harmonic current command i ^* , there is a problem that a sufficient suppression effect on the harmonic current can not be obtained.

On the other hand, as a conventional technique for compensating for the phase delay due to the above-mentioned dead time, a technique for correcting the reference phase of the coordinate conversion means is known as disclosed in, for example, Patent Document 1.
FIG. 5 is an overall block diagram of the semiconductor power conversion device described in Patent Document 1, and an outline of its operation will be described below.

  First, a load 203 including a rectifier and the like is connected to the AC power supply system 201. The three-phase load current detected by the current detector 202 is subjected to rotational coordinate conversion using the reference phase (ωt + φ) by the dq conversion unit 214 in the dq control unit 210, and is converted to the d axis current component and the q axis current component. It is separated. The reference phase (ωt + φ) is detected by the phase detection unit 211 connected to the voltage detector 204.

  The d-axis current component and the q-axis current component output from the dq conversion unit 214 are input to the inverse dq conversion unit 217 via the filters 215 and 216 that remove harmonic components, and are used three times using the reference phase (ωt + φ + δ). It is converted to the current command value of the phase. The current command value is converted into a voltage command value by the current controller 221, and the semiconductor switching element of the power converter 224 is turned on / off by the gate pattern (PWM pulse) output from the subsequent PWM circuit 223. In addition, 225 is a transformer for interconnection and 222 is a current detector.

  In the above configuration, the reference phase (ωt + φ + δ) input to the inverse dq conversion means 217 is the phase (ωt + φ) detected by the phase detection means 211 and the correction phase δ set by the correction phase setting device 212 by the adder 213. It is calculated by adding up. The current command value generated by the dq control unit 210 is wasted by setting the correction phase δ in consideration of the dead time due to the detection delay by the current detector 202 and the delay in the control calculation by the dq control unit 210. The phase delay due to time is compensated, and the power converter 224 can be operated without a control error.

JP 2008-234298 A (paragraphs [0010] to [0033], FIG. 1, etc.)

  However, in order to compensate for the phase delay with respect to the harmonic components of the unspecified order by the technique described in Patent Document 1, since the correction phase δ changes according to the order of the harmonic components, this order is determined A computing device is required. Generally, FFT (Fast Fourier Transform) is known as an operation means for obtaining the order of harmonic components, but a high-speed operation device and a large capacity memory are required for the FFT operation. There is a problem that the cost of

  Therefore, the problem to be solved by the present invention is to provide a power converter capable of reducing harmonic components of an AC power supply system by compensating for phase delay due to dead time without using arithmetic means such as FFT and a control device therefor. It is in.

In order to solve the above-mentioned subject, a control device of a power converter concerning Claim 1 is a control device which controls a power converter connected to an alternating current power supply system, and any of the alternating current signals of the alternating current power supply system is included. In a control device that detects a harmonic component of an order, generates a harmonic compensation signal for suppressing the detected harmonic component, and gives the signal as a command value to the power converter,
Inside the control device, dq orthogonal rotation coordinates consisting of a d axis having a phase synchronized with the AC power supply system and a q axis orthogonal to this d axis are defined, and the AC signal is coordinated on the dq orthogonal rotation coordinates Dq conversion means for converting and separating into a fundamental wave component and a harmonic wave component;
Harmonic extraction means for removing the fundamental wave component from the output of the dq conversion means to extract the harmonic component;
Within the control device, a γδ orthogonal rotation coordinate is defined which comprises a γ axis having a phase synchronized with the harmonic component and a δ axis orthogonal to the γ axis, and the harmonic component is defined on the γδ orthogonal rotation coordinate. Harmonic axis coordinate conversion means for removing the initial phase of the harmonic component by coordinate conversion;
First phase correction means for delaying the reference phase during forward rotation of the dq orthogonal rotation coordinates by a phase according to a first correction amount with respect to the reference phase during reverse rotation;
Second phase correction means for delaying the reference phase during positive rotation of the γδ orthogonal rotation coordinate by a phase according to a second correction amount with respect to the reference phase during reverse rotation;
Means for inversely converting the output of the harmonic axis coordinate conversion means on the dq orthogonal rotation coordinates to generate the harmonic compensation signal;
By equalizing the first correction amount and the second correction amount, it is possible to compensate for the phase delay that occurs between the detected value of the AC signal and the harmonic compensation signal due to dead time. It features.

  A control device for a power converter according to claim 2 is characterized in that, in the control device for a power converter according to claim 1, the dead time includes a delay time due to a control operation after the dq conversion means. .

  A control device for a power converter according to claim 3 is the control device for a power converter according to claim 1 or 2, characterized in that the dead time includes a delay time of the detection process of the alternating current signal. .

  A control device for a power converter according to claim 4 is the control device for a power converter according to any one of claims 1 to 3, wherein the amplitude of the input signal and the output signal of the harmonic axis coordinate conversion means are It is characterized in that it comprises means for correcting an error with the amplitude.

  The power converter according to claim 5 turns on / off the semiconductor switching element with the harmonic compensation signal generated by the control device according to any one of claims 1 to 4 as a command value, and generates the alternating current signal. It is characterized in that it operates to reduce contained harmonic components.

According to the present invention, harmonic components included in the load current can be reduced at low cost and with high accuracy without using a high-speed arithmetic device or a large-capacity memory.
As a result, it is possible to prevent the occurrence of malfunction or noise of various electric devices connected to the AC power supply system.

It is a block diagram showing the principal part of the control device concerning a 1st embodiment of the present invention. FIG. 2 (A) is a diagram showing the interrelation of the reference phase signals of the dq converter and the inverse dq converter, and FIG. 2 (B) is a diagram showing the interrelation of the reference phase signals of the γδ converter and the inverse γδ converter. is there. It is a block diagram which shows the principal part of the control apparatus which concerns on 2nd Embodiment of this invention. It is a figure which shows the application example of the conventional parallel type | mold active filter. FIG. 1 is an overall block diagram of a semiconductor power conversion device described in Patent Document 1.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, FIG. 1 is a block diagram showing a main part of a control device according to a first embodiment of the present invention. This control device is provided, for example, in place of the dq control unit 210 in FIG. 5, and reduces harmonic components of the load current based on the three-phase load current detection value _isens acquired from the AC power supply system. generates a harmonic compensation current i _cmp for, as a current command value of this harmonic compensation current i _cmp, it has a function of giving to the power converter through a current controller (not shown) or the like.
The load current detection value i _sens includes the fundamental wave component of the system voltage and the Nth harmonic component.

In FIG. 1, the dq converter 1 uses the reference phase signal a input from the dead time compensator 6 (first phase correction means) to detect the three-phase load current detection value _isens as the d axis and the q axis. Coordinate conversion into the load current I _Sd , I _Sq of Here, the d-axis and q-axis constitute orthogonal rotation coordinates, and the phase of the d-axis is (ω ₁ t-α ₁ ) delayed by α ₁ from the system voltage phase ω ₁ t, and the q-axis is d The axis leads 90 ° from the axis.
Incidentally, 11 is a sin / cos calculator for output from the system voltage phase ω ₁ t sinω ₁ t, the dead time compensator 6 calculates a cos .omega ₁ t.
ω ₁ is a fundamental wave angular frequency of the system voltage, and an initial phase α ₁ of the d axis will be described later. In dq orthogonal rotation coordinates, the fundamental wave component is a direct current, and the harmonic component is an (N-1) -order alternating current.

The harmonic extractor 2 removes DC components included in the load currents I _Sd and I _Sq on the d and q axes, and extracts harmonic currents I _{Sh1 d} and I _Sh1 q on the d and q axes.
The γδ converter 3 uses the reference phase signal c input from the dead time compensator 7 (second phase correction means) to generate the d-axis harmonic current I _Sh1d (the cos component of the harmonic current vector I _{Sh1 dq} ), Coordinate conversion of the q-axis harmonic current I _Sh1q ( _also the sin component of I _{Sh1 dq} ) into the γ-axis and δ-axis harmonic currents I _Sh1γ and I _Sh1δ .
The γ and δ axes constitute orthogonal rotation coordinates, the phase of the γ axis is (ω ₂ −ω ₁ ) t−α ₂ , and the δ axis is an axis advancing 90 ° from the γ axis. Here, omega ₂ is a harmonic angular frequency of the system voltage will be described later initial phase alpha ₂ of γ-axis.

The inverse γδ converter 4 uses the reference phase signal d (I _Sh1d , I _Sh1q ) to set the harmonic currents I _Sh1 γ and I _Sh1 δ of the γ and δ axes to the compensation currents I _β1 d and I _β1 q of the d and q axes, _{respectively.} Coordinate conversion to The phase of the γ axis is ω ₂ t, and the δ axis is an axis leading in a 90 ° direction from the γ axis.

The inverse dq converter 5 coordinates-converts the d-axis and q-axis compensation currents I _β1 d and I _β1 q into three-phase compensation current i _cmp using the reference phase signal b output from the sin / cos calculator 12 . The phase of the d axis is equal to the system voltage phase ω ₁ t, and the q axis is an axis leading in a 90 ° direction from the d axis.

  In the above configuration, the dq converter 1 and the inverse dq converter 5 are referred to as a fundamental wave axis coordinate conversion means A, and the γδ converter 3 and the inverse γδ converter 4 are referred to as a harmonic axis coordinate conversion means B.

Next, how to obtain the initial phase α ₁ of the d axis and the initial phase α ₂ of the γ axis described above will be described with reference to FIG.
2A shows the cos component of the reference phase signal a of the dq converter 1 (hereinafter simply referred to as the reference phase signal a) and the cos component of the reference phase signal b of the inverse dq converter 5 (hereinafter simply referred to as the reference phase signal b) is a diagram showing the relationship. As shown, it is assumed that the reference phase signal a lags the reference phase signal b by time (in other words, phase) σ.

Since the reference phase signal a of the dq converter 1 is synchronized with the grid voltage phase ω ₁ t, the initial phase α ₁ of the d axis is expressed by Equation 1.
[Equation 1]
α ₁ = ω ₁ × σ
According to Equation 1, α ₁ / ω ₁ = σ, and this α ₁ / ω ₁ corresponds to the first correction amount in the claims.

2B shows the cos component of the reference phase signal c of the γδ converter 3 (hereinafter simply referred to as the reference phase signal c) and the cos component of the reference phase signal d of the inverse γδ converter 4 (hereinafter simply referred to as the reference phase signal d) is a diagram showing the relationship. As shown, the reference phase signal c of the γδ converter 3 is delayed from the reference phase signal d of the inverse γδ converter 4 by time σ.
Here, FIG. 2 (B) is an enlarged view of the time axis with respect to FIG. 2 (A), and the actual time σ is equal in FIGS. 2 (A) and 2 (B).

Since the reference phase signal c of the γδ converter 3 is synchronized with the harmonic component (N−1 order (ω ₂ −ω ₁ )), the initial phase α ₂ of the γ axis is expressed by Equation 2.
[Equation 2]
α ₂ = (ω ₂ −ω ₁ ) × σ
According to Equation 2, α ₂ / (ω ₂ −ω ₁ ) = σ, and this α ₂ / (ω ₂ −ω ₁ ) corresponds to the second correction amount in the claims.

  As described above, in this embodiment, the reference phase signals a and c during forward rotation in the dq conversion and the γδ conversion are each delayed by time σ with respect to the reference phase signals b and d during reverse rotation. It will be described below that the phase delay due to the dead time of the harmonic component of an arbitrary order can be compensated by this.

数式３において、Ｖは系統電圧の実効値、ω_１は基本波角周波数である。 First, assuming that the three-phase grid voltage is v _u , v _v , v _w , these are expressed as Formula 3.

In Equation 3, V is the effective value of the grid voltage, and ω ₁ is the fundamental wave angular frequency.

数式４において、Ｉ_１は負荷電流の基本波成分の実効値、Ｉ_２は負荷電流の高調波成分の実効値、ω_２は高調波角周波数、φ_１は基本波成分の初期位相、φ_２は高調波成分の初期位相である。 Next, since the load current is the sum of the fundamental wave component and the harmonic wave component, assuming that the phase of the fundamental wave component is ω ₁ t + φ ₁ and the phase of the harmonic wave component is ω ₂ t + φ ₂ , three-phase load current detection The value i _sens (R phase: i _a , S phase: i _b , T phase: i _c ) is expressed by Equation 4.

In Equation 4, I ₁ is the effective value of the fundamental wave component of the load current, I ₂ is the effective value of the harmonic component of the load current, ω ₂ is the harmonic angular frequency, φ ₁ is the initial phase of the fundamental wave component, φ ₂ Is the initial phase of the harmonic component.

Further, the three-phase load current can be expressed by Equation 5 when it is expressed by the α-axis load current i _α and the β-axis load current i _β on the αβ-axis orthogonal fixed coordinates.

図１に示したｄｑ変換器１は、上述した数式４〜数式６の処理を行う。 Next, d-axis and q-axis load currents i _Sd and i _{Sq obtained by performing} coordinate conversion of the α-axis and β-axis load currents i _α and i _β shown in Equation 5 with d-axis and q-axis are as shown in Equation 6. become. Here, it is assumed that the reference phase of the dq conversion is delayed by α ₁ from the system voltage phase ω ₁ t as described above.

The dq converter 1 shown in FIG. 1 performs the processing of Equations 4 to 6 described above.

Next, the d axis and q axis harmonic currents i _Sh1d and i _Sh1q extracted by removing the DC component from i _Sd and i _Sq by the harmonic wave extractor 2 of FIG.

この数式８を数式７と比較すると、座標変換後のγ軸、δ軸の高調波電流ｉ_ｓｈ１γ，ｉ_ｓｈ１δでは高調波成分の初期位相φ_２が除去されていることが分かる。 _Further , the γ-axis and δ-axis harmonic currents i _Sh1γ and i _{Sh1δ obtained} by coordinate-converting the d-axis and q-axis harmonic currents i _Sh1d and i _{Sh1 q} by the γδ converter 3 are as shown in Formula 8. Here, the reference phase of γδ _conversion, i _Sh1d, to the _{i Sh1q} phase as delayed by alpha _2.

Comparing Eq. 8 with Eq. 7, it can be seen that in the γ-axis and δ-axis harmonic currents i _sh1γ and i _sh1δ after coordinate conversion, the initial phase φ ₂ of the harmonic component is removed.

Then, the d-axis and q-axis compensation currents i _β1d and i _{β1q obtained} by coordinate conversion of the harmonic currents i _Sh1γ and i _Sh1δ of the γ and δ axes by the inverse γδ converter 4 are as shown in Formula 9. Here, the reference phase of the inverse γδ conversion is made equal to the phases of i _{Sh1 d} and i _{Sh1 q} . Therefore, i _Sh1d and i _Sh1q shown in Formula 7 are substituted as they are into the conversion matrix of the inverse γδ conversion in Formula 9.

Finally, three-phase harmonic compensation currents for reducing the Nth harmonic component by performing inverse dq conversion by inputting the compensation currents i _β1d and i _β1q of the d axis and q axis to the inverse dq converter 5 Calculate i _cmp .
The harmonic load currents i _S2α and i _S2β of the α and β axes obtained by performing inverse coordinate transformation of the compensation currents i _β1 d and i _β1 q of the d axis and the q axis in the inverse dq converter 5 are become that way. The reference phase of the α axis is the same as the system voltage phase ω ₁ t.

The above harmonic load currents i _S2α and i _S2β become Equation 11 by substituting Equations 1 and 2 into Equation 10.

The inverse dq converter 5 performs two-phase / three-phase conversion on the harmonic load currents i _S2α and i _S2β of the α and β axes obtained by the calculations of Equations 10 and 11, and the three-phase harmonic compensation current i _cmp Output. For example, as shown in FIG. 5, the compensation current i _cmp is sent to the current controller as a current command value, and the harmonic component of the load current is reduced by driving the semiconductor switching element of the power converter through the PWM circuit. Current can be supplied to the AC power supply system.

According to Equation 11 described above, the harmonic load currents i _S2α and i _S2β of the α and β axes are compared with the harmonic components of the load currents i _α and i _β of the _α and β axes shown in Equation 5. It can advance by time σ.
That is, in the present embodiment, the harmonic compensation current that suppresses the phase delay due to the dead time by delaying the reference phase signal during forward rotation by dq conversion and γδ conversion with respect to the reference phase signal during reverse rotation by time σ. By generating i _cmp and operating the power converter with this compensation current i _cmp as a current command value, it is possible to reduce harmonic components of the current flowing through the AC power supply system.

  In the present embodiment, the phase delay due to the delay time due to the delay in the control calculation is compensated, but as described above, the phase delay due to the current detection delay or the signal delay due to the cable is collectively compensated. can do.

Next, a second embodiment of the present invention will be described based on FIG. In FIG. 3, the same parts as those in FIG.
As shown in FIG. 3, in the second embodiment, an amplitude corrector 8 is provided between the inverse γδ converter 4 and the inverse dq converter 5. The amplitude corrector 8, the compensation current I _Beta1d, harmonic current _I Sh1d the amplitude of the I _Beta1q, corrected based on the _{I Sh1q,} compensation current I _Beta2d, and outputs it as _I β2q.

That is, in the processing by the harmonic axis coordinate conversion means B (γδ converter 3 and inverse γδ converter 4), as is understood from Equation 11, the harmonic current I _Sh1d and I _Sh1q input to the γδ converter 3 and amplitude of the current vector _{I Sh1dq,} compensation current I _Beta1d outputted from the inverse γδ converter 4, an error occurs between the amplitude of the current vector I _Beta1dq consisting I _Beta1q, current vector I amplitude of _Beta1dq current vector I _It becomes larger than the amplitude of _{Sh1 dq} . The rate of increase of the amplitude in this case can be determined by Equation 12.
[Equation 12]
Increase rate = I _Sh1d ² + I _Sh1q ²

Therefore, in the amplitude correction unit 8 shown in FIG. 3, the current vector I _β1dq is multiplied by the reciprocal of the rate of increase to generate I _{β2 dq} whose amplitude is corrected, and then _divided into I _{β1 d} and I _{β1 q} for inverse dq conversion. By outputting to the unit 5, the error between the amplitude of the input signal of the harmonic axis coordinate conversion means B and the amplitude of the output signal can be corrected.

  As described above, in the first and second embodiments, since the phase delay due to the dead time of the harmonic component can be compensated regardless of the order of the harmonic component, the order of the harmonic component is detected. It is possible to contribute to cost reduction by eliminating the need for performing calculations such as FFT, eliminating the need for high-speed arithmetic devices, large-capacity memories, and the like.

Further, the present invention not only has a control device having a function of generating harmonic compensation current i _cmp based on load current detection value i _sens , but also a semiconductor switching element using the above harmonic compensation current i _cmp as a current command value And a power converter such as an inverter which injects a harmonic compensation current into the AC power supply system.

1: dq converter 2: harmonics extractor (harmonics extraction means)
3: γδ converter 4: inverse γδ converter 5: inverse dq converter 6: dead time compensator (first phase correction means)
7: Dead time compensator (second phase correction means)
8: Amplitude corrector (amplitude correction means)
11, 12: sin / cos operator A: fundamental axis coordinate conversion means B: harmonic axis coordinate conversion means

Claims (5)

A control device for controlling a power converter connected to an AC power supply system, for detecting a harmonic component of an arbitrary order included in an AC signal of the AC power supply system and suppressing a detected harmonic component. In a control device that generates a harmonic compensation signal and supplies it to the power converter as a command value,
Inside the control device, dq orthogonal rotation coordinates consisting of a d axis having a phase synchronized with the AC power supply system and a q axis orthogonal to this d axis are defined, and the AC signal is coordinated on the dq orthogonal rotation coordinates Dq conversion means for converting and separating into a fundamental wave component and a harmonic wave component;
Harmonic extraction means for removing the fundamental wave component from the output of the dq conversion means to extract the harmonic component;
Within the control device, a γδ orthogonal rotation coordinate is defined which comprises a γ axis having a phase synchronized with the harmonic component and a δ axis orthogonal to the γ axis, and the harmonic component is defined on the γδ orthogonal rotation coordinate. Harmonic axis coordinate conversion means for removing the initial phase of the harmonic component by coordinate conversion;
First phase correction means for delaying the reference phase during forward rotation of the dq orthogonal rotation coordinates by a phase according to a first correction amount with respect to the reference phase during reverse rotation;
Second phase correction means for delaying the reference phase during positive rotation of the γδ orthogonal rotation coordinate by a phase according to a second correction amount with respect to the reference phase during reverse rotation;
Means for inversely converting the output of the harmonic axis coordinate conversion means on the dq orthogonal rotation coordinates to generate the harmonic compensation signal;
Equipped with
By equalizing the first correction amount and the second correction amount, it is possible to compensate for the phase delay that occurs between the detected value of the alternating current signal and the harmonic compensation signal due to the dead time. Control device of power converter characterized by the above. In the controller for a power converter according to claim 1,
The controller for a power converter, wherein the dead time includes a delay time of control calculation after the dq conversion means. The control device of the power converter according to claim 1 or 2
The controller of a power converter, wherein the dead time includes a delay time of detection processing of the alternating current signal. In a control device of a power converter according to any one of claims 1 to 3.
A control device for a power converter, comprising means for correcting an error between the amplitude of an input signal of the harmonic axis coordinate conversion means and the amplitude of an output signal.   The semiconductor switching element is turned on and off with a harmonic compensation signal generated by the control device according to any one of claims 1 to 4 as a command value to reduce harmonic components included in the AC signal. A power converter characterized by operating.

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