JP2018148642A - Motor drive circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a motor drive circuit capable of stably rotating a motor while continuing voltage compensation control even when a duty ratio of a voltage applied to a coil of the motor is high.SOLUTION: In a motor drive circuit 20 for generating a voltage applied to a motor, a voltage compensation part 68 corrects a duty ratio of a voltage applied to the motor 52 according to a voltage of a battery 80 converted into a digital signal by an A-D converter 60A. The A-D converter 60A outputs a digital signal of a voltage of the battery 80 before fluctuations to a voltage correction part 68 through a filter 62 when an output duty ratio input into the voltage correction part 68 from a PI control unit 66 is not less than a predetermined value and a difference between before and after voltage fluctuations of the battery 80 is within a predetermined value. The voltage correction part 68 outputs an output duty ratio corrected with the digital signal of the voltage of the battery 80 before fluctuations to an FET driver 70.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a motor drive circuit.

  A blower motor (hereinafter abbreviated as “motor”) used for blowing air from a vehicle air conditioner changes the rotation speed of an output shaft by modulating a voltage applied to a coil by PWM (pulse width modulation). In PWM, the power of a battery as a power source is turned on and off by a switching element such as an FET (field effect transistor).

  N-type FETs used for PWM can be energized between the drain and source when a positive charge voltage is applied to the gate, but when a positive charge voltage is applied to the gate of the FET, There is a time difference in the vicinity until electrons as charge carriers are sufficiently collected. As a result, even if a voltage corresponding to the switching command signal is applied to the gate of the FET, the FET does not perform switching operation according to the command signal due to the time difference described above, and the response of the switching element to the command signal is not linear. A phenomenon can occur.

  Such non-linearity of the response is particularly problematic when a high voltage, that is, a voltage with a high duty ratio is applied to the motor coil in order to rotate the motor at high speed. FIG. 18 illustrates an example of changes in the gate-source voltage (FET VGS) of the FET and the drain-source voltage (FET VDS) of the FET when the duty ratio of the command signal (DUTY) is gradually increased. FIG.

  In FIG. 18, the command signal DUTY 90 changes on a rectangular wave, but the FET VGS 92 changes in a trapezoidal waveform due to the nonlinearity of the response in the FET. The FET is turned on when the FET VGS92 exceeds the threshold voltage (VTH), and the FET VDS94 becomes low level when the drain-source is energized. However, since the FET response is nonlinear, the command signal It is not a change corresponding to a certain DUTY90. In particular, when the duty ratio is high, it is a problem. As shown in the range 96 of FIG. 18, when the duty ratio becomes close to 100%, the FET VDS 94 remains at a low level, and the duty ratio is substantially 100. % May be the same as the case of%. Such an operation of the switching element not corresponding to the control signal becomes an impediment when the motor rotation speed is converged to the target speed based on the command signal, and in some cases, the rotation of the motor becomes irregular. There was a risk of rotational hunting.

  Further, the voltage of the battery as the power source varies depending on the power consumption of the electrical components of the vehicle or the power generation status of the alternator. In order to prevent the rotational speed of the motor from being affected by such voltage fluctuation, voltage compensation control is used in combination with voltage generation to be applied to the motor coil.

  The voltage compensation control is a process of “(reference voltage / actual voltage of power supply) × output duty ratio”. For example, when the reference voltage is 16V, the output duty ratio changes if the actual voltage of the power supply is 16V. However, when the actual voltage of the power supply decreases to 8V, the output duty ratio is doubled to cancel the change in the actual voltage of the power supply with the output duty ratio.

  However, as described above, when the duty ratio at which the influence of nonlinearity of the switching operation of the FET becomes significant is high, the voltage compensation control is executed, which promotes rotational hunting in which the rotational speed of the motor does not converge to the target value. There was a case. For example, when the output duty ratio according to the command signal exceeds 95% and the actual voltage of the power supply is low, it is necessary to further increase the output duty ratio by voltage correction, but if the output duty ratio becomes extremely large The interval at which the switching element is turned on / off becomes extremely short. In such a case, coupled with the nonlinearity of the operation of the switching element described above, the switching element cannot output a pulse according to the output duty ratio whose voltage has been corrected, which may hinder the control of the rotation speed of the motor. there were.

  Patent Documents 1 and 2 disclose motor control devices that do not execute voltage compensation control when the output duty ratio is large. Even on the vehicle side, when the motor output duty ratio is close to 100%, the charging control of the alternator is relaxed. Therefore, even when the voltage compensation control is not executed, a problem hardly occurs.

JP 2013-36572 A JP 2012-60798 A

  However, in recent years when demands for improving fuel consumption are increasing and idling stops are becoming common sense, it is required to increase the frequency of charging the alternator on the vehicle side. Furthermore, at the idling stop, the cell motor is frequently operated, and the fluctuation of the actual voltage of the power supply tends to become severe. In such a situation, if the voltage compensation control is not executed when the output duty ratio is large, there is a problem that the rotation speed of the motor fluctuates due to fluctuations in the actual voltage of the power supply.

  The present invention has been made in view of the above, and provides a motor drive circuit that stably rotates a motor while continuing voltage compensation control even when the duty ratio of a voltage applied to a motor coil is high. Objective.

  In order to solve the above problem, the motor drive circuit according to claim 1 includes a drive unit that generates a voltage to be applied to the motor and a duty ratio before correction according to the power supply voltage is less than a threshold value. The ratio is corrected according to the power supply voltage, and the drive unit is controlled to generate a voltage according to the corrected duty ratio. The duty ratio before correction according to the power supply voltage is greater than or equal to the threshold value and the power supply A control unit that controls the drive unit to generate a voltage in accordance with a duty ratio excluding the influence of the fluctuation of the power supply voltage when the voltage variation is within a predetermined value.

  According to this motor drive circuit, when the duty ratio of the voltage applied to the motor coil is high and the power supply voltage fluctuates, the motor is rotated by voltage compensation control excluding the influence of temporary voltage fluctuations. The motor can be rotated stably while continuing the compensation control.

  The motor drive circuit according to claim 2 is the motor drive circuit according to claim 1, wherein the duty ratio excluding the influence due to the fluctuation of the power supply voltage is the duty ratio before correction according to the power supply voltage. The duty ratio is corrected according to the power supply voltage.

  According to this motor drive circuit, when the voltage fluctuation is small, the voltage compensation control is performed by causing the drive unit to generate a voltage according to the duty ratio corrected by the voltage compensation control according to the power supply voltage before the fluctuation. The motor can be rotated stably while continuing.

  According to a third aspect of the present invention, in the motor driving circuit according to the first or second aspect, the control unit determines that the fluctuation of the power supply voltage is a predetermined value based on a voltage difference before and after the fluctuation of the power supply voltage. It is determined whether it is within the range.

  According to this motor drive circuit, it is possible to determine the degree of influence of the fluctuation of the power supply voltage by calculating the difference between the voltages before and after the fluctuation of the power supply voltage, and when the influence is small, the correction is made according to the power supply voltage before the fluctuation. By generating the voltage according to the duty ratio in the drive unit, the motor can be stably rotated while continuing the voltage compensation control.

  The motor drive circuit according to claim 4 is the motor drive circuit according to any one of claims 1 to 3, wherein when the fluctuation of the power supply voltage is within a predetermined value, the power supply voltage is digitally converted. This is a case where the value of the lower bit of the predetermined digit of the value is the same.

  According to this motor drive circuit, it is possible to determine the degree of the influence of the fluctuation of the power supply voltage by a simple calculation process of comparing each predetermined lower bit of the digital signal of the power supply voltage before and after the fluctuation, and the influence is small. In this case, by generating a voltage according to the duty ratio corrected according to the power supply voltage before the fluctuation, the motor can be stably rotated while continuing the voltage compensation control.

  The motor drive circuit according to claim 5 is the motor drive circuit according to claim 1, wherein the least significant bit of each digital value obtained by digitally converting the power supply voltage before and after the fluctuation of the power supply voltage is set to the same value. By correcting the duty ratio, the influence of the fluctuation of the power supply voltage on the duty ratio is excluded.

  According to this motor drive circuit, the influence of the voltage fluctuation is suppressed by correcting the duty ratio using the digital signal of the power supply voltage with the least significant bit fixed to the same value. As a result, the motor can be stably rotated while continuing the voltage compensation control.

  A motor drive circuit according to a sixth aspect is the motor drive circuit according to the first aspect, wherein the control unit represents a duty ratio before correction according to a power supply voltage by a ratio of a reference voltage to the power supply voltage. The gain factor is multiplied to correct the duty ratio according to the power supply voltage, and the gain coefficient is reduced to eliminate the influence of the duty ratio due to the fluctuation of the power supply voltage.

  According to this motor drive circuit, the influence of voltage fluctuation is suppressed by reducing the gain of voltage compensation control. As a result, the motor can be stably rotated while continuing the voltage compensation control.

  The motor drive circuit according to claim 7 is the motor drive circuit according to claim 1, wherein the control unit has a duty ratio before correction according to a power supply voltage that is equal to or greater than the threshold value and the power supply voltage fluctuates. In this case, the lower bit of the predetermined digit of the digital value of the duty ratio corrected according to the power supply voltage immediately before the fluctuation is the same as the lower bit of the predetermined digit of the digital value of the duty ratio corrected according to the power supply voltage immediately after the fluctuation. In this case, control is performed to cause the drive unit to generate a voltage according to the duty ratio corrected according to the power supply voltage immediately before the change.

  According to this motor drive circuit, the predetermined digit bit of the digital signal with the duty ratio corrected according to the power supply voltage before the fluctuation and the predetermined digit of the digital signal with the duty ratio corrected according to the power supply voltage after the fluctuation. The degree of influence of power supply voltage fluctuation can be determined by a simple calculation process of comparing with the bit, and if the influence is small, the voltage according to the duty ratio corrected according to the power supply voltage before fluctuation is used. By generating the driving unit, the motor can be stably rotated while continuing the voltage compensation control.

  The motor drive circuit according to claim 8 is the motor drive circuit according to claim 1, wherein the control unit corrects the least significant bit of the digital value of the duty ratio corrected according to the power supply voltage immediately before the change and immediately after the change. By making the least significant bit of the digital value of the duty ratio corrected according to the power supply voltage the same value, the influence of the duty ratio due to the fluctuation of the power supply voltage is excluded.

  According to this motor drive circuit, by fixing the least significant bit of the duty ratio corrected according to the power supply voltage, and generating the voltage according to the duty ratio with the least significant bit fixed to the same value, Suppresses the effects of voltage fluctuations. As a result, the motor can be stably rotated while continuing the voltage compensation control.

It is the schematic which shows the structure of the motor unit using the motor drive circuit which concerns on the 1st Embodiment of this invention. 1 is a block diagram showing an outline of a motor drive circuit according to a first embodiment of the present invention. It is the flowchart which showed an example of the dead zone process in the motor drive circuit which concerns on the 1st Embodiment of this invention. (A) shows an example of the process of step 302 of FIG. 3, and (B) shows an example of the process of step 310 of FIG. (A) shows another example of the process of step 302 of FIG. 3, (B) shows an example of the process of step 306 of FIG. 3, and (C) shows another example of the process of step 310 of FIG. An example is shown. It is a modification of the motor drive circuit which concerns on the 1st Embodiment of this invention. It is another modification of the motor drive circuit which concerns on the 1st Embodiment of this invention. It is a block diagram which shows the outline of the motor drive circuit which concerns on the 2nd Embodiment of this invention. It is the flowchart which showed an example of the pseudo dead zone process in the motor drive circuit which concerns on the 2nd Embodiment of this invention. (A) shows an example of the process of steps 102 and 104 of FIG. 9, (B) shows an example of the process of step 106 of FIG. 9, and (C) shows an example of the process of step 110 of FIG. Show. (A) shows another example of the process of steps 102 and 104 in FIG. 9, and (B) shows another example of the process of step 110 in FIG. It is a block diagram which shows the outline of the motor drive circuit which concerns on the 3rd Embodiment of this invention. It is the flowchart which showed an example of the resolution reduction process in the motor drive circuit which concerns on the 3rd Embodiment of this invention. (A) shows an example of the process of step 142 in FIG. 13, and (B) shows an example of the process of step 144 in FIG. It is a modification of the motor drive circuit which concerns on the 3rd Embodiment of this invention. It is another modification of the motor drive circuit which concerns on the 3rd Embodiment of this invention. It is a block diagram which shows the outline of the motor drive circuit which concerns on the 4th Embodiment of this invention. It is explanatory drawing which showed an example of the change of the gate source voltage (FET VGS) of FET, and the drain source voltage (FET VDS) of FET when the duty ratio of a command signal (DUTY) is raised gradually.

[First Embodiment]
FIG. 1 is a schematic diagram showing a configuration of a motor unit 10 using a motor drive circuit 20 according to the present embodiment. The motor unit 10 according to the present embodiment in FIG. 1 is a so-called blower motor unit used for blowing air from a vehicle air conditioner as an example.

  The motor unit 10 according to the present embodiment relates to a three-phase motor having an outer rotor structure in which a rotor 12 is provided outside a stator 14. The stator 14 is an electromagnet in which a lead wire is wound around a core member, and constitutes three phases of a U phase, a V phase, and a W phase.

  Each of the U-phase, V-phase, and W-phase of the stator 14 generates a so-called rotating magnetic field by switching the polarity of the magnetic field generated by the electromagnet under the control of a motor drive circuit 20 described later.

  A rotor magnet is provided inside the rotor 12 (not shown), and the rotor magnet rotates the rotor 12 by responding to the rotating magnetic field generated by the stator 14.

  The rotor 12 is provided with a shaft 16 and rotates integrally with the rotor 12. Although not shown in FIG. 1, in the present embodiment, the shaft 16 is provided with a multi-blade fan such as a so-called sirocco fan, and the multi-blade fan rotates together with the shaft 16, thereby blowing air in the vehicle air conditioner. It becomes possible.

  The stator 14 is attached to the motor drive circuit 20 via the upper case 18. The motor drive circuit 20 includes a substrate 22 of the motor drive circuit 20 and a heat sink 24 that dissipates heat generated from elements on the substrate 22.

  A lower case 28 is attached to the motor unit 10 including the rotor 12, the stator 14, and the motor drive circuit 20.

  FIG. 2 is a block diagram showing an outline of the motor drive circuit 20 according to the present embodiment. The inverter circuit 40 illustrated in FIG. 2 switches electric power supplied to the coil of the stator 14 of the motor 52 by the FETs 44A to 44F. For example, the FETs 44A and 44D switch the power supplied to the U-phase coil 14U, the FETs 44B and 44E switch to the V-phase coil 14V, and the FETs 44C and 44F switch the power supplied to the W-phase coil 14W.

  The drains of the FETs 44 </ b> A, 44 </ b> B, 44 </ b> C are connected to the positive electrode of the vehicle-mounted battery 80 via the choke coil 82. The sources of the FETs 44D, 44E, and 44F are connected to the negative electrode of the battery 80.

  Further, on the substrate of the motor drive circuit 20 of the present embodiment, in addition to the inverter circuit 40 described above, a comparator 54, an actual rotation number calculation unit 56, a command rotation number calculation unit 58, a PI control unit 66, a voltage correction unit. 68, FET driver 70, and the like are mounted. An air conditioner ECU (Electronic Control Unit) 78 is connected to the command rotational speed calculation unit 58. In addition, the voltage correction unit 68 receives information on the actual voltage of the battery 80 as a power source via the AD conversion unit 60A and the filter 62. The AD converter is a circuit that converts an actual voltage value of the battery 80, which is an analog signal, into an 8-bit digital signal. The filter 62 calculates an average of a plurality of digital signals, thereby digitizing the actual voltage value. Is a circuit for smoothing. For example, the filter 62 calculates an average of four actual voltage values acquired in time series order and outputs the average to the voltage correction unit 68. In addition, when the filter 62 acquires the data of the new actual voltage value sampled by the AD conversion unit 60A, the filter 62 newly adds the remaining three data in which the oldest data is discarded among the four data that have just been averaged. The average is calculated with the acquired data to smooth the data. Thereafter, each time new data is acquired, the filter 62 discards the oldest data and continues the process of calculating the average value between the new data and the remaining data.

  The air conditioner ECU 78 is an electronic control unit of the vehicle air conditioner. When the user turns on the air conditioner by the air conditioner ECU 78, the motor 52 is operated by the control of the motor drive circuit 20. When the user adjusts the air volume of the vehicle air conditioner, a signal for instructing the rotational speed of the motor 52 (rotor 12) is input via the air conditioner ECU 78.

  In addition, on the substrate of the motor drive circuit 20 of the present embodiment, currents flowing through the DC power supply circuit, the inverter circuit 40 and the coils 14U, 14V, and 14W of the motor 52 for supplying power for driving each component ( When the motor current becomes excessive or the temperature of the board becomes excessive, the rotation speed of the motor 52 is adjusted. Although a configuration for controlling the suppression is mounted, a detailed description is omitted.

  In the present embodiment, the Hall element 12B detects the magnetic field of the sensor magnet 12A provided coaxially with the shaft 16. The comparator 54 is a device that converts the analog output of the Hall element 12 </ b> B into a digital signal, and the actual rotational speed calculation unit calculates the actual rotational speed of the rotor 12 based on the digital signal output from the comparator 54. The command rotation number calculation unit calculates a target rotation speed based on an instruction from the air conditioner ECU 78 or the like. In the present embodiment, the target rotation speed is approximately 1000 to 5000 rpm.

  The PI controller 66 changes the coil of the stator 14 when changing the actual rotational speed to the target rotational speed from the target rotational speed calculated by the command rotational speed calculator 58 and the actual rotational speed calculated by the actual rotational speed calculator 56. The voltage applied to is calculated by so-called PI control. The PI control unit 66 calculates a voltage at the target rotational speed based on a proportional relationship between a deviation between the target rotational speed and the actual rotational speed, and a deviation between the voltage at the target rotational speed and the voltage at the actual rotational speed. including. Further, the PI control unit 66 includes a deviation integration unit 66I that eliminates the residual deviation by deviation integration when the residual deviation is generated only by the proportional relationship.

  The voltage correction unit 68 is input with the output duty ratio from the PI control unit 66 and the actual voltage of the battery 80 smoothed from the filter 62, and corrects the output duty ratio according to the actual voltage with respect to the reference voltage. I do. The final output duty calculated by the voltage compensation control is input to the FET driver 70.

  The FET driver 70 generates a PWM signal for controlling switching of the inverter circuit 40 according to the final output duty input from the voltage correction unit 68 and outputs the PWM signal to the inverter circuit 40.

  FIG. 3 is a flowchart showing an example of dead zone processing in the motor drive circuit 20 according to the present embodiment. In the present embodiment, when the output duty ratio input from the PI control unit 66 to the voltage correction unit 68 is close to 100% (for example, 95% or more), the AD conversion unit 60A starts the processing of FIG. Is done. In step 300, the current actual voltage value of the battery 80 is acquired and converted into an 8-bit digital signal.

  In step 302, a difference between the digital signal (current data) of the current actual voltage value acquired in step 300 and the digital signal (past data) of the actual voltage acquired immediately before is calculated. In step 304, it is determined whether or not the difference is less than a predetermined value. If the determination in step 304 is affirmative, the current data is discarded in step 306 and the past data is overwritten on the memory address of the current data, that is, the past data is treated as the current data. If the determination in step 304 is negative, the current data is adopted in step 308. The data handled as the current data in steps 306 and 308 is output to the filter 62 at the subsequent stage of the AD converter 60A.

  In step 310, the current data is copied to the memory address of the past data to prepare for sampling of the new actual voltage data, and the process returns.

  As described above, in this embodiment, when the output duty ratio is close to 100%, which is a problem of nonlinear switching response of the FETs 44A to 44F of the inverter circuit 40, control is performed to ignore minute fluctuations in the actual voltage. ing. In the present embodiment, control that does not react to minute fluctuations in the actual voltage is referred to as dead zone processing.

  When the output duty ratio is close to 100% and the actual voltage of the power supply is low, it is necessary to further increase the output duty ratio by voltage correction. However, when the output duty ratio becomes extremely large, the switching operation of the FETs 44A to 44F The interval of becomes extremely short. In such a case, coupled with the above-described nonlinearity of the operation of the switching element, the switching element cannot output a pulse according to the output duty ratio whose voltage has been corrected, and the rotation of the motor may become irregular, so-called rotation hunting may occur. was there.

  In the present embodiment, the voltage compensation control for correcting the output duty ratio according to the actual voltage with respect to the reference voltage is continued. However, when the output duty ratio is close to 100%, a minute fluctuation of the actual voltage is ignored. As a result, the switching operation interval of the FETs 44A to 44F is suppressed to be shorter than the current state, the switching operation of the FETs 44A to 44F is stabilized, and the rotation hunting of the motor 52 is prevented. In addition, when the fluctuation | variation of an actual voltage is large, voltage compensation control is performed according to the actual voltage immediately after a fluctuation | variation. This is because the rotation of the motor 52 may change unexpectedly if the voltage compensation control corresponding to the actual voltage after the fluctuation is not executed when the fluctuation of the actual voltage is large.

  4A shows an example of the process of step 302 in FIG. 3, and FIG. 4B shows an example of the process of step 310 in FIG. As shown in FIG. 4A, in step 302, the difference between current data and past data is calculated. In the case shown in FIG. 4A, the calculated difference is 100 for binary numbers and 4 for decimal numbers. Further, when the predetermined value in step 304 of FIG. 3 is “4” in decimal, in the example shown in FIG. 4A, a negative determination is made in step 304 of FIG. As a result, the current data is adopted in step 308 of FIG. 3, and the current data is copied to the past data as shown in FIG. 4B in step 310 of FIG.

  5A shows another example of the process in step 302 in FIG. 3, FIG. 5B shows an example of the process in step 306 in FIG. 3, and FIG. 5C shows the step in FIG. The other example of the process of 310 is shown. As shown in FIG. 5A, in step 302, a difference between current data and past data is calculated. In the case shown in FIG. 5A, the calculated difference is 11 for binary numbers and 3 for decimal numbers. If the predetermined value in step 304 in FIG. 3 is “4” in decimal, in the example shown in FIG. 5A, an affirmative determination is made in step 304 in FIG. As a result, in step 306 of FIG. 3, the current data is discarded as shown in FIG. 5B, and the past data is overwritten on the current data. In step 310 of FIG. 3, the current data is shown in FIG. Thus, the current data is copied to the past data.

  FIG. 6 shows a motor drive circuit 20A that is a modification of the present embodiment. In the present embodiment, the dead band processing shown in FIG. 3 is performed by the AD conversion unit 60A. However, the present modification is different in that the dead band processing is performed by the filter 62A that smoothes the actual voltage data. However, since the configuration other than the AD conversion unit 60 and the filter 62A is the same as that of the present embodiment, detailed description thereof is omitted.

  However, in this modification, the dead band process is performed by the filter 62A that calculates the average of a plurality of data of actual voltages and smoothes the data, so the process shown in FIG. 3 is performed as follows.

  In step 300, the latest actual voltage value of the battery 80 converted into a digital signal from the AD conversion unit 60 is acquired, and an average with the held past data is calculated to obtain current data.

  In step 302, the difference between the current data (latest average value) calculated in step 300 and the past data (previous average value) is calculated. In step 304, it is determined whether or not the difference is less than a predetermined value. If the determination in step 304 is affirmative, the current data is discarded in step 306 and the past data is overwritten on the memory address of the current data, that is, the past data is treated as the current data. If the determination in step 304 is negative, the current data is adopted in step 308. The data treated as current data in steps 306 and 308 is output to the voltage correction unit 68 subsequent to the filter 62A.

  In step 310, the current data is copied to the memory address of the past data, and the process returns.

  FIG. 7 shows a motor drive circuit 20B as another modification of the present embodiment. As shown in FIG. 7, a dead zone processing unit 64 may be separately provided after the voltage correction unit 68, and the dead zone processing shown in FIG. 3 may be performed by the dead zone processing unit 64 to adjust the final output duty. Since the configuration shown in FIG. 7 is the same as that of the above-described embodiment except that the dead zone processing unit 64 is separately provided and the AD conversion unit 60 does not execute the dead zone processing, detailed description thereof is omitted. .

  However, in the example shown in FIG. 7, the dead zone processing is performed by the dead zone processing unit 64 subsequent to the voltage correction unit 68, and thus the processing shown in FIG. 3 is performed as follows.

  In step 300, the voltage compensated duty ratio is input from the voltage correction unit 68. In step 302, the difference between the duty ratio (current data) acquired in step 300 and the duty ratio (past data) acquired immediately before is calculated. In step 304, it is determined whether or not the difference is less than a predetermined value. If the determination in step 304 is affirmative, the current data is discarded in step 306, the past data is overwritten on the memory address of the current data, and the overwritten past data is output to the FET driver as the final output duty. If the determination in step 304 is negative, the current data is adopted in step 308, and the current data is output to the FET driver as the final output duty.

  In step 310, the current data is copied to the memory address of the past data, and the process returns.

  As described above, in this embodiment, when the output duty ratio is close to 100%, the dead band processing shown in FIG. 3 is performed by any one of the AD conversion unit 60A, the filter 62A, and the dead band processing unit 64. Is going. As a result, in the calculation of the final output duty, minute fluctuations in the actual voltage can be ignored, the switching operation of the FETs 44A to 44F can be stabilized, and rotation hunting of the motor 52 can be prevented.

[Second Embodiment]
Next, a second embodiment of the present invention will be described. FIG. 8 is a block diagram showing an outline of the motor drive circuit 120 according to the present embodiment.

  In the first embodiment, the difference between current data and past data is calculated. However, if the microcomputer is configured to be capable of performing four arithmetic operations, the operation as in the first embodiment is easy, but the motor control controller IC without the microcomputer is not limited thereto. In order to perform arithmetic processing as in the first embodiment, it is necessary to change the controller for motor control to one capable of four arithmetic operations, or to modify a large-scale aluminum wiring layer. There was a problem that the cost was high.

  This embodiment enables processing similar to the dead zone processing of the first embodiment without performing the subtraction processing as in the first embodiment, and can output even a low-cost semiconductor device. When the duty ratio is high, the motor is stably rotated while continuing the voltage compensation control.

  As shown in FIG. 8, the present embodiment has a pseudo dead zone processing unit 74, and the AD conversion unit 60B and the filter 62B are different from the first embodiment. Since it is the same as that of embodiment, detailed description is abbreviate | omitted. In the present embodiment, at least one of the AD conversion unit 60B, the filter 62B, and the pseudo dead zone processing unit 74 performs a pseudo dead zone process described later. As will be described later, since the pseudo dead zone processing is lighter in computation load than the dead zone processing described in the first embodiment, it may be executed by each of the AD conversion unit 60B, the filter 62B, and the pseudo dead zone processing unit 74. . In addition, when the pseudo dead band processing is executed in a multiple manner in each of the AD conversion unit 60B, the filter 62B, and the pseudo dead band processing unit 74, the fluctuation of the actual voltage is smoothed or the fluctuation of the output duty ratio is smoothed. This contributes to stable rotation of the motor while continuing compensation control.

  FIG. 9 is a flowchart showing an example of the pseudo dead zone process in the motor drive circuit 120 according to the present embodiment. In the present embodiment, when the output duty ratio input from the PI control unit 66 to the voltage correction unit 68 is close to 100% (as an example, 95% or more), as an example, the AD conversion unit 60A in FIG. Processing is started. In step 100, the current actual voltage value of the battery 80 is acquired and converted into an 8-bit digital signal.

  In step 102, the bit one bit higher than the dead band bit of the digital signal (current data) of the current actual voltage value acquired in step 100 and the dead band bit of the digital signal (past data) of the actual voltage acquired immediately before that. Compare the upper bit. The dead band bit is a lower bit that ignores the fluctuation. As described later, in this embodiment, the lower bit of “bit 0” and “bit 1” is set as a dead band bit. In such a case, as will be described later, “bit 2” is the higher order bit that is the comparison target in step 102.

  In step 104, it is determined whether the upper bits of the current data and the past data are the same. If the determination in step 104 is affirmative, the dead zone bit of the past data is overwritten with the dead zone bit of the current data in step 106. If the determination in step 104 is negative, the current data is adopted in step 108. The data handled as the current data in steps 306 and 308 is output to the filter 62B at the subsequent stage of the AD conversion unit 60B.

  In step 310, the dead zone bit of the current data is copied to the dead zone bit of the past data, and the process returns.

  10A shows an example of the processing of steps 102 and 104 in FIG. 9, FIG. 10B shows an example of the processing of step 106 in FIG. 9, and FIG. 10C shows the step in FIG. An example of 110 processing is shown. As shown in FIG. 10, as an example, the dead zone bits are “bit0” and “bit1”, and the upper bits are “bit2”. As shown in FIG. 10A, in steps 102 and 104, “bit2” of the current data is compared with “bit2” of the past data. In the case shown in FIG. 10A, since the upper bit “bit2” matches, an affirmative determination is made in step 104 of FIG.

  As shown in FIG. 10B, in step 106 of FIG. 9, the dead zone bit of the past data is overwritten with the dead zone bit of the current data. Then, as shown in FIG. 10C, in step 110 in FIG. 9, the dead zone bit and the upper bit of the current data (data handled as) are overwritten on the past data.

  FIG. 11A shows another example of the processing of steps 102 and 104 in FIG. 9, and FIG. 11B shows another example of the processing of step 110 in FIG. As shown in FIG. 11A, in steps 102 and 104 of FIG. 9, “bit 2” of the current data is compared with “bit 2” of the past data. In the case shown in FIG. 11A, the upper bit “bit2” is different, so a negative determination is made in step 104 of FIG. As a result, the current data is adopted at step 108 in FIG. 9, and the dead zone bit and the higher order bit of the adopted current data are overwritten on the past data at step 110 in FIG.

  As described above, according to the present embodiment, when the output duty ratio is close to 100%, the actual voltage is very small in the calculation of the final output duty by a simple process of comparing predetermined bits. Therefore, the switching operation of the FETs 44A to 44F can be stabilized, and the rotation hunting of the motor 52 can be prevented.

  In the present embodiment, the dead zone bits are “bit0” and “bit1”. When the dead band bit is set to the lower two digits, fluctuations of 0 to 3 (in decimal) of the current data will be ignored in the voltage compensation control and the calculation of the final output duty. As a result, the first The same operational effects as the dead zone processing of the embodiment can be obtained.

  The comparison of the predetermined bit cannot be performed by four arithmetic operations, or a low-cost semiconductor device that requires modification of a large-scale aluminum wiring layer can be handled by changing the small-scale aluminum wiring layer. Even when the duty ratio of the voltage applied to the motor coil is high without changing the hardware, the motor can be stably rotated while continuing the voltage compensation control.

[Third Embodiment]
Next, a third embodiment of the present invention will be described. FIG. 12 is a block diagram showing an outline of the motor drive circuit 220 according to the present embodiment. As shown in FIG. 12, this embodiment is different from the first embodiment in the AD converter 60C, but the other configuration is the same as that of the first embodiment, and detailed description thereof is omitted. .

  In the present embodiment, when the output duty ratio is close to 100%, for example, processing for ignoring minute fluctuations in the actual voltage of the battery 80 is performed by resolution down processing for reducing the resolution of the AD conversion unit 60C.

  FIG. 13 is a flowchart showing an example of resolution reduction processing in the motor drive circuit 220 according to the present embodiment. In the present embodiment, when the output duty ratio input from the PI control unit 66 to the voltage correction unit 68 is close to 100% (as an example, 95% or more), as an example, the AD conversion unit 60C in FIG. Processing begins. In step 140, the current actual voltage value of the battery 80 is acquired and converted into an 8-bit digital signal.

  In step 142, the least significant bit of the current data is fixed. In step 144, the current data with the least significant bit fixed is overwritten on the past data, and the process returns.

  FIG. 14A shows an example of the process of step 142 in FIG. 13, and FIG. 14B shows an example of the process of step 144 in FIG. As shown in FIG. 14A, in step 142 of FIG. 13, “bit0”, which is the least significant bit of the current data, is fixed to “0”. The least significant bit may be fixed to “1”. In step 144 of FIG. 13, the current data with the least significant bit fixed is overwritten on the past data.

  As described above, according to the present embodiment, when the output duty ratio is close to 100%, the actual voltage is very small in the calculation of the final output duty by a simple process of fixing the least significant bit. Therefore, the switching operation of the FETs 44A to 44F can be stabilized, and the rotation hunting of the motor 52 can be prevented.

  When the least significant bit is fixed, fluctuations of 0 to 1 in the current data are ignored in the voltage compensation control and calculation of the final output duty, and the final output duty is affected by minute fluctuations such as the actual voltage. Can be prevented.

  Fixing the least significant bit is possible even for low-cost semiconductor devices that cannot perform four arithmetic operations, so the duty ratio of the voltage applied to the motor coil is high without changing the hardware of the motor drive circuit and at low cost Even in this case, it is possible to stably rotate the motor while continuing the voltage compensation control.

  Note that the resolution reduction processing according to the present embodiment may be executed by the filter 62C instead of the AD conversion unit 60 as in the motor drive circuit 220A which is a modification example shown in FIG. However, in this modification, the resolution reduction process is performed by the filter 62C that calculates the average of the data of a plurality of actual voltages and smoothes the data, so the process shown in FIG. 13 is performed as follows.

  In step 140, the latest actual voltage value of the battery 80 converted into a digital signal from the AD conversion unit 60 is acquired, and an average of the held past data is calculated to obtain current data.

  In step 142, the least significant bit of the current data is fixed. In step 144, the current data with the least significant bit fixed is overwritten on the past data, and the process returns.

  Further, in the present embodiment, a resolution down processing unit 72 is separately provided at the subsequent stage of the voltage correction unit 68 as in the motor drive circuit 220B which is a modified example shown in FIG. The final output duty may be adjusted by performing the resolution reduction process shown in FIG. The configuration shown in FIG. 16 is the same as that of the present embodiment described above except that the resolution reduction processing unit 72 is separately provided and the AD conversion unit 60 does not execute the resolution reduction processing. Omitted.

  However, in the example shown in FIG. 16, the resolution reduction processing unit 72 in the subsequent stage of the voltage correction unit 68 performs the resolution reduction processing, so the processing shown in FIG. 13 is performed as follows. In step 140, the voltage compensated duty ratio is input from the voltage correction unit 68.

  In step 142, the lowest bit of the voltage compensated duty ratio that is the current data is fixed, and in step 144, the current data with the lowest bit fixed is overwritten on the past data, and the process returns.

  As described above, by fixing the least significant bit of the smoothed digital signal or the digital signal indicating the output duty ratio after voltage compensation control, the final output duty is affected by minute fluctuations such as the actual voltage. Can be prevented.

[Fourth Embodiment]
Next, a fourth embodiment of the present invention will be described. FIG. 17 is a block diagram showing an outline of the motor drive circuit 320 according to the present embodiment. As shown in FIG. 17, the present embodiment is different from the first embodiment in the AD conversion unit 60 and the voltage correction unit 68D, but the other configurations are the same as those in the first embodiment. The detailed explanation is omitted.

  In the present embodiment, when the output duty ratio is close to 100%, for example, processing for ignoring minute fluctuations in the actual voltage of the battery 80 is performed by processing for reducing the gain of voltage compensation control in the voltage correction unit 68D. .

The voltage correction unit 68D according to the present embodiment handles the reference voltage with 8 bits. When the output duty ratio is not close to 100%, for example, the voltage compensation control is executed with a gain obtained by processing 8-bit data as follows.
(1) 128 x output duty ratio (output duty ratio is shifted 7 left)
(2) 32 x Output duty ratio (output duty ratio is shifted left by 5)
(3) 16 x output duty ratio (output duty ratio is shifted 4 left)
(4) 8 x Output duty ratio (shift output duty ratio by 3 left)

  By adding the above 128, 32, 16, and 8, a gain coefficient of 184 times is set in decimal. Temporarily, the gain of the voltage compensation control is lowered by stopping the process of “shifting the output duty ratio by 5 to the left” in the above (2). When the process (2) is actually stopped, the gain decreases to 128 + 16 + 8 = 152 times. The gain of about 20% can be reduced with respect to the case where the processes (1) to (4) are executed.

  The voltage compensation control is a process of “(reference voltage / actual voltage of power supply) × output duty ratio”, but in this embodiment, when the output duty ratio is close to 100%, the reference voltage of the above formula is set. The gain coefficient of 184 times is multiplied, and the actual voltage of the power source of the above formula is multiplied by 152 times the gain coefficient. As a result, the influence on the voltage compensation control due to the fluctuation of the actual voltage of the power supply can be reduced.

  When the output duty ratio is close to 100%, by reducing the gain of the voltage compensation control, minute fluctuations in the actual voltage can be ignored in the calculation of the final output duty, and the switching operation of the FETs 44A to 44F can be stabilized. Rotational hunting of the motor 52 can be prevented.

  The process to reduce the gain of voltage compensation control can be handled by changing the control program slightly even for low-cost semiconductor devices that cannot perform the four arithmetic operations, so the motor drive circuit hardware can be changed without changing the motor drive circuit hardware. Even when the duty ratio of the voltage applied to the coil is high, it is possible to stably rotate the motor while continuing the voltage compensation control.

DESCRIPTION OF SYMBOLS 10 ... Motor unit, 12 ... Rotor, 12A ... Sensor magnet, 12B ... Hall element, 14 ... Stator, 14U, 14V, 14W ... Coil, 16 ... Shaft, 18 ... Upper case, 20, 20A, 20B ... Motor drive circuit, DESCRIPTION OF SYMBOLS 22 ... Board | substrate, 24 ... Heat sink, 28 ... Lower case, 40 ... Inverter circuit, 44A, 44B, 44C, 44D, 44E, 44F ... FET, 52 ... Motor, 54 ... Comparator, 56 ... Actual rotational speed calculation part, 58 ... Command rotational speed calculation unit, 60, 60A, 60B, 60C ... AD conversion unit, 62, 62A, 62B, 62C ... filter, 64 ... dead zone processing unit, 66 ... PI control unit, 66I ... deviation integration unit, 66P ... deviation proportionality 68, 68D ... Voltage correction unit, 70 ... FET driver, 72 ... Resolution reduction processing unit, 74 ... Pseudo dead zone processing unit, 7 ... air conditioning ECU, 80 ... battery, 82 ... choke coil, 96 ... range, 120,220,220A, 220B, 320 ... motor driving circuit

Claims (8)

A drive unit for generating a voltage to be applied to the motor;
When the duty ratio before correction according to the power supply voltage is less than the threshold value, the duty ratio is corrected according to the power supply voltage, and the drive unit is controlled to generate a voltage according to the corrected duty ratio, When the duty ratio before correction according to the power supply voltage is equal to or greater than the threshold value and the fluctuation of the power supply voltage is within a predetermined value, the voltage according to the duty ratio excluding the influence due to the fluctuation of the power supply voltage is driven. A control unit that performs control to be generated by the unit;
Including a motor drive circuit.   2. The motor drive circuit according to claim 1, wherein the duty ratio excluding the influence due to the fluctuation of the power supply voltage is a duty ratio obtained by correcting the duty ratio before correction according to the power supply voltage according to the power supply voltage immediately before the fluctuation.   The motor drive circuit according to claim 1, wherein the control unit determines whether or not the fluctuation of the power supply voltage is within a predetermined value based on a voltage difference before and after the fluctuation of the power supply voltage.   The motor according to any one of claims 1 to 3, wherein when the fluctuation of the power supply voltage is within a predetermined value, a value of a lower bit of a predetermined digit of a digital value obtained by digitally converting the power supply voltage is the same. Driving circuit.   By correcting the duty ratio by setting the least significant bit of each digital value obtained by digital conversion of the power supply voltage before and after the fluctuation of the power supply voltage to the same value, the influence of the fluctuation of the power supply voltage on the duty ratio is excluded. The motor drive circuit according to claim 1.   The control unit corrects the duty ratio according to the power supply voltage by multiplying the duty ratio before correction according to the power supply voltage by a gain coefficient represented by a ratio of the reference voltage to the power supply voltage, and the gain coefficient The motor drive circuit according to claim 1, wherein the influence of the duty ratio due to the fluctuation of the power supply voltage is excluded by reducing the duty ratio.   When the duty ratio before correction according to the power supply voltage is equal to or greater than the threshold value and the power supply voltage fluctuates, the control unit has a predetermined digit of the digital value of the duty ratio corrected according to the power supply voltage immediately before the change. When the lower bit and the lower bit of a predetermined digit of the digital value of the duty ratio corrected according to the power supply voltage immediately after the change are the same, the voltage according to the duty ratio corrected according to the power supply voltage immediately before the change is driven. The motor drive circuit according to claim 1, wherein the motor drive circuit performs control to be generated by the unit.   The control unit sets the least significant bit of the digital value of the duty ratio corrected according to the power supply voltage immediately before the change and the least significant bit of the digital value of the duty ratio corrected according to the power supply voltage immediately after the change to the same value. The motor drive circuit according to claim 1, wherein the influence of the duty ratio due to the fluctuation of the power supply voltage is excluded.