JP2018133466A - Semiconductor optical element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To efficiently transmit a heat flow generated by a heating section to an active layer.SOLUTION: In a semiconductor optical device 100a in which a semiconductor laser 10a having an active layer 13 and a silicon photonic substrate 41 are bonded to each other, in the semiconductor laser 10a is configured such that the active layer 13 is heated by a resistance heating film 28 as a heating portion. A distance d3 between the active layer 13 and the silicon photonic substrate 41 is shorter than a distance between the resistance heating film 28 and the silicon photonic substrate 41.SELECTED DRAWING: Figure 7

Description

  The present invention relates to a semiconductor optical device, for example, a semiconductor optical device in which a compound semiconductor laser used in optical fiber communication and a Si substrate on which a Si fine wire waveguide is formed are heterogeneously bonded.

The FTTH (Fiber to the Home) system, especially the PON (Passive Optical Network) system, which is currently being introduced, is equipped with electronic devices such as LD (Laser Diode) and PD (Photo Diode). A method using a semiconductor optical element mounted on the board has been proposed. Here, an optical circuit using an optical waveguide using Si as a material, for example, an Si waveguide having Si as a core and SiO ₂ having a refractive index much smaller than Si as a cladding is known.

  Incidentally, the oscillation wavelength of the semiconductor laser can be varied by changing the temperature of the active layer. Such a wavelength tunable semiconductor laser has a resistance heating film on the upper surface of the crystal growth side, separately from the current injection electrode, and is configured such that the oscillation wavelength can be varied by controlling the temperature of the active layer. The resistance heating film has a desired resistance value by changing the material, film thickness, and width, and obtains a calorific value in accordance with the resistance value. Usually, a current is passed through the semiconductor laser, and a current is passed through the resistance heating film in a state where laser oscillation is actually performed. As a result, the semiconductor laser obtains a desired amount of heat generation and controls the oscillation wavelength. At this time, in the case of a DFB (Distributed Feedback) laser, when the temperature of the active layer rises by 10 ° C., it shifts to the longer wavelength side by about 1 nm.

  Patent Document 1 discloses a wavelength tunable semiconductor laser in which an active layer is interposed between a P-side InP cladding layer and an N-side InP cladding layer, and a resistance heating film is formed on the P-side InP cladding layer. Patent Document 2 discloses a wavelength tunable semiconductor laser using an n-InP substrate and having a heater electrode formed on the surface opposite to the substrate.

JP-A-6-350203 JP 2003-23308 A

  The wavelength tunable semiconductor laser provided with the resistance heating film as shown in Patent Documents 1 and 2 is mounted on a substrate called a subcarrier so that the crystal growth surface is on (junction up). That is, the resistance heating film was formed on the opposite surface of the n-InP substrate. However, when a semiconductor laser is mounted on a silicon substrate having an optical waveguide, it is necessary to mount the semiconductor laser on the silicon substrate with the crystal growth surface down (junction down).

  That is, the crystal growth surface of the n-InP substrate can precisely control the thickness of the crystal, so that the semiconductor optical element in which the crystal growth surface and the silicon substrate are bonded can adjust the height of the optical axis with high accuracy. Because it can. On the contrary,

  Here, in the semiconductor optical element in which the crystal growth surface of the n-InP substrate and the silicon substrate are bonded, the resistance heating film and the silicon substrate described in Patent Documents 1 and 2 are bonded. Since the silicon substrate has a higher thermal conductivity than the III-V group compound (for example, InP or GaAs) which is a semiconductor laser material, the semiconductor laser generates a heat flow generated by the resistance heating film (heating unit). (Silicon photonics substrate). That is, the semiconductor laser has a new problem that it becomes difficult to control the temperature of the active layer and the wavelength cannot be changed efficiently.

  The present invention has been made to solve such problems, and an object of the present invention is to provide a semiconductor optical element capable of efficiently transmitting a heat flow generated by a heating unit to an active layer.

  In order to achieve the above object, one means of the present invention is to provide a semiconductor optical element in which a semiconductor laser having an active layer and a silicon photonics substrate are bonded, wherein the active layer has a heating part (for example, The distance between the active layer and the silicon photonics substrate is shorter than the distance between the heating unit and the silicon photonics substrate.

  The thermal conductivity of the silicon substrate is 1.3 [W / (cmK)], and the thermal conductivity of the InP substrate is 0.68 [W / (cmK)]. Moreover, since the volume of the silicon substrate is larger than that of the InP substrate, the heat capacity is also large. Also, since the thermal conductivity of the InP substrate is worse than that of the silicon substrate, part of the heat generated in the heating part is conducted and absorbed by the silicon substrate, but other heat is transferred to the active layer as a heat flow. And contributes to heating and raising the temperature of the active layer. In particular, since the distance between the heating unit and the active layer is shorter than the distance between the silicon photonics substrate and the heating unit, the heat flow for heating the active layer contributes more than the heat flow for absorbing the silicon substrate.

  According to another aspect of the present invention, there is provided a semiconductor optical element in which a semiconductor laser having an active layer and a silicon photonics substrate are bonded. The groove portion is formed, and the groove portion is formed such that a distance between the deepest portion and the silicon photonics substrate is longer than a distance between the active layer and the silicon photonics substrate, and the opening side of the groove portion is It faces the silicon photonics substrate, and a resistance heating film for heating the active layer is disposed around the deepest portion.

  According to the present invention, the heat flow generated by the heating unit can be efficiently transmitted to the active layer.

It is a perspective view of the semiconductor optical element which is embodiment of this invention. It is a perspective view of the semiconductor laser with which the semiconductor optical element which is embodiment of this invention is provided. It is a flowchart which shows the manufacturing process of a semiconductor optical element. It is a flowchart which shows the manufacturing process which produces the semiconductor laser with which a semiconductor optical element is provided. It is a perspective view explaining the process of laser structure crystal growth. It is a perspective view explaining the process of stripe mask formation. It is a perspective view explaining the process of mesa stripe formation. It is a perspective view explaining the process of an electric current block layer embedding growth. It is a perspective view explaining the process of a clad layer and contact layer crystal growth. It is a perspective view explaining the process of double channel formation. It is a perspective view explaining the process of contact stripe formation. It is a perspective view explaining the process of P side electrode and alignment mark formation. It is the perspective view explaining the process of resistance heating film formation, and a top view. It is the perspective view explaining the process of electrode formation for resistance heating films | membranes, and a top view. It is a perspective view explaining the process of board | substrate thin film formation and N side electrode formation. It is a perspective view explaining the joining process which joins a semiconductor laser and a silicon photonics chip. It is sectional drawing of the semiconductor optical element which is embodiment of this invention. It is a perspective view of the semiconductor laser with which the semiconductor optical element which is the modification (1) of this invention is provided. It is a perspective view of the semiconductor optical element which is the modification (2) of this invention.

  Hereinafter, an embodiment of the present invention (hereinafter referred to as “the present embodiment”) will be described in detail with reference to the drawings. Each figure is only schematically shown so that the present invention can be fully understood. Moreover, in each figure, the same code | symbol is attached | subjected about the common component and the same component, and those overlapping description is abbreviate | omitted.

(Description of configuration)
FIG. 1 is a perspective view for explaining a semiconductor optical element according to an embodiment of the present invention, and shows a state in which a semiconductor laser 10 (10a) and a silicon photonics chip 40 are bonded.
A desired optical circuit and electrical wiring / electric circuit are formed on the silicon photonics chip 40. FIG. 1 particularly shows the structure around the optical coupling portion with the semiconductor laser 10a.

  The semiconductor optical element 100 (100a) is obtained by bonding a semiconductor laser 10a including an n-InP substrate 11 (FIG. 2) and a silicon photonics chip 40, and a surface 32 (FIG. 2) opposite to the substrate of the semiconductor laser 10a. Are bonded to the silicon photonics chip 40. That is, the semiconductor laser 10 a is exposed to air except for the bonding surface between the substrate opposite surface 32 and the silicon photonics chip 40.

  The silicon photonics chip 40 includes a silicon photonics substrate 41, a lower cladding layer 42, an upper cladding layer 44, a silicon optical waveguide 43, and a plurality of silicon pedestals 45, 45, 45, 45 for fixing the semiconductor laser 10a, Alignment marks 46, 46, four resistance heating electrodes 47, 47, 47, 47, and a P-side electrode 48 are provided. In the semiconductor laser 10a, the end surface on the silicon optical waveguide 43 side (y direction) is an emission surface, and the opposite end surface is a rear end surface.

The silicon photonics substrate 41 is a silicon (Si) single crystal substrate and has a thermal conductivity of 1.3 [W / (cmK)]. The lower cladding layer 42 is a SiO ₂ oxide layer laminated on the surface of the silicon photonics substrate 41. The silicon optical waveguide 43 is a silicon layer linearly stacked on the surface of the lower clad layer 42, and forms a Si thin-wire optical waveguide. The upper clad layer 44 is a SiO ₂ oxide layer that is laminated on the surface of the lower clad layer 42 and covers the silicon optical waveguide 43. The silicon photonics substrate 41, the lower cladding layer 42, and the silicon optical waveguide 43 are formed from an SOI substrate.

The silicon pedestal 45 is made of SiO _{2 so} that the position of the active layer 13 (FIG. 2) of the semiconductor laser 10a and the silicon optical waveguide 43 of the silicon photonics chip 40 are at the same height. The alignment mark 46 is used for positioning the semiconductor laser 10a, and is aligned with the alignment mark 27 (FIG. 2). The resistance heating electrode 47 is an energized electrode that is connected to the resistance heating film electrode 29 (FIG. 2) of the semiconductor laser 10a and energizes the resistance heating film. The P-side electrode 48 is connected to the P-side electrode 26 (FIG. 2) of the semiconductor laser 10 and is a drive electrode that drives the semiconductor laser 10a.

FIG. 2 is a perspective view of a semiconductor laser used in the semiconductor optical element according to the embodiment of the present invention. FIG. 2 shows the semiconductor laser 10a of FIG. 1 upside down (z direction).
The semiconductor laser 10a includes an n-InP substrate 11, an n-InP buffer layer 12 stacked on the surface of the n-InP substrate 11, and a p-InP layer stacked on the surface of the n-InP buffer layer 12 opposite to the substrate. 17, the active layer 13 linearly formed in the y direction, the n-InP layer 18 formed on both sides of the active layer 13, and the p− formed linearly on the surface of the active layer 13 opposite to the substrate. An InP layer 14, a p-InP layer 19, and a p-InP clad layer 20 laminated on the surface of the p-InP layer 19 opposite to the substrate are provided.

  The n-InP buffer layer 12 has a protrusion extending so that the xz plane has a mesa shape. The active layer 13 is formed linearly on the surface of the n-InP buffer layer 12 on the opposite side of the substrate from the central convex portion. The p-InP layer 19 is a surface opposite to the substrate of the n-InP layer 18 and is laminated on both sides of the p-InP layer 14. The semiconductor laser 10a is a Fabry-Perot (FP) type III-V compound semiconductor laser, the rear end surface of the active layer 13 is coated with a total reflection mirror, and the output surface is coated with a mirror with a transmittance of several percent. Has been.

  Further, in the semiconductor laser 10 a, channel structures 23 and 23 are formed on both sides of the active layer 13. The channel structures 23 and 23 are linear groove portions (concave portions) formed in parallel to each other and formed from the substrate opposite surface 32 to a part of the n-InP substrate 11. Since the channel structures 23 and 23 are formed up to a part of the n-InP substrate 11, the deepest part is formed closer to the n-InP substrate 11 than the active layer 13. In the semiconductor laser 10, a resistance heating film 28 is linearly disposed around the deepest portion of the channel structures 23 and 23. The resistance heating film 28 is, for example, a titanium (Ti) film, and generates heat when energized to enable temperature control of the active region.

  The resistance heating film electrodes 29 and 29 are electrodes stacked on the surface of the channel structures 23 and 23 from the end of the resistance heating film 28 to the surface 32 on the opposite side of the substrate. The P-side electrode 26 is a surface opposite to the substrate of the p-InGaAs contact layer 21 and is formed linearly above the active layer 13 and the p-InP layer 14. The N-side electrode 30 is formed on the non-growth side of the n-InP substrate 11. The semiconductor laser 10 a is excited in the active layer 13 when a driving current is passed between the P-side electrode 26 and the N-side electrode 30. The P-side electrode 26 includes an electrode 26a, and the resistance heating film electrode 29 includes an electrode 29a.

  The alignment marks 27, 27 are rectangular metal films having a circular opening, and are provided on both sides of the surface opposite to the substrate. The centers of the alignment marks 27 and 27 are aligned with the alignment mark 46 (FIG. 1) of the silicon photonics chip 40. The alignment between the alignment mark 27 and the alignment mark 46 is performed with an infrared camera because the n-InP substrate 11 does not transmit visible light.

  In the semiconductor optical element 100a shown in FIG. 1, an N-side electrode 30 that is a surface opposite to the substrate of the semiconductor laser 10a and a silicon photonics substrate 41 of a silicon photonics chip 40 are bonded. For this reason, the distance d3 between the active layer 13 and the silicon photonics substrate 41 is shorter than the distance d2 between the resistance heating film 28 as the heating unit and the silicon photonics substrate 41 (see the cross-sectional view of FIG. 7). Further, the channel structures 23 and 23 as the groove portions are in contact with the silicon photonics substrate 41 on the opening side.

FIG. 3 is a flowchart showing a manufacturing process of the semiconductor optical element.
The manufacturing process of the semiconductor optical element 100 (100a) includes a manufacturing process of the semiconductor laser 10a (S10) and a bonding process of bonding the manufactured semiconductor laser 10a and the silicon photonics chip 40 (S40).

FIG. 4 is a flowchart showing a manufacturing process for manufacturing a semiconductor laser included in the semiconductor optical element.
In the semiconductor laser 10a, the crystal growth of the laser structure is performed (S12), the stripe mask is formed (S14), the mesa stripe is formed (S16), the buried growth of the current blocking layer is performed (S18), and the cladding layer Then, crystal growth of the contact layer is performed (S20), a double channel is formed (S22), a contact stripe is formed (S24), a P-side electrode and an alignment mark are formed (S26), and a resistance heating film is formed. (S28) An electrode for resistance heating film is formed (S30), and is produced by substrate thinning and N-side electrode formation (S32).

  5A to 5K are perspective views for explaining a manufacturing process of the semiconductor laser. Each manufacturing process will be described below, but each manufacturing process is performed using a general process, and detailed conditions and the like are not the essence of the present invention, and will be omitted.

FIG. 5A is a perspective view for explaining a laser structured crystal growth step.
An n-InP buffer layer 12, an active layer 13 having a multiple quantum well (MQW) structure, and a p-InP layer 14 are formed on the surface of an n-InP substrate 11 for a semiconductor laser structure by a metal organic vapor phase (MOVPE) method. To grow crystals. At this time, the thickness of the p-InP layer 14 is about 20 to 300 nm. The active layer 13 having the MQW structure has a structure optimized to obtain a desired wavelength and characteristics. In the case of a DFB laser, a grating structure is introduced in order to form a periodic structure of a refractive index difference that can obtain a desired oscillation wavelength on the lower surface or the upper surface of the active layer 13.

FIG. 5B is a perspective view illustrating a step of forming a stripe mask.
An insulating film such as SiO ₂ is deposited on the p-InP layer 14 by a chemical vapor deposition (CVD) method or the like. The p-InP layer 14 on which the insulating film is deposited is subjected to a photolithography process, and an insulating film mask 15 is formed. The insulating film mask 15 is formed in a desired stripe shape in consideration of the mesa stripe width in the next process.

FIG. 5C is a perspective view illustrating a process of forming a mesa stripe.
The p-InP layer 14, the MQW structure active layer 13, and the n-InP buffer layer 12 are mixed etching solutions of hydrochloric acid other than the stripe regions masked by the insulating film mask 15 (for example, hydrogen bromide, hydrochloric acid, It is removed by a mixture of hydrogen peroxide water and pure water). By this wet etching, a stripe structure of the p-InP layer 14 and the active layer 13 having the MQW structure and a mesa structure of the n-InP buffer layer 12 are formed. The n-InP buffer layer 12, the active layer 13, and the p-InP layer 14 are subjected to side etching and are formed narrower than the width of the insulating film mask 15. This structure has an effect of suppressing abnormal growth during buried growth.

  The p-InP layer 14, the active layer 13 having the MQW structure, and the n-InP buffer layer 12 form a mesa stripe structure. This etching step may be used in combination with a dry etching method, and wet etching with the above-described mixed etching solution may be performed after dry etching.

FIG. 5D is a perspective view illustrating a process of embedding a current blocking layer.
On the surface of the n-InP buffer layer 12, crystal growth by the MOVPE method is performed up to the height of the p-InP layer 14 in the order of the p-InP layer 17, the n-InP layer 18, and the p-InP layer 19. Thus, the p-InP layer 19, the n-InP layer 18, the p-InP layer 17, and the n-InP buffer layer 12 form a pnpn thyristor structure. In addition, the thickness of each InP layer 17, 18, and 19 and a dopant and its carrier density are set so that these layers may function as a current block layer. The p-InP layer 14 and the p-InP layers 19 on both sides thereof are different in dopant and carrier density. InP acceptor atoms are typically C, Be, Mg, and Zn, and donor atoms are typically Li, Sn, Si, and Te.

FIG. 5E is a perspective view for explaining a crystal growth process of the cladding layer and the contact layer.
After the insulating film mask 15 (FIG. 5D) is removed, the p-InP clad layer 20 and the p-InGaAs contact layer 21 are crystal-grown on the surface of the p-InP layer 19 by the MOVPE method. The thickness, dopant, and carrier density of each layer at this time are set in consideration of light confinement and series resistance during current injection. After the crystal growth, an insulating film mask 22 is formed on the center and both sides of the surface of the p-InGaAs contact layer 21. After the formation of the insulating film mask 22, photolithography is performed to form two stripe shapes 31.

FIG. 5F is a perspective view illustrating a process of forming a double channel.
After the formation of the two stripe shapes 31 (FIG. 5E), channel structures 23 and 23 as two groove portions are formed by a bromine-based etchant (for example, a mixed solution of bromine Br and methanol CH ₃ OH). The distance between the two channel structures 23 and 23 is set so that the electric capacity of the laser element after electrode formation becomes a desired value. The two channel structures 23 and 23 are called a double channel structure.

FIG. 5G is a perspective view illustrating a step of forming a contact stripe.
After the formation of the two channel structures 23 and 23 (FIG. 5F), the insulating film mask 22 (FIG. 5F) is removed, and the insulating film masks 24, 24, 24, and 24 are formed by CVD and photolithography. . After the insulating film masks 24, 24, 24, 24 are formed, photolithography is performed to form contact stripes 25.

FIG. 5H is a perspective view illustrating a process of forming a P-side electrode and an alignment mark.
After forming the contact stripe 25 (FIG. 5G), for example, AuZn and Au are vapor-deposited as the P-side ohmic electrode. After the deposition of the P-side ohmic electrode, the P-side electrode 26 and the alignment mark 27 are formed by photolithography or lift-off. The P-side electrode 26 includes an electrode 26 a that is drawn out through one channel structure 23.

FIG. 5I (a) is a perspective view for explaining a process of forming a resistance heating film, and FIG. 5 (b) is a plan view thereof.
After the formation of the P-side electrode 26 and the alignment mark 27 (FIG. 5H), the resistance heating film 28 as a heating portion is formed again using the photolithography technique. At this time, using a negative resist, a mask is aligned on the double channel, and the portion other than the inside of the double channel groove is exposed. By this exposure, the resist in the double channel groove is removed.

  After the resist is removed, Ti (titanium) thin film is deposited, sputtered, etc., and two resistance heating films 28 are formed. The resistance heating films 28 and 28 have a thickness of 25 nm, for example, and the channel structure 23 has a width of about 10 μm. Since the resistivity (area resistivity) of the resistance heating films 28 and 28 is determined by the material and thickness, the resistance value per unit length is determined according to the width. That is, changing the setting of the material, thickness, width and length in the y direction controls the amount of heat generated by the injected current. One resistance heating film 28 has a length substantially equal to the entire length of the semiconductor laser 10a, but the other resistance heating film 28 is divided at the electrode 26a.

FIG. 5J (a) is a perspective view for explaining a process of forming a resistance heating film electrode, and FIG. 5 (b) is a plan view thereof.
After the formation of the resistance heating film 28 (FIG. 5I), the resistance heating film electrode 29 is formed by photolithography and vapor deposition. Since the resistance heating film electrode 29 is for current flow, a metal material having a low resistivity such as Au (gold) is used. The resistance heating film electrode 29 includes an electrode 29a that connects the resistance heating films 28 divided by the electrode 26a (FIG. 5I (b)) to each other.

FIG. 5K is a perspective view for explaining steps of substrate thinning and N-side electrode formation.
After the formation of the resistance heating film electrode 29, the back surface of the n-InP substrate 11 is subjected to a thinning process by polishing or etching. Then, on the polished back surface, for example, Au—Ge—Ni or the like is deposited, and the N-side electrode 30 is formed. At this time, the alignment mark 27 is removed of the electrode deposition material by photolithography or the like, and the circular insulating film mask 24 is exposed.

FIG. 6 is a perspective view illustrating a bonding process for bonding the semiconductor laser and the silicon photonics chip.
The surface of the P-side electrode 26 and the alignment mark 27 as the surface 32 opposite to the substrate of the semiconductor laser 10a and the silicon photonics substrate 41 of the silicon photonics chip 40 are joined to form the semiconductor optical element 100a. At this time, the alignment mark 46 and the alignment mark 27 of the semiconductor laser 10a are alignment marks. By the alignment, the silicon optical waveguide 43 and the active layer 13 of the semiconductor laser 10a are optically coupled. It is assumed that the heights of the silicon optical waveguide 43 and the active layer 13 are matched in advance by controlling the thickness of crystal growth of the semiconductor laser 10a.

  Gold tin (AuSn) solder is applied to the resistance heating electrode 47 and the P-side electrode 48, and the semiconductor laser 10a is mounted by flip chip mounting. Thereafter, the N-side electrode 30 (FIG. 5K) of the semiconductor laser 10a and the electronic circuit of the silicon photonics chip 40 are connected by an Au wire by wire bonding.

FIG. 7 is a cross-sectional view of a semiconductor optical element according to an embodiment of the present invention.
In the bonding step of FIG. 6, in the semiconductor optical element 100a, the N-side electrode 30 which is the substrate opposite surface 32 of the semiconductor laser 10a and the silicon photonics substrate 41 are bonded. For this reason, the active layer 13 of the semiconductor laser 10 a is disposed in a region (intermediate region) in which the distance between the silicon photonics substrate 41 and the silicon photonics substrate 41 and the resistance heating film 28 is intermediate. In other words, the length d2 between the silicon photonics substrate 41 and the resistance heating film 28 is longer than the length d1 between the active layer 13 and the resistance heating film 28.

  The thermal conductivity of the silicon photonics substrate 41 is 1.3 [W / (cmK)], and the thermal conductivity of the n-InP substrate 11 is 0.68 [W / (cmK)]. Further, since the silicon photonics substrate 41 has a larger volume than the n-InP substrate 11, the heat capacity is also large. Further, the n-InP substrate 11 has a lower thermal conductivity than the silicon photonics substrate 41.

  For this reason, a part of the heat generated by the resistance heating film 28 serving as a heating unit is conducted and absorbed by the silicon photonics substrate 41 via the P-side electrode 26 (FIG. 5H), but other heat flows. To the active layer 13 via the n-InP substrate 11 and contribute to heating and raising the temperature of the active layer. In particular, since the distance d1 between the resistance heating film 28 and the active layer 13 is shorter than the distance d2 between the silicon photonics substrate 41 and the resistance heating film 28, the heat flow for heating the active layer 13 heats the silicon photonics substrate 41 more. The contribution is greater than the heat flow to be absorbed.

  In addition, although the silicon photonics substrate 41 has a large heat capacity, the semiconductor laser 10a itself has a small heat capacity. For this reason, the temperature of the active layer 13 of the semiconductor laser 10a rapidly increases and decreases rapidly.

(Explanation of effect)
As described above, when the semiconductor laser 10a having the function of controlling the oscillation wavelength by controlling the temperature of the active layer 13 is mounted on the silicon photonics chip 40, the n-InP substrate rather than the active layer 13 as in the present embodiment. By disposing the resistance heating film 28 on the 11 side, the amount of heat generated by the resistance heating film 28 is less transmitted to the silicon photonics chip 40 and can be efficiently transmitted to the active layer 13. For this reason, the semiconductor laser 10a requires less heating power for the resistance heating film 28, and can reduce power consumption.

(Modification)
The present invention is not limited to the embodiments described above, and various modifications such as the following are possible.
(1) The semiconductor laser 10a of the above embodiment has two channel structures 23 and 23 as shown in FIG. 5F to form a double channel structure. However, like the semiconductor laser 10b of FIG. Only one may be formed.

(2) In the semiconductor optical element 100a of the above embodiment, the resistance heating film 28 (FIG. 5I) as a heating unit is formed inside the semiconductor laser 10a. However, as shown in FIG. 9, the semiconductor optical element 100a is heated outside the semiconductor laser 10c. The unit 50 may be provided. That is, the heating unit 50 may be bonded to the N-side electrode 30 of the semiconductor laser 10c. Even in this state, the semiconductor optical element 100 b is disposed in an intermediate region in which the active layer 13 is between the silicon photonics substrate 41 and the heating unit 50. In this case, the semiconductor laser 10a need not have a double channel structure. Further, the silicon photonics chip 40b has the resistance heating electrode 47 removed as compared with the silicon photonics chip 40a (FIGS. 1 and 6).

(3) Although the semiconductor laser 10a of the above embodiment is a buried semiconductor laser, it can also be applied to a ridge waveguide semiconductor laser using a ridge waveguide.
(4) Although the n-InP substrate 11 is used for the semiconductor laser 10a of the embodiment, a semiconductor laser structure using a GaAs substrate can be applied. Note that the thermal conductivity of GaAs is 0.55 [W / (cmK)].

(5) The semiconductor laser 10a of the above embodiment is a Fabry-Perot (FP) type, but is a distributed feedback (DFB) laser or a distributed reflection type (DBR) using Bragg reflection. It can also be applied to lasers. In the case of a DFB laser, a grating structure may be introduced in order to form a periodic structure with a refractive index difference that can obtain a desired oscillation wavelength on the lower surface or the upper surface of the active layer 13.

(6) Although the semiconductor laser 10a of the above embodiment has a single-stripe single-wavelength oscillation structure, it can also be applied to a semiconductor laser array structure having a multi-stripe structure.
(7) Although the semiconductor laser 10a of the above embodiment has a single electrode structure in the single stripe direction, it can also be applied to a multi-electrode structure (having an active layer region, a phase adjustment region, a DBR region, etc.).

(8) The channel structure 23 of the semiconductor laser 10a of the above embodiment is formed in a U-shape when viewed from the front, but may be a channel structure in which both side surfaces are formed perpendicular to the bottom surface.

10, 10a, 10b, 10c Semiconductor laser 11 n-InP substrate 12 n-InP buffer layer 13 Active layer (MQW)
14, 17, 19 p-InP layer 15, 22, 24 Insulating film mask 16 Mesa stripe structure 18 n-InP layer 20 p-InP cladding layer 21 p-InGaAs contact layer 23 Channel structure (groove)
25 Contact stripe 26 P side electrode 27 Alignment mark 28 Resistance heating film (heating part)
29 Resistance heating film electrode 30 N side electrode 31 Stripe shape 32 Substrate opposite surface 40 Silicon photonics chip 41 Silicon photonics substrate 42 Lower cladding layer 43 Silicon optical waveguide 44 Upper cladding layer 45 Silicon base 46 Alignment mark 47 Resistance heating electrode 48 P side electrode 50 Heating part 100, 100a, 100b Semiconductor optical element

Claims (5)

In a semiconductor optical element in which a semiconductor laser having an active layer and a silicon photonics substrate are joined,
In the semiconductor laser, the active layer is heated by a heating unit,
A distance between the active layer and the silicon photonics substrate is shorter than a distance between the heating unit and the silicon photonics substrate. The semiconductor optical element according to claim 1,
The semiconductor optical element, wherein the heating unit is a resistance heating film included in the semiconductor laser. The semiconductor optical element according to claim 2,
The semiconductor laser has a double channel structure in which grooves are formed on both sides of the active layer,
The semiconductor heating element according to claim 1, wherein the resistance heating film is disposed around a deepest portion of the groove. The semiconductor optical element according to claim 1,
The surface of the semiconductor laser opposite to the substrate is bonded to the silicon photonics substrate,
A semiconductor optical element, wherein an optical axis of the active layer and an optical axis of a silicon optical waveguide of the silicon photonics substrate coincide with each other. In a semiconductor optical element in which a semiconductor laser having an active layer and a silicon photonics substrate are joined,
The semiconductor laser has a double channel structure in which grooves are formed on both sides of the active layer,
The groove is formed such that the distance between the deepest part and the silicon photonics substrate is longer than the distance between the active layer and the silicon photonics substrate,
The opening side of the groove portion faces the silicon photonics substrate,
A semiconductor optical element, wherein a resistance heating film for heating the active layer is disposed around the deepest portion.

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