JP2018121028A - Semiconductor light-emitting device and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the warp of a semiconductor light-emitting device.SOLUTION: A semiconductor light-emitting device 10 comprises: a substrate 20 having a first principal face 20a, and a second principal face 20b on a side opposite to the first principal face 20a; a light emission structure 38 provided on the first principal face 20a, including an active layer 26 of an aluminum gallium nitride (AlGaN) based semiconductor material and emitting deep UV light of 360 nm or less in wavelength; and a backside structure 40 including a first backside layer 42 provided on the second principal face 20b and a second backside layer 44 provided on the first backside layer 42. The lattice mismatch rate between the substrate 20 and the second backside layer 44 is larger than the lattice mismatch rate between the substrate 20 and the first backside layer 42.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor light emitting device and a method for manufacturing the semiconductor light emitting device.

  In recent years, development of semiconductor light emitting devices that output deep ultraviolet light has been underway. A light emitting element for deep ultraviolet light has an aluminum gallium nitride (AlGaN) -based n-type cladding layer, an active layer, and a p-type cladding layer that are sequentially stacked on a substrate. Since the AlGaN layer stacked on the substrate is epitaxially grown at a high temperature of about 800 to 1100 ° C., thermal stress due to the difference in thermal expansion coefficient between the substrate and the AlGaN layer is generated in the process of cooling to room temperature, resulting in warping. . In order to prevent warpage, a technique has been proposed in which zinc oxide (ZnO) having a small thermal expansion coefficient is formed on a substrate opposite to the side on which the active layer is formed, thereby preventing warpage of the substrate due to thermal stress. (For example, refer to Patent Document 1).

JP 2000-22283 A

  In a semiconductor light emitting device that outputs deep ultraviolet light having a wavelength of 360 nm or less, a substrate may be used as a light extraction surface. Since zinc oxide (ZnO) described above absorbs deep ultraviolet light having a wavelength of 360 nm or less, it cannot be used for the light extraction surface of the substrate. Further, it is preferable that not only the warpage of the substrate after cooling but also the warpage of the substrate during the manufacturing process of the light emitting element can be reduced.

  The present invention has been made in view of these problems, and one of exemplary purposes thereof is to provide a technique for suppressing warpage of a semiconductor light emitting element.

  A semiconductor light emitting device according to an aspect of the present invention includes a substrate having a first main surface and a second main surface opposite to the first main surface, an aluminum gallium nitride (AlGaN) provided on the first main surface. ) A light emitting structure including an active layer of a semiconductor material and emitting deep ultraviolet light having a wavelength of 360 nm or less; a first back layer provided on the second main surface; and a second back layer provided on the first back layer A back surface structure including: The lattice mismatch rate between the substrate and the second back layer is greater than the lattice mismatch rate between the substrate and the first back layer.

  According to this aspect, the first back surface layer and the second back surface layer having different lattice constants from the substrate are provided on the second main surface opposite to the first main surface on which the light emitting structure is provided. Stress can be generated. Thereby, the stress difference of the 1st main surface side and the 2nd main surface side can be reduced, and the curvature of a board | substrate can be made small. Further, by providing the second back surface layer having a larger lattice mismatch rate with the substrate than the first back surface layer, the effect of reducing the stress difference is enhanced, and the warpage of the substrate is reduced as compared with the case where only the first back surface layer is provided. The suppression effect can be enhanced.

  A buffer layer provided between the first main surface and the light emitting structure may be further provided. The thickness of the first back layer may be not less than 0.2 times and not more than 2 times the thickness of the buffer layer.

  The light emitting structure may include a clad layer provided between the substrate and the active layer, and the active layer may be provided in a partial region on the clad layer. The thickness of the second back surface layer may be not less than 0.2 times and not more than twice the thickness of the cladding layer.

  The back surface structure may have a transmittance of deep ultraviolet light having a wavelength emitted by the light emitting structure of 90% or more.

The substrate is a sapphire (Al ₂ O ₃ ) substrate, the first back layer is an aluminum nitride (AlN) layer, and the second back layer is an AlGaN layer having a higher AlN molar fraction than the active layer. May be.

  Another aspect of the present invention is a method for manufacturing a semiconductor light emitting device. The method includes forming a light emitting structure including an active layer of an aluminum gallium nitride (AlGaN) -based semiconductor material and emitting deep ultraviolet light having a wavelength of 360 nm or less on a first main surface of a substrate; And a step of forming a first back surface layer on the second main surface opposite to the first surface and a step of forming a second back surface layer on the first back surface layer. The lattice mismatch rate between the substrate and the second back layer is greater than the lattice mismatch rate between the substrate and the first back layer.

  According to this aspect, the first back surface layer and the second back surface layer having different lattice constants from the substrate are provided on the second main surface opposite to the first main surface on which the light emitting structure is provided. Stress can be generated. Thereby, the stress difference of the 1st main surface side and the 2nd main surface side can be reduced, and the curvature of a board | substrate can be made small. Further, by providing the second back surface layer having a larger lattice mismatch rate with the substrate than the first back surface layer, the effect of reducing the stress difference is enhanced, and the warpage of the substrate is reduced as compared with the case where only the first back surface layer is provided. The suppression effect can be enhanced.

  You may further provide the process of forming an electrode on a light emitting structure after the process of forming a 2nd back surface layer.

  According to the present invention, the warp of the semiconductor light emitting element can be suppressed.

1 is a cross-sectional view schematically showing a configuration of a semiconductor light emitting element according to an embodiment. It is a flowchart which shows the manufacturing method of a semiconductor light-emitting device.

  Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings. In the description, the same elements are denoted by the same reference numerals, and repeated descriptions are omitted as appropriate. In order to facilitate understanding of the description, the dimensional ratio of each component in each drawing does not necessarily match the dimensional ratio of an actual light emitting element.

  FIG. 1 is a cross-sectional view schematically showing a configuration of a semiconductor light emitting device 10 according to an embodiment. The semiconductor light emitting element 10 is an LED (Light Emitting Diode) chip configured to emit “deep ultraviolet light” having a center wavelength λ of 200 nm to 360 nm. In order to output deep ultraviolet light having such a wavelength, the semiconductor light emitting device 10 is made of an aluminum gallium nitride (AlGaN) -based semiconductor material having a band gap of about 3.4 eV or more. In this embodiment, particularly, a case where deep ultraviolet light having a center wavelength λ of about 240 nm to 350 nm is emitted is shown.

In this specification, “AlGaN-based semiconductor material” refers to a semiconductor material mainly containing aluminum nitride (AlN) and gallium nitride (GaN), and a semiconductor containing other materials such as indium nitride (InN). Including material. Therefore, the “AlGaN-based semiconductor material” referred to in the present specification has a composition of, for example, In _1-xy Al _x Ga _y N (0 ≦ x + y ≦ 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1). And include AlN, GaN, AlGaN, indium aluminum nitride (InAlN), indium gallium nitride (InGaN), and indium aluminum gallium nitride (InAlGaN).

  Moreover, in order to distinguish the material which does not contain AlN among "AlGaN type semiconductor material", it may be called "GaN type semiconductor material". The “GaN-based semiconductor material” mainly includes GaN and InGaN, and includes a material containing a small amount of AlN. Similarly, among “AlGaN-based semiconductor materials”, in order to distinguish materials that do not substantially contain GaN, they may be referred to as “AlN-based semiconductor materials”. The “AlN-based semiconductor material” mainly includes AlN and InAlN, and includes a material containing a small amount of GaN.

  The semiconductor light emitting device 10 includes a substrate 20, a buffer layer 22, a p-side electrode 34, an n-side electrode 36, a light emitting structure 38, and a back surface structure 40. The light emitting structure 38 includes an n-type cladding layer 24, an active layer 26, an electron block layer 28, a p-type cladding layer 30, and a p-type contact layer 32. The back surface structure 40 includes a first back surface layer 42 and a second back surface layer 44.

The substrate 20 is a substrate having translucency with respect to deep ultraviolet light emitted from the semiconductor light emitting element 10, and is, for example, a sapphire (Al ₂ O ₃ ) substrate. The substrate 20 has a first main surface 20a and a second main surface 20b opposite to the first main surface 20a. The first major surface 20 a is one major surface that serves as a crystal growth surface for growing each layer above the buffer layer 22. The second main surface 20b is one main surface serving as a light extraction surface for extracting deep ultraviolet light emitted from the active layer 26 to the outside. The thickness of the board | substrate 20 is 100 micrometers-1000 micrometers, for example, is about 300 micrometers-600 micrometers.

  The buffer layer 22 is formed on the first major surface 20a of the substrate 20. The buffer layer 22 is a base layer (template layer) for forming each layer above the n-type cladding layer 24. The buffer layer 22 is, for example, an undoped AlN layer, specifically, an AlN (HT-AlN; High Temparature AlN) layer grown at a high temperature. The buffer layer 22 may include an undoped AlGaN layer (u-AlGaN layer) formed thinly on the AlN layer. The u-AlGaN layer included in the buffer layer 22 may be a single layer or a multilayer. For example, a superlattice structure may be formed by laminating a plurality of u-AlGaN layers having different AlN compositions.

The thickness t ₁ of the buffer layer 22 is 0.3 μm to 10 μm, preferably ₁ μm to 3 μm, for example, 2 μm. 90% or more of the thickness t ₁ of the buffer layer 22 is an AlN layer, and the remaining less than 10% is an AlGaN layer. For example, the AlN layer of the buffer layer 22 is about 2 μm, whereas the AlGaN layer of the buffer layer 22 is about 10 to 200 nm.

The n-type cladding layer 24 is formed on the buffer layer 22. The n-type cladding layer 24 is an n-type AlGaN-based semiconductor material layer, for example, an AlGaN layer doped with silicon (Si) as an n-type impurity. The composition ratio of the n-type cladding layer 24 is selected so as to transmit the deep ultraviolet light emitted from the active layer 26. For example, the molar fraction of AlN is 30% or more, preferably 40% or more or 50% or more. Formed as follows. The n-type cladding layer 24 has a band gap larger than the wavelength of deep ultraviolet light emitted from the active layer 26, and is formed, for example, so that the band gap is 4.3 eV or more. The n-type cladding layer 24 is preferably formed so that the mole fraction of AlN is 80% or less, that is, the band gap is 5.5 eV or less, and the mole fraction of AlN is 70% or less (that is, the band gap). It is more desirable that the gap be formed to be 5.2 eV or less. The thickness _{t 2} of the n-type cladding layer 24 is 0.5Myuemu～4myuemu, preferably a 1Myuemu～3myuemu, for example, a 2 [mu] m.

  The active layer 26 is made of an AlGaN-based semiconductor material and is sandwiched between the n-type cladding layer 24 and the electron block layer 28 to form a double heterojunction structure. The active layer 26 may have a single-layer or multi-layer quantum well structure. For example, a stack of a barrier layer formed of an undoped AlGaN-based semiconductor material and a well layer formed of an undoped AlGaN-based semiconductor material. It may consist of a body. The active layer 26 is configured to have a band gap of 3.4 eV or more in order to output deep ultraviolet light having a wavelength of 360 nm or less. For example, the AlN composition ratio is selected so that deep ultraviolet light having a wavelength of 310 nm or less can be output. Is done. The active layer 26 is formed on the n-type cladding layer 24, but is not formed on the entire surface of the n-type cladding layer 24, and is formed only on a partial region of the n-type cladding layer 24. That is, the active layer 26 is not provided on the exposed surface 24 a of the n-type cladding layer 24.

  The electron block layer 28 is formed on the active layer 26. The electron block layer 28 is an undoped AlGaN-based semiconductor material layer, and is formed, for example, so that the molar fraction of AlN is 40% or more, preferably 50% or more. The electron blocking layer 28 may be formed such that the molar fraction of AlN is 80% or more, or may be formed of an AlN-based semiconductor material that does not substantially contain GaN. The electron blocking layer 28 has a thickness of about 1 nm to 10 nm, for example, a thickness of about 2 nm to 5 nm. Note that the electron blocking layer 28 may be a p-type layer doped with magnesium (Mg) instead of an undoped layer.

The p-type cladding layer 30 is a p-type semiconductor layer formed on the electron block layer 28. The p-type cladding layer 30 is a p-type AlGaN-based semiconductor material layer, for example, an AlGaN layer doped with Mg as a p-type impurity. The p-type cladding layer 30 is formed so that the molar fraction of AlN is 50% or more. The p-type cladding layer 30 is formed so as to have a hydrogen (H) concentration of 5 × 10 ¹⁸ / cm ³ or less, and preferably 1 × 10 ¹⁸ / cm ³ or less. The p-type cladding layer 30 has a thickness of about 10 nm to 100 nm, for example, a thickness of about 20 nm to 50 nm.

  The p-type contact layer 32 is a p-type semiconductor layer formed on the p-type cladding layer 30. The p-type contact layer 32 is a p-type GaN-based semiconductor material layer or a p-type AlGaN-based semiconductor material layer, and is formed so that the molar fraction of AlN is lower than that of the p-type cladding layer 30. The p-type contact layer 32 is formed so that the molar fraction of AlN is 30% or less, and preferably 20% or less or 10% or less. The p-type contact layer 32 has a thickness of about 300 nm to 1 μm, for example, a thickness of about 400 nm to 600 nm.

  The p-side electrode 34 is formed on the p-type contact layer 32. The p-side electrode 34 is formed of a nickel (Ni) / gold (Au) multilayer film that is sequentially stacked on the p-type contact layer 32. The n-side electrode 36 is formed on the exposed surface 24 a that is a partial region of the n-type cladding layer 24. The n-side electrode 36 is formed of a multilayer film in which titanium (Ti) / aluminum (Al) / Ti / gold (Au) are sequentially laminated on the n-type cladding layer 24.

  The back surface structure 40 is provided on the second main surface 20 b of the substrate 20. Since the back surface structure 40 serves as a light extraction surface of the semiconductor light emitting device 10, the back surface structure 40 is made of a material having a high transmittance of deep ultraviolet light emitted from the active layer 26. The back surface structure 40 is made of a material having a larger band gap than the active layer 26 so as to be transparent to deep ultraviolet light emitted from the active layer 26. The back surface structure 40 is made of, for example, an AlGaN-based semiconductor material or an AlN-based semiconductor material having a higher AlN molar fraction than the active layer 26. The back surface structure 40 is configured such that the transmittance of deep ultraviolet light emitted from the active layer 26 is 80% or more, and preferably 90% or more.

The first back layer 42 is provided on the second main surface 20 b of the substrate 20. The first back layer 42 is an undoped AlN layer, for example, an HT-AlN layer grown at a high temperature. The first back layer 42 is configured such that the transmittance of deep ultraviolet light is 90% or more. The thickness t ₃ of the first back layer 42 is 0.3 μm to 10 μm, preferably 1 μm to ₃ μm, for example, 2 μm. The thickness _{t 3} of the first backside layer 42 is preferably from 2 times 0.2 times or more the thickness _{t 1} of the buffer layer 22, for example, 0.5 times the thickness _{t 1} of the buffer layer 22 It may be 1.5 times or less.

The second back layer 44 is provided on the first back layer 42. The second back surface layer 44 is an undoped or n-type AlGaN-based semiconductor material layer. The composition ratio of the second back surface layer 44 is selected so as to transmit deep ultraviolet light emitted from the active layer 26. For example, the molar fraction of AlN is 30% or more, preferably 40% or more or 50% or more. Formed as follows. The thickness t ₄ of the second back layer 44 is 0.5 μm to ₄ μm, preferably 1 μm to 3 μm, for example, 2 μm. The thickness _{t 4} of the second backside layer 44 is preferably from 2 times 0.2 times or more the thickness _{t 2} of the n-type cladding layer 24, for example, the n-type cladding layer 24 of thickness _{t 2} It may be 0.5 times or more and 1.5 times or less.

  Comparing the AlN layer of the first back surface layer 42 and the AlGaN layer of the second back surface layer 44, the lattice mismatch rate with respect to the substrate 20 made of sapphire is higher in the second back surface layer 44 than in the first back surface layer 42. large. Here, the lattice mismatch ratio with respect to the substrate 20 corresponds to the difference between the substantial lattice constant of the substrate 20 and the lattice constant of the first back surface layer 42 or the second back surface layer 44. The lattice constant of sapphire is about 4.76Å, and the lattice constant of AlN is about 3.11Å. The lattice constant of GaN is about 3.18３, and the lattice constant of AlGaN is about 3.11 to 3.18Å. Since the lattice constant difference between the sapphire substrate and AlN is very large, when AlN is grown on the sapphire substrate, the crystal growth is such that the crystal orientation of AlN is rotated by about 30 ° with respect to the crystal orientation of sapphire. I know that The same applies when AlGaN is grown on the sapphire substrate. In this case, AlN or AlGaN grown on the sapphire substrate grows considering that the substantial lattice constant is about 2.75Å which is the distance between aluminum (Al) atoms contained in sapphire. As a result, the lattice mismatch rate of the AlN layer with respect to the substrate 20 made of sapphire is about 13%, and the lattice mismatch rate of the AlGaN layer with respect to the substrate 20 is 13% to 16%. The value of the lattice mismatch rate increases as the AlN composition of the AlGaN layer decreases. Therefore, the lattice mismatch rate between the substrate 20 and the second back layer 44 is larger than the lattice mismatch rate between the substrate 20 and the first back layer 42.

  In the present embodiment, by providing not only the first back surface layer 42 but also the second back surface layer 44 as the back surface structure 40, the stress applied to the second main surface 20b of the substrate 20 is increased. Thereby, the difference of the 1st stress added to the 1st main surface 20a of the board | substrate 20 and the 2nd stress added to the 2nd main surface 20b of the board | substrate 20 can be reduced, and the curvature of the board | substrate 20 can be reduced. Further, in correspondence with the structure of the buffer layer 22 and the light emitting structure 38 formed on the first main surface 20 a side of the substrate 20, the first back layer 42 and the second back layer 44 on the second main surface 20 b side of the substrate 20. By forming, the stress on the first main surface 20a side and the stress on the second main surface 20b side can be more easily equalized. Thereby, the controllability of the warp of the semiconductor light emitting element 10 can be improved, and an element structure with less warp can be realized.

Next, a method for manufacturing the semiconductor light emitting element 10 will be described. FIG. 2 is a flowchart showing a method for manufacturing the semiconductor light emitting device 10. First, the first back surface layer 42 is formed on the second main surface 20b of the substrate 20 (S10). The substrate 20 is a sapphire (Al ₂ O ₃ ) substrate. The first back layer 42 is formed on the (0001) plane of the sapphire substrate. The first back layer 42 is an AlN (HT-AlN) layer grown at a high temperature, and is formed using a known epitaxial growth method such as a metal organic chemical vapor deposition (MOVPE) method or a molecular beam epitaxy (MBE) method. it can.

  Next, the second back surface layer 44 is formed on the first back surface layer 42 (S12). The second back surface layer 44 is an undoped or n-type AlGaN-based semiconductor material layer. The second back layer 44 can be formed using a known epitaxial growth method such as a metal organic chemical vapor deposition (MOVPE) method or a molecular beam epitaxy (MBE) method.

Subsequently, the buffer layer 22 is formed on the first main surface 20a of the substrate 20 (S14). The substrate 20 is a sapphire (Al ₂ O ₃ ) substrate and is a growth substrate for forming an AlGaN-based semiconductor material. For example, the buffer layer 22 is formed on the (0001) plane of the sapphire substrate. The buffer layer 22 includes, for example, an AlN (HT-AlN) layer grown at a high temperature and an undoped AlGaN (u-AlGaN) layer.

  Subsequently, the light emitting structure 38 is formed on the buffer layer 22 (S16). On the buffer layer 22, an n-type cladding layer 24, an active layer 26, an electron blocking layer 28, a p-type cladding layer 30, and a p-type contact layer 32 are formed in this order. The n-type cladding layer 24, the active layer 26, the electron blocking layer 28, the p-type cladding layer 30 and the p-type contact layer 32 are layers formed of an AlGaN-based semiconductor material or an AlN-based semiconductor material, and a metal organic chemical vapor phase It can be formed using a known epitaxial growth method such as a growth (MOVPE) method or a molecular beam epitaxy (MBE) method.

  Subsequently, the p-side electrode 34 is formed on the p-type contact layer 32 (S18). Further, the active layer 26, the electron block layer 28, the p-type cladding layer 30 and the p-type contact layer 32 are partially removed so that a partial region of the n-type cladding layer 24 becomes the exposed surface 24a. An n-side electrode 36 is formed on the exposed surface 24 a of the layer 24. The p-side electrode 34 and the n-side electrode 36 can be formed by a known method such as an electron beam evaporation method or a sputtering method. Thereby, the semiconductor light emitting device 10 shown in FIG. 1 is completed.

According to the present embodiment, by providing the back surface structure 40 on the second main surface 20b of the substrate 20, warpage of the substrate 20 can be reduced. In the comparative example, when the substrate thickness is 400 μm, the buffer layer thickness t ₁ is 2 μm, the n-type cladding layer thickness t ₂ is 2 μm, and the back surface structure 40 is not provided, the substrate curvature radius is 8 m. It will be about. This means that when a wafer having a diameter of 50 mm is used as the substrate, the positional deviation in the thickness direction between the central portion and the peripheral portion of the substrate 20 is about 150 μm. Specifically, the warp occurs so that the central portion of the first main surface 20a of the substrate 20 is convex.

On the other hand, in the embodiment, has a thickness of 400 [mu] m, the thickness _{t 1} of the buffer layer 22 is 2 [mu] m, the thickness _{t 2} of the n-type cladding layer 24 is 2 [mu] m of the substrate 20, the thickness of the first backside layer 42 t _{When 3} is 2 μm and the thickness t ₄ of the second back surface layer 44 is 2 μm, the radius of curvature of the substrate 20 is improved to about 60 m. This means that when a wafer having a diameter of 50 mm is used as the substrate 20, the positional deviation in the thickness direction between the center and the peripheral portion of the substrate 20 is 20 μm or less. According to the present embodiment, the flatness of the substrate 20 of the semiconductor light emitting element 10 can be improved.

  The semiconductor light emitting device 10 according to the present embodiment is completed by dicing a large number of elements (several tens or hundreds) formed on the substrate 20 which is a single large wafer. If the substrate 20 is warped in the manufacturing process of the semiconductor light emitting device 10, the height position is different between the central portion and the peripheral portion of the wafer, which affects the uniformity of the process within the wafer surface. Arise. In the process of removing a part of the light emitting structure 38 to form the exposed surface 24a of the n-type cladding layer 24 and the process of forming the p-side electrode 34 and the n-side electrode 36, a mask is provided on the wafer for patterning. There is a need to. If the wafer is greatly warped during patterning, it becomes difficult to form a pattern as designed at the intended location, leading to a decrease in yield.

  On the other hand, according to the present embodiment, the warpage of the substrate 20 in the electrode forming process can be reduced by providing the back surface structure 40 before the electrode forming process that requires patterning. Further, by providing the back surface structure 40 before forming each layer constituting the light emitting structure 38, the active layer 26 can be formed in a highly flat state in which the stress difference between both surfaces of the substrate 20 is reduced. Therefore, according to the present embodiment, process stability and uniformity can be improved, and the manufacturing yield of the semiconductor light emitting device 10 can be improved.

  According to the present embodiment, since the light emitting structure 38 can be provided on the highly flat substrate 20 by providing the back surface structure 40, the active layer 26 is formed in a state after the semiconductor light emitting device 10 is completed. The stress applied to the included light emitting structure 38 can be relaxed. Thereby, with energization use of the semiconductor light emitting element 10, it is possible to lengthen the time until the light emission intensity is reduced due to the occurrence of cracks or the like in each layer constituting the light emitting structure 38. Therefore, according to the present embodiment, the life of the semiconductor light emitting device 10 can be extended and the reliability of the semiconductor light emitting device 10 can be improved.

  In the above, this invention was demonstrated based on the Example. It is understood by those skilled in the art that the present invention is not limited to the above-described embodiment, and various design changes are possible, and various modifications are possible, and such modifications are within the scope of the present invention. It is a place.

  In the above-described embodiment, the manufacturing method for forming the buffer layer 22 and the light emitting structure 38 after the formation of the first back surface layer 42 and the second back surface layer 44 has been described. In a variant, these steps may be performed in a different order. For example, the first back surface layer 42 may be formed, then the buffer layer 22 may be formed, then the second back surface layer 44 may be formed, and then the light emitting structure 38 may be formed. Alternatively, the buffer layer 22 may be formed, the first back layer 42 may be formed next, the second back layer 44 may be formed, and then the light emitting structure 38 may be formed. In addition, the first back layer 42 and the second back layer 44 may be formed after the buffer layer 22 and the light emitting structure 38 are formed.

  DESCRIPTION OF SYMBOLS 10 ... Semiconductor light emitting element, 20 ... Board | substrate, 20a ... 1st main surface, 20b ... 2nd main surface, 22 ... Buffer layer, 26 ... Active layer, 38 ... Light emission structure, 40 ... Back surface structure, 42 ... 1st back surface layer 44 Second back layer.

Claims (7)

A substrate having a first main surface and a second main surface opposite to the first main surface;
A light emitting structure provided on the first main surface, including an active layer of an aluminum gallium nitride (AlGaN) based semiconductor material, and emitting deep ultraviolet light having a wavelength of 360 nm or less;
A back surface structure including a first back surface layer provided on the second main surface and a second back surface layer provided on the first back surface layer,
A semiconductor light emitting device, wherein a lattice mismatch rate between the substrate and the second back layer is larger than a lattice mismatch rate between the substrate and the first back layer. A buffer layer provided between the first main surface and the light emitting structure;
2. The semiconductor light emitting element according to claim 1, wherein a thickness of the first back surface layer is 0.2 to 2 times a thickness of the buffer layer. The light emitting structure includes a clad layer provided between the substrate and the active layer, and the active layer is provided in a partial region on the clad layer,
3. The semiconductor light emitting element according to claim 1, wherein a thickness of the second back surface layer is 0.2 to 2 times a thickness of the cladding layer.   4. The semiconductor light emitting element according to claim 1, wherein the back surface structure has a transmittance of 90% or more of deep ultraviolet light having a wavelength emitted by the light emitting structure. 5. The substrate is a sapphire (Al ₂ O ₃ ) substrate,
The first back layer is an aluminum nitride (AlN) layer,
The semiconductor light emitting element according to claim 1, wherein the second back surface layer is an AlGaN layer having a higher AlN molar fraction than the active layer. Forming a light emitting structure including an active layer of aluminum gallium nitride (AlGaN) based semiconductor material and emitting deep ultraviolet light having a wavelength of 360 nm or less on a first main surface of the substrate;
Forming a first back surface layer on a second main surface opposite to the first main surface of the substrate;
Forming a second back surface layer on the first back surface layer,
A method of manufacturing a semiconductor light emitting device, wherein a lattice mismatch rate between the substrate and the second back layer is larger than a lattice mismatch rate between the substrate and the first back layer.   The method of manufacturing a semiconductor light emitting element according to claim 6, further comprising a step of forming an electrode on the light emitting structure after the step of forming the second back surface layer.

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