JP2018078607A - Transmitter, receiver and method for transmitting/receiving synchronous signal - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve synchronization performance improved at first and second types of synchronous signals in a plurality of symbols of a sub frame with N symbols.SOLUTION: The transmitter determines at which M1 symbols li of a sub frame with N symbols a first type of synchronous signal should be transmitted (401), calculates at which M2 symbols kj a second type of synchronous signal of the sub frame should be transmitted by arranging it at a distance of one or a plurality of symbols from a symbol li (402) and transmits the first and second types of synchronous signals at the determined symbols li and kj (403).SELECTED DRAWING: Figure 4

Description

  The embodiments described herein generally relate to a transmitter, a method at a transmitter, a receiver, and a method at a receiver. In particular, a mechanism for transmitting a first type of synchronization signal and a second type of synchronization signal is described herein.

  In wireless communication systems, transmitters and receivers must be synchronized in time and frequency in order to communicate. Typically this is accomplished by having the transmitter transmit a synchronization signal that the receiver can detect. For example, in a cellular mobile communication system, a plurality of synchronization signals are used for cell search, which is a procedure in which user equipment (UE) acquires time synchronization and frequency synchronization with a cell and detects its cell ID. A UE may be referred to as a mobile terminal, a wireless terminal, a mobile station, a mobile phone, a cellular phone, etc., as the case may be.

  A wireless communication system covers a geographical area that may be divided into multiple cell areas. Each cell area may be referred to as a “eNB”, “eNodeB”, “NodeB”, or “B-node” in some networks, depending on the technology and / or terminology used. Or it is under the control of a base station, eg, a radio base station (RBS) or a base transceiver base station (BTS). However, in some cases, the communication is performed directly between multiple mobile stations and may be performed directly or via other multiple mobile stations. Such a communication paradigm is sometimes referred to as device-to-device (D2D) communication. D2D communication may be possible both in the presence and / or absence of cellular infrastructure.

  Several synchronization signals can be defined. Each serves its own specific purpose. For example, one type of signal may be designed to obtain timing synchronization at the sample level, while another type of synchronization signal provides additional information, for example, to obtain subframe or radio frame level synchronization. obtain. In general, the process of obtaining synchronization is computationally intensive and contributes to receiver power consumption, while at the same time occupying a significant portion of the cost of the chipset. Thus, it will be appreciated that the multiple synchronization signals must be designed to provide a low complexity implementation at the receiver.

  In certain specific applications, it may be desirable to transmit multiple synchronization signals in multiple bursts. That is, some synchronization signals may be transmitted in a short time, i.e. in bursts, but the duration of multiple bursts may be relatively long. As a result, the receiver can acquire synchronization in a relatively short time, that is, by receiving only one synchronization burst. FIG. 8A illustrates a number of orthogonal frequency division multiplexing (OFDM) symbols that transmit multiple synchronization signals while the burst has a long burst period compared to the intersymbol spacing of multiple synchronization symbols within the burst, or 2 illustrates an example including a single carrier frequency division multiple access (SC-FDMA) symbol. Therefore, the direct conclusion of burst transmission is that the distance between multiple OFDM / SC-FDMA symbols including the synchronization signal may not be uniform. This is in contrast to periodic transmissions where the synchronization signal is transmitted in multiple OFDM / SC-FDMA symbols that are equidistant.

  Burst transmission of multiple synchronization signals may be efficient in systems that use fast on / off switching of multiple cells, for example, to accommodate dynamically changing traffic loads. If a cell is switched on, multiple receivers can quickly synchronize to that cell, making burst transmission of synchronization signals from the cell desirable.

  A further example is device-to-device (D2D) communication. In D2D communication, a mobile terminal is transmitting a synchronization signal, and the synchronization signal should be detected by another mobile terminal in the vicinity of the mobile terminal. To save transmit power, it is desirable to transmit the synchronization signal in multiple bursts, which allows the power amplifier to be deactivated between multiple bursts. It is also desirable to concentrate a plurality of synchronization signals in a plurality of bursts. This is because cellular communications, i.e., non-D2D communications, minimize the impact on available time-frequency resources.

  For D2D communication in Long Term Evolution (LTE) systems, the concept of side link communication is used (as opposed to uplink and downlink for cellular communication). Multiple synchronization sources will transmit multiple side link synchronization signals. Multiple side link synchronization signals are constrained to be transmitted within one subframe, ie, in bursts. The plurality of side link synchronization signals are generated as a plurality of SC-FDMA signals. The idea of OFDM symbols and SC-FDMA symbols can be used interchangeably herein without affecting the disclosed solutions. A subframe may be 1 ms long and comprises, for example, 12 or 14 SC-FDMA symbols, depending on the cyclic prefix length. Further, the plurality of side link synchronization signals may comprise two SC-FDMA symbols having a primary side link synchronization signal and two SC-FDMA symbols having a secondary side link synchronization signal. Both those SC-FDMA symbols with primary side link synchronization signals use the same modulation sequence, which is designed to accommodate efficient matched filters in the detector. The SC-FDMA symbol of the secondary side link synchronization signal may use a plurality of different modulation sequences that may provide further information to the receiver, eg, subframe timing. In general, multiple side link synchronization signals are transmitted, for example, physical layer side link synchronization identification information, synchronization source type (eg, eNodeB, UE, or relay device), and / or side link synchronization signal Information such as the number of hops between multiple D2D UEs may be conveyed.

  In the prior art LTE system, the primary synchronization signal (PSS) and the secondary synchronization signal (SSS) are transmitted in OFDM symbols every 5 ms, and there is no idea of a burst. Please note that. Thus, the distance between two consecutive PSS (or SSS) OFDM symbols is always 5 ms according to the prior art.

  The positions of the SC-FDMA symbols in the primary side link synchronization signal and the secondary side link synchronization signal are important and should be carefully selected to allow a low complexity implementation of the synchronization unit at the receiver. Let's go. In some prior art embodiments, the primary side link synchronization signal is located continuously in SC-FDMA symbols 6 and 7, and the secondary side link synchronization signal is located in SC-FDMA symbols 1 and 12. obtain. See FIG. 8B.

  However, the arrangement disclosed in FIG. 8B does not represent a reduction in complexity at the receiver for several reasons. If the receiver obtains multiple OFDM / SC-FDMA symbol timings by detecting the primary side link synchronization signal, the receiver may sub-frame timing, i.e., in which OFDM / SC-FDMA symbols, The detection of the secondary side link synchronization signal will proceed to obtain whether the frame starts / stops. The receiver can then view the primary side link synchronization signal as a known reference symbol from which the receiver can estimate the channel. The receiver can then detect a plurality of secondary side link synchronization signals coherently using a plurality of channel estimates from the primary side link synchronization signals. In a time-varying channel, the reference symbol, i.e. the primary side link synchronization signal, needs to be located close to the data symbol, i.e. the secondary side link synchronization signal for which the receiver is to provide the channel estimate. is there. In FIG. 8B, the minimum distance between the primary side link synchronization signal and the secondary side link synchronization signal is 5 OFDM / SC-FDMA symbols, which means that the transmitter and / or receiver moves around. In some cases, channel estimates may not be up-to-date, which is not useful. Because of this limitation, the receiver may require the use of non-coherent secondary side link synchronization signal detection, resulting in worse performance. Note that for D2D communication, in contrast to cellular communication systems, both the transmitter and receiver may be mobile.

  Further, when the receiver is detecting the primary side link synchronization signal, the receiver typically uses a matched filter whose output is a correlation value. Although there are two primary sidelink synchronization signal symbols in a subframe, due to noise and channel fading, the receiver does not necessarily detect two correlation peaks. Therefore, the receiver cannot know which of the two primary side link synchronization signal symbols has been detected. In FIG. 8B, the OFDM / SC-FDMA symbol distances between the secondary side link synchronization signal in symbol 1 and the primary side link synchronization signal in each of symbols 6 and 7 are different, i.e., 4 OFDMs each. / SC-FDMA symbols and 5 OFDM / SC-FDMA symbols. The same observation results hold for the secondary side link synchronization signal at symbol 12. Thus, if the receiver detects a correlation peak in the primary side link synchronization signal, the receiver will need to blind detect the secondary side link synchronization signal. This is because the receiver does not know which primary side link synchronization signal symbol has been detected, and consequently does not know which OFDM / SC-FDMA symbol the secondary side link synchronization signal is located. Because it's waxy. Blind detection increases the complexity at the receiver and makes the performance of secondary side link synchronization signal detection worse.

  The arrangement of FIG. 8B is also not beneficial for transmission power savings at the transmitter. This is because the primary side link synchronization signal symbol and the secondary side link synchronization signal symbol are spread over the entire subframe. This makes it more difficult to turn off the power amplifier to save battery power.

  Thus, the position of multiple symbols for multiple synchronization signals and the transmission of multiple synchronization signals may be improved to improve synchronization performance between the transmitter and receiver.

  Therefore, it is an object of the present invention to eliminate at least some of the above-mentioned drawbacks and to provide first and second synchronization signals in a plurality of symbols of a subframe.

  This object and several other objects are realized by the features of the appended independent claims. Further implementations are apparent from the dependent claims, the description and the drawings.

According to a first aspect, a transmitter is provided. The transmitter transmits a first type synchronization signal in M ₁ symbols l _i where 0 ≦ i ≦ (M ₁ −1) in a subframe and 0 ≦ j ≦ (M ₂ −1) in a subframe. ) _Is a second type of synchronization signal in M ₂ symbols k _j . The subframe includes N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2. The transmitter comprises a processor configured to determine in which symbol l _i of the subframe a first type of synchronization signal is to be transmitted. The processor places each of the M ₂ symbols k _j at one or more determined symbol distances from the associated symbol l _i , thereby providing a second type of synchronization signal at which symbol k _j of the subframe. Is further configured to calculate whether should be transmitted. The one or more determined symbol distances between each of the M ₂ symbols k _j and each associated symbol l _i are equal for all M ₁ symbols l _{i in} the subframe. In addition, the transmitter also transmits a plurality of synchronization signals of the first type in the determined M ₁ symbols l _i of the subframe and the _second in the calculated M ₂ symbols k _j of the subframe. A transmission circuit configured to transmit two types of synchronization signals is provided.

  The advantage thereby is that the receiver is able to easily detect the second type of synchronization signal without having to perform blind detection. Thanks to the constant distance between each symbol holding the first type of synchronization signal and each symbol holding the second type of synchronization signal, the receiver should detect the second type of synchronization signal. It is not necessary to know which symbol of the plurality of symbols holding the first type synchronization signal is detected. Thereby, the receiver saves time, energy and computational power while improving the synchronization between the transmitter and the receiver. Thus, transmitter and receiver synchronization is achieved which is efficient and yet easily implemented.

In a first possible embodiment of the transmitter according to the first aspect, one or more symbol distances between the determined M ₁ symbols l _i and each of the associated M ₂ symbols k _j May be determined from the first time instance after the cyclic prefix of the symbols l _i , k _j .

  By setting the interval between the first sample of the first type sync signal and the first sample of the second type sync signal constant for all symbols including the plurality of first type sync signals, Even if the different types of synchronization signals are positioned in a plurality of OFDM / SC-FDMA symbols having different cyclic prefix lengths, the position of the second type synchronization signal can be clearly determined. Therefore, blind detection of the second type synchronization signal is avoided even in the case of different cyclic prefix lengths of a plurality of symbols in the subframe.

In a second possible embodiment of a transmitter according to the first aspect, or a first possible embodiment of the first aspect, the processor is based on a set of integer offset values Δ _j known to the receiver, k _j To calculate one or more determined symbol distances between each of the M ₂ symbols k _j and each associated symbol l _i by calculating = l _i + Δ _j , ∀l _i It can be further configured. Here, | Δ _j |> 0, (k _j , l _i ) ε {0, 1,..., N−1}.

The advantage thereby is that the receiver by which the first type only detects one synchronization signal and knows the above specific algorithm and a set of integer offset values Δ _j . It is possible to detect two types of synchronization signals. Thereby, the synchronization between the transmitter and the receiver is improved.

In either the third possible embodiment of the transmitter according to the first aspect, or the previous embodiments of the first aspect, the processor is such that | Δ | = 1, 2 and / or 3 It may be configured to establish a set offset value Δ _j .

  Coherent detection is possible by positioning the first type and second type synchronization signals close to each other.

In either the fourth possible embodiment of the transmitter according to the first aspect, or the previous embodiments of the first aspect, M ₁ symbols l _i are such that l _{i + 1} = l _i +1, It may be determined to be located adjacent in a plurality of subsequent symbols l _i .

  By arranging a plurality of symbols holding a plurality of synchronization signals in close proximity to each other in a subframe, the transmitter amplifier can transmit a plurality of synchronization signals when the plurality of symbols holding these synchronization signals are transmitted. It can be switched off until the time to transmit the corresponding symbol of the subsequent subframe holding the signal. Thereby, energy is saved.

In either the fifth possible embodiment of the transmitter according to the first aspect, or the previous embodiments of the first aspect, M ₁ symbols l _i satisfy l _i + ₁ ≧ l _i + N−3. It can be determined that they are positioned apart from each other.

  Thereby, the transmission of the first type of synchronization signals will be separated in time. This is particularly advantageous when transmitting under severe wireless transmission conditions with changing signal quality. This is because the risk of transmitting all first type synchronization signals when the receiver is in the shadow of a radio is reduced. Thereby, a more robust synchronization scheme is realized.

In either the sixth possible embodiment of the transmitter according to the first aspect, or the previous embodiments of the first aspect, M ₁ symbols l _i may have equal cyclic prefix lengths, And / or M ₂ symbols k _j may have equal cyclic prefix length.

  Thereby, blind decoding of the symbol position of the second type synchronization signal is avoided. This is because the first type of synchronization signals are assigned to the symbols having the same cyclic prefix length, and the second type of synchronization signals are the same as those for the first type of synchronization signals. This is because they are assigned to a plurality of symbols having the same cyclic prefix length, which may or may not be present.

In either the seventh possible embodiment of the transmitter according to the first aspect or the previous embodiments of the first aspect, the number of symbols l _i , k _j is such that M ₁ = M ₂ , And may be the same for the first type and the second type of synchronization signal, the set of integer offset values Δ _j may comprise one offset value.

  The advantage of having one offset value Δ is that only the receiver is required to know this one offset value Δ. Thereby, the synchronization between the transmitter and the receiver is improved.

In either the eighth possible embodiment of the transmitter according to the first aspect, or the previous embodiments of the first aspect, the number of M ₂ of the symbol k _j is the number of M ₁ of the symbol l _i. Each determination between each of the M ₂ symbols k _j and each associated symbol l _i such that a set of offset values Δ _j is k _j = l _i + Δ _j A plurality of distinct integer offset values Δ _j that define the determined symbol distance. Here, Δ _j ε {0, 1,..., N−1}.

  By transmitting more reference signals of the second type than reference signals of the first type, synchronization between the transmitter and the receiver is improved.

  In either the ninth possible embodiment of the transmitter according to the first aspect, or any previous embodiment of the first aspect, the first type synchronization signal and the second type synchronization signal are device-to-device ( D2D) may be dedicated to communication and the transmitter includes a non-fixed unit.

  Synchronization between multiple non-fixed units is typically more important than synchronization between one fixed unit and one non-fixed unit. This is because both non-fixed transmitters and receivers may drift relative to a fixed network node, thereby drifting relative to each other. Thanks to the provided transmitter, a robust and reliable yet fast synchronization protocol is realized.

  In any of the tenth possible embodiments of the transmitter according to the first aspect, or any previous embodiments of the first aspect, the transmitter is in a 3rd Generation Partnership Project Long Term Evolution (3GPP LTE) system. It may include user equipment (UE) that operates. The first type of synchronization signals may include a primary side link synchronization signal, and the second type of synchronization signals may include a secondary side link synchronization signal.

  Accordingly, a transmitter that supports synchronization in a 3GPP LTE environment is provided.

  In either the eleventh possible embodiment of the transmitter according to the first aspect, or the previous embodiments of the first aspect, the first type synchronization signal and / or the second type synchronization signal are orthogonal frequencies It may be based on either division multiplexing (OFDM) or single carrier frequency division multiple access (SC-FDMA).

  Accordingly, a transmitter that supports synchronization in a 3GPP LTE environment is provided in both directions between the transmitter and the receiver.

According to the second aspect, the first type synchronization signal in M ₁ symbols l _i that satisfies 0 ≦ i ≦ (M ₁ −1) in the subframe, and 0 ≦ j ≦ (M ₂ − in the subframe). A method at the transmitter is provided for transmitting a second type of synchronization signal comprising M ₂ symbols k _j which is 1). The subframe includes N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2. The method comprises determining in which M ₁ symbols l _i of a subframe a first type of synchronization signal is to be transmitted. Moreover, also the method, the M ₂ symbols k _j, by placing one or more of determined symbols distance from the associated symbol l _i, the in any M ₂ symbols k _j subframes Calculating two types of synchronization signals to be transmitted. Each and M ₂ symbols k _j, the one or more determined symbol distance between the respective associated symbol l _i includes all of M ₁ symbols l _i in sub-frame, they Equal to each associated M ₂ symbols k _j . In addition, the method also provides a first type of synchronization signal in the determined M ₁ symbols l _i of the subframe and a second type of M ₂ symbols k _j in the subframe. Transmitting a synchronization signal.

  The advantage thereby is that the receiver is allowed to easily detect the second type of synchronization signal without having to perform blind detection. Thanks to the constant distance between each symbol holding the first type of synchronization signal and each symbol holding the second type of synchronization signal, the receiver should detect the second type of synchronization signal. It is not necessary to know which symbol of the plurality of symbols holding the first type synchronization signal is detected. Thereby, time, energy and computational power are saved by the receiver. Thus, transmitter and receiver synchronization is achieved which is efficient and yet easily implemented.

In a first possible embodiment of the method according to the second aspect, one or more symbol distances between the determined M ₁ symbols l _i and each of the associated M ₂ symbols k _j are , Symbols l _i , k _j can be determined from the first time instance after the cyclic prefix.

  By setting the interval between the first sample of the first type sync signal and the first sample of the second type sync signal constant for all symbols including the plurality of first type sync signals, Even if the different types of synchronization signals are positioned in a plurality of OFDM / SC-FDMA symbols having different cyclic prefix lengths, the position of the second type synchronization signal can be clearly determined. Therefore, blind detection of the second type synchronization signal is avoided even in the case of different cyclic prefix lengths of a plurality of symbols in a subframe.

In the second possible embodiment of the method according to the second aspect, or the first possible embodiment of the second aspect, between each of the M ₂ symbols k _j and the respective associated symbol l _i Can be calculated by calculating k _j = l _i + Δ _j , ∀l _i based on a set of integer offset values Δ _j known to the receiver. Where | Δ _j |> 0, (k _j , l _i ) ε {0, 1,..., N−1}.

The advantage thereby is that the receiver by which the first type only detects one synchronization signal and knows the above specific algorithm and a set of integer offset values Δ _j . It is possible to detect two types of synchronization signals. Thereby, the synchronization between the transmitter and the receiver is improved.

In any of the third possible embodiments of the method according to the second aspect, or the previous embodiments of the second aspect, the method comprises 1 such that | Δ | = 1, 2 and / or 3. Establishing a set offset value Δ _j may be included.

  Coherent detection is possible by positioning the first type and second type synchronization signals close to each other.

In either the fourth possible embodiment of the method according to the second aspect, or the previous embodiments of the second aspect, M ₁ symbols l _i are a plurality of such that l _{i + 1} = l _i +1 Can be determined to be located adjacent in subsequent symbols l _i .

  By arranging a plurality of symbols holding a plurality of synchronization signals in close proximity to each other in a subframe, the transmitter amplifier can transmit a plurality of synchronization signals when the plurality of symbols holding these synchronization signals are transmitted. It can be switched off until the time to transmit the corresponding symbol of the subsequent subframe holding the signal. Thereby, energy is saved.

In either the fifth possible embodiment of the method according to the second aspect, or the previous embodiments of the second aspect, M ₁ symbols l _i such that l _{i + 1} ≧ l _i + N−3. , Can be determined to be positioned apart from each other.

  Thereby, the transmission of the first type of synchronization signals will be separated in time. This is particularly advantageous when transmitting under severe wireless transmission conditions with changing signal quality. This is because the risk of transmitting all first type synchronization signals when the receiver is in the shadow of a radio is reduced. Thereby, a more robust synchronization scheme is realized.

In either the sixth possible embodiment of the method according to the second aspect, or the previous embodiments of the second aspect, M ₁ symbols l _i may have equal cyclic prefix lengths, and / Or M ₂ symbols k _j may have equal cyclic prefix length.

  Thereby, blind decoding of the symbol position of the second type synchronization signal is avoided. This is because the first type of synchronization signals are assigned to symbols having the same cyclic prefix length, and the second type of synchronization signals are the same as those for the first type of synchronization signals. This is because it is assigned to a plurality of symbols having the same cyclic prefix length.

In either the seventh possible embodiment of the method according to the second aspect, or the previous embodiments of the second aspect, the number of symbols l _i , k _j is such that M ₁ = M ₂ , It may be the same for the first type and the second type of synchronization signal, and the set of integer offset values Δ _j may comprise one offset value.

  The advantage of having one offset value Δ is that only the receiver is required to know this one offset value Δ. Thereby, the synchronization between the transmitter and the receiver is improved.

In either the eighth possible embodiment of the method according to the second aspect, or the previous embodiments of the second aspect, the number of M ₂ of the symbol k _j exceeds the number of M ₁ of the symbol l _i. A set of offset values Δ _j may be determined between each of the M ₂ symbols k _j and each associated symbol l _i such that k _j = l _i + Δ _j. A plurality of distinct integer offset values Δ _j that define the symbol distance. Here, Δ _j ε {0, 1,..., N−1}.

  By transmitting more reference signals of the second type than reference signals of the first type, synchronization between the transmitter and the receiver is improved.

  In either the ninth possible embodiment of the method according to the second aspect, or the previous embodiments of the second aspect, the first type of synchronization signal and the second type of synchronization signal are device-to-device (D2D). ) It may be dedicated to communication and the transmitter includes a non-fixed unit.

  Synchronization between multiple non-fixed units is typically more important than synchronization between one fixed unit and one non-fixed unit. This is because both non-fixed transmitters and receivers may drift relative to a fixed network node, thereby drifting relative to each other. Thanks to the method provided, a robust and reliable yet fast synchronization protocol is realized.

  In either the tenth possible embodiment of the method according to the second aspect, or the previous embodiment of the second aspect, the transmitter operates within a third generation partnership project long term evolution (3GPP LTE) system. User equipment (UE). The first type of synchronization signals may include a plurality of primary side link synchronization signals, and the second type of synchronization signals may include a plurality of secondary side link synchronization signals.

  Accordingly, a method corresponding to synchronization in the 3GPP LTE environment is provided.

  In either the eleventh possible embodiment of the method according to the second aspect, or the previous embodiments of the second aspect, the first type of synchronization signal and / or the second type of synchronization signal is orthogonal frequency division It can be based on either multiplexing (OFDM) or single carrier frequency division multiple access (SC-FDMA).

  Accordingly, a method is provided that supports synchronization in a 3GPP LTE environment in both directions between a transmitter and a receiver.

According to the third aspect, the received first type synchronization signal with M ₁ symbols l _i where 0 ≦ i ≦ (M ₁ −1) in the subframe and 0 ≦ j ≦ (M ₂ A receiver is provided that is configured to detect a second type of synchronization signal in M ₂ symbols k _j that is -1). Those synchronization signals are received in subframes comprising N symbols, where N ≧ M ₂ ≧ M ₁ ≧ 2. The receiver comprises a receiving circuit configured to receive a first type of synchronization signal at M ₁ symbols l _i of the subframe. In addition, the receiver also comprises a processor configured to establish one or more determined symbol distances between the symbol k _j and the associated symbol l _i . In addition, the receiving circuit is further configured to calculate in which M ₂ symbols k _j of the subframe a second type of synchronization signal is to be detected. Here, each and M ₂ symbols k _j, the one or more determined symbol distance between the respective associated symbol l _i, all of M ₁ symbols l _i in sub-frame Is equal to

  The advantage thereby is that the receiver is allowed to easily detect the second type of synchronization signal without having to perform blind detection. Thanks to the constant distance between each symbol holding the first type of synchronization signal and each symbol holding the second type of synchronization signal, the receiver should detect the second type of synchronization signal. It is not necessary to know which symbol of the plurality of symbols holding the first type synchronization signal is detected. Thereby, time, energy and computational power are saved by the receiver. Thus, transmitter and receiver synchronization is achieved which is efficient and yet easily implemented.

In a first possible embodiment of a receiver according to a third aspect, the processor is based on a set of offset values _{Δ j, k j = l i} + Δ j, by calculating the ∀l _{i, M 2} It may be configured to calculate one or more determined symbol distances between each of the symbols k _j and each associated symbol l _i . Where | Δ |> 0, (k _j , l _i ) ε {0, 1,..., N−1}.

The advantage thereby is that the receiver can detect the second type only by detecting one synchronization signal of the first type and knowing the specific algorithm and a set of integer offset values Δ _j. It is possible to detect the synchronization signal. Thereby, the synchronization between the transmitter and the receiver is improved.

According to the fourth aspect, the first type of synchronization signal in M ₁ symbols l _i where 0 ≦ i ≦ (M ₁ −1) in the subframe, and M ₂ symbols received in the subframe A method is provided at a receiver configured to detect a second type of synchronization signal at k _j . The subframe includes N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2. The method comprises determining in which M ₁ symbols l _i of the subframe a first type of synchronization signal is received. Further, the method determines one or more between each of the M ₂ symbols k _j and each associated symbol l _i that is equal for all M ₁ symbols l _{i in} the subframe. Establishing a symbol distance. In addition, the method comprises calculating in which M ₂ symbols k _j of the subframe a second type of synchronization signal is to be received. Further, the method comprises detecting M ₂ synchronization signals of the second type in the calculated M ₂ symbols k _j of the subframe.

  The advantage thereby is that the receiver is allowed to easily detect the second type of synchronization signal without having to perform blind detection. Thanks to the constant distance between each symbol holding the first type of synchronization signal and each symbol holding the second type of synchronization signal, the receiver should detect the second type of synchronization signal. It is not necessary to know which symbol of the plurality of symbols holding the first type synchronization signal is detected. Thereby, time, energy and computational power are saved by the receiver. Thus, transmitter and receiver synchronization is achieved which is efficient and yet easily implemented.

  According to another aspect, there is provided a computer program in a transmitter according to the first aspect, or any possible embodiment thereof. The computer program comprises program code for executing the method according to the second aspect, or any possible embodiment thereof, when executed on a computer.

  The advantage thereby is that it is possible to easily detect the second type of synchronization signal without having to perform blind detection. Thanks to the constant distance between each symbol holding the first type of synchronization signal and each symbol holding the second type of synchronization signal, the receiver should detect the second type of synchronization signal. It is not necessary to know which symbol of the plurality of symbols holding the first type synchronization signal is detected. Thereby, time, energy and computational power are saved by the receiver. Thus, transmitter and receiver synchronization is achieved which is efficient and yet easily implemented.

  According to another aspect, there is provided a computer program in a receiver according to the third aspect, or any possible embodiment thereof. The computer program comprises program code for executing the method according to the fourth aspect, or any possible embodiment thereof, when executed on a computer.

  The advantage thereby is that it is possible to easily detect the second type of synchronization signal without having to perform blind detection. Thanks to the constant distance between each symbol holding the first type of synchronization signal and each symbol holding the second type of synchronization signal, the receiver should detect the second type of synchronization signal. It is not necessary to know which symbol of the plurality of symbols holding the first type synchronization signal is detected. Thereby, time, energy and computational power are saved by the receiver. Thus, transmitter and receiver synchronization is achieved which is efficient and yet easily implemented.

According to yet another aspect, a system is provided for synchronizing a transmitter and a receiver with each other. The system includes a first type of synchronization signal in M ₁ symbols l _i where 0 ≦ i ≦ (M ₁ −1) in a subframe, and 0 ≦ j ≦ (M ₂ −1) in a subframe. A transmitter according to the first aspect and a receiver according to the third aspect, which are synchronized with each other by transmitting a second type of synchronization signal comprising M ₂ symbols k _j . The subframe includes N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2. The synchronization further comprises determining in which M ₁ symbols l _i of the subframe the first type of synchronization signal is to be transmitted. In addition, the synchronization may also be performed in any M ₂ symbols k _j of the subframe by placing M ₂ symbols k _j at one or more determined symbol distances from the associated symbol l _i . The two types of synchronization signals comprise calculating whether to be transmitted. Each and M ₂ symbols k _j, the one or more determined symbol distance between the respective associated symbol l _i includes all of M ₁ symbols l _i in sub-frame, they Equal to each associated M ₂ symbols k _j . In addition, the synchronization also includes a first type of synchronization signal in the determined M ₁ symbols l _i of the subframe and a second type of M ₂ symbols k _j in the subframe. Transmitting a synchronization signal.

  The advantage thereby is that it is possible to easily detect the second type of synchronization signal without having to perform blind detection. Thanks to the constant distance between each symbol holding the first type of synchronization signal and each symbol holding the second type of synchronization signal, the receiver should detect the second type of synchronization signal. It is not necessary to know which symbol of the plurality of symbols holding the first type synchronization signal is detected. Thereby, time, energy and computational power are saved by the receiver. Thus, transmitter and receiver synchronization is achieved which is efficient and yet easily implemented.

  Other objects, advantages and novel features of the described aspects will become apparent from the following detailed description.

Various embodiments are described in more detail with reference to the accompanying drawings, which illustrate various examples.
1 is a block diagram illustrating a wireless communication network in one embodiment. FIG. It is a block diagram which illustrates the example of D2D communication. It is a block diagram illustrating the example of D2D communication by an intermittent node. FIG. 3 is a block diagram illustrating a subframe comprising 14 symbols with dedicated positions for each of a first type synchronization signal and a second type synchronization signal, according to one embodiment. FIG. 3 is a block diagram illustrating a subframe comprising 14 symbols with dedicated positions for each of a first type synchronization signal and a second type synchronization signal, according to one embodiment. FIG. 3 is a block diagram illustrating a subframe comprising 14 symbols with dedicated positions for each of a first type synchronization signal and a second type synchronization signal, according to one embodiment. FIG. 3 is a block diagram illustrating a subframe comprising 14 symbols with dedicated positions for each of a first type synchronization signal and a second type synchronization signal, according to one embodiment. FIG. 3 is a block diagram illustrating a subframe comprising 14 symbols with dedicated positions for each of a first type synchronization signal and a second type synchronization signal, according to one embodiment. FIG. 3 is a block diagram illustrating a subframe comprising 14 symbols with dedicated positions for each of a first type synchronization signal and a second type synchronization signal, according to one embodiment. FIG. 3 is a block diagram illustrating a subframe comprising 14 symbols with dedicated positions for each of a first type synchronization signal and a second type synchronization signal, according to one embodiment. FIG. 3 is a block diagram illustrating a subframe comprising 14 symbols with dedicated positions for each of a first type synchronization signal and a second type synchronization signal, according to one embodiment. FIG. 3 is a block diagram illustrating a subframe comprising 14 symbols with dedicated positions for each of a first type synchronization signal and a second type synchronization signal, according to one embodiment. FIG. 3 is a block diagram illustrating a subframe comprising 14 symbols with dedicated positions for each of a first type synchronization signal and a second type synchronization signal, according to one embodiment. FIG. 3 is a block diagram illustrating a subframe comprising 14 symbols with dedicated positions for each of a first type synchronization signal and a second type synchronization signal, according to one embodiment. FIG. 4 is a block diagram illustrating a first symbol comprising a cyclic prefix and a data portion of a first type synchronization signal and a second symbol comprising a cyclic prefix and a data portion of a second type synchronization signal. FIG. 4 is a block diagram illustrating a first symbol comprising a cyclic prefix and a data portion of a first type synchronization signal and a second symbol comprising a cyclic prefix and a data portion of a second type synchronization signal. 6 is a flowchart illustrating a method in a transmitter according to an embodiment. 2 is a block diagram illustrating a transmitter according to one embodiment. FIG. 6 is a flowchart illustrating a method in a receiver according to one embodiment. 2 is a block diagram illustrating a receiver according to one embodiment. FIG. FIG. 3 is a block diagram illustrating a subframe comprising two synchronization bursts, each comprising two symbols having a synchronization signal, according to the prior art. FIG. 6 is a block diagram illustrating a subframe including 14 symbols having dedicated positions for each of a first type synchronization signal and a second type synchronization signal according to the prior art.

  Embodiments of the invention described herein are defined as transmitters, methods at a transmitter, receivers, and methods at a receiver that may be implemented in those embodiments described below. However, these embodiments may be demonstrated and implemented in many different forms and should not be limited to the examples described herein. Rather, these illustrative examples of embodiments are provided so that this disclosure will be thorough and complete.

  Still other objects and features will become apparent from the following detailed description considered in conjunction with the accompanying drawings. However, the drawings are drawn for illustrative purposes only, and are not drawn to define the scope of the embodiments disclosed herein, for which It should be understood that reference is made to the claims. Further, the drawings are not necessarily to scale and are merely intended to conceptually illustrate the structures and procedures described herein unless otherwise indicated. .

  FIG. 1A is a schematic diagram of a wireless communication network 100 that includes a transmitter 110, a receiver 120, and a wireless network node 130. The transmitter 110 and / or the receiver 120 may be a mobile terminal that may be under the control of the radio network node 130. Thereby, the wireless communication network 100 is connected.

  Transmitter 110 and receiver 120 may be configured for D2D communication, and transmitter 110 may transmit a D2D synchronization signal to receiver 120 for synchronization between devices 110, 120.

  The wireless communication network 100 may be, for example, 3GPP LTE, LTE Advanced, Evolved Universal Terrestrial Radio Access Network (E-UTRAN), Universal Mobile Telecommunications System (UMTS), Global System for Mobile Communications (Group Special's Mobile) (GSM (registered trademark)) / Enhanced Data Rate for GSM (TM) Evolution (GSM (registered trademark) / EDGE), Wideband Code Division Multiplex Connection (WCDMA), time division multiple access (TDMA) network, frequency division multiple access (FDMA) network, orthogonal FDMA (OFDMA) network, single carrier FDMA (S -FDMA), Network, Worldwide Interoperability for Microwave Access (WiMax) or Ultra Mobile Broadband (UMB), High Speed Packet Access (HSPA) Evolved Universal Terrestrial Radio Access (E-UTRA), May be based at least in part on radio access technologies such as Universal Terrestrial Radio Access (UTRA), GSM® EDGE Radio Access Network (GERAN), eg 3GPP2 CDMA technologies such as CDMA2000 1x RTT and High Rate Packet Data (HRPD) . The expressions “wireless communication network”, “wireless communication system”, and / or “cellular telecommunications system” may be used interchangeably within the technical context of this disclosure.

  The wireless communication network 100 may be configured to operate according to the principles of time division duplex (TDD) and / or frequency division duplex (FDD), according to a number of different embodiments.

  TDD is an application of time division multiplexing that in some cases separates uplink and downlink signals with respect to time, with a guard period (GP) placed in the time domain between uplink and downlink signaling. It is. FDD means that the transmitter and receiver operate at different carrier frequencies.

  The exemplary purpose of FIG. 1A is to provide a wireless communication network 100, such as transmitter 110, receiver 120, and wireless network node 130 described herein, as well as included methods and nodes, and included functions. And provide a simplified overall appearance of the example.

  FIG. 1B illustrates an example where the transmitter 110 and the receiver 120 are located outside of any wireless communication network 100, ie, an LTE network. The transmitter 110 transmits a D2D synchronization signal (D2DSS) to be received by the receiver 120 for multiple purposes of synchronization.

  FIG. 1C further illustrates an embodiment of D2D communication in which multi-hop is illustrated. The transmitter 110 transmits the D2DSS to be received by the receiver 120 via another network node 140 located in the middle.

  1A, 1B, and / or 1C, an example of a transmitter 110, an example of a receiver 120, and, optionally, one radio network node 130 or other network node 140, as shown in FIGS. 1A, 1B, and / or Alternatively, it should be noted that the illustrated setting of FIG. 1C should be regarded as merely a non-limiting example of embodiments. The wireless communication network 100 may comprise any other number and / or any other combination of described entities 110, 120, 130, 140. Accordingly, other configurations of multiple transmitters 110, receivers 120, other network nodes 140, and radio network nodes 130 may be included in some of the multiple embodiments disclosed herein. Thus, for example, according to some embodiments, when referring to multihop by another network node 140 herein, the other network node 140 may include a set of multiple other network nodes 140.

  Thus, according to some embodiments, in this context, reference is made to “one” or “a / an” transmitter 110, receiver 120, other network nodes 140, and / or radio network node 130. Whenever doing so, multiple transmitters 110, receivers 120, other network nodes 140, and / or radio network nodes 130 may be included.

  Similarly, transmitter 110, receiver 120, and / or other network node 140 may be configured according to a plurality of different embodiments and terminology, for example, wireless communication terminals, mobile phones, personal digital assistants (PDAs), Wireless platform, mobile station, user equipment, tablet computer, portable communication device, laptop, computer, wireless terminal that functions as a relay device, relay node, mobile relay device, customer premises equipment (CPE), multiple fixed wireless access ( FWA) nodes, or any other type of device configured to communicate wirelessly with each other and possibly also with wireless network node 130 by direct communication.

  Further, according to some embodiments, radio network node 130 and / or other network node 140 may be configured for downlink transmission and uplink reception, eg, the radio access technology and / or used, respectively. Or depending on the terminology, for example, base station, NodeB, multiple evolved Node B (eNB or eNode B), base transceiver base station, access point base station, base station router, radio base station (RBS), micro base station , Pico base station, femto base station, home eNodeB, sensor, beacon device, relay node, repeater, or any other configured for communication with multiple mobile stations within cell coverage via radio interface Network node.

  Some embodiments define a module implementation approach that reuses multiple legacy systems such as multiple criteria, multiple algorithms, multiple implementations, multiple components, and multiple products, for example. Can make it possible.

  Transmitter 110 and receiver 120 may be synchronized by using two distinct types of synchronization signals. Two distinct types of synchronization signals are transmitted in multiple bursts, in multiple symbols, with a predefined intersymbol spacing between those symbols for the two types of synchronization signals in the burst. .

  The symbols described herein may include, for example, orthogonal frequency division multiplexing (OFDM) symbols or single carrier frequency division multiple access (SC-FDMA) symbols in different embodiments.

  The transmitter 110 may transmit two types of synchronization signals. The two types of synchronization signals are pre-between those symbols for the two types of synchronization signals in the burst in multiple bursts, eg, multiple symbols such as OFDM symbols or SC-FDMA symbols. It is transmitted with a specified intersymbol interval.

  Correspondingly, the receiver 120 can detect two types of synchronization signals. The two types of synchronization signals are pre-between those symbols for the two types of synchronization signals in the burst in multiple bursts, eg, multiple symbols such as OFDM symbols or SC-FDMA symbols. It is transmitted with a specified intersymbol interval.

  The receiver 120 may optionally use the repetitive signal characteristics of the first type of synchronization signal if multiple consecutive symbols are used to transmit the first type of synchronization signal.

  Therefore, how to arrange multiple symbol positions of the synchronization signal transmitted in bursts to reduce the complexity of the receiver 120 by enabling efficient coherent detection and avoiding blind detection Is disclosed herein.

  In accordance with one embodiment, transmission of multiple synchronization signals in multiple bursts is disclosed that may include a set of N symbols labeled from l = 0,..., N−1. Some bursts may be transmitted consecutively to each other, but at some point there may be at least N symbols that do not contain any synchronization signals. A burst may be a subframe. Note that the burst may be limited to a subset of symbols in a subframe, excluding the last symbol not used for transmission for D2D communication in LTE, for example.

  Furthermore, it can be assumed that two types of synchronization signals are defined: a first type synchronization signal and a second type synchronization signal.

  These synchronization signals may contain different information, and it can be assumed that both must be successfully detected in order to obtain sufficient synchronization. Further, typically, the first type of synchronization signal must be detected before detection of the second type of synchronization signal.

  As a non-limiting example, a first type of synchronization signal may be generated from one or more length 63 Zadoff-Chu sequences, where the central element is punctured, resulting in a length 62 sequence. Similarly, a second type of synchronization signal may be generated from two interleaved length 31 sequences derived from a set of m-sequences, resulting in a length 62 sequence.

  Thus, according to their assumptions regarding burst transmission, there are at least two symbols including a continuous transmission of the first type of synchronization signal, the at least two symbols being a continuous transmission of the first type of synchronization signal. Has an intersymbol interval different from the intersymbol interval of two other symbols including. Similarly, there are therefore at least two symbols that include a continuous transmission of a second type of synchronization signal, and these at least two symbols are another two that include a continuous transmission of a second type of synchronization signal. It will have an intersymbol spacing that is different from the intersymbol spacing of the two symbols.

において送信される。さらに、第２タイプの同期信号に使用されるＭ_２≧Ｍ_１個のシンボルが存在する。これらの信号は、シンボル

において送信される。１つのシンボルにおいてただ１つの同期信号が送信される、すなわち、

のように、これらのセットの共通部分はない。 Assume that there are M ₁ ≧ 2 symbols used for the first type of synchronization signal. These signals are symbols

Sent in. Furthermore, there are M ₂ ≧ M ₁ symbols used for the second type of synchronization signal. These signals are symbols

Sent in. Only one synchronization signal is transmitted in one symbol, ie

As such, there is no intersection between these sets.

In one embodiment, the number of symbols may be the same for the first type of synchronization signal and the second type of synchronization signal, such as M ₁ = M ₂ .

To avoid blind detection of the second type of synchronization signals, these signals can be transmitted in multiple symbols k _i such that k _i = l _i + Δ, ∀l _i . In the formula, | Δ |> 0.

This means that no matter which symbol l _i the receiver 120 detects the first type of synchronization signal, the receiver 120 can detect the second type of synchronization signal at a well-defined symbol position k _i = l _i + Δ. Imply that is possible. The value may be either predefined or signaled by radio resource control (RRC) signaling to the receiver 120 prior to detection of the synchronization signal, for example. Thus, blind symbol position detection can be avoided. Thus, for each symbol l _i , the symbol distance | k _i −l _i | between the symbol l _i and the associated symbol k _i is equal for all symbols l _i .

といったいくつかの予め規定されたやり方で確立され得る。式中、Δ_１および

は、Δと同様に、予め規定されたオフセットパラメータである。第２タイプの同期信号のための２つより多いシンボルが、第１タイプの同期信号のための１つのシンボルと関連付けられる場合、複数の実施形態において、複数の同様な関係が決定され得る。 In some embodiments, when p> 1 is an integer, if M ₂ = p · M ₁ , multiple symbols for the second type of synchronization signal may be used for the first type of synchronization. It can be generalized to associate with one symbol for the signal. For example, for a two-to-one relationship,

Can be established in several predefined ways. Where Δ ₁ and

Is an offset parameter defined in advance, like Δ. If more than two symbols for the second type of synchronization signal are associated with one symbol for the first type of synchronization signal, multiple similar relationships may be determined in embodiments.

Thus, when M ₁ is 2, M ₂ may be 4 if p is set to ₂ , M ₂ may be 6 and / or M ₁ if p is set to 3. If p is set to ₂ when M is 3, then M ₂ can be 6. These are just some arbitrary examples of some possible implementations.

In some embodiments, the first type of synchronization signal may be transmitted in M ₁ symbols l _i where 0 ≦ i ≦ (M ₁ −1) of the subframe, and the second type of synchronization signal is: It may be transmitted in M ₂ symbols k _j where 0 ≦ j ≦ (M ₂ −1) of the subframe.

The subframe comprises N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2.

Thus, for each symbol l _i , the symbol distance | k _j −l _i | between the symbol l _i and the associated symbol k _j is equal for all symbols l _i . However, the symbol distance | k _j −l _i | is different from another symbol distance | k _{j + 1} −l _i |. Thus, there can be several symbol distances for every symbol l _i . However, the several symbol distances are the same for all symbols l _i .

個のシンボルのシンボル位置は、複数の前の実施形態に従って決定される。その結果、複数の第２タイプの同期信号のための、残りの

個のシンボルだけが、追加のシンボル間間隔を有し得る。 In some embodiments, M ₂ > M ₁ and M ₂ ≠ p · M ₁ . In the formula, p is an integer. In such embodiments, it is defined for a plurality of second type synchronization signals.

The symbol positions of the symbols are determined according to a plurality of previous embodiments. As a result, the remaining for multiple second type synchronization signals

Only symbols may have additional intersymbol spacing.

  In some further embodiments, the first type and second type synchronization signals may be located in close proximity to accommodate coherent detection. This is achieved to avoid maximum separation of symbols for the two types of synchronization signals by arranging their synchronization signals such that | Δ | << N−1. In one embodiment, | Δ | = 1, 2, or 3, if the maximum interval between the primary synchronization signal (PSS) and the secondary synchronization signal (SSS) is 3 symbols, It may be expected to provide sufficient channel estimation performance in system 100 using LTE numerology.

A further embodiment comprises using a plurality of adjacently positioned symbols for the first type of synchronization signal, ie, l _{i + 1} = l _i +1. This can be easily combined with any of the previously described embodiments. It may also be clear that this imposes a number of specific constraints, for example | Δ | ≧ M ₁ . The advantage of using a plurality of adjacently positioned symbols for the first type of synchronization signal is that it can provide better synchronization performance. For example, if the channel does not change significantly between two symbols, improving multiple channel estimates by interpolating across a set of adjacently positioned symbols including a first type of synchronization signal Can be possible.

  Furthermore, it has been shown that if the synchronization signal in a symbol has a repetitive structure, it can be detected by calculating a differential correlation value obtained as an autocorrelation of the received signal. One desirable characteristic of this is that the magnitude of the correlation value is not affected by any frequency offset. This is particularly desirable for D2D communications when operating outside of network coverage as illustrated in FIGS. 1B and / or 1C, where the total frequency offset is due to both transmitter 110 and receiver 120. This can result in a much larger frequency offset than for typical cellular communications. This is because the radio network node 130, or eNodeB, may have multiple frequency oscillators that are much more accurate than the mobile transmitter 110 and mobile receiver 120. Further, the repetitive signal from two adjacent symbols may also allow to calculate a differential correlation value for a plurality of repetitive samples from a plurality of different symbols. Thus, multiple adjacently positioned symbols can provide more robust detection under large frequency offsets.

  Further, if Δ> 0, after a first type of synchronization signal is detected, a second type of synchronization signal is detected in the symbol to finally determine a plurality of synchronization Δ symbols (ie, second type Can be detected).

  If Δ <0 and the receiver 120 buffers multiple samples from multiple preceding symbols, the synchronization is finalized as soon as the first type of synchronization signal is detected (ie, It may be possible to detect a second type of synchronization signal).

With channel fading, it is desirable to perform multiple repeated transmissions of the signal with a time separation that is longer than the channel coherence time. This provides time diversity. Thus, for any of the two synchronization signal types, it may be beneficial to place the symbols as far apart as possible. Further embodiments may comprise using the symbols l _{i + 1} ≧ l _i + N−3. This results in a maximum time separation of the first type of synchronization signal in a subframe where the last symbol cannot be used for transmission. For example, if | Δ | = 1 and similarly k _{i + 1} ≧ k _i + N−3, the time diversity gain can also be obtained for the second type of synchronization signal.

In the following figures, several examples of different embodiments are shown. However, the transmitter 110, the receiver 120, and the method in them are not limited to these examples or the set of indices l ₀ and l ₁ considered. Also, according to some embodiments, the second type of synchronization signal can be detected without requiring blind detection, which saves computing resources at the receiver 120.

FIG. 2A shows an embodiment of a subframe 200 comprising 14 symbols labeled from 0 to 13. In the example shown, there are two symbols (positions 6 and 7) having a first type of synchronization signal and two symbols (positions 8 and 9) having a second type of synchronization signal. Therefore, M ₁ = M ₂ = 2, Δ = 2, and l ₁ = l ₀ +1.

  An advantage of the illustrated embodiment is that it may allow interpolation of multiple channel estimates from two adjacently positioned symbols (positions 6 and 7) having a first type of synchronization signal. That is.

  However, subframe 200 may comprise any arbitrary number N of symbols, such as 10, 11, 12, 13, 15, 16,. The synchronization embodiments described herein are not limited to or dependent on the number of symbols in subframe 200.

FIG. 2B illustrates another embodiment of a subframe 200 comprising 14 symbols labeled from 0 to 13. In the example shown, there are two symbols (positions 6 and 7) having a first type of synchronization signal and two symbols (positions 4 and 5) having a second type of synchronization signal. Therefore, M ₁ = M ₂ = 2, Δ = −2, and l ₁ = l ₀ +1.

  A further advantage of the illustrated embodiment in FIG. 2B is that it also interpolates multiple channel estimates from two adjacently positioned symbols (positions 6 and 7) having a first type of synchronization signal. It can be made possible.

FIG. 2C illustrates another embodiment of a subframe 200 comprising 14 symbols labeled from 0 to 13. In the example shown, there are two symbols (positions 4 and 6) having a first type of synchronization signal and two symbols (positions 5 and 7) having a second type of synchronization signal. Therefore, M ₁ = M ₂ = 2, Δ = 1, and l ₁ = l ₀ +2.

  The advantage of the arrangement of FIG. 2C is that it provides minimal separation between the symbols, ie, one symbol distance interval for the different types of synchronization signals. Furthermore, there is one symbol with a first type of synchronization signal that is positioned adjacent to two symbols with a second type of synchronization signal. It can therefore be used for channel estimation for both of these two symbols.

FIG. 2D illustrates another embodiment of a subframe 200 comprising 14 symbols labeled from 0 to 13. In the example shown, there are two symbols (positions 5 and 7) having a first type of synchronization signal and two symbols (positions 4 and 6) having a second type of synchronization signal. Therefore, M ₁ = M ₂ = 2, Δ = −1, and l ₁ = l ₀ +2.

  The advantage of the arrangement of FIG. 2D is that it provides minimal separation between those symbols, ie, a one symbol distance interval for these different types of synchronization signals. Furthermore, there is one symbol with a first type of synchronization signal that is positioned adjacent to two symbols with a second type of synchronization signal. It can therefore be used for channel estimation for both of these two symbols.

FIG. 2E illustrates yet another embodiment of a subframe 200 comprising 14 symbols labeled from 0 to 13. In the example shown, there are two symbols (positions 4 and 8) having a first type of synchronization signal and two symbols (positions 5 and 9) having a second type of synchronization signal. M ₁ = M ₂ = 2; Δ = 1 and l ₁ = l ₀ +4.

FIG. 2F illustrates yet another embodiment of a subframe 200 comprising 14 symbols labeled from 0 to 13. In the example shown, there are two symbols (positions 5 and 9) having a first type of synchronization signal and two symbols (positions 4 and 8) having a second type of synchronization signal. Therefore, M ₁ = M ₂ = 2, Δ = −1, and l ₁ = l ₀ +4.

  An advantage of the embodiment illustrated in FIGS. 2E and 2F is that it does not require a set of adjacent symbols. Thereby, these embodiments may allow some of the symbols of the subframe 200 to be unavailable and / or for transmission of other channels and / or signals. Considering that it may be occupied, it may be easier to insert multiple symbols for synchronization.

It is also clear that separating two symbol pairs having first and second types of synchronization signals provides time diversity. That is, the influence of channel fading becomes smaller as the symbols having the first type of synchronization signal are positioned farther apart. The same observation is also true for the separation of symbols having the second type of synchronization signal. It can be appreciated that the drawings are merely examples, and that the symbols could be separated further away than those illustrated in FIGS. 2E and 2F. Thus, this form of arrangement (ie, l ₁ ≠ l ₀ ± 1) provides the maximum coherent detection gain (because the first and second types of synchronization signals are located in adjacent symbols, k ₀ = l _{At the} same time, for both types of synchronization signals, it allows time diversity by separating the symbol pairs well apart.

FIG. 2G illustrates yet another embodiment of a subframe 200 comprising 14 symbols labeled from 0 to 13. In the example shown, two symbols (positions 3 and 7) having a first type of synchronization signal and four symbols (positions 4, 5, 8, and 9) having a second type of synchronization signal are present. Exists. Therefore, M ₁ = 2, M ₂ = 4, Δ = 1, Δ ₁ = 2 and l ₁ = l ₀ +3.

FIG. 2H illustrates another embodiment of a subframe 200 comprising 14 symbols labeled from 0 to 13. In the example shown, there are two symbols (positions 5 and 9) with a first type of synchronization signal and four symbols (positions 3, 4, 7, and 8) with a second type of synchronization signal. Exists. Therefore, M ₁ = 2, M ₂ = 4, Δ = −1, Δ ₁ = −2, and l ₁ = l ₀ +3.

  The advantages of the illustrated embodiments in FIGS. 2G and 2H are similar to the embodiments of FIGS. 2E and 2F, but may provide more symbols for the second type of synchronization signal, Therefore, the detection probability is improved.

  A symbol such as an OFDM symbol or an SC-FDMA symbol has a data portion and a cyclic prefix (CP). See FIG. 2I. In a further embodiment, it can be considered that not all N OFDM / SC-FDMA symbols have the same cyclic prefix length. For example, in a prior art LTE system, for a subframe comprising N = 14 OFDM / SC-FDMA symbols, l = 0 and l = 7 symbols are cyclic prefixes of other symbols in subframe 200. Contains a longer cyclic prefix.

  In one embodiment, at least one of the N OFDM / SC-FDMA symbols has a different cyclic prefix length than other OFDM / SC-FDMA symbols. In order to avoid blind decoding of the position of the OFDM / SC-FDMA symbol of the second type synchronization signal, the first type synchronization signal is assigned to a plurality of OFDM / SC-FDMA symbols having the same cyclic prefix length. Disclosed. Furthermore, a plurality of synchronization signals of the second type are also assigned to a plurality of OFDM / SC-FDMA symbols having the same cyclic prefix length. The cyclic prefix length may not be the same as the cyclic prefix length of the plurality of first type synchronization signals. This means that even if the first type and second type synchronization signals are transmitted in multiple OFDM / SC-FDMA symbols with different cyclic prefix lengths, according to the previous embodiments, without blind decoding , Ensure that the position of the OFDM / SC-FDMA symbol can be determined.

By way of example, referring to prior art LTE systems, subframes l = 0 and l = 7 may comprise a first type of synchronization signals, or a second type of synchronization signals, or No synchronization signal can be provided. FIG. 2J shows an example in which all synchronization signals are assigned to a plurality of OFDM / SC-FDMA symbols having the same cyclic prefix length. This is achieved by setting M ₁ = M ₂ = 2, Δ = 3, l ₁ = l ₀ +1, and l ₀ = 5. It is also noted that in the prior art as shown in FIG. 8B, multiple primary sidelink synchronization signal symbols are located at symbols l = 6 and l = 7, ie they have different cyclic prefix lengths. I want.

  FIG. 2K illustrates another example of a subframe 200 in which a plurality of first and second type synchronization signal pairs are each positioned as far apart as possible in the subframe 200. Thereby, multiple benefits associated with maximum time diversity are realized while having maximum coherent detection gain. This is because a plurality of symbols having a plurality of synchronization signals of the first type and a plurality of synchronization signals of the second type are adjacent to each other.

  3A and 3B illustrate the distance d for two different arrangements of synchronization signals.

The condition for avoiding blind detection of the second type synchronization signal is that the distance d, which is the distance between the first moment of the first type synchronization signal and the first moment of the second type synchronization signal, It will be understood that it is constant for all OFDM / SC-FDMA symbols including multiple first type synchronization signals. This makes it possible to clearly determine the position of the second type of synchronization signal even if those different types of synchronization signals are located in a plurality of OFDM / SC-FDMA symbols having different cyclic prefix lengths. It becomes. Thus, if the distance d between the symbols k _i and l _i can be constant for all symbols l _i , k _i = l _i + Δ, ∀l _i . In the formula, | Δ |> 0.

  Thereby, the described methods provide improved synchronization performance for synchronizing the transmitter 110 and the receiver 120 by positioning the multiple synchronization signals close to each other so that coherent detection can be used. Can be prepared. There may also be an improvement by defining a plurality of predefined symbol spacing relationships between the plurality of synchronization signals so that blind detection can be avoided.

  Further, when the plurality of synchronization signals are positioned adjacent to each other, power saving can be improved in the transmitter 110. This is because the power amplifier of the transmitter 110 can be switched off between multiple signal bursts to be transmitted.

  Further, in some non-illustrated embodiments, multiple synchronization signals may be distributed over multiple symbols in subframe 200 in accordance with multiple minor changes in the above-stated specification. Also, the described transmitter 110, receiver 120, and multiple methods may be applied in any system in which two types of synchronization signals are transmitted in multiple bursts.

FIG. 4 shows a first type of synchronization signal in M ₁ symbols l _i where 0 ≦ i ≦ (M ₁ −1) in subframe 200 and 0 ≦ j ≦ (M ₂ − in subframe 200. ₂ is a flow chart illustrating embodiments of a method 400 for use at the transmitter 110 for transmitting a second type of synchronization signal including M ₂ symbols k _j that is 1). Subframe 200 comprises N symbols, where N ≧ M ₂ ≧ M ₁ ≧ 2.

In some embodiments, M ₁ symbols l _i may have equal cyclic prefix lengths and / or M ₂ symbols k _j may have equal cyclic prefix lengths.

In some embodiments, the number of symbols l _i , k _j is the first type and the first number so that M ₁ = M ₂ and a set of integer offset values Δ _j may comprise one offset value. It can be the same for the two types of synchronization signals.

In some embodiments, the number of M ₂ of symbols k _j may exceed the number of M ₁ of symbols l _{i such} that one set of offset values Δ _j is k _j = l _i + Δ _j It may comprise respective and M ₂ symbols k _j, a plurality of discrete integral offset delta _j defining each of the determined symbol distance between the respective associated symbol l _i. Here, Δ _j ε {0, 1,..., N−1}.

  The first type synchronization signal and the second type synchronization signal are device-to-device, D2D, communication only, and the transmitter 110 may include a non-fixed unit such as a mobile station or UE, for example.

  Also, in different embodiments, the first type synchronization signal and / or the second type synchronization signal is either orthogonal frequency division multiplexing (OFDM) or single carrier frequency division multiple access (SC-FDMA). Can be based.

  Further, in some embodiments, the transmitter 110 may be a user equipment (UE) operating within a third generation partnership project long term evolution (3GPP LTE system), and the plurality of first type synchronization signals may be multiple. Primary side link synchronization signals, and the plurality of second type synchronization signals include a plurality of secondary side link synchronization signals.

The method 400 may comprise a number of operations 401-403 to transmit the first and second synchronization signals. However, any, some, or all of the operations 401-403 described may be performed in a slightly different time series than those shown by the enumeration, and may be performed simultaneously, in accordance with a number of different embodiments. Or, in addition, it should be noted that it may be performed in a completely reverse order. Moreover, some operations may be performed in a number of alternative ways in accordance with a number of different embodiments, and some such, but not necessarily all, embodiments Note that it may only be executed within. The method 400 may comprise the following operations.
Action 401

It is determined in which M ₁ symbols l _i of the subframe 200 the first type of synchronization signal is to be transmitted.

In some embodiments, M ₁ symbols l _i are determined to be positioned adjacent in a plurality of subsequent symbols l _i such that l _{i + 1} = l _i +1.

However, in some embodiments, M ₁ symbols l _i may be determined to be positioned apart from each other such that l _{i + 1} ≧ l _i + N−3.
Action 402

M ₂ symbols k _j are placed at one or more determined 401 symbol distances from the associated symbol l _i of subframe 200 according to the calculation of when the second type of synchronization signal is to be transmitted. The Each and M ₂ symbols k _j, the one or more determined symbol distance between the respective associated symbol l _i includes all of M ₁ symbols l _i in sub-frame 200, Equal between their respective associated M ₂ symbols k _j .

The one or more symbol distances between the determined M ₁ symbols l _i and each of the associated M ₂ symbols k _j are determined after the cyclic prefix of the symbols l _i , k _j . A determination 401 may be made from the first time instance.

In some embodiments, the calculation of the one or more determined 401 symbol distances between each of the M ₂ symbols k _j and each associated symbol l _i is 1 It can be based on a set of integer offset values Δ _j and can be made by calculating k _j = l _i + Δ _j , ∀l _i . Here, | Δ _j |> 0, (k _j , l _i ) ε {0, 1,..., N−1}.

In some embodiments, the set of integer offset values Δ _j may comprise | Δ | = 1, 2 and / or 3.
Action 403

The first type of synchronization signal is transmitted in the determined M ₁ symbols l _i of the subframe 200, and the second type of synchronization signal is calculated M ₂ symbols k _{j in the} subframe 200. Sent in.

  In some embodiments, the synchronization signal may be transmitted over multiple hops between the transmitter 110 and the receiver 120 via one or more other intermediate nodes 140.

FIG. 5 shows a synchronization signal of the first type in M ₁ symbols l _i where 0 ≦ i ≦ (M ₁ −1) in subframe 200 and 0 ≦ j ≦ (M ₂ − in subframe 200. 1 illustrates an embodiment of a transmitter 110 configured to transmit a second type of synchronization signal in M ₂ symbols k _j which is 1). Subframe 200 comprises N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2.

  Further, the illustrated transmitter 110 is configured to perform the method 400 in accordance with any, some, or all of the operations 401-403 previously described.

  The first type synchronization signal and the second type synchronization signal may be dedicated to device-to-device (D2D) communication, and the transmitter 110 may include non-fixed units.

  Further, the transmitter 110 may include user equipment (UE) operating within a third generation partnership project long term evolution (3GPP LTE) system, wherein the first type of synchronization signals are a plurality of primary side link synchronization signals. And the second type of synchronization signals include a plurality of secondary side link synchronization signals.

  In addition, the first type of synchronization signal and / or the second type of synchronization signal may be based on either orthogonal frequency division multiplexing (OFDM) or single carrier frequency division multiple access (SC-FDMA).

  For the sake of clarity, all internal electronic devices or other components of transmitter 110 are omitted from FIG. 5, which are not completely essential to understanding the embodiments described herein. Yes.

The transmitter 110 is configured to determine in which symbol l _i of the subframe 200 the first type of synchronization signal is to be transmitted, in addition to each of the M ₂ symbols k _j as an associated symbol. a processor 520 configured to calculate in which symbol k _j of the subframe 200 a second type of synchronization signal is to be transmitted by placing at one or more determined symbol distances from l _i . The one or more determined symbol distances between each of M ₂ symbols k _j and each associated symbol l _i are equal for all M ₁ symbols l _{i in} subframe 200. .

In some embodiments, the one or more symbol distances between the determined M ₁ symbols l _i and each of the associated M ₂ symbols k _j are the symbols l _i , k _j It can be determined from the first time instance after the cyclic prefix.

The processor 520 calculates each of the M ₂ symbols k _j by calculating k _j = l _i + Δ _j , ∀l _i based on a set of integer offset values Δ _j known to receiver 120. It may be further configured to calculate one or more determined symbol distances between associated symbols l _i . Here, | Δ _j |> 0, (k _j , l _i ) ε {0, 1,..., N−1}.

Further, the processor 520 may be further configured to establish a set of offset values Δ _j such that | Δ | = 1, 2, and / or 3.

Further, according to some embodiments, the processor _520, so that the _l i + 1 _{= l} i +1, further to determine the position adjacent the _{M 1} symbols _{l i} into a plurality of subsequent symbols _{l i} Can be configured.

Further, in some embodiments, the processor 520 may be further configured to determine to position M ₁ symbols l _i apart from each other such that l _{i + 1} ≧ l _i + N−3.

According to some embodiments, M ₁ symbols l _i may have equal cyclic prefix lengths and / or M ₂ symbols k _j may have equal cyclic prefix lengths.

Furthermore, the number of symbols l _i , k _j is the same for the first and second type synchronization signals so that M ₁ = M ₂ and one set of integer offset values Δ _j comprises one offset value. is there.

In some embodiments, the number of M ₂ for symbol k _j may exceed the number of M ₁ for symbol l _{i such} that one set of offset values Δ _j is k _j = l _i + Δ _j. It may comprise respective and M ₂ symbols k _j, a plurality of discrete integral offset delta _j defining each of the determined symbol distance between the respective associated symbol l _i. Here, Δj∈ {0, 1,..., N−1}.

  Such a processor 520 may include one or more instances of processing circuitry, i.e., a central processing unit (CPU), processing unit, processing circuit, processor, application specific integrated circuit (ASIC), microprocessor, or a plurality of And other processing logic that can interpret and execute the instructions. Thus, the expression “processor” as used herein may represent a processing circuit that includes a plurality of processing circuits, such as any, some, or all of the plurality listed above.

The transmitter 110 also transmits a plurality of synchronization signals of the first type in the determined M ₁ symbols l _i of the subframe 200, and the _second in the calculated M ₂ symbols k _j of the subframe 200. A transmission circuit 530 may be provided that is configured to transmit a plurality of types of synchronization signals.

  In addition, according to some embodiments, the transmitter 110 may also receive multiple signals, eg, multiple synchronization signals, from other network nodes 120, 130, 140 via a wireless interface. A configured receiving circuit 510 may be provided.

  Further, according to some embodiments, the transmitter 110 may further comprise at least one memory 525. Optional memory 525 may include physical devices that are used to store data or programs, ie sequences of instructions, temporarily or permanently. According to some embodiments, the memory 525 may include a plurality of integrated circuits including a plurality of silicon-based transistors. Further, the memory 525 can be volatile or non-volatile.

  Some or all of the above-described operations 401-403 to be performed at the transmitter 110, together with a computer program product to perform at least some of the functions of operations 401-403, May be implemented by multiple processors 520. Accordingly, the computer program including the program code may be any of the functions 401-403 for transmitting a plurality of synchronization signals when the computer program is loaded into the processor 520 of the transmitter 110, at least some, or The method 400 may be performed according to all.

Further, the computer program product includes a first type of synchronization signal in M ₁ symbols l _i that is 0 ≦ i ≦ (M ₁ −1) of the subframe 200 and 0 ≦ j ≦ (M in order to transmit the second type of synchronization signal comprises ₂ -1) is M ₂ symbols k _j, may comprise a computer-readable storage medium storing for use by a transmitter 110, a program code. Subframe 200 comprises N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2. The program code determines 401 in which M ₁ symbols l _i of the subframe (200) the first type of synchronization signal is to be transmitted, and M ₂ symbols k _j , the associated symbols a 1 or more determined symbol distance from l _i, and all of M ₁ symbols l _i in sub-frame 200, between their respective associated M ₂ symbols k _j equal, respectively and M ₂ symbols k _j, 1 or more determined symbol distance, by placing, in the sub-frame 200 throat M ₂ symbols between the respective associated symbol l _i calculating 402 whether a second type of synchronization signal is to be transmitted at k _j , and at the determined M ₁ symbols l _i of subframe 200 Transmitting 403 a type of synchronization signal and a second type of synchronization signal 403 in the calculated M ₂ symbols k _j of subframe 200, and a plurality of instructions for performing method 400 comprising: Prepare.

  When loaded into processor 520, the computer program product described above is provided in the form of a data carrier carrying computer program code for performing at least some of operations 401-403, for example, according to some embodiments. Can be done. The data carrier is, for example, a hard disk, a CD ROM disk, a memory stick, an optical storage device, a magnetic storage device, or any other suitable medium such as a disk or tape that can hold non-transitory machine-readable data. obtain. The computer program product is further provided as computer program code on a server and can be downloaded remotely to the transmitter 110 via, for example, the Internet or an intranet connection.

FIG. 6 shows a first type of synchronization signal in M ₁ symbols l _i where 0 ≦ i ≦ (M ₁ −1) in subframe 200 and M ₂ symbols received in subframe 200. 6 is a flowchart illustrating an embodiment of a method 600 for use at the receiver 120 to detect a second type of synchronization signal at k _j . The subframe 200 includes N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2.

In some embodiments, M ₁ symbols l _i may have equal cyclic prefix lengths and / or M ₂ symbols k _j may have equal cyclic prefix lengths.

In some embodiments, the number of symbols l _i , k _j is M ₁ = M ₂ and a set of integer offset values Δ _j may comprise one offset value, It can be the same for the two types of synchronization signals.

In some embodiments, the number of M ₂ for symbol k _j may exceed the number of M ₁ for symbol l _{i such} that one set of offset values Δ _j is k _j = l _i + Δ _j. It may comprise respective and M ₂ symbols k _j, a plurality of discrete integral offset delta _j defining each of the determined symbol distance between the respective associated symbol l _i. Here, Δ _j ε {0, 1,..., N−1}.

  The first type synchronization signal and the second type synchronization signal may be device-to-device, D2D, communication only, and the receiver 120 may include a non-fixed unit such as, for example, a mobile station or a UE.

  Also, in different embodiments, the first type synchronization signal and / or the second type synchronization signal is either orthogonal frequency division multiplexing (OFDM) or single carrier frequency division multiple access (SC-FDMA). Based on

  Further, in some embodiments, the receiver 120 may be a user equipment (UE) operating within a third generation partnership project long term evolution (3GPP LTE system), and the plurality of first type synchronization signals may be multiple. Primary side link synchronization signals, and the plurality of second type synchronization signals include a plurality of secondary side link synchronization signals.

To receive the first and second synchronization signals, method 600 may comprise a number of operations 601-604. However, any, some, or all of the described operations 601-604 may be performed in a slightly different time series than those shown by the enumeration, may be performed simultaneously, according to a plurality of different embodiments, Or, in addition, it should be noted that it may be performed in a completely reverse order. Moreover, some operations may be performed in a number of alternative ways in accordance with a number of different embodiments, and some such, but not necessarily all, embodiments Note that it may only be executed within. Method 600 may comprise the following operations.
Action 601

It is determined in which M ₁ symbols l _i of the subframe 200 a first type of synchronization signal is to be received.

In some embodiments, M ₁ symbols l _i are determined to be positioned adjacent in a plurality of subsequent symbols l _i such that l _{i + 1} = l _i +1.

However, in some embodiments, M ₁ symbols l _i may be determined to be positioned apart from each other such that l _{i + 1} ≧ l _i + N−3.
Action 602

Equal for all M ₁ symbols l _i in sub-frame 200, respectively and M ₂ symbols k _j, 1 or more determined symbol distance established between the respective associated symbol l _i Is done.

The one or more symbol distances between the determined M ₁ symbols l _i and each of the associated M ₂ symbols k _j are the first after the cyclic prefix of the symbols l _i , k _j . A decision 601 can be made from the one hour instance.
Action 603

Further, it is calculated in which M ₂ symbols k _j of the subframe 200 the second type of synchronization signal is to be received.

In some embodiments, the calculation may be based on a set of integer offset values Δ _j known to the receiver 120 and may be made by calculating k _j = l _i + Δ _j , ∀l _i . Here, | Δ _j |> 0, (k _j , l _i ) ε {0, 1,..., N−1}.

In some embodiments, the set of integer offset values Δ _j may comprise | Δ | = 1, 2 and / or 3.
Action 604

The second type M ₂ synchronization signals are detected in the calculated M ₂ symbols k _j of subframe 200.

7, _{M 2} in the _{0 ≦ i ≦ (M 1 -1} ) in which _{M 1} symbols _{l i} of the sub-frame 200, the sync signal received is _{0 ≦ j ≦ (M 2 -1} ) Fig. 4 illustrates an embodiment of a receiver 120 configured to detect a second type of synchronization signal at a number of symbols _kj . Those signals are received in subframe 200 comprising N symbols, where N ≧ M ₂ ≧ M ₁ ≧ 2.

  The receiver 120 is configured to perform the method 600 described above in accordance with at least some operations 601-604.

  The first type synchronization signal and the second type synchronization signal may be device-to-device, D2D, communication only, and the receiver 120 may include a non-fixed unit such as, for example, a mobile station or a UE.

  Also, in different embodiments, the first type synchronization signal and / or the second type synchronization signal is either orthogonal frequency division multiplexing (OFDM) or single carrier frequency division multiple access (SC-FDMA). Based on

  Further, in some embodiments, the receiver 120 may be a user equipment (UE) operating within a third generation partnership project long term evolution (3GPP LTE system), and the plurality of first type synchronization signals may be multiple. Primary side link synchronization signals, and the plurality of second type synchronization signals include a plurality of secondary side link synchronization signals.

  For the sake of clarity, all internal electronic devices or other components of the receiver 120 that are not completely essential to understanding the embodiments described herein have been omitted from FIG. Yes.

The receiver 120 includes a receiving circuit 710 configured to receive a signal such as a synchronization signal from the transmitter 110, for example. The received signal, i.e. the synchronization signal, may be of the first type in M ₁ symbols l _i of subframe 200.

  However, the receiving circuit 710 may be configured to receive various types of wireless signals over a wireless interface from multiple transmitting entities such as other network nodes 140 or wireless network nodes 130.

In addition, the receiver 120 is configured to establish one or more determined symbol distances between the symbol k _j and the associated symbol l _i , in addition to which M ₂ symbols of the subframe 200 A processor 720 is configured to calculate whether a second type of synchronization signal is to be detected at k _j . One or more determined symbol distances between each of the M ₂ symbols k _j and each associated symbol l _i are equal for all M ₁ symbols l _{i in} subframe 200.

The processor 720 also calculates each of the M ₂ symbols k _j and each associated symbol l _i by calculating k _j = l _i + Δ _j , ∀l _i based on a set of offset values Δ _j. May be configured to calculate one or more determined symbol distances between. Here, | Δ |> 0, (k _j , l _i ) ε {0, 1,..., N−1}.

  Such a processor 720 may include one or more instances of processing circuitry, namely a central processing unit (CPU), processing unit, processing circuit, processor, application specific integrated circuit (ASIC), microprocessor, or a plurality of And other processing logic that can interpret and execute the instructions. Thus, the expression “processor” as used herein may represent a processing circuit that includes a plurality of processing circuits, such as any, some, or all of the plurality listed above.

  Further, in some embodiments, the receiver 120 may also include a transmission circuit 730 configured to transmit a wireless signal including, for example, a synchronization signal.

  Further, according to some embodiments, the receiver 120 may further comprise at least one memory 725. Optional memory 725 may include physical devices that are used to store data or programs, ie sequences of instructions, either temporarily or permanently. According to some embodiments, memory 725 may include a plurality of integrated circuits that include a plurality of silicon-based transistors. Further, the memory 725 can be volatile or non-volatile.

  The terminology used in the description of the embodiments illustrated in the accompanying drawings is not intended to be limited to the methods 400, 600, transmitter 110, and / or receiver 120 described. . Various changes, substitutions and / or modifications may be made without departing from the invention as defined by the appended claims.

As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. In addition, the singular forms “a”, “an”, and “the” should be interpreted as “at least one”. Thus, unless expressly stated otherwise, it may include a plurality of same type entities. In addition, the terms “includes”, “comprises”, “including”, and / or “comprising” may include a plurality of described features, operations, integers, stages, operations, Identify the presence of an element and / or component, but exclude the presence or addition of one or more other features, actions, integers, steps, operations, elements, components, and / or groups thereof It will be understood that the term “or” as used herein is to be interpreted as a mathematical OR, ie, a compatible disjunction, and Should not be construed as a mathematical exclusive OR (XOR) unless specifically stated otherwise, eg A single unit, such as a processor, may perform the functions of several items recited in the claims because these specific means are recited in mutually different dependent claims. It does not indicate that a combination of these means cannot be used to gain advantage: a computer program such as an optical storage medium or solid medium supplied with or as part of other hardware Although stored / distributed on suitable media, the computer program may also be distributed in other forms, such as over the Internet, or other wired or wireless communication systems.
[Item 1]
0 ≦ i ≦ _(M 1 -1) in which _{M 1} symbols _{l i} of the sub-frame _(200), the first type of synchronization signals in, and, 0 ≦ j ≦ of the sub-frame (200) (M a ₂ -1) is a _{M 2} amino configured transmitter to transmit the second type of synchronization signal at the symbol _{k j} (110),
It is configured to determine in which symbol l _i of the subframe (200) the synchronization signal of the first type is to be transmitted, in addition each of the M ₂ symbols k _j is associated with a 1 or more determined symbol distance from the symbol l _i, equal for all the M ₁ symbols l _i in the sub-frame (200), respectively of said M ₂ symbols k _j, The synchronization signal of the second type is transmitted in which symbol k _j of the subframe (200) by placing it at one or more determined symbol distances between each associated symbol l _i A processor (520) configured to calculate a power;
The plurality of synchronization signals of the first type are transmitted in the determined M ₁ symbols l _i of the subframe (200), and the calculated M ₂ symbols k of the subframe (200). _a transmission circuit (530) configured to transmit a plurality of the second type synchronization signals at _j ,
The subframe (200) comprises N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2,
Transmitter (110).
[Item 2]
The one or more symbol distances between the determined M ₁ symbol l _i and each of the associated M ₂ symbols k _j is the cyclic prefix of the symbols l _i , k _j. Item 1. The transmitter (110) of item 1 determined from the first time instance after.
[Item 3]
The processor (520) is based on a set of integer offset values Δ _j known to the receiver (120),
k _j = l _i + Δ _j , ∀l _i
Is configured to calculate the one or more determined symbol distances between each of the M ₂ symbols k _j and each of the associated symbols l _i ,
Where | Δ _j |> 0, (k _j , l _i ) ∈ {0, 1,..., N−1}.
Item 3. The transmitter (110) according to item 1 or 2.
[Item 4]
The processor (520)
| Δ | = 1, 2 and / or 3
Is configured to establish the set of offset values Δ _j such that
The transmitter (110) according to item 3.
[Item 5]
The M ₁ symbols l _i are determined to be positioned adjacent to a plurality of subsequent symbols l _i such that l _{i + 1} = l _i +1.
Item 5. The transmitter (110) according to any one of items 1 to 4.
[Item 6]
The M ₁ symbols l _i are determined to be positioned apart from each other such that l _{i + 1} ≧ l _i + N−3,
Item 5. The transmitter (110) according to any one of items 1 to 4.
[Item 7]
The M ₁ symbols l _i have equal cyclic prefix lengths and / or the M ₂ symbols k _j have equal cyclic prefix lengths;
The transmitter (110) according to any one of items 1 to 6.
[Item 8]
The number of symbols l _i , k _j is the same for the first type synchronization signal and the second type synchronization signal such that M ₁ = M ₂ , and the one set of integer offset values Δ _j is With one offset value,
The transmitter (110) according to any one of items 1 to 7.
[Item 9]
The number of M ₂ of the symbol k _j exceeds the number of M ₁ of the symbol l _i , and the set of offset values Δ _j is
k _j = l _i + Δ _j
A plurality of distinct integer offset values Δ _j defining the respective determined symbol distances between each of the M ₂ symbols k _{j and} the respective associated symbol l _i. Prepared,
Where Δ _j ∈ {0,1, ..., N−1}.
The transmitter (110) according to any one of items 1 to 7.
[Item 10]
The first type synchronization signal and the second type synchronization signal are device-to-device, D2D, and communication-only, and the transmitter (110) includes a non-fixed unit. The transmitter (110) of claim 1.
[Item 11]
The transmitter (110) is a third generation partnership project Long Term Evolution, 3GPP LTE system, user equipment, UE operating in the first type, the plurality of synchronization signals of the first type are a plurality of primary sides Including a link synchronization signal, the plurality of synchronization signals of the second type including a plurality of secondary side link synchronization signals,
The transmitter (110) of any one of items 1 to 10.
[Item 12]
The first type synchronization signal and / or the second type synchronization signal is based on either orthogonal frequency division multiplexing, OFDM, or single carrier frequency division multiple access, SC-FDMA,
The transmitter (110) according to any one of items 1 to 11.
[Item 13]
The first type synchronization signal in M ₁ symbols l _i, where 0 ≦ i ≦ (M ₁ −1) in the subframe (200), and 0 ≦ j ≦ (M in the subframe (200) a method (400) in ₂ -1) is a _{M 2} symbols _{k j} transmitter for transmitting the second type of synchronization signal comprising (110),
Determining (401) in which M ₁ symbols l _i of the subframe (200) the synchronization signal of the first type is to be transmitted;
The M ₂ symbols k _j, a 1 or a plurality of determined symbols distance from the associated symbol l _i, and all of the M ₁ symbols l _i in the sub-frame (200), One or more determined between each of the M ₂ symbols k _{j and} the respective associated symbol l _i , which is equal between their respective related M ₂ symbols k _j Calculating (402) in which M ₂ symbols k _j of the subframe (200) the second type of the synchronization signal is to be transmitted by placing them at a symbol distance;
The synchronization signal of the first type in the determined M ₁ symbols l _i of the subframe (200) and the calculated M ₂ symbols k _j of the subframe (200). Transmitting the second type of synchronization signal (403),
The subframe (200) comprises N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2,
Method (400).
[Item 14]
In M ₁ symbols l _i, where 0 ≦ i ≦ (M ₁ −1) in the subframe (200), the received first type synchronization signal and N ≧ M ₂ ≧ M ₁ ≧ 2 Is configured to detect a second type synchronization signal in M ₂ symbols k _j , where 0 ≦ j ≦ (M ₂ −1), received in a subframe (200) comprising N symbols. Receiver (120),
A receiving circuit (710) configured to receive the synchronization signal of the first type in the M ₁ symbols l _i of the subframe (200);
Configured to establish one or more determined symbol distances between the symbol k _j and the associated symbol l _i , in addition, in any M ₂ symbols k _j of the subframe (200) A processor (720) configured to calculate whether two types of said synchronization signals are to be detected, each of said M ₂ symbols k _j and each of said associated symbols l _i The one or more determined symbol distances between are equal for all of the M ₁ symbols l _{i in} the subframe (200),
Receiver (120).
[Item 15]
The processor (720) is based on a set of offset values Δ _j ,
k _j = l _i + Δ _j , ∀l _i
Is configured to calculate the one or more determined symbol distances between each of the M ₂ symbols k _j and each of the associated symbols l _i ,
Where | Δ |> 0, (k _j , l _i ) ∈ {0, 1,..., N−1}.
Item 15. The receiver (120) according to item 14.
[Item 16]
The first type synchronization signal in M ₁ symbols l _i, where 0 ≦ i ≦ (M ₁ −1) of the subframe (200), and M ₂ received in the subframe (200) A method (600) at the receiver (120) for detecting a second type of synchronization signal at a symbol k _j of:
Determining (601) in which M ₁ symbols l _i of the sub-frame (200) the synchronization signal of the first type is received;
One or more decisions between each of the M ₂ symbols k _{j and} the respective associated symbol l _i that are equal for all of the M ₁ symbols l _{i in} the subframe (200). Establishing a determined symbol distance (602);
Calculating (603) in which M ₂ symbols k _j of the subframe (200) the synchronization signal of the second type is to be received;
Detecting (604) the second type of the M ₂ synchronization signals in the calculated (603) M ₂ symbols k _j of the subframe (200),
The subframe (200) comprises N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2. Method (600).

Claims (24)

The first type of synchronization signal is represented in M ₁ symbols l _i where 0 ≦ i ≦ (M ₁ −1) in the subframe, and M in which 0 ≦ j ≦ (M ₂ −1) in the subframe. a in _two symbols k _j transmitter for transmitting second type of synchronization signal,
Determining in which M ₁ symbols l _i of the subframe the synchronization signal of the first type is to be transmitted, and in addition in which M ₂ symbols k _j of the subframe the second A processor for determining whether a synchronization signal of the type is to be transmitted, wherein each of the M ₂ symbols k _j is arranged at one or more symbol distances from an associated symbol l _i , _The one or more symbol distances between each of the two symbols k _j and the respective associated symbol l _i are equal for all of the M ₁ symbols l _{i in} the subframe; ,
Transmitting the plurality of synchronization signals of the first type in the determined M ₁ symbols l _i of the subframe, and the second type in the determined M ₂ symbols k _j of the subframe. A plurality of transmission circuits for transmitting the synchronization signal,
The subframe comprises N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2,
The M ₁ symbols l _i are determined to be positioned adjacent to a plurality of subsequent symbols l _i such that l _{i + 1} = l _i +1.
Transmitter. The one or more symbol distances between the determined M ₁ symbols l _i and each of the associated M ₂ symbols k _j is the cyclic prefix of the symbols l _i , k _j. The transmitter of claim 1, determined from a later first time instance. The one or more symbol distances between each of the M ₂ symbols k _{j and} the respective associated symbol l _i is based on a set of integer offset values Δ _j known to the receiver,
k _j = l _i + Δ _j , ∀l _i
Determined to be
Where | Δ _j |> 0, (k _j , l _i ) ∈ {0, 1,..., N−1}.
The transmitter according to claim 1 or 2. The processor is
| Δ | = 1, 2, or 3
Establishing the set of integer offset values Δ _{j such} that
The transmitter according to claim 3. The M ₁ symbols l _i have equal cyclic prefix lengths, or the M ₂ symbols k _j have equal cyclic prefix lengths, or the M ₁ symbols l _i are equal cyclic Having a prefix length, and the M ₂ symbols k _j have equal cyclic prefix lengths;
The transmitter according to any one of claims 1 to 4. The number of symbols l _i , k _j is the same for the first type synchronization signal and the second type synchronization signal such that M ₁ = M _2, and the set of integer offset values Δ _j is With one offset value,
The transmitter according to any one of claims 3 to 5. The number of M _{2 in} symbol k _j exceeds the number of M _{1 in} symbol l _i , and one set of offset values Δ _j is
k _j = l _i + Δ _j
A plurality of distinct integer offset values Δ _j defining respective symbol distances between each of the M ₂ symbols k _{j and} the respective associated symbol l _i ,
Where Δ _j ∈ {0,1, ..., N−1}.
The transmitter according to any one of claims 1 to 6. The first type synchronization signal and the second type synchronization signal are device-to-device, D2D, and communication-only, and the transmitter includes a non-fixed unit. Transmitter as described in. The transmitter is a 3rd Generation Partnership Project Long Term Evolution, 3GPP LTE system, user equipment operating in the UE, UE, and the plurality of synchronization signals of the first type are a plurality of primary side link synchronization signals The plurality of synchronization signals of the second type include a plurality of secondary side link synchronization signals,
The transmitter according to any one of claims 1 to 8. At least one of the first type synchronization signal and the second type synchronization signal is based on either orthogonal frequency division multiplexing, OFDM, or single carrier frequency division multiple access, SC-FDMA,
The transmitter according to any one of claims 1 to 9. A first type synchronization signal in M ₁ symbols l _i where 0 ≦ i ≦ (M ₁ −1) in a subframe, and M in which 0 ≦ j ≦ (M ₂ −1) in the subframe. a method in a transmitter for transmitting the second type of synchronization signal comprises _two symbols k _j,
Determining in which M ₁ symbols l _i of the subframe the synchronization signal of the first type is to be transmitted;
Determining in which M ₂ symbols k _j of the subframe the second type of the synchronization signal is to be transmitted, each of the M ₂ symbols k _j being an associated symbol one or more symbol distances from l _i, and the one or more symbol distances between each of the M ₂ symbols k _j and the respective associated symbol l _i are defined in the subframe Determining between all of said M ₁ symbols l _i and their respective associated M ₂ symbols k _j ;
The synchronization signal of the first type in the determined M ₁ symbols l _i of the subframe and the synchronization of the second type in the determined M ₂ symbols k _j of the subframe. Transmitting a signal, and
The subframe comprises N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2,
The M ₁ symbols l _i are determined to be positioned adjacent to a plurality of subsequent symbols l _i such that l _{i + 1} = l _i +1.
Method. The one or more symbol distances between the determined M ₁ symbols l _i and each of the associated M ₂ symbols k _j are after the cyclic prefix of the symbols l _i , k _j. The method of claim 11, determined from a first time instance of. The M ₁ symbols l _i have equal cyclic prefix lengths, or the M ₂ symbols k _j have equal cyclic prefix lengths, or the M ₁ symbols l _i are equal cyclic Having a prefix length, and the M ₂ symbols k _j have equal cyclic prefix lengths;
The method according to claim 11 or 12. The number of symbols l _i , k _j is the same for the first and second type synchronization signals such that M ₁ = M _2, and one set of integer offset values Δ _j comprises one offset value,
14. A method according to any one of claims 11 to 13. In M ₁ symbols l _i where 0 ≦ i ≦ (M ₁ −1) in the subframe, the received first type synchronization signal and N N ≧ M ₂ ≧ M ₁ ≧ 2 A receiver that detects a second type of synchronization signal in M ₂ symbols k _j , where 0 ≦ j ≦ (M ₂ −1), received in the subframe comprising the following symbols:
Determining which M ₁ symbols l _i of the subframe the first type of the synchronization signal is received and in which M ₂ symbols k _j of the subframe the second type of the synchronization A processor for determining whether a signal is to be detected, wherein one or more symbol distances are established between each of said M ₂ symbols k _j and the associated symbol l _i , said M ₂ The processor comprises a processor in which the one or more symbol distances between each of the symbols k _j and each associated symbol l _i are equal for all of the M ₁ symbols l _{i in} the subframe. ,
The M ₁ symbols l _i are determined to be positioned adjacent to a plurality of subsequent symbols l _i such that l _{i + 1} = l _i +1.
Receiving machine. The one or more symbol distances between the determined M ₁ symbols l _i and each of the associated M ₂ symbols k _j is the cyclic prefix of the symbols l _i , k _j. Determined from a later first time instance,
The receiver according to claim 15. The M ₁ symbols l _i have equal cyclic prefix lengths, or the M ₂ symbols k _j have equal cyclic prefix lengths, or the M ₁ symbols l _i are equal cyclic Having a prefix length, and the M ₂ symbols k _j have equal cyclic prefix lengths;
The receiver according to claim 15 or 16. The number of symbols l _i , k _j is the same for the first type synchronization signal and the second type synchronization signal such that M ₁ = M _2, and one set of integer offset values Δ _j is With one offset value,
The receiver according to any one of claims 15 to 17. A first type of synchronization signal in M ₁ symbols l _i where 0 ≦ i ≦ (M ₁ −1) of the subframe and a second type in M ₂ symbols k _j received in the subframe. A method in a receiver for detecting a synchronization signal of
Determining in which M ₁ symbols l _i of the sub-frame the synchronization signal of the first type is received;
Determining in which M ₂ symbols k _j of the subframe the second type of the synchronization signal is to be received, wherein one or more symbol distances is the M ₂ symbols k _j and each associated symbol l _i, and the one or more symbol distances between each of the M ₂ symbols k _j and each associated symbol l _i is Determining equal for all said M ₁ symbols l _{i in} a subframe;
And a step of detecting the M ₂ pieces of the synchronizing signal of the second type in said determined M ₂ symbols k _j of the sub-frame,
The subframe comprises N symbols where N ≧ M ₂ ≧ M ₁ ≧ 2,
The M ₁ symbols l _i are determined to be positioned adjacent to a plurality of subsequent symbols l _i such that l _{i + 1} = l _i +1.
Method. The one or more symbol distances between the determined M ₁ symbols l _i and each of the associated M ₂ symbols k _j are after the cyclic prefix of the symbols l _i , k _j. Determined from the first time instance of
The method of claim 19. The M ₁ symbols l _i have equal cyclic prefix lengths, or the M ₂ symbols k _j have equal cyclic prefix lengths, or the M ₁ symbols l _i are equal cyclic Having a prefix length, and the M ₂ symbols k _j have equal cyclic prefix lengths;
21. A method according to claim 19 or 20. The number of symbols l _i , k _j is the same for the first type synchronization signal and the second type synchronization signal such that M ₁ = M _2, and one set of integer offset values Δ _j is With one offset value,
The method according to any one of claims 19 to 21.   A computer program in a transmitter, comprising a program code for executing the method according to any one of claims 11 to 14 when executed in a computer.   23. A computer program in a receiver, comprising a program code for executing the method according to any one of claims 19 to 22 when executed on a computer.

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