JP2018070415A - Method for manufacturing GaN wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a GaN wafer, capable of reducing a period of time of a GaN bulk crystal growth process.SOLUTION: A method for manufacturing a GaN wafer comprises: (i) a first step of preparing a GaN seed 10 having a main seed surface; (ii) a second step of epitaxially growing a GaN bulk crystal 20 on the main seed surface of the GaN seed 10 to obtain a GaN crystal composite 30 including the GaN seed 10 and a GaN bulk crystal 20; and (iii) a third step of machining the GaN crystal composite 30 to obtain N(≥2) GaN wafers 50 having the same size and plane orientation. In the third step, when forming slice pieces 40 along a plurality of slice schedule surfaces 2 to extract a GaN wafer 50 one by one from each slice piece 40, a required growth thickness of the GaN bulk crystal 20 in the second step S2 can be reduced by shifting GaN wafer extracting positions 4 to each other along the inclination direction 3 of the slice schedule surface 2.SELECTED DRAWING: Figure 4

Description

  The present invention mainly relates to a method for manufacturing a GaN (gallium nitride) wafer.

A GaN wafer (also referred to as a GaN single crystal substrate), which is a wafer composed only of GaN crystals, has attracted attention as a substrate for a nitride semiconductor device.
Nitride semiconductors are also called nitride-based III-V compound semiconductors, III-nitride compound semiconductors, GaN-based semiconductors, etc. In addition to GaN, a part or all of Ga in GaN may be other periodic tables. Including compounds substituted with group 13 elements (B, Al, In). For example, AlN, InN, AlGaN, AlInN, GaInN, AlGaInN, and the like.

A GaN wafer can be manufactured by growing a GaN bulk crystal on a seed composed of a plurality of GaN single crystal pieces, and subjecting the GaN bulk crystal to processing such as slicing, grinding, and polishing (Patent Document 1). .
A method for producing a GaN wafer, comprising: growing a GaN bulk crystal using a nonpolar or semipolar GaN substrate as a seed; and slicing the GaN bulk crystal along a predetermined slicing plane inclined with respect to a main surface of the seed. Known (Patent Document 2).

JP 2008-143772 A JP 2011-16676 A

One of the processes that takes the longest time in the manufacture of a GaN wafer is a process of growing a GaN bulk crystal. However, it is not easy to grow a high-quality GaN crystal at a high rate. Therefore, the present inventor has considered that it is useful for reducing the cost of the GaN wafer if the time of the process can be shortened by means other than improvement of the growth rate of the GaN crystal.
The main object of the present invention is to provide a novel method for producing a GaN wafer that can contribute to shortening the time required for growing a GaN bulk crystal.

Embodiments of the present invention include the following GaN wafer manufacturing method.
(1) (i) a first step of preparing a GaN seed having a main seed surface; and (ii) epitaxially growing a GaN bulk crystal on the main seed surface of the GaN seed to thereby form the GaN seed and the GaN bulk crystal. And (iii) processing the GaN crystal composite to produce N GaN wafers (where N is an integer of 2 or more) having the same size and plane orientation. Obtaining a third step; slicing the GaN bulk crystal along N + 1 or more parallel slicing planes parallel to each other inclined at an inclination angle of 30 ° or less with respect to the main seed surface. Including: removing the GaN wafer in the GaN crystal composite so that the required growth thickness of the GaN bulk crystal in the second step can be reduced. GaN wafer manufacturing method is characterized in that mutually offset along the inclination direction of the scan scheduled surface.
(2) When the growth thickness of the GaN bulk crystal in the second step is t, the size of the GaN wafer in the tilt direction is L _S , the tilt angle is θ, and the pitch between the sliced planes is p, The manufacturing method according to (1), wherein any one of the following mathematical formulas 1 to 4 is satisfied.
0.9t _min ≦ t <t _min Formula 1
0.8t _min ≦ t <0.9t _min Expression 2
0.7t _min ≦ t <0.8t _min ··· Equation 3
L _S × sin θ + p × cos θ ≦ t <0.7 t _min Expression 4
However, in the above formulas 1 to 4, t _min is expressed by the following formula.
t _min = L _S × sin θ + N × p × cos θ
(3) The size of the main seed surface in the direction orthogonal to the intersection line is larger than the size in the direction of the intersection line between the main seed surface and the planned slice plane. ) Manufacturing method.
(4) The manufacturing method according to any one of (1) to (3), wherein the GaN seed is a GaN single crystal substrate.
(5) The GaN seed is a GaN single crystal substrate having a structure in which a plurality of crystal regions are arranged in a horizontal direction with regions where crystallinity is locally lowered as a boundary between each other, and the plurality of crystal regions The manufacturing method according to (4), wherein at least a part of a boundary line formed between adjacent ones on the main seed surface forms an angle of 90 ° ± 10 ° with the tilt direction.
(6) The GaN seed is a spliced GaN substrate formed by splicing a plurality of GaN single crystal pieces in the lateral direction, and adjacent ones of the plurality of GaN crystal pieces are on the main seed surface. The manufacturing method according to any one of (1) to (3), wherein at least a part of the boundary line to be formed forms an angle of 90 ° ± 10 ° with the tilt direction.
(7) The GaN seed is a composite seed in which a plurality of GaN single crystal pieces are arranged side by side in the lateral direction, and adjacent ones of the plurality of GaN single crystal pieces are on the main seed surface. The manufacturing method according to any one of (1) to (3), wherein at least a part of the boundary line to be formed forms an angle of 90 ° ± 10 ° with the tilt direction.
(8) The manufacturing method according to any one of (1) to (7), wherein, in the third step, the GaN seed is excised from the GaN crystal composite before slicing the GaN bulk crystal.
(9) The manufacturing method according to any one of (1) to (8), wherein the main seed surface is a nonpolar or semipolar surface.
(10) The low index azimuth parallel or closest to the normal direction of the main seed surface is <10-1-1>, <30-3-2>, <20-2-1>, <30- 3-1>, <10-10>, <30-31>, <20-21>, <30-32> or <10-11>, The manufacturing method as described in said (9).
(11) The GaN wafer is a {10-1-1} wafer, a {30-3-2} wafer, a {20-2-1} wafer, a {30-3-1} wafer, or a {10-10} wafer. , {30-31} wafer, {20-21} wafer, {30-32} wafer, or {10-11} wafer.
(12) (i) a first step of preparing a seed having a main seed surface; and (ii) a semiconductor bulk crystal epitaxially grown on the main seed surface of the seed to include the seed and the semiconductor bulk crystal. A second step of obtaining a crystal composite; and (iii) processing the semiconductor crystal composite to obtain N semiconductor wafers (where N is an integer of 2 or more) having the same size and plane orientation. The third step comprises slicing the semiconductor bulk crystal along N + 1 or more parallel to-slice planes inclined at an inclination angle of 30 ° or less with respect to the main seed surface; In order to reduce the required growth thickness of the semiconductor bulk crystal in the second step, the semiconductor wafer take-out position in the semiconductor crystal composite is inclined with respect to the plane to be sliced. A semiconductor wafer manufacturing method is characterized in that mutually offset along the direction.
(13) When the growth thickness of the semiconductor bulk crystal in the second step is t, the size of the semiconductor wafer in the tilt direction is L _S , the tilt angle is θ, and the pitch between the sliced planes is p, The manufacturing method according to (12), wherein any one of the following formulas 1 to 4 is satisfied.
0.9t _min ≦ t <t _min Formula 1
0.8t _min ≦ t <0.9t _min Expression 2
0.7t _min ≦ t <0.8t _min ··· Equation 3
L _S × sin θ + p × cos θ ≦ t <0.7 t _min Expression 4
However, in the above formulas 1 to 4, t _min is expressed by the following formula.
t _min = L _S × sin θ + N × p × cos θ
(14) The manufacturing method according to (12) or (13), wherein the semiconductor bulk crystal is a nitride semiconductor crystal.

  According to a preferred embodiment of the present invention, a novel method of manufacturing a GaN wafer is provided that can contribute to shortening the time required for growing a GaN bulk crystal.

FIG. 1 is a flowchart of a GaN wafer manufacturing method according to the embodiment. FIG. 2 is a perspective view showing a GaN seed. FIG. 3 is a perspective view showing a GaN crystal composite formed by epitaxially growing a GaN bulk crystal on the main seed surface of the GaN seed. FIG. 4 is a side view for explaining a step of processing a GaN crystal composite to obtain a plurality of GaN wafers having the same size and plane orientation. FIG. 5 is a side view for explaining a step of processing a GaN crystal composite to obtain a plurality of GaN wafers having the same size and plane orientation. FIGS. 6A and 6B are side views showing a GaN crystal composite, respectively. FIG. 7 is a side view showing a GaN crystal composite. FIGS. 8A and 8B are side views showing a GaN crystal composite, respectively. FIG. 9 is a side view showing a GaN seed. FIG. 10 is a perspective view showing a GaN seed that is a composite seed. FIG. 11 is a perspective view showing an M-plane GaN substrate. FIG. 12 is a perspective view showing a composite seed in which 14 M-plane GaN substrates are juxtaposed on a susceptor (not shown) of the HVPE apparatus. FIGS. 13A and 13B are side views showing a GaN bulk crystal, respectively.

GaN takes a wurtzite crystal structure belonging to the hexagonal system. In GaN, the crystal axis parallel to [0001] and [000-1] is called the c axis, the crystal axis parallel to <10-10> is called the m axis, and the crystal axis parallel to <11-20> is called the a axis. . The crystal plane orthogonal to the c-axis is referred to as C-plane (C-plane), the crystal plane orthogonal to the m-axis is referred to as M-plane (M-plane), and the crystal plane orthogonal to the a-axis is referred to as A-plane.
The GaN surface orthogonal to the c-axis has a (0001) surface (gallium polar surface) and a (000-1) surface (nitrogen polar surface). These surfaces are also called polar surfaces.
A GaN surface parallel to the c-axis, that is, a GaN surface having a Miller index {hkil} of 1 (zero) such as a {10-10} surface or a {11-20} surface is called a nonpolar surface.
A GaN crystal surface that is neither a polar surface nor a nonpolar surface is called a semipolar surface.
In this specification, when referring to a crystal axis, a crystal surface, a crystal orientation, etc., unless otherwise specified, it means the crystal axis, crystal surface, crystal orientation, etc. of GaN.

Hereinafter, the present invention will be described with reference to specific examples.
As shown in FIG. 1, the GaN wafer manufacturing method according to the embodiment includes at least three steps including a first step S1, a second step S2, and a third step S3, and further steps other than these three steps are further performed. May be included.
In the first step S1, a plate-like GaN seed 10 having a main seed surface 12 as illustrated in FIG. 2 is prepared. The main seed surface 12 is a GaN surface having a specific plane orientation, and a GaN crystal can be epitaxially grown thereon.

In the second step S2, as shown in FIG. 3, the GaN bulk crystal 20 is epitaxially grown on the main seed surface 12 of the GaN seed 10 prepared in the first step S1 to obtain a GaN crystal composite 30. In practice, since GaN can also grow on the end face 14 of the GaN seed 10, the lateral size of the GaN bulk crystal 20 can be larger than the size of the main seed surface 12 of the GaN seed 10.
The growth thickness t of the GaN bulk crystal 20 is usually set in consideration of the design thickness and the number of GaN wafers to be taken out from the GaN crystal composite 30 in the subsequent third step S3.

In the third step S3, as shown in FIG. 4, the GaN crystal composite 30 obtained in the second step S2 is processed to obtain a plurality of GaN wafers 50 having the same size and plane orientation.
Specifically, the GaN crystal composite 30 is sliced as shown in FIG. 4B along a plurality of scheduled slice planes 2 (shown by broken lines) shown in FIG. . After that, by performing necessary processing, as shown in FIG. 4C, one GaN wafer 50 is taken out from each slice piece.

The direction of the planned slice plane 2 is determined based on the plane orientation of the GaN wafer 50 to be taken out from the GaN crystal composite 30.
The inclination angle θ of the slicing plane with respect to the main seed surface 12 of the GaN seed 10 is preferably 1 ° or more, more preferably 3 ° or more, more preferably 5 ° or more, and usually 30 ° or less, preferably 20 It is not more than °, more preferably not more than 15 °. The greater the tilt angle θ, the greater the effect obtained by implementing the present invention. However, when the tilt angle θ exceeds 30 °, the required growth thickness t of the GaN bulk crystal 20 becomes too large.

The inclination direction 3 of the planned slice surface 2 (hereinafter sometimes referred to simply as the “inclined direction”) is parallel to the planned slice surface 2 and is at the intersection of the main seed surface 12 of the GaN seed 10 and the planned slice surface 2. Defined as orthogonal direction.
In order to take out N (N is an integer greater than or equal to 2) GaN wafers 50 from the GaN crystal composite 30, the number of planned slice surfaces 2 is at least N + 1. The pitch p between the sliced surfaces 2 is set to be larger than the design thickness of the GaN wafer 50.

For example, a single wire saw or a multi-wire saw can be used for slicing the GaN crystal composite 30. In FIG. 4B, by slicing along the four scheduled slice planes 2, three slice pieces 40 of a size from which the GaN wafer 50 can be taken out are cut out from the GaN crystal composite 30.
The processing for taking out the GaN wafer 50 from the slice piece 40 may include one or more selected from cutting, cutting, polishing, and etching. There are various methods for cutting such as a mechanical method, a method using a laser, and a method including etching. The same applies to the hollow. There are various methods such as grinding, lapping, and CMP for polishing, and one or more can be selected as appropriate. Etching includes a dry method and a wet method, and either or both of them can be used.

  In the modification, as shown in FIG. 5, the GaN seed 10 may be cut out from the GaN crystal composite 30 before the GaN seed 10 is sliced along the planned slice plane 2. In this modification, the GaN seed 10 separated from the GaN crystal complex 30 can be reused as a seed for growing another GaN bulk crystal.

  In FIG. 4A and FIG. 5A, the GaN wafer removal position 4 in the GaN crystal composite 30, that is, where the GaN wafer 50 is taken out from the GaN crystal composite 30 is indicated by a dotted line. . As shown in FIGS. 4A and 5A, the three GaN wafer removal positions 4 are shifted from each other along the inclination direction 3 of the scheduled slice surface 2. The shifting direction is a direction in which the required growth thickness of the GaN bulk crystal 20 in the second step S2 is reduced.

FIG. 6 is shown for comparison. In FIG. 6A, the three GaN wafer extraction positions 4 in the GaN crystal composite 30 are not shifted along the tilt direction 3. In FIG. 6B, the three GaN wafer removal positions 4 are shifted in the direction opposite to the example of FIGS. 4 and 5 along the inclination direction 3.
Compared with the example of FIGS. 6A and 6B, in the example of FIGS. 4 and 5 according to the embodiment, the GaN bulk crystal 20 necessary for taking out three GaN wafers having the same size and plane orientation. The growth thickness t is reduced.

In the example of FIG. 6A, the minimum growth thickness t _min of the GaN bulk crystal 20 necessary for taking out N GaN wafers is expressed by the following equation.
t _min = L _S × sin θ + N × p × cos θ
However, L _S is the size of the GaN wafer along the tilt direction 3 in the state before being taken out from the GaN crystal composite 30, and θ is the tilt angle of the planned slice surface 2 with respect to the main seed surface 12 of the GaN seed 10. And p is the pitch between the planned slice planes 2.
In the examples of FIGS. 4 and 5, 0.9 t _min ≦ t <t _min is preferable, 0.8 t _min ≦ t <0.9 t _min is more preferable, and 0.7 t _min ≦ t < more preferably from 0.8 t _min, more preferably t <0.7t _min. As shown in FIG. 7, by extending the size of the main seed surface 12 of the GaN seed 10 in the direction of orthographic projection in the tilt direction 3 on the main seed surface, the growth thickness t of the GaN bulk crystal 20 becomes L _S It is possible to reduce to x sin θ + p × cos θ.

  In addition, even if the take-out position 4 of the GaN wafer 50 in the example of FIG. 4A is changed as shown in FIG. 8A or FIG. 8B, it is necessary to take out the same number of GaN wafers 50. The growth thickness t of the GaN bulk crystal 20 does not change. As can be understood from this, in order to effectively reduce the required growth thickness of the GaN bulk crystal 20, the N GaN wafers 50 taken out from the GaN crystal composite 30 are arranged in a direction perpendicular to the scheduled slice plane 2. It is important to shift the take-out position 4 along the inclination direction 3 between the two most distant sheets.

It will be apparent that reducing the required growth thickness of the GaN bulk crystal can contribute to shortening the time required for growing the GaN bulk crystal.
If the main surface of the GaN seed is a nonpolar or semipolar surface, further reducing the required growth thickness of the GaN bulk crystal can also contribute to improving the quality of the GaN wafer extracted from the GaN bulk crystal. This is because stacking faults are likely to occur in a GaN bulk crystal grown on a nonpolar or semipolar GaN surface. Since the stacking fault concentration increases with the growth of the GaN bulk crystal, but does not decrease, the smaller the growth thickness of the GaN bulk crystal, the lower the stacking fault concentration of the GaN wafer obtained from the GaN bulk crystal. Tend to be lower.

The details of each step of the GaN wafer manufacturing method according to the embodiment are as follows.
As described above, the main seed surface of the GaN seed prepared in the first step is a GaN surface having a specific orientation.
FIG. 9 is a side view of the GaN seed 10 viewed from a direction parallel to the intersection line between the main seed surface 12 and the C plane (therefore, in FIG. 9, the intersection line is perpendicular to the paper surface). In the GaN seed 10, the angle α formed by the normal direction D _n of the main seed surface 12 and the [0001] direction can be any value in the range of 0 ° to 180 °.
When the angle α is in the range of 0 ° to 10 ° or in the range of 170 ° to 180 °, the main seed surface 12 can be said to be a polar surface. When the angle α is in the range of 85 to 95 °, the main seed surface 12 can be said to be a nonpolar surface. When the angle α does not fall within any of these angular ranges, the main seed surface 12 can be said to be a semipolar surface.

When the main seed surface 12 is a nonpolar or semipolar surface, the direction of the line of intersection between the main seed surface and the C plane is not limited, but the a-axis direction is ± 15 ° and the a-axis direction is ± 5 °. A axis direction ± 3 °, a axis direction ± 2 °, a axis direction ± 1 °, m axis direction ± 15 °, m axis direction ± 5 °, m axis direction ± 3 °, m axis direction ± 2 °, It may be within a range such as ± 1 ° in the m-axis direction.
When the direction D _n of the normal line of the main seed surface 12 is parallel to <10-10>, the angle θ formed by the direction D _n and the [0001] direction is 90 °, and the main seed surface 12 and the C plane The intersection line is parallel to the a-axis.
When the direction D _n of the normal line of the main seed surface 12 is parallel to <11-20>, the angle formed by the direction D _n and the [0001] direction is 90 °, and the main seed surface 12 and the C plane The intersection line is parallel to the m-axis.
When the direction D _n of the normal line of the main seed surface 12 is parallel to <10-11>, the angle formed by the direction D _n and the [0001] direction is 62 °, and the angle between the main seed surface 12 and the C plane is The intersecting line is parallel to the a-axis.
When the normal direction D _n of the main seed surface 12 is parallel to <10-1-1>, the angle formed by the direction D _n and the [0001] direction is 118 °, and the main seed surface 12 and the C plane The line of intersection with is parallel to the a-axis.

In one example, the low index orientation parallel or closest to the normal direction D _n of the main seed surface 12 is <10-11>, <30-32>, <20-21>, <30-31>, It can be <10-10>, <30-3-1>, <20-2-1>, <30-3-2> or <10-1-1>.
Here, a crystal orientation in which the absolute values of the integers h, k, i, and l in the Miller index <hkil> are all 3 or less is referred to as a low index orientation.

  The shape of the main seed surface of the GaN seed prepared in the first step is not limited to a rectangle, and may be a hexagon, a circle, an ellipse, or the like. The shape and size of the GaN seed can be appropriately determined in consideration of the shape of the GaN wafer to be manufactured and the number of GaN wafers to be taken out from the GaN bulk crystal grown on the GaN seed.

  In one example, the GaN seed prepared in the first step can be a single GaN single crystal substrate. It is known that GaN single crystal substrates having various plane orientations can be produced from GaN bulk crystals grown by various methods such as HPVE method, flux method, sublimation method, and ammonothermal method. For the method of manufacturing a nonpolar or semipolar GaN single crystal substrate, the above-mentioned Patent Document 1 and Patent Document 2 can be referred to.

In one example, the GaN seed prepared in the first step may be a composite seed in which a plurality of GaN single crystal pieces are arranged adjacent to each other in the lateral direction (a direction perpendicular to the thickness direction of the GaN seed). An example of the composite seed is shown in FIG.
Referring to FIG. 10, the GaN seed 10 is a composite seed, and is composed of six GaN single crystal pieces 100a, 100b, 100c, 100d, 100e, and 100f that are closely arranged on the flat surface of the base plate B. ing.
The base plate B can be a susceptor included in a vapor phase growth apparatus used when a GaN bulk crystal is grown on the GaN seed 10 in a later step, but is not limited thereto. A crystal substrate, a metal substrate, a ceramic substrate, etc. may be sufficient.
The six GaN single crystal pieces 100a to 100f can be bonded to the base plate B as necessary.

Although not limited, at least a part of the boundary line 200 formed by the adjacent ones of the six GaN single crystal pieces 100a to 100f on the main seed surface 12 has an inclination direction of 90 to the slicing plane. An angle of ± 10 ° may be formed.
The main seed surface 12 of the GaN seed 10 is composed of main surfaces 102a to 102f of six GaN single crystal pieces 100a to 100f. The step that the main seed surface 12 may have at the boundary between adjacent GaN single crystal pieces is preferably less than 0.1 mm. The misorientation between the six GaN single crystal pieces 100a to 100f is preferably less than 1 °.

In one example, the GaN seed prepared in the first step may be a GaN single crystal substrate manufactured by the method disclosed in Patent Document 1. That is, it may be manufactured by a method of growing a GaN crystal on the composite seed and slicing the GaN crystal. Such a GaN seed has a structure in which a plurality of crystal regions are arranged in a lateral direction (a direction perpendicular to the thickness direction of the GaN seed) with regions where the crystallinity is locally lowered as mutual boundaries.
Among the plurality of crystal regions of the GaN seed having such a structure, at least a part of the boundary line formed by adjacent ones on the main seed surface forms an angle of 90 ° ± 10 ° with the inclination direction of the planned slice surface. You may do it.

In one example, the GaN seed prepared in the first step may be a spliced GaN substrate formed by splicing a plurality of GaN single crystal pieces in a lateral direction (a direction perpendicular to the thickness direction of the GaN seed). For the structure and manufacturing method of the spliced GaN substrate, reference can be made to, for example, JP 2010-13298A.
When the GaN seed is a spliced GaN substrate, at least a part of the boundary line formed on the main seed surface by the adjacent ones of the plurality of single crystal pieces constituting the GaN seed is an inclination of the planned slice surface An angle of 90 ° ± 10 ° with the direction may be formed.

  In one example, the GaN seed prepared in the first step may be a GaN single crystal layer included in the GaN layer bonded substrate. The GaN layer bonded substrate is manufactured by a method of bonding the GaN single crystal substrate to the base substrate and then cutting the GaN single crystal substrate so that the GaN layer remains on the base substrate side. Therefore, the GaN single crystal layer included in the GaN layer bonded substrate can be restated as a GaN single crystal layer bonded to the base substrate. The base substrate may be various single crystal substrates, and may be a metal substrate, a ceramic substrate, or a polycrystalline GaN substrate.

  In one example, the GaN seed prepared in the first step may be a GaN single crystal layer epitaxially grown on a hetero substrate. The hetero substrate is a substrate made of a material having a composition different from that of GaN, and is typically a single crystal substrate such as a sapphire substrate, a spinel substrate, an AlN substrate, a SiC substrate, and a Si substrate. The epitaxial growth method is not limited, and a vapor phase method such as MOVPE, MBE, sputtering, PLD (pulse laser deposition), and HVPE, or a liquid phase method such as a flux method may be used.

There is no limitation on the crystal growth method used for epitaxial growth of GaN bulk crystal in the second step, and liquid phase methods such as HVPE (Halide Vapor Phase Epitaxy), OVPE (Oxide Vapor Phase Epitaxy), sublimation method, etc., flux method, etc. A known epitaxial growth method such as an ammonothermal method can be appropriately employed.
Doping of the GaN bulk crystal during epitaxial growth can be performed arbitrarily. As n-type dopants, O (oxygen), Si (silicon) and Ge (germanium) are known. Mg (magnesium) and Zn (zinc) are known as p-type dopants.
Fe (iron) is known as a dopant that lowers the conductivity of GaN crystals.

  After the second step, the embodiment in which the GaN seed is not excised from the GaN crystal composite obtained in the second step, that is, the embodiment in which the GaN crystal composite is sliced together with the GaN seed in the third step is not limited. However, the finally obtained GaN wafer may contain a part of the GaN seed.

The GaN wafer obtained in the third step is {10-1-1} wafer, {30-3-2} wafer, {20-2-1} wafer, {30-3-1} wafer, {10-10} It can be a wafer, {30-31} wafer, {20-21} wafer, {30-32} wafer or {10-11} wafer.
The surface index attached to the name of the GaN wafer is the surface index of the low index surface that is parallel or closest to the front surface of the GaN wafer. The front surface of the GaN wafer here refers to the one of the two main surfaces of the wafer that has been finished in a state suitable for the epitaxial growth of a nitride semiconductor for the purpose of forming a device structure.

The GaN wafer manufactured using the GaN wafer manufacturing method according to the embodiment can be used as a substrate for manufacturing various nitride semiconductor devices.
In manufacturing a nitride semiconductor device, a device structure is usually formed by vapor phase epitaxial growth of one or more nitride semiconductors on a GaN wafer. As the vapor phase epitaxial growth method, MOCVD method, MBE method, pulse vapor deposition method and the like suitable for forming a thin film are preferably exemplified.
Specific examples of nitride semiconductor devices include light-emitting devices such as light-emitting diodes and laser diodes, rectifiers, bipolar transistors, field-effect transistors, electronic devices such as HEMT (High Electron Mobility Transistor), temperature sensors, pressure sensors, radiation sensors, There are semiconductor sensors such as a visible-ultraviolet light detector, SAW (Surface Acoustic Wave) devices, vibrators, resonators, oscillators, MEMS (Micro Electro Mechanical System) parts, voltage actuators, solar cells, and the like.

(Example)
Fourteen 1-mm thick M-plane GaN substrates having a rectangular main surface with a width of 5 mm and a length of 50 mm shown in FIG. 11 are prepared. These 14 M-plane GaN substrates are arranged on a susceptor (not shown) of the HVPE apparatus as shown in FIG. 12 to form a GaN seed (composite seed). The size of the main seed surface of the GaN seed is 50 mm in the a-axis direction and 70 mm in the c-axis direction.
On the main seed surface of the GaN seed, a GaN bulk crystal is grown to a thickness of about 12 mm by the HVPE method to obtain a GaN crystal composite composed of the GaN seed and the GaN bulk crystal.
Next, a GaN seed is cut from the GaN crystal composite using a single wire saw. Furthermore, as shown in FIG. 13A, the remaining GaN bulk crystal having a thickness of about 11 mm is aligned along four planned slice planes, each parallel to the (20-2-1) plane and arranged at a pitch of 1 mm. And slice. A multi-wire saw is used for slicing.
The obtained three slice pieces can be processed, and one disk-shaped GaN (20-21) wafer having a diameter of 50 mm can be obtained from each of the slice pieces. In FIG. 13 (a), the dotted line indicates the extraction position of the three GaN wafers in the GaN bulk crystal.

(Comparative example)
Ten M-plane GaN substrates having a rectangular main surface with a width of 5 mm and a length of 50 mm shown in FIG. 11 are prepared. The ten M-plane GaN substrates are arranged in the c-axis direction so that the respective (10-10) surfaces face upward to form a GaN seed (composite seed), as in the example. The size of the main seed surface of the GaN seed is 50 mm in both the a-axis direction and the c-axis direction.
On the main seed surface of the GaN seed, a GaN bulk crystal is grown to a thickness of about 17 mm by HVPE to obtain a GaN crystal composite composed of the GaN seed and the GaN bulk crystal.
Next, a GaN seed is cut from the GaN crystal composite using a single wire saw. Further, the remaining GaN bulk crystal having a thickness of about 16 mm is formed along four planned slice planes arranged at 1 mm pitch, each parallel to the (20-2-1) plane, as shown in FIG. 13B. And slice. A multi-wire saw is used for slicing.
The obtained three slice pieces can be processed, and one disk-shaped GaN (20-21) wafer having a diameter of 50 mm can be obtained from each of the slice pieces. In FIG. 13 (b), the dotted line indicates the take-out position of the three GaN wafers in the GaN bulk crystal.

  As mentioned above, although this invention was demonstrated according to specific embodiment, each embodiment was shown as an example and does not limit the scope of the present invention. That is, each embodiment described in the present specification can be variously modified within the scope not departing from the gist thereof, and within the feasible range, the features described by the other embodiments. Can be combined.

2 Plane slice surface 3 Inclination direction 4 GaN wafer removal position 10 GaN seed 12 Main seed surface 20 GaN bulk crystal 30 GaN crystal composite 40 Slice piece 50 GaN wafer

Claims (14)

(I) a first step of preparing a GaN seed having a main seed surface; and (ii) epitaxially growing a GaN bulk crystal on the main seed surface of the GaN seed to include the GaN seed and the GaN bulk crystal. A second step of obtaining a crystal composite, and (iii) a third step of obtaining N GaN wafers (where N is an integer of 2 or more) having the same size and plane orientation by processing the GaN crystal composite. Including steps;
The third step includes slicing the GaN bulk crystal along N + 1 or more parallel slicing planes which are inclined at an inclination angle of 30 ° or less with respect to the main seed surface;
GaN characterized in that the take-out position of the GaN wafer in the GaN crystal composite is shifted from each other along the inclination direction of the slicing plane so as to reduce the required growth thickness of the GaN bulk crystal in the second step Wafer manufacturing method. When the growth thickness of the GaN bulk crystal in the second step is t, the size of the tilt direction of the GaN wafer is L _S , the tilt angle is θ, and the pitch between the sliced planes is p, the following formula 1 The manufacturing method of Claim 1 with which any of -4 is satisfied.
0.9t _min ≦ t <t _min Formula 1
0.8t _min ≦ t <0.9t _min Expression 2
0.7t _min ≦ t <0.8t _min ··· Equation 3
L _S × sin θ + p × cos θ ≦ t <0.7 t _min Expression 4
However, in the above formulas 1 to 4, t _min is expressed by the following formula.
t _min = L _S × sin θ + N × p × cos θ 3. The manufacturing method according to claim 1, wherein the main seed surface has a size in a direction orthogonal to the intersection line larger than a size in a direction of the intersection line between the main seed surface and the planned slice plane. . The manufacturing method according to claim 1, wherein the GaN seed is a GaN single crystal substrate. The GaN seed is a GaN single crystal substrate having a structure in which a plurality of crystal regions are arranged in a lateral direction with regions where the crystallinity is locally lowered as a boundary, and adjacent to each other among the plurality of crystal regions. The manufacturing method according to claim 4, wherein at least a part of a boundary line formed by the objects on the main seed surface forms an angle of 90 ° ± 10 ° with the tilt direction. The GaN seed is a spliced GaN substrate formed by splicing a plurality of GaN single crystal pieces in the lateral direction, and a boundary between adjacent ones of the plurality of GaN crystal pieces formed on the main seed surface The manufacturing method according to claim 1, wherein at least a part of the line forms an angle of 90 ° ± 10 ° with the inclination direction. The GaN seed is a composite seed in which a plurality of GaN single crystal pieces are arranged side by side in the lateral direction, and a boundary between adjacent ones of the plurality of GaN single crystal pieces formed on the main seed surface The manufacturing method according to claim 1, wherein at least a part of the line forms an angle of 90 ° ± 10 ° with the inclination direction. The manufacturing method according to any one of claims 1 to 7, wherein, in the third step, the GaN seed is excised from the GaN crystal composite before slicing the GaN bulk crystal. The manufacturing method according to claim 1, wherein the main seed surface is a nonpolar or semipolar surface. The low index azimuth parallel or closest to the normal direction of the main seed surface is <10-1-1>, <30-3-2>, <20-2-1>, <30-3-1. >, <10-10>, <30-31>, <20-21>, <30-32> or <10-11>. The GaN wafer is a {10-1-1} wafer, a {30-3-2} wafer, a {20-2-1} wafer, a {30-3-1} wafer, a {10-10} wafer, {30 The manufacturing method according to claim 9, which is a -31} wafer, a {20-21} wafer, a {30-32} wafer, or a {10-11} wafer. (I) a first step of preparing a seed having a main seed surface; and (ii) a semiconductor crystal composite comprising the seed and the semiconductor bulk crystal by epitaxially growing a semiconductor bulk crystal on the main seed surface of the seed And (iii) a third step of processing the semiconductor crystal composite to obtain N semiconductor wafers (where N is an integer of 2 or more) having the same size and plane orientation. The third step comprises slicing the semiconductor bulk crystal along N + 1 or more parallel slicing planes which are inclined at an inclination angle of 30 ° or less with respect to the main seed surface; and the second step In order to reduce the required growth thickness of the semiconductor bulk crystal in the step, the take-out position of the semiconductor wafer in the semiconductor crystal composite is aligned along the inclination direction of the planned slice surface. A semiconductor wafer manufacturing method is characterized in that mutually offset Te. When the growth thickness of the semiconductor bulk crystal in the second step is t, the size of the semiconductor wafer in the tilt direction is L _S , the tilt angle is θ, and the pitch between the sliced planes is p, the following formula 1 The manufacturing method of Claim 12 with which any of -4 is satisfied.
0.9t _min ≦ t <t _min Formula 1
0.8t _min ≦ t <0.9t _min Expression 2
0.7t _min ≦ t <0.8t _min ··· Equation 3
L _S × sin θ + p × cos θ ≦ t <0.7 t _min Expression 4
However, in the above formulas 1 to 4, t _min is expressed by the following formula.
t _min = L _S × sin θ + N × p × cos θ The manufacturing method according to claim 12 or 13, wherein the semiconductor bulk crystal is a nitride semiconductor crystal.

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