JP2018061196A - Driver circuit and control method of driver circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To adjust the value of output resistance of a driver circuit so as to make even the difference of voltage level of the output signals in multilevel transmission.SOLUTION: A driver circuit has multiple drive sections and resistance adjustment sections, each drive section has a first variable resistance part and a second variable resistance part connected with a power source line and a ground line, respectively, and having resistance values changing on the basis of control from the resistance adjustment section, and multiple drive switches connected in parallel between the first and second variable resistance parts, and when set in effective state, being set to any one of a state where the first variable resistance part and the output are conducted, or a state where the second variable resistance part and the output are conducted, according to the input data. The resistance adjustment section has a first adjustment section executing resistance value adjustment processing for adjusting the resistance values of the first and second variable resistance parts for every multiple drive sections, and a second adjustment section for adjusting the number of drive switch sections to be set effectively, so that the difference of voltage level of the output signals becomes even after resistance value adjustment processing.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a driver circuit and a driver circuit control method.

  The driver circuit is mounted on an information processing apparatus such as a server, for example, and transmits a signal to the reception circuit of the information processing apparatus on the reception side. For example, the driver circuit includes a resistance element and a P-type MOS transistor disposed between a power supply line to which a power supply voltage is supplied and an output terminal, and an N-type MOS disposed between the output terminal and a ground line. A transistor and a resistor. MOS stands for Metal Oxide Semiconductor. The MOS transistor is either in a conductive state where the source and drain are conductive (hereinafter also referred to as an on state) or in a non-conductive state where the source and drain are not conductive (hereinafter also referred to as an off state). It functions as a switch that is set according to the input signal. Therefore, the ON resistance and the resistance element of the MOS transistor function as the output resistance of the driver circuit.

  Note that the value of the output resistance of the driver circuit may change due to temperature changes, manufacturing process variations, and the like. For this reason, a method of calibrating so that the value of the output resistance of the driver circuit falls within a predetermined range has been proposed (for example, see Patent Documents 1 and 2). For example, the driver circuit adjusts the total on-resistance value of the MOS transistors connected in parallel by variably setting the number of MOS transistors to be used among the plurality of MOS transistors connected in parallel, Adjust the output resistance value.

  2. Description of the Related Art In recent years, with an increase in signal processing speed of information processing apparatuses, it has been desired to expand the bandwidth of signals transmitted between circuit components such as LSI (Large Scale Integration). As a method for expanding a signal band, a method for improving a transmission frequency and a method for transmitting a signal in multiple values are known. In multi-level transmission in which a signal is transmitted in multi-level, for example, when input data is 2 bits, a signal including any one of four voltage levels is transmitted to a receiving circuit through one signal line (for example, Patent Literature 3).

JP 2007-121288 A JP 2008-60679 A JP 2010-157786 A

  A driver circuit that performs multi-level transmission using PAM4 (Pulse Amplitude Modulation 4) has a driving unit for upper bits and a driving unit for lower bits for 2-bit input data. Then, the driver circuit modulates the amplitude of the 2-bit input data and transmits an output signal including any one of the four voltage levels to the receiving circuit through one signal line. In the driver circuit using PAM4, for example, when the value of the output resistance of the driving unit for the lower bits is stable at twice the value of the output resistance of the driving unit for the upper bits, it is output from the driver circuit. Each voltage level difference is equal to each other.

  Here, the bandwidth of the driver circuit is improved when the MOS transistor is connected to the output terminal side of the resistor element and the MOS transistor in the driver circuit compared to the case where the resistance element is connected to the output terminal side. . Therefore, when the bandwidth of the driver circuit using PAM4 is improved, the MOS transistor is connected to the output terminal side among the resistance element and the MOS transistor in each drive unit. The voltage between the gate and the source of the MOS transistor connected to the output terminal side fluctuates with a change in the output voltage because the source is connected to the power supply line or the ground line via the resistance element. For this reason, the value of the on-resistance of the MOS transistor that functions as a part of the output resistance of the driver circuit may change as the output voltage of the driver circuit changes. That is, the value of the output resistance of the driver circuit may vary depending on the pattern of input data to the driver circuit.

  For this reason, even if the output resistance value of the driver circuit at a specific voltage level (specific operating point) is adjusted to fall within a predetermined range, the output resistance value of the driving unit for the lower bit and the upper bit value The ratio with the value of the output resistance of the drive unit is not always adjusted appropriately. As the ratio of the output resistance value of the drive unit for the lower bit and the output resistance value of the drive unit for the upper bit deviates from an appropriate value, the variation in the difference between the voltage levels output from the driver circuit increases. The characteristics of the output signal deteriorate.

  In one aspect, an object of the present invention is to adjust a value of an output resistance of a driver circuit so that a difference in voltage level of an output signal in multilevel transmission is equalized.

  In one embodiment, the driver circuit is provided corresponding to each of the plurality of bits of the input data, the outputs are connected to each other, and the driver circuit generates an output signal having a voltage level corresponding to the value of the input data And a resistance adjustment unit that adjusts the output resistance of the plurality of drive units, each of the plurality of drive units is connected to a power supply line to which a power supply voltage is supplied, and the resistance is controlled based on control from the resistance adjustment unit. A first variable resistance section whose value changes, a second variable resistance section which is connected to the ground line and whose resistance value changes based on control from the resistance adjustment section, and a first variable resistance section and a second variable resistance section Between the first variable resistor unit and the output of the drive unit, and the output of the second variable resistor unit and the drive unit. Input data to either Each of the plurality of drive switch units set in accordance with each of the plurality of drive switch units, and the resistance adjustment unit performs a resistance value adjustment process for adjusting a resistance value of each of the first variable resistor unit and the second variable resistor unit for each of the plurality of drive units. After the resistance value adjustment process is executed, the number of switches that adjust the number of drive switch units that are set to an effective state so that the difference in voltage level of the output signal is equalized after the resistance value adjustment process is executed And a second adjustment unit that executes processing.

  According to one aspect of the method, a plurality of driving units that are provided corresponding to a plurality of bits of input data, outputs are connected to each other, and generate an output signal having a voltage level corresponding to the value of the input data; A resistance adjustment unit that adjusts output resistance of the plurality of drive units, each of the plurality of drive units is connected to a power supply line to which a power supply voltage is supplied, and the resistance value is based on control from the resistance adjustment unit A first variable resistor unit that changes, a second variable resistor unit that is connected to the ground line and has a resistance value that changes based on control from the resistance adjustment unit, and between the first variable resistor unit and the second variable resistor unit. Are connected in parallel to each other and are set in an effective state by the resistance adjustment unit, the state in which the first variable resistance unit and the output of the drive unit are electrically connected, and the output of the second variable resistor unit and the drive unit Set according to the input data to either the state where the connection between In the control method of the driver circuit having a plurality of drive switch units, the first adjustment unit included in the resistance adjustment unit adjusts the resistance value of each of the first variable resistance unit and the second variable resistance unit. Is executed for each of the plurality of drive units, and the second adjustment unit included in the resistance adjustment unit is set in an effective state so that the difference in the voltage level of the output signal becomes equal after the resistance value adjustment process is executed. A switch number adjustment process for adjusting the number of drive switch sections to be performed is executed.

  The value of the output resistance of the driver circuit can be adjusted so that the voltage level difference of the output signal in the multi-value transmission becomes equal.

It is a figure which shows one Embodiment of the control method of a driver circuit and a driver circuit. It is a figure which shows another embodiment of the control method of a driver circuit and a driver circuit. It is a figure which shows an example of the variable resistance part shown in FIG. It is a figure which shows an example of the replica part shown in FIG. It is a figure which shows an example of the output signal produced | generated by PAM4. FIG. 3 is a diagram illustrating an example of an operation of the driver circuit illustrated in FIG. 2. It is a figure which shows an example of the resistance value adjustment process shown in FIG. It is a figure which shows an example of the switch number adjustment process shown in FIG. It is a figure which shows another example of the switch number adjustment process shown in FIG. It is a figure which shows another embodiment of the control method of a driver circuit and a driver circuit. It is a figure which shows an example of the replica drive part shown in FIG. It is a figure which shows an example of the resistance value adjustment process by the driver circuit shown in FIG. It is a figure which shows an example of the apparatus by which the driver circuit shown in FIG.1, FIG.2 and FIG.10 is mounted.

  Hereinafter, embodiments will be described with reference to the drawings. The same sign as the power supply voltage name is used for the power supply line to which the power supply voltage (power supply voltage VDD, ground voltage GND) is transmitted. The signal supplied to the terminal uses the same symbol as the terminal name. In addition, a control signal such as an enable signal of the same type (for example, the control signal ENm shown in FIG. 1) may be illustrated by combining a plurality of signals into one signal line.

  FIG. 1 shows an embodiment of a driver circuit and a method for controlling the driver circuit. The driver circuit DRCa shown in FIG. 1 is mounted on an information processing apparatus such as a server, for example, and transmits signals in multiple values. For example, the driver circuit DRCa performs PAM4, which is 2-bit amplitude modulation, and amplitude-modulates 2-bit input data DI (DI1, DI0). As a result, the driver circuit DRCa receives the output signal DO including any one of the four voltage levels respectively corresponding to the four values represented by the 2-bit input data DI through a single signal line (hereinafter referred to as a device on the receiving side). , Also referred to as a receiving device).

  The driver circuit DRCa includes a plurality of drive units DRV (DRVm, DRVl) that generate an output signal DO having a voltage level corresponding to the value of the input data DI, and a resistance adjustment unit RADJa that adjusts output resistances of the plurality of drive units DRV. And have.

  The drive unit DRV is provided corresponding to each of the plurality of bits of the input data DI. For example, the drive unit DRVm is provided corresponding to the upper bits of the 2-bit input data DI, and the input is connected to the input terminal DI1. The drive unit DRVm receives the upper bit data DI1 of the 2-bit input data DI. The drive unit DRVl is provided corresponding to the lower bits of the 2-bit input data DI, and the input is connected to the input terminal DI0. Then, the driving unit DRV1 receives lower-order bit data DI0 of 2-bit input data DI. Outputs of the drive units DRVm and DRVl are connected to an output terminal DO. That is, the outputs of the plurality of drive units DRV are connected to each other.

  The drive unit DRVm includes a variable resistance unit VRmu connected to the power supply line VDD to which the power supply voltage VDD is supplied, a variable resistance unit VRmd connected to the ground line GND, and a plurality of drive switch units DSWm (DSWm1, DSWm2,.・ ・） Hereinafter, the variable resistance units VRmu and VRmd are also referred to as a variable resistance unit VR, and the drive switch unit DSWm is also referred to as a drive switch unit DSW.

  The variable resistance unit VRmu is connected between the power supply line VDD and the terminals PU of the plurality of drive switch units DSWm, and receives the control signal EUm from the resistance adjustment unit RADJa. Note that the resistance value of the variable resistance unit VRmu changes according to the value of the control signal EUm, for example. For example, the variable resistance unit VRmu includes a plurality of resistance elements (not shown), and the number of resistance elements corresponding to the value of the control signal EUm is connected in parallel between the power supply line VDD and the terminal PU of the drive switch unit DSWm. . That is, the variable resistance unit VRmu is an example of a first variable resistance unit that is connected to the power supply line VDD and has a resistance value that changes based on control from the resistance adjustment unit RADJa.

  The variable resistance unit VRmd is connected between the ground line GND and the terminals PD of the plurality of drive switch units DSWm, and receives the control signal EDm from the resistance adjustment unit RADJa. Note that the resistance value of the variable resistance unit VRmd changes according to a change in the value of the control signal EDm, for example. For example, the variable resistance unit VRmd includes a plurality of resistance elements (not shown), and connects the number of resistance elements corresponding to the value of the control signal EDm in parallel between the ground line GND and the terminal PD of the drive switch unit DSWm. . That is, the variable resistance unit VRmd is an example of a second variable resistance unit that is connected to the ground line GND and has a resistance value that changes based on control from the resistance adjustment unit RADJa.

  The plurality of drive switch units DSWm are connected in parallel between the variable resistor unit VRmu and the variable resistor unit VRmd. For example, each terminal PU of the plurality of drive switch sections DSWm is connected to the variable resistance section VRmu, and each terminal PD of the plurality of drive switch sections DSWm is connected to the variable resistance section VRmd. Further, each terminal OT of the plurality of drive switch units DSWm is connected to the output terminal DO, and each terminal IN of the plurality of drive switch units DSWm is connected to the input terminal DI1. Each terminal EN of the plurality of drive switch units DSWm receives a corresponding control signal ENm among the control signals ENm (ENm1, ENm2,...) Output from the resistance adjustment unit RADJa. The number at the end of the code of the control signal ENm corresponds to the number at the end of the code of the drive switch unit DSWm.

  For example, each drive switch unit DSWm is set to an effective state when receiving a high-level control signal ENm corresponding to the power supply voltage VDD at the terminal EN. The drive switch unit DSWm set to an effective state receives input data at the terminal IN in either a state where the terminal PU and the terminal OT are conductive or a state where the terminal PD and the terminal OT are conductive. Set according to DI1. When the driving switch unit DSWm is not set to an effective state, the terminal OT is set to a state in which neither the terminal PU nor PD is conducted regardless of the input data DI1 received at the terminal IN.

  Each drive switch unit DSWm includes, for example, an inverter INV, a NOR circuit NOR, a NAND circuit NAND, a P-type MOS transistor MPdr, and an N-type MOS transistor MNdr. Hereinafter, the P-type MOS transistor and the N-type MOS transistor are also simply referred to as transistors.

  The inverter INV inverts the signal EN (control signal ENm1 in the drive switch unit DSWm1) received from the terminal EN, and outputs the inverted signal to the NOR circuit NOR. The negative logical sum circuit NOR calculates the negative logical sum of the signal received from the terminal EN via the inverter INV (inverted signal of the signal EN) and the signal IN received from the terminal IN (input data DI1), and the result of the calculation. Output to the gate of the transistor MNdr. The NAND circuit NAND calculates the NAND of the signal EN received from the terminal EN and the signal IN received from the terminal IN, and outputs the calculation result to the gate of the transistor MPdr.

  That is, in the drive switch unit DSWm that receives the high-level control signal ENm at the terminal EN, the transistors MPdr and MNdr receive a signal obtained by inverting the input data DI1 at the gate. In addition, in the drive switch section DSWm that receives the low-level control signal ENm corresponding to the ground voltage GND at the terminal EN, the transistor MPdr receives the high-level signal at the gate regardless of the input data DI1, and the transistor MNdr A low level signal is received at the gate.

  The transistor MPdr has a source connected to the terminal PU and a drain connected to the terminal OT and the drain of the transistor MNdr. When the signal received at the gate of the transistor MPdr is at a low level, the transistor MPdr enters a conductive state (on state) in which the source and the drain are conductive. As a result, the terminal PU and the terminal OT are electrically connected. In addition, when the signal received at the gate is at a high level, the transistor MPdr is in a non-conductive state (off state) in which the source and the drain are not conductive. In this case, the terminal PU and the terminal OT are not electrically connected.

  The transistor MNdr has a source connected to the terminal PD and a drain connected to the terminal OT and the drain of the transistor MPdr. The transistor MNdr is turned on when the signal received at the gate is at a high level. Thereby, the terminal PD and the terminal OT are electrically connected. The transistor MNdr is turned off when the signal received at the gate is at a low level. In this case, the terminal PD and the terminal OT are not electrically connected.

  That is, in the drive switch unit DSWm that has received the high-level control signal ENm at the terminal EN, when the high-level input data DI1 is received at the terminal IN, the transistor MPdr is turned on and the transistor MNdr is turned off. As a result, the terminal PU and the terminal OT are electrically connected, and the terminal PD and the terminal OT are not electrically connected. Further, in the drive switch unit DSWm that has received the high-level control signal ENm at the terminal EN, when the low-level input data DI1 is received at the terminal IN, the transistor MPdr is turned off and the transistor MNdr is turned on. As a result, the terminal PD and the terminal OT are electrically connected, and the terminal PU and the terminal OT are not electrically connected. Thus, the drive switch unit DSWm that has received the high-level control signal ENm is set to an effective state that functions as a drive switch that switches the connection destination of the terminal OT according to the input data DI1. That is, when the input data DI1 is at a high level, the drive switch unit DSWm set in an effective state drives the transmission line by connecting the output terminal DO to the power supply line VDD via the variable resistor unit VRmu. Further, when the input data DI1 is at a low level, the drive switch unit DSWm set in an effective state drives the transmission line by connecting the output terminal DO to the ground line GND via the variable resistor unit VRml.

  In the drive switch unit DSWm that has received the low-level control signal ENm at the terminal EN, the transistors MPdr and MNdr are set to the off state regardless of the input data DI1. As a result, the terminal OT is in a state in which neither of the terminals PU and PD is conducted. That is, the drive switch unit DSWm that has received the low-level control signal ENm is set to an invalid state that does not function as a drive switch.

  That is, when the drive switch unit DSWm is set in an effective state, there is a gap between the state in which the variable resistor unit VRmu and the output of the drive unit DRVm are electrically connected and the output of the variable resistor unit VRmd and the drive unit DRVm. It is set according to the input data DI1 in either of the conductive states.

  Therefore, when the input data DI1 is at a high level, the output resistance of the drive unit DRVm is the combined resistance and the variable resistance unit VRmu when the ON resistance of the transistor MPdr of the drive switch unit DSWm set to an effective state is connected in parallel. It is expressed as the sum of Further, when the input data DI1 is at a low level, the output resistance of the drive unit DRVm is the combined resistance and the variable resistance unit VRmd when the on-resistance of the transistor MNdr of the drive switch unit DSWm set in an effective state is connected in parallel. It is expressed as the sum of

  The drive unit DRVl is the same as or similar to the drive unit DRVm except for the magnitude of the adjusted output resistance. For example, the drive unit DRVl includes a variable resistor unit VRlu connected to the power supply line VDD, a variable resistor unit VRld connected to the ground line GND, and a plurality of drive switch units DSWl (DSWl1, DSWl2,...). Have. Hereinafter, the variable resistance portions VRlu and VRld are also referred to as variable resistance portions VR, and the drive switch portion DSWl is also referred to as drive switch portion DSW.

  The variable resistance portion VRlu is the same as or similar to the variable resistance portion VRmu. For example, the variable resistance unit VRlu is connected between the power supply line VDD and the terminal PU of the drive switch unit DSWl and receives the control signal EUl from the resistance adjustment unit RADJa. The resistance value of the variable resistance unit VRlu changes according to the value of the control signal EU1, for example. That is, the variable resistance unit VRlu is an example of a first variable resistance unit that is connected to the power supply line VDD and has a resistance value that changes based on control from the resistance adjustment unit RADJa.

  The variable resistance portion VRld is the same as or similar to the variable resistance portion VRmd. For example, the variable resistance unit VRld is connected between the ground line GND and the terminal PD of the drive switch unit DSWl, and receives the control signal EDl from the resistance adjustment unit RADJa. For example, the resistance value of the variable resistance portion VRld changes according to a change in the value of the control signal EDl. That is, the variable resistance unit VRld is an example of a second variable resistance unit that is connected to the ground line GND and has a resistance value that changes based on control from the resistance adjustment unit RADJa.

  The plurality of drive switch units DSWl are connected in parallel between the variable resistor unit VRlu and the variable resistor unit VRld. For example, each terminal PU of the plurality of drive switch units DSWl is connected to the variable resistor unit VRlu, and each terminal PD of the plurality of drive switch units DSWl is connected to the variable resistor unit VRld. In addition, each terminal OT of the plurality of drive switch units DSWl is connected to the output terminal DO, and each terminal IN of the plurality of drive switch units DSWl is connected to the input terminal DI0. Each terminal EN of the plurality of drive switch units DSWl receives a corresponding control signal ENl among the control signals ENl (ENl1, ENl2,...) Output from the resistance adjustment unit RADJa. Note that the number at the end of the sign of the control signal ENl corresponds to the number at the end of the sign of the drive switch unit DSWl.

  The drive switch unit DSWl is the same as or similar to the drive switch unit DSWm. For example, each drive switch unit DSWl includes an inverter INV, a NOR circuit NOR, a NAND circuit NAND, a P-type MOS transistor MPdr, and an N-type MOS transistor MNdr, like the drive switch unit DSWm. Have Note that the number of drive switch units DSWl may be the same as or different from the number of drive switch units DSWm. For example, the number of drive switch units DSWm of the drive unit DRVm provided corresponding to the most significant bit of the input data DI is equal to the number of drive switch units DSWl of the drive unit DRVl provided corresponding to the least significant bit of the input data DI. It may be more than the number of.

  For example, each drive switch unit DSWl is set to an effective state when receiving a high-level control signal ENl at the terminal EN. The drive switch unit DSWl set in an effective state receives input data at the terminal IN in either a state where the terminal PU and the terminal OT are conductive or a state where the terminal PD and the terminal OT are conductive. Set according to DI0. When the driving switch unit DSWl is not set to an effective state, the terminal OT is set to a state in which neither the terminal PU nor PD is conducted regardless of the input data DI0 received at the terminal IN.

  That is, when the drive switch unit DSWl is set in an effective state, there is a gap between the state in which the variable resistor unit VRlu and the output of the drive unit DRVl are conductive and the output of the variable resistor unit VRld and the drive unit DRVl. It is set according to the input data DI0 to either one of the conductive states.

  The resistance adjustment unit RADJa includes adjustment units ADJ1a and ADJ2. The adjustment unit ADJ1a is an example of a first adjustment unit that executes resistance value adjustment processing for adjusting the resistance values of the first variable resistance unit and the second variable resistance unit for each of the plurality of drive units DRV. For example, the adjustment unit ADJ1a performs a resistance value adjustment process for adjusting the resistance values of the variable resistance units VRmu and VRmd and a resistance value adjustment process for adjusting the resistance values of the variable resistance units VRlu and VRld.

  For example, when the characteristic impedance of the transmission line is 50Ω, the adjustment unit ADJ1a measures the output resistance of the driving unit DRVm, and the resistances of the variable resistance units VRmu and VRmd so that the output resistance of the driving unit DRVm becomes 75Ω. The value is adjusted using the control signals EUm and EDm. Further, the adjustment unit ADJ1a measures the output resistance of the drive unit DRV1, and uses the control signals EUl and EDl to determine the resistance values of the variable resistance units VRlu and VRld so that the output resistance of the drive unit DRVl becomes 150Ω. adjust.

  For example, when executing the resistance value adjustment process for the drive unit DRVm, the resistance adjustment unit RADJa sets all the drive switch units DSWl to an invalid state. The drive switch unit DSWm is set to a predetermined initial state in the first resistance value adjustment process for the drive unit DRVm. Further, for example, when the resistance adjustment unit RADJa executes a resistance value adjustment process for the drive unit DRVl, the resistance adjustment unit RADJa sets all the drive switch units DSWm to an invalid state. The drive switch unit DSWl is set to a predetermined initial state in the first resistance value adjustment process for the drive unit DRVl.

  The adjustment unit ADJ2 adjusts the number of switches for adjusting the number of drive switch units DSWm and DSWl set to an effective state so that the difference in voltage level of the output signal DO becomes equal after the resistance value adjustment process is performed. It is an example of the 2nd adjustment part which performs a process. For example, the adjustment unit ADJ2 measures the voltage level of each output signal DO when the input data DI1 and DI0 are “00”, “01”, “10”, and “11”. Hereinafter, the voltage level of the output signal DO when the input data DI1, DI0 is “00” is also referred to as level 0, and the voltage level of the output signal DO when the input data DI1, DI0 is “01” is Also called level 1. The voltage level of the output signal DO when the input data DI1 and DI0 is “10” is also referred to as level 2. The voltage level of the output signal DO when the input data DI1 and DI0 is “11” is Also called level 3. Further, a value obtained by subtracting level 2 from level 3 is also referred to as a first level difference, and a value obtained by subtracting level 1 from level 2 is also referred to as a second level difference. A value obtained by subtracting the second level difference from the first level difference is also referred to as a level difference evaluation value.

  For example, the adjustment unit ADJ2 calculates the level difference evaluation value based on the measurement result (level 1, level 2 and level 3) of the voltage level of the output signal DO, and the absolute value of the level difference evaluation value is equal to or less than a predetermined value. In this case, it is determined that the voltage level difference of the output signal DO is equal. In this case, the adjustment unit ADJ2 ends the switch number adjustment process without changing the number of the active drive switch units DSWm and DSWl from the current number. As a result, the resistance values of the variable resistance units VRmu, VRmd, VRlu, and VRld and the drive switch units DSWm and DSWl set to an effective state are determined.

  When the level difference evaluation value is a positive value and the absolute value of the level difference evaluation value is greater than a predetermined value, the adjustment unit ADJ2 increases the number of drive switch units DSWm set to an effective state by one. That is, the adjustment unit ADJ2 increases the number of high-level control signals ENm by one when the level difference evaluation value is a positive value and the absolute value of the level difference evaluation value is greater than a predetermined value. Further, when the level difference evaluation value is a negative value and the absolute value of the level difference evaluation value is larger than a predetermined value, the adjustment unit ADJ2 decreases the number of drive switch units DSWm set to an effective state by one. That is, when the level difference evaluation value is a negative value and the absolute value of the level difference evaluation value is greater than the predetermined value, the adjustment unit ADJ2 decreases the number of high level control signals ENm by one.

  When the level difference evaluation value is a positive value and the absolute value of the level difference evaluation value is larger than a predetermined value, the adjustment unit ADJ2 decreases the number of drive switch units DSWl set to an effective state by one. Also good. That is, when the level difference evaluation value is a positive value and the absolute value of the level difference evaluation value is greater than a predetermined value, the adjustment unit ADJ2 may reduce the number of high level control signals ENl by one. Further, when the level difference evaluation value is a negative value and the absolute value of the level difference evaluation value is larger than a predetermined value, the adjustment unit ADJ2 increases the number of drive switch units DSWl set to an effective state by one. Also good. That is, the adjustment unit ADJ2 may increase the number of high-level control signals ENl by one when the level difference evaluation value is a negative value and the absolute value of the level difference evaluation value is greater than a predetermined value.

  When the number of drive switch units DSWm and DSWl set in an effective state is changed by the switch number adjustment process, the adjustment unit ADJ1a includes the drive switch unit DSW in which the number of valid states is changed. The resistance value adjustment process for the drive unit DRV is executed again. Then, after the resistance value adjustment process is executed again, the adjustment unit ADJ2 executes the switch number adjustment process again. That is, the resistance value adjustment process and the switch number adjustment process are repeated until the absolute value of the level difference evaluation value becomes a predetermined value or less.

  As described above, the resistance adjustment unit RADJa cooperatively adjusts the resistance value of the variable resistance unit VR and the number of drive switch units DSW to be set in an effective state, so that the voltage level difference of the output signal DO can be reduced. The output resistance of each drive part DRV can be adjusted so that it may become equal.

  Here, for example, when executing the resistance value adjustment process and the switch number adjustment process, the resistance adjustment unit RADJa connects a measurement termination resistor or the like (not shown) to the output terminal DO, and the driver circuit DRCa is connected to the reception device. When disconnecting, disconnect the termination resistor for measurement from the output terminal DO.

  Note that the configuration of the driver circuit DRCa is not limited to the example shown in FIG. For example, the number of bits of the input data DI may be 3 bits or more. In this case, the driver circuit DRCa has the same number of drive units DRV as the number of bits of the input data DI.

  As described above, in the embodiment illustrated in FIG. 1, the adjustment unit ADJ1a performs the resistance value adjustment process for adjusting the resistance values of the variable resistance units VRmu, VRmu, VRlu, and VRld for each of the plurality of drive units DRV. Then, after the resistance value adjustment processing is executed, the adjustment unit ADJ2 is a switch that adjusts the number of drive switch units DSWm and DSWl that are set to an effective state so that the difference in voltage level of the output signal DO becomes equal. Perform number adjustment processing. In this way, the resistance adjustment unit RADJa can individually adjust the resistance value of the variable resistance unit VR and the number of drive switch units DSW set to an effective state. For this reason, the resistance adjustment unit RADJa cooperatively adjusts the resistance value of the variable resistance unit VR and the number of drive switch units DSW set to an effective state, thereby equalizing the voltage level difference of the output signal DO. Thus, the output resistance of each drive unit DRV can be adjusted to a target resistance value. That is, the value of the output resistance of the driver circuit DRCa can be adjusted so that the voltage level difference of the output signal DO in the multi-value transmission becomes equal.

  FIG. 2 shows another embodiment of a driver circuit and a method for controlling the driver circuit. The same or similar elements as those described in FIG. 1 are denoted by the same or similar reference numerals, and detailed description thereof will be omitted. In the driver circuit DRCb shown in FIG. 2, a replica unit REP is added to the driver circuit DRCa shown in FIG. The driver circuit DRCb has a resistance adjustment unit RADJb instead of the resistance adjustment unit RADJa shown in FIG. The other configuration of the driver circuit DRCb is the same as or similar to that of the driver circuit DRCa shown in FIG.

  The driver circuit DRCb includes a plurality of drive units DRV (DRVm, DRVl) that generate an output signal DO having a voltage level corresponding to the value of the input data DI, and a resistance adjustment unit RADJb that adjusts output resistances of the plurality of drive units DRV. And a replica unit REP. The drive units DRVm and DRVl are the same as or similar to the drive units DRVm and DRVl shown in FIG.

  The resistance adjustment unit RADJb is the same as or similar to the resistance adjustment unit RADJa illustrated in FIG. 1 except that the resistance adjustment unit RADJb includes the adjustment unit ADJ1b instead of the adjustment unit ADJ1a illustrated in FIG. For example, the resistance adjustment unit RADJb includes adjustment units ADJ1b and ADJ2. The adjustment unit ADJ1b is the same as or similar to the adjustment unit ADJ1a illustrated in FIG. 1 except that the replica unit REP is used for the resistance value adjustment process. That is, the adjustment unit ADJ1b is an example of a first adjustment unit that executes resistance value adjustment processing for adjusting the resistance values of the first variable resistance unit and the second variable resistance unit for each of the plurality of drive units DRV. The operation (resistance value adjustment process) of the adjustment unit ADJ1b will be described with reference to FIG. The replica unit REP is a replica of the drive unit DRV. Details of the replica unit REP will be described with reference to FIG. Note that the configuration of the driver circuit DRCb is not limited to the example shown in FIG.

  FIG. 3 shows an example of the variable resistance portions VRmu and VRmd shown in FIG. In FIG. 3, the drive switch unit DSWm is also illustrated for easy understanding of the connection relationship between the variable resistance units VRmu and VRmd and the drive switch unit DSWm.

  The variable resistance unit VRmu includes a plurality of resistance elements RU (RU1, RU2,...) Such as diffusion resistors and a plurality of P-type MOS transistors MP (MP1, MP2) connected in series to the plurality of resistance elements RU. MP2, ...). The number at the end of the sign of the resistance element RU corresponds to the number at the end of the sign of the transistor MP. The plurality of resistance elements RU have the same resistance value, for example.

  One end of each of the plurality of resistance elements RU is connected to the terminal PU of the drive switch unit DSWm, and the other end of each of the plurality of resistance elements RU is connected to the drain of the corresponding transistor MP among the plurality of transistors MP. Is done. The sources of the plurality of transistors MP are connected to the power supply line VDD, and the gates of the plurality of transistors MP correspond to the control signals EUm (EUm1, EUm2,...) Output from the adjustment unit ADJ1b. The control signal EUm is received. The number at the end of the sign of the control signal EUm corresponds to the number at the end of the sign of the transistor MP.

  Thus, in the variable resistance unit VRmu, the transistor MP and the resistance element RU connected in series are connected in parallel between the power supply line VDD and the terminal PU of the drive switch unit DSWm. By changing the number of resistance elements RU connected in parallel between the power supply line VDD and the terminal PU of the drive switch unit DSWm via the on-state transistor MP, the resistance value of the variable resistor unit VRmu is adjusted. . The number of resistance elements RU connected in parallel between the power supply line VDD and the terminal PU of the drive switch unit DSWm via the on-state transistor MP is set by the control signal EUm. For example, the resistance element RU connected to the transistor MP that has received the low-level control signal EUm is connected to the power supply line VDD.

  Note that the voltage between the gate and the source of the transistor MP is maintained at a constant or substantially constant level even when the voltage level of the output signal DO changes because the source of the transistor MP is connected to the power supply line VDD. Therefore, the on-resistance value of the transistor MP is maintained at a constant or almost constant resistance value even when the voltage level of the output signal DO changes.

  The variable resistance portion VRmd includes a plurality of resistance elements RD (RD1, RD2,...) Such as diffusion resistors and a plurality of N-type MOS transistors MN (MN1, MN, MN) connected in series to the plurality of resistance elements RD. MN2, ...). The number at the end of the sign of the resistance element RD corresponds to the number at the end of the sign of the transistor MN. The plurality of resistance elements RD have the same resistance value, for example.

  One end of each of the plurality of resistance elements RD is connected to the terminal PD of the drive switch unit DSWm, and the other end of each of the plurality of resistance elements RD is connected to the drain of the corresponding transistor MN among the plurality of transistors MN. Is done. Each source of the plurality of transistors MN is connected to the ground line GND, and each gate of the plurality of transistors MN corresponds to the control signal EDm (EDm1, EDm2,...) Output from the adjustment unit ADJ1b. The control signal EDm is received. Note that the number at the end of the sign of the control signal EDm corresponds to the number at the end of the sign of the transistor MN.

  As described above, in the variable resistance portion VRmd, the transistor MN and the resistance element RD connected in series are connected in parallel between the ground line GND and the terminal PD of the drive switch portion DSWm. The resistance value of the variable resistance portion VRmd is adjusted by changing the number of resistance elements RD connected in parallel between the ground line GND and the terminal PD of the drive switch portion DSWm via the on-state transistor MN. . The number of resistance elements RD connected in parallel between the ground line GND and the terminal PD of the drive switch unit DSWm via the transistor MN in the on state is set by the control signal EDm. For example, the resistance element RD connected to the transistor MN that has received the high-level control signal EDm is connected to the ground line GND.

  Note that the voltage between the gate and the source of the transistor MN is maintained at a constant or substantially constant level even when the voltage level of the output signal DO changes because the source of the transistor MN is connected to the ground line GND. For this reason, the value of the on-resistance of the transistor MN is kept constant or almost constant even when the voltage level of the output signal DO changes.

  Here, the configuration of the variable resistance unit VRlu illustrated in FIG. 2 is the same as or similar to that of the variable resistance unit VRmd. The number of resistance elements RU included in the variable resistance unit VRlu may be the same as or different from the number of resistance elements RU included in the variable resistance unit VRmu. For example, the number of resistance elements RU included in the variable resistance unit VRmu may be larger than the number of resistance elements RD included in the variable resistance unit VRlu.

  In addition, the configuration of the variable resistance portion VRld illustrated in FIG. 2 is the same as or similar to that of the variable resistance portion VRmd. The number of resistance elements RD included in the variable resistance unit VRld may be the same as or different from the number of resistance elements RD included in the variable resistance unit VRmd. For example, the number of resistance elements RD included in the variable resistance unit VRmd may be greater than the number of resistance elements RD included in the variable resistance unit VRld.

  Note that the configuration of the variable resistance portions VRmu and VRmd is not limited to the example shown in FIG. For example, the resistance elements RU may have different resistance values. The plurality of resistance elements RD may have different resistance values. For example, the resistance value of the i-th resistance element RUi may be a value obtained by adding i times a predetermined resistance value to the resistance value of the resistance element RU0. The resistance value of the i-th resistance element RDi may be a value obtained by adding i times a predetermined resistance value to the resistance value of the resistance element RD0.

  FIG. 4 shows an example of the replica unit REP shown in FIG. The replica unit REP includes a replica drive unit RDRVm used for the resistance value adjustment process for the drive unit DRVm and a replica drive unit RDRVl used for the resistance value adjustment process for the drive unit DRVl. The configuration of the replica drive unit RDRVm is the same as or similar to the configuration of the drive unit DRVm, and the configuration of the replica drive unit RDRVl is the same as or similar to the configuration of the drive unit DRVl. That is, the replica drive unit RDRVm is a replica of the drive unit DRVm, and the replica drive unit RDRVl is a replica of the drive unit DRVl.

  Note that the output of the drive unit DRVm is connected to the output of the drive unit DRVl, but the output of the replica drive unit RDRVm is not connected to the output of the replica drive unit RDRVl. For example, the outputs of the replica driving units RDRVm and RDRVl are connected to respective terminating resistors for measurement (not shown). Thereby, the adjustment unit ADJ1b can easily measure the output resistances of the replica driving units RDRVm and RDRVl as compared with the case where the output of the replica driving unit RDRVm is connected to the output of the replica driving unit RDRVl. For example, the adjustment unit ADJ1b can measure the output resistance of the replica driving unit RDRVm using the output signal RDOm of the replica driving unit RDRVm regardless of the state of the replica driving unit RDRVl. Further, the adjustment unit ADJ1b can measure the output resistance of the replica driving unit RDRVl using the output signal RDOl of the replica driving unit RDRVl regardless of the state of the replica driving unit RDRVm.

  The replica drive unit RDRVm includes a variable resistance unit RVRmu connected to the power supply line VDD, a variable resistance unit RVRmd connected to the ground line GND, and a plurality of drive switch units RDSWm (RDSWm1, RDSWm2,...). .

  The variable resistance unit RVRmu is the same as or similar to the variable resistance unit VRmu. For example, the variable resistance unit RVRmu is connected between the power supply line VDD and the terminal PU of the drive switch unit RDSWm, and receives the control signal REUm from the adjustment unit ADJ1b. The resistance value of the variable resistance unit RVRmu changes according to the value of the control signal REUm, for example. That is, the variable resistance unit RVRmu is an example of a first replica variable resistance unit that is connected to the power supply line VDD and has a resistance value that changes based on control from the resistance adjustment unit RADJb.

  For example, the variable resistance unit RVRmu includes a plurality of resistance elements RU such as diffused resistors and a plurality of P-type MOS transistors MP connected in series to the plurality of resistance elements RU. The number at the end of the sign of the resistance element RU corresponds to the number at the end of the sign of the transistor MP. The number of the plurality of resistance elements RU is, for example, the same number as the plurality of resistance elements RU of the variable resistance unit VRmu.

  The plurality of resistance elements RU of the variable resistance unit RVRmu correspond to the resistance elements RU having the same reference numeral among the plurality of resistance elements RU of the variable resistance unit VRmu. For example, the plurality of resistance elements RU have the same resistance value as the corresponding resistance element RU among the plurality of resistance elements RU of the variable resistance unit VRmu.

  One end of each of the plurality of resistance elements RU is connected to the terminal PU of the drive switch unit RDSWm, and the other end of each of the plurality of resistance elements RU is connected to the drain of the corresponding transistor MP among the plurality of transistors MP. Is done. Sources of the plurality of transistors MP are connected to the power supply line VDD, and gates of the plurality of transistors MP correspond to control signals REUm (REUm1, REUm2,...) Output from the adjustment unit ADJ1b. The control signal REUm is received. Note that the number at the end of the sign of the control signal REUm corresponds to the number at the end of the sign of the transistor MP.

  The variable resistance unit RVRmd is the same as or similar to the variable resistance unit VRmd. For example, the variable resistance unit RVRmd is connected between the ground line GND and the terminal PD of the drive switch unit RDSWm, and receives the control signal REDm from the adjustment unit ADJ1b. For example, the resistance value of the variable resistance unit RVRmd changes according to the value of the control signal REDm. That is, the variable resistance unit RVRmd is an example of a second replica variable resistance unit that is connected to the ground line GND and whose resistance value changes based on control from the resistance adjustment unit RADJb.

  For example, the variable resistance unit RVRmd includes a plurality of resistance elements RD such as diffused resistors and a plurality of N-type MOS transistors MN connected in series to the plurality of resistance elements RD. The number at the end of the sign of the resistance element RD corresponds to the number at the end of the sign of the transistor MP. The number of the plurality of resistance elements RD is, for example, the same number as the plurality of resistance elements RD of the variable resistance portion VRmd.

  The plurality of resistance elements RD of the variable resistance unit RVRmd correspond to the resistance elements RD having the same reference numeral among the plurality of resistance elements RD of the variable resistance unit VRmd. For example, the plurality of resistance elements RD have the same resistance value as the corresponding resistance element RD among the plurality of resistance elements RD of the variable resistance portion VRmd.

  One end of each of the plurality of resistance elements RD is connected to the terminal PD of the drive switch unit RDSWm, and the other end of each of the plurality of resistance elements RD is connected to the drain of the corresponding transistor MN among the plurality of transistors MN. Is done. Each source of the plurality of transistors MN is connected to the ground line GND, and each gate of the plurality of transistors MN corresponds to the control signal REDm (REDm1, REDm2,...) Output from the adjustment unit ADJ1b. The control signal REDm is received. Note that the number at the end of the sign of the control signal REDm corresponds to the number at the end of the sign of the transistor MP.

  The drive switch unit RDSWm is the same as or similar to the drive switch unit DSWm. For example, each drive switch unit RDSWm, like the drive switch unit DSWm, includes an inverter INV, a NOR circuit NOR, a NAND circuit NAND, a P-type MOS transistor MPdr, and an N-type MOS transistor MNdr. Have The number of drive switch units RDSWm is the same as the number of drive switch units DSWm, for example.

  The plurality of drive switch units RDSWm is an example of a plurality of replica drive switch units connected in parallel between the first replica variable resistor unit and the second replica variable resistor unit. For example, the plurality of drive switch units RDSWm are connected in parallel between the variable resistor unit RVRmu and the variable resistor unit RVRmd. That is, each terminal PU of the plurality of drive switch units RDSWm is connected to the variable resistor unit RVRmu, and each terminal PD of the plurality of drive switch units RDSWm is connected to the variable resistor unit RVRmd. Each terminal OT of the plurality of drive switch units RDSWm is connected to the output of the replica drive unit RDRVm. That is, the terminals OT of the plurality of drive switch units RDSWm are connected to each other. Each terminal IN of the plurality of drive switch units RDSWm receives a control signal RDIm output from the resistance adjustment unit RADJb. The control signal RDIm corresponds to input data of the replica driving unit RDRVm.

  In addition, each terminal EN of the plurality of drive switch units RDSWm receives a corresponding control signal RENm among the control signals RENm (RENm1, RENm2,...) Output from the resistance adjustment unit RADJb. The number at the end of the sign of the control signal RENm corresponds to the number at the end of the sign of the drive switch unit RDSWm.

  For example, each drive switch unit RDSWm is set to an effective state when receiving a high-level control signal RENm at the terminal EN. The drive switch unit RDSWm set to an effective state receives a control signal received at the terminal IN in either a state in which the terminal PU and the terminal OT are in conduction or a state in which the terminal PD and the terminal OT are in conduction. It is set according to RDIm. When the drive switch unit RDSWm is not set to an effective state, the terminal OT is set to a state in which neither the terminal PU nor PD is conducted regardless of the control signal RDIm received at the terminal IN.

  That is, when the drive switch unit RDSWm is set in an effective state, one of the variable resistance units RVRmu and RVRmd and the output of the replica drive unit RDRVm are brought into conduction according to the control signal RDIm. Is set.

  The replica drive unit RDRVl is the same as or similar to the replica drive unit RDRVm except for the magnitude of the adjusted output resistance. Therefore, the replica driving unit RDRVl is described by replacing the lowercase letter “m” with the lowercase letter “l” in the above description of the replica driving unit RDRVm.

  For example, the replica driving unit RDRVl includes a variable resistance unit RVRlu connected to the power supply line VDD, a variable resistance unit RVRld connected to the ground line GND, and a plurality of driving switch units RDSWl (RDSWl1, RDSWl2,...). Have The variable resistance unit RVRlu is an example of a first replica variable resistance unit that is connected to the power supply line VDD and has a resistance value that changes based on control from the resistance adjustment unit RADJb. The variable resistance unit RVRld is an example of a second replica variable resistance unit that is connected to the ground line GND and has a resistance value that changes based on control from the resistance adjustment unit RADJb. The plurality of drive switch units RDSW1 are an example of a plurality of replica drive switch units connected in parallel between the first replica variable resistor unit and the second replica variable resistor unit. Note that the configuration of the replica unit REP is not limited to the example illustrated in FIG.

  FIG. 5 shows an example of the output signal DO generated by the PAM4. Level 0 is the voltage level of the output signal DO when the input data DI1, DI0 is “00”, and level 1 is the voltage level of the output signal DO when the input data DI1, DI0 is “01”. is there. Level 2 is the voltage level of the output signal DO when the input data DI1, DI0 is “10”, and level 3 is the voltage of the output signal DO when the input data DI1, DI0 is “11”. Is a level.

  The ideal waveform shows the signal waveform of PAM4 when the value of the output resistance of the drive unit DRV1 is stable at twice the value of the output resistance of the drive unit DRVm regardless of the values of the input data DI1 and DI0. In an ideal waveform, the difference between the voltage levels (level 0, level 1, level 2, level 3) of the output signal DO is equal to each other. For example, the first level difference LD1 obtained by subtracting level 2 from level 3 is equal to the second level difference LD2 obtained by subtracting level 1 from level 2. That is, in an ideal waveform, the level difference evaluation value LDEV obtained by subtracting the second level difference LD2 from the first level difference LD1 is “0”.

  The comparative example shows the signal waveform of PAM4 when the value of the output resistance of the drive unit DRVl is smaller than twice the value of the output resistance of the drive unit DRVm. In the comparative example, the difference in each voltage level (level 0, level 1, level 2, level 3) of the output signal DO varies. For example, the first level difference LD1 is larger than the second level difference LD2. That is, when the value of the output resistance of the drive unit DRVl is smaller than twice the value of the output resistance of the drive unit DRVm, the level difference evaluation value LDEV becomes a positive value. When the value of the output resistance of the driving unit DRVl is larger than twice the value of the output resistance of the driving unit DRVm, the first level difference LD1 becomes smaller than the second level difference LD2, and the level difference evaluation value LDEV is negative. Value.

  The resistance adjustment unit RADJb is configured to stabilize the resistance value of the variable resistance unit VR so that the value of the output resistance of the driving unit DRVl is stabilized at about twice the value of the output resistance of the driving unit DRVm regardless of the values of the input data DI1 and DI0. And the number of drive switch units DSW set to an effective state are coordinately adjusted. That is, the resistance adjustment unit RADJb sets the resistance value of the variable resistance unit VR and the number of drive switch units DSW to be set to an effective state so that the signal waveform of the output signal DO approaches the ideal waveform shown in FIG. To coordinate cooperatively.

  FIG. 6 shows an example of the operation of the driver circuit DRCb shown in FIG. Note that the operation illustrated in FIG. 6 is one mode of the driver circuit control method. The operation illustrated in FIG. 6 is executed by, for example, the resistance adjustment unit RADJb in a state where the driver circuit DRCb is connected to the reception device via the transmission path. In this case, the transmission path is terminated at the receiving device. Therefore, for example, when the resistance adjustment unit RADJb has a measurement termination resistor connected to the output terminal DO, the resistance adjustment unit RADJb separates the measurement termination resistor from the output terminal DO. In the resistance adjustment unit RADJb that does not include the measurement termination resistor connected to the output terminal DO, a process for separating the measurement termination resistor from the output terminal DO does not particularly occur.

  In step S100, the resistance adjustment unit RADJb sets initial values such as the number of drive switch units DSWm and DSWl that are set to an effective state. For example, the resistance adjustment unit RADJb reads a predetermined initial value code from a memory or the like. The initial value code is information indicating the control signal ENm that is first set to a high level among the control signals ENm (ENm1, ENm2,...), And the first of the control signals ENl (ENl1, ENl2,...). Includes information indicating the control signal ENl to be set to a high level. Furthermore, the initial value code includes information indicating the target value of the output resistance of the drive unit DRVm and the target value of the output resistance of the drive unit DRVl. For example, when the characteristic impedance of the transmission line is 50Ω, the target value of the output resistance of the drive unit DRVm is 75Ω, and the target value of the output resistance of the drive unit DRVl is 150Ω.

  The resistance adjustment unit RADJb sets the control signals ENm and ENl indicated by the initial value code to a high level, and sets the other control signals ENm and ENl to a low level. As a result, the number of drive switch units DSWm and DSWl determined by the initial values is set to an effective state.

  Next, in step S200, the adjustment unit ADJ1b of the resistance adjustment unit RADJb executes a resistance value adjustment process for adjusting the resistance value of the variable resistance unit VR for each drive unit DRV. Details of the resistance value adjustment processing will be described with reference to FIG. With the resistance value adjustment processing, the output resistances of the drive units DRVm and DRVl are set to the target values of the respective output resistances or resistance values close to the target values. After the resistance value adjustment process is executed, the operation of the resistance adjustment unit RADJb proceeds to step S300.

  In step S300, the adjustment unit ADJ2 of the resistance adjustment unit RADJb determines whether or not the voltage level difference of the output signal DO of the driver circuit DRCb is equal. For example, the adjustment unit ADJ2 outputs the voltage levels (level 0, level 1, level 2, level 2) of each output signal DO when the input data DI1, DI0 are “00”, “01”, “10”, “11”. Measure level 3). Then, the adjustment unit ADJ2 calculates a first level difference LD1 by subtracting level 2 from level 3, and calculates a second level difference LD2 by subtracting level 1 from level 2. Further, the adjustment unit ADJ2 determines whether or not the absolute value of the difference (level difference evaluation value LDEV) between the first level difference LD1 and the second level difference LD2 is equal to or less than a predetermined value.

  And adjustment part ADJ2 determines with the difference of the voltage level of output signal DO being equal, when the absolute value of the difference of 1st level difference LD1 and 2nd level difference LD2 is below a predetermined value. That is, when the absolute value of the difference between the first level difference LD1 and the second level difference LD2 is greater than a predetermined value, the adjustment unit ADJ2 determines that the voltage level difference of the output signal DO is not equal. When the voltage level difference of the output signal DO is equal, the operation of the resistance adjustment unit RADJb is finished. On the other hand, if the voltage level difference of the output signal DO is not equal, the operation of the resistance adjustment unit RADJb proceeds to step S310.

  In step S310, the adjustment unit ADJ2 executes a switch number adjustment process. By the switch number adjustment process, the number of either one of the drive switch units DSWm and DSWl set to an effective state is increased or decreased. As a result, the number of transistors MPdr and MNdr used as on-resistances increases and decreases, and the ratio between the value of the output resistance of the drive unit DRVm and the value of the output resistance of the drive unit DRVl is adjusted. Details of the switch number adjustment processing will be described with reference to FIG. After the switch number adjustment process is executed, the operation of the resistance adjustment unit RADJb returns to Step S200. That is, the resistance value adjustment process in step S200 and the switch number adjustment process in step S310 are repeated until the voltage level difference of the output signal DO becomes equal. As described above, the resistance value adjustment process and the switch number adjustment process are repeated until the variation in the voltage level difference of the output signal DO becomes equal to or less than a predetermined value.

  Note that the operation of the driver circuit DRCb is not limited to the example shown in FIG. For example, the resistance adjustment unit RADJb outputs the voltage level (level 0, level 1, level 2) of each output signal DO when the input data DI1, DI0 are “00”, “01”, “10”, “11”. The measurement result of level 3) may be acquired from the receiving device. Alternatively, the resistance adjustment unit RADJb may perform the operation illustrated in FIG. 6 in a state where the driver circuit DRCb is not connected to the reception device via the transmission path. In this case, for example, in step S100, the resistance adjustment unit RADJb connects the measurement termination resistor to the output terminal DO, and disconnects the measurement termination resistor from the output terminal DO when the operation illustrated in FIG.

  FIG. 7 shows an example of the resistance value adjustment process shown in FIG. The process from step S210 to step S219 is an example of a resistance value adjustment process for the drive unit DRVm, and the process from step S220 to step S229 is an example of a resistance value adjustment process for the drive unit DRVl. The code “L” shown in FIG. 7 indicates a low level, and the code “H” indicates a high level. Step S210 is executed after the processing of either step S100 or S310 shown in FIG. 6 is executed.

  In step S210, the adjustment unit ADJ1b sets the number of use of the drive switch unit RDSWm according to the number of use of the drive switch unit DSWm. The number of drive switch units DSWm used is the number of drive switch units DSWm set in an effective state, and the number of drive switch units RDSWm used is the number of drive switch units RDSWm set in an effective state.

  For example, after the process of step S100 is executed, the adjustment unit ADJ1b sets the number of drive switch units RDSWm determined by the initial value to an effective state using the control signal RENm. In addition, after the process of step S310 is performed, the adjustment unit ADJ1b uses the control signal RENm to drive the same number of drive switch units RDSWm as the drive switch units DSWm that are set to an effective state by the switch number adjustment process. Set to a valid state.

  Next, in step S211, the adjustment unit ADJ1b sets the control signal RDIm to a low level and sets all the transistors MN in the variable resistance unit RVRmd to an on state. That is, the adjustment unit ADJ1b sets the control signal RDIm to a low level, and sets the transistor MNdr in the drive switch unit RDSWm set to an effective state to an on state. Furthermore, the adjustment unit ADJ1b sets all the control signals REDm to a high level, and sets all the transistors MN in the variable resistance unit RVRmd to an on state. Since all the transistors MN in the variable resistance unit RVRmd are set to the on state, the initial value of the variable resistance unit RVRmd is set to the minimum resistance value within the adjustable range. By the processing in step S211, the replica driving unit RDRVm is set to a state in which the output resistance RM connected to the ground line GND can be measured.

  Next, in step S212, the adjustment unit ADJ1b measures the output resistance RM of the replica driving unit RDRVm. For example, the adjustment unit ADJ1b measures the output resistance RM of the replica drive unit RDRVm so that the voltage level of the output signal RDOm of the replica drive unit RDRVm becomes a design value of either level 0 or level 1. As a result, the output resistance RM represented by the sum of the combined resistance of the on-resistance of the transistor MNdr of the drive switch section RDSWm and the variable resistance section RVRmd set in an effective state is measured.

  Next, in step S213, the adjustment unit ADJ1b determines whether or not the output resistance RM measured in step S212 is smaller than a target value (for example, 75Ω) of the output resistance of the drive unit DRVm. When the output resistance RM is smaller than the target value of the output resistance of the drive unit DRVm, the operation of the adjustment unit ADJ1b proceeds to step S214. On the other hand, when the output resistance RM is equal to or higher than the target value of the output resistance of the drive unit DRVm, the adjustment unit ADJ1b holds information indicating the number of ON transistors MN in the variable resistance unit RVRmd, and operates in step S215. Move to.

  In step S214, the adjustment unit ADJ1b reduces the number of on-state transistors MN in the variable resistance unit RVRmd. For example, the adjustment unit ADJ1b decreases the number of high-level control signals REDm by one, and decreases the number of on-state transistors MN in the variable resistance unit RVRmd by one. As a result, the number of resistance elements RD connected in parallel is reduced by 1, and the resistance value of the variable resistance portion RVRmd is increased.

  After the process of step S214 is performed, the operation of the adjustment unit ADJ1b returns to step S212. That is, the number of ON transistors MN in the variable resistance unit RVRmd is reduced until the output resistance RM of the replica driving unit RDRVm becomes equal to or higher than the target value of the output resistance of the driving unit DRVm. Thereby, the output resistance RM of the replica driving unit RDRVm is set to a target value of the output resistance of the driving unit DRVm or a resistance value close to the target value.

  In step S215, the adjustment unit ADJ1b sets the control signal RDIm to a high level and sets all the transistors MP in the variable resistance unit RVRmu to an on state. That is, the adjustment unit ADJ1b sets the control signal RDIm to a high level, and sets the transistor MPdr of the drive switch unit RDSWm set to an effective state to an on state. Further, the adjustment unit ADJ1b sets all the control signals REUm to a low level, and sets all the transistors MP in the variable resistance unit RVRmu to an on state. Since all the transistors MP in the variable resistance unit RVRmu are set to the on state, the initial value of the variable resistance unit RVRmu is set to the minimum resistance value within the adjustable range. By the process of step S215, the replica driving unit RDRVm is set to a state in which the output resistance RM connected to the power supply line VDD can be measured.

  Next, in step S216, the adjustment unit ADJ1b measures the output resistance RM of the replica driving unit RDRVm. For example, the adjustment unit ADJ1b measures the output resistance RM of the replica driving unit RDRVm so that the voltage level of the output signal RDOm of the replica driving unit RDRVm becomes a design value of either level 2 or level 3. As a result, the output resistance RM represented by the sum of the combined resistance of the on-resistance of the transistor MPdr of the drive switch section RDSWm and the variable resistance section RVRmu set to an effective state is measured.

  Next, in step S217, the adjustment unit ADJ1b determines whether or not the output resistance RM measured in step S216 is smaller than a target value (for example, 75Ω) of the output resistance of the drive unit DRVm. When the output resistance RM is smaller than the target value of the output resistance of the drive unit DRVm, the operation of the adjustment unit ADJ1b proceeds to step S218. On the other hand, when the output resistance RM is greater than or equal to the target value of the output resistance of the drive unit DRVm, the adjustment unit ADJ1b holds information indicating the number of ON-state transistors MP in the variable resistance unit RVRmu and performs the operation in step S219. Move to.

  In step S218, the adjustment unit ADJ1b reduces the number of on-state transistors MP in the variable resistance unit RVRmu. For example, the adjustment unit ADJ1b decreases the number of low-level control signals REUm by one, and decreases the number of on-state transistors MP in the variable resistance unit RVRmu by one. As a result, the number of resistance elements RU connected in parallel is reduced by 1, and the resistance value of the variable resistance unit RVRmu is increased.

  After the process of step S218 is executed, the operation of the adjustment unit ADJ1b returns to step S216. That is, the number of ON transistors MP in the variable resistance unit RVRmu is reduced until the output resistance RM of the replica driving unit RDRVm becomes equal to or higher than the target value of the output resistance of the driving unit DRVm. Thereby, the output resistance RM of the replica driving unit RDRVm is set to a target value of the output resistance of the driving unit DRVm or a resistance value close to the target value.

  In step S219, the adjustment unit ADJ1b sets the resistance values of the variable resistance units VRmu and VRmd. For example, the adjustment unit ADJ1b determines the number of on-state transistors MN in the variable resistance unit VRmd (the final value) based on the number of on-state transistors MN in the variable resistance unit RVRmd set in the processing from step S211 to step S214. ) To the same number. As a result, the resistance value of the variable resistance unit VRmd is the same as the resistance value of the variable resistance unit RVRmd when the output resistance RM is determined to be greater than or equal to the target value of the output resistance of the driving unit DRVm in the determination of step S213. Set to almost the same value.

  Further, for example, the adjustment unit ADJ1b determines the number of the on-state transistors MP in the variable resistance unit VRmu by the number of the on-state transistors MP in the variable resistance unit RVRmu set by the processing from step S215 to step S218 ( Set to the same number as the final value. Thereby, the resistance value of the variable resistance unit VRmu is the same value as the resistance value of the variable resistance unit RVRmu when the output resistance RM is determined to be equal to or larger than the target value of the output resistance of the driving unit DRVm in the determination of step S217. Set to almost the same value.

  As described above, the output resistance of the drive unit DRVm is set to a target value of the output resistance of the drive unit DRVm or a resistance value close to the target value by the process of step S219. When the process of step S219 ends, the resistance value adjustment process for the drive unit DRVm ends. And adjustment part ADJ1b moves operation | movement to step S220, and starts the resistance value adjustment process with respect to the drive part DRVl.

  Since the process from step S220 to step S229 is the same as the process from step S210 to step S219, detailed description is abbreviate | omitted. For example, details of the processing from step S220 to step S229 are explained by replacing the lowercase letter “m” with the lowercase letter “l” in the description of the processing from step S210 to step S219.

  In step S220, the adjustment unit ADJ1b sets the number of uses of the drive switch unit RDSWl in accordance with the number of uses of the drive switch unit DSWl. The number of use of the drive switch unit DSWl is the number of drive switch units DSWl set to an effective state, and the number of use of the drive switch unit RDSWl is the number of drive switch units RDSWl set to an effective state.

  Next, in step S221, the adjustment unit ADJ1b sets the control signal RDI1 to a low level and sets all the transistors MN in the variable resistance unit RVRld to an on state. Since all the transistors MN of the variable resistance unit RVRld are set to the on state, the initial value of the variable resistance unit RVRld is set to the minimum resistance value within the adjustable range. By the process of step S221, the replica driving unit RDRV1 is set to a state in which the output resistance RL connected to the ground line GND can be measured.

  Next, in step S222, the adjustment unit ADJ1b measures the output resistance RL of the replica driving unit RDRVl. For example, the adjustment unit ADJ1b measures the output resistance RL of the replica drive unit RDRVl so that the voltage level of the output signal RDOl of the replica drive unit RDRVl becomes a design value of either level 0 or level 2. As a result, the output resistance RL represented by the sum of the combined resistance of the on-resistance of the transistor MNdr of the drive switch section RDSW1 and the variable resistance section RVRld set to an effective state is measured.

  Next, in step S223, the adjustment unit ADJ1b determines whether or not the output resistance RL measured in step S222 is smaller than a target value (for example, 150Ω) of the output resistance of the drive unit DRVl. When the output resistance RL is smaller than the target value of the output resistance of the drive unit DRVl, the operation of the adjustment unit ADJ1b proceeds to step S224. On the other hand, when the output resistance RL is greater than or equal to the target value of the output resistance of the drive unit DRVl, the adjustment unit ADJ1b holds information indicating the number of ON transistors MN in the variable resistance unit RVRld, and performs the operation in step S225. Move to.

  In step S224, the adjustment unit ADJ1b reduces the number of on-state transistors MN in the variable resistance unit RVRld. After the process of step S224 is executed, the operation of the adjustment unit ADJ1b returns to step S222. That is, the number of ON transistors MN in the variable resistance unit RVRld is reduced until the output resistance RL of the replica driving unit RDRVl becomes equal to or higher than the target value of the output resistance of the driving unit DRVl. Thereby, the output resistance RL of the replica drive unit RDRVl is set to a target value of the output resistance of the drive unit DRVl or a resistance value close to the target value.

  In step S225, the adjustment unit ADJ1b sets the control signal RDI1 to a high level and sets all the transistors MP in the variable resistance unit RVRlu to an on state. Since all the transistors MP of the variable resistance unit RVRlu are set to the ON state, the initial value of the variable resistance unit RVRlu is set to the minimum resistance value within the adjustable range. By the processing in step S225, the replica driving unit RDRV1 is set to a state in which the output resistance RL connected to the power supply line VDD can be measured.

  Next, in step S226, the adjustment unit ADJ1b measures the output resistance RL of the replica driving unit RDRVl. For example, the adjustment unit ADJ1b measures the output resistance RL of the replica drive unit RDRVl so that the voltage level of the output signal RDOl of the replica drive unit RDRVl becomes a design value of either level 1 or level 3. As a result, the output resistance RL represented by the sum of the combined resistance of the on-resistance of the transistor MPdr of the drive switch section RDSW1 and the variable resistance section RVRlu set in an effective state is measured.

  Next, in step S227, the adjustment unit ADJ1b determines whether or not the output resistance RL measured in step S226 is smaller than a target value (for example, 150Ω) of the output resistance of the drive unit DRVl. When the output resistance RL is smaller than the target value of the output resistance of the drive unit DRV1, the operation of the adjustment unit ADJ1b proceeds to step S228. On the other hand, when the output resistance RL is greater than or equal to the target value of the output resistance of the drive unit DRVl, the adjustment unit ADJ1b holds information indicating the number of on-state transistors MP in the variable resistance unit RVRlu, and performs the operation in step S229. Move to.

  In step S228, the adjustment unit ADJ1b reduces the number of on-state transistors MP in the variable resistance unit RVRlu. After the process of step S228 is executed, the operation of the adjustment unit ADJ1b returns to step S226. That is, the number of transistors MP in the ON state in the variable resistance unit RVRlu is reduced until the output resistance RL of the replica driving unit RDRVl becomes equal to or higher than the target value of the output resistance of the driving unit DRVl. Thereby, the output resistance RL of the replica drive unit RDRVl is set to a target value of the output resistance of the drive unit DRVl or a resistance value close to the target value.

  In step S229, the adjustment unit ADJ1b sets the resistance values of the variable resistance units VRlu and VRld. For example, the adjustment unit ADJ1b determines the number of the on-state transistors MN in the variable resistor unit VRld by the number of the on-state transistors MN in the variable resistor unit RVRld set in the processes from step S221 to step S224 (final value). ) To the same number. Further, for example, the adjustment unit ADJ1b determines the number of the on-state transistors MP in the variable resistor unit VRlu by the number of the on-state transistors MP in the variable resistor unit RVRlu set by the processing from step S225 to step S228 ( Set to the same number as the final value.

  By the process of step S229, the output resistance of the drive unit DRVl is set to a target value of the output resistance of the drive unit DRVl or a resistance value close to the target value. When the process of step S229 ends, the resistance value adjustment process for the drive unit DRV1 ends. After the resistance value adjustment process for the drive unit DRVl is completed, the operation of the resistance adjustment unit RADJb proceeds to step S300 illustrated in FIG. In this way, the resistance adjustment unit RADJb individually adjusts the resistance values of the variable resistance units VRmu and VRlu and the resistance values of the variable resistance units VRmd and VRld.

  The resistance value adjusting process is not limited to the example shown in FIG. For example, the adjustment unit ADJ1b may set the resistance value of the variable resistance unit VRmd before executing the process of step S215, and may set the resistance value of the variable resistance unit VRld before executing the process of step S225.

  FIG. 8 shows an example of the switch number adjustment process shown in FIG. The process of step S311 is executed when it is determined in step S300 shown in FIG. 6 that the voltage level difference of the output signal DO is not equal.

  In step S311, the adjustment unit ADJ2 determines whether or not the first level difference LD1 is greater than the second level difference LD2. As described with reference to FIG. 5, the first level difference LD1 is the voltage level (level 3) of the output signal DO when the input data DI1 and DI0 are “11” and the input data DI1 and DI0 are “10”. The difference from the voltage level (level 2) of the output signal DO in this case. Further, the second level difference LD2 is the voltage level (level 2) of the output signal DO when the input data DI1, DI0 is “10” and the voltage level of the output signal DO when the input data DI1, DI0 is “01”. This is the difference from (Level 1).

  When the first level difference LD1 is larger than the second level difference LD2, the operation of the adjustment unit ADJ2 moves to step S312. On the other hand, when the first level difference LD1 is smaller than the second level difference LD2, the operation of the adjustment unit ADJ2 moves to step S313.

  In step S312, the adjustment unit ADJ2 increases the number of drive switch units DSWm to be set to an effective state. The number of increases may be one or a number corresponding to the difference between the first level difference LD1 and the second level difference LD2. For example, the adjustment unit ADJ2 increases the number of high level control signals ENm by one. As a result, the combined resistance of the on-resistances of the transistors MPdr connected in parallel in the drive unit DRVm and the combined resistance of the on-resistances of the transistors MNdr connected in parallel are reduced, and the output resistance of the drive unit DRVm is reduced. As a result, the value obtained by dividing the value of the output resistance of the drive unit DRVl by the value of the output resistance of the drive unit DRVm increases. After the process of step S312 is executed, the operation of the resistance adjustment unit RADJb returns to step S200 shown in FIG. That is, since the number of drive switch units DSWm to be set to an effective state has been changed, the resistance value adjustment process is executed again.

  In step S313, the adjustment unit ADJ2 reduces the number of drive switch units DSWm that are set to an effective state. The number of reductions may be one or a number corresponding to the difference between the first level difference LD1 and the second level difference LD2. For example, the adjustment unit ADJ2 reduces the number of high level control signals ENm by one. As a result, the combined resistance of the on-resistances of the transistors MPdr connected in parallel in the driving unit DRVm and the combined resistance of the on-resistances of the transistors MNdr connected in parallel increase, and the output resistance of the driving unit DRVm increases. As a result, the value obtained by dividing the value of the output resistance of the drive unit DRVl by the value of the output resistance of the drive unit DRVm decreases. After the process of step S313 is executed, the operation of the resistance adjustment unit RADJb returns to step S200 shown in FIG. That is, since the number of drive switch units DSWm to be set to an effective state has been changed, the resistance value adjustment process is executed again.

  The switch number adjustment process is not limited to the example shown in FIG. Further, in the resistance value adjustment process executed after the switch number adjustment process shown in FIG. 8 is executed, the number of drive switch units DSWl to be set to an effective state is not changed, so that the steps from step S220 shown in FIG. The processing up to S229 may be omitted.

  FIG. 9 shows another example of the switch number adjustment processing shown in FIG. The process of step S311 is the same process as step S311 shown in FIG. 8, and is executed when it is determined in step S300 shown in FIG. 6 that the voltage level difference of the output signal DO is not equal. The

  In step S311, the adjustment unit ADJ2 determines whether or not the first level difference LD1 is greater than the second level difference LD2. When the first level difference LD1 is larger than the second level difference LD2, the operation of the adjustment unit ADJ2 moves to step S314. On the other hand, when the first level difference LD1 is smaller than the second level difference LD2, the operation of the adjustment unit ADJ2 moves to step S315.

  In step S314, the adjustment unit ADJ2 reduces the number of drive switch units DSWl that are set to an effective state. The number of reductions may be one or a number corresponding to the difference between the first level difference LD1 and the second level difference LD2. For example, the adjustment unit ADJ2 reduces the number of high level control signals ENl by one. As a result, the combined resistance of the on-resistances of the transistors MPdr connected in parallel in the driving unit DRVl and the combined resistance of the on-resistances of the transistors MNdr connected in parallel increase, and the output resistance of the driving unit DRVl increases. As a result, the value obtained by dividing the value of the output resistance of the drive unit DRVl by the value of the output resistance of the drive unit DRVm increases. After the process of step S314 is executed, the operation of the resistance adjustment unit RADJb returns to step S200 shown in FIG. That is, since the number of drive switch units DSWl to be set to an effective state has been changed, the resistance value adjustment process is executed again.

  In step S315, the adjustment unit ADJ2 increases the number of drive switch units DSWl set to an effective state. The number of increases may be one or a number corresponding to the difference between the first level difference LD1 and the second level difference LD2. For example, the adjustment unit ADJ2 increases the number of high level control signals ENl by one. As a result, the combined resistance of the on-resistances of the transistors MPdr connected in parallel in the driving unit DRVl and the combined resistance of the on-resistances of the transistors MNdr connected in parallel are reduced, and the output resistance of the driving unit DRVl is reduced. As a result, the value obtained by dividing the value of the output resistance of the drive unit DRVl by the value of the output resistance of the drive unit DRVm decreases. After the process of step S315 is executed, the operation of the resistance adjustment unit RADJb returns to step S200 shown in FIG. That is, since the number of drive switch units DSWl to be set to an effective state has been changed, the resistance value adjustment process is executed again.

  The switch number adjustment process is not limited to the example shown in FIG. Further, in the resistance value adjustment process executed after the switch number adjustment process shown in FIG. 9 is executed, the number of drive switch units DSWm to be set to an effective state is not changed. The processing up to S219 may be omitted.

  As described above, the resistance adjustment unit RADJb cooperatively adjusts the resistance value of the variable resistance unit VR and the number of drive switch units DSW to be set to an effective state, so that the voltage level difference of the output signal DO can be reduced. The output resistance of each drive part DRV can be adjusted so that it may become equal.

For example, consider a case where the on-resistances of the transistors MPdr and MNdr fluctuate by 30% in the opposite directions between the drive unit DRVm and the drive unit DRV1 when the design values are as follows. The design value of the variable resistance part VRl is 138Ω, and the design value of the variable resistance part VRm is 59Ω. Also,
In the case of level 0 and level 3, the design value of the combined resistance of the drive switch unit DSWl set to an effective state is 11Ω, and the design value of the combined resistor of the drive switch unit DSWm set to an effective state is 15Ω. . In the case of level 1 and level 2, the design value of the combined resistance of the drive switch section DSWl set to the effective state is 30Ω, and the design value of the combined resistance of the drive switch section DSWm set to the effective state is 22Ω. It is. In this case, the four voltage levels (level 0, level 1, level 2, level 3) of the output signal DO are about 0.2486 * VDD, 0.4165 * VDD, 0.5835 * VDD, and 0.7514 *, respectively. VDD. An index indicating the uniformity of the voltage level of the output signal DO (3 times the minimum value of the level difference divided by the difference between level 3 and level 0) is about 0.996.

  When the ON resistances of the transistors MPdr and MNdr are swung by 30% in the opposite directions between the drive unit DRVm and the drive unit DRVl, a comparative example in which only the variable resistance unit VR of the drive switch unit DSW and the variable resistance unit VR can be adjusted. The driver circuit is adjusted as follows.

  The adjusted resistance value of the variable resistance portion VRl is about 141.5Ω, and the adjusted resistance value of the variable resistance portion VRm is about 55.5Ω. In the case of level 0 and level 3, the on-resistance of the transistor of the drive switch section DSWl is about 8.46 (= 11 / 1.3) Ω, and the on-resistance of the transistor of the drive switch section DSWm is about 19. 5 (= 15 * 1.3) Ω. In the case of level 1 and level 2, the on-resistance of the transistor of the drive switch unit DSWl is about 23.1 (= 30 / 1.3) Ω, and the on-resistance of the transistor of the drive switch unit DSWm is about 28. 6 (= 22 * 1.3) Ω. In this case, the four voltage levels (level 0, level 1, level 2, and level 3) of the output signal DO are about 0.25 * VDD, 0.4234 * VDD, 0.5766 * VDD, and 0.75 *, respectively. VDD. The index representing the uniformity of the voltage level of the output signal DO is reduced to about 0.919.

  On the other hand, in the driver circuit DRCb, since the number of drive switch units DSW set to an effective state and the resistance value of the variable resistor unit VR can be coordinately adjusted, the value of the combined resistance of the drive switch unit DSW and the variable resistor The resistance value of the portion VR can be adjusted to a value almost the same as the design value. That is, the index indicating the uniformity of the voltage level of the output signal DO is maintained at about 0.996, which is improved by about 8% compared to the driver circuit of the comparative example.

  As described above, also in the embodiment shown in FIG. 2 to FIG. 9, the same effect as that of the embodiment shown in FIG. 1 can be obtained. For example, the adjustment unit ADJ1b performs the resistance value adjustment process for the drive unit DRVm, and the number of drive switch units RDSWm in the valid state of the replica drive unit RDRVm is the same as the number of drive switch units DSWm in the valid state of the drive unit DRVm. Set to. Then, the adjustment unit ADJ1b adjusts the resistance values of the variable resistance units RVRmu and RVRmd so that the output resistance of the replica driving unit RDRVm becomes the target value of the output resistance of the driving unit DRVm. Thereafter, the adjustment unit ADJ1b adjusts the resistance values of the variable resistance units VRmu and VRmd of the drive unit DRVm based on the adjustment results of the variable resistance units RVRmu and RVRmd.

  In addition, the adjustment unit ADJ1b performs the resistance value adjustment process for the drive unit DRVl by setting the number of drive switch units RDSWl in the valid state of the replica drive unit RDRVl to the same number as the number of drive switch units DSWl in the valid state of the drive unit DRVl. Set to. Then, the adjustment unit ADJ1b adjusts the resistance values of the variable resistance units RVRlu and RVRld so that the output resistance of the replica driving unit RDRVl becomes the target value of the output resistance of the driving unit DRVl. Thereafter, the adjustment unit ADJ1b adjusts the resistance values of the variable resistance units VRlu and VRld of the drive unit DRVl based on the adjustment results of the variable resistance units RVRlu and RVRld.

  In addition, the adjustment unit ADJ2 is a switch that adjusts the number of drive switch units DSWm and DSWl that are set to an effective state so that the difference in voltage level of the output signal DO becomes equal after the resistance value adjustment process is performed. Perform number adjustment processing. Then, the resistance adjustment unit RADJb repeats the resistance value adjustment process and the switch number adjustment process until the variation in the voltage level difference of the output signal DO becomes a predetermined value or less. Thereby, the output resistance of each drive part DRV can be adjusted to a target resistance value so that the difference in the voltage level of the output signal DO becomes equal. That is, the value of the output resistance of the driver circuit DRCb can be adjusted so that the difference in voltage level of the output signal DO in multilevel transmission is equalized.

  Furthermore, since the adjustment unit ADJ1b performs the resistance value adjustment process using the replica driving units RDRVm and RDRVl, the resistance value adjustment process can be easily performed as compared with the case where the replica driving units RDRVm and RDRVl are not used. Further, the output of the replica driving unit RDRVm is not connected to the output of the replica driving unit RDRVl. Therefore, the adjustment unit ADJ1b can easily measure the output resistances of the replica driving units RDRVm and RDRVl as compared to the case where the output of the replica driving unit RDRVm is connected to the output of the replica driving unit RDRVl.

  FIG. 10 shows another embodiment of a driver circuit and a method for controlling the driver circuit. Elements that are the same as or similar to those described in FIGS. 1 to 9 are given the same or similar reference numerals, and detailed descriptions thereof are omitted. The driver circuit DRCc shown in FIG. 10 has the driver circuit DRCb shown in FIG. 2 except that it has a replica drive part RDRV and a resistance adjustment part RADJc instead of the replica part REP and the resistance adjustment part RADJb shown in FIG. Is the same or similar.

  The driver circuit DRCc includes a plurality of drive units DRV (DRVm, DRVl) that generate an output signal DO having a voltage level corresponding to the value of the input data DI, and a resistance adjustment unit RADJc that adjusts output resistances of the plurality of drive units DRV. And a replica drive unit RDRV. The drive units DRVm and DRVl are the same as or similar to the drive units DRVm and DRVl shown in FIG.

  In the drive units DRVm and DRVl shown in FIG. 10, the steps for adjusting the resistance values of the variable resistance units VRmu and VRlu are the same between the drive unit DRVm and the drive unit DRVl. Further, the increment in adjusting the resistance values of the variable resistance portions VRmd and VRld is the same between the drive portion DRVm and the drive portion DRVl. For example, the plurality of resistance elements RU included in the variable resistance units VRmu and VRlu have the same resistance value, and the plurality of resistance elements RD included in the variable resistance units VRmd and VRld have the same resistance value. In this case, for example, the number of resistance elements RU included in the variable resistance unit VRmu is twice the number of resistance elements RU included in the variable resistance unit VRlu, and the number of resistance elements RD included in the variable resistance unit VRmd is This is twice the number of resistance elements RD included in the portion VRld. Note that the number of resistance elements RU and RD included in the variable resistance units VRmu and VRmd is not limited to twice the number of resistance elements RU and RD included in the variable resistance units VRlu and VRld, respectively.

  The resistance adjustment unit RADJc is the same as or similar to the resistance adjustment unit RADJb shown in FIG. 1 except that it has an adjustment unit ADJ1c instead of the adjustment unit ADJ1b shown in FIG. For example, the resistance adjustment unit RADJc includes adjustment units ADJ1c and ADJ2. The adjustment unit ADJ1c is the same as the adjustment unit ADJ1b shown in FIG. 2, except that the replica drive unit RDRV is used instead of the replica drive units RDRVm and RDRV1, and the resistance value adjustment process is executed. It is the same. That is, the adjustment unit ADJ1c is an example of a first adjustment unit that executes resistance value adjustment processing for adjusting the resistance values of the first variable resistance unit and the second variable resistance unit for each of the plurality of drive units DRV. The operation (resistance value adjustment process) of the adjustment unit ADJ1c will be described with reference to FIG. The operation of the driver circuit DRCc is the same as or similar to the operation shown in FIG. 6 except for the resistance value adjustment process.

  The replica drive unit RDRV is a replica of the drive unit DRV, and is commonly used in each resistance value adjustment process for the plurality of drive units DRV (DRVm, DRVl). For example, the replica driving unit RDRV is the same as or similar to the replica driving unit RDRVm shown in FIG. Details of the replica driving unit RDRV will be described with reference to FIG. Note that the configuration of the driver circuit DRCc is not limited to the example shown in FIG.

  FIG. 11 shows an example of the replica driving unit RDRV shown in FIG. The configuration of the replica drive unit RDRV is, for example, the same as or similar to the configuration of the drive unit DRVm. That is, the configuration of the replica drive unit RDRV is the same as or similar to the configuration of the replica drive unit RDRVm shown in FIG. The same or similar elements as those described in FIG. 4 are denoted by the same or similar reference numerals, and detailed description thereof will be omitted. The output of the replica drive unit RDRV is connected to a measurement termination resistor (not shown), for example.

  The replica drive unit RDRV includes a variable resistance unit RVRu connected to the power supply line VDD, a variable resistance unit RVRd connected to the ground line GND, and a plurality of drive switch units RDSW (RDSW1, RDSW2,...). .

  The variable resistance unit RVRu is the same as or similar to the variable resistance unit RVRmu shown in FIG. For example, the variable resistance unit RVRu is connected between the power supply line VDD and the terminals PU of the plurality of drive switch units RDSW, and receives the control signal REU from the adjustment unit ADJ1c. The resistance value of the variable resistance unit RVRu changes according to the value of the control signal REU, for example. That is, the variable resistance unit RVRu is an example of a first replica variable resistance unit that is connected to the power supply line VDD and whose resistance value changes based on control from the resistance adjustment unit RADJc.

  The number of the plurality of resistance elements RU in the variable resistance unit RVRu is, for example, the number of the plurality of resistance elements RU in the variable resistance unit VRmu illustrated in FIG. 10 and the number of the plurality of resistance elements RU in the variable resistance unit VRlu. It is the same as the larger number. Further, for example, the plurality of resistance elements RU in the variable resistance unit RVRu and the plurality of resistance elements RU in the variable resistance units VRmu and VRlu illustrated in FIG. 10 have the same resistance value.

  The variable resistance portion RVRd is the same as or similar to the variable resistance portion RVRmd shown in FIG. For example, the variable resistance unit RVRd is connected between the ground line GND and the terminals PD of the plurality of drive switch units RDSW, and receives the control signal RED from the adjustment unit ADJ1c. The resistance value of the variable resistance unit RVRd changes according to the value of the control signal RED, for example. That is, the variable resistance unit RVRd is an example of a second replica variable resistance unit that is connected to the ground line GND and has a resistance value that changes based on control from the resistance adjustment unit RADJc.

  The number of the plurality of resistance elements RD in the variable resistance section RVRd is, for example, the number of the plurality of resistance elements RD in the variable resistance section VRmd and the number of the plurality of resistance elements RD in the variable resistance section VRld shown in FIG. It is the same as the larger number. Further, for example, the plurality of resistance elements RD in the variable resistance unit RVRd and the plurality of resistance elements RD in the variable resistance units VRmd and VRld illustrated in FIG. 10 have the same resistance value.

  The drive switch unit RDSW is the same as or similar to the drive switch unit RDSWm shown in FIG. That is, the plurality of drive switch units RDSW is an example of a plurality of replica drive switch units connected in parallel between the first replica variable resistor unit and the second replica variable resistor unit. For example, the number of drive switch units RDSW is the same as the larger one of the number of drive switch units DSWm and the number of drive switch units DSWl shown in FIG. Note that the configuration of the replica driving unit RDRV is not limited to the example shown in FIG.

  FIG. 12 shows an example of resistance value adjustment processing by the driver circuit DRCc shown in FIG. Each process from step S230 to step S239 corresponds to each process from step S210 to step S219 shown in FIG. Each process from step S240 to step S249 corresponds to each process from step S220 to step S229 shown in FIG. That is, the process from step S230 to step S239 is an example of a resistance value adjustment process for the drive unit DRVm, and the process from step S240 to step S249 is an example of a resistance value adjustment process for the drive unit DRVl. Detailed descriptions of operations similar to those shown in FIG. 7 are omitted. In FIG. 12, a case where the number of variable resistance units VRm in the drive unit DRVm is larger than the number of variable resistance units VRl in the drive unit DRVl will be described as an example. Step S230 is executed after any one of steps S100 and S310 shown in FIG. 6 is executed.

  In step S230, the adjustment unit ADJ1c sets the number of uses of the drive switch unit RDSW in accordance with the number of uses of the drive switch unit DSWm. For example, the adjustment unit ADJ1c sets the number of drive switch units RDSWm determined by the initial value to an effective state using the control signal REN after the process of step S100 is executed. In addition, after the process of step S310 is executed, the adjustment unit ADJ1c uses the control signal REN to drive the same number of drive switch units RDSW as the drive switch units DSWm that are set to an effective state by the switch number adjustment process. Set to a valid state.

  Next, in step S231, the adjustment unit ADJ1c sets the control signal RDI to a low level and sets all the transistors MN in the variable resistance unit RVRd to an on state. That is, the adjustment unit ADJ1c sets the control signal RDI to a low level and sets all the control signals RED to a high level. Thus, the replica driving unit RDRV is set to a state in which the output resistance RM connected to the ground line GND can be measured.

  Next, in step S232, the adjustment unit ADJ1c measures the output resistance RM of the replica driving unit RDRV. For example, the adjustment unit ADJ1c measures the output resistance RM of the replica driving unit RDRV so that the voltage level of the output signal RDO of the replica driving unit RDRV becomes a design value of either level 0 or level 1.

  Next, in step S233, the adjustment unit ADJ1c determines whether or not the output resistance RM measured in step S242 is smaller than a target value (for example, 75Ω) of the output resistance of the drive unit DRVm. When the output resistance RM is smaller than the target value of the output resistance of the drive unit DRVm, the operation of the adjustment unit ADJ1c moves to step S234. On the other hand, when the output resistance RM is equal to or higher than the target value of the output resistance of the drive unit DRVm, the adjustment unit ADJ1c holds information indicating the number of ON transistors MN in the variable resistance unit RVRd, and operates in step S235. Move to.

  In step S234, the adjustment unit ADJ1c reduces the number of ON-state transistors MN in the variable resistance unit RVRd. For example, the adjustment unit ADJ1c decreases the number of high-level control signals RED by one, and decreases the number of on-state transistors MN in the variable resistance unit RVRd by one. After the process of step S234 is executed, the operation of the adjustment unit ADJ1c returns to step S232. That is, the number of ON transistors MN in the variable resistance unit RVRd is reduced until the output resistance RM of the replica driving unit RDRV becomes equal to or higher than the target value of the output resistance of the driving unit DRVm. Thereby, the output resistance RM of the replica driving unit RDRV is set to a target value of the output resistance of the driving unit DRVm or a resistance value close to the target value.

  In step S235, the adjustment unit ADJ1c sets the control signal RDI to a high level and sets all the transistors MP in the variable resistance unit RVRu to an on state. That is, the adjustment unit ADJ1c sets the control signal RDI to a high level and sets all the control signals REU to a low level. As a result, the replica driving unit RDRV is set in a state where the output resistance RM connected to the power supply line VDD can be measured.

  Next, in step S236, the adjustment unit ADJ1c measures the output resistance RM of the replica driving unit RDRV. For example, the adjustment unit ADJ1c measures the output resistance RM of the replica driving unit RDRV so that the voltage level of the output signal RDO of the replica driving unit RDRV becomes a design value of either level 2 or level 3.

  Next, in step S237, the adjustment unit ADJ1c determines whether or not the output resistance RM measured in step S236 is smaller than a target value (for example, 75Ω) of the output resistance of the drive unit DRVm. When the output resistance RM is smaller than the target value of the output resistance of the drive unit DRVm, the operation of the adjustment unit ADJ1c moves to step S238. On the other hand, when the output resistance RM is equal to or larger than the target value of the output resistance of the drive unit DRVm, the adjustment unit ADJ1c holds information indicating the number of ON transistors MP in the variable resistance unit RVRu, and performs the operation in step S239. Move to.

  In step S238, the adjustment unit ADJ1c reduces the number of on-state transistors MP in the variable resistance unit RVRu. For example, the adjustment unit ADJ1c decreases the number of low-level control signals REU by one, and decreases the number of on-state transistors MP in the variable resistance unit RVRu by one. After the process of step S238 is executed, the operation of the adjustment unit ADJ1c returns to step S236. That is, the number of transistors MP in the ON state in the variable resistance unit RVRu is reduced until the output resistance RM of the replica driving unit RDRV becomes equal to or higher than the target value of the output resistance of the driving unit DRVm. Thereby, the output resistance RM of the replica driving unit RDRV is set to a target value of the output resistance of the driving unit DRVm or a resistance value close to the target value.

  In step S239, the adjustment unit ADJ1c sets the resistance values of the variable resistance units VRmu and VRmd. For example, the adjustment unit ADJ1c determines the number of on-state transistors MN in the variable resistance unit VRmd (the final value) based on the number of on-state transistors MN in the variable resistance unit RVRd set in the processes from Step S231 to Step S234. ) To the same number. Thereby, the resistance value of the variable resistance unit VRmd is equal to the resistance value of the variable resistance unit RVRd when the output resistance RM is determined to be equal to or larger than the target value of the output resistance of the driving unit DRVm in the determination of step S233, or Set to almost the same value.

  Further, for example, the adjusting unit ADJ1c determines the number of the on-state transistors MP in the variable resistor unit VRu by the number of the on-state transistors MP in the variable resistor unit RVRu (set by the processing from step S235 to step S238). Set to the same number as the final value. Thereby, the resistance value of the variable resistance unit VRmu is equal to the resistance value of the variable resistance unit RVRu when the output resistance RM is determined to be greater than or equal to the target value of the output resistance of the drive unit DRVm in the determination of step S237. Set to almost the same value.

  As described above, the output resistance of the drive unit DRVm is set to the target value of the output resistance of the drive unit DRVm or a resistance value close to the target value by the process of step S239. When the process in step S239 is completed, the resistance value adjustment process for the drive unit DRVm is completed. Then, the adjustment unit ADJ1c moves the operation to Step S240 and starts a resistance value adjustment process for the drive unit DRVl.

  Since the processing from step S240 to step S249 is the same as the processing from step S230 to step S239, detailed description thereof is omitted. For example, details of the processing from step S240 to step S249 are explained by replacing the lowercase letter “m” with the lowercase letter “l” in the description of the processing from step S230 to step S239.

  In step S240, the adjustment unit ADJ1c sets the number of uses of the drive switch unit RDSW in accordance with the number of uses of the drive switch unit DSWl.

  Next, in step S241, the adjustment unit ADJ1c sets the control signal RDI to a low level and sets a predetermined number of transistors MN in the variable resistance unit RVRd to an on state. The predetermined number is, for example, the same number as the number of resistance elements RD in the variable resistance part VRld of the drive part DRVl. In this case, the number of on-state transistors MN in the variable resistance unit RVRd is set to the same number as the number of resistance elements RD in the variable resistance unit VRld of the drive unit DRVl. For this reason, the initial value of the variable resistance unit RVRd is set to the minimum resistance value within the adjustable range of the variable resistance unit VRld of the drive unit DRVl. By the processing in step S241, the replica driving unit RDRV is set to a state in which the output resistance RL connected to the ground line GND can be measured.

  Next, in step S242, the adjustment unit ADJ1c measures the output resistance RL of the replica driving unit RDRV. For example, the adjustment unit ADJ1c measures the output resistance RL of the replica driving unit RDRV so that the voltage level of the output signal RDO of the replica driving unit RDRV becomes a design value of either level 0 or level 2.

  Next, in step S243, the adjustment unit ADJ1c determines whether or not the output resistance RL measured in step S242 is smaller than a target value (for example, 150Ω) of the output resistance of the drive unit DRV. When the output resistance RL is smaller than the target value of the output resistance of the drive unit DRV, the operation of the adjustment unit ADJ1c moves to step S244. On the other hand, when the output resistance RL is greater than or equal to the target value of the output resistance of the drive unit DRV1, the adjustment unit ADJ1c holds information indicating the number of ON transistors MN in the variable resistance unit RVRd, and performs the operation in step S245. Move to.

  In step S244, the adjustment unit ADJ1c reduces the number of on-state transistors MN in the variable resistance unit RVRd. After the process of step S244 is executed, the operation of the adjustment unit ADJ1c returns to step S242. That is, the number of ON transistors MN in the variable resistance unit RVRd is reduced until the output resistance RL of the replica driving unit RDRV becomes equal to or higher than the target value of the output resistance of the driving unit DRVl. As a result, the output resistance RL of the replica drive unit RDRV is set to a target value of the output resistance of the drive unit DRVl or a resistance value close to the target value.

  In step S245, the adjustment unit ADJ1c sets the control signal RDI to a high level and sets a predetermined number of transistors MP in the variable resistance unit RVRu to an on state. The predetermined number is, for example, the same number as the number of resistance elements RU in the variable resistance unit VRlu of the drive unit DRVl. In this case, the number of on-state transistors MP in the variable resistance unit RVRu is set to be the same as the number of resistance elements RU in the variable resistance unit VRlu of the drive unit DRVl. For this reason, the initial value of the variable resistance unit RVRu is set to the minimum resistance value within the adjustable range of the variable resistance unit VRlu of the drive unit DRVl. By the processing in step S245, the replica driving unit RDRV is set to a state in which the output resistance RL connected to the power supply line VDD can be measured.

  Next, in step S246, the adjustment unit ADJ1c measures the output resistance RL of the replica driving unit RDRV. For example, the adjustment unit ADJ1c measures the output resistance RL of the replica driving unit RDRV so that the voltage level of the output signal RDO of the replica driving unit RDRV becomes a design value of either level 1 or level 3.

  Next, in step S247, the adjustment unit ADJ1c determines whether or not the output resistance RL measured in step S246 is smaller than a target value (for example, 150Ω) of the output resistance of the drive unit DRVl. When the output resistance RL is smaller than the target value of the output resistance of the drive unit DRV1, the operation of the adjustment unit ADJ1c moves to step S248. On the other hand, when the output resistance RL is greater than or equal to the target value of the output resistance of the drive unit DRVl, the adjustment unit ADJ1c holds information indicating the number of ON transistors MP in the variable resistance unit RVRu, and performs the operation in step S249. Move to.

  In step S248, the adjustment unit ADJ1c reduces the number of on-state transistors MP in the variable resistance unit RVRu. After the process of step S248 is executed, the operation of the adjustment unit ADJ1c returns to step S246. That is, the number of transistors MP in the ON state in the variable resistance unit RVRu is decreased until the output resistance RL of the replica driving unit RDRV becomes equal to or higher than the target value of the output resistance of the driving unit DRVl. As a result, the output resistance RL of the replica drive unit RDRV is set to a target value of the output resistance of the drive unit DRVl or a resistance value close to the target value.

  In step S249, the adjustment unit ADJ1c sets the resistance values of the variable resistance units VRlu and VRld. For example, the adjustment unit ADJ1c determines the number of on-state transistors MN in the variable resistance unit VRld as the number of on-state transistors MN in the variable resistance unit RVRd (final value) set in the processing from step S241 to step S244. ) To the same number.

  Further, for example, the adjustment unit ADJ1c determines the number of on-state transistors MP in the variable resistance unit RVRu, which is set by the processing from step S245 to step S248 (the number of on-state transistors MP in the variable resistance unit VRlu). Set to the same number as the final value.

  By the processing in step S249, the output resistance of the drive unit DRVl is set to a target value of the output resistance of the drive unit DRVl or a resistance value close to the target value. When the process in step S249 is completed, the resistance value adjustment process for the drive unit DRV1 is completed. After the resistance value adjustment process for the drive unit DRVl is completed, the operation of the resistance adjustment unit RADJc proceeds to step S300 illustrated in FIG.

  The resistance value adjustment process is not limited to the example shown in FIG. For example, the adjustment unit ADJ1c may set the resistance value of the variable resistance unit VRmd before executing the process of step S235, and may set the resistance value of the variable resistance unit VRld before executing the process of step S245. Further, in the resistance value adjustment process executed after the switch number adjustment process shown in FIG. 8 is executed, the number of drive switch units DSWl to be set to an effective state is not changed, so the process from step S240 to step S249 is performed. May be omitted. Alternatively, in the resistance value adjustment process executed after the switch number adjustment process shown in FIG. 9 is executed, the number of drive switch units DSWm to be set to an effective state is not changed, so the process from step S230 to step S239 is performed. May be omitted.

  As described above, also in the embodiment shown in FIGS. 10 to 12, the same effect as the embodiment shown in FIGS. 2 to 9 can be obtained. For example, the adjustment unit ADJ1c performs the resistance value adjustment process on the drive unit DRVm, and the number of drive switch units RDSW in the valid state of the replica drive unit RDRV is the same as the number of drive switch units DSWm in the valid state of the drive unit DRVm. Set to. Then, the adjustment unit ADJ1c adjusts the resistance values of the variable resistance units RVRu and RVRd so that the output resistance of the replica driving unit RDRV becomes the target value of the output resistance of the driving unit DRVm. Thereafter, the adjustment unit ADJ1c adjusts the resistance values of the variable resistance units VRmu and VRmd of the drive unit DRVm based on the adjustment results of the variable resistance units RVRu and RVRd.

  In addition, the adjustment unit ADJ1c performs the resistance value adjustment process for the drive unit DRVl by setting the number of drive switch units RDSW in the valid state of the replica drive unit RDRV to the same number as the number of drive switch units DSWl in the valid state of the drive unit DRVl. Set to. Then, the adjustment unit ADJ1c adjusts the resistance values of the variable resistance units RVRu and RVRd so that the output resistance of the replica driving unit RDRV becomes the target value of the output resistance of the driving unit DRVl. Thereafter, the adjustment unit ADJ1c adjusts the resistance values of the variable resistance units VRlu and VRld of the drive unit DRVl based on the adjustment results of the variable resistance units RVRu and RVRd.

  In addition, the adjustment unit ADJ2 is a switch that adjusts the number of drive switch units DSWm and DSWl that are set to an effective state so that the difference in voltage level of the output signal DO becomes equal after the resistance value adjustment process is performed. Perform number adjustment processing. Then, the resistance adjustment unit RADJc repeats the resistance value adjustment process and the switch number adjustment process until the variation in the voltage level difference of the output signal DO becomes a predetermined value or less. Thereby, the output resistance of each drive part DRV can be adjusted to a target resistance value so that the difference in the voltage level of the output signal DO becomes equal. That is, the value of the output resistance of the driver circuit DRCc can be adjusted so that the difference in voltage level of the output signal DO in multi-value transmission is equalized.

  Further, the replica drive unit RDRV is used in common in each resistance value adjustment process for a plurality of drive units DRV (DRVm, DRVl). As a result, the circuit scale can be reduced as compared with the driver circuit DRCb having the replica driving units RDRVm and RDRVl used in the respective resistance value adjusting processes for the driving units DRVm and DRVl.

  FIG. 13 shows an example of a device on which the driver circuit DRC (DRCa, DRCb, DRCc) shown in FIGS. 1, 2, and 10 is mounted. The driver circuit DRC is one of the driver circuits DRCa, DRCb, and DRCc shown in FIGS. For example, the driver circuit DRC is mounted on a transmission circuit SC (SC1, SC2) included in an information processing device IPE (IPE1, IPE2) such as a server. Each information processing device IPE (IPE1, IPE2) includes an arithmetic unit CU (CU1, CU2) such as a CPU (Central Processing Unit), a reception circuit RC (RC1, RC2), and a transmission circuit SC (SC1, SC2). Have. For example, the transmission circuit SC includes a driver circuit DRC.

  The information processing devices IPE1 and IPE2 are connected to each other via a transmission path. For example, the transmission circuit SC1 of the information processing device IPE1 transmits the data received from the arithmetic unit CU1 to the reception circuit RC2 of the information processing device IPE2 using the driver circuit DRC. Then, the reception circuit RC2 of the information processing device IPE2 outputs the data received from the driver circuit DRC of the information processing device IPE1 to the arithmetic unit CU2. Thus, the driver circuit DRC enables data transmission between the information processing devices IPE1 and IPE2.

The inventions described in the above embodiments are organized and disclosed as additional notes as follows.
(Appendix 1)
A plurality of driving units which are provided corresponding to a plurality of bits of input data, and whose outputs are connected to each other, and which generate an output signal having a voltage level corresponding to the value of the input data;
A resistance adjustment unit that adjusts the output resistance of the plurality of drive units,
Each of the plurality of driving units is
A first variable resistance unit connected to a power supply line to which a power supply voltage is supplied and having a resistance value that changes based on control from the resistance adjustment unit;
A second variable resistance unit connected to a ground line and having a resistance value changed based on control from the resistance adjustment unit;
When the first variable resistor unit and the second variable resistor unit are connected in parallel and set in an effective state by the resistance adjustment unit, the first variable resistor unit and the output of the drive unit A plurality of drive switch units that are set according to the input data, either in a state in which they are conductive or in a state in which the second variable resistance unit and the output of the drive unit are conductive,
The resistance adjuster is
A first adjustment unit that executes resistance value adjustment processing for adjusting the respective resistance values of the first variable resistance unit and the second variable resistance unit for each of the plurality of drive units;
After the resistance value adjustment process is executed, a second adjustment process is executed to adjust the number of drive switch units that are set to an effective state so that the difference in voltage level between the output signals becomes equal. And a driver circuit.
(Appendix 2)
In the driver circuit described in Appendix 1,
It further has a replica part used for the resistance value adjustment process,
The number of bits of the input data is 2 bits,
The plurality of driving units are a first driving unit that receives a signal of one bit of the 2-bit input data, and a second driving unit that receives a signal of the other bit of the 2-bit input data. Department,
The replica part is
A first replica driving unit used for the resistance value adjusting process for the first driving unit;
A second replica driving unit used for the resistance value adjustment process for the second driving unit;
Each of the first replica driving unit and the second replica driving unit is
A first replica variable resistance unit connected to the power supply line, the resistance value of which changes based on control from the resistance adjustment unit;
A second replica variable resistance unit connected to the ground line and having a resistance value that changes based on control from the resistance adjustment unit;
When the first replica variable resistance unit and the second replica variable resistance unit are connected in parallel and are set in an effective state by the resistance adjustment unit, the first replica variable resistance unit and the replica drive unit A plurality of states set based on control from the resistance adjustment unit, either in a state in which the output of the second replica variable resistance unit and the output of the replica driving unit are in a conductive state. And a replica drive switch part of
The first adjustment unit includes:
As the resistance value adjusting process for the first driving unit, the number of replica driving switch units in the effective state of the first replica driving unit is set to the number of driving switch units in the effective state of the first driving unit. The first replica variable resistance unit and the second replica variable resistance unit are set to the same number so that the output resistance of the first replica drive unit becomes a target value of the output resistance of the first drive unit. Each resistance value is adjusted, and based on the adjustment result of the first replica variable resistor unit and the second replica variable resistor unit, the first variable resistor unit and the second variable resistor unit of the first drive unit Adjust each resistance value of
As the resistance value adjusting process for the second driving unit, the number of replica driving switch units in the effective state of the second replica driving unit is set to the number of driving switch units in the effective state of the second driving unit. The first replica variable resistance unit and the second replica variable resistance unit are set so that the output resistance of the second replica drive unit becomes a target value of the output resistance of the second drive unit. Each resistance value is adjusted, and based on the adjustment result of the first replica variable resistor unit and the second replica variable resistor unit, the first variable resistor unit and the second variable resistor unit of the second drive unit Adjust each resistance value of
The resistance adjuster is
The driver circuit, wherein the resistance value adjustment process and the switch number adjustment process are repeated until a variation in a difference in voltage level of the output signal becomes a predetermined value or less.
(Appendix 3)
In the driver circuit described in Appendix 1,
A replica driving unit that is commonly used in each of the resistance value adjustment processes for the plurality of driving units;
The number of bits of the input data is 2 bits,
The plurality of driving units are a first driving unit that receives a signal of one bit of the 2-bit input data, and a second driving unit that receives a signal of the other bit of the 2-bit input data. Department,
The step when adjusting the resistance value of the first variable resistance unit is the same between the first driving unit and the second driving unit, and the step when adjusting the resistance value of the second variable resistance unit. Is the same between the first drive unit and the second drive unit,
The replica driver is
A first replica variable resistance unit connected to the power supply line, the resistance value of which changes based on control from the resistance adjustment unit;
A second replica variable resistance unit connected to the ground line and having a resistance value that changes based on control from the resistance adjustment unit;
When the first replica variable resistance unit and the second replica variable resistance unit are connected in parallel and are set in an effective state by the resistance adjustment unit, the first replica variable resistance unit and the replica drive unit A plurality of states set based on control from the resistance adjustment unit, either in a state in which the output of the second replica variable resistance unit and the output of the replica driving unit are in a conductive state. And a replica drive switch part of
The first adjustment unit includes:
As the resistance value adjustment processing for the first drive unit, the number of replica drive switch units in an effective state is set to the same number as the number of drive switch units in an effective state of the first drive unit, and the replica The resistance values of the first replica variable resistance unit and the second replica variable resistance unit are adjusted so that the output resistance of the driving unit becomes the target value of the output resistance of the first driving unit, and the first Based on the adjustment results of the replica variable resistor unit and the second replica variable resistor unit, the respective resistance values of the first variable resistor unit and the second variable resistor unit of the first drive unit are adjusted,
As the resistance value adjusting process for the second drive unit, the number of replica drive switch units in an effective state is set to the same number as the number of drive switch units in an effective state of the second drive unit, and the replica The resistance values of the first replica variable resistance unit and the second replica variable resistance unit are adjusted so that the output resistance of the drive unit becomes a target value of the output resistance of the second drive unit, and the first Based on the adjustment results of the replica variable resistor unit and the second replica variable resistor unit, the respective resistance values of the first variable resistor unit and the second variable resistor unit of the second drive unit are adjusted,
The resistance adjuster is
The driver circuit, wherein the resistance value adjustment process and the switch number adjustment process are repeated until a variation in a difference in voltage level of the output signal becomes a predetermined value or less.
(Appendix 4)
In the driver circuit according to any one of appendix 1 to appendix 3,
The number of drive switch units of the drive unit provided corresponding to the most significant bit of the input data is greater than the number of drive switch units of the drive unit provided corresponding to the least significant bit of the input data. A featured driver circuit.
(Appendix 5)
In the driver circuit according to any one of appendix 1 to appendix 4,
The resistance adjustment unit individually adjusts a resistance value of the first variable resistance unit and a resistance value of the second variable resistance unit.
(Appendix 6)
A plurality of driving units that are provided corresponding to a plurality of bits of input data and whose outputs are connected to each other and generate an output signal having a voltage level corresponding to the value of the input data, and outputs of the plurality of driving units A resistance adjusting unit that adjusts a resistance, and each of the plurality of driving units is connected to a power supply line to which a power supply voltage is supplied, and a resistance value is changed based on control from the resistance adjusting unit. A variable resistance unit, a second variable resistance unit connected to a ground line and having a resistance value that changes based on control from the resistance adjustment unit, and between the first variable resistance unit and the second variable resistance unit When connected in parallel and set to an effective state by the resistance adjustment unit, a state in which the first variable resistance unit and the output of the driving unit are electrically connected, and the second variable resistance unit and the driving unit Either in the state of conduction between the output A plurality of control method of the driver circuit and a driving switch unit that is set in accordance with the entry force data,
The first adjustment unit included in the resistance adjustment unit performs a resistance value adjustment process for adjusting the respective resistance values of the first variable resistance unit and the second variable resistance unit for each of the plurality of drive units,
The second adjustment unit included in the resistance adjustment unit sets the number of drive switch units that are set to an effective state so that the difference in voltage level of the output signal is equalized after the resistance value adjustment process is performed. A method for controlling a driver circuit, comprising performing adjustment processing for the number of switches to be adjusted.
(Appendix 7)
In the method for controlling the driver circuit according to attachment 6,
The driver circuit further includes a replica unit used for the resistance value adjustment processing, the number of bits of the input data is 2 bits, and the plurality of driving units are one of the input data of 2 bits. A first driving unit that receives a signal of the second bit, and a second driving unit that receives a signal of the other bit of the input data of 2 bits, wherein the replica unit is connected to the first driving unit. A first replica driving unit used for the resistance value adjusting process; and a second replica driving unit used for the resistance value adjusting process for the second driving unit. And each of the second replica driving units is connected to the power supply line, connected to the first replica variable resistance unit whose resistance value changes based on control from the resistance adjustment unit, and the ground line, Resistance adjustment section And a second replica variable resistance section whose resistance value changes based on the control, and is connected in parallel between the first replica variable resistance section and the second replica variable resistance section, and is more effective by the resistance adjustment section. A state in which the output of the first replica variable resistance unit and the replica driving unit is conducted and a state in which the output of the second replica variable resistance unit and the replica driving unit are conducted when the state is set. And having a plurality of replica drive switch units set based on the control from the resistance adjusting unit,
As the resistance value adjustment process for the first driving unit, the first adjusting unit determines the number of replica driving switch units in an effective state of the first replica driving unit as an effective state of the first driving unit. And the first replica variable resistance section and the first replica variable resistance section so that the output resistance of the first replica driving section becomes a target value of the output resistance of the first driving section. The first variable resistance unit of the first drive unit is adjusted based on the adjustment results of the first replica variable resistance unit and the second replica variable resistance unit by adjusting respective resistance values of the second replica variable resistance unit. And adjusting the resistance value of each of the second variable resistance parts,
As the resistance value adjusting process for the second drive unit, the first adjustment unit sets the number of replica drive switch units in an effective state of the second replica drive unit to an effective state of the second drive unit. And the first replica variable resistance section and the second replica driving section so that the output resistance of the second replica driving section becomes a target value of the output resistance of the second driving section. The first variable resistance unit of the second drive unit is adjusted based on the adjustment results of the first replica variable resistance unit and the second replica variable resistance unit by adjusting respective resistance values of the second replica variable resistance unit. And adjusting the resistance value of each of the second variable resistance parts,
The method of controlling a driver circuit, wherein the resistance adjustment unit repeats the resistance value adjustment process and the switch number adjustment process until a variation in a difference in voltage level of the output signal becomes a predetermined value or less.
(Appendix 8)
In the method for controlling the driver circuit according to attachment 6,
The driver circuit further includes a replica driving unit commonly used in the resistance value adjustment processing for the plurality of driving units, the number of bits of the input data is 2 bits, and the plurality of driving units are A first driving unit that receives a signal of one bit of the 2-bit input data, and a second driving unit that receives a signal of the other bit of the 2-bit input data; The step when adjusting the resistance value of the first variable resistance unit is the same between the first drive unit and the second drive unit, and the step when adjusting the resistance value of the second variable resistor unit is The first driving unit is the same as the second driving unit, and the replica driving unit is connected to the power supply line, and the first replica variable whose resistance value changes based on control from the resistance adjusting unit Connected to the resistance portion and the ground wire, A second replica variable resistance portion whose resistance value changes based on control from the resistance adjustment portion; and a parallel connection between the first replica variable resistance portion and the second replica variable resistance portion; Between the state in which the first replica variable resistance unit and the output of the replica driving unit are electrically connected and the output of the second replica variable resistance unit and the replica driving unit. When having a plurality of replica drive switch units that are set based on the control from the resistance adjustment unit in any of the states that are conductive,
As the resistance value adjustment process for the first drive unit, the first adjustment unit has the same number of replica drive switch units in an effective state as the number of drive switch units in an effective state of the first drive unit. The resistance values of the first replica variable resistance unit and the second replica variable resistance unit are set so that the output resistance of the replica driving unit becomes a target value of the output resistance of the first driving unit. And the respective resistances of the first variable resistor unit and the second variable resistor unit of the first drive unit based on the adjustment results of the first replica variable resistor unit and the second replica variable resistor unit. Adjust the value,
As the resistance value adjusting process for the second driving unit, the first adjusting unit has the same number of replica driving switch units in an effective state as the number of driving switch units in an effective state of the second driving unit. The resistance values of the first replica variable resistance unit and the second replica variable resistance unit are set so that the output resistance of the replica driving unit becomes a target value of the output resistance of the second driving unit. And adjusting the respective resistances of the first variable resistor unit and the second variable resistor unit of the second drive unit based on the adjustment results of the first replica variable resistor unit and the second replica variable resistor unit. Adjust the value,
The method of controlling a driver circuit, wherein the resistance adjustment unit repeats the resistance value adjustment process and the switch number adjustment process until a variation in a difference in voltage level of the output signal becomes a predetermined value or less.
(Appendix 9)
In the method for controlling a driver circuit according to any one of appendix 6 to appendix 8,
The method of controlling a driver circuit, wherein the resistance adjustment unit individually adjusts a resistance value of the first variable resistance unit and a resistance value of the second variable resistance unit.

  From the above detailed description, features and advantages of the embodiments will become apparent. This is intended to cover the features and advantages of the embodiments described above without departing from the spirit and scope of the claims. Also, any improvement and modification should be readily conceivable by those having ordinary knowledge in the art. Therefore, there is no intention to limit the scope of the inventive embodiments to those described above, and appropriate modifications and equivalents included in the scope disclosed in the embodiments can be used.

  ADJ1a, ADJ1b, ADJ1c, ADJ2... Adjustment unit; DRCa, DRCb, DRCc... Driver circuit; DRVl, DRVm... Drive unit; Type MOS transistor; MP, MPdr, P type MOS transistor; NAND, NAND circuit; NOR, NOR circuit; RADJa, RADJb, RADJc, resistance adjustment unit; RD, RU, resistance element; RDRV, RDRV1, RDRVm: replica drive unit; REP: replica unit; VRld, VRlu, VRmd, VRmu, RVRd, RVRld, RVRlu, RVRmd, RVRmu, RVRu ... variable resistance unit

Claims (6)

A plurality of driving units which are provided corresponding to a plurality of bits of input data, and whose outputs are connected to each other, and which generate an output signal having a voltage level corresponding to the value of the input data;
A resistance adjustment unit that adjusts the output resistance of the plurality of drive units,
Each of the plurality of driving units is
A first variable resistance unit connected to a power supply line to which a power supply voltage is supplied and having a resistance value that changes based on control from the resistance adjustment unit;
A second variable resistance unit connected to a ground line and having a resistance value changed based on control from the resistance adjustment unit;
When the first variable resistor unit and the second variable resistor unit are connected in parallel and set in an effective state by the resistance adjustment unit, the first variable resistor unit and the output of the drive unit A plurality of drive switch units that are set according to the input data, either in a state in which they are conductive or in a state in which the second variable resistance unit and the output of the drive unit are conductive,
The resistance adjuster is
A first adjustment unit that executes resistance value adjustment processing for adjusting the respective resistance values of the first variable resistance unit and the second variable resistance unit for each of the plurality of drive units;
After the resistance value adjustment process is executed, a second adjustment process is executed to adjust the number of drive switch units that are set to an effective state so that the difference in voltage level between the output signals becomes equal. And a driver circuit. The driver circuit according to claim 1,
It further has a replica part used for the resistance value adjustment process,
The number of bits of the input data is 2 bits,
The plurality of driving units are a first driving unit that receives a signal of one bit of the 2-bit input data, and a second driving unit that receives a signal of the other bit of the 2-bit input data. Department,
The replica part is
A first replica driving unit used for the resistance value adjusting process for the first driving unit;
A second replica driving unit used for the resistance value adjustment process for the second driving unit;
Each of the first replica driving unit and the second replica driving unit is
A first replica variable resistance unit connected to the power supply line, the resistance value of which changes based on control from the resistance adjustment unit;
A second replica variable resistance unit connected to the ground line and having a resistance value that changes based on control from the resistance adjustment unit;
When the first replica variable resistance unit and the second replica variable resistance unit are connected in parallel and are set in an effective state by the resistance adjustment unit, the first replica variable resistance unit and the replica drive unit A plurality of states set based on control from the resistance adjustment unit, either in a state in which the output of the second replica variable resistance unit and the output of the replica driving unit are in a conductive state. And a replica drive switch part of
The first adjustment unit includes:
As the resistance value adjusting process for the first driving unit, the number of replica driving switch units in the effective state of the first replica driving unit is set to the number of driving switch units in the effective state of the first driving unit. The first replica variable resistance unit and the second replica variable resistance unit are set to the same number so that the output resistance of the first replica drive unit becomes a target value of the output resistance of the first drive unit. Each resistance value is adjusted, and based on the adjustment result of the first replica variable resistor unit and the second replica variable resistor unit, the first variable resistor unit and the second variable resistor unit of the first drive unit Adjust each resistance value of
As the resistance value adjusting process for the second driving unit, the number of replica driving switch units in the effective state of the second replica driving unit is set to the number of driving switch units in the effective state of the second driving unit. The first replica variable resistance unit and the second replica variable resistance unit are set so that the output resistance of the second replica drive unit becomes a target value of the output resistance of the second drive unit. Each resistance value is adjusted, and based on the adjustment result of the first replica variable resistor unit and the second replica variable resistor unit, the first variable resistor unit and the second variable resistor unit of the second drive unit Adjust each resistance value of
The resistance adjuster is
The driver circuit, wherein the resistance value adjustment process and the switch number adjustment process are repeated until a variation in a difference in voltage level of the output signal becomes a predetermined value or less. The driver circuit according to claim 1,
A replica driving unit that is commonly used in each of the resistance value adjustment processes for the plurality of driving units;
The number of bits of the input data is 2 bits,
The plurality of driving units are a first driving unit that receives a signal of one bit of the 2-bit input data, and a second driving unit that receives a signal of the other bit of the 2-bit input data. Department,
The step when adjusting the resistance value of the first variable resistance unit is the same between the first driving unit and the second driving unit, and the step when adjusting the resistance value of the second variable resistance unit. Is the same between the first drive unit and the second drive unit,
The replica driver is
A first replica variable resistance unit connected to the power supply line, the resistance value of which changes based on control from the resistance adjustment unit;
A second replica variable resistance unit connected to the ground line and having a resistance value that changes based on control from the resistance adjustment unit;
When the first replica variable resistance unit and the second replica variable resistance unit are connected in parallel and are set in an effective state by the resistance adjustment unit, the first replica variable resistance unit and the replica drive unit A plurality of states set based on control from the resistance adjustment unit, either in a state in which the output of the second replica variable resistance unit and the output of the replica driving unit are in a conductive state. And a replica drive switch part of
The first adjustment unit includes:
As the resistance value adjustment processing for the first drive unit, the number of replica drive switch units in an effective state is set to the same number as the number of drive switch units in an effective state of the first drive unit, and the replica The resistance values of the first replica variable resistance unit and the second replica variable resistance unit are adjusted so that the output resistance of the driving unit becomes the target value of the output resistance of the first driving unit, and the first Based on the adjustment results of the replica variable resistor unit and the second replica variable resistor unit, the respective resistance values of the first variable resistor unit and the second variable resistor unit of the first drive unit are adjusted,
As the resistance value adjusting process for the second drive unit, the number of replica drive switch units in an effective state is set to the same number as the number of drive switch units in an effective state of the second drive unit, and the replica The resistance values of the first replica variable resistance unit and the second replica variable resistance unit are adjusted so that the output resistance of the drive unit becomes a target value of the output resistance of the second drive unit, and the first Based on the adjustment results of the replica variable resistor unit and the second replica variable resistor unit, the respective resistance values of the first variable resistor unit and the second variable resistor unit of the second drive unit are adjusted,
The resistance adjuster is
The driver circuit, wherein the resistance value adjustment process and the switch number adjustment process are repeated until a variation in a difference in voltage level of the output signal becomes a predetermined value or less. The driver circuit according to any one of claims 1 to 3,
The number of drive switch units of the drive unit provided corresponding to the most significant bit of the input data is greater than the number of drive switch units of the drive unit provided corresponding to the least significant bit of the input data. A featured driver circuit. The driver circuit according to any one of claims 1 to 4,
The resistance adjustment unit individually adjusts a resistance value of the first variable resistance unit and a resistance value of the second variable resistance unit. A plurality of driving units that are provided corresponding to a plurality of bits of input data and whose outputs are connected to each other and generate an output signal having a voltage level corresponding to the value of the input data, and outputs of the plurality of driving units A resistance adjusting unit that adjusts a resistance, and each of the plurality of driving units is connected to a power supply line to which a power supply voltage is supplied, and a resistance value is changed based on control from the resistance adjusting unit. A variable resistance unit, a second variable resistance unit connected to a ground line and having a resistance value that changes based on control from the resistance adjustment unit, and between the first variable resistance unit and the second variable resistance unit When connected in parallel and set to an effective state by the resistance adjustment unit, a state in which the first variable resistance unit and the output of the driving unit are electrically connected, and the second variable resistance unit and the driving unit Either in the state of conduction between the output A plurality of control method of the driver circuit and a driving switch unit that is set in accordance with the entry force data,
The first adjustment unit included in the resistance adjustment unit performs a resistance value adjustment process for adjusting the respective resistance values of the first variable resistance unit and the second variable resistance unit for each of the plurality of drive units,
The second adjustment unit included in the resistance adjustment unit sets the number of drive switch units that are set to an effective state so that the difference in voltage level of the output signal is equalized after the resistance value adjustment process is performed. A method for controlling a driver circuit, comprising performing adjustment processing for the number of switches to be adjusted.

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