JP2018060316A - Information processor, information processing system, information processor control method and information processor control program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To change the size of a holding part which holds settling information on an electronic component in an information processor without losing information set in the information processor.SOLUTION: The information processor includes: a plurality of electronic components including an arithmetic processing unit; a controller which controls the operation of each of the plurality of electronic components; and a storage unit. The controller includes: a detection unit which holds setting information on each of the plurality of electronic components and detects that the size of a first area assigned to the storage unit is different from the size of an area for setting information newly specified because of a change of the functions of the information processor; an assignment unit which assigns a second area to hold the setting information in lieu of the first area to the storage unit on the basis of the detection by the detection unit; a storage unit which stores valid setting information extracted from the first area to the second area; and a deletion unit which deletes the first area from the storage unit after the valid setting information is stored in the second area.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an information processing apparatus, an information processing system, an information processing apparatus control method, and an information processing apparatus control program.

  In a computer system including storage systems A and B, when the storage system B manages and operates a pool created by the storage system A and a virtual volume using the pool, the storage area for copying the virtual volume can be reduced. A method has been proposed. In this type of method, the storage system B acquires the configuration information of the pool and virtual volume of the storage system A, and takes in the logical volume included in the pool to the storage system B based on the acquired configuration information. Furthermore, the storage system B converts the acquired configuration information for use by the storage system B, and creates a pool and a virtual volume from the captured logical volume based on the converted configuration information (for example, Patent Document 1). reference).

  A method has been proposed in which setting information of BIOS (Basic Input Output System) is compared with setting information held in a spare area, different items are displayed, and setting values can be changed by the user when the information processing apparatus is started. (For example, refer to Patent Document 2).

  A virtual machine system has been proposed in which addresses of extended ROM areas of a plurality of virtual machines are re-mapped in accordance with a change in address of an extended ROM (Read Only Memory) area due to a change in the operation mode of the real machine (for example, a patent) Reference 3).

  By providing a logical server in a spare server in advance and waiting for the logical server immediately before reading an OS (Operating System), the server switching time can be shortened compared to the case where the construction of the logical server is started in the event of a server failure. A technique has been proposed (see, for example, Patent Document 4).

JP 2010-79624 A JP 2013-140536 A JP-A-6-222998 JP 2008-293245 A

  By the way, a control device such as a BMC (Baseboard Management Controller) mounted on an information processing apparatus has a holding unit that holds BIOS setting information based on the first power-on of the information processing apparatus. Assign to. For example, the power supply of the information processing apparatus is turned on for the first time in the assembly process of the manufacturer that manufactures the information processing apparatus.

  For this reason, when changing the size of the holding unit after shipment of the information processing device, the information processing device is returned to the pre-shipment state (factory default) where the power has never been turned on, and then the power is turned on again. The In this case, the control device such as the BMC determines that the power is turned on for the first time, and allocates a holding unit having a new size defined by the firmware or the like to the memory. However, when the information processing apparatus in operation is returned to the state before shipment, all information set in the information processing apparatus is lost, and it takes time and effort to restore the lost information.

  In one aspect, an information processing device, an information processing system, a method for controlling an information processing device, and a control program for the information processing device disclosed herein can It is an object to change the size of a holding unit that holds setting information of parts.

  According to one aspect, in an information processing device including a plurality of electronic components including an arithmetic processing device, a control device that controls operations of the plurality of electronic components, and a storage device, the control device includes a plurality of electronic components. A detection unit that holds setting information and detects that the size of the first area allocated to the storage device is different from the size of the area for setting information newly designated by a change in the function of the information processing apparatus; An allocation unit that allocates, to the storage device, a second area that holds setting information instead of the first area based on detection by the unit, and a storage unit that stores valid setting information extracted from the first area in the second area And a deletion unit that deletes the first area from the storage device after valid setting information is stored in the second area.

  According to another aspect, a plurality of electronic components including an arithmetic processing device, a control device that controls operations of the plurality of electronic components, a plurality of information processing devices including a storage device, and operations of the plurality of information processing devices In the information processing system including the management device that manages the information, each control device of the plurality of information processing devices holds setting information of the plurality of electronic components, and the size of the first area allocated to the storage device is information A detection unit for detecting that the size of the area for setting information newly designated by a change in the function of the processing device is different; and a second for holding setting information instead of the first area based on detection by the detection unit An allocation unit that allocates an area to the storage device, a storage unit that stores valid setting information extracted from the first area in the second area, and after the valid setting information is stored in the second area, Storage device And a deleting unit for deleting et.

  According to another aspect, in a control method for an information processing device including a plurality of electronic components including an arithmetic processing device, a control device that controls operations of the plurality of electronic components, and a storage device, the control device includes a plurality of Detects and detects that the size of the first area that holds the setting information of the electronic component and is assigned to the storage device is different from the size of the area for setting information that is newly specified by changing the function of the information processing apparatus Based on the second area, the second area holding the setting information is allocated to the storage device instead of the first area, the effective setting information extracted from the first area is stored in the second area, and the effective setting information is stored in the second area. After being stored in the area, the first area is deleted from the storage device.

  According to still another aspect, in a control program for an information processing device including a plurality of electronic components including an arithmetic processing device, a control device that controls operations of the plurality of electronic components, and a storage device, Holding the setting information of the electronic component and detecting that the size of the first area allocated to the storage device is different from the size of the area for setting information newly designated by the function change of the information processing apparatus, Based on the detection, the second area holding the setting information is allocated to the storage device instead of the first area, and the effective setting information extracted from the first area is stored in the second area. After being stored in the second area, the first area is deleted from the storage device.

  An information processing apparatus, an information processing system, an information processing apparatus control method, and an information processing apparatus control program disclosed in this disclosure can be used to store setting information of electronic components in an information processing apparatus without losing information set in the information processing apparatus The size of the holding unit to be held can be changed.

It is a figure which shows one Embodiment of an information processing apparatus, an information processing system, the control method of an information processing apparatus, and the control program of an information processing apparatus. It is a figure which shows an example of operation | movement of the information processing system shown in FIG. It is a figure which shows another embodiment of an information processing apparatus, an information processing system, the control method of an information processing apparatus, and the control program of an information processing apparatus. FIG. 4 is a diagram showing an example of BIOSINF information, BMCINF information, an area management table, and an address management table held in the nonvolatile memory NVMS shown in FIG. 3. FIG. 4 is a diagram illustrating an example of a hardware configuration table held in a nonvolatile memory NVMM illustrated in FIG. 3. It is a figure which shows an example of the partition information hold | maintained at the non-volatile memory NVMM shown in FIG. FIG. 4 is a diagram illustrating an example of functions of firmware MMBFW, BMCFW, and BIOS illustrated in FIG. 3. In the information processing system shown in FIG. 3, it is a figure which shows an example of a change process in case the number of banks holding BIOSINF information is increased by integrated firmware upgrade. It is a figure which shows the continuation of the process shown in FIG. FIG. 10 is a diagram showing a continuation of the processing shown in FIG. 9. FIG. 4 is a diagram illustrating an example of a state of a nonvolatile memory NVMM before an integrated firmware upgrade in the information processing system illustrated in FIG. 3. FIG. 4 is a diagram showing an example of a state of a nonvolatile memory NVMS before an integrated firmware upgrade in the information processing system shown in FIG. 4 is a diagram showing an example of a state of a nonvolatile memory NVMS to which banks BK3-BK6 are newly assigned in the information processing system shown in FIG. FIG. 4 is a diagram illustrating an example of a state of a nonvolatile memory NVMM in which a hardware configuration table is set to a basic configuration in the information processing system illustrated in FIG. 3. 4 is a diagram illustrating an example of a state in which BIOSINF information and BMCINF information from a management board are stored in a nonvolatile memory NVMS in the information processing system illustrated in FIG. 3. FIG. 4 is a diagram illustrating an example of a state of a nonvolatile memory NVMM in which banks BK0 and BK1 are deleted and banks BK3-BK6 are allocated in the information processing system illustrated in FIG. FIG. 4 is a diagram illustrating an example of a state of a nonvolatile memory NVMS for which Variable Reclaim has been completed in the information processing system illustrated in FIG. 3. 4 is a diagram illustrating an example of a state of a nonvolatile memory NVMS in which copying of BIOS setting information from a bank BK0 to a bank BK3 is completed in the information processing system illustrated in FIG. 4 is a diagram showing an example of a state of a nonvolatile memory NVMM in which BIOS setting information transferred from a BMC is stored in a bank BK3 in the information processing system shown in FIG. FIG. 4 is a diagram illustrating an example of a state of a nonvolatile memory NVMS in which an area management table is updated according to a deleted bank in the information processing system illustrated in FIG. 3. FIG. 4 is a diagram illustrating an example of a state of a nonvolatile memory NVMM in which a saved hardware configuration table is restored in the information processing system illustrated in FIG. 3. 4 is a diagram illustrating an example of a state of a nonvolatile memory NVMS after completion of a BIOSINF area expansion process in the information processing system illustrated in FIG. 3. FIG. It is a figure which shows an example of the process which BMC performs in the information processing system shown in FIG. FIG. 24 is a diagram showing a continuation of the processing shown in FIG. 23. It is a figure which shows an example of the process which a management board performs in the information processing system shown in FIG. FIG. 26 is a diagram showing a continuation of the processing shown in FIG. 25. It is a figure which shows an example of the process which BIOS performs in the information processing system shown in FIG. It is a figure which shows an example of Variable Reclaim processing shown in FIG. FIG. 4 is a diagram illustrating an example of an initial operation of the information processing system illustrated in FIG. 3. FIG. 4 is a diagram illustrating an example of an operation when a partition is powered on in the information processing system illustrated in FIG. 3. FIG. 4 is a diagram illustrating an example of an operation when a system board is replaced in the information processing system illustrated in FIG. 3.

  Hereinafter, embodiments will be described with reference to the drawings.

  FIG. 1 shows an embodiment of an information processing apparatus, an information processing system, an information processing apparatus control method, and an information processing apparatus control program. The information processing system SYS1 illustrated in FIG. 1 includes a management board MMB and a plurality of system boards SB (SB0, SB1, SB2, SB3). The number of system boards SB mounted on the information processing system SYS1 is not limited to four.

  The management board MMB manages the entire information processing system SYS1, and causes the information processing system SYS1 to realize a predetermined function. Further, the management board MMB controls the system board SB and constructs a partition PT (PT0, PT1) with a predetermined number of system boards SB. Each partition PT functions as an information processing apparatus that operates independently, and is an execution unit of information processing. In the example shown in FIG. 1, the partition PT0 is constructed by the system boards SB0 and SB1, and the partition PT1 is constructed by the system board SB2.

  The management board MMB has a CPU (Central Processing Unit), an electrically rewritable nonvolatile memory NVMM, a main memory (not shown), an HDD (Hard Disk Drive), and the like, and serves as a management server that manages the system board SB. Function. The management board MMB is an example of a management device that manages the plurality of partitions PT and the system board SB. The CPU is an example of an arithmetic processing device that executes arithmetic processing. The nonvolatile memory NVMM has a storage area for storing firmware MMBFW, a hardware configuration table HWTBL, and partition information PTINF (PTINF0, PTINF1, PTINF2, PTINF3). The firmware MMBFW is executed by the CPU of the management board MMB.

  In the following description, the storage area for storing the partition information PTINF is also referred to as a PTINF area. The number of PTINF areas allocated to the nonvolatile memory NVMM is equal to the maximum number of partitions PT that can be constructed in the information processing system SYS1, and the maximum number of partitions PT is equal to the number of system boards SB.

  The firmware MMBFW controls the overall operation of the information processing system SYS1 in cooperation with the BIOS and the firmware BMCFW executed in each partition PT. For example, the firmware MMBFW monitors each partition PT and executes management of power in each partition PT, management of user authority, management of temperature, management of switching at the time of failure of the system board SB, and the like. The firmware MMBFW is an example of a control program executed by the management board MMB that controls the operation of each partition PT. The nonvolatile memory NVMM is an example of a recording medium on which firmware MMBFW is recorded.

  The hardware configuration table HWTBL holds configuration information indicating allocation of the system board SB to each partition PT. The hardware configuration table HWTBL is an example of a configuration information holding unit. In each PTINF area, the same information as the BIOS information BIOSINF held in any nonvolatile memory NVMS of the system board SB assigned to each partition PT is stored as a backup. Each PTINF area is an example of a copy holding unit that holds a copy of the BIOS information BIOSINF used in the partition PT.

  Each system board SB includes a CPU, a main memory MM, a BMC, an electronic component EP, an EEPROM (Electrically Erasable Programmable Read Only Memory), and an electrically rewritable nonvolatile memory NVMS. For example, the nonvolatile memory NVMS is a flash memory having a plurality of blocks capable of independently erasing data. The flash memory has a plurality of storage elements whose storage state is rewritten from logic 1 to logic 0 by a write operation, and the storage state is logic 0 (write state) by an erase operation in a block unit including a predetermined number of storage elements. To logic 1 (erase state). Logic 1 is an example of a first logic value, and logic 0 is an example of a second logic value.

  Since the system boards SB0-SB3 have the same configuration, FIG. 1 shows the configuration of only the system board SB0. In the following description, the CPU mounted on the system board SB is also referred to as CPU (SB), and the CPU mounted on the management board MMB is also referred to as CPU (MMB).

  The main memory MM has a storage area for storing an OS executed by the CPU (SB). The EEPROM has a storage area for storing a BIOS executed by the CPU (SB). The nonvolatile memory NVMS has a storage area for storing firmware BMCFW executed by the BMC and BIOS information BIOSINF. The BIOSINF information includes setting information for switching operation specifications of a plurality of electronic components EP including a CPU (SB) mounted on or connected to the system board SB. In the following description, the BIOS information BIOSINF is also referred to as BIOSINF information, and an area in which the BIOS information BIOSINF is stored is also referred to as a BIOSINF area. The setting information included in the BIOSINF information is also referred to as BIOS setting information. For example, the BIOS setting information includes information for adjusting the processing performance and power consumption of the CPU, and is set by a setup menu displayed on the display device when the BIOS is activated.

  In each partition PT, the BIOS that operates when the power is turned on rewrites the BIOS setting information of the electronic component EP based on input of change information by the user or the like. The BIOS rewrites the BIOS setting information by adding new BIOS setting information to the BIOSINF area. That is, the BIOS writes new BIOS setting information to an erased area where no BIOS setting information is written, and sets the area holding the BIOS setting information before the change to an invalid state, thereby writing the BIOS setting information. Perform a replacement.

  The CPU (SB) controls the overall operation of the system board SB and the partition PT by executing the BIOS stored in the EEPROM and the OS stored in the main memory MM. In addition, the CPU (SB) realizes a desired function for executing data processing and the like by executing an application program developed in the main memory MM. Note that a storage device such as an HDD (not shown) is connected to each system board SB.

  The BMC controls the power supply voltage supplied to the CPU (SB) and the frequency of the clock supplied to the CPU (SB), or controls the operation of the electronic component EP, and controls the access to the nonvolatile memory NVMS. The BMC is an example of a control device that controls operations of a plurality of electronic components EP including a CPU (SB). Various controls by the BMC are executed by the BMC executing the firmware BMCFW. The firmware BMCFW is an example of a control program executed by the BMC that controls the operation of the system board SB in the partition PT. The non-volatile memory NVMS is an example of a recording medium on which firmware BMCFW is recorded. The BMC functions as a detection unit DET, an allocation unit ALC, a storage unit STR, and a deletion unit DEL by executing the firmware BMCFW. The detection unit DET, the allocation unit ALC, the storage unit STR, and the deletion unit DEL may be realized by BMC hardware. Further, the BMC and the nonvolatile memory NVMS may be mounted in one semiconductor chip.

  The detection unit DET detects that the size of the BIOSINF area that holds the setting information of the CPU (SB) and the electronic component EP is different from the size of the setting information area newly specified by changing the function of the partition PT. . For example, the function change of the partition PT is an operation mode change, addition or reduction, and the like, and is implemented by an integrated firmware update that updates the firmware MMBFW, BMCFW, and BIOS.

  The allocation unit ALC newly allocates a BIOSINF area that holds the setting information after changing the function of the partition PT, instead of the existing BIOSINF area, based on the detection of the size difference by the detection unit DET. The existing BIOSINF area is an example of a first area allocated to the nonvolatile memory NVMS, and the new BIOSINF area is an example of a second area allocated to the nonvolatile memory NVMS.

  The storage unit STR stores valid setting information extracted from the existing BIOSINF area in the newly added BIOSINF area. The extraction of valid setting information from the existing BIOSINF area is executed by the BIOS that manages the setting information stored in the BIOSINF area. The deletion unit DEL deletes the existing BIOSINF area after valid setting information is stored in the new BIOSINF area.

  The BIOS corresponds to UEFI (Unified Extensible Firmware Interface), and has a function of switching the operation specifications of hardware mounted on or connected to the system board SB based on input of setting information from the outside. The BIOS is activated on the basis of power being applied to the partition PT, initializes hardware mounted on or connected to the system board SB, and sets the state of the system board SB to a state where the OS can be booted. Further, as described above, the BIOS has a function of managing setting information stored in the BIOSINF area and extracting valid setting information from the setting information held in the existing BIOSINF area.

  The firmware BMCFW executes a process of sharing information between the management board MMB and each partition PT after executing the integrated firmware upgrade. The integrated firmware upgrade is a process for simultaneously updating the firmware MMBFW, BIOS, and firmware BMCFW.

  FIG. 2 shows an example of the operation of the information processing system SYS1 shown in FIG. Among the operations shown in FIG. 2, the BMC operation is realized by the BMC executing the firmware BMCFW. That is, FIG. 2 shows an example of a control method for the information processing apparatus and a control program for the information processing apparatus. In FIG. 2, an area indicated by a thick frame indicates an area in which information held for the previous state is changed.

  The state (1) indicates the state of the information processing system SYS1 before executing the integrated firmware upgrade. In state (1), as shown in FIG. 1, the information processing system SYS1 has a partition PT0 to which system boards SB0 and SB1 are assigned and a partition PT1 to which system board SB2 is assigned (FIG. 2 (a)). The system board SB3 is not assigned to the partition PT (FIG. 2B).

  The BIOS setting information A of the partition PT0 is held in the BIOSINF area of the system board SB0 (home system board) among the system boards SB0 and SB1 assigned to the partition PT0. The BIOS setting information B of the partition PT1 is held in the BIOSINF area of the system board SB2 (home system board) assigned to the partition PT1. In the management board MMB, the PTINF0 area corresponding to the partition PT0 holds a copy of the BIOS setting information A of the partition PT0 (FIG. 2C). The PTINF1 area corresponding to the partition PT1 holds a copy of the BIOS setting information B of the partition PT1.

  By the integrated firmware upgrade that changes the function of the partition PT (system board SB), the BIOS and firmware BMCFW in each system board SB are updated (FIG. 2 (d)). As a result, the size of the new BIOSINF area is assumed to be larger than the size of the existing BIOSINF area. The size of the new BIOSINF area is specified by being described in the updated firmware BMCFW.

  In the state (2), the detection unit DET of the firmware BMCFW in each system board SB compares the size of the new BIOSINF area described in the firmware BMCFW with the size of the existing BIOSINF area. Then, the detection unit DET detects that the size of the new BIOSINF area is different from the size of the existing BIOSINF area. The allocation unit ALC of the firmware BMCFW allocates a new BIOSINF area in the nonvolatile memory NVMS based on the detection of the size difference by the detection unit DET (FIG. 2 (e)). The BIOSINF area newly added in the nonvolatile memory NVMS is an example of a corresponding area corresponding to the new BIOSINF area added in the nonvolatile memory NVMS.

  The firmware MMBFW of the management board MMB acquires the sizes of the existing BIOSINF area and the new BIOSINF area from the BMC of each system board SB based on the addition of the new BIOSINF area in the nonvolatile memory NVMS. Then, the firmware MMBFW of the management board MMB deletes the area corresponding to the existing BIOSINF area, and assigns an area corresponding to the size of the new BIOSINF area to each PTINF area (FIG. 2 (f)).

  Next, in the state (3), the firmware MMBFW instructs the BMC to turn on the power of the partition PT. The BMC (firmware BMCFW) in the home system board SB of the partitions PT0 and PT1 turns on the power of the partitions PT0 and PT1, and the BIOS of the partitions PT0 and PT1 is activated. The BIOS of the partition PT0 extracts valid BIOS setting information A 'from the existing BIOSINF area, and rewrites the existing BIOSINF area with the extracted valid BIOS setting information A' (FIG. 2 (g)). The BIOS of the partition PT1 extracts valid BIOS setting information B 'from the existing BIOSINF area, and rewrites the existing BIOSINF area with the extracted valid BIOS setting information B' (FIG. 2 (h)).

  The process of extracting valid BIOS setting information from the existing BIOSINF area and rewriting the existing BIOSINF area with the extracted valid BIOS setting information can be executed using the function of the existing BIOS. Thereafter, the BIOS of the partitions PT0 and PT1 issues an instruction to copy the valid BIOS setting information (A ′ or B ′) in the existing BIOSINF area to the new BIOSINF area to the corresponding BMC.

  Next, in the state (4), the BMC in the home system board SB of the partition PT0 stores the valid BIOS setting information A ′ in the existing BIOSINF area in the new BIOSINF area based on an instruction from the BIOS. (FIG. 2 (i)). The storage of the setting information A ′ in the new BIOSINF area is executed by the storage unit STR of the firmware BMCFW. In addition, the BMC in the home system board SB of the partition PT0 issues an instruction to store the BIOS setting information A ′ stored in the new BIOSINF area in the PTINF0 area to the management board MMB. Based on the instruction from the BMC, the management board MMB stores the BIOS setting information A ′ in the PTINF0 area (FIG. 2 (j)).

  Similarly, the BMC in the home system board SB of the partition PT1 stores the valid BIOS setting information B ′ in the existing BIOSINF area in the new BIOSINF area based on an instruction from the BIOS (FIG. 2 (k)). ). The BIOS setting information B ′ is stored in the new BIOSINF area by the storage unit STR of the firmware BMCFW. In addition, the BMC in the home system board SB of the partition PT1 issues an instruction to store the BIOS setting information B ′ stored in the new BIOSINF area to the management board MMB. The management board MMB stores the BIOS setting information B ′ in the PTINF1 area based on an instruction from the BMC (FIG. 2 (l)).

  Next, in the state (5), the deletion unit DEL of the firmware BMCFW of each system board SB0-SB3 deletes the existing BIOSINF area. Thereafter, the partitions PT0 and PT1 use a new BIOSINF area in which valid BIOS setting information A 'and B' are copied as an existing BIOSINF area. By the above operation, the existing BIOSINF area before the integrated firmware upgrade can be switched to a new size BIOSINF area. In addition, in accordance with the change in the size of the BIOSINF area, an area corresponding to the size of the new BIOSINF area can be allocated to each PTINF area in the management board MMB.

  Note that FIG. 2 illustrates an example in which the size of the new BIOSINF area is larger than the size of the existing BIOSINF area. However, FIG. 2 can also be applied to the case where the size of the new BIOSINF area is made smaller than the size of the existing BIOSINF area. However, in this case, in the state (3), the BIOS first selects the BIOS setting information held in the BIOSINF area after the size reduction, and extracts valid setting information from the selected BIOS setting information.

  Further, in the state (3) of FIG. 2, the BIOS may directly store the valid BIOS setting information extracted from the existing BIOSINF area not in the existing BIOSINF area but in the new BIOSINF area. In this case, the copy process of valid BIOS setting information from the existing BIOSINF area to the new BIOSINF area in the state (4) can be omitted. However, if the BIOS does not have a function of storing valid BIOS setting information extracted from the existing BIOSINF area in the new BIOSINF area, a new function of BIOS storage processing is added at the time of integrated firmware upgrade.

  As described above, in the embodiment shown in FIGS. 1 and 2, when the size of the BIOSINF area is changed, a new BIOSINF area is allocated, effective setting information is extracted from the existing BIOSINF area, and stored in the new BIOSINF area. To do. Thereby, the size of the BIOSINF area of all the system boards SB can be changed without returning the information processing system SYS1 to the state before shipment (factory default). That is, the size of the BIOSINF area that holds the setting information of the electronic component EP in the system board SB can be changed without losing the information set in the partition PT (system board SB). Since the size of the BIOSINF area can be changed without human intervention, there is no need to restore lost information, and artificial setting errors can be suppressed.

  The management board MMB acquires the sizes of the existing BIOSINF area and the new BIOSINF area from the BMC of each system board SB, deletes the area corresponding to the existing BIOSINF area, and sets the area corresponding to the new BIOSINF area to PTINF. Assign to a region. Then, the management board MMB stores the valid setting information transferred from the BIOS in a newly allocated area in the PTINF area. By reflecting the BIOSINF area whose size has been changed in the PTINF area in the nonvolatile memory NVMM of the management board MMB, the BIOS setting information that is subsequently changed by the BIOS can be backed up in the PTINF area.

  FIG. 3 shows another embodiment of the information processing apparatus, the information processing system, the control method for the information processing apparatus, and the control program for the information processing apparatus. Elements that are the same as or similar to those described in the embodiment shown in FIG. 1 are given the same reference numerals, and detailed descriptions thereof are omitted.

  The information processing system SYS2 shown in FIG. 3 includes a management board MMB, a plurality of system boards SB (SB0, SB1, SB2, SB3), an input / output switch IOSW, and a plurality of input / output units IOU (IOU0, IOU1, IOU2, IOU3). Have The number of system boards SB and the number of input / output units IOU mounted on the information processing system SYS2 are not limited to four.

  The management board MMB controls the system board SB and the input / output switch IOSW, and connects the predetermined number of system boards SB to the predetermined number of input / output units IOU via the input / output switch IOSW, so that the partition PT (PT0, PT0, PT1) is constructed. Each partition PT functions as an information processing apparatus that operates independently of each other. In the example shown in FIG. 3, the partition PT0 is constructed by the system boards SB0 and SB1 and the input / output units IOU0 and IOU1, and the partition PT1 is constructed by the system board SB2 and the input / output unit IOU3. When the number of input / output units IOU is equal to or greater than the number of system boards SB, the maximum number of partitions PT that can be constructed in the information processing system SYS2 is equal to the number of system boards SB. That is, the maximum number of partitions PT that can be constructed in the information processing system SYS2 shown in FIG. 3 is “4”.

  The management board MMB has a CPU (MMB) and a nonvolatile memory NVMM, a main memory (not shown), an HDD (Hard Disk Drive), and the like, and functions as a management server that manages the system board SB and the input / output switch IOSW. The nonvolatile memory NVMM has a storage area for storing firmware MMBFW, a hardware configuration table HWTBL, and partition information PTINF (PTINF0, PTINF1, PTINF2, PTINF3). The number of PTINF areas allocated to the nonvolatile memory NVMM is equal to the maximum number of partitions PT that can be constructed in the information processing system SYS2. For example, the nonvolatile memory NVMM is a flash memory having a plurality of blocks capable of independently erasing data.

  An example of the hardware configuration table HWTBL is shown in FIG. Each PTINF area stores the same information as the BIOS information BIOSINF and BMC information BMCINF held in the nonvolatile memory NVMS of the system board SB (home system board SB described later) assigned to each partition PT. An example of the partition information PTINF is shown in FIG.

  Each system board SB includes a CPU (SB), an electronic component EP, a main memory MM, a chip set CSET, a BMC and an EEPROM, a nonvolatile memory NVMS, and a temperature sensor TSNS. For example, the electronic component EP is a SAS (Serial Attached SCSI (Small Computer System Interface)) / SATA (Serial Advanced Technology Attachment) controller or a NIC (Network Interface Card). For example, the nonvolatile memory NVMS is a flash memory having a plurality of blocks capable of independently erasing data. Since the system boards SB0 to SB3 have the same configuration, FIG. 3 shows the configuration of only the system board SB0.

  The nonvolatile memory NVMS has a storage area for storing firmware BMCFW executed by the BMC, BIOS information BIOSINF, BMC information BMCINF, an area management table NVTBL, and an address management table ADTBL. In the following description, the BMC information BMCINF is also referred to as BMCINF information, and an area in which the BMC information BMCINF is stored is also referred to as a BMCINF area.

  The CPU (SB) has a function of an input / output interface that controls data transfer with the input / output unit IOU, and is connected to the input / output unit IOU via the input / output switch IOSW. When the partition PT includes a plurality of system boards SB, one of the system boards SB operates as the home system board SB and controls the entire operation of the partition PT. The system boards SB other than the home system board SB execute data processing by an application program exclusively. The BIOSINF area, the BMCINF area, the area management table NVTBL, and the address management table ADTBL are allocated to the nonvolatile memories NVMS of all the system boards SB.

  The chip set CSET is connected to the CPU (SB), EEPROM, and BMC, and controls input / output of information between the CPU (SB), EEPROM, and BMC. The BMC controls the power supply voltage supplied to the CPU (SB) and the frequency of the clock supplied to the CPU (SB), and controls the rotation speed of a fan (not shown) based on the temperature measured by the temperature sensor TSNS. Various controls by the BMC are executed by the BMC executing the firmware BMCFW. The BMC functions as a detection unit DET, an allocation unit ALC, a storage unit STR, and a deletion unit DEL by executing the firmware BMCFW. Note that the BMC and the nonvolatile memory NVMS may be mounted in one semiconductor chip.

  The firmware BMCFW executes a process of sharing information between the management board MMB and each partition PT after executing the integrated firmware upgrade. Examples of processing executed by the firmware MMBFW are shown in FIG. 8 to FIG. 10, FIG. 23, and FIG.

  The BIOSINF information includes BIOS setting information for switching operation specifications of a plurality of electronic components EP including a CPU (SB) mounted on or connected to the system board SB. The BMCINF information includes setting information such as a watchdog setting for monitoring that the OS is operating. In the following description, the setting information included in the BMCINF information is also referred to as BMC setting information.

  The area management table NVTBL stores information related to the sizes of the BIOSINF area and the BMCINF area. The address management table ADTBL stores address information for accessing the BIOSINF area and the BMCINF area. Examples of the area management table NVTBL and the address management table ADTBL are shown in FIG.

  The input / output switch IOSW connects the system board SB in the partition PT to a predetermined number of input / output units IOU based on control by the management board MMB. Each input / output unit IOU has a plurality of HDDs. Each input / output unit IOU may have a plurality of SSDs (Solid State Drives). The information processing system SYS2 may include an input / output unit IOU including an HDD and an input / output unit IOU including an SSD.

  FIG. 4 shows an example of BIOSINF information, BMCINF information, area management table NVTBL, and address management table ADTBL held in the nonvolatile memory NVMS shown in FIG. In FIG. 4, the BIOSINF area holding the BIOS setting information of the electronic component EP is assigned to two banks BK0 and BK1, and the BMCINF area holding the setting information for BMC is assigned to one bank BK2.

  For example, the BIOS setting information is stored in the bank BK0 in the BIOSINF area. When the BIOS setting information is updated (changed) by the BIOS that operates when the partition PT is activated, the updated BIOS setting information is stored (added) in a new area of the bank BK0. This is because the storage element of the nonvolatile memory NVMS (flash memory) changes from the erased state (logic 1) to the written state (logic 0) only by the write operation, and from the write state to the erased state in block units by the erase operation. This is because it changes. For example, in the nonvolatile memory NVMS, the binary number “1110” can be rewritten to “1010”, but the binary number “1010” cannot be rewritten to “1110”. The rewriting from “1010” to “1110” is executed after “1111” is set by the erasing operation.

  Because of the write characteristics of the flash memory, the updated BIOS setting information is written to the erased area in the bank BK0 every time the BIOS setting information is updated. For this reason, every time the BIOS setting information is updated, invalid BIOS setting information is stored in the bank BK0, and the free area of the bank BK0 gradually decreases. Whether the BIOS setting information stored in the BIOSINF area is valid or invalid is determined by, for example, a valid flag.

  When the BIOS detects that the free area of the bank BK0 is less than a predetermined capacity, the BIOS extracts valid BIOS setting information (updated latest BIOS setting information) from the bank BK0, and extracts the extracted BIOS setting information. Store in bank BK1. Then, after executing the erase operation for the bank BK0, the BIOS writes the valid BIOS setting information held in the bank BK1 back to the bank BK0. As a result, invalid BIOS setting information is erased from the bank BK0. The bank BK1 writes valid BIOS setting information back to the bank BK0, and then an erase operation is executed to erase data to 0xFF (all 1).

  The process of leaving the valid BIOS setting information included in the BIOSINF information and deleting the invalid BIOS setting information is referred to as “Variable Reclaim”. Variable Reclaim is executed during POST (Power On Self Test) executed by the BIOS when the BIOS is started. For example, the size of each bank BK (BK0, BK1, BK2) is equal to the size of a block which is a data erasing unit, and data erasing can be executed for each bank BK. Each bank BK may have a plurality of blocks.

  The area management table NVTBL has areas that hold states BMC-ST, MMB-ST, BIOS-ST, bank number BIOSBKN, bank size BK0SZ, BK1SZ, bank number BMCBKN, and bank size BK2SZ. The state BMC-ST indicates the state of the BMC, the state MMB-ST indicates the state of the management board MMB, and the state BIOS-ST indicates the state of the BIOS. In the states BMC-ST, MMB-ST, and BIOS-ST, when the number of banks BK holding the BIOSINF information is changed due to the integrated firmware upgrade, the change processing is executed in cooperation between the management boards MMB, BMC, and BIOS. Used to do. Note that the states BMC-ST, MMB-ST, and BIOS-ST may be held in the BMC.

  The state BMC-ST is set to “1” (switching state) during execution of switching processing by changing the size of the BIOSINF area. The region that holds the state BMC-ST is an example of a first state holding unit that holds a switching state indicating that switching from an existing bank BK to a new bank BK is in progress.

  The state MMB-ST is set to “1” during execution of the switching process by changing the size of the bank BK. For example, the state MMB-ST is “1” during a period in which all system boards SB are allocated to the partition PT as home system boards SB based on the hardware configuration table HWTBL set to the basic configuration described in FIG. Set to

  The state BIOS-ST is set to “1” (extraction state) when valid BIOS setting information is being extracted by the BIOS. The state BIOS-ST is set to “2” (copying state) when valid BIOS setting information in the banks BK0 and BK1 is being copied to the banks BK3 to BK6 by the BIOS. The state BIOS-ST is set to “0” (idle state) when neither the extraction state nor the copy state is set. The region that holds the state BIOS-ST is an example of a second state holding unit that indicates the operating state of the BIOS.

  The bank number BIOSBKN indicates the number of banks BK allocated to the BIOSINF area, the bank size BK0SZ indicates the size of the bank BK0, and the bank size BK1SZ indicates the size of BK1. The bank number BMCBKN indicates the number of banks BK allocated to the BMCINF area, and the bank size BK2SZ indicates the size of the bank BK2. For example, the size of each bank BK is 64 kilobytes. The bank sizes BK0SZ and BK1SZ are an example of first size information indicating the sizes of the banks BK0 and BK1 allocated to the BIOSINF area. The area management table NVTBL is an example of a size information holding unit that holds the bank sizes BK0SZ and BK1SZ and the bank sizes BK3SZ-BK6SZ shown in FIG. Note that the size of the area management table NVTBL varies depending on the number of banks BK allocated to the BIOSINF area and the number of banks BK allocated to the BMCINF area.

  The address management table ADTBL has an area for holding the offset value offsetmin of the start address and the offset value offsetmax of the end address for each of the banks BK0 to BK2. In FIG. 4, each offset value offsetmin, offsetmax is represented by 32 bits. The size of each bank BK0-BK2 indicated by the difference between the offset values offsetmin, offsetmax is equal to the size indicated by the bank sizes BK0SZ, BK1SZ, BK2SZ of the area management table NVTBL. For example, the area management table NVTBL and the address management table ADTBL are allocated to blocks different from the blocks to which the banks BK0 to BK2 are allocated. The address management table ADTBL is an example of an address information holding unit that holds offset values offsetmin and offsetmax indicating addresses assigned to the banks BK0 and BK1. The offset values offsetmin and offsetmax of the banks BK0 and BK1 are an example of first address information.

  FIG. 5 shows an example of the hardware configuration table HWTBL held in the nonvolatile memory NVMM shown in FIG. The hardware configuration table HWTBL has areas corresponding to the partitions PT0 to PT3, the reserve RSV, and the free FREE for each system board SB. Further, the hardware configuration table HWTBL has areas corresponding to the partitions PT0 to PT3, the reserved RSV, and the free FREE for each input / output unit IOU.

  In FIG. 5, a circle included in the area indicated by the system board SB and the partition PT indicates that the system board SB is assigned to the partition PT. A circle including “H” indicates that the system board SB is assigned to the partition PT as the home system board SB.

  A circle included in the reserved RSV area indicates that the system board SB or the input / output unit IOU is reserved for replacement. If there is an unused system board SB or I / O unit IOU in the free FREE area, it is marked with a circle. In the actual hardware configuration table HWTBL, for example, “1” is stored instead of a circle, “2” is stored instead of a circle including “H”, and “0” is stored instead of a blank. Stored.

  FIG. 5 shows a state in which partitions PT0, PT1, and PT3 are constructed. System boards SB0 and SB1 are assigned to the partition PT0, and the system board SB0 is the home system board SB. The system board SB2 is allocated as the home system board SB to the partition PT1, and the system board SB3 is secured for replacement. The system board SB is not assigned to the partition PT2. The system board SB3 is assigned as the home system board SB to the partition PT3.

  When the system board SB2 fails in the partition PT1, the power supply of the partition PT1 is cut off, the reserved system board SB3 is assigned as the home system board SB of the partition PT1, and the power is turned on again. When the power supply to the partition PT3 is turned on when the system board SB2 fails, the power supply to the partition PT3 is shut off, and the system board SB3 is assigned to the partition PT1 after the assignment to the partition PT3 is released. Thus, by including the reserved RSV area in the hardware configuration table HWTBL, the system board SB3 can be automatically assigned to the partition PT1 when the system board SB2 fails. On the other hand, when the hardware configuration table HWTBL does not have the reserved RSV area, the system board SB to be replaced is specified from outside the information processing system SYS2, and the hardware configuration table HWTBL is based on the specification from the outside. Rewritten.

  The hardware configuration table HWTBL shown in the lower brackets in FIG. 5 indicates the state of the information processing system SYS2 at the time of shipment. The hardware configuration table HWTBL is set to a state in which all the system boards SB and all the input / output units IOU are not used (FREE) when the information processing system SYS2 is shipped.

  FIG. 6 shows an example of the partition information PTINF stored in the nonvolatile memory NVMM shown in FIG. FIG. 6 shows the state of the partition information PTINF of the information processing system SYS2 in which the partitions PT0 and PT1 shown in FIG. 3 are constructed.

  Similar to the non-volatile memory NVMS (FIG. 4) of the home system board SB0 of the partition PT0, an area having the same size as the banks BK0, BK1, and BK2 is allocated to the PTINF0 area corresponding to the partition PT0. The firmware MMBFW allocates an area corresponding to the banks BK0 to BK2 to the PTINF0 area by referring to the area management table NVTBL of the partition PT0. In the PTINF0 area, the same information as the BIOSINF information and BMCINF information held in the nonvolatile memory NVMS of the home system board SB of the partition PT0 is held as a backup. As described with reference to FIG. 4, the bank BK1 is used to temporarily hold valid BIOS setting information extracted at the time of “Variable Reclaim”, and is in an erased state (0xFF) except at the time of “Variable Reclaim”. It is.

  Similarly, in the PTINF1 area corresponding to the partition PT1, the same information as the BIOS setting information and the BMC setting information held in the nonvolatile memory NVMS of the home system board SB2 of the partition PT1 is held as a backup. The partitions PT2 and PT3 are not constructed in the information processing system SYS2. For this reason, in the PTINF2 area and PTINF3 area corresponding to the partitions PT2 and PT3, the same information as the banks BK0, BK1, and BK2 initialized to “0xFF” is held as a backup.

  FIG. 7 shows an example of functions of the firmware MMBFW, BMCFW, and BIOS shown in FIG. The firmware MMBFW has a communication unit that controls communication with the firmware BMCFW, and the firmware BMCFW has a communication unit that controls communication with the firmware MMBFW and the BIOS. The BIOS has a communication unit that controls communication with the firmware BMCFW. Each communication unit communicates information according to the IPMI (Intelligent Platform Management Interface) standard.

  The firmware MMBFW includes an NVMM access control unit that controls access to the nonvolatile memory NVMM and an NVMS access instruction unit that instructs the system board SB to access the nonvolatile memory NVMS. The firmware MMBFW includes a switching control unit that controls a BIOSINF area switching process, which will be described later, an integrated firmware upgrade manager that manages an integrated firmware upgrade process, and a power controller that controls the power supply of each partition PT.

  The firmware BMCFW includes an NVMS access control unit that controls access to the nonvolatile memory NVMS in the system board SB, and a switching control unit that controls switching processing of a BIOSINF area described later. The BIOS includes, on the system board SB, an NVMS access instruction unit that instructs the system board SB to access the nonvolatile memory NVMS, and a Variable Reclaim processing unit that executes Variable Reclaim.

  8 to 10 show an example of a change process when the number of banks BK holding the BIOSINF information is increased by the integrated firmware upgrade in the information processing system SYS2 shown in FIG. That is, FIGS. 8, 9 and 10 show an example of the BIOSINF area switching process. FIG. 9 shows the continuation of the process shown in FIG. 8, and FIG. 10 shows the continuation of the process shown in FIG. 11 to 22 show an example of changes in information held in the nonvolatile memories NVMM and NVMS. In FIGS. 11 to 22, an area indicated by a thick frame indicates an area in which information held for the previous state is changed. 8 to 10, the operation of the firmware MMBFW indicates the operation of the management board MMB, the operation of the firmware BMCFW indicates the operation of the BMC, and the processing executed by the firmware BMCFW is an example of the control method of the information processing apparatus Show.

  The state of the information processing system SYS2 before the integrated firmware upgrade is the same as in FIG. 3, and system boards SB0 and SB1 are assigned to the partition PT0, and the system board SB2 is assigned to the partition PT1. The state of the nonvolatile memory NVMM of the management board MMB before the integrated firmware upgrade is shown in FIG. 11, and the state of the nonvolatile memory NVMS of each system board SB before the integrated firmware upgrade is shown in FIG. 11 and 12, data DT00 indicates the BIOS setting information of the partition PT0, and data DT01 indicates the BMC setting information of the partition PT0. Data DT10 indicates BIOS setting information of the partition PT1, and data DT11 indicates BMC setting information of the partition PT1. Data DT30 indicates BIOS setting information when the system board SB3 has been assigned to any of the partitions PT in the past, and data DT31 indicates BMC settings when the system board SB3 has been assigned to any of the partitions PT in the past. Indicates information. Data DT30 and DT31 are invalid information.

  In FIG. 11, the PTINF2 area and the PTINF3 area corresponding to the unused partitions PT2 and PT3 are initialized to all 1 (0xFF) and hold the initialized state. In FIG. 12, since the system board SB1 assigned to the partition PT0 is not the home system board SB, the BIOSINF area (BK0, BK1) and the BMCINF area (BK2) are initialized to all 1 (0xFF), and the initialization state is changed. Hold. Information common to the information processing system SYS2 is stored in the area management table NVTBL and the address management table ADTBL of each system board SB. That is, the number of banks BK that store BIOSINF information and the number of banks BK that store BMCINF information are set based on the function of the information processing system SYS2. Further, the number of banks BK storing the BIOSINF information is changed based on a change in the function of the information processing system SYS2 due to the integrated firmware upgrade.

  Returning to FIG. 8, after the integrated firmware is upgraded, the firmware MMBFW restarts the management board MMB, then instructs the BMC of each system board SB to restart, and starts communication with each system board SB (FIG. 8). (A), (b)). The firmware BMCFW of each system board SB refers to the number of banks BIOSBKN held in the area management table NVTBL after restarting the BMC (FIG. 8C). The number of banks BIOSBKN is the number of banks BK allocated to hold the existing BIOSINF information. Then, the detection unit DET of the firmware BMCFW detects that the number of new banks BK designated by the firmware BMCFW to hold the BIOSINF information is different from the number of banks BIOSBKN. That is, the detection unit DET of the firmware BMCFW detects that the size of the BIOSINF area newly holding the BIOS setting information is different from the size of the existing BIOSINF area held in the area management table NVTBL. The size of the new BIOSINF area may be larger or smaller than the size of the existing BIOSINF area. For example, the number of new banks BK specified by the firmware BMCFW is described in the firmware BMCFW.

  The firmware BMCFW of each system board SB adds information indicating the newly allocated BIOSINF area to the area management table NVTBL and the address management table ADTBL (FIG. 8D). For example, as illustrated in FIG. 13, the allocation unit ALC of the firmware BMCFW allocates the number of banks BIOSBKN indicating “4”, which is the number of banks BK3 to BK6 to be newly allocated, to the area management table NVTBL. In addition, allocation unit ALC allocates bank sizes BK3SZ-BK6SZ indicating the sizes of banks BK3-BK6 to area management table NVTBL. Further, the assigning unit ALC assigns the offset values offsetmin and offsetmax of the banks BK3 to BK6 to be newly assigned to the address management table ADTBL.

  The firmware BMCFW changes the state BMC-ST from “0” to “1” in order to indicate that the BMC is executing the process of switching the existing BIOSINF area to the newly assigned BIOSINF area (FIG. 8 ( e)). Then, the firmware BMCFW newly allocates the bank BK (for example, BK3-BK6) corresponding to the new BIOSINF area designated by the firmware BMCFW to the nonvolatile memory NVMS (FIG. 8 (f)). That is, when the allocation unit ALC changes the number of banks BK for holding the BIOSINF information, the allocation unit ALC adds the changed bank BK to the nonvolatile memory NVMS. The firmware BMCFW erases data in the newly assigned bank BK. Existing BIOSINF areas (ie, BK0, BK1) are maintained without being deleted.

  For example, when it is detected that the number of banks BK for newly holding BIOSINF information specified by the firmware BMCFW is smaller than the number of banks BIOSBKN, the requested BIOSINF area is newly allocated to the nonvolatile memory NVMS. It is done. When the number of banks BK for holding the BIOSINF information designated by the firmware BMCFW is the same as the existing bank number BIOSBKN, the switching process from the existing BIOSINF area to the new BIOSINF area is not executed.

  FIG. 13 shows a state in which the banks BK3 to BK6 are newly allocated in the nonvolatile memory NVMS of each system board SB, and the allocation of the banks BK3 to BK6 reflects the area management table NVTBL and the address management table ADTBL. In the state shown in FIG. 13, the information of the banks BK3-BK6 is added to the area management table NVTBL and the address management table ADTBL, and the state BMC-ST is set to “1” with respect to the state shown in FIG. .

  The bank sizes BK3SZ and BK4SZ are examples of second size information indicating the sizes of the banks BK3, BK4, BK5, and BK6 allocated to the BMCINF area. In FIG. 13, the address management table ADTBL is an example of an address information holding unit that holds offset values offsetmin and offsetmax indicating addresses assigned to the banks BK3 to BK6. The offset values offsetmin and offsetmax of the banks BK3 to BK6 are an example of second address information.

  By adding the information of the banks BK3-BK6 to the area management table NVTBL and the address management table ADTBL, the BIOS can access both the existing BIOSINF area (old) and the new BIOSINF area (new). . In other words, the BIOS can extract valid BIOS setting information by executing Variable Reclaim using the existing BIOSINF information, and can store the extracted BIOS setting information in the newly assigned BIOSINF area. .

  Returning to FIG. 8, the firmware MMBFW acquires the area management table NVTBL, and detects that the firmware BMCFW is executing the BIOSINF area switching process based on “1” in the state BMC-ST (FIG. 8 ( g)). Thus, by providing an area for holding the state BMC-ST in the area management table NVTBL, the firmware MMBFW can detect execution of the BIOSINF area switching process by the firmware BMCFW. Therefore, the firmware MMBFW can execute a BIOSINF area switching process in cooperation with the firmware BMCFW. The firmware MMBFW acquires the area management table NVTBL at a predetermined cycle after restarting the management board MMB.

  Based on the detection of “1” in the state BMC-ST, the firmware MMBFW saves the hardware configuration table HWTBL and sets the hardware configuration table HWTBL to the basic configuration (FIGS. 8H and 8I). Here, the basic configuration is a configuration in which one system board SB is assigned to each partition PT, and all system boards SB are set as home system boards SB. By changing the hardware configuration table HWTBL, all the system boards SB are assigned to the partitions PT as home system boards SB. FIG. 14 shows a state of the nonvolatile memory NVMM in which the existing hardware configuration table HWTBL is saved and the hardware configuration table HWTBL is set as the basic configuration.

  Returning to FIG. 8, the firmware MMBFW instructs the firmware BMCFW to store the BIOSINF information and the BMCINF information stored in the nonvolatile memory NVMM based on the hardware configuration table HWTBL set to the basic configuration (FIG. 8 ( j)). The firmware BMCFW instructed to store the BIOSINF information and the BMCINF information is the firmware BMCFW of the home system board SB newly assigned to each partition PT (that is, having a configuration change).

  In the example shown in FIG. 14, since the home system board SB0 maintains the assignment to the partition PT0, the firmware BMCFW of the home system board SB0 may omit the instruction to store the BIOSINF information and the BMCINF information. Since each of the other home system boards SB1 to SB3 is newly allocated to the partitions PT1 to PT3, the firmware BMCFW of the other home system boards SB1 to SB3 is instructed to store the BIOSINF information and the BMCINF information.

  The firmware BMCFW that has received the instruction erases the data in the existing BIOSINF area and the BMCINF area held in the nonvolatile memory NVMS. Then, the firmware BMCFW stores the BIOSINF information and the BMCINF information transferred from the firmware MMBFW in the existing BIOSINF area and the BMCINF area from which data has been deleted (FIG. 8 (k)). The BIOSINF information and BMCINF information transferred from the firmware MMBFW may be stored in a system board SB different from the original system board SB. However, in the entire information processing system SYS2, since the existing BIOSINF information and BMCINF information before the integrated firmware upgrade are included in any of the system boards SB0-SB3, it can be prevented from being lost.

  The firmware MMBFW instructs the firmware BMCFW to change the state MMB-ST from “0” to “1” (FIG. 8L). “1” in the state MMB-ST indicates that the hardware configuration table HWTBL is set to the basic configuration and the MMB is executing a process of switching the existing BIOSINF area to the newly assigned BIOSINF area. The firmware BMCFW changes the state MMB-ST of the area management table NVTBL from “0” to “1” based on the instruction from the firmware MMBFW ((m) in FIG. 8).

  FIG. 15 shows a state in which the BIOSINF information and BMCINF information from the firmware MMBFW are stored in the nonvolatile memory NVMS. In the state shown in FIG. 15, the BIOSINF information and BMCINF information of the system boards SB1 and SB2 are interchanged with respect to the state shown in FIG. 13, and the BIOSINF information and BMCINF information of the system board SB3 are deleted. Further, the state MMB-ST is set to “1”.

  By assigning one system board SB to each partition PT by the hardware configuration table HWTBL having the basic configuration shown in FIG. 14, BIOSINF information and BMCINF information can be set in all the system boards SB0-SB3. As a result, invalid data DT30 and DT31 (FIG. 13) held in the past in the BIOSINF area and BMCINF area of the system board SB3 can be deleted.

  Returning to FIG. 8, after that, the firmware MMBFW deletes the existing BIOSINF information (BK0, BK1) included in the PTINF0 area-PTINF3 area corresponding to the partitions PT0-PT3 held in the nonvolatile memory NVMM ( FIG. 8 (n)). Based on the acquired area management table NVTBL, the firmware MMBFW allocates the banks BK3-BK6 having the same size as the banks BK3-BK6 allocated to the system boards SB to the BIOSINF areas in the PTINF0 area-PTINF3 area. Then, the firmware MMBFW initializes the allocated bank BK3-BK6 data to “0xFF” (FIG. 8 (o)). FIG. 16 shows a state where the banks BK0 and BK1 are deleted and the banks BK3 to BK6 are allocated in the nonvolatile memory NVMM.

  Next, in FIG. 9, the firmware MMBFW restarts the management board MMB, and instructs the firmware BMCFW of all the partitions PT0 to PT3 to turn on the power (FIG. 9 (a)). Each firmware BMCFW powers on each partition PT based on a power-on instruction (FIG. 9B). In each system board SB, power is always supplied to the BMC and the nonvolatile memory NVMS. When the power of the partition PT is turned on, the CPU starts operating, the BIOS is activated, and the BIOS starts POST (FIG. 9C). The BIOS acquires the area management table NVTBL via the BMC, and the management boards MMB and BMC are executing the BIOSINF area switching process based on the statuses MMB-ST and BMC-ST being “1”. It is detected (FIG. 9 (d)). By providing an area for holding the states MMB-ST and BMC-ST in the area management table NVTBL, the BIOS can detect execution of the BIOSINF area switching process by the firmware MMBFW and BMCFW. Therefore, the BIOS can detect the start timing of Variable Reclaim that is executed in accordance with the BIOSINF area switching process. That is, the BIOS starts extraction processing (Variable Reclaim processing) for extracting valid BIOS setting information from the existing banks BK0 and BK1 based on “1” held in the states MMB-ST and BMC-ST.

  Since it is detected that the management boards MMB and BMC are executing the BIOSINF area switching process, the BIOS interrupts the POST (FIG. 9E). Then, the BIOS instructs the firmware BMCFW to change the status BIOS-ST from “0” to “1” in order to execute Variable Reclaim (FIG. 9F). The firmware BMCFW changes the state BIOS-ST of the area management table NVTBL from “0” to “1” based on an instruction from the BIOS (FIG. 9G). By providing an area for holding the state BIOS-ST in the area management table NVTBL, the firmware BMCFW can detect that Variable Reclaim is being executed.

  By executing Variable Reclaim, the BIOS leaves the valid BIOS setting information held in the BIOSINF area of the nonvolatile memory NVMS and deletes the invalid BIOS setting information (FIG. 9 (h)). That is, the BIOS repeats the operation of extracting valid BIOS setting information from the bank BK0 in which the existing BIOS setting information is stored, and the instruction to store the extracted BIOS setting information in the bank BK1. For example, the BIOS is executed by using an existing variable reclaim function. Note that the BIOS may execute a process of directly storing the valid BIOS setting information extracted from the bank BK0 in the bank BK3 by using a function different from the existing variable reclaim function. In this case, the process of copying valid BIOS setting information to be described later from the existing bank BK0 to the new bank BK3 is omitted.

  For example, when reading the BIOS setting information from the nonvolatile memory NVMS, the BIOS specifies the bank BK to be accessed, the address offset value, and the read size as parameters of the IPMI command. Further, when the BIOS setting information is written to the nonvolatile memory NVMS, the BIOS designates the bank BK to be accessed, the address offset value, the write size, and the write data (BIOS setting information) as parameters of the IPMI command.

  After extracting all valid BIOS setting information, the BIOS issues an instruction to erase data in the bank BK0 to the firmware BMCFW. After the data in the bank BK0 is erased, the valid BIOS held in the bank BK1 is issued. The setting information is written back to the bank BK0. Note that access to the BIOSINF area of the nonvolatile memory NVMS is controlled by the firmware BMCFW based on an instruction from the BIOS. The state of the nonvolatile memory NVMS that has completed the variable reclaim is shown in FIG.

  Next, the BIOS instructs the firmware BMCFW to change the status BIOS-ST from “1” to “2” (FIG. 9 (i)). The firmware BMCFW changes the state BIOS-ST of the area management table NVTBL from “1” to “2” based on an instruction from the BIOS (FIG. 9 (j)). “2” in the status BIOS-ST means that valid BIOS setting information extracted by executing Variable Reclaim is being copied from the existing BIOSINF area (bank BK0) to the newly allocated BIOSINF area (bank BK3). Indicates.

  The BIOS repeatedly issues an instruction to copy the valid BIOS setting information from the existing bank BK0 to the newly assigned bank BK3 to the firmware BMCFW (FIG. 9 (k)). The instruction to copy valid BIOS setting information from the existing bank BK0 to the newly allocated bank BK3 is an issuance of a read command for the bank BK0 and a write command for the bank BK3 alternately. The firmware BMCFW reads the BIOS setting information to be copied from the bank BK0 based on the read command, and stores the valid BIOS setting information included in the write command in the bank BK3 based on the write command. The storage of the valid BIOS setting information based on the write command in the bank BK3 is executed by the storage unit STR of the firmware BMCFW. That is, based on an instruction from the BIOS, a copy process for copying the BIOS setting information to be copied from the bank BK0 to the bank BK3 is executed. FIG. 18 shows the state of the nonvolatile memory NVMS in which the BIOS setting information has been stored from the bank BK0 to the bank BK3.

  The firmware BMCFW issues an instruction to store the copied BIOS setting information in the bank BK3 assigned to the PTINF area of the nonvolatile memory NVMM to the firmware MMBFW (FIG. 9 (l)). By storing “2” in the state BIOS-ST of the area management table NVTBL, the firmware BMCFW can determine to transfer the BIOS setting information transferred from the BIOS together with the write command to the firmware MMBFW. Each time the BIOS setting information is transferred from each firmware MMBFW, the firmware MMBFW stores the BIOS setting information in the bank BK3 assigned to the corresponding PTINF area (FIG. 9 (m)). The state of the nonvolatile memory NVMM in which valid BIOS setting information is stored in the new bank BK3 in the PTINF area is shown in FIG.

  After the copying of all the BIOS setting information is completed, the BIOS instructs the firmware BMCFW to change the status BIOS-ST from “2” to “0” (FIG. 9 (n)). Based on the instruction from the BIOS, the firmware BMCFW changes the state BIOS-ST of the area management table NVTBL from “2” to “0”, and detects the completion of copying of the BIOS setting information by the BIOS (FIG. 9 (o )).

  The firmware BMCFW deletes the existing BIOSINF areas (banks BK0 and BK1) used for Variable Reclaim based on the state BIOS-ST being set to “0” (FIG. 9 (p)). That is, the deletion unit DEL of the firmware BMCFW deletes the bank BK0 after valid BIOS setting information is stored in the bank BK3. Further, the deletion unit DEL of the firmware BMCFW reflects the deletion of the banks BK0 and BK1 in the area management table NVTBL and the address management table ADTBL (FIG. 9 (q)). That is, after deleting valid BIOS setting information in the bank BK3, the deletion unit DEL of the firmware BMCFW deletes the bank sizes BK0SZ and BK1SZ indicating the sizes of the existing banks BK0 and BK1 from the area management table NVTBL. Further, the deletion unit DEL of the firmware BMCFW deletes the offset values offsetmin and offsetmax of the existing banks BK0 and BK1 from the address management table ADTBL. As a result, the process of switching the BIOSINF area is completed, and the firmware MMBFW changes the state BMC-ST from “1” to “0” (FIG. 9 (r)). FIG. 20 shows a state of the nonvolatile memory NVMS in which the area management table NVTBL and the address management table ADTBL are updated in accordance with the deleted banks BK0 and BK1 after the BIOS setting information is stored in the bank BK3.

  Next, in FIG. 10, the firmware MMBFW acquires the area management table NVTBL from the BMC, and detects the completion of the BIOSINF area switching process based on the state BMC-ST being “0” (FIG. 10 ( a), (b)). Then, the firmware MMBFW instructs the firmware BMCFW to shut off the power of all the partitions PT0 to PT3 (SB0 to SB3) (FIG. 10C). The firmware BMCFW stops supplying power to each partition PT (that is, each system board SB) and terminates the BIOS (FIG. 10 (d)). In each system board SB, supply of power to the BMC and the nonvolatile memory NVMS is continued.

  Next, the firmware MMBFW instructs the firmware BMCFW to change the state MMB-ST from “1” to “0” because the BIOSINF area switching processing based on the hardware configuration table HWTBL set to the basic configuration is completed. FIG. 10 (e)). The firmware BMCFW changes the state MMB-ST of the area management table NVTBL from “1” to “0” based on the instruction from the firmware MMBFW ((f) in FIG. 10).

  Next, the firmware MMBFW restores the saved hardware configuration table HWTBL (FIG. 10 (g)). By changing the hardware configuration table HWTBL, the configuration of the partition PT of the information processing system SYS2 returns to the original configuration before the integrated firmware upgrade. The state of the nonvolatile memory NVMM in which the saved hardware configuration table HWTBL is restored is shown in FIG. In other words, FIG. 21 shows the state of the nonvolatile memory NVMM of the management board MMB after completion of the BIOSINF area expansion processing.

  The firmware MMBFW instructs the firmware BMCFW of the home system board SB of each partition PT to store the BIOSINF information and the BMCINF information held in the nonvolatile memory NVMM (FIG. 10 (h)). Upon receiving the instruction, the firmware BMCFW of the home system board SB stores the BIOSINF information and the BMCINF information transferred from the firmware MMBFW in the BIOSINF area and the BMCINF area, respectively (FIG. 10 (i)).

  Then, the expansion process of the BIOSINF area of all the system boards SB is completed. The state of the nonvolatile memory NVMS of each system board SB after completion of the expansion processing is shown in FIG. In FIG. 22, the number of banks BK is increased as compared to FIG. 12 before the start of the expansion process, and the home system boards SB0 and SB2 assigned to the partitions PT0 and PT1 have valid BIOS setting information DT00 ′ and DT10 ′. Hold each. Thereafter, the partitions PT0 and PT1 use the new BIOSINF area obtained by copying the valid BIOS setting information DT00 'and DT10' as the existing BIOSINF area.

  23 and 24 show an example of processing executed by the BMC in the information processing system SYS2 shown in FIG. FIG. 24 shows the continuation of the processing shown in FIG. The processing illustrated in FIGS. 23 and 24 is started when the BMC firmware BMCFW activates the BMC based on the BMC activation instruction from the management board MMB. That is, FIG. 23 and FIG. 24 show an example of the control method and control program of the information processing system SYS2. Detailed description of the same processing as that shown in FIGS. 8 to 10 is omitted.

  First, in step S100, the BMC acquires the number of banks BIOSBKN of the existing BIOSINF area held in the area management table NVTBL. Next, in step S102, the BMC acquires the number of banks in the new BIOSINF area described in the firmware BMCFW. Next, in step S104, the BMC determines whether or not the number of banks acquired in steps S100 and S102 matches each other. If the number of banks matches each other, the existing BIOSINF area is used as it is, so the processing ends. If the number of banks is different, the process proceeds to step S106 in order to switch the existing BIOSINF area to the new BIOSINF area. Is done.

  In step S106, the BMC changes the state BMC-ST from “0” to “1”. Next, in step S108, the BMC adds information indicating the newly allocated BIOSINF area to the area management table NVTBL and the address management table ADTBL. Next, in step S110, the BMC newly allocates the number of banks BK corresponding to the new BIOSINF area to the nonvolatile memory NVMS.

  Next, in step S112, the BMC establishes communication with the management board MMB. Next, in step S114, the BMC changes the state MMB-ST of the area management table NVTBL from “0” to “1” based on an instruction from the management board MMB. In step S116, when the BMC receives BIOSINF information and BMCINF information from the management board MMB, the BMC stores the received BIOSINF information and BMCINF information in the existing BIOSINF area and BMCINF area. That is, the BIOSINF information and BMCINF information held in the existing BIOSINF area and BMCINF area are replaced with the BIOSINF information and BMCINF information received from the management board MMB.

  Next, in step S118, the BMC turns on the power of the partition PT based on an instruction from the management board MMB. The BIOS is activated by powering on the partition PT. Next, in step S120, the BMC sets the state BIOS-ST of the area management table NVTBL to “1” indicating that Variable Reclaim is being executed, based on an instruction from the BIOS. Next, in step S122, the BMC stores the valid BIOS setting information extracted by the execution of Variable Reclaim by the BIOS in the existing BIOSINF area where the data has been deleted. Next, in step S124, the BMC determines whether or not it has received an instruction to set the state BIOS-ST of the area management table NVTBL to “2”. If an instruction to set the state BIOS-ST to “2” is received, it is determined that execution of Variable Reclaim has ended, and the process proceeds to step S126. If the instruction to set the state BIOS-ST to “2” has not been received, it is determined that Variable Reclaim is being executed, and the process returns to step S122. In step S126, the BMC sets the status BIOS-ST of the area management table NVTBL to “2” indicating that valid BIOS setting information is being copied to the new BIOSINF area.

  Next, in step S128 shown in FIG. 24, the BMC copies valid BIOS setting information from the existing BIOSINF area to the new BIOSINF area based on an instruction from the BIOS. In step S130, the BMC issues an instruction to store the copied BIOS setting information in the nonvolatile memory NVMM to the management board MMB. In step S132, the BMC determines whether an instruction to set the state BIOS-ST of the area management table NVTBL to “0” has been received. When receiving an instruction to set the status BIOS-ST to “0”, it is determined that copying of valid BIOS setting information has been completed, and the process proceeds to step S134. If the instruction to set the status BIOS-ST to “0” has not been received, it is determined that copying of valid BIOS setting information has not been completed, and the process returns to step S128.

  Next, in step S134, the BMC sets the state BIOS-ST of the area management table NVTBL to “0”. Next, in step S136, the BMC deletes the existing BIOSINF area used for Variable Reclaim. In step S138, the BMC reflects the deletion of the existing BIOSINF area in the area management table NVTBL and the address management table ADTBL. Next, in step S140, the BMC changes the state BMC-ST from “1” to “0”.

  Next, in step S142, the BMC shuts off the power to all the partitions PT0 to PT3 based on the power cut instruction from the management board MMB. Next, in step S144, the BMC changes the state MMB-ST of the area management table NVTBL from “1” to “0” based on an instruction from the management board MMB. Next, in step S146, the BMC stores the BIOSINF information received from the management board MMB in the new BIOSINF area, and ends the BIOSINF area switching process. Thereafter, the BMC executes processing for managing the operation of the CPU and the like mounted on the system board SB.

  25 and 26 show an example of processing executed by the management board MMB in the information processing system SYS2 shown in FIG. FIG. 26 shows the continuation of the processing shown in FIG. The process shown in FIG. 25 is started when the management board MMB is activated. 25 and 26 show an example of the control method and control program of the information processing system SYS2. Detailed description of the same processing as that shown in FIGS. 8 to 10 is omitted.

  First, in step S200, the management board MMB instructs the BMC of each system board SB to restart. Next, in step S202, the management board MMB establishes communication with each system board SB. Next, in step S204, the management board MMB acquires the area management table NVTBL from the BMC of each partition PT.

  In step S206, the management board MMB determines whether or not the state BMC-ST of the area management table NVTBL acquired from the BMC of each partition PT is “1”. If the state BMC-ST is “1”, the process proceeds to step S208 to execute the BIOSINF area switching process. If the state BMC-ST is not “1”, the BIOSINF area switching process is not performed. The process is terminated. In step S208, when the status BMC-ST of all the system boards SB becomes “1”, the management board MMB saves the hardware configuration table HWTBL. Next, in step S210, the management board MMB sets the hardware configuration table HWTBL to the basic configuration as shown by a thick frame in FIG.

  Next, in step S212, the management board MMB transfers the BIOSINF information and BMCINF information to the BIOSINF information and BMCINF information stored in the nonvolatile memory NVMM for the home system board SB having a configuration change. Instruct. The processing after step S212 is executed for each partition PT. Next, in step S214, the management board MMB issues to the BMC an instruction to change the state MMB-ST of the area management table NVTBL from “0” to “1”. Next, in step S216, the management board MMB deletes the existing BIOSINF information included in the PTINF0 area-PTINF3 area corresponding to the partitions PT0-PT3 held in the nonvolatile memory NVMM.

  Next, in step S218, the management board MMB creates a new BIOSINF area in each of the PTINF0 area and the PTINF3 area based on the area management table NVTBL acquired in step S204. The management board MMB initializes the created new BIOSINF area data to “0xFF”. Next, in step S220, the management board MMB instructs the BMC of the partition PT to turn on the power.

  Next, in step S222 shown in FIG. 26, the management board MMB determines whether or not the valid BIOS setting information extracted by Variable Reclaim has been received from the BMC. If valid BIOS setting information is received, the process proceeds to step S224. If valid BIOS setting information is not received, the process proceeds to step S226. In step S224, the management board MMB stores the valid BIOS setting information received from the BMC in a new BIOSINF area of the PTINF area corresponding to the partition PT to which the BMC belongs. In other words, valid BIOS setting information stored in the nonvolatile memory NVMS of each system board SB is backed up in the nonvolatile memory NVMM of the management board MMB.

  In step S226, the management board MMB acquires the area management table NVTBL from the BMC. Next, in step S228, the management board MMB determines whether or not the state BMC-ST of the area management table NVTBL acquired from the BMC is “0”. When the state BMC-ST is “0”, it is determined that the BIOSINF area switching process by the BMC is completed, and the process proceeds to step S230. When the state BMC-ST is not “0”, it is determined that the BIOSINF area switching process by the BMC is being executed, and the process returns to step S222.

  In step S230, the management board MMB instructs the BMC to power off the partition PT. Next, in step S232, the management board MMB instructs the BMC to change the state MMB-ST from “1” to “0”. Next, in step S234, the management board MMB determines whether or not the power to all the partitions PT (that is, all the system boards SB) is shut off. If all the partitions PT are powered off, the process proceeds to step S236. If there is a partition PT whose power is not shut off, the determination in step S234 is repeated.

  In step S236, the management board MMB returns the hardware configuration table HWTBL to the saved configuration. Next, in step S238, the management board MMB issues an instruction to store the BIOSINF information held in the nonvolatile memory NVMM in the new BIOSINF area to the BMC of the home system board SB of the partition PT. The management board MMB issues an instruction to store the BMCINF information held in the nonvolatile memory NVMM in the BMCINF area to the BMC of the home system board SB of the partition PT. Then, when the processing up to step S238 is completed for all the partitions PT, the management board MMB ends the BIOSINF area switching process. Thereafter, the management board MMB executes processing for managing the entire information processing system SYS2.

  FIG. 27 shows an example of processing executed by the BIOS in the information processing system SYS2 shown in FIG. The process shown in FIG. 27 is started based on the fact that the BMC firmware BMCFW has turned on the power of the partition PT. Detailed description of the same processing as that shown in FIGS. 8 to 10 is omitted.

  First, in step S300, the BIOS starts POST. Next, in step S302, the BIOS acquires the area management table NVTBL from the BMC. Next, in step S304, the BIOS determines whether or not both the states MMB-ST and BMC-ST of the area management table NVTBL acquired from the BMC of each partition PT are “1”. If the states MMB-ST and BMC-ST are both “1”, the process proceeds to step S306. If the states MMB-ST and BMC-ST are both “0”, the process proceeds to step S316.

  In the normal operation state, the logical values of the states MMB-ST and BMC-ST are not different from each other. Therefore, when the BIOS detects that the logical values of the states MMB-ST and BMC-ST are different from each other, the BIOS issues an error notification to the BMC. Upon receiving the error notification, the BMC stops the subsequent BIOSINF area switching process and notifies the management board MMB of the switching process stoppage. For example, the management board MMB that has received the notification of the stop of the switching process instructs the BMC to shut off the power of the partition PT, and then restarts the process shown first in FIG. As described above, the logical values of the states MMB-ST and BMC-ST are not different from each other in the normal operation state. Therefore, the BIOS detects only the state BMC-ST, and when the state BMC-ST is “1”, the process proceeds to step S306, and when the state BMC-ST is “0”, the process proceeds to step S316. You may migrate.

  In step S306, the BIOS interrupts POST and executes an instruction to change the state BIOS-ST of the area management table NVTBL from “0” to “1” to the BMC in order to execute Variable Reclaim accompanying the BIOSINF area switching process. Issue. Next, in step S308, the BIOS executes Variable Reclaim. An example of Variable Reclaim processing is shown in FIG.

  Next, in step S310, the BIOS instructs to change the status BIOS-ST of the area management table NVTBL from “1” to “2” in order to copy the BIOS setting information from the existing BIOSINF area to the new BIOSINF area. Issue to BMC. Next, in step S312, the BIOS issues an instruction to copy the BIOS setting information from the existing BIOSINF area to the new BIOSINF area to the BMC. Next, in step S314, the BIOS issues an instruction to the BMC to change the state BIOS-ST of the area management table NVTBL from “2” to “0” after the copying of the BIOS setting information is completed. Thereafter, the BIOS is stopped in accordance with the power-off of the partition PT in step S142 in FIG.

  On the other hand, when the BIOSINF area switching process is not executed, in step S316, the BIOS determines whether the free space in the BIOSINF area is equal to or less than a predetermined amount. If the free space in the BIOSINF area is less than or equal to the predetermined amount, the process proceeds to step S318. If the free space in the BIOSINF area is greater than the predetermined amount, the process ends. In step S318, the BIOS executes Variable Reclaim and ends the process. Thereafter, the BIOS executes another process when the BIOS is activated.

  FIG. 28 shows an example of the Variable Reclaim process shown in FIG. The process shown in FIG. 28 is executed by the BIOS.

  First, in step S400, the BIOS extracts valid BIOS setting information from the bank BK for saving the BIOS setting information in the BIOSINF area in the nonvolatile memory NVMS. For example, the storage bank BK is BK0 shown in FIG. Next, in step S402, the BIOS stores the extracted valid BIOS setting information in the organizing bank BK. For example, the organizing bank BK is BK1 shown in FIG. Next, in step S404, the BIOS determines whether extraction of valid BIOS setting information has been completed. If the extraction of valid BIOS setting information is completed, the process proceeds to step S406. If the extraction of valid BIOS setting information is not completed, the process returns to step S400.

  In step S406, the BIOS erases the data in the bank BK for storage. In step S408, the BIOS stores the valid BIOS setting information stored in the organizing bank BK in the saving bank BK. Next, in step S410, the BIOS determines whether the storage of the valid BIOS setting information in the storage bank BK has been completed. If the storage of the valid BIOS setting information in the storage bank BK is completed, the process ends. If the storage of the valid BIOS setting information in the storage bank BK is not completed, the process proceeds to step S408. Returned.

  FIG. 29 shows an example of the initial operation of the information processing system SYS2 shown in FIG. The first operation is executed in an assembly process of a manufacturer that manufactures the information processing system SYS2, or is executed after a factory default process for returning the information processing system SYS2 to a state before shipment.

  First, the firmware MMBFW instructs the firmware BMCFW executed by the BMC of each system board SB to restart based on the power-on of the information processing system SYS2 (FIG. 29A). Based on the start instruction, the firmware BMCFW refers to the area management table NVTBL and compares the existing bank number BIOSBKN with the number of new banks BK for holding the BIOSINF information requested by the firmware BMCFW. However, since the area management table NVTBL does not exist in the first operation, the firmware BMCFW creates the area management table NVTBL and the address management table ADTBL based on the specifications of the bank BK described in the firmware BMCFW (FIG. 29 ( b)). Next, the firmware BMCFW creates a BIOSINF area and a BMCINF area based on the area management table NVTBL, and initializes the BIOSINF area and the BMCINF area with “0xFF” (FIG. 29C).

  On the other hand, the hardware configuration table HWTBL held in the nonvolatile memory NVMM of the management board MMB is in the state at the time of shipment shown in FIG. 5 (FIG. 29 (d)). The firmware MMBFW sets information in the hardware configuration table HWTBL based on an external partition PT generation request (FIG. 29 (e)). For example, the firmware MMBFW assigns the system board SB0 to the partition PT0.

  The firmware MMBFW acquires the area management table NVTBL and the address management table ADTBL from the home system board SB0 of the partition PT0 (FIG. 29 (f)). Based on the information acquired from the partition PT0, the firmware MMBFW creates a BIOSINF area and a BMCINF area in the PTINF0 area in the nonvolatile memory NVMM, and initializes them with “0xFF” (FIG. 29 (g)). Thereafter, the power supply of the information processing system SYS2 is shut off, and the first operation of the information processing system SYS2 is completed.

  FIG. 30 shows an example of the operation when the power of the partition PT is turned on in the information processing system SYS2 shown in FIG. First, the firmware MMBFW instructs the predetermined partition PT to turn on the power (FIG. 30 (a)). The firmware BMCFW of the partition PT instructed to turn on the power turns on the partition PT and starts the BIOS (FIG. 30B).

  The BIOS acquires the area management table NVTBL and the address management table ADTBL from the nonvolatile memory NVMS via the firmware BMCFW (FIG. 30 (c)). Then, the BIOS accesses the BIOSINF area of the nonvolatile memory NVMS based on the area management table NVTBL and the address management table ADTBL, and acquires the BIOSINF information (FIG. 30 (d)).

  In the example shown in FIG. 30, the BIOS setting information is instructed from the outside during the activation of the BIOS, and the BIOS instructs the firmware BMCFW to change the BIOS setting information (FIGS. 30E and 30F). The firmware BMCFW updates the BIOSINF area based on an instruction from the BIOS (FIG. 30 (g)). Further, the firmware BMCFW issues an instruction to update the BIOSINF area in the nonvolatile memory NVMM of the management board MMB to the firmware MMBFW (FIG. 30 (h)). The firmware MMBFW updates the BIOSINF area in the nonvolatile memory NVMM based on the instruction from the firmware BMCFW (FIG. 30 (i)). As a result, the BIOSINF information in the system board SB and the BIOSINF information in the management board MMB match each other.

  FIG. 31 shows an example of the operation when the system board SB is replaced in the information processing system SYS2 shown in FIG. In the following, an example of replacing the system board SB3 when the system board SB2 of the partition PT1 fails in the configuration of the partition PT shown in the hardware configuration table HWTBL of FIG. 5 will be described.

  First, the firmware MMBFW updates the hardware configuration table HWTBL based on an instruction to replace the system board SB from the outside, and changes the home system board SB from the system board SB2 to the system board SB3 (FIG. 31A). (B)). Next, the firmware MMBFW transfers the BIOSINF information and BMCINF information held in the PTINF1 area corresponding to the partition PT1 to the firmware BMCFW of the system board SB3 in the nonvolatile memory NVMM (FIG. 31 (c)).

  The firmware BMCFW of the system board SB3 rewrites the BIOSINF area in the nonvolatile memory NVMS with the transferred BIOSINF information, and rewrites the BMCINF area in the nonvolatile memory NVMS with the transferred BMCINF information (FIG. 31 (d)). .

  After the nonvolatile memory NVMS is rewritten, the firmware MMBFW instructs the firmware BMCFW of the system board SB3 of the partition PT1 to turn on the power (FIG. 31 (e)). Based on the power-on instruction, the firmware BMCFW of the system board SB3 powers on the partition PT1 and starts the BIOS (FIG. 31 (f)).

  The BIOS acquires the area management table NVTBL and the address management table ADTBL from the nonvolatile memory NVMS via the firmware BMCFW (FIG. 31 (g)). Then, the BIOS accesses the BIOSINF area based on the area management table NVTBL and the address management table ADTBL, and acquires the BIOSINF information (FIG. 31 (h)). As a result, the BIOSINF information and the BMCINF information used in the system board SB2 before the failure are transferred to the system board SB3.

  As described above, also in the embodiment shown in FIG. 3 to FIG. 31, the same effect as that of the embodiment shown in FIG. For example, the size of the BIOSINF area of all the system boards SB can be changed without returning the information processing system SYS2 to the state before shipment (factory default). In other words, the size of the BIOSINF area that holds the BIOS setting information of the electronic component EP in the system board SB can be changed without losing the information set in the partition PT. Since the size of the BIOSINF area can be changed without human intervention, there is no need to restore lost information, and artificial setting errors can be suppressed. By reflecting the BIOSINF area whose size has been changed in the PTINF area in the nonvolatile memory NVMM of the management board MMB, the BIOS setting information changed by the BIOS can be backed up in the PTINF area.

  Further, in the embodiment shown in FIGS. 3 to 31, the following effects can be obtained. That is, when switching the size of the BIOSINF area, the BIOS can access both the existing BIOSINF area and the new BIOSINF area. Therefore, the BIOS can execute variable reclaim using the existing BIOSINF information to extract valid BIOS setting information, and can store the extracted BIOS setting information in the newly assigned BIOSINF area.

  By providing an area for holding the state BMC-ST in the area management table NVTBL, the firmware MMBFW can detect execution of the BIOSINF area switching process by the firmware BMCFW. Therefore, the BIOSINF area switching process can be executed in cooperation with the firmware BMCFW. Also, by providing an area for holding the state BMC-ST in the area management table NVTBL, the BIOS can detect execution of the BIOSINF area switching process by the firmware BMCFW. Therefore, the BIOS can detect the start timing of Variable Reclaim that is executed in accordance with the BIOSINF area switching process.

  The firmware BMCFW can detect execution of Variable Reclaim by the BIOS by holding the state BIOS-ST indicating “1” in the area management table NVTBL during execution of Variable Reclaim. Also, the firmware BMCFW transfers the BIOS setting information transferred from the BIOS for copying to the firmware MMBFW by holding the state BIOS-ST indicating “2” in the area management table NVTBL during copying of the BIOS setting information. be able to.

  By assigning one system board SB to each partition PT by the hardware configuration table HWTBL of the basic configuration, BIOSINF information and BMCINF information can be set in all the system boards SB. Thereby, for example, invalid data DT30 and DT31 (FIG. 13) retained in the past in the BIOSINF area and the BMCINF area of the system board SB3 can be deleted.

  From the above detailed description, features and advantages of the embodiments will become apparent. This is intended to cover the features and advantages of the embodiments described above without departing from the spirit and scope of the claims. Also, any improvement and modification should be readily conceivable by those having ordinary knowledge in the art. Therefore, there is no intention to limit the scope of the inventive embodiments to those described above, and appropriate modifications and equivalents included in the scope disclosed in the embodiments can be used.

  ADTBL ... Address management table; ALC ... Allocation unit; BIOSBKN ... Number of banks; BIOSINF ... BIOS information; BIOS-ST ... State; BK ... Bank; BK0SZ-BK6SZ ... Bank size; BMCBKN ... Number of banks; BMCFW ... Firmware; Information; BMC-ST ... Status; STR ... Storage unit; DEL ... Deletion unit; EP ... Electronic component; HWTBL ... Hardware configuration table; IOSW ... I / O switch; IOU ... I / O unit; MM ... Main memory; Board; MMBFW ... Firmware; MMB-ST ... Status; NVMM, NVMS ... Nonvolatile memory; NVTBL ... Area management table; PT ... Partition; PTINF ... Partition information; SB ... System board; Information processing system; TSNS ... temperature sensor

Claims (11)

In an information processing apparatus including a plurality of electronic components including an arithmetic processing device, a control device that controls operations of the plurality of electronic components, and a storage device,
The controller is
The size of the first area that holds the setting information of the plurality of electronic components and is allocated to the storage device is different from the size of the area for setting information that is newly specified by changing the function of the information processing apparatus. A detection unit for detecting
An allocating unit that allocates, to the storage device, a second area that holds setting information instead of the first area, based on detection by the detection unit;
A storage unit that stores valid setting information extracted from the first area in the second area;
An information processing apparatus comprising: a deletion unit that deletes the first area from the storage device after valid setting information is stored in the second area. The allocation unit adds second size information indicating the size of the second region to a size information holding unit that stores first size information indicating the size of the first region based on detection by the detection unit. ,
2. The information processing according to claim 1, wherein the deletion unit deletes the first size information held in the size information holding unit after the valid setting information is stored in the second area. apparatus.   The arithmetic processing unit extracts the effective setting information from the first area based on detection by the detection unit, rewrites the first area with the extracted effective setting information, and then rewrites the first area. The information processing apparatus according to claim 1, wherein the storage unit is configured to execute processing for storing the valid setting information in the second area. The control device includes a first state holding unit that holds a switching state indicating that the region holding the valid setting information is being switched from the first region to the second region,
The arithmetic processing device starts extraction processing for extracting the valid setting information from the first area based on the fact that the switching state is held in the first state holding unit. 3. The information processing apparatus according to 3. The control device copies the effective setting information replaced by the first area by the arithmetic processing device to the second area, indicating that the arithmetic processing apparatus is extracting the effective setting information. A second state holding unit that holds a copy state indicating that the medium is in an idle state that is neither the extraction state nor the copy state;
5. The deletion unit according to claim 1, wherein the deletion unit deletes the first area based on a change in the second state holding unit from the copy state to the idle state. 6. Information processing apparatus according to item. The storage device includes a plurality of storage elements that are rewritten from a first logical value to a second logical value by a write operation,
When the setting information held in the first area or the second area is changed, the arithmetic processing unit writes the changed setting information in an area where the setting information is not written, and holds the setting information before the change. 6. The information processing apparatus according to claim 1, wherein a region to be operated is set to an invalid state. A plurality of information processing devices including a plurality of electronic components including an arithmetic processing device, a control device for controlling operations of the plurality of electronic components, and a storage device, and a management device for managing operations of the plurality of information processing devices In an information processing system comprising:
The control device of each of the plurality of information processing devices is
The size of the first area that holds the setting information of the plurality of electronic components and is allocated to the storage device is different from the size of the area for setting information that is newly specified by changing the function of the information processing apparatus. A detection unit for detecting
An allocating unit that allocates, to the storage device, a second area that holds setting information instead of the first area, based on detection by the detection unit;
A storage unit that stores valid setting information extracted from the first area in the second area;
An information processing system comprising: a deletion unit that deletes the first area from the storage device after valid setting information is stored in the second area. The management device
A configuration information holding unit that holds configuration information indicating the information processing apparatus to be assigned to a partition that is an execution unit of information processing;
A copy holding unit that is provided corresponding to the partition and holds a copy of setting information held by the first area in the partition;
The management device
When the second area is added to the partition, a corresponding area corresponding to the second area is allocated to the copy holding unit;
8. The information processing system according to claim 7, wherein the valid setting information stored in the second area is stored in the corresponding area. The management device
A configuration information holding unit that holds configuration information indicating the information processing apparatus to be assigned to a partition that is an execution unit of information processing;
A copy holding unit that is provided corresponding to the partition and holds a copy of setting information held by the first area in the partition;
The management device
When the second area is added to the partition, the configuration information stored in the configuration information storage unit is saved, and the configuration information that assigns each of the plurality of information processing apparatuses to the different partitions is the configuration information. Store in the holding part,
Rewriting the first area of each of the plurality of information processing devices with a copy of the setting information held by the copy holding unit corresponding to the partition to which each of the plurality of information processing devices is assigned,
Assigning a corresponding area corresponding to the second area to the copy holding unit;
Storing the effective setting information stored in the second area in the corresponding area;
After storing the valid setting information in the corresponding area, the saved configuration information is returned to the configuration information holding unit,
8. The information processing system according to claim 7, wherein the valid setting information held in the corresponding area is stored in the second area of the corresponding partition. In a control method for an information processing device including a plurality of electronic components including an arithmetic processing device, a control device for controlling operations of the plurality of electronic components, and a storage device,
The control device is
The size of the first area that holds the setting information of the plurality of electronic components and is allocated to the storage device is different from the size of the area for setting information that is newly specified by changing the function of the information processing apparatus. Detect
Based on the detection, a second area holding setting information is allocated to the storage device instead of the first area,
Storing valid setting information extracted from the first area in the second area;
After the effective setting information is stored in the second area, the first area is deleted from the storage device. In a control program for an information processing device including a plurality of electronic components including an arithmetic processing device, a control device for controlling operations of the plurality of electronic components, and a storage device,
In the control device,
The size of the first area that holds the setting information of the plurality of electronic components and is allocated to the storage device is different from the size of the area for setting information that is newly specified by changing the function of the information processing apparatus. To detect
Based on the detection, the storage device is assigned a second area for holding setting information instead of the first area,
Valid setting information extracted from the first area is stored in the second area;
A control program for an information processing apparatus, wherein after the effective setting information is stored in the second area, the first area is deleted from the storage device.

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