JP2018029140A - Substrate and manufacturing method thereof, and module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress that a metal layer is exposed from a side surface.SOLUTION: A substrate comprises one or more first insulator layers 14 laminated each other, a metal layer 12 that is provided on the one or more first insulator layers and has a side surface positioning inside of at least a lower part of the side surface of the one or more first insulator layers, one or more second insulator layers 16 laminated each other that are provided on the metal layer laminated each other and have the side surface positioning inside of at least the lower part of the side surface of the first insulator layers, and a third insulator layer 18 that covers at least a lower part of the side surface of the one or more second insulator layers, the side surface of the metal layer, and a top surface of a peripheral part of the one or more first insulator layers.SELECTED DRAWING: Figure 6

Description

  The present invention relates to a substrate, a manufacturing method thereof, and a module, for example, a substrate on which a metal layer and an insulating layer are laminated, a manufacturing method thereof, and a module.

  A wiring board in which a metal layer and an insulating layer are laminated is known (for example, Patent Documents 1 and 2). Electronic components and the like are mounted on the wiring board. For example, an electronic component is embedded in a metal layer in the wiring board. An electronic component is mounted on the upper surface of the wiring board.

JP 2014-112649 A JP 2005-72064 A

  The wiring board is manufactured by cutting a multilayer board in which a plurality of insulating layers and metal layers are laminated into a wiring board having a desired shape. However, when the multilayer substrate is cut, the side surface of the metal layer is exposed on the side surface of the separated wiring substrate. As a result, the exposed metal layer is coupled with an external part and the characteristics are deteriorated. Alternatively, the exposed metal layer is in electrical contact with the outside.

  This invention is made | formed in view of the said subject, and it aims at suppressing that a metal layer is exposed from a side surface.

  The present invention provides one or more first insulating layers stacked on each other and the one or more first insulating layers, and the side surfaces are at least lower than the side surfaces of the one or more first insulating layers. A metal layer located on the metal layer, a side surface of which is located at least inside a lower side of the side surface of the first insulating layer, and the two or more second insulating layers stacked on each other; And a third insulating layer covering at least a lower portion of side surfaces of the plurality of second insulating layers, a side surface of the metal layer, and an upper surface of a peripheral edge of the one or more first insulating layers.

  The said structure WHEREIN: The said metal layer has a protrusion part which protrudes to a side, A said 3rd insulating layer can be set as the structure which covers the side surface of the said protrusion part.

  In the above configuration, side surfaces of the metal layer and the one or more second insulating layers are provided in substantially the same plane, and at least lower portions of the side surfaces of the third insulating layer and the side surfaces of the one or more first insulating layers are It can be set as the structure provided in the substantially same plane.

  In the above configuration, the metal layer may be thicker than each of the one or more first insulating layers and the one or more second insulating layers.

  The said structure WHEREIN: The said protrusion part can be set as the structure thinner than the center part of the said metal layer.

  In the above configuration, the elastic modulus of the third insulating layer may be smaller than the elastic modulus of the one or more first insulating layers and the one or more second insulating layers.

  In the above configuration, the upper surface of the third insulating layer may be lower than the upper surface of the uppermost insulating layer among the one or more second insulating layers.

  The said structure WHEREIN: It can be set as the structure which comprises the electronic component embedded in the said metal layer.

  The present invention is a module comprising the above substrate, an electronic component provided on the substrate, and a fourth insulating layer for sealing the electronic component.

  The present invention includes one or more first insulating layers stacked on each other, a plurality of metal layers periodically provided on the one or more first insulating layers via a groove in plan view, and the metal layers One or a plurality of second insulating layers stacked on top of each other and provided periodically through the groove, and filled in the groove, the metal layer and the one or more second insulating layers And a third insulating layer covering the side surface.

  The present invention includes one or more first insulating layers stacked on each other, a metal layer provided on the one or more first insulating layers, and one or more stacked on each other provided on the metal layer. Forming a groove portion so that the one or the plurality of second insulating layers and the metal layer are cut, and filling the third insulating layer in the groove portion. And a step of cutting the laminated substrate into pieces by cutting the third insulating layer so that side surfaces of the metal layer are not exposed from the third insulating layer.

  In the above configuration, the step of forming the groove portion is a step of forming the groove portion so that at least the lower part of the one or the plurality of first insulating layers remains, and the step of separating the multilayer substrate is the step of 1 Or it can be set as the structure including the process cut | disconnected by the said 3rd insulating layer so that the said at least lower side surface of a some 1st insulating layer may be exposed from the said 3rd insulating layer.

  ADVANTAGE OF THE INVENTION According to this invention, it can suppress that a metal layer is exposed from a side surface.

FIG. 1A to FIG. 1D are cross-sectional views illustrating a substrate manufacturing method according to the first embodiment. FIG. 2A and FIG. 2B are plan views (part 1) illustrating the method for manufacturing the substrate according to the first embodiment. FIG. 3A and FIG. 3B are plan views (part 2) illustrating the method for manufacturing the substrate according to the first embodiment. FIG. 4A and FIG. 4B are side views of the substrate according to the first embodiment. FIG. 5A to FIG. 5C are side views of the wiring board according to the first modification of the first embodiment. 6A and 6B are cross-sectional views of the substrate according to the second modification of the first embodiment. FIG. 7A to FIG. 7D are cross-sectional views illustrating the module manufacturing method according to the second embodiment. FIG. 8 is a cross-sectional view of the module according to the second embodiment.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1A to FIG. 1D are cross-sectional views illustrating a substrate manufacturing method according to the first embodiment. FIG. 2A to FIG. 3B are plan views illustrating the method for manufacturing the substrate according to the first embodiment. 1 (a) to 1 (d) correspond to the AA cross section of FIGS. 2 (a) to 3 (b). FIG. 2A illustrates the insulating layer 16 in a transparent manner. The arrangement direction of the cores is the X direction and the Y direction, and the stacking direction of the insulating layers 14 and 16 and the metal layer 12 is the Z direction.

  As shown in FIG. 1A, the multilayer substrate 10 includes a metal layer 12 and insulating layers 14 and 16. A metal layer 12 is provided on the insulating layer 14, and an insulating layer 16 is stacked on the metal layer 12. The insulating layer 14 includes one or more insulating layers 14a and 14b stacked. The insulating layer 16 includes one or more stacked insulating layers 16a and 16b. A metal layer (not shown) for forming a wiring is provided between the insulating layers 14a, 14b, 16a and 16b. Via wirings (not shown) penetrating the insulating layers 14a, 14b, 16a and 16b are provided.

  As shown in FIG. 2A, the cores 12a are periodically arranged in the X direction and the Y direction. The metal layer 12 has a tie bar 12b that connects the cores 12a. The tie bar 12b is for mechanically connecting the core 12a when the metal layer 12 and the insulating layers 14 and 16 are laminated. One or a plurality of tie bars 12b are provided between the sides of the core 12a. The tie bar 12b may be thinner than the core 12a. The cores 12a adjacent in the X direction are connected by three tie bars 12b, and the cores 12a adjacent in the Y direction are connected by four tie bars 12b. The number of tie bars 12b can be set arbitrarily.

  The metal layer 12 is a copper layer, for example. The thickness of the core 12a is 340 μm, for example, and the thickness of the tie bar 12b is 170 μm, for example. The width W4 of the tie bar 12b is, for example, 400 μm. The pitch W5 of the tie bars 12b is 2000 μm, for example. The width W1 between the cores 12a is, for example, 500 μm to 600 μm. The insulating layers 14 and 16 are, for example, epoxy resin. The thickness of the insulating layers 14a, 14b, 16a and 16b is, for example, 15 μm to 60 μm.

  As shown in FIGS. 1B and 2B, a groove 30 is formed in the multilayer substrate 10 so as to cut the tie bar 12 b of the metal layer 12 from the upper surface of the multilayer substrate 10. The groove part 30 is formed between the cores 12a. The bottom surface of the groove 30 reaches the insulating layer 14 but does not cut the multilayer substrate 10. The width W2 of the groove part 30 is 400 μm to 500 μm, for example, and is smaller than the width W1. As a result, the tie bars 12 b remain on both sides of the groove 30. The groove part 30 is formed by half-cutting using, for example, a wide dicing blade.

  As shown in FIG. 1C and FIG. 3A, the insulating layer 18 is filled in the groove 30. Thereby, the cut surface of the diver 12 b is covered with the insulating layer 18. The insulating layer 18 is a resin such as an epoxy resin. As shown in FIGS. 1D and 3B, a groove 32 is formed in the insulating layer 18. The groove 32 completely cuts the multilayer substrate 10. The width W3 of the groove part 30 is, for example, 200 μm to 300 μm, and is smaller than the width W2. Thus, the tie bar 12b is not exposed from the insulating layer 18. The groove 32 is formed by full cutting using, for example, a narrow dicing blade. Thereby, the multilayer substrate 10 is separated into pieces and the wiring substrate 50 is formed. In the wiring substrate 50, the side surfaces of the insulating layer 16 and the metal layer 12 of the multilayer substrate 10 are covered with the insulating layer 18. A part (lower part) of the side surface of the insulating layer 14 is exposed.

  FIG. 4A and FIG. 4B are side views of the substrate according to the first embodiment. FIGS. 4A and 4B are side views of the wiring board 50 viewed from the Y direction and the X direction, respectively, and are shown through the insulating layer 18. As shown in FIGS. 4A and 4B, the metal layer 12 is sandwiched between the insulating layers 14 and 16. The tie bar 12b is thinner than the core 12a. The tie bars 12b are alternately provided on the upper and lower portions of the core 12a. When the metal layer 12 is thick, the tie bar 12b becomes thick when the tie bar 12b is formed by etching. By thinning the tie bar 12b, the tie bar 12b can be thinned. Furthermore, if the tie bars 12b are provided alternately, the tie bars 12b can be etched from the upper surface and the lower surface of the metal layer 12. Therefore, the tie bars 12b can be formed densely. Furthermore, the contact area between the tie bar 12b and the insulating layers 14 and 16 is increased. Therefore, the adhesion strength between the tie bar 12b and the insulating layers 14 and 16 can be increased.

[Modification 1 of Example 1]
FIG. 5A to FIG. 5C are side views of the wiring board according to the first modification of the first embodiment. As shown in FIG. 5A, the tie bars 12b are not provided alternately but are connected to the lower part of the core 12a. As shown in FIG. 5B, the tie bar 12b is connected to the upper part of the core 12a. As shown in FIGS. 5A and 5B, the tie bars 12b may not be provided alternately. The thickness of the tie bar 12b may be the same as that of the core 12a. As shown in FIG. 5C, the tie bar 12b need not be provided. In this case, in FIG. 2A, the metal layer 12 is provided on the entire surface, and in FIG. In FIG. 3A, the side surface of the core is in contact with the insulating layer 18. As in the first modification of the first embodiment, the number and arrangement of the tie bars 12b can be arbitrarily set. Moreover, the tie bar 12b may not be provided.

[Modification 2 of Embodiment 1]
6A and 6B are cross-sectional views of the substrate according to the second modification of the first embodiment. As shown in FIG. 6A, an opening 21 is formed in the core 12 a of the metal layer 12. An electronic component 20 is mounted in the opening 21. The electronic component 20 is an acoustic wave device including a surface acoustic wave resonator or a piezoelectric thin film resonator, for example. An acoustic wave device is a high frequency filter which filters a high frequency signal, for example. The electronic component 20 may be a chip component such as a chip capacitor, a chip inductor, or a chip resistor. The electronic component 20 may be an active element such as an amplifier or a switch. A plurality of electronic components 20 may be mounted in the core 12a. An insulating layer 22 such as a resin layer is filled in the opening 21 and the periphery of the diver 12b.

  Wirings 24a and 24b are provided on the lower surfaces of the insulating layers 14a and 14b. A wiring 27 is provided in the opening 21 on the upper surface of the insulating layer 14b. Via wirings 23a and 23b penetrating the insulating layers 14a and 14b are provided. The via wiring 23a electrically connects the wirings 24a and 24b. The via wiring 23 b electrically connects the wiring 24 b and the wiring 27. The wiring 27 is connected to the electronic component 20. Wirings 26a and 26b are provided on the upper surfaces of the insulating layers 16a and 16b. A via wiring 25b penetrating the insulating layer 16b is provided. The via wiring 25b electrically connects the wirings 26a and 26b. Other configurations are the same as those of the first embodiment, and the description thereof is omitted.

  As shown in FIG. 6B, the insulating layer 14 includes three insulating layers 14a to 14c, and the insulating layer 16 includes three insulating layers 16a to 16c. A wiring 24c is provided on the lower surface of the insulating layer 14c, and a wiring 27 is provided on the upper surface of the insulating layer 14c. A via wiring 23c penetrating the insulating layer 14c is provided. A wiring 26c is provided on the upper surface of the insulating layer 16c, and a via wiring 25c penetrating the insulating layer 16c is provided. Other configurations are the same as those in FIG.

  As in the second modification of the first embodiment, the number of stacked insulating layers in the insulating layers 14 and 16 is arbitrary. Metal layers such as wirings 24b and 24c may be provided between the insulating layers 14a to 14c. Metal layers such as wirings 26a and 26b may be provided between the insulating layers 16a to 16c. The wiring substrate 50 may be a component built-in substrate in which the electronic component 20 is embedded in the metal layer 12.

  According to the first embodiment and its modification, as shown in FIG. 1A, the multilayer substrate 10 includes one or more insulating layers (first insulating layers) 14a and 14b, a metal layer 12, and one or more. Insulating layers (second insulating layers) 16a and 16b are provided. The metal layer 12 is provided on the insulating layer 14, and the insulating layer 16 is provided on the metal layer 12. As shown in FIGS. 1B and 2B, the groove 30 is formed in the multilayer substrate 10 so that the insulating layer 16 and the metal layer 12 are cut. As shown in FIGS. 1C and 3A, the insulating layer 18 (third insulating layer) is filled in the groove 30. As shown in FIG. 1D and FIG. 3B, the multilayer substrate 10 is cut into pieces by cutting the multilayer substrate 10 with the insulating layer 18 so that the side surfaces of the metal layer 12 are not exposed from the insulating layer 18. Then, the wiring board 50 is formed.

  Thereby, as shown in FIG. 1D and FIG. 3B, the wiring board 50 includes one or a plurality of insulating layers 14a and 14b (first insulating layers) stacked on each other, the metal layer 12, and One or a plurality of laminated insulating layers 16a and 16b (second insulating layer) and an insulating layer 18 (third insulating layer) are provided. The metal layer 12 is provided on the insulating layer 14. The side surface of the metal layer 12 is located inside at least the lower part of the side surface of the insulating layer 14 in plan view. The side surface of the insulating layer 16 is located inside at least the lower part of the side surface of the insulating layer 14 in plan view. The insulating layer 18 covers at least the lower part of the side surface of the insulating layer 16, the side surface of the metal layer 12, and the upper surface of the peripheral portion of the insulating layer 14.

  Thus, the side surface of the metal layer 12 such as the tie bar 12b is covered with the insulating layer 18. Therefore, the exposed metal layer 12 is coupled with an external part, and the characteristics are deteriorated. Alternatively, the exposed metal layer 12 can be prevented from being in electrical contact with the outside.

  Further, as shown in FIG. 1B, when forming the groove part 30, the groove part 30 is not formed at least in the lower part of the insulating layer 14. As illustrated in FIG. 1D, when the multilayer substrate 10 is separated into the wiring substrate 50, the multilayer substrate 10 is cut by the insulating layer 18 so that at least the lower side surface of the insulating layer 16 is exposed from the insulating layer 18. To do. Thereby, when forming the groove part 30, it can suppress that the multilayer substrate 10 will be separated into pieces. Further, it is possible to suppress the insulating layer 18 from flowing down to the lower surface of the multilayer substrate 10.

  As shown in FIGS. 4A to 5B, the metal layer 12 preferably has a tie bar 12b (protruding portion) protruding sideways, and the insulating layer 18 preferably covers the side surface of the tie bar 12b.

  Further, as shown in FIGS. 1B and 2B, the metal layer 12 and the insulating layer 16 are cut at the same time, so that the side surfaces of the metal layer 12 and the insulating layer 16 are provided on substantially the same plane. As shown in FIGS. 1D and 3B, the insulating layer 18 and the insulating layer 14 are cut at the same time, so that the side surface of the insulating layer 18 and at least the lower part of the side surface of the insulating layer 14 are provided in substantially the same plane. .

  The metal layer 12 is thicker than each of the insulating layers 14a, 14b, 16a and 16b. Thus, when the metal layer 12 is thick, when the metal layer 12 is laminated with the insulating layers 14 and 16 as shown in FIG. 1A, the core 12a directly connected via the tie bar 12b or the insulating layer 14 is used. And 16 are stacked. Therefore, the side surface of the metal layer 12 is exposed from the insulating layers 14 and 16. Therefore, it is preferable to provide the insulating layer 18.

  The tie bar 12b is thinner than the core 12a (the center of the metal layer 12). As a result, when the metal layer 12 is etched to form the tie bar 12b, the etching amount can be reduced, so that the tie bar 12b can be formed easily. Diver 12b is preferably thicker than each of insulating layers 14a, 14b, 16a and 16b. Thereby, the intensity | strength which connects the core 12a mechanically can be enlarged.

  The elastic modulus of the insulating layer 18 is smaller than the elastic modulus of the insulating layer 14 and the insulating layer 16. Thereby, the curvature of the multilayer substrate 10 in the state of FIG.1 (c) and FIG.3 (b) can be suppressed. For example, the insulating layer 18 uses an epoxy resin having a smaller elastic modulus than the insulating layers 14 and 18.

  In the multilayer substrate 10 in the state of FIG. 1C and FIG. 3A, a plurality of metal layers 12 and insulating layers 16 are periodically provided via the groove portions 30 in plan view. The insulating layer 18 is filled in the groove 30 and covers the side surfaces of the metal layer 12 and the insulating layer 16. Thereby, transportation of the multilayer substrate 10 in this state becomes easy.

  FIG. 7A to FIG. 7D are cross-sectional views illustrating the module manufacturing method according to the second embodiment. As shown in FIG. 7A, the insulating layer 18 is formed so that the upper surface of the insulating layer 18 is lower than the upper surface of the multilayer substrate 10. The insulating layer 18 covers all the side surfaces of the metal layer 12, but the upper portions of the side surfaces of the insulating layer 14 are exposed. The distance d between the upper surface of the insulating layer 18 and the upper surface of the multilayer substrate 10 is about 100 μm. Thereby, it can suppress that resin etc. which form the insulating layer 18 spread on the upper surface of the multilayer substrate 10.

  As shown in FIG. 7B, the electronic component 28 is mounted on the multilayer substrate 10. The electronic component 28 is the same as that exemplified in the electronic component 20 of the second modification of the first embodiment. The electronic component 28 is mounted on the wiring 27 in FIG. 6B, for example. As shown in FIG. 7C, an insulating layer 29 is formed on the multilayer substrate 10 so as to cover the electronic component 28. The insulating layer 29 is a resin such as an epoxy resin, for example, and is formed by molding. The insulating layer 29 covers the upper surface of the insulating layer 18.

  As shown in FIG. 7D, by forming the groove 32, the multilayer substrate 10 is separated into individual modules 52. The insulating layer 14, the insulating layer 18, and the insulating layer 29 are exposed from the bottom of the side surface of the module 52, and the side surface of the metal layer 12 is not exposed.

  FIG. 8 is a cross-sectional view of the module according to the second embodiment. As shown in FIG. 8, the multilayer substrate 10 is a component built-in substrate. An opening 21 is formed in the core 12 a, and the electronic component 20 is built in the opening 21. The electronic component 20 is an elastic wave filter, for example. An opening 33 is formed in the core 12 a, and a via wiring 34 that is electrically separated from the core 12 a is provided in the opening 33. The via wiring 34 electrically connects the wiring 24 a or 24 b in the insulating layer 14 and the wiring 26 a or 26 b in the insulating layer 16. Solder resists 35 and 39 are provided on the lower surface of the insulating layer 14 and the upper surface of the insulating layer 16, respectively. A plurality of electronic components 28 a and 28 b are mounted on the multilayer substrate 10. The electronic component 28a is an amplifier, for example. The electronic component 28b is, for example, a chip component. The other structure of the multilayer substrate 10 is the same as that of the first embodiment and its modifications, and the description thereof is omitted.

  According to the second embodiment, the electronic components 28, 28 a and 28 b are provided on the multilayer substrate 10. An insulating layer 29 (fourth insulating layer) that covers the electronic components 28, 28 a and 28 b is provided on the multilayer substrate 10. Thereby, the module 52 using Example 1 and its modification can be formed. In the module 52, since the side surface of the metal layer 12 is not exposed, coupling and / or electrical contact between the metal layer 12 and external components can be suppressed.

  7A, the upper surface of the insulating layer 18 is preferably lower than the upper surface of the uppermost insulating layer 16b in the insulating layer 16. Thereby, it can suppress that the insulating layer 18 covers the upper surface of the multilayer substrate 10. FIG.

Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and changes can be made within the scope of the gist of the present invention described in the claims. It can be changed.

DESCRIPTION OF SYMBOLS 10 Multilayer substrate 12 Metal layer 12a Core 12b Tie bar 14, 14a-14c Insulating layer 16, 16a-16c Insulating layer 18, 29 Insulating layer 20, 28, 28a, 28b Electronic component 30, 32 Groove part 50 Wiring board 52 Module

Claims (12)

One or more first insulating layers stacked on each other;
A metal layer provided on the one or more first insulating layers and having a side surface located at least inside a lower side of the side surface of the one or more first insulating layers;
One or a plurality of second insulating layers provided on the metal layer, the side surfaces of which are located at least below the side surfaces of the first insulating layer, and are stacked on each other;
A third insulating layer that covers at least the lower part of the side surface of the one or more second insulating layers, the side surface of the metal layer, and the upper surface of the peripheral edge of the one or more first insulating layers;
A substrate comprising: The metal layer has a protruding portion protruding sideways,
The substrate according to claim 1, wherein the third insulating layer covers a side surface of the protruding portion. Side surfaces of the metal layer and the one or more second insulating layers are provided on substantially the same plane,
3. The substrate according to claim 1, wherein a side surface of the third insulating layer and at least a lower portion of a side surface of the one or more first insulating layers are provided on substantially the same plane.   The substrate according to any one of claims 1 to 3, wherein the metal layer is thicker than each of the one or more first insulating layers and the one or more second insulating layers.   The substrate according to claim 2, wherein the protruding portion is thinner than a central portion of the metal layer.   6. The substrate according to claim 1, wherein an elastic modulus of the third insulating layer is smaller than an elastic modulus of the one or more first insulating layers and the one or more second insulating layers.   The substrate according to any one of claims 1 to 6, wherein an upper surface of the third insulating layer is lower than an upper surface of the uppermost insulating layer among the one or more second insulating layers.   The substrate according to claim 1, further comprising an electronic component embedded in the metal layer. A substrate according to any one of claims 1 to 8,
Electronic components provided on the substrate;
A fourth insulating layer for sealing the electronic component;
A module comprising: One or more first insulating layers stacked on each other;
On the one or more first insulating layers, a plurality of metal layers periodically provided via grooves in plan view,
One or a plurality of second insulating layers stacked on each other provided on the metal layer and periodically provided through the groove;
A third insulating layer filled in the groove and covering side surfaces of the metal layer and the one or more second insulating layers;
A substrate comprising: One or more first insulating layers stacked on each other, a metal layer provided on the one or more first insulating layers, and one or more second insulating layers provided on the metal layer and stacked on each other Forming a groove in the laminated substrate having a layer so that the one or more second insulating layers and the metal layer are cut;
Filling the groove with a third insulating layer;
Cutting the third insulating layer into pieces by cutting the third insulating layer so that side surfaces of the metal layer are not exposed from the third insulating layer;
The manufacturing method of the board | substrate containing this. The step of forming the groove is a step of forming the groove so that at least the lower part of the one or more first insulating layers remains.
The step of dividing the laminated substrate into pieces includes a step of cutting with the third insulating layer so that the at least lower side surface of the one or more first insulating layers is exposed from the third insulating layer. 11. A method for producing a substrate according to 11.

Images