JP2018019499A - Malfunction prevention circuit, protection circuit, and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a malfunction prevention circuit which prevents a malfunction of a protection circuit, reduces circuit scale and shortens an operation time, the protection circuit employing the malfunction prevention circuit, and an electronic apparatus employing the protection circuit.SOLUTION: A malfunction prevention circuit comprises: a delay circuit 20 by which a detection signal detected by an abnormality detection circuit 10 is delayed for a predetermined term ΔT and outputted as a second detection signal tsd2; and an AND circuit 30 by which, the detection signal detected by the abnormality detection circuit 10 is inputted as a first detection signal tsd1, the second detection signal tsd2 from the delay circuit 20 is inputted, and the first detection signal tsd1 and the second detection signal tsd2 are ANDed and outputted to the outside as an abnormality detection output signal.SELECTED DRAWING: Figure 3

Description

  The present embodiment relates to a malfunction prevention circuit, a protection circuit, and an electronic device.

  Standards for safety functions (for example, fail-safe functions, abnormality detection functions, safety stop functions, etc.) for all parts mounted on automobiles are being reviewed. In particular, many in-vehicle devices are electrically / electronically controlled, and not only high performance and high functionality but also safety are important needs. This is no exception in electronic devices such as in-car audio / video devices.

  An international standard ISO 26262 that systematically summarizes development methods and management methods for safe in-vehicle electronic devices has been formulated.

"ISO 26262-1: 2011", [online], 2011-11-15, International Organization for Standardization, [Search February 17, 2016], Internet <URL: https://www.iso.org/obp / ui / # iso: std: iso: 26262: -1: ed-1: v1: en>

  In general, audio data is rarely a single piece of data of the same size (level), so if data that exceeds the design output limit level continues, the device will generate heat and temperature May exceed the upper design limit.

  For this reason, various in-vehicle electronic devices and the like use various protection circuits including, for example, a thermal shutdown (TSD) circuit, and protect the electronic devices from abnormalities such as overheating, overcurrent, and overvoltage.

  In the present embodiment, a malfunction prevention circuit that realizes a reduction in circuit scale and a reduction in operation time, a protection circuit using the malfunction prevention circuit, and a protection circuit are provided. Provide used electronic equipment.

  According to one aspect of the present embodiment, the detection signal detected by the abnormality detection circuit is delayed for a predetermined period and output as the second detection signal, and the detection signal detected by the abnormality detection circuit is the first While inputting as a detection signal, the second detection signal from the delay circuit is input, and a logical product of the first detection signal and the second detection signal is obtained and output to the outside as an abnormality detection output signal There is provided a malfunction prevention circuit including an AND circuit that performs the operation.

  According to another aspect of the present embodiment, an abnormality detection circuit that outputs a detection signal corresponding to the detected abnormality, and the detection signal detected by the abnormality detection circuit is delayed for a predetermined period and output as a second detection signal And the delay detection circuit, the detection signal detected by the abnormality detection circuit is input as a first detection signal, the second detection signal from the delay circuit is input, and the first detection signal and the first detection signal are input. A protection circuit including an AND circuit that takes a logical product of the two detection signals and outputs the result as an abnormality detection output signal is provided.

  According to another aspect of the present embodiment, an abnormality detection circuit that outputs a detection signal corresponding to the detected abnormality, and the detection signal detected by the abnormality detection circuit is delayed for a predetermined period and output as a second detection signal And the delay detection circuit, the detection signal detected by the abnormality detection circuit is input as a first detection signal, the second detection signal from the delay circuit is input, and the first detection signal and the first detection signal are input. There is provided an electronic apparatus including a protection circuit including an AND circuit that takes a logical product of two detection signals and outputs the result as an abnormality detection output signal to the outside.

  According to this embodiment, the malfunction of the protection circuit is prevented, the malfunction prevention circuit that realizes the reduction of the circuit scale and the operation time, the protection circuit using the malfunction prevention circuit, and the protection circuit are used. An electronic device can be provided.

The typical block block diagram which shows the structural example (delay circuit) of the protection circuit which concerns on the comparative example 1 of 1st Embodiment. The typical block block diagram which shows the structural example (reset signal) of the protection circuit which concerns on the comparative example 2 of 1st Embodiment. The typical block block diagram which shows the structural example of the protection circuit provided with the malfunction prevention circuit which concerns on 1st Embodiment. The typical block block diagram which shows the structural example of the circuit for a verification used in order to verify the effectiveness of the protection circuit provided with the malfunction prevention circuit which concerns on 1st Embodiment. FIG. 2 is a schematic block configuration diagram showing a more detailed configuration example of a protection circuit according to Comparative Example 1 illustrated in FIG. 1. FIG. 3 is a schematic block configuration diagram showing a more detailed configuration example of a protection circuit according to Comparative Example 2 illustrated in FIG. 2. FIG. 4 is a schematic block configuration diagram showing a more detailed configuration example of a protection circuit including a malfunction prevention circuit according to the first embodiment illustrated in FIG. 3. FIG. 8 is a schematic diagram illustrating waveform examples of various signals during operation of a protection circuit including the malfunction prevention circuit illustrated in FIGS. 3 and 7. FIG. 9 is a partially enlarged view of the waveform example illustrated in FIG. 8. FIG. 5 is a schematic block diagram illustrating a more detailed configuration example of the verification circuit illustrated in FIG. 4. FIG. 11 is a schematic diagram illustrating a verification result by the verification circuit illustrated in FIGS. 4 and 10; FIG. 5 is a schematic diagram illustrating a setting example of a delay time in the delay circuit used in the malfunction prevention circuit according to the first embodiment. The example of malfunction of the part of the overheat cutoff circuit (TSD circuit) of the protection circuit which concerns on 1st Embodiment is shown, (a) An example of the relationship between the voltage and time which the comparator in an overheat cutoff circuit detects, (B) A configuration example of a comparator in the overheat cutoff circuit, (c) an example of a temperature detection signal input to the comparator in the overheat cutoff circuit. The example of the malfunctioning in the protection circuit which concerns on the comparative example of 1st Embodiment is shown, (a) The example at the time of using a delay circuit (filter), (b) The example at the time of using a reset signal. The typical block block diagram which shows the schematic structural example of the protection circuit which concerns on 1st Embodiment. The typical block block diagram which shows the schematic structural example of the protection circuit and load circuit (target circuit) which concern on 1st Embodiment. It is a typical block block diagram which shows the schematic structural example of the abnormality detection circuit (overheat cutoff circuit) of the protection circuit which concerns on 1st Embodiment, (a) The structural example of the comparator in an overheat cutoff circuit, (b) ) Example of internal configuration of abnormality detection circuit (overheat cutoff circuit). It is a schematic diagram which shows the example of abnormality detection of the protection circuit which concerns on 1st Embodiment, (a) An example in case it has an overvoltage protection (OVP: Over Voltage Protection) function, (b) Overcurrent protection (OVP: An example in the case of having an Over Current Protection) function. It is a typical block block diagram which shows the schematic structural example of the abnormality detection circuit (overheat cutoff circuit) of the protection circuit which concerns on 1st Embodiment, (a) The structural example of the comparator in an overheat cutoff circuit, (b) ) An example of the relationship between the voltage detected by the comparator in the overheat cutoff circuit and time. The operation example in 1st Embodiment is shown, (a) An example in case of having a hysteresis characteristic, (b) An example in the case of almost no hysteresis characteristic. The operation example in 1st Embodiment is shown, (a) Abnormality detection circuit, (b) Load circuit (target circuit), (c) Operation example of power-down process. 2 shows an operation example in the first embodiment, (a) an example of hysteresis characteristics of input / output voltage, and (b) an operation example of a protection circuit in a power-down process. The typical block block diagram which shows the schematic structural example of the protection circuit and load circuit (target circuit) which concern on 1st Embodiment. The typical block block diagram which shows the structural example of the protection circuit which concerns on the comparative example of 2nd Embodiment. The typical block block diagram which shows the structural example of the protection circuit provided with the malfunction prevention circuit which concerns on 2nd Embodiment.

  Next, embodiments will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

  Further, the embodiment described below exemplifies an apparatus and a method for embodying the technical idea, and in this embodiment, the material, shape, structure, arrangement, etc. of the component parts are described below. It is not something specific. This embodiment can be modified in various ways within the scope of the claims.

[First Embodiment]
(Comparative example in the first embodiment)
Various protection circuits such as an overheat protection (OTP) circuit, an overvoltage protection (OVP) circuit, and an overcurrent protection (OCP) circuit are used for general electric / electronic circuits (target circuits). The protection circuit is generally provided with a hysteresis characteristic (hysteresis width of upper and lower limit values) in order to stabilize the operation at the time of switching.

  As an example, in the case of an overheat cutoff (TSD) circuit having a detection temperature of 160 ° C. and a release temperature of 120 ° C. and having hysteresis characteristics, overheat is detected only when the ambient environment temperature reaches the detection temperature of 160 ° C. Based on this, it shifts to a protection mode such as overheat cutoff (TSD). Even if the ambient environment temperature subsequently decreases, the protection mode of TSD is not canceled unless the release temperature is 120 ° C. or lower. Thus, by providing a hysteresis width (in this case, a width of 40 ° C.) between the detection temperature and the release temperature, malfunction due to noise or the like is prevented.

  However, the following problems may occur when the circuit is started up (when power is turned on). For example, when the circuit is started up in a state where the ambient environment temperature is 125 ° C., there is a possibility that the same state as that when overheating is detected may be obtained. In that case, since the state shifts to a protection mode state such as overheat cutoff (TSD), the entire LSI operates in the protection mode unless the ambient environment temperature falls to 125 ° C. or lower.

  As a method for avoiding such a problem, there are two methods, a method using a “delay circuit (filter)” and a method using a “reset signal”.

-Comparative Example 1-
FIG. 1 is a schematic block configuration diagram illustrating a configuration example of a protection circuit according to Comparative Example 1 of the first embodiment (when a delay circuit (filter) 20 is used). FIG. 5 is a schematic block configuration diagram illustrating a more detailed configuration example of the protection circuit according to the comparative example 1 illustrated in FIG. 1.

  In the example shown in FIG. 1 and FIG. 5, an example using the overheat cutoff (TSD) circuit 10 as the abnormality detection circuit 10 is shown. However, the present invention is not limited to this, and as illustrated in FIG. Protection circuits such as an overvoltage protection circuit and an overcurrent protection circuit are also applicable.

As illustrated in FIGS. 1 and 5, the protection circuit according to Comparative Example 1 includes an abnormality detection circuit 10 (overheat cutoff (TSD) circuit 10) that outputs a detection signal corresponding to the detected abnormality, a resistor R1, and a capacitance. And a delay circuit 20 using a time constant with C1. In the protection circuit according to the comparative example 1, when the detection signal is fed back as the feedback signal FB for hysteresis, the delay circuit 20 is used until the abnormality detection circuit 10 operates stably (predetermined). By generating a delay, it is possible to prevent a state in which hysteresis is applied (a state in which overheating is detected and the device operates as a protection mode). The delay circuit 20 used here is effective for a digital circuit created by a flip-flop (FF) or the like, and is also effective for an analog circuit created by an RC circuit or the like. FIG. 14A shows a setting example of the delay time Δt _D of the delay circuit used in Comparative Example 1.

  When the delay circuit 20 is configured by an analog circuit, the delay circuit 20 also has a function as a low-pass filter (LPF). For this reason, when the pulse width of the detection signal tsd is very short, the detection signal tsd itself is gradually reduced, so that the robustness can be improved against malfunction due to beard-like noise.

  On the other hand, the method using the delay circuit 20 has the following problems.

  For example, when the delay circuit 20 is composed of an analog circuit, there is a problem that the circuit scale becomes large, or a problem that a delay occurs when protection is actually required, and the transition to the protection mode is delayed. There was also.

-Comparative Example 2-
FIG. 2 is a schematic block configuration diagram illustrating a configuration example (when the reset signal rstb is used) of the protection circuit according to the comparative example 2 of the first embodiment. FIG. 6 is a schematic block configuration diagram showing a more detailed configuration example of the protection circuit according to the comparative example 2 illustrated in FIG.

  In the example shown in FIG. 2 and FIG. 6, an example using the overheat cutoff (TSD) circuit 10 as the abnormality detection circuit 10 is shown. However, the present invention is not limited to this, and as illustrated in FIG. The present invention can also be applied to protection circuits such as an overvoltage protection circuit and an overcurrent protection circuit.

As illustrated in FIGS. 2 and 6, the protection circuit according to the comparative example 2 includes an abnormality detection circuit 10 (overheat cutoff (TSD) circuit 10) that outputs a detection signal corresponding to the detected abnormality, a NAND gate 12, And an AND circuit 30 including a NOT gate 14. When the circuit is started up when the power is turned on, a state in which hysteresis is applied (a state in which overheating is detected and the device operates as a protection mode) is prevented until the circuit is stably operated (predetermined period t _R ). Therefore, the reset signal rstb is used. The reset signal rstb is input to the AND circuit 30 from the outside, and the AND circuit 30 has a predetermined period t _R (a period t _R until the reset signal rstb is released) in a predetermined stage regardless of the output content of the detection signal tsd. Do not supply the output to this circuit. The timing for releasing the reset signal rstb is an effective measure since it is set in advance to the timing after the abnormality detection circuit 10 has stably operated. An example of the setting of release timing _{t R} of the set signal rstb used in Comparative Example 2 shown in FIG. 14 (b).

  On the other hand, the method using the reset signal rstb has the following problems.

  For example, the method using the reset signal rstb is effective when the power is turned on, but the output becomes unstable when returning after power down, and is not effective. In addition, when a dedicated POR (Power on Reset) circuit is mounted in order to completely reset and start up the inside of the circuit, it causes an increase in current at rest.

(A malfunction prevention circuit according to the first embodiment and a protection circuit including the malfunction prevention circuit)
FIG. 3 is a schematic block diagram illustrating a configuration example of a protection circuit including the malfunction prevention circuit according to the first embodiment, and FIG. 7 relates to the first embodiment illustrated in FIG. It is a typical block block diagram which shows the more detailed structural example of the protection circuit provided with the malfunction prevention circuit.

  As illustrated in FIG. 3 and FIG. 7, the protection circuit including the malfunction prevention circuit according to the first embodiment includes an abnormality detection circuit 10 (overheat cutoff (TSD)) that outputs a detection signal corresponding to the detected abnormality. Circuit 10), a delay circuit 20 using a time constant of a resistor R1 and a capacitor C1, and an AND circuit 30 including a NAND gate 12 and a NOT gate 14. The delay circuit 20 and the AND circuit 30 function as a malfunction prevention circuit of the protection circuit according to the first embodiment.

  The delay circuit 20 delays the detection signal tsd detected by the abnormality detection circuit 10 by a predetermined period ΔT using the buffer 16 and outputs it as the second detection signal tsd2.

  When the delay circuit 20 is configured by an analog circuit, the delay circuit 20 also has a function as a low-pass filter (LPF). For this reason, when the pulse width of the detection signal tsd is very short, the detection signal tsd itself is gradually reduced, so that the robustness can be improved against malfunction due to beard-like noise.

  The AND circuit 30 serving as a feedback unit for hysteresis receives the detection signal tsd (first detection signal tsd1) detected by the abnormality detection circuit 10 and the second detection signal tsd2 from the delay circuit 20, and receives the first detection signal tsd2 from the delay circuit 20. A logical product of the first detection signal tsd1 and the second detection signal tsd2 (that is, when both signal levels match) is fed back to the abnormality detection circuit 10 as a feedback signal FB for hysteresis, The abnormality detection output signal tsd_new is output to the outside (target circuit (for example, load circuit 40 illustrated in FIG. 16)).

  FIG. 8 is a schematic diagram illustrating waveform examples of various signals during operation of the protection circuit including the malfunction prevention circuit illustrated in FIGS. 3 and 7 (detection temperature is set to 160 ° C. and release temperature is set to 120 ° C.). FIG. 9 is a partially enlarged view of the waveform example illustrated in FIG. 8 near time tA.

  In the example shown in FIG. 8, at time tA (0.1 msec timing), the circuit is started up at an ambient temperature of 125 ° C., and then the ambient temperature is changed from 125 ° C. to 170 ° C. at a timing of time 0.5 msec. Is rising.

  The target circuit is activated at 125 ° C., which exceeds the set release temperature of 120 ° C., but the first detection signal output from the abnormality detection circuit 10 due to an abnormality detection malfunction at the time of startup (such as when the power is turned on) The signal level Vtsd1 of tsd1 also shifts from the Low level to the High level at time tA.

  On the other hand, the second detection signal tsd2 output from the delay circuit 20 has a predetermined period ΔT (in the example shown in FIG. 9, the timing at which the signal level Vtsd1 of the first detection signal tsd1 shifts from the High level to the Low level). Until output) Accordingly, the output (feedback signal FB and abnormality detection output signal tsd_new) of the AND circuit 30 that takes the logical product of the first detection signal tsd1 and the second detection signal tsd2 is the timing at the time 0.5 msec (detection temperature 160 ° C. Will not be output until the timing exceeds.

  In FIG. 9, the symbol Q of the signal level Vtsd2 of the second detection signal tsd2 is the signal level Vtsd2 at the point Q in the protection circuit provided with the malfunction prevention circuit illustrated in FIG.

  As described above, according to the malfunction prevention circuit and the protection circuit including the malfunction prevention circuit according to the first embodiment, even when an abnormality detection malfunction occurs at the time of startup (such as when the power is turned on), It is possible to prevent malfunction at startup.

  FIG. 4 is a schematic block diagram illustrating a configuration example of a verification circuit used for verifying the effectiveness of the protection circuit including the malfunction prevention circuit according to the first embodiment. FIG. 5 is a schematic block diagram illustrating a more detailed configuration example of the verification circuit illustrated in FIG. 4.

  In the verification circuits illustrated in FIGS. 4 and 10, the comparison is performed with the input terminal (Vdd) of the AND circuit 30 fixed to the high level in order to equalize the influence of the delay time by the combinational circuit.

  FIG. 11 is a schematic diagram illustrating a verification result by the verification circuit illustrated in FIGS. 4 and 10. In FIG. 11, the horizontal axis indicates the ratio of the time constant of the delay time required for the delay circuit when the circuit rise time is 100%, and the vertical axis indicates whether a detection signal is detected ( 0: not detected, 1: false detection). As is clear from FIG. 11, according to the malfunction prevention circuit and the protection circuit (FIG. 3 and FIG. 7) including the malfunction prevention circuit according to the first embodiment, the circuit using only the delay circuit 20 (FIG. 1). As compared with FIG. 5), the time constant can be reduced by 20%. The fact that the time constant can be reduced relative to the target value not only means that the circuit scale (area) can be reduced, but also shows that the time until the protection circuit operates can be reduced. It is also useful from the viewpoint of safety design. In particular, it is effective for a protection circuit whose operation mode is changed by an external environmental factor, such as a thermal shutdown (TSD) circuit 10.

  FIG. 12 shows a setting example of the delay time (predetermined period ΔT) in the delay circuit used in the malfunction prevention circuit according to the first embodiment. FIG. 13 shows an example of malfunction of the overheat cutoff circuit (TSD circuit) 10, and FIG. 13A shows an example of the relationship between the voltage detected by the comparator 11 in the overheat cutoff circuit 10 and time. 13B is a configuration example of the comparator 11, and FIG. 13C is an example of the temperature detection signal Vout output from the comparator 11. Although the operation of the protection circuit is more stable when the predetermined period ΔT is set longer, the necessary and sufficient predetermined period ΔT may be set in consideration of the agility of the protection circuit.

  In the example shown in FIG. 3 and FIG. 7, an example using the overheat cutoff (TSD) circuit 10 as the abnormality detection circuit 10 is shown, but the present invention is not limited to this, and as illustrated in FIG. The present invention can also be applied to protection circuits such as an overvoltage protection (OVP) circuit and an overcurrent protection (OCP) circuit. For example, as illustrated in FIG. 16, a detection signal tsdin (for example, a signal indicating overheating, overvoltage, overcurrent, or the like) from the load circuit 40 (speaker 22) is input to the abnormality detection circuit 10.

FIG. 17 is a schematic block diagram illustrating a schematic configuration example of the abnormality detection circuit 10 (overheat cutoff circuit 10) of the protection circuit according to the first embodiment. As illustrated in FIG. 17B, for example, the temperature can be detected by the diode D. FIG. 17A illustrates a detailed configuration of the reference voltage V _REF2 illustrated in FIG.

  FIG. 18 is a schematic diagram showing an example of abnormality detection of the protection circuit according to the first embodiment. FIG. 18A is an example in the case of having an overvoltage protection (OVP) function, and FIG. It is an example in the case of having an OCP) function.

  FIG. 19A shows a configuration example of the comparator 11 in the abnormality detection circuit 10 (overheat cutoff circuit 10) of the protection circuit according to the first embodiment, and FIG. 19B shows the overheat cutoff circuit 10. It is an example of the relationship between the voltage and the time which the comparator 11 of the inside detects.

  FIG. 20 shows an operation example in the first embodiment. FIG. 20A shows an example in the case of having hysteresis characteristics, and FIG. 20B shows an example in the case of almost no hysteresis characteristics. It is.

  FIG. 21 shows an operation example in the first embodiment. FIG. 21A shows an abnormality detection circuit 10, FIG. 21B shows a load circuit (target circuit) 40, FIG. c) is an operation example of the power-down process. FIG. 22 shows an operation example in the first embodiment. FIG. 22A shows an example of the hysteresis characteristic of the input / output voltage, and FIG. 22B shows an operation example of the protection circuit in the power-down process. is there. As described in Comparative Example 2, the output may become unstable when returning after power down.

  FIG. 23 is a schematic block diagram illustrating a schematic configuration example of the protection circuit and the load circuit (target circuit) 40 according to the first embodiment. Only when the content of the register 50 is at a high level and the output level of the abnormality detection circuit 10 is at a low level, the power down signal (PD) is set to a high level (normal: no power down process). At the time of abnormality detection (when the output level of the abnormality detection circuit 10 is high level), the power down signal (PD) is set to LOW level (abnormality: with power down processing).

  As described above, according to the malfunction prevention circuit and the protection circuit including the malfunction prevention circuit according to the first embodiment, even if an abnormality detection malfunction occurs at the time of start-up (such as when the power is turned on), It is possible to prevent malfunction at the time of starting up the circuit.

  In addition to the circuit using only the delay circuit 20 (Comparative Example 1), the time constant can be reduced by 20% and the circuit scale (area) can be reduced. It also shows that the time to the operation can be shortened, which is useful from the viewpoint of safety design.

[Second Embodiment]
In the first embodiment, the case where hysteresis characteristics are provided in order to stabilize the operation at the time of switching has been described, but in the second embodiment, a case of a protection circuit that does not provide hysteresis characteristics will be described.

(Comparative example in the second embodiment)
FIG. 24 is a schematic block diagram illustrating a configuration example (when the reset signal rstb is used) of a protection circuit according to a comparative example of the second embodiment.

  In the example shown in FIG. 24, a protection circuit such as an overheat cutoff (TSD) circuit, an overvoltage protection circuit, or an overcurrent protection circuit can be applied to the IC 10 as the abnormality detection circuit 10.

  As illustrated in FIG. 24, the protection circuit according to the comparative example of the second embodiment includes an IC 10 (abnormality detection circuit 10), and an AND circuit 30 including a NAND gate 12 and a NOT gate 14.

  When the circuit is started up when the power is turned on or when the system is restored after power down, the level of the power supply voltage becomes unstable. As a result, the level of the drive voltage becomes unstable. As a result, there is a possibility that the signal tsd indicating the comparison result output from the comparator 11 in the IC 10 is different from the original (malfunction occurs). The driving voltage level becomes unstable because the transistor used in the comparator 11 operates in the weak inversion region.

Therefore, the reset signal rstb is used in order to prevent a state in which hysteresis is applied (a state in which overheating is detected and operates as a protection mode) until the circuit operates stably (predetermined period t _R ). The reset signal rstb is input to the AND circuit 30 from the outside, and the AND circuit 30 has a predetermined period t _R (a period t _R until the reset signal rstb is released) in a predetermined stage regardless of the output content of the detection signal tsd. Do not supply the output to this circuit. The timing for releasing the reset signal rstb is an effective measure since it is set in advance to the timing after the abnormality detection circuit 10 has stably operated.

  On the other hand, the method using the reset signal rstb has the following problems.

  For example, the method using the reset signal rstb requires a dedicated reset signal, and is effective when the power is turned on. However, the output becomes unstable when returning after power down, and is not effective. In addition, when a dedicated POR circuit is mounted to start up the circuit by completely resetting the circuit, this may cause an increase in quiescent current.

(Malfunction prevention circuit and protection circuit provided with malfunction prevention circuit according to second embodiment)
FIG. 25 is a schematic block diagram illustrating a configuration example of a protection circuit including a malfunction prevention circuit according to the second embodiment.

  As illustrated in FIG. 25, the protection circuit including the malfunction prevention circuit according to the second embodiment includes an abnormality detection circuit 10 (overheat cutoff (TSD) circuit 10) that outputs a detection signal corresponding to the detected abnormality. A delay circuit 20 using a time constant of the resistor R1 and the capacitor C1, and an AND circuit 30 including a NAND gate 12 and a NOT gate 14. The delay circuit 20 and the AND circuit 30 function as a malfunction prevention circuit of the protection circuit according to the first embodiment.

  The delay circuit 20 delays the detection signal tsd detected by the abnormality detection circuit 10 by a predetermined period ΔT using the buffer 16 and outputs it as the second detection signal tsd2.

  The AND circuit 30 receives the detection signal tsd (first detection signal tsd1) detected by the abnormality detection circuit 10 and the second detection signal tsd2 from the delay circuit 20, and receives the first detection signal tsd1 and the second detection signal tsd1. And the abnormality detection output signal tsd_new is output to the target circuit (for example, the load circuit 40 illustrated in FIG. 16).

  Examples of waveforms of various signals during the operation of the protection circuit including the malfunction prevention circuit illustrated in FIG. 25 (the detection temperature is set to 160 ° C. and the release temperature is set to 120 ° C.) are the same as in the case of the first embodiment. 8 and 9 are shown.

  In the example shown in FIG. 8, at time tA (0.1 msec timing), the circuit is started up at an ambient temperature of 125 ° C., and then the ambient temperature is changed from 125 ° C. to 170 ° C. at a timing of time 0.5 msec. Is rising.

  The target circuit is activated at 125 ° C., which exceeds the set release temperature of 120 ° C., but the first detection signal output from the abnormality detection circuit 10 due to an abnormality detection malfunction at the time of startup (such as when the power is turned on) The signal level Vtsd1 of tsd1 also shifts from the Low level to the High level at time tA.

  On the other hand, the second detection signal tsd2 output from the delay circuit 20 has a predetermined period ΔT (in the example shown in FIG. 9, the timing at which the signal level Vtsd1 of the first detection signal tsd1 shifts from the High level to the Low level). Until output) Therefore, the output of the AND circuit 30 that takes the logical product of the first detection signal tsd1 and the second detection signal tsd2 (abnormality detection output signal tsd_new) is the timing at time 0.5 msec (timing that exceeds the detection temperature of 160 ° C.). Will not be output.

  As described above, the malfunction prevention circuit and the protection circuit including the malfunction prevention circuit according to the second embodiment that do not provide hysteresis characteristics can also be used at the time of start-up (when power is turned on or when power is restored after power down). Even when an abnormality detection malfunction occurs, it is possible to prevent malfunction when the protection circuit starts up.

Further, the second detection signal tsd2 is input to the AND circuit 30 via the delay circuit 20 having the capacitor C1, so that the rise of the voltage level of the second detection signal tsd2 is the first detection signal. It becomes gentler than tsd1. Using this, the period ΔT until the second detection signal tsd2 is finally recognized as the same voltage level as the first detection signal tsd1 by the AND circuit 30 is set to that of the first detection signal tsd1. Therefore, the increase in the capacitor C1 used in the delay circuit 20 can be suppressed. Furthermore, compared with the example in which the output of the “predetermined period t _R ” is stopped in advance by considering the margin of malfunction time by the reset signal rstb as in the comparative example, the normal system startup is realized in a short time. can do.

[Other embodiments]
While the embodiments have been described as described above, the discussion and drawings that form part of this disclosure are illustrative and should not be construed as limiting. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  For example, in the embodiment, the malfunction prevention circuit and the protection circuit including the malfunction prevention circuit can be applied not only to the vehicle-mounted electronic device but also to an electronic device used for various purposes.

  As described above, various embodiments that are not described herein are included.

  Examples of the malfunction prevention circuit and the protection circuit including the malfunction prevention circuit according to the present embodiment include a television, a radio, a radio cassette player, a car audio, a car navigation system, a home theater system, an audio component, a mobile phone, a smart phone, an electronic musical instrument, an air conditioner, and the like. It can be widely applied to all electrical and electronic devices.

10: Abnormality detection circuit, thermal shutdown (TSD) circuit, IC
DESCRIPTION OF SYMBOLS 11 ... Comparator 12 ... NAND gate 14 ... NOT gate 16 ... Buffer 20 ... Delay circuit (filter)
22 ... Speaker 30 ... AND circuit 40 ... Load circuit 50 ... Register C1 ... Capacitor D ... Diode FB ... Feedback signal PD ... Power down signal Q ... Point R1 ... Resistance rstb ... Reset signal tA ... Time tsd_new ... Abnormality detection output signal tsd1 ... the first detection signal TSD2 ... second detection signal t _R ... predetermined period, release timing tsd ... detection signal Vout ... temperature detection signal V _REF2 ... reference voltage Vtsd1, Vtsd2 ... signal level [Delta] t ... prescribed period, the delay time

Claims (19)

A delay circuit that delays a detection signal detected by the abnormality detection circuit for a predetermined period and outputs it as a second detection signal;
The detection signal detected by the abnormality detection circuit is input as a first detection signal, and the second detection signal from the delay circuit is input, and the first detection signal and the second detection signal are input. And an AND circuit that outputs the result as an abnormality detection output signal to the outside.   2. The malfunction according to claim 1, wherein the AND circuit takes a logical product of the first detection signal and the second detection signal and feeds back a feedback signal for hysteresis to the abnormality detection circuit. Prevention circuit.   3. The malfunction prevention circuit according to claim 1, wherein the delay circuit sets the predetermined period using a time constant of a resistor and a capacitor.   4. The malfunction prevention circuit according to claim 3, wherein the delay circuit functions as a low-pass filter that filters the detection signal.   The malfunction prevention circuit according to any one of claims 1 to 4, wherein the abnormality detection circuit detects at least one abnormality among overheating, overvoltage, and overcurrent. An abnormality detection circuit that outputs a detection signal corresponding to the detected abnormality;
A delay circuit that delays the detection signal detected by the abnormality detection circuit for a predetermined period and outputs it as a second detection signal;
The detection signal detected by the abnormality detection circuit is input as a first detection signal, and the second detection signal from the delay circuit is input, and the first detection signal and the second detection signal are input. And a AND circuit that outputs a logical product of them as an abnormality detection output signal to the outside.   7. The protection according to claim 6, wherein the AND circuit takes a logical product of the first detection signal and the second detection signal and feeds back a feedback signal for hysteresis to the abnormality detection circuit. circuit.   The protection circuit according to claim 6, wherein the delay circuit sets the predetermined period using a time constant of a resistor and a capacitor.   The protection circuit according to claim 8, wherein the delay circuit functions as a low-pass filter that filters the detection signal.   The protection circuit according to any one of claims 6 to 9, wherein the abnormality detection circuit detects at least one abnormality among overheating, overvoltage, and overcurrent.   The protection circuit according to claim 6, wherein the abnormality detection circuit includes a comparator for detecting the abnormality.   The protection circuit according to claim 7, wherein the comparator is a hysteresis comparator. An abnormality detection circuit that outputs a detection signal corresponding to the detected abnormality;
A delay circuit that delays the detection signal detected by the abnormality detection circuit for a predetermined period and outputs it as a second detection signal;
The detection signal detected by the abnormality detection circuit is input as a first detection signal, and the second detection signal from the delay circuit is input, and the first detection signal and the second detection signal are input. An electronic device comprising: a protection circuit comprising: an AND circuit that takes a logical product of the above and outputs the result as an abnormality detection output signal to the outside.   The electronic circuit according to claim 13, wherein the AND circuit takes a logical product of the first detection signal and the second detection signal and feeds back a hysteresis feedback signal to the abnormality detection circuit. machine.   15. The electronic device according to claim 13, wherein the delay circuit sets the predetermined period using a time constant of a resistor and a capacitor.   The electronic device according to claim 15, wherein the delay circuit functions as a low-pass filter that filters the detection signal.   The electronic apparatus according to claim 13, wherein the abnormality detection circuit detects at least one abnormality among overheating, overvoltage, and overcurrent.   The electronic apparatus according to claim 13, wherein the abnormality detection circuit includes a comparator for detecting the abnormality.   The electronic device according to claim 14, wherein the comparator is a hysteresis comparator.

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