JP2018011222A - Imaging apparatus and control method of imaging apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an imaging apparatus capable of reducing degradation of image quality due to switching power source.SOLUTION: The imaging apparatus include: a switching power source (601) that generates a power source voltage by switching; an image pick-up unit (101) that generates an image by carrying out photoelectric conversion receiving a supply of the power source voltage; and a correction part (602) that detects switching timing of the switching power source and operation timing of the image pick-up unit and corrects the switching timing of the switching power source or the operation timing of the image pick-up unit depending on the detected switching timing of the switching power source and the operation timing of the image pick-up unit.SELECTED DRAWING: Figure 5

Description

  The present invention relates to an imaging apparatus and a control method for the imaging apparatus.

  In an imaging device such as a digital camera or a digital video camera, a CCD or CMOS image sensor is used as an imaging device, and a still image or a moving image captured by the imaging device is stored. Patent Document 1 discloses a method of changing a frequency by selecting an appropriate one from among a plurality of switching power supply driving frequencies prepared according to an operation mode. Patent Document 2 discloses a method of detecting a noise cycle generated from a power supply and changing the readout cycle of the image sensor in accordance with the cycle of the power supply noise.

JP 2008-219292 A JP 2010-056795 A

  However, in the switching power supply, a steep power supply voltage fluctuation occurs at the switching timing. When a reading operation is performed at this switching timing, the image sensor has a problem of reducing the S / N of an image due to the influence of a steep power supply voltage fluctuation.

  An object of the present invention is to provide an image pickup apparatus and an image pickup apparatus control method capable of reducing image quality degradation caused by a switching power supply.

  An imaging apparatus according to the present invention includes a switching power supply that generates a power supply voltage by switching, an imaging element that receives the supply of the power supply voltage and generates an image by photoelectric conversion, switching timing of the switching power supply, and operation timing of the imaging element And a correction unit that corrects the switching timing of the switching power supply or the operation timing of the imaging device according to the detected switching timing of the switching power supply and the operation timing of the imaging device.

  According to the present invention, it is possible to reduce image quality degradation caused by a switching power supply.

It is a block diagram which shows the structural example of an imaging device. It is a circuit diagram which shows the structural example of an image pick-up element. It is a timing chart which shows the operation timing of an image sensor. It is a figure which shows a mode that a noise difference amount changes for every line. It is a figure which shows the structural example of the imaging device by 1st Embodiment. It is a flowchart of the imaging device by 1st Embodiment. It is a timing chart which shows a phase correction operation. 6 is a flowchart illustrating a method for controlling an imaging apparatus according to a second embodiment. It is a figure which shows a mode that a noise difference amount is constant for every line. It is a figure which shows the structural example of the imaging device by 3rd Embodiment. It is a circuit diagram which shows the structural example of an image pick-up element. It is a timing chart which shows the operation timing of an image sensor. It is a figure which shows the structural example of a pixel part. It is a figure for demonstrating an AD conversion circuit. It is a figure which shows the structural example of a part of imaging device. 10 is a flowchart illustrating a method for controlling an imaging apparatus according to a third embodiment. 10 is a timing chart of the imaging apparatus according to the third embodiment. 10 is a flowchart illustrating a method for controlling an imaging apparatus according to a fourth embodiment. It is a timing chart of the imaging device by a 4th embodiment.

(First embodiment)
FIG. 1 is a block diagram illustrating a configuration example of an imaging apparatus according to the first embodiment of the present invention. The imaging device is, for example, a lens interchangeable digital single-lens reflex camera, and includes a camera body 100 and a lens unit 200 that guides incident light to an imaging device. Note that the imaging apparatus can be applied to a smartphone, a tablet, an industrial camera, a medical camera, and the like in addition to a digital camera and a video camera. The light beam incident on the photographing lens 201 in the lens unit 200 is reflected by the mirror 107 and reaches the eyes of the photographer via the pentaprism 116 and the optical viewfinder 117.

  First, the configuration of the camera body 100 will be described. The light beam incident on the photographing lens 201 in the lens unit 200 forms an optical image on the image sensor 101 through the diaphragm 202, lens mounts 206 and 106, the mirror 107, and the shutter 108. The image sensor 101 is, for example, a CMOS imaging sensor, and converts an optical signal, which is an optical image, into an electrical signal (photoelectric conversion) to generate an image. The AD conversion circuit 102 converts an analog signal output from the image sensor 101 by photoelectric conversion into a digital signal. The timing signal generation unit 103 receives a clock signal and a control signal for driving the imaging system from the image processing unit 104, and supplies a clock signal and a control signal for defining the operation timing to the imaging element 101 and the AD conversion circuit 102. And so on. During still image shooting, the image processing unit 104 performs predetermined calculation processing on the image signal input from the AD conversion circuit 102, and based on the obtained calculation result, pixel interpolation processing, color conversion processing, and white Image processing such as balance processing is performed. Further, the image processing unit 104 outputs the image processed image to the various display units 113 via the system control unit 105. The image processing unit 104 performs image compression such as JPEG.

  The system control unit 105 includes a CPU and the like, and controls the camera body 100. The memory 109 stores programs, variables, constants, and the like for operating the system control unit 105. The memory 109 includes an electrically erasable / storable nonvolatile memory, and stores various parameters, setting values such as ISO sensitivity, shooting mode, various correction data, and the like. The power switch 110 switches the power on / off mode of the camera body 100. The mode switching unit 111 is a switch for switching and setting various shooting modes such as still image shooting, live view shooting, and moving image shooting. The various display units 113 include a liquid crystal device, a speaker, and the like that display operation states such as characters, images, and voices, messages, and the like in accordance with the execution of the program by the system control unit 105. The various display units 113 are configured by a combination of an LCD, an LED, and a sound generating element. A part of the various display units 113 is provided in the optical viewfinder 117. The operation unit 112 is an operation unit for inputting various predetermined operation instructions to the system control unit 105, and may be any one or a combination of a switch, a dial, a touch panel, pointing by line-of-sight detection, a voice recognition device, and the like. Composed.

  The power supply circuit 114 includes a battery detection unit, a current detection unit, a protection circuit, a DCDC converter, an LDO regulator, and the like, and shuts off the power supply when the presence or absence of the battery, the battery type, the remaining amount detection, or the overcurrent is detected. Thus, the load circuit connected to the power supply circuit 114 is protected. The power supply circuit 114 controls the DCDC converter based on an instruction from the system control unit 105 and supplies a desired power supply voltage to each part of the camera body 100 for a desired period. Connectors 115 and 301 are connectors for connecting the battery 302 and the camera body 100. The power source 302 is a primary battery such as an alkaline battery or a lithium battery, a secondary battery such as a Nid battery, a NiMH battery, or a Li battery, an AC adapter, or the like.

  The central part of the mirror 107 is a half mirror, and when the mirror 107 is down, a part of the incident light is transmitted, and the transmitted light is reflected toward the distance measurement control unit 119 by the sub mirror 118 provided in the mirror 107. Is done. The distance measurement control unit 119 is distance measurement means for performing an automatic focus adjustment (AF) process, and measures the in-focus state of an optical image formed by being guided by an optical path. The photometric control unit 120 is a photometric unit for performing an automatic exposure adjustment (AE) process, and measures the exposure state of the optical image that is formed. The system control unit 105 performs exposure control based on the photometric value, calculates an optimal ISO sensitivity, shutter speed, aperture value, and the like, and controls the mirror / shutter control unit 121 and the aperture control circuit 204.

  Next, the configuration of the lens unit 200 will be described. Since the lens unit 200 and the camera body 100 are mechanically joined via the lens mount mechanism 206, they can be attached and detached. The lens unit 200 includes a photographing lens 201, a diaphragm 202, a lens driving circuit 203, a diaphragm driving control circuit 204, a lens control unit 205, and an interface 207. The lens mount 206 includes a connector 208 that electrically connects the lens unit 200 to the camera body 100. The connector 208 has a function of transmitting a control signal, a status signal, a data signal, and the like between the camera body 100 and the lens unit 200 and supplying various types of power from the camera body 100 to the lens unit 200. Further, the connector 208 may be configured to transmit not only an electric signal but also a medium such as an optical signal and an audio signal. Further, in FIG. 1, for the sake of simplification, only one photographic lens 201 is shown, but in actuality, it is composed of a large number of photographic lens groups.

  The lens control unit 205 controls the entire lens unit 200. The lens control unit 205 includes a memory for storing various constants for operating the lens, variables, programs, and the like, and a non-volatile memory for holding maximum / minimum aperture values, focal lengths, and the like, which are information unique to the lens unit 200. The non-volatile memory holds various setting information such as driving frequency information of various actuators built in the lens unit 200 such as a focus driving motor and an aperture driving motor. The lens control unit 205 includes a DCDC converter circuit for power supply that is supplied to each circuit unit in the lens unit 200.

  The system control unit 105 of the camera body 100 calculates the defocus amount using the output information of the distance measurement control unit 119. Then, the system control unit 105 performs communication via the lens control unit 205 of the lens unit 200 based on the calculated defocus amount and controls the lens driving circuit 203 to focus. The lens driving circuit 203 includes vibration detection means for reducing camera shake during shooting, a control circuit for driving a movable shift lens for reducing camera shake, and the like. The lens driving circuit 203 outputs a camera shake as an electric signal by the vibration detection unit, and moves the movable shift lens based on the calculation result of the shake amount, thereby reducing the camera shake. The aperture control circuit 204 controls the aperture 202 in cooperation with the mirror / shutter control unit 121 that controls the shutter 108 based on the photometry information from the photometry control unit 120. The aperture control circuit 204 controls the aperture 202 based on aperture value information set by the operation unit 112.

  Next, the shooting operation of the imaging apparatus will be described. In the imaging apparatus, when the power switch 110 is turned on, the power supply circuit 114 is activated to supply power to each block. When the user presses a release button or the like, which is one of the operation units 112, to a predetermined position such as a half-pressed state, a preparatory operation for photographing such as autofocus and exposure setting is started. Further, when the release button is pushed down and fully pressed, the system control unit 105 controls the image pickup system such as the timing signal generation unit 103 and the image pickup element 101, and the shooting operation is started.

  FIG. 2 is a circuit diagram illustrating a configuration example of pixels in the image sensor (CMOS sensor) 11. The imaging element 11 has a plurality of pixels in a matrix shape. The photodiode 401 converts light into electric charge and accumulates it. The transfer transistor 402 transfers the charge stored in the photodiode 401 to the floating diffusion (FD) 415. The amplification transistor 410 forms a source follower, amplifies the potential change of the FD 415, and outputs a pixel signal to the column signal line 412. The signal ΦRES is supplied to the gate of the reset transistor 403 through the buffer. The transistor 409 supplies the power supply potential 404 to the column signal line 412 in accordance with the signal VCLIP. The transistor 408 connects the current source 407 to the column signal line 412 according to the signal ΦIOFF. The amplification transistor 410 and the power source 407 constitute a source follower.

  FIG. 3 is a timing chart showing drive signals for pixels in the m-th row. In the period T1, the signals ΦRES and ΦTX are at a high level, and the reset transistor 403 and the transfer transistor 402 are turned on. As a result, the photodiode 401 and the FD 415 are reset to the power supply potential 404. Next, in the period T2, the signals ΦRES and ΦTX are at a low level, and the reset transistor 403 and the transfer transistor 402 are turned off. Accordingly, the reset of the photodiode 401 and the FD 415 is released, and a charge accumulation period due to photoelectric conversion of the photodiode 401 is started.

  Next, in the period T3, the signals ΦSEL and ΦRES are at a high level, and the selected transistor 406 and the reset transistor 403 are turned on. The FD 415 is reset to the power supply potential 404. The amplification transistor 410 outputs an N signal having a noise component corresponding to the voltage of the FD 415 to the column signal line 412. The N signal is a signal based on the reset release of the pixel.

  Next, in the period T4, the signal ΦTN is at a high level, and the transfer gate 413b is turned on. The signal storage unit 414 stores the N signal of the column signal line 412. This period from the period T3 to the period T4 is referred to as an “N reading” (noise component reading) period.

  Next, in the period T5, the signals ΦRES and ΦTN are at a low level, and the signal ΦTX is at a high level. Then, the reset transistor 403 and the transfer gate 413b are turned off, and the transfer transistor 402 is turned on. The transfer transistor 402 transfers the charge accumulated in the photodiode 401 to the FD 415. Thus, the charge accumulation period of the photodiode 401 ends. The period from the period T2 to the period T5 is a charge accumulation period. The amplification transistor 410 outputs the S signal of the pixel signal component corresponding to the voltage of the FD 415 to the column signal line 412. The S signal is a signal based on photoelectric conversion of the pixel.

  Next, in the period T6, the signal ΦTX is at a low level and the signal ΦTS is at a high level. Then, the transfer transistor 402 is turned off, and the transfer gate 413a is turned on. The signal storage unit 414 stores the S signal of the column signal line 412. This period T6 is referred to as an “S reading” (pixel signal component reading) period. As described above, the image sensor 101 reads the N signal and the S signal at different timings.

  The image sensor 101 or the image processing unit 104 generates a difference between the S signal and the N signal accumulated in the signal accumulation unit 414 as a pixel signal. As a result, the imaging apparatus can generate a pixel signal in which the influence of fixed pattern noise or the like due to manufacturing variation or the like is reduced, and can generate an image with a high S / N.

FIG. 4 is a timing chart showing N-read readout pulses, S-read readout pulses, and noise of the power supply voltage output from the power supply circuit 114. The power supply circuit 114 includes a switching power supply that generates a power supply voltage by a switching operation. The S-N cycle is an interval between the read timing of N reading and the read timing of S reading. The cycle of the switching timing of the power supply circuit 114 is an integral fraction of the SN cycle. Since the “N reading” periods T3 and T4 and the “S reading” period T6 are not the same period, switching noise generated when the power supply circuit 114 operates or magnetic field noise generated from the coils constituting the power supply circuit 114 And the like are superimposed at the time of “N reading” and “S reading”. As a result, when calculating the difference between the S signal and the N signal (S−N cycle), the amount of difference between the power supply potential during N reading and the power supply potential during S reading differs for each row. That is, due to the effect of noise fluctuations in the power supply circuit 114, and the offset amount [Delta] L _M of the difference between the power supply potential at the time of reading power supply potential and S at M-th row of N readings, and the power supply potential when M + 1 line of the N read S The offset amount ΔL _{M + 1} of the difference in power supply potential during reading is different. This difference in offset amount becomes offset noise, the S / N of the image is lowered, and horizontal stripe noise is generated. FIG. 4 shows a state in which the amount of difference in power supply potential level between N reading and S reading differs for each row.

  In the present embodiment, in order to solve this problem, the imaging apparatus prevents the imaging device 101 from performing S reading and N reading at the switching timing of the power supply circuit 114. Specifically, the imaging apparatus detects switching timing of the power supply circuit 114 and readout timing of the imaging element 101, and corrects and controls the phase of the power supply circuit 114 based on the detected timing, thereby reducing horizontal stripe noise. Details will be described below.

  FIG. 5A is a diagram illustrating a detailed configuration example of a part of the imaging apparatus according to the present embodiment, and FIG. 6 is a flowchart illustrating a method for controlling the imaging apparatus according to the present embodiment. FIG. 7 is a timing chart showing an HD pulse (horizontal synchronization signal), an N reading read pulse ΦTN, an S reading read pulse ΦTS, and a switching pulse 605 of the switching power source 601. The imaging device further includes a phase detection unit 604. The power supply circuit 114 includes a switching power supply 601, a phase correction unit 602, and a frequency control unit 603. Hereinafter, the frequency control and phase correction operation of this embodiment will be described.

  In step S901, the power switch 110 is turned on, and the imaging apparatus is in a standby state in which the power supply voltage is not supplied to the imaging system such as the imaging device 101 until the imaging apparatus is activated and shifts to the main imaging operation. At this time, the imaging apparatus is in a state where the mode switching unit 111 can select a shooting mode such as still image shooting, moving image shooting, or live view shooting. For example, the case where the mode switching unit 111 selects a still image shooting mode as the shooting mode will be described. Next, in step S902, the system control unit 105 maintains the above-described standby state until the release button is fully pressed, and when the release button is fully pressed, the process proceeds to step S903.

  In step S <b> 903, the system control unit 105 outputs a power control signal 607 that instructs the switching power supply 601 to supply power to the imaging system of the imaging device 101. When the power supply control signal 607 is input, the switching power supply 601 generates a power supply voltage 610 by switching at an arbitrarily set driving frequency, and starts supplying the power supply voltage 610 to the image sensor 101. The image sensor 101 is supplied with the power supply voltage 610. Next, in step S904, the image sensor 101 performs an initialization process. Next, in step S905, the system control unit 105 determines the frequency control unit 603 based on the SN cycle (FIG. 4) during still image shooting according to the shooting mode (operation information). The frequency information 606 is output. Based on the frequency information 606, the frequency control unit 603 sets a frequency that is an integral multiple of the frequency corresponding to the S-N cycle as the frequency of the output pulse. Further, the frequency control unit 603 controls the frequency of the switching pulse 605 according to the shooting mode.

  FIG. 5B is a diagram illustrating a configuration example of the frequency control unit 603. The frequency control unit 603 includes a phase locked loop (PLL) 701, a frequency divider 702, and a frequency divider 703. The phase synchronization circuit 701 generates a clock in which the phase of the output clock of the frequency divider 703 matches the phase of the reference clock 608, and the generated clock is divided into the frequency divider 702 and the frequency divider. Output to the frequency divider 703. The frequency divider 703 multiplies the output clock of the phase synchronization circuit 701 to output a high frequency clock to the phase synchronization circuit 701. The frequency divider 702 divides the output clock of the phase synchronization circuit 701 to output a low frequency clock to the phase correction unit 602. The frequency control unit 603 can output a clock having a driving frequency at which the switching power source 601 can operate at an arbitrary multiplication frequency synchronized with the SN period by dividing the reference clock 608 by a desired frequency division ratio. Is possible.

  Next, in step S <b> 906 in FIG. 6, the system control unit 105 outputs an imaging system control signal such as an imaging system reference clock 608, a horizontal scanning signal, and a vertical scanning signal to the timing signal generation unit 103. As a result, the image sensor 101 is ready for an image reading operation. Further, the system control unit 105 outputs an imaging system reference clock 608 to the frequency control unit 603. Then, the frequency control unit 603 converts the reference clock 608 of the imaging system based on the frequency information set in step S905, and outputs an output pulse having a frequency that is an integer multiple of the frequency corresponding to the S-N cycle to the phase correction unit 602. Output to. At the time of reading the first row, the phase correction unit 602 outputs the switching pulse 605 to the switching power supply 601 without performing the phase correction control operation on the output clock of the frequency control unit 603. As shown in FIG. 9, the period of the switching pulse 605 is an integral fraction of the SN period. In response to the switching pulse 605, the switching power supply 601 starts switching driving at a frequency that is an integral multiple of the frequency corresponding to the S-N cycle, and supplies the power supply voltage 610 to the image sensor 101. Then, the image sensor 101 starts a still image reading operation.

  In step S <b> 907, the phase detection unit 604 detects the phase of the switching pulse 605 of the switching power supply 601 and the phase of the readout pulse 611 of the S signal and N signal of the image sensor 101. Next, in step S908, the phase detection unit 604 calculates a phase difference Δn between the phase of the switching pulse 605 (ΦTS and ΦTN) and the phase of the readout pulse 611. Next, in step S909, the phase detection unit 604 predicts and calculates the phase difference Δt at the read timing of the next row. The phase difference Δt is a parameter represented by a relationship of Δt = Δn ± α. Here, α is a parameter representing the amount of phase shift for each row of the switching pulse 605 of the switching power supply 601 and the readout pulse 611 of the image sensor 101. When the switching cycle of the switching power supply 601 is not an integral multiple of the cycle of the horizontal scanning signal of the image sensor 101, a shift in α occurs in the phase relationship between the two for each row. It is possible to predict the phase difference at the read timing of the row.

  Next, in step S910, the phase detection unit 604 determines whether or not the relationship | Δn−Δt | = α ≦ X is satisfied. Here, X is a value obtained by taking into account the influence of frequency accuracy variations due to the peripheral environment, manufacturing variations of components constituting the hardware, and the like with respect to the phase shift amount α for each row. If the above relational expression does not hold, the phase detection unit 604 skips step S911 because the switching pulse 605 of the switching power supply 601 and the readout pulse 611 of the image sensor 101 do not overlap in the next row. The process proceeds to S912. In addition, when the above relationship is established, the phase detection unit 604 proceeds with the process to step S911 because the switching pulse 605 and the readout pulse 611 may overlap.

  In step S911, the phase detection unit 604 outputs phase correction information 609 for shifting the phase by a predetermined phase correction amount to the phase correction unit 602. Then, the phase correction unit 602 performs phase correction of the switching pulse 605 by delaying the output clock of the frequency control unit 603 by the delay time Δt ′ according to the phase correction information 609.

  FIG. 5C is a diagram illustrating a configuration example of the phase correction unit 602. The phase correction unit 602 includes a plurality of delay circuits 801 and a selector 802. The plurality of delay circuits 801 delay the output clock of the frequency control unit 603 and output a plurality of clocks having different delay times to the selector 802. The selector 802 selects one of a plurality of clocks output from the delay circuit 801 based on the phase correction information 609 input from the phase detection unit 604 and outputs a switching pulse 605. Thereby, the phase correction unit 602 corrects the phase of the output clock of the frequency control unit 603 and generates the switching pulse 605. The phase correction amount Δt ′ of the phase correction unit 602 may be shifted by, for example, the spike width of the switching power supply 601 or more.

  Next, in step S912, the system control unit 105 determines whether or not all rows have been read from the image sensor 101. If all rows have not yet been read, the process returns to step S908 to read all rows. When is completed, the process proceeds to step S913. In step S913, the system control unit 105 determines whether or not the power switch 110 is in the off state. If the power switch 110 is not in the off state, the process returns to step S902. If the power switch 110 is in the off state, the system control unit 105 returns to step S914. Proceed with the process. In step S914, the system control unit 105 turns off the power of the imaging apparatus. Note that the imaging apparatus performs the same processing when the user selects a shooting mode for moving image shooting or live view shooting.

  FIG. 7 is a diagram illustrating frequency control and phase correction control according to the present embodiment. The readout pulse 611 of the image sensor 101 is a signal ΦTN for N reading and a signal ΦTS for S reading. The phase correction unit 602 detects the phase of the falling edges of the signals ΦTN and ΦTS and the phase of the switching pulse 605, and when the phase difference between them is X, the phase is corrected so that The phase is controlled so as not to overlap.

  As described above, the phase detection unit 604 detects the phase of the switching pulse 605 and the phase of the readout pulse 611. The phase correction unit 602 corrects the phase of the switching pulse 605 based on the detected phase. Thereby, the image sensor 101 can be prevented from performing S reading and N reading at the timing of the switching pulse 605 of the switching power supply 601, and the horizontal stripe noise of the image can be reduced.

(Second Embodiment)
The imaging device according to the second embodiment of the present invention has the same configuration as the imaging device according to the first embodiment. In the first embodiment, the case where the phase detection unit 604 detects the phase of the switching pulse 605 of the switching power supply 601 and the phase of the readout pulse 611 of the imaging element 101 for each row has been described. In the second embodiment, the phase detection unit 604 performs phase detection only on the first row. This is because the phase shift amount for each row is determined in advance, and if only the first row is detected, it is possible to obtain by calculation the number of rows to be overlapped thereafter. Hereinafter, the points of the present embodiment different from the first embodiment will be described.

  FIG. 8 is a flowchart illustrating a method for controlling the imaging apparatus according to the second embodiment. In step S1001, when the power switch 110 is turned on, the imaging apparatus is activated and enters a standby state in which the power supply voltage is not supplied to the imaging system such as the imaging element 101 until the main imaging operation is performed. Next, in step S1002, the system control unit 105 stands by until the release button is fully pressed. When the release button is fully pressed, the process proceeds to step S1003. In step S <b> 1003, the system control unit 105 outputs a power control signal 607 that instructs the switching power supply 601 to supply power to the imaging system. A switching power supply 601 receives a power supply control signal 607 and supplies a power supply voltage 610 to the image sensor 101 by switching at an arbitrarily set driving frequency. Next, in step S1004, the image sensor 101 performs an initialization process.

  Next, in step S1005, the system control unit 105 outputs frequency information 606 determined based on the SN cycle at the time of still image shooting to the frequency control unit 603. Based on the frequency information 606, the frequency control unit 603 sets the output frequency to be a frequency that is an integer multiple of the frequency corresponding to the SN period. In step S <b> 1006, the system control unit 105 outputs an imaging system control signal such as an imaging system reference clock 608, a horizontal scanning signal, and a vertical scanning signal to the timing signal generation unit 103. As a result, the image sensor 101 is ready for an image reading operation. Further, the system control unit 105 outputs an imaging system reference clock 608 to the frequency control unit 603. In step S1005, the frequency control unit 603 outputs a switching pulse having a frequency that is an integer multiple of the frequency corresponding to the S-N cycle to the phase correction unit 602 based on the frequency information. At the time of reading the first row, the phase correction unit 602 outputs a switching pulse 605 to the switching power supply 601 without performing the phase correction control operation. The switching power supply 601 operates at a frequency that is an integral multiple of the frequency corresponding to the S-N cycle, and supplies the power supply voltage 610 to the image sensor 101. The image sensor 101 starts a still image reading operation.

  In step S <b> 1007, the phase detection unit 604 detects the phase of the switching pulse 605 of the switching power supply 601 and the phase of the readout pulse 611 of the image sensor 101 when reading the first row of the image sensor 101. Next, in step S1008, the phase detector 604 calculates the phase difference Δn between the switching pulse 605 and the readout pulse 611. Next, in step S1009, the phase detection unit 604 performs a predictive calculation on the second and subsequent rows when the switching pulse 611 of the switching power source 601 and the readout pulse 611 of the image sensor 101 are superimposed at the time of reading. When the switching cycle of the switching power supply 601 is not an integral multiple of the horizontal scanning signal cycle of the image sensor 101, a phase shift occurs for each row, but the phase shift amount for each row is constant. In addition, since the phase difference Δn in the first row is detected in step S1008, it is possible to predict and calculate what row will be superimposed when the second row and subsequent rows are read out.

  Next, in step S1010, the phase detection unit 604 determines whether or not the next row corresponds to a row that is highly likely to be overlapped in step S1009. If not applicable, the phase detection unit 604 skips step S1011 and advances the process to step S1012 because the switching pulse 605 of the switching power supply 601 and the readout pulse 611 of the image sensor 101 do not overlap in the next row. Well, when the next row corresponds to the prediction calculation result row in step S1009, the phase detection unit 604 advances the processing to step S1011 because both may be superimposed. In step S1011, the phase detection unit 604 outputs phase correction information 609 for shifting the phase by a predetermined phase correction amount to the phase correction unit 602. The phase correction unit 602 performs phase correction of the switching pulse 605 based on the phase correction information 609. Next, in step S1012, the system control unit 105 determines whether or not all rows have been read from the image sensor 101. If all rows have not yet been read, the process returns to step S1010 to read all rows. When is completed, the process proceeds to step S1013. In step S1013, the system control unit 105 returns the process to step S1002 if the power switch 110 is not in the off state, and advances the process to step S1014 if the power switch 110 is in the off state. In step S1014, the imaging apparatus is turned off.

  In the first and second embodiments, the phase detection unit 604 detects the phase of the power supply voltage 610 output from the switching power supply 601 instead of detecting the phase of the switching pulse 605, thereby switching timing of the switching power supply 601. May be detected. In the first and second embodiments, the phase detection unit 604 detects the phase of the horizontal scanning signal of the image sensor 101 instead of detecting the phase of the read pulse 611, thereby reading the read timing of the image sensor 101. May be detected. In the first and second embodiments, the phase correction unit 602 corrects the phase of the output pulse of the frequency control unit 603, but corrects the phase of the reference clock 608 of the imaging system to generate the switching pulse 605. May be.

FIG. 9 is a timing chart showing N reading, S reading, and power supply voltage 610 according to the first and second embodiments. The phase correction unit 602 can control the switching timing of the switching power source 601 and the readout timing of the image sensor 101 not to overlap by correcting the phase of the switching pulse 605 of the switching power source 601. The offset amount [Delta] L _M of the difference in the M-th row of the N read signals ΦTN fall when the supply voltage 610 and the S read signals ΦTS fall time of the power supply voltage 610 of zero. The offset amount ΔL _{M + 1} of the difference between the power supply voltage 610 at the fall of the N reading signal ΦTN and the power supply voltage 610 at the fall of the S reading signal ΦTS in the _{M +} 1th row is also zero. Since both the offset amounts are equal to 0, the offset noise can be removed, the S / N of the image can be improved, and the horizontal stripe noise can be reduced.

  As described above, the phase detection unit 604 detects the switching timing of the switching power supply 601 and the readout timing of the imaging device 101 in accordance with the operation of the imaging device 101. The phase correction unit 602 controls the phase of the switching pulse 605 according to the detected timing. Thereby, the image sensor 101 can prevent the reading operation from being performed at the switching timing of the switching power supply 601. As a result, it is possible to suppress the influence of noise generated by the switching power supply 601 on the captured image, and horizontal stripe noise appearing in the captured image can be reduced.

  According to the first and second embodiments, the switching timing of the switching power source 601 and the readout timing of the image sensor 101 are detected, and the phase of the switching pulse 605 of the switching power source 601 is corrected based on the detected timing. Thereby, it is possible to prevent the image sensor 101 from performing S reading and N reading at the switching timing of the switching power supply 601, and to reduce horizontal stripe noise. In addition, the image sensor 101 can perform readout control at a timing at which the amount of noise change of the power supply voltage 610 of the switching power supply 601 becomes constant with respect to the SN period for each row. Since the amount of difference in power supply voltage level for each row during N reading and S reading can be made constant, horizontal stripe noise can be reduced.

(Third embodiment)
FIG. 10 is a block diagram illustrating a configuration example of an imaging apparatus according to the third embodiment of the present invention. The imaging device has a camera body 1 and a lens 50. The lens 50 is detachable from the camera body 1. The power supply circuit unit 2 includes a switching power supply such as a DC-DC converter using a switching element, receives a power supply voltage from the battery 3, generates a stabilized power supply, and operates each circuit component described below. Make it possible. The system control unit 4 performs overall control of the camera body 1. The system control unit 4 outputs a control signal for power supply to each circuit component to the power supply circuit unit 2 in accordance with various operation modes. The system control unit 4 is connected to a release switch 5 for instructing a shooting preparation operation and a shooting start, and an operation member 6. The operation member 6 is a switch for setting various camera operations. The subject light that has passed through the lens 50 passes through the optical filter 7 in which the optical low-pass filter and the infrared cut filter are integrated, and is exposed to the image sensor 8. The image sensor 8 is a two-dimensional area sensor such as a CCD or a CMOS that converts an optical image into an electric signal, and includes a pixel unit 9, an amplifier circuit 10, and an A / D converter circuit 11. The pixel unit 9 has a plurality of pixels in a two-dimensional matrix.

  FIG. 11 is a diagram illustrating a configuration example of one pixel in the pixel unit 9. The pixel in FIG. 11 is obtained by deleting the transfer gate 413b and the signal storage unit 414 from the pixel in FIG. The transfer gate 413 a is connected between the column signal line 412 and the amplifier circuit 10.

  FIG. 12 is a timing chart showing the reading operation of the pixel unit 9. The operation in the periods T1 to T3 is the same as the operation in the periods T1 to T3 in FIG. In the period T4, the signal ΦTS is at a high level, and the transfer gate 413a is turned on. The transfer gate 413 a transfers the N signal of the column signal line 412 to the AD conversion circuit 11 via the amplifier circuit 10. The period from the period T3 to the period T4 is an “N reading” period. The operation in the period T5 is the same as the operation in the period T5 in FIG. In the period T6, the signal ΦTS is at a high level, and the transfer gate 413a is turned on. The transfer gate 413 a transfers the S signal of the column signal line 412 to the AD conversion circuit 11 via the amplifier circuit 10. The period T6 is an “S reading” period. As described above, the pixel unit 9 reads the N signal and the S signal at different timings. The amplifier circuit 10 amplifies the signal, and the AD converter circuit 11 converts the signal from analog to digital. The image processing unit 11 generates a difference between the S signal and the N signal as a pixel signal. As a result, the imaging apparatus can generate a pixel signal in which the influence of fixed pattern noise or the like due to manufacturing variation or the like is reduced, and can generate an image with a high S / N.

  However, the “N reading” and “S reading” operations are not performed at the same time. Therefore, the effects of switching noise generated when the switching power supply of the power supply circuit unit 2 operates or magnetic field noise generated from the coil constituting the switching power supply can be superimposed at the time of “N reading” and “S reading”. There is sex. In this case, the power supply potential levels at the time of “N reading” and “S reading” are different, and horizontal stripe noise due to offset noise occurs. Hereinafter, an embodiment for solving this problem will be described.

  FIG. 13 is a diagram illustrating a configuration example of the pixel array of the pixel unit 9. The pixel unit 9 includes an effective pixel region 211 in which a plurality of pixels are arranged in the row direction and the column direction, an OB (optical black) pixel region 212 that is a non-effective pixel region, a NULL pixel region 213, and unused effective pixels. Region 214. The effective pixel region 211 has a plurality of pixels in FIG. 11 arranged in a matrix. Each of the plurality of pixels in FIG. 11 in the OB pixel region 212 is a pixel that is not exposed by covering the photodiode 401 serving as a photoelectric conversion unit with a metal light-shielding film. In the OB pixel region 212, pixels arranged in the upper part (or lower part) of the pixel unit 9 are called VOB (vertical OB) pixels, and pixels arranged in the left part (or right part) of the pixel unit 9 are HOB (horizontal). OB) called a pixel. A plurality of pixels in FIG. 11 in the NULL pixel region 213 are pixels that do not have the photodiode 401 that is a photoelectric conversion unit. Pixels in the effective pixel region 211 and the unused effective pixel region 214 include a photodiode (photoelectric conversion unit) 401 that is not shielded from light. The unused effective pixel area 214 includes a plurality of pixels that are the same as the pixels of the effective pixel area 211. Pixels in the unused effective pixel area 214 are not used for image generation. The unused effective pixel region 214 is a region of pixels that may interfere with the outermost mechanical member of the pixel unit 9 or pixels that are not used depending on the image size at the time of shooting.

  The OB pixel area 212 and the NULL pixel area 213 are used to suppress image degradation due to dark current noise generated in the image sensor 8, fixed pattern noise caused by the readout circuit, and the like. The N signal is greatly affected by dark current. Under the same environment (temperature, accumulation time), the N signals in the effective pixel region 211 and the OB pixel region 212 are at substantially the same level. The amplifier circuit 10 performs gain adjustment on the output signal of the pixel unit 9. The A / D conversion circuit 11 is an analog-digital conversion unit, converts the output signal of the amplification circuit 10 from analog to digital, and outputs the converted signal to the image processing unit 12. The image processing unit 12 performs image processing such as color adjustment, contrast adjustment, and edge enhancement (contour enhancement) on the image signal, and compresses the image signal to record and read the image signal to and from the storage unit 13. And conversion processing such as decompression. The storage unit 13 is a detachable semiconductor memory, magnetic disk, optical disk, or the like, and stores captured image signals. Further, the image processing unit 12 calculates the luminance of the subject and notifies the system control unit 4 of it. The system control unit 4 controls the shutter control unit 17 and the aperture of the lens 50 from the acquired luminance information of the subject, and controls the exposure amount to the image sensor 8. In addition, the system control unit 4 drives the timing signal generation unit 14 to generate a clock signal and the like to be supplied to the image sensor 8.

  A memory 15 is connected to the system control unit 4 and the image processing unit 12. The memory 15 stores programs to be provided, temporarily stores captured images, and is also used as a work area. The image processing unit 12 outputs the display image information to the display unit 16, and the captured image is displayed on the monitor. The display means 16 is a liquid crystal device or the like, and includes a liquid crystal panel 16a and a backlight 16b. An attitude detection unit 18 is connected to the system control unit 4. The posture detection unit 18 is an acceleration sensor or the like, and detects the orientation and change of the camera body 1. The system control unit 4 performs camera control according to the detection result of the posture detection unit 18. A thermometer 19 is connected to the system control unit 4. The thermometer 19 measures the temperature inside the camera body 1. The system control unit 4 restricts various operations and corrects operation parameters according to the measurement result of the thermometer 19. The phase detection unit 20 is connected to the power supply circuit unit 2 and the AD conversion circuit 11, and detects the switching timing of the power supply circuit unit 2 and the readout completion signal of the image sensor 8 output from the AD conversion circuit 11. The power supply circuit unit 2 performs phase control of the switching power supply according to the detection result of the phase detection unit 20.

  FIG. 14A is a diagram illustrating a configuration example of the AD conversion circuit 11, and FIG. 14B is a timing chart illustrating the operation of the AD conversion circuit 11. The AD conversion circuit 11 includes a reference signal generation unit 1401, a comparison circuit 1402, and a counter 1403. The reference signal generation unit 1401 includes a DAC (digital / analog converter), and generates a ramp wave that changes monotonously with time or a stepped sawtooth wave as a reference signal. The reference signal generation unit 1401 is provided in common for each column. The comparison circuit 1402 has a comparator and compares the input signal (pixel signal) from the amplifier circuit 10 with the reference signal generated by the reference signal generation unit 1401. When the reference signal becomes larger than the input signal, the comparison circuit 1402 supplies the counter 1403. A high level signal is output. Hereinafter, the timing at which the reference signal becomes larger than the input signal and the output signal of the comparison circuit 1402 is inverted from the low level to the high level is referred to as “AD conversion completion timing”. The counter 1403 has a flip-flop. The counter 1403 starts counting up in synchronization with the counter clock from the reference signal generation start of the reference signal generation unit 1401. When the output signal of the comparison circuit 1402 is inverted, the counter 1403 stops counting up, and the digital corresponding to the count value Output the value. This digital value is a value obtained by converting the input signal (pixel signal) from the amplifier circuit 10 from analog to digital.

  FIG. 15 is a diagram illustrating a configuration example of a part of the imaging apparatus according to the present embodiment, and illustrates phase control of the switching power supply 601. The power supply circuit unit 2 includes a switching power supply 601, a phase correction unit 602, and a frequency control unit 603. The system control unit 4 includes a correction determination unit 1404. The system control unit 4 outputs a reference clock and frequency information to the frequency control unit 603 according to the shooting mode and the shooting operation by the operation member 6. The frequency control unit 603 generates a switching pulse for driving the switching power supply 601 based on the acquired frequency information. As illustrated in FIG. 5B, the frequency control unit 603 includes a phase synchronization circuit (PLL) 701, a frequency dividing division 702, and a frequency divider 703. The phase correction unit 602 controls the phase of the supplied switching pulse based on an instruction from the system control unit 4 and supplies the phase to the switching power source 601. The switching power supply 601 starts supplying the power supply voltage to the image sensor 8 based on the power supply control signal from the system control unit 4. The phase correction unit 602 includes a plurality of delay circuits 801 and a selector 802 as shown in FIG. The phase correction unit 602 determines which output signal of the delay circuit 801 is output by the selector 802 based on the phase correction information input from the correction determination unit 1404, and corrects the phase of the switching pulse of the switching power supply 601.

  The system control unit 4 outputs a reference clock and horizontal / vertical operation signals to the timing signal generation unit 14. The timing signal generator 14 outputs a readout pulse and the like for controlling the readout timing to the image sensor 8. The phase detector 20 detects the phase and driving frequency of the switching pulse that drives the switching power supply 601. Note that the phase detection unit 20 is not limited to detecting the phase of the switching pulse that drives the switching power supply 601, and may detect the phase of the power supply voltage generated by the switching power supply 601, for example. Further, the phase detection unit 20 acquires AD conversion completion timing at which the comparison result output signal of the comparison circuit 1402 of the AD conversion circuit 11 is inverted, and outputs the AD conversion completion timing to the correction determination unit 1404. Note that the phase detection unit 20 may acquire only the AD conversion completion timing of the output signal of the comparison circuit 1402 of one column, or acquire the logical product or logical sum of the output signals of the comparison circuits 1402 of a plurality of columns. It may be other than that.

  The correction determination unit 1404 acquires the AD conversion completion timing, the phase information of the switching power source 601 and the drive frequency from the phase detection unit 20, and the next N reading AD conversion completion timing of the imaging device 8 and the switching timing of the switching power source 601. Is determined not to overlap. If the correction determination unit 1404 determines to superimpose, the correction determination unit 1404 outputs phase correction information (correction amount) to the phase correction unit 602. The phase correction unit 602 performs phase control of the switching pulse of the switching power supply 601 based on the phase correction information.

  FIG. 16 is a flowchart illustrating the control method of the imaging apparatus according to the present embodiment. When the user operates the operation member 6, the release button is pressed halfway, and a preliminary operation for starting imaging is instructed, the system control unit 4 starts an imaging sequence for acquiring an image. In step S501, when the system control unit 4 detects that the release button of the operation member 6 is fully pressed, the process proceeds to step S502. In step S502, the system control unit 4 outputs a clock and frequency information for driving the switching power source 601 to the frequency control unit 603 according to the shooting mode. Next, in step S503, the frequency control unit 603 generates a switching pulse for driving the switching power supply 601 based on the acquired frequency information. The phase correction unit 602 outputs the switching pulse to the switching power supply 601 as it is. The switching power supply 601 generates a power supply voltage in synchronization with the switching pulse and outputs it to the image sensor 8. Here, the drive frequency of the switching power supply 601 is desirably an integer multiple of the reciprocal of the row read cycle. That is, the readout cycle for each pixel row is an integral multiple of the cycle of the switching pulse of the switching power source 601. If it is not an integer multiple, the relationship between the AD conversion completion timing of N reading and the switching phase of the switching power supply 601 is different for each row, so that it becomes necessary to control the phase of the switching power supply 601 for each reading row. It is. Hereinafter, in the present embodiment, description will be made on the assumption that the driving frequency of the switching power supply 601 is an integral multiple of the reciprocal of the row read cycle.

  Next, in step S504, the system control unit 4 controls the shutter control unit 17 on the basis of the brightness of the subject image and various shooting setting values to start the charge accumulation of the image sensor 8, and the charge accumulation is completed. Then, the process proceeds to step S505. Note that the control of the shutter control unit 17 is an operation of exposing the image sensor 8 only for a set predetermined time by running the front curtain and rear curtain of the shutter member. In step S <b> 505, the timing signal generator 14 inputs a drive signal from the system controller 4 and outputs a read pulse to the image sensor 8. Then, the image sensor 8 starts a pixel signal readout operation of the pixel unit 9. First, the pixel unit 9 reads VOB pixels in the pixel region 212.

  FIG. 17 is a timing chart showing the relationship between the switching pulse of the switching power supply 601 and the operation of the AD conversion circuit 11. The description after step S506 will be described with reference to FIG. In step S506, the phase detection unit 20 detects a time difference Δtnob between the rising phase of the switching pulse of the switching power supply 601 and the AD conversion completion timing of N reading of the VOB pixel. The time difference Δtnob is treated as a positive value when the rise timing of the switching pulse of the power supply is later than the AD conversion completion timing. That is, in FIG. 17, the time difference Δtnob is a negative value.

In step S507, the correction determination unit 1404 calculates a delay time Δt of the following equation so that the switching pulse of the switching power supply 601 rises after a time α delay from the N-read AD conversion completion timing.
Δt = α−Δtnob

  Here, α is a value including the spike noise width of the switching power supply 601, the variation of the reference clock, the phase detection error, and the N signal variation for each pixel. As described above, the reason for delaying the switching pulse is to avoid the switching timing of the switching power source 601 not only in the AD conversion completion timing but also in a predetermined period before the AD conversion completion timing. That is, this is to prevent the comparison circuit 1402 from making an erroneous determination due to the influence of spike noise of the switching power supply 601 before the original AD conversion completion timing. Therefore, it is desirable that the phase detection unit 20 obtains a switching duty ratio as phase information of the switching pulse of the switching power supply 601, and performs phase control so that a period with a large duty width overlaps with AD conversion completion timing. In the switching pulse of FIG. 17, since ΔTL> ΔTH, the correction determination unit 1404 performs phase control so that the AD conversion completion timing overlaps the low level period of the switching pulse of the switching power supply 601.

Next, in step S508, the correction determination unit 1404 outputs the phase correction information of the switching pulse for driving the switching power supply 601 to the phase correction unit 602 based on the calculated delay time Δt. The phase correction unit 602 corrects the phase of the switching pulse based on the acquired phase correction information, and outputs the switching pulse delayed by the delay time Δt to the switching power supply 601. The switching power supply 601 outputs a power supply voltage synchronized with the switching pulse to the image sensor 8. The phase correction unit 602 does not necessarily correct the delay time Δt, and may perform phase correction only when the time difference Δtnob between the switching pulse rising timing of the switching power supply 601 and the AD conversion completion timing is within a predetermined time. . For example, assuming that a period during which AD conversion completion timing is not erroneously determined is β, the phase correction unit 602 may perform correction only when there is a possibility that the AD conversion completion timing is represented by the following expression. Note that β is a value determined from the potential level of a spike assumed to be generated in the switching power supply 601 or the noise signal level.
− (Β + α) <Δtnob <α

Next, in step S <b> 509, the pixel unit 9 starts a pixel reading operation in the effective pixel region 211. Here, the N signal level of the pixels in the effective pixel region 211 is substantially the same as the N signal level of the VOB pixel. Therefore, the time difference Δtn between the N-read AD conversion completion timing of the effective pixel region 211 and the switching pulse rising timing of the switching power supply 601 is expressed by the following equation. Accordingly, the N conversion AD conversion completion timing of the pixels in the effective pixel region 211 does not overlap with the rising timing of the switching pulse of the switching power supply 601.
Δtn = Δtnob = α

  Next, in step S510, the system control unit 4 stops the imaging operation when reading of pixels in all rows of the pixel unit 9 is completed, and the process proceeds to step S511. In step S <b> 511, the system control unit 4 stops the supply of the power supply voltage to the image sensor 8 by the power supply circuit unit 2. The image processing unit 12 performs image processing based on the shooting mode and various setting values on the acquired image data, stores the image data in the storage unit 13, and displays the image on the display unit 16. To finish the shooting sequence.

  As described above, according to the present embodiment, the N conversion AD conversion completion timing of the image sensor 8 is acquired, and the phase of the switching pulse of the switching power supply 601 is controlled. Thereby, it is possible to avoid the N reading AD conversion completion timing from being superimposed on the rising timing of the switching pulse of the switching power supply 601. Accordingly, it is possible to reduce image quality degradation due to power supply fluctuations that occur due to the switching timing of the switching power supply 601.

(Fourth embodiment)
The imaging device according to the fourth embodiment of the present invention has the same configuration as the imaging device according to the third embodiment. Hereinafter, differences of the present embodiment from the third embodiment will be described. In FIG. 15, the phase correction unit 602 is deleted from the power supply circuit unit 2. The frequency control unit 603 directly outputs a switching pulse to the switching power supply 601. The correction determination unit 1404 acquires the AD conversion completion timing acquired from the phase detection unit 20, the phase information of the switching pulse of the switching power supply 601, and the drive frequency. Then, the correction determination unit 1404 determines whether the N reading AD conversion completion timing of the next image sensor 8 and the rising timing of the switching pulse of the switching power supply 601 are not superimposed. The correction determination unit 1404 outputs timing correction information (delay time) to the timing signal generation unit 14 according to the determination result. Based on the acquired timing correction information, the timing signal generation unit 14 performs timing correction of the readout start timing of the image sensor 8 or the output signal for starting AD conversion.

  FIG. 18 is a flowchart showing a control method of the imaging apparatus according to the fourth embodiment of the present invention, and FIG. 19 is a diagram showing the relationship between the switching pulse of the switching power supply 601 and the operation of the AD conversion circuit 11. The imaging apparatus performs steps S701 to S707 in the same manner as steps S501 to S507 in FIG. Next, in step S708, the correction determination unit 1404 outputs the calculated delay time Δt as timing correction information to the timing signal generation unit 14 together with a reference clock or the like. The timing signal generation unit 14 corrects various readout timing signals based on the acquired timing correction information and outputs them to the image sensor 8. Here, in this embodiment, the period from the start of reading of the pixel unit 9 to the start of AD conversion of the AD conversion circuit 11 is fixed. As shown in FIG. 19, the timing signal generation unit 14 delays the read operation start signal of the pixels in the effective pixel region 211 by Δt with respect to the read operation start signal of the VOB pixel, so that the AD conversion completion timing is also delayed by the delay time Δt. Can be delayed. The timing signal generator 14 may delay the read operation start signal, may delay the AD conversion start timing, or may delay other signals for delaying the AD conversion completion timing by the delay time Δt. Also good.

  Next, in step S709, the pixel unit 9 starts a pixel reading operation in the effective pixel region 211, as in step S509 in FIG. Next, in step S710, the system control unit 4 stops the imaging operation when reading of pixels in all rows of the pixel unit 9 is completed, and the process proceeds to step S711. In step S <b> 711, the system control unit 4 stops supplying the power supply voltage to the image sensor 8 via the power supply circuit unit 2. The image processing unit 12 performs image processing based on the shooting mode and various setting values on the acquired image data, stores the image data in the storage unit 13, and displays the image on the display unit 16. To finish the shooting sequence.

  As described above, according to the present embodiment, the correction determination unit 1404 acquires the N-read AD conversion completion timing of the image sensor 8 and controls the read operation start timing of the image sensor 8. Thereby, it is possible to avoid the N reading AD conversion completion timing from being superimposed on the rising timing of the switching pulse of the switching power supply 601. In addition, it is possible to reduce image quality degradation due to power supply fluctuations generated by the switching timing of the switching power supply 601.

  According to the third and fourth embodiments, it is possible to avoid the switching timing of the switching power source 601 from being superimposed on the AD conversion completion timing of the N signal in the imaging device 8 incorporating the integral AD conversion circuit 11. it can. Therefore, it is possible to reduce image quality deterioration due to fluctuations in the power supply voltage generated by the switching timing of the switching power supply 601.

  In the third and fourth embodiments, the phase detector 20 detects the AD conversion completion timing of N reading by directly monitoring the output signal of the comparison circuit 1402 of the AD converter circuit 11. It is not limited. For example, the phase detection unit 20 may acquire AD conversion completion timing by converting into AD conversion time based on the digital value of the N signal and the period of the counter 1403.

  In the third and fourth embodiments, the phase detection unit 20 detects the phase of the switching pulse of the switching power source 601 and the AD conversion completion timing of the AD conversion circuit 11 when the VOB pixel is read. The correction determination unit 1404 corrects the phase of the switching pulse of the switching power supply 601 or the AD conversion completion timing of the AD conversion circuit 11 when reading the pixels in the effective pixel region 211.

  The phase detection unit 20 acquires the AD conversion completion timing of the VOB pixel in the OB pixel region 212, but is not limited to this. For example, the phase detection unit 20 acquires the AD conversion completion timing using the pixels in the unused effective pixel region 214 that are not used for image generation or the pixels in the first row of the effective pixel region 211, and the second and subsequent rows. It may be reflected. The phase detection unit 20 detects the switching pulse phase of the switching power supply 601 and the AD conversion completion timing of the AD conversion circuit 11 when reading pixels in one row. Then, the correction determination unit 1404 corrects the phase of the switching pulse of the switching power supply 601 or the AD conversion completion timing of the AD conversion circuit 11 when reading pixels in another row.

  Further, when performing continuous shooting such as moving image shooting, the phase detection unit 20 may acquire the AD conversion completion timing in an arbitrary row of the first frame and reflect it in the second and subsequent frames. The phase detection unit 20 detects the phase of the switching pulse of the switching power supply 601 and the AD conversion completion timing of the AD conversion circuit 11 when reading the pixel of the first frame. The correction determination unit 1404 corrects the phase of the switching pulse of the switching power supply 601 or the AD conversion completion timing of the AD conversion circuit 11 when reading pixels in the second and subsequent frames.

  Further, the phase detection unit 20 may acquire the AD conversion completion timing of the pixels in the NULL pixel region 213 instead of the VOB pixels. However, in this case, since the pixel 401 does not have the photodiode 401, the correction determination unit 1404 desirably corrects using the charge accumulation time and the temperature of the thermometer 19. In this case, it is desirable that the thermometer 19 is arranged at a location where the temperature of the image sensor 8 can be reflected inside the camera.

  Similarly to the fourth embodiment, in the first and second embodiments, the phase correction unit 602 corrects the phase of the readout pulse 611 of the image sensor 101 instead of the switching pulse 605 of the switching power supply 601. May be.

  According to the first to fourth embodiments, the phase correction unit 602 or the correction determination unit 1404 is a correction unit that corrects the switching timing of the switching power supply 601 or the operation timing of the imaging elements 8 and 101. The phase detector 20 or 604 detects the switching timing of the switching power supply and the operation timing of the image sensors 8 and 101. The phase correction unit 602 or the correction determination unit 1404 corrects the switching timing of the switching power supply 601 or the operation timing of the imaging elements 8 and 101 according to the detected switching timing of the switching power supply 601 and the operation timing of the imaging elements 8 and 101. To do.

  In the first and second embodiments, the phase correction unit 602 calculates a delay time Δt ′ corresponding to the time difference Δn between the detected switching timing of the switching power supply 601 and the operation timing of the image sensor 101. Then, the phase correction unit 602 delays the switching timing of the switching power supply 601 or the operation timing of the image sensor 101 by the delay time Δt ′. The operation timing of the image sensor 101 is the read timing of the image sensor 101 and the phase of the read pulse 611 of the image sensor 101.

  The phase detection unit 604 detects the readout pulse phase of the N signal, the readout pulse phase of the S signal, or the phase of the horizontal scanning signal as the readout timing of the image sensor 101. The phase detection unit 604 detects the phase of the switching pulse 605 input to the switching power supply 601 or the phase of the power supply voltage 610 output from the switching power supply 601 as the switching timing of the switching power supply 601.

  In the first embodiment, the phase detector 604 detects the read timing and the switching timing for each row as shown in FIG. The phase correction unit 602 corrects the switching timing or the reading timing according to the detected reading timing and switching timing for each row.

  In the second embodiment, the phase detector 604 detects the read timing and switching timing of the first row as shown in FIG. The phase correction unit 602 corrects the switching timing or the reading timing at the time of reading from the second row or later in accordance with the detected reading timing and switching timing of the first row.

  In the third and fourth embodiments, the phase correction unit 602 or the correction determination unit 1404 calculates a delay time Δt corresponding to the time difference Δtnob between the detected switching timing of the switching power supply 601 and the operation timing of the image sensor 8. . Then, the phase correction unit 602 or the correction determination unit 1404 delays the switching timing of the switching power source 601 or the operation timing of the image sensor 101 by the delay time Δt. The operation timing of the image sensor 8 is the conversion timing of the AD conversion circuit 11 and the AD conversion completion timing.

(Other embodiments)
The present invention supplies a program that realizes one or more functions of the above-described embodiments to a system or apparatus via a network or a storage medium, and one or more processors in the computer of the system or apparatus read and execute the program This process can be realized. It can also be realized by a circuit (for example, ASIC) that realizes one or more functions.

  The above-described embodiments are merely examples of implementation in carrying out the present invention, and the technical scope of the present invention should not be construed in a limited manner. That is, the present invention can be implemented in various forms without departing from the technical idea or the main features thereof.

DESCRIPTION OF SYMBOLS 100 Camera body, 101 Image sensor, 103 Timing signal generation part, 105 System control part, 601 Switching power supply, 602 Phase correction part,
603 Frequency control unit, 604 Phase detection unit

Claims (18)

A switching power supply that generates a power supply voltage by switching;
An image sensor that receives supply of the power supply voltage and generates an image by photoelectric conversion;
The switching timing of the switching power supply and the operation timing of the imaging device are detected, and the switching timing of the switching power supply or the operation of the imaging device is detected according to the detected switching timing of the switching power supply and the operation timing of the imaging device. An imaging apparatus comprising: a correction unit that corrects timing.   The correction unit delays the switching timing of the switching power supply or the operation timing of the imaging element by a delay time corresponding to the time difference between the detected switching timing of the switching power supply and the operation timing of the imaging element. The imaging apparatus according to claim 1, wherein:   The correction unit detects a switching timing of the switching power supply and a readout timing of the imaging device, and corrects the switching timing or the readout timing according to the detected switching timing and the readout timing. The imaging apparatus according to claim 1 or 2. The imaging element has a plurality of pixels in a matrix form,
The correction unit detects the read timing and the switching timing for each row, and corrects the switching timing or the read timing according to the detected read timing and switching timing for each row. The imaging device according to claim 3. The imaging element has a plurality of pixels in a matrix form,
The correction unit detects the read timing and the switching timing of the first row, and the switching timing at the time of reading from the second row or later according to the detected read timing and switching timing of the first row or The imaging apparatus according to claim 3, wherein the readout timing is corrected. The imaging element has a plurality of pixels in a matrix form,
The correction unit detects a phase of a signal readout pulse based on reset release of the pixel, a phase of a signal readout pulse based on photoelectric conversion of the pixel, or a phase of a horizontal scanning signal as the readout timing of the image sensor. The imaging apparatus according to any one of claims 3 to 5, wherein   The said correction | amendment part detects the phase of the switching pulse input into the said switching power supply, or the phase of the said power supply voltage which the said switching power supply outputs as a switching timing of the said switching power supply. The imaging device according to any one of the above. The image sensor reads out a signal based on reset release of a pixel and a signal based on photoelectric conversion of the pixel at different timings,
4. The cycle of the switching timing is an integral fraction of an interval between a signal readout timing based on reset release of the pixel and a signal readout timing based on photoelectric conversion of the pixel. The imaging device according to any one of? 7. The image sensor is
A pixel portion having a plurality of pixels in a matrix;
An analog-to-digital converter that converts the signal of the pixel from analog to digital;
The correction unit detects a switching timing of the switching power source and a conversion timing of the analog-digital conversion unit, and the switching power source according to the detected switching timing of the switching power source and the conversion timing of the analog-digital conversion unit The imaging apparatus according to claim 1, wherein the switching timing or the conversion timing of the analog-digital conversion unit is corrected.   The correction unit detects the switching timing of the switching power supply when reading pixels in one row and the conversion timing of the analog-digital conversion unit, and the switching timing of the switching power supply when reading pixels in another row or the The imaging apparatus according to claim 9, wherein the conversion timing of the analog-digital conversion unit is corrected.   The correction unit detects the switching timing of the switching power supply and the conversion timing of the analog-to-digital conversion unit at the time of reading of a pixel in which the photoelectric conversion unit is shielded from light or a pixel not having the photoelectric conversion unit, 11. The imaging apparatus according to claim 9, wherein a switching timing of the switching power supply or a conversion timing of the analog-digital conversion unit at the time of reading a pixel having a conversion unit is corrected.   The correction unit detects the switching timing of the switching power supply at the time of reading the pixel of the first frame and the conversion timing of the analog-digital conversion unit, and the switching timing of the switching power supply at the time of reading the pixel from the second frame or The imaging apparatus according to claim 9, wherein the conversion timing of the analog-digital conversion unit is corrected. The pixel unit reads a signal based on reset release of a pixel and a signal based on photoelectric conversion of the pixel at different timings,
The said correction | amendment part detects the switching timing of the said switching power supply at the time of the reading of the signal based on the reset cancellation | release of the said pixel, and the conversion timing of the said analog digital conversion part, The any one of Claims 9-12 characterized by the above-mentioned. The imaging device described in 1.   The imaging device according to claim 9, wherein a readout cycle for each row of the pixels is an integral multiple of a cycle of switching timing of the switching power supply. A switching power supply that generates a power supply voltage by switching;
A pixel portion having a plurality of pixels that generate signals by photoelectric conversion;
An analog-to-digital converter that converts the signal of the pixel from analog to digital;
Detecting the switching timing of the switching power supply and the conversion timing of the analog-to-digital converter, and depending on the detected switching timing of the switching power supply and the conversion timing of the analog-to-digital converter, the switching timing of the switching power supply or the An image pickup apparatus comprising: a correction unit that corrects the conversion timing of the analog-digital conversion unit.   The imaging apparatus according to claim 1, further comprising a frequency control unit that controls a frequency of switching timing of the switching power supply according to an operation mode. A switching power supply that generates a power supply voltage by switching;
A control method for an image pickup apparatus having an image pickup element that receives supply of the power supply voltage and generates an image by photoelectric conversion,
The correction unit detects the switching timing of the switching power supply and the operation timing of the image sensor, and depending on the detected switching timing of the switching power supply and the operation timing of the image sensor, A method for controlling an image pickup apparatus, comprising a step of correcting an operation timing of an image pickup element. A switching power supply that generates a power supply voltage by switching;
A pixel portion having a plurality of pixels that generate signals by photoelectric conversion;
An image pickup apparatus control method comprising: an analog-to-digital converter that converts the pixel signal from analog to digital;
The correction unit detects the switching timing of the switching power supply and the conversion timing of the analog-to-digital conversion unit, and according to the detected switching timing of the switching power supply and the conversion timing of the analog-to-digital conversion unit, A method for controlling an imaging apparatus, comprising a step of correcting switching timing or conversion timing of the analog-digital conversion unit.