JP2018010107A - Display device and fabrication method of display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal element that can control alignment of liquid crystal molecules in a high level and has high display quality, a display device having the liquid crystal element, and fabrication methods of the liquid crystal element and the display device.SOLUTION: The display device includes: a transistor 130 having a gate electrode 132, a semiconductor film 134, and a gate insulation film 140 sandwiched by the gate electrode 132 and the semiconductor film 134; an insulation film on the transistor 130; and an oxide film 150 on the insulation film. The oxide film 150 has a first region 152 electrically connected to the transistor 130 and a second region 154 in contact with the first region 152. The conductivity of the first region 152 is higher than the conductivity of the second region 154; and an upper surface of the first region 152 and an upper surface of the second region 154 are continuous.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a display device such as a liquid crystal display device and a manufacturing method thereof.

  A liquid crystal display device is known as a representative example of the display device. The liquid crystal display device includes a plurality of liquid crystal elements. The liquid crystal element includes a pair of electrodes (pixel electrode and counter electrode) and a liquid crystal compound (liquid crystal molecule) layer (liquid crystal layer) sandwiched between the electrodes. It has as a basic configuration. The polarized light incident on the liquid crystal layer through one of the pair of polarizing plates arranged so as to sandwich the liquid crystal element is emitted through the other polarizing plate with its polarization plane rotated by the liquid crystal layer. The rotation of the polarization plane is determined by the orientation of the liquid crystal molecules in the liquid crystal layer. By forming an electric field in the liquid crystal layer using a pair of electrodes, the liquid crystal molecules change from an initial alignment state to an alignment state determined by the electric field. With the change in the alignment state, the light transmittance of the liquid crystal element changes, and a gradation display is realized.

  The initial alignment of the liquid crystal layer is controlled by an alignment film provided in contact with the liquid crystal layer, the shape of a pair of electrodes, or a structure provided in the liquid crystal layer. Alternatively, a monomer having liquid crystallinity is added to the liquid crystal layer, and the monomer is polymerized while forming an electric field in the liquid crystal layer to form a polymer matrix, thereby controlling the initial alignment including the pretilt angle of the liquid crystal molecules. Is also possible. A liquid crystal element manufactured using this method is called a PSA (Polymer Sustained Alignment) liquid crystal element, and can provide a liquid crystal display device with a wide viewing angle (see Patent Documents 1 and 2).

JP 2002-357830 A International Publication No. 2010/122800

  An object of the present application is to provide a liquid crystal element that can highly control the alignment of liquid crystal molecules, a high display quality, a display device including the liquid crystal element, and a manufacturing method thereof.

  One embodiment of the present invention includes a gate electrode, a semiconductor film, a transistor having a gate insulating film sandwiched between the gate electrode and the semiconductor film, an insulating film on the transistor, and a display having an oxide film on the insulating film Device. The oxide film has a first region electrically connected to the transistor and a second region in contact with the first region. The conductivity of the first region is higher than the conductivity of the second region, and the upper surface of the first region and the upper surface of the second region are continuous.

  One embodiment of the present invention includes a gate electrode, a semiconductor film, a transistor having a gate insulating film sandwiched between the gate electrode and the semiconductor film, an insulating film on the transistor, and a display having an oxide film on the insulating film Device. The oxide film includes a first region electrically connected to the transistor, a third region electrically independent from the first region and configured to be applied with a constant voltage, and the first region The second region is in contact with the region and the third region and is sandwiched between the first region and the third region. The conductivity of the first region and the third region is higher than the conductivity of the second region, and the upper surface of the first region, the upper surface of the second region, and the upper surface of the third region are continuous.

  One embodiment of the present invention is a method for manufacturing a display device. A manufacturing method includes forming a gate electrode, a semiconductor film, a transistor having a gate insulating film sandwiched between the gate electrode and the semiconductor film, forming an insulating film over the transistor, forming an opening in the insulating film, Forming an oxide film over the insulating film so as to cover the opening, and forming a first region and a second region in the oxide film. The first region and the second region are formed so that the first region has higher conductivity than the second region and the first region is electrically connected to the transistor.

1 is a schematic top view of a display device according to an embodiment of the present invention. 1 is a schematic top view of a pixel of a display device according to an embodiment of the present invention. 1 is a schematic top view of a pixel of a display device according to an embodiment of the present invention. 1 is a schematic cross-sectional view of a pixel of a display device according to an embodiment of the present invention. FIG. 6 is a schematic cross-sectional view illustrating a method for manufacturing a display device of one embodiment of the present invention. FIG. 6 is a schematic cross-sectional view illustrating a method for manufacturing a display device of one embodiment of the present invention. FIG. 6 is a schematic cross-sectional view illustrating a method for manufacturing a display device of one embodiment of the present invention. FIG. 6 is a schematic cross-sectional view illustrating a method for manufacturing a display device of one embodiment of the present invention. FIG. 6 is a schematic cross-sectional view illustrating a method for manufacturing a display device of one embodiment of the present invention. 1 is a schematic top view of a pixel of a display device according to an embodiment of the present invention. 1 is a schematic cross-sectional view of a pixel of a display device according to an embodiment of the present invention. 1 is a schematic top view of a pixel of a display device according to an embodiment of the present invention. 1 is a schematic cross-sectional view of a pixel of a display device according to an embodiment of the present invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in various modes without departing from the gist thereof, and is not construed as being limited to the description of the embodiments exemplified below.

  In order to make the explanation clearer, the drawings may be schematically represented with respect to the width, thickness, shape, and the like of each part as compared to the actual embodiment, but are merely examples and limit the interpretation of the present invention. Not what you want. In this specification and each drawing, elements having the same functions as those described with reference to the previous drawings may be denoted by the same reference numerals, and redundant description may be omitted.

  In the present specification and claims, in expressing a mode of disposing another structure on a certain structure, when simply describing “on top”, unless otherwise specified, It includes both the case where another structure is disposed immediately above and a case where another structure is disposed via another structure above a certain structure.

  When a plurality of films are formed by processing one film, the plurality of films may have different functions and roles. However, the plurality of films are derived from films formed as the same layer in the same process, and have the same layer structure and the same material. Therefore, in the present specification and claims, these plural films are defined as existing in the same layer.

(First embodiment)
In this embodiment, a structure of a display device 100 which is one embodiment of the present invention will be described with reference to FIGS.

[1. overall structure]
The display device 100 includes a pixel region 104 over a substrate 102, and a plurality of pixels 106 are provided in the pixel region 104. The pixel 106 is provided with a liquid crystal element as a display element. For example, a full color display can be performed by constructing a liquid crystal element and its peripheral structure so that the adjacent pixels 106 give red, green, or blue. The arrangement of the pixels 106 is not limited, and a stripe arrangement, a delta arrangement, or the like can be adopted.

  The display device 100 further includes a driving circuit for supplying various signals to the pixel 106. For example, as shown in FIG. 1, the gate side driving circuits 108 and 110, the source side driving circuit 112, and the like are provided on the substrate 102. Can have. Although FIG. 1 shows an example in which two gate side driving circuits 108 and 110 are provided on both sides of the pixel region 104, one gate side driving circuit may be provided. It is not necessary to install some or all of these drive circuits 108, 110, and 112 on the substrate 102. For example, a drive circuit formed of an integrated circuit (IC) formed on a semiconductor substrate is provided on the substrate 102. Alternatively, it may be installed on the connector 114. FIG. 1 shows an example in which an IC 116 is provided on a connector 114 as a part of the driving circuit.

  The connector 114 has a function of supplying power and signals from an external circuit (not shown) to the drive circuits 108, 110, and 112. As the connector 114, a flexible printed circuit board (FPC) or the like can be used. A signal from an external circuit is supplied to each pixel 106 via the drive circuits 108, 110, and 112, and an image is reproduced on the pixel region 104.

[2. Pixel]
FIG. 2 shows a schematic diagram of the pixel 106. The display device 100 includes a plurality of scanning lines 120 and a plurality of signal lines 122 that are electrically connected to the plurality of pixels 106. The plurality of scanning lines 120 are connected to the gate side driving circuits 108 and 110 shown in FIG. 1, and the plurality of signal lines 122 are connected to the source side driving circuit 112 and / or the IC 116. One scanning line 120 is connected to a plurality of pixels 106 arranged in a direction in which the scanning line 120 extends, while one signal line 122 is connected to a plurality of pixels 106 arranged in a direction in which the signal line 122 extends. Is done.

  Each pixel 106 can be provided with at least one transistor 130 (FIG. 2). The transistor 130 includes a part of the scanning line 120 (a part protruding downward in the figure), a part of the signal line 122 (a part protruding rightward in the figure), a semiconductor film 134, a source electrode 136, and the like. The A part of the scanning line 120 functions as a gate electrode 132 to be described later, and a part of the signal line 122 functions as a drain electrode 138 by forming a pair with the source electrode 136. Although not illustrated, each pixel 106 may include a semiconductor element such as another transistor or a capacitor in addition to the transistor 130. Note that in this specification and the claims, the source electrode 136 and the drain electrode 138 may be interchanged depending on the direction of current and the like. In such a case, the source electrode becomes 138, and 136 serves as the drain electrode.

  The pixel 106 further includes an oxide film 150. The oxide film 150 can contain an oxide such as a group 13 element such as indium or gallium, a group 12 element such as zinc, or a group 14 element such as germanium or tin. Further, the oxide film 150 can be transparent to visible light. The oxide film 150 includes a first region 152 and a second region 154. The first region 152 and the second region 154 are in contact with each other. The first region 152 has higher conductivity than the second region 154 and is electrically connected to the transistor 130. The first region 152 can behave as a conductor and functions as a pixel electrode in the pixel 106. On the other hand, the second region 154 may be an electrical insulator or a semiconductor. The composition of oxygen in the first region 152 may be smaller than that in the second region 154. Alternatively, the composition of the group 13 nonmetallic element or the group 15 element in the first region 152 may be higher than that of the second region 154.

  As shown in FIG. 2, the first region 152 may have a comb-teeth shape. For this reason, at least a part of the second region 154 is sandwiched between the pair of comb teeth. Alternatively, as shown in FIG. 3, the first region 152 has a pattern having a plurality of stripes extending in a direction parallel to the scanning line 120 and the signal line 122, a direction perpendicular to the signal line 122, and an oblique direction. Also good. Such a pattern is also called a fishbone structure.

  A schematic cross-sectional view along the chain line A-A ′ in FIG. 3 is shown in FIG. As shown in FIG. 4A, a transistor 130 is provided over the substrate 102 in each pixel 106. The transistor 130 illustrated in FIG. 4A is a bottom-gate transistor; however, the structure of the transistor 130 is not limited and may be a top-gate transistor or may have a structure in which gate electrodes are provided above and below the semiconductor film 134. Good. In addition, there is no restriction on the vertical relationship between the semiconductor film 134, the source electrode 136, and the drain electrode 138.

  The transistor 130 is located over the gate electrode 132, the gate insulating film 140 over the gate electrode 132, the semiconductor film 134 over the gate insulating film 140, the semiconductor film 134, and the drain electrode 138 electrically connected to the semiconductor film 134. Source electrode 136 and the like. The transistor 130 may further include a channel protective film 142 for protecting a channel region formed in the semiconductor film 134 as an arbitrary configuration. Although not illustrated, the display device 100 may include a base film for protecting the transistor 130 from impurities in the substrate 102 between the substrate 102 and the transistor 130.

  An interlayer film 144 can be provided as an arbitrary structure over the transistor 130. The interlayer film 144 functions as a protective film for the transistor 130. Over the transistor 130, a planarization film 146 for absorbing unevenness due to the transistor 130 and other semiconductor elements and providing a flat surface is provided. The planarization film 146 is provided with an opening. An oxide film 150 is provided over the planarization film 146, and the first region 152 of the oxide film 150 is electrically connected to the source electrode 136 through the opening.

  FIG. 4B shows an enlarged view of a portion where the source electrode 136 and the first region 152 are in contact with each other. In the pixel 106 of the display device 100 exemplified in this embodiment, as illustrated in FIG. 4B, the thickness of the first region 152 on the bottom surface of the opening is the first region on the planarization film 174. Therefore, the shape of the opening is reflected in the shape of the first region 152 that overlaps the source electrode 135. In this case, part of the first alignment film 160 (described later) covering the oxide film 150 exists in the opening (see a region surrounded by an ellipse in FIG. 4B). As described in the second embodiment, the first region 152 is formed by the conductive treatment of the oxide film 150. If the thickness of the oxide film 150 is large, the first region 152 is conductive to the bottom surface of the oxide film 150. May not proceed and electrical connection between the first region 152 and the source electrode 135 may be insufficient. Therefore, as shown in FIG. 4A or 4B, the thickness of the first region 152 on the bottom surface of the opening is the same as the thickness of the first region 152 on the planarization film 174, or The oxide film 150 is preferably formed so as to be substantially the same.

  Alternatively, as illustrated in FIG. 4C, part of the first region 152 in the opening may be removed so that the source electrode 136 and the first alignment film 160 are in direct contact with each other. In this case, a region where the source electrode 136 and the first alignment film 160 are in contact with each other is sandwiched or surrounded by the first region 152.

  On the other hand, in the case where the bottom surface of the first region 152 can be sufficiently conductive, the oxide film 150 may be formed so as to fill the opening (FIG. 4D). Alternatively, before the oxide 150 is formed, the connection electrode 148 in contact with the source electrode 136 is formed so as to fill the opening with a material having high conductivity such as metal, and then the oxide film is formed so as to cover the connection electrode 148. 150 may be formed (FIG. 4E).

  Although details will be described in the second embodiment, the upper surface of the first region 152 and the second region 154 of the oxide film 150 may exist in the same layer. For this reason, there is no difference in the thickness of these regions, or there is no significant difference. Therefore, the top surfaces of these regions can be in the same or substantially the same plane, and the top surface of the first region 152 and the top surface of the second region 154 are flat or substantially. Gives one flat plane. In the present specification and claims, substantially in the same plane means that the upper surfaces of two adjacent films are completely in the same plane, and the difference in height between the upper surfaces of the two adjacent films is: It is within 10% of the thickness of the thicker film.

  A first alignment film 160 that covers the oxide film 150 can be provided over the oxide film 150. The first alignment film 160 can be in contact with the oxide film 150. Since the upper surface of the first region 152 and the upper surface of the second region 154 provide a substantially flat plane, the first alignment film 160 also forms a flat surface on the oxide film 150. Can do.

  The display device 100 further includes a liquid crystal layer 162 on the first alignment film 160 and a second alignment film 164 on the liquid crystal layer 162. On the second alignment film 164, a counter electrode 166, a light shielding film 168, and a color filter 170 are provided, and a counter substrate 180 is provided thereon. Polarizing plates 182 and 184 are provided below the substrate 102 and above the counter substrate 180, and these are installed so as to have a crossed Nicols relationship. As an arbitrary configuration, a protective film for protecting the light shielding film 168 and the color filter 170 may be provided.

  The light-shielding film 168 has an opening that overlaps with the oxide film 150, and the color filter 170 is provided so as to overlap with the opening. A part of the light emitted to the display device 100 by the backlight or external light is blocked by the light shielding film 168, and part of the light is transmitted through the color filter 170, and the latter forms an image. The light shielding film 168 is formed so as to cover the periphery of the transistor 130 and the oxide film 150. Therefore, in each pixel 106, the opening of the light shielding film 168 is the display area 190, and the area where the light shielding film 168 is formed is the light shielding area 192.

  The first region 152 functions as a pixel electrode, and a potential corresponding to the video signal is applied through the transistor 130. On the other hand, a constant potential is applied to the counter electrode 166. By controlling the potential difference between the first region 152 and the counter electrode 166 or the time for applying the potential, the orientation of the liquid crystal molecules in the liquid crystal layer 162 is controlled, whereby the transmittance of each pixel can be controlled. Gradation display is possible.

  In a general PSA liquid crystal display device, comb-like pixel electrodes are used, and the initial alignment of liquid crystal molecules is controlled by an electric field applied to the liquid crystal layer during monomer polymerization. However, when the electric field is removed after the polymerization is completed, the comb-like pixel electrode becomes a structure that gives unevenness to the liquid crystal layer, which causes disturbance of the alignment of liquid crystal molecules in the vicinity of the pixel electrode. Such disturbance in alignment adversely affects the rotation of polarized light incident on the liquid crystal layer and causes display defects such as light leakage.

  However, in the display device 100, the upper surface of the first region 152 serving as a pixel electrode is in the same plane as the upper surface of the second region 154 in contact therewith. Therefore, the first region 152 does not form unevenness in the display region 190 with respect to the liquid crystal layer 162. Therefore, although the first region 152 of the oxide film 150 is a comb-like pixel electrode, the alignment disorder of liquid crystal molecules is not caused. As a result, light leakage does not occur, and the display device 100 can provide a high-quality image having high contrast.

(Second Embodiment)
In the present embodiment, a method for manufacturing the display device 100 according to the first embodiment will be described with reference to FIGS. 5 to 9 correspond to cross-sectional views along the chain line AA ′ in FIG. Description of the same configuration as that of the first embodiment may be omitted.

[1. Transistor]
First, the scan line 120 that partially functions as the gate electrode 132 is formed over the substrate 102 (FIG. 5A). The substrate 102 has a function of supporting the transistor 130, the liquid crystal layer 162, the semiconductor elements included in the gate side driver circuits 108 and 110, and the source side driver circuit 112. Therefore, the substrate 102 may be made of a material having heat resistance to the process temperature of various elements formed thereon and chemical stability to chemicals used in the process. Specifically, the substrate 102 can include glass, quartz, plastic, or the like.

  The scan line 120 is formed using a metal such as titanium, aluminum, copper, molybdenum, tungsten, or tantalum or an alloy thereof so as to have a single layer or a stacked structure. For example, a structure in which a metal having a relatively high melting point such as titanium, tungsten, or molybdenum and a metal having high conductivity such as aluminum or copper is sandwiched can be employed. The scan line 120 can be formed by a sputtering method, a chemical vapor deposition (CVD) method, or the like.

  Although not illustrated, a base film may be formed between the substrate 102 and the scanning line 120 as an arbitrary configuration. The base film has a function of preventing impurities such as alkali metal from diffusing from the substrate 102 to the transistor 130 and the like, and includes an inorganic insulator such as silicon nitride, silicon oxide, silicon nitride oxide, and silicon oxynitride. it can. The base film can be formed to have a single layer or a stacked structure by applying a CVD method, a sputtering method, or the like.

  Next, a gate insulating film 140 is formed so as to cover the gate electrode 132 (FIG. 5A). The gate insulating film 140 may include an inorganic insulator such as silicon nitride, silicon oxide, silicon nitride oxide, or silicon oxynitride. The gate insulating film 140 may have either a single layer structure or a stacked structure, and can be formed by a CVD method, a sputtering method, or the like.

  Subsequently, a semiconductor film 134 is formed over the gate insulating film 140 so as to overlap with the gate electrode 132 (FIG. 5B). The semiconductor film 134 can include a group 14 element such as silicon. Alternatively, the semiconductor film 134 may include an oxide semiconductor. As the oxide semiconductor, a Group 13 element such as indium or gallium can be included. For example, a mixed oxide (IGO) of indium and gallium can be given. In the case of using an oxide semiconductor, the semiconductor film 134 may further include a group 12 element, and an example thereof is a mixed oxide (IGZO) containing indium, gallium, and zinc. The crystallinity of the semiconductor film 134 is not limited, and may be single crystal, polycrystal, microcrystal, or amorphous.

  In the case where the semiconductor film 134 includes silicon, the semiconductor film 134 may be formed by a CVD method using silane gas or the like as a raw material. The resulting amorphous silicon may be crystallized by heat treatment or irradiation with light such as a laser. In the case where the semiconductor film 134 includes an oxide semiconductor, the semiconductor film 134 can be formed by a sputtering method or the like.

  A channel protective film 142 may be formed over the semiconductor film 134 as an arbitrary structure. The channel protective film 142 can include a material and a structure similar to those of the gate insulating film 140 and can be formed by a similar method. By forming the channel protective film 142, the semiconductor film 134 can be protected when the source electrode 136 and the drain electrode 138 are formed.

  Next, a metal film is formed so as to cover the gate insulating film 140 and the semiconductor film 134, and the metal film is processed by etching, so that the source electrode 136 and the drain electrode 138 are formed (FIG. 5C). . The source electrode 136 and the drain electrode 138 are electrically connected to the semiconductor layer 134. The metal film can have a structure selected from the structures that the gate electrode 132 can take, and can be formed using a method similar to that for the gate electrode 132. In the case where the channel protective film 142 is formed, a part of each of the source electrode 136 and the drain electrode 138 overlaps with the channel protective film 142. Through the above process, the transistor 130 is formed.

[2. Oxide film]
Subsequently, an interlayer film 144 is formed over the source electrode 136 and the drain electrode 138. The interlayer film 144 can have a structure similar to that of the gate insulating film 140 and can be formed by a similar method.

  Next, a planarization film 146 is formed over the interlayer film 144 (FIG. 5D). The planarization film 146 has a function of absorbing unevenness and inclination caused by the transistor 130 and the like and providing a flat surface. The planarizing film 146 is formed from a curable resin composition containing a resin selected from an acrylic resin, a siloxane resin, a polyimide resin, a polyether resin, and the like. Examples of such a curable resin composition include the curable resin compositions described in Japanese Patent No. 3241399, Japanese Patent No. 4207604, Japanese Patent No. 4784283, Japanese Patent No. 4784283, Japanese Patent No. 4737209, Japanese Patent No. 4637221, and the like. Can be applied. The planarization film 146 can be formed by a wet film formation method such as a spin coating method, a dip coating method, or an ink jet method. A layer containing an inorganic insulator may be further provided above or below the planarization film 146. In this case, examples of the inorganic insulator include silicon-containing inorganic insulators such as silicon oxide, silicon nitride, silicon nitride oxide, and silicon oxynitride, and a film containing these can be formed by a sputtering method or a CVD method. .

  After that, the interlayer film 144 and the planarization film 146 are etched to form an opening reaching the source electrode 136 (FIG. 5D). Subsequently, an oxide film 150 is formed over the planarization film 146 so as to fill the opening (FIG. 6A). The oxide film 150 preferably includes a material that transmits visible light. For example, the oxide film 150 can include oxides of the elements described in the first embodiment, and specifically, can include mixed oxides such as IGO and IGZO. The oxide film 150 can be formed by a sputtering method, a CVD method, an atomic deposition (ALD) method, or the like. Although depending on the formation conditions, the oxide film 150 immediately after formation may be electrically a semiconductor or an insulator. In the case where the oxide film 150 is formed by a sputtering method, it can be performed in an atmosphere containing oxygen gas, for example, a mixed atmosphere of argon and oxygen gas. At this time, the partial pressure of argon may be smaller than the partial pressure of oxygen gas. Thereby, the oxide film 150 with few crystal defects is obtained.

  Next, the oxide film 150 is processed by etching. At this time, by using a multi-tone mask, the number of masks can be reduced and the process can be shortened. Specifically, the resist 210 is formed over the oxide film 150 by a wet film formation method, a lamination method, or the like. Next, as a multi-tone mask, for example, a halftone mask 200 as shown in FIG. 6B is placed on the resist 210 and exposed. The halftone mask 200 is a photomask in which a transmissive portion 204, a light shielding portion 208, and a semi-transmissive portion 206 are provided on a substrate 202 containing glass or quartz.

  In the case where the resist 210 is a negative type, the resist located under the transmission portion 204 is improved in solubility by exposure and can be removed by subsequent development. On the other hand, since the photoreaction does not substantially proceed in the resist 210 positioned under the light shielding portion 208, the resist 210 remains on the oxide film 150 even after development. In the resist 210 located under the semi-transmissive portion 206, the photoreaction proceeds partially, so that the solubility after light irradiation is not sufficiently improved, and a part of the resist 210 remains. As a result, a resist mask 212 having a plurality of regions with different thicknesses can be formed (FIG. 6C). In the present embodiment, the halftone mask 200 is designed and arranged so that the semi-transmissive portion 206 is located in the region where the first region 152 is formed and the light-shielding portion 208 is located in the region where the second region 154 is formed. To do.

  After the resist mask 212 is formed, the oxide film 150 is patterned by etching the exposed portion of the oxide film 150 from the resist mask 212 (FIG. 7A). As a result, the oxide film 150 is separated between adjacent pixels 106.

  Thereafter, ashing is performed on the resist mask 212 to reduce the thickness of the resist mask 212. Ashing can be performed, for example, by treating the resist mask 212 with plasma in the presence of oxygen (FIG. 7A). At this time, ashing is performed so that a portion of the resist mask 212 with a small thickness disappears (FIG. 7B). As a result, a thick region of the resist mask 212 can be selectively left. That is, a portion of the oxide film 150 where the first region 152 is formed can be exposed and a portion where the second region 154 can be formed can be covered with the resist mask 212.

In this state, the conductive treatment is performed on the oxide film 150 to increase the conductivity of the portion exposed from the resist mask 212, thereby forming the first region 152 and the second region 154. The conductive treatment can be performed, for example, by treating the oxide film 150 with plasma such as argon, nitrogen (N ₂ ), or nitrogen oxide (N ₂ O). Alternatively, ions of a group 13 nonmetallic element such as boron or a group 15 element such as phosphorus or arsenic may be implanted. Conductivity can be significantly increased by inducing generation of oxygen defects in the oxide film 150 and forming donor levels by plasma treatment or ion implantation. On the other hand, the portion covered with the resist mask 212 (that is, the second region 154) is not exposed to plasma or ions, so that the conductivity at the time of film formation is maintained, and substantially acts as an insulator or a semiconductor. (FIGS. 7B and 7C).

  Note that without forming the resist mask 212, the oxide film 150 is partially irradiated with a laser having a wavelength in the ultraviolet region, such as an excimer laser, and the first region 152 is formed by conducting a conductive treatment. May be.

  By the above-described conductive treatment, the first region 152 and the second region 154 are formed from the oxide film 150. For this reason, these regions exist in the same layer. In the case where the conductive treatment does not affect or does not substantially affect the thickness of the oxide film 150, the upper surfaces of the first region 152 and the second region 154 are the same or substantially the same. As a result, the oxide film 150 having a flat upper surface and a region having high conductivity and a region that acts as an insulator or a semiconductor can be provided. Even when there is a difference in film thickness between the first region 152 and the second region 154 due to the conductive treatment, the composition of the main component does not change dramatically, so the difference is small. Accordingly, the top surfaces of the first region 152 and the second region 154 are continuous, and the oxide film 150 having a relatively flat top surface can be obtained.

  Here, a part of the first region 152 in the opening may be removed so that the source electrode 136 and the first alignment film 160 are in direct contact with each other. As a result, as shown in FIG. 4C, a structure in which the region where the source electrode 136 and the first alignment film 160 are in contact is sandwiched or surrounded by the first region 152 is obtained.

  After the conductive treatment, the resist mask 212 is removed (FIG. 8A), and then the first alignment film 160 is formed over the planarization film 146 and the oxide film 150 (FIG. 8B). The first alignment film 160 can include a polymer such as polyimide, a precursor thereof, polyamide, polyester, polysiloxane, polyacrylic acid ester, or polymethacrylic acid ester, and is formed using a wet method or a lamination method. be able to. The first alignment film 160 may be rubbed or may be processed by a photo-alignment technique. Such a photo-alignment technique is a rubbing-less alignment process technique using light. For example, the alignment film is irradiated with polarized light in the ultraviolet region from a predetermined direction. Then, a photoreaction is caused in the alignment film, and anisotropy is introduced into the surface of the alignment film to impart the liquid crystal alignment control ability. An alignment film obtained by the photo-alignment technique may be particularly referred to as a photo-alignment film.

  As a method of photo-alignment treatment, a photo-crosslinking type or photo-decomposition type photo-alignment technique is known (for example, see Non-Patent Document 1). In the photocrosslinking type, for example, an alignment film made of a polyvinyl cinnamate derivative is irradiated with polarized ultraviolet rays to cause a crosslinking reaction by photodimerization, thereby introducing anisotropy into the alignment film.

  In the photolysis type, for example, polarized ultraviolet rays are irradiated on an alignment film made of polyimide, and anisotropy is introduced into the alignment film by causing an anisotropic photodecomposition reaction in the alignment film. This photodecomposition type photo-alignment technique is a more preferable photo-alignment technique because it is chemically stable and has high heat resistance, and a conventionally used polyimide alignment film can be used. As the photo-alignment material, the photo-alignment material described in Japanese Patent No. 3893659 can be used.

  As will be described later, in the manufacturing method described in this embodiment, an alignment process can be performed by polymerizing a monomer having liquid crystallinity in the liquid crystal layer 162. In this case, as the first alignment film 160, it is preferable to use a photo-alignment material described in Japanese Patent No. 3893659 or an alignment material described in Japanese Patent Application Laid-Open No. 2015-099344.

[3. Counter substrate]
A light-shielding film 168 is formed over the counter substrate 180 (FIG. 9A). The light-shielding film 168 is formed using a metal material having a relatively low reflectance such as chromium or molybdenum, or a resin material containing a pigment having a black color or a color close thereto, using an evaporation method, a sputtering method, a CVD method, or a wet film formation method. Can be formed.

  Next, the color filter 170 is formed in the opening of the light shielding film 168 (FIG. 9A). The color filter 170 may be formed so as to cover a part of the light shielding film 168. The optical characteristics of the color filter 170 are changed for each adjacent pixel 106, and for example, the color filter 170 can be formed so as to extract red, green, and blue light emission for each pixel. Note that the light shielding film 168 and the color filter 170 may be provided on the counter substrate 180 with a base film interposed therebetween, or a protective film may be further provided so as to cover the light shielding film and the color filter. Alternatively, the light shielding film 168 may be formed after the color filter 170 is formed on the counter substrate 180.

  Next, a counter electrode 166 is formed so as to cover the color filter 170 and the light-shielding film 168 (FIG. 9B). The counter electrode 166 can be formed using a conductive material that transmits visible light. For example, a transparent conductive oxide such as indium-tin oxide (ITO) or indium-zinc oxide (IZO) can be used. The counter electrode 166 can be formed by applying a sputtering method using a target including any of these materials.

  A second alignment film 164 may be formed over the counter electrode 166. The second alignment film 164 can include a material similar to that of the first alignment film 160 and can be formed by a similar method. A rubbing treatment may be performed on the second alignment film 164.

[4. Cell assembly process]
After that, the substrate 102 and the counter substrate 180 are attached to each other with an adhesive so that the oxide film 150 and the counter electrode 166 are sandwiched between the substrate 102 and the counter substrate 180. Subsequently, liquid crystal molecules are injected between the substrate 102 and the counter substrate 180 to form a liquid crystal layer 162. Alternatively, the liquid crystal molecules are dropped on one of the substrate 102 and the counter substrate 180, the other is placed thereon, and the liquid crystal molecules spread in the space between the substrate 102 and the counter substrate 180. 180 may be attached (FIG. 9C). A spacer for maintaining the distance between the oxide film 150 and the counter electrode 166 may be added to the liquid crystal layer 162. Instead of adding a spacer, a spacer including an insulator may be provided over the substrate 102 or the counter substrate 180. Through the above steps, the display device 100 is manufactured.

[5. Orientation treatment]
When a PSA liquid crystal device is manufactured, liquid crystal molecules in the liquid crystal layer 162 can be aligned by the following steps. In the cell assembly process described above, a liquid crystal monomer and a photopolymerization initiator are mixed with liquid crystal molecules, and these are filled in a space between the substrate 102 and the counter substrate 180. Examples of the polymerizable substituent in the monomer include a styryl group, an acryloyl group, and a methacryloyl group. After that, a potential difference is provided between the first region 152 of the oxide film 150 and the counter electrode 166, and an electric field is applied to the liquid crystal layer 162. In this state, the liquid crystal layer is irradiated with light to start polymerization (see FIG. 9C). Polymerization of the monomer forms a polymer matrix. This matrix maintains the state in which the liquid crystal molecules are aligned by the electric field, which can be stored in the liquid crystal layer as the initial alignment state. The initial alignment state can be controlled by the electric field strength and the electric field distribution.

  By appropriately designing the shape of the resist mask 212 using the halftone mask 200, a pixel electrode having a shape such as a comb shape or a fishbone shape can be formed. Further, even when such a shape is applied to the pixel electrode, the pixel electrode does not give unevenness to the liquid crystal layer. Therefore, at least in the display region 190, disorder of the alignment of the liquid crystal layer in the vicinity of the pixel electrode can be suppressed, and a liquid crystal display device having high display quality can be provided.

(Third embodiment)
In the present embodiment, a display device 220 having a structure different from that of the display device 100 of the first and second embodiments will be described with reference to FIGS. 10 is a schematic top view of the pixel 106 of the display device 220, and FIG. 11 corresponds to a cross-sectional view taken along the chain line BB ′ of FIG. Descriptions similar to those in the first and second embodiments may be omitted.

  The pixel 106 of the display device 220 is one of the differences from the pixel 106 of the display device 100 in that the oxide film 150 includes a third region 156 in addition to the first region 152 and the second region 154. .

  The first region 152 has higher conductivity than the second region 154, and may have a comb-teeth shape as shown in FIG. The comb teeth may be bent. The first region 152 is electrically connected to the transistor 130, and a video signal is supplied from the signal line 122 through the transistor 130. That is, the first region 152 functions as a pixel electrode.

  The third region 156 has higher conductivity than the second region 154. The third region 156 is electrically independent from the first region, and a constant voltage can be applied. That is, the third region 156 can function as a counter electrode. Third region 156 is electrically connected to power supply line 158 through a contact hole (dotted circle in the drawing), and a voltage applied to third region 156 is supplied from power supply line 158. In FIG. 10, the power supply line 158 is installed so as to extend in a direction parallel to the scanning line 120, but the power supply line 158 may extend in a direction perpendicular to the scanning line 120. When the display device 220 is driven by inversion driving, the polarities of voltages applied to the first region 152 and the third region 156 may be interchanged for each frame.

  The third region 156 can have a comb-like shape like the first region 152. In this case, the first region 152 and the third region 156 may be provided so that the comb teeth of the first region 152 and the comb teeth of the third region 156 are engaged with each other.

  The first region 152, the second region 154, and the third region 156 can be formed using a method similar to the method described in the second embodiment. That is, a resist mask 212 having at least two regions having different thicknesses is formed over the oxide film 150, and the oxide film 150 is etched. Thereafter, ashing is performed on the resist mask 212 to remove a region having a small thickness, and a portion where the first region 152 and the third region 156 are formed is exposed. After that, plasma treatment or ion implantation is performed on the exposed portion to conduct conductivity treatment, so that the first region 152 and the third region 156 are formed. A region where plasma treatment or ion implantation is not performed becomes the second region 154.

  As can be understood from the manufacturing method described above, and as illustrated in FIG. 11, the first region 152 and the third region 156 exist in the same layer. Therefore, an electric field can be applied to the liquid crystal layer 162 mainly in a direction parallel to the upper surface of the substrate 102, and the display device 220 can function as an IPS (In-Plane Switching) liquid crystal display device. Therefore, the counter electrode 166 is not necessarily provided over the liquid crystal layer 162.

  Similar to the display device 100, the upper surface of the first region 152, the upper surface of the second region 154, and the upper surface of the third region 156 exist in the same plane. Therefore, the first region 152 which is a pixel electrode and the third region 156 which is a counter electrode do not give unevenness to the liquid crystal layer 162. For this reason, disorder of the alignment of the liquid crystal layer 162 in the vicinity of the pixel electrode can be suppressed, and a liquid crystal display device having high display quality can be provided.

(Fourth embodiment)
In this embodiment, a display device 230 having a structure different from that of the display devices 100 and 220 described in the first to third embodiments will be described with reference to FIGS. 12 is a schematic top view of the pixel 106 of the display device 230, and FIG. 13 corresponds to a cross-sectional view taken along the chain line CC ′ of FIG. Descriptions similar to those in the first to third embodiments may be omitted.

  The pixel 106 of the display device 230 is one of the differences from the display devices 100 and 220 in that a counter electrode 166 is provided below the oxide film 150 via a gate insulating film 140 or the like ( (See FIG. 13C).

  Specifically, as in the display device 100, the oxide film 150 includes a first region 152 and a second region 154. The first region 152 has higher conductivity than the second region 154, and may have a comb shape. The comb teeth may be bent. At least a part of the second region 154 is sandwiched between a pair of comb teeth. The first region 152 is electrically connected to the transistor 130, and a video signal is supplied from the signal line 122 through the transistor 130. That is, the first region 152 functions as a pixel electrode.

  As illustrated in FIG. 13, the pixel 106 of the display device 230 includes a counter electrode 166 between the substrate 102 and the oxide film 150. The counter electrode 166 overlaps with the oxide film 150. In FIG. 13, the counter electrode 166 is located under the gate insulating film 140, but may be provided between the gate insulating film 140 and the interlayer film 144. The counter electrode 166 may exist in the same layer as the gate electrode 132 or may exist in a different layer.

  As shown in FIG. 13, the first region 152 functioning as a pixel electrode and the counter electrode 166 are both located below the liquid crystal layer 162. Further, the first region 152 and the counter electrode 166 exist in different layers. Therefore, an electric field can be applied to the liquid crystal layer 162 mainly in a direction parallel to the upper surface of the substrate 102, and the display device 220 can function as an FFS (Fringe Field Switching) liquid crystal display device. Therefore, the counter electrode 166 is not necessarily provided over the liquid crystal layer 162.

  Similar to the display devices 100 and 220, the upper surface of the first region 152 and the upper surface of the second region 154 exist in the same plane. Therefore, the first region 152 functioning as a pixel electrode does not give unevenness to the liquid crystal layer. For this reason, disorder of the alignment of the liquid crystal layer 162 in the vicinity of the pixel electrode can be suppressed, and a liquid crystal display device having high display quality can be provided.

  The embodiments described above as the embodiments of the present invention can be implemented in appropriate combination as long as they do not contradict each other. Based on each embodiment, those in which those skilled in the art appropriately added, deleted, or changed the design of components are also included in the scope of the present invention as long as they have the gist of the present invention.

  Of course, other operational effects that are different from the operational effects provided by the above-described embodiments, which are apparent from the description of the present specification or can be easily predicted by those skilled in the art, are naturally included in the present invention. It is understood that

  100: Display device, 102: Substrate, 104: Pixel region, 106: Pixel, 108: Gate side driver circuit, 110: Gate side driver circuit, 112: Source side driver circuit, 114: Connector, 120: Scan line, 122: Signal lines, 122: plural signal lines, 130: transistors, 132: gate electrodes, 134: semiconductor layers, 136: source electrodes, 138: drain electrodes, 140: gate insulating films, 142: channel protective films, 144: interlayer films 146: planarization film, 150: oxide film, 152: first region, 154: second region, 156: third region, 158: power line, 160: alignment film, 162: liquid crystal layer, 164 : Second alignment film, 166: counter electrode, 168: light shielding film, 170: color filter, 172: protective film, 180: counter substrate, 182: polarizing plate, 184: polarizing plate 190: display area, 192: light shielding area, 200: halftone mask, 202: substrate, 204: transmission part, 206: semi-transmission part, 208: light shielding part, 210: resist, 212: resist mask, 220: display device, 230: Display device

Claims (20)

A transistor having a gate electrode, a semiconductor film, and a gate insulating film sandwiched between the gate electrode and the semiconductor film;
An insulating film on the transistor;
An oxide film on the insulating film;
The oxide film is
A first region electrically connected to the transistor;
A second region in contact with the first region;
The conductivity of the first region is higher than the conductivity of the second region,
A display device in which an upper surface of the first region and an upper surface of the second region are continuous. The first region has a comb-teeth shape;
The display device according to claim 1, wherein at least a part of the second region is sandwiched between the pair of comb teeth. An alignment film in contact with the first region and the second region;
A liquid crystal layer on the alignment film;
The display device according to claim 1, further comprising a common electrode on the liquid crystal layer.   The display device according to claim 1, further comprising a common electrode overlapping the first region under the insulating film. A transistor having a gate electrode, a semiconductor film, and a gate insulating film sandwiched between the gate electrode and the semiconductor film;
An insulating film on the transistor;
An oxide film on the insulating film;
The oxide film is
A first region electrically connected to the transistor;
A third region configured to be electrically independent from the first region and to be applied with a constant voltage;
A second region in contact with the first region and the third region and sandwiched between the first region and the third region;
The conductivity of the first region and the third region is higher than the conductivity of the second region,
The upper surface of the first region, the upper surface of the second region, and the upper surface of the third region are continuous display devices.   The display device according to claim 1, wherein the second region is electrically an insulator or a semiconductor.   The display device according to claim 1, wherein the oxide film includes at least one oxide of indium, gallium, and zinc. The transistor has a source electrode and a drain electrode,
The first region is electrically connected to either the source electrode or the drain electrode at an opening in the insulating film;
The display device according to claim 1, wherein the insulating film is in contact with any one of the source electrode and the drain electrode in the opening. The first region and the third region have a comb-teeth shape,
The display device according to claim 5, wherein the comb teeth in the first region and the comb teeth in the third region mesh with each other. An alignment film in contact with the first region, the second region, and the third region;
The display device according to claim 5, further comprising a liquid crystal layer on the alignment film. Forming a transistor having a gate electrode, a semiconductor film, and a gate insulating film sandwiched between the gate electrode and the semiconductor film;
Forming an insulating film on the transistor;
Forming an opening in the insulating film;
Forming an oxide film on the insulating film so as to cover the opening;
Forming a first region and a second region in the oxide film;
In the formation of the first region and the second region, the first region has higher conductivity than the second region, and the first region is connected to the transistor in the opening. A method for manufacturing a display device is performed as described above. The opening is formed so as to expose either the source electrode or the drain electrode of the transistor,
The manufacturing method according to claim 11, further comprising removing a part of the first region in the opening to expose the one of the source electrode and the drain electrode.   The manufacturing method according to claim 11, wherein the first region and the second region are formed so that the first region has conductivity and the second region has insulation.   The manufacturing method according to claim 11, wherein the formation of the first region is performed by partially plasma-treating the oxide film.   The first region and the second region are formed so that the first region has a comb shape and at least a part of the second region is sandwiched between the pair of comb teeth. The production method according to claim 11.   The manufacturing method according to claim 11, wherein the oxide film includes at least one oxide of indium, gallium, and zinc. Forming an alignment film in contact with the first region and the second region on the first region and the second region;
Forming a common electrode on the counter substrate;
The manufacturing method according to claim 11, further comprising disposing a liquid crystal layer between the alignment film and the common electrode.   The manufacturing method according to claim 11, further comprising forming a common electrode overlapping the first region under the insulating film. Further comprising forming a third region in the oxide film;
The third region is formed so that the third region has higher conductivity than the second region, and the second region is sandwiched between the first region and the third region. The production method according to claim 11.   The manufacturing method according to claim 19, wherein the third region is performed by partially plasma-treating the oxide film.

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