JP2017213454A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a game machine capable of simplifying operation control of a movable body.SOLUTION: A shutter operation sequence table Y7 for indicating a sequence for driving a shutter device includes a special step (step 2) of moving the shutter device from a second position (rotation 50%) to a first position (rotation 0%). In the special step, 300 is set as a value of the number of pulses larger than the number of pulses required for moving the shutter device from the second position to the first position. Based on detection of the shutter device being in the first position by a sensor during execution of the special step, processing advances to the next step (step 3) of the special step.SELECTED DRAWING: Figure 78

Description

  The present invention relates to a gaming machine such as a pachislot machine.

  Conventionally, it is detected that a plurality of reels having a plurality of symbols arranged on each surface, a game medal, a coin or the like (hereinafter referred to as “game medium”), and the start lever is operated by the player, A start switch that requests the start of rotation of a plurality of reels and a stop button provided corresponding to each of the plurality of reels are detected by the player, and the stop of rotation of the corresponding reel is requested. A stop switch that outputs a signal, a stepping motor that is provided corresponding to each of the plurality of reels, and that transmits each driving force to each reel, and a stepping motor based on the signals output by the start switch and the stop switch A reel control unit that controls the operation of each reel, and rotates and stops each reel, and the start lever is operated. Is detected, the lottery is performed based on the random number value, and the rotation of the reel is stopped based on the result of the lottery (hereinafter referred to as “internal winning combination”) and the timing at which the stop button is detected. A game machine called a so-called pachislot machine is known.

  As this type of gaming machine, there are a plurality of games including a normal gaming state in which the stop operation order of each reel for winning an internal winning combination is not notified, and a so-called AT gaming state in which the stop operation order is notified by production. A gaming machine that takes a gaming state is proposed in Patent Document 1.

  Such a conventional gaming machine proposed in Patent Document 1 activates the AT gaming state when, for example, the stopping operation is not performed in a predetermined stopping operation sequence (for example, forward pressing) in the normal gaming state. Even if the conditions for determining whether to activate the conditions and the AT gaming state are satisfied, a disadvantageous state in which the determination of whether to activate the AT gaming state or whether to activate the AT gaming state is not performed. I am trying to set it.

  In addition, as this type of gaming machine, there is a gaming machine that makes it difficult to perform a so-called electric goto action that causes an internal electrical circuit to malfunction by flowing an electrical signal from the outside of the gaming machine to the internal electrical circuit. This is proposed in Patent Document 2.

JP 2005-62211 A JP2013-248020A

  By the way, the conventional gaming machine has a problem that the operation control of the movable part is complicated. An object of this invention is to provide the game machine which can simplify operation control of a movable part.

The gaming machine according to the present invention is
A movable part (shutter device 200) movable to at least a first position and a second position;
A drive unit (elevating motors 240A and 240B) for driving the movable unit;
A control unit (sub-control circuit 101) capable of controlling the operation mode of the movable unit by controlling the drive unit;
Detecting means (an origin sensor 270, a lowering sensor 271 and a rotation sensor 272) capable of detecting that the movable portion is in the first position;
The controller is
Production determining means (sub CPU102) capable of determining production pattern information (production 1 to production 6);
A drive sequence table (shutter operation sequence table) composed of a plurality of steps including a pulse width and a pulse number for controlling the drive unit;
Determining means (sub CPU102) capable of determining the drive sequence table based on operation sequence data (shutter operation data) included in the effect pattern information determined by the effect determining means;
Based on the drive sequence table determined by the determining means, performs the operation control of the movable portion,
The drive sequence table includes a special step (for example, step 2 of the shutter operation data Y7) for moving the movable portion from the second position to the first position,
In the special step, a pulse number value (for example, 300) larger than the pulse number necessary for moving the movable part from the second position to the first position is set,
It is configured that the processing proceeds to the next step after the special step based on the fact that the detection unit detects that the movable portion is in the first position during the execution of the special step.

  With this configuration, in the gaming machine according to the present invention, in the special step, the value of the number of pulses larger than the number of pulses necessary for moving the movable part from the second position to the first position is set. Since the process proceeds to the next step after the special step based on the detection unit detecting that the movable unit is in the first position during the execution of the step, the movable unit is moved from the second position to the first position. Therefore, it is not necessary to strictly set the number of pulses necessary for this. For this reason, the gaming machine according to the present invention can simplify the operation control of the movable portion.

In the gaming machine according to the present invention,
The movable portion is also movable to a third position (for example, 100% rotation) that is different from the first position (for example, rotation 0%) and the second position (for example, rotation 50%),
The movable unit may be moved from the third position to the first position based on a drive sequence table that moves the movable unit from the second position to the first position.

  With this configuration, the gaming machine according to the present invention can divert the drive sequence table to a plurality of effects, so that the operation control of the movable part can be simplified.

In the gaming machine according to the present invention,
The controller is
Storage means (sub-RAM 104) capable of storing operation sequence data representing the drive sequence table determined by the determination means;
A consistency table (shutter operation combination determination table) for ensuring the consistency of the operation of the movable part,
The determination unit is configured to ensure the consistency of the operation of the movable unit based on the previous operation sequence data stored by the storage unit, the current operation sequence data, and the consistency table. The operation sequence data may be determined.

  With this configuration, in the gaming machine according to the present invention, the operation of the movable unit is performed based on the previous operation sequence data stored by the storage unit, the operation sequence data determined by the determination unit, and the consistency table. Since the operation sequence data is determined so as to be consistent, the control of the operation of the movable part can be simplified.

  Further, the gaming machine according to the present invention can prevent the movable part from operating normally due to inconsistency in the cooperation of the movable part even if there is an error in the control of the movable part. it can.

  ADVANTAGE OF THE INVENTION According to this invention, the game machine which can simplify operation control of a movable part can be provided.

It is a figure which shows the functional flow of the pachislot machine which concerns on embodiment of this invention. 1 is an overall perspective view showing an external structure of a pachislot machine according to an embodiment of the present invention. 1 is a block diagram showing an electrical configuration of a pachislot machine according to an embodiment of the present invention. It is a block diagram which shows the structure of the main control circuit of the pachislot machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the sub control circuit of the pachi-slot machine which concerns on embodiment of this invention. It is a rear view of the shutter device of the pachi-slot machine according to the embodiment of the present invention. It is AA sectional drawing in FIG. It is a front view which shows the state which accommodated the shutter member of the shutter apparatus of the pachislot machine which concerns on embodiment of this invention. It is a front view when the shutter member which concerns on embodiment of this invention exists in a shielding state (surface). It is a front view when the shutter member which concerns on embodiment of this invention exists in a half-open state. It is a front view when the shutter member which concerns on embodiment of this invention exists in a shielding state (back surface). 1 is a perspective view of a shutter device according to an embodiment of the present invention. It is RT game state transition transition diagram in the pachi-slot machine according to the embodiment of the present invention. It is a figure which shows the symbol arrangement | positioning table memorize | stored in main ROM. It is a figure which shows the symbol code table in the pachislot machine which concerns on embodiment of this invention. It is a figure which shows the symbol combination table memorize | stored in main ROM. It is a figure which shows the symbol combination table following FIG. It is a figure which shows the combination table classified by flag memorize | stored in main ROM. It is a figure which shows the combination table classified by flag following FIG. It is a figure which shows the internal lottery table (RT0 game state) memorize | stored in main ROM. It is a figure which shows the internal lottery table (RT1 game state) memorize | stored in main ROM. It is a figure which shows the internal lottery table (RT2 game state) memorize | stored in main ROM. It is a figure which shows the internal lottery table (RT3 game state) memorize | stored in main ROM. It is a figure which shows the internal lottery table (RT4 game state) memorize | stored in main ROM. It is a figure which shows the internal lottery table (RT5 game state) memorize | stored in main ROM. It is a figure which shows the internal lottery table (CB_RT0 gaming state in MB) memorize | stored in main ROM. It is a figure which shows the internal lottery table (CB_RT1 gaming state in MB) memorize | stored in main ROM. It is a figure which shows the internal lottery table (CB_CB2 gaming state in MB) memorize | stored in main ROM. It is a figure which shows the internal lottery table (CB_CB3 gaming state in MB) memorize | stored in main ROM. It is a figure which shows the internal lottery table (CB_CB4 gaming state in MB) memorize | stored in main ROM. It is a figure which shows the internal lottery table (CB_CB5 gaming state in MB) memorize | stored in main ROM. It is a figure which shows the rotation stop initial setting table memorize | stored in main ROM. It is a figure which shows the drawing | rank priority table memorize | stored in main ROM. It is a figure which shows the drawing priority order selection table memorize | stored in main ROM. It is a figure which shows the 1st cylinder stop data table memorize | stored in main ROM. It is a figure showing search order table 00 memorized by main ROM. It is a figure which shows the search order table 01 memorize | stored in main ROM. It is a figure which shows the symbol corresponding winning action flag data table memorize | stored in main ROM. It is a figure which shows the loose reel action lottery table memorize | stored in main ROM. It is a figure which shows the lost reel action state transfer lottery table memorize | stored in main ROM according to mode. It is a figure which shows the special counter addition lottery table memorize | stored in main ROM. It is a figure which shows the modification of a special counter addition lottery table. It is a figure which shows the discharge lottery table memorize | stored in main ROM. It is a figure which shows the modification of a discharge lottery table. It is a figure which shows the internal winning combination storing area allocated to main RAM. It is a figure which shows the display combination storage area allocated to main RAM. It is a figure which shows the symbol code storage area allocated to main RAM. It is a figure which shows the carryover combination storage area allocated to main RAM. It is a figure which shows the game state flag storage area allocated to main RAM. It is a figure which shows the operation | movement stop button storage area allocated to main RAM. It is a figure which shows the pressing order storage area allocated to main RAM. It is a figure which shows the drawing priority order data storage area allocated to main RAM. It is a figure which shows the sub determination combination number table referred by sub CPU. It is a figure which shows the sub determination combination identification table referred by sub CPU. It is a figure which shows the number-of-games addition lottery table referred by sub CPU. It is a figure which shows the addition selection payout table referred by sub CPU. It is a figure which shows the addition selection lottery table at the time of the ART first hit referred by sub CPU. It is a figure which shows the ART addition selection lottery table referred by sub CPU. It is a figure which shows the ART addition selection lottery table following FIG. It is a figure which shows the normal addition selection lottery table referred by sub CPU. FIG. 61 is a diagram showing a normal addition selection lottery table following FIG. 60. It is a figure which shows the special function activation lottery table referred by sub CPU. It is a figure which shows the crushing number lottery table referred by sub CPU. It is a figure which shows the addition selection continuation rate lottery table referred by sub CPU. It is a figure which shows the addition selection continuation rate lottery table following FIG. It is a figure which shows the addition selection continuation state lottery table referred by sub CPU. It is a figure which shows the addition selection payout lottery table referred by sub CPU. It is a figure which shows the addition game lottery table referred by sub CPU. It is a figure which shows the ART direct hitting | lottery table referred by sub CPU. It is a figure which shows the lottery table with the ART addition game directly referred by sub CPU. It is a figure which shows the step-up sequence table referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to the shutter operation | movement data Y1 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to the shutter operation | movement data Y2 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to the shutter operation | movement data Y3 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to the shutter operation data Y4 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to the shutter operation data Y5 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to shutter operation data Y6 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to the shutter operation data Y7 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to the shutter operation | movement data Y8 referred by sub CPU. It is a figure which shows the shutter operation | movement combination determination table referred by sub CPU. It is a figure which shows an example of the shutter operation sequence storage area allocated to sub-RAM. It is a figure which shows the internal winning combination group table for penalty determination referred by sub CPU. It is a figure which shows the error management area | region allocation table referred by sub CPU. It is a flowchart which shows the main control process of the pachislot machine which concerns on embodiment of this invention. It is a flowchart which shows the power-on process performed in the main control process shown in FIG. FIG. 85 is a flowchart showing a medal acceptance / start check process executed in the main control process shown in FIG. 84. FIG. FIG. 87 is a flowchart showing an automatic insertion process executed in the medal acceptance / start check process shown in FIG. 86. FIG. It is a flowchart which shows the internal lottery process performed in the main control process shown in FIG. It is a flowchart which shows the special counter process performed in the main control process shown in FIG. FIG. 85 is a flowchart showing a reel stop initial setting process executed in the main control process shown in FIG. 84. FIG. FIG. 95 is a flowchart showing a pull-in priority storage process executed in the main control process shown in FIG. 84 and the reel stop control process shown in FIG. 94. FIG. FIG. 92 is a flowchart showing a pull-in priority table selection process executed in the pull-in priority storage process shown in FIG. 91. FIG. FIG. 95 is a flowchart showing a symbol code storing process executed in the drawing priority order storing process shown in FIG. 91 and the reel stop control process shown in FIG. 94. FIG. It is a flowchart which shows the reel stop control process performed in the main control process shown in FIG. It is a flowchart which shows the bonus completion | finish check process performed in the main control process shown in FIG. It is a flowchart which shows the bonus action check process performed in the main control process shown in FIG. It is a flowchart which shows the interruption process by control of the main CPU which comprises the pachislot machine which concerns on embodiment of this invention. FIG. 98 is a flowchart showing an input port check process executed in the interrupt process shown in FIG. 97. FIG. FIG. 98 is a flowchart showing a data transmission process executed in the interrupt process shown in FIG. 97. FIG. FIG. 99 is a flowchart showing a no-operation command communication data storage process executed in the data transmission process shown in FIG. 99. FIG. It is a flowchart which shows the power-on process of the sub CPU which comprises the pachislot machine which concerns on embodiment of this invention. It is a flowchart which shows the lamp | ramp control task started in the power-on process shown in FIG. It is a flowchart which shows the sound control task started in the power-on process shown in FIG. It is a flowchart which shows the shutter control task started in the power-on process shown in FIG. FIG. 105 is a flowchart showing shutter effect reconstruction processing executed in the shutter control task shown in FIG. 104. FIG. 105 is a flowchart showing a shutter control process executed in the shutter control task shown in FIG. 104. It is a flowchart which shows the main task started in the power-on process shown in FIG. 108 is a flowchart showing an error occurrence monitoring process executed in the main task shown in FIG. 107. 108 is a flowchart showing an error cancellation monitoring process executed in the main task shown in FIG. 107. 101 is a flowchart showing a main board communication task activated in the power-on process shown in FIG. 101. FIG. 111 is a flowchart showing command analysis processing executed in the main board communication task shown in FIG. 110. FIG. It is a flowchart which shows the animation task started in the power-on process shown in FIG. It is a flowchart which shows the command consistency determination process performed in the command analysis process shown in FIG. It is a flowchart which shows the effect content determination process performed in the command analysis process shown in FIG. It is a flowchart which shows the process at the time of the start command reception performed in the production content determination process shown in FIG. FIG. 116 is a flowchart showing a fail-safe process executed in the start command reception process shown in FIG. 115. FIG. FIG. 116 is a flowchart showing first gaming state-specific lottery processing executed in the start command reception processing shown in FIG. 115; It is a flowchart which shows the production | generation setting process at the time of the lock generation performed in the process at the time of the start command reception shown in FIG. It is a flowchart which shows the process at the time of the winning operation command reception performed in the production content determination process shown in FIG. 119 is a flowchart showing penalty setting processing executed in the winning operation command reception processing shown in FIG. 119; It is a flowchart which shows the lottery process classified by the 2nd gaming state performed in the process at the time of the winning operation command reception shown in FIG. It is a flowchart which shows the error command reception time process performed in the production content determination process shown in FIG. It is a flowchart which shows the process at the time of the no-operation command reception performed in the production content determination process shown in FIG. It is a flowchart which shows the step-up effect sequence state transition process performed in the process at the time of the no-operation command reception shown in FIG. It is a flowchart which shows the special step up process performed in the step up effect sequence state transition process shown in FIG. It is a flowchart which shows the step-up effect registration process performed in the step-up effect sequence state transition process shown in FIG. 124 and the special step-up process shown in FIG. It is a flowchart which shows the power interruption detection process performed when it is detected that the power supply was cut off by sub CPU. It is a flowchart which shows the electric power interruption reset process performed in the power activation process shown in FIG. It is a flowchart which shows the 1st general inside lottery process performed in the lottery process classified by the 1st game state shown in FIG. It is a flowchart which shows the general medium 1 game lottery process performed in the 1st general medium lottery process shown in FIG. It is a flowchart which shows the ART addition selection stock lottery process performed in the 1st general medium lottery process shown in FIG. It is a flowchart which shows the ART direct hit | lottery process performed in the 1st general medium lottery process shown in FIG. It is a flowchart which shows the 2nd general middle lottery process performed in the lottery process according to the 1st gaming state shown in FIG. It is a flowchart which shows the 3rd general middle lottery process performed in the lottery process classified by 2nd game state shown in FIG. FIG. 118 is a flowchart showing a first ART high-probability lottery process executed in the first gaming state-specific lottery process shown in FIG. 117; FIG. 136 is a flowchart showing first ART high-probability random determination processing following FIG. 135. FIG. FIG. 118 is a flowchart showing a second ART high-probability lottery process executed in the first gaming state-specific lottery process shown in FIG. 117; FIG. 122 is a flowchart showing a third ART high-probability lottery process executed in the second gaming state-specific lottery process shown in FIG. 121; FIG. 118 is a flowchart showing a first ART preparing lottery process executed in the first gaming state-specific lottery process shown in FIG. 117; FIG. 122 is a flowchart showing a second ART preparing lottery process executed in the second gaming state-specific lottery process shown in FIG. 121; It is a flowchart which shows the lottery process in the 1st ART performed in the lottery process according to the 1st game state shown in FIG. It is a flowchart which shows the lottery process in the 1st ART following FIG. It is a flowchart which shows the lottery process in 2nd ART performed in the lottery process according to the 2nd gaming state shown in FIG. It is a flowchart which shows the 1st addition selection lottery process performed in the lottery process according to the 1st game state shown in FIG. It is a flowchart which shows the 1st addition selection lottery process following FIG. It is a flowchart which shows the 2nd addition selection lottery process performed in the lottery process according to the 1st game state shown in FIG. It is a flowchart which shows the 4th addition selection lottery process performed in the process at the time of the no-operation command reception shown in FIG. It is a flowchart which shows the 4th addition selection lottery process following FIG. It is a flowchart which shows the game state transition process at the time of the 1st lock generation performed in the 2nd general medium lottery process shown in FIG. FIG. 135 is a flowchart showing a second lock occurrence gaming state transition process executed in the third general medium lottery process shown in FIG. 134 and the third ART high probability medium lottery process shown in FIG. 138. FIG. It is a flowchart which shows the 1st game state ART transition process performed in the 2nd ART high probability lottery process shown in FIG. FIG. 135 is a flowchart showing a second game state ART transition process executed in the third general medium lottery process shown in FIG. 134 and the third ART high probability medium lottery process shown in FIG. 138; It is a flowchart which shows the game state general medium transition process performed in the 2nd ART high probability medium lottery process shown in FIG. It is a flowchart which shows the 1st normal addition selection lottery process performed in the 1st ART high probability medium lottery process shown in FIG.135 and FIG.136. FIG. 16 is a flowchart showing a second normal extra selection lottery process executed in the second general medium lottery process shown in FIG. 133 and the first gaming state ART transition process shown in FIG. 151; FIG. 141 is a flowchart showing a lottery process for direct addition of the number of ART games executed in the first ART preparing lottery process shown in FIG. 139 and the first ART lottery process shown in FIGS. 141 and 142; FIG. 144 is a flowchart showing an extra game stock lottery process executed in the first ART lottery process shown in FIGS. 141 and 142 and the first extra selection lottery process shown in FIGS. 144 and 145; FIG. 118 is a flowchart showing a normal return waiting lottery process executed in the first gaming state-specific lottery process shown in FIG. 117; It is a flowchart which shows the modification of the extra game lottery process performed in the lottery process according to the 1st game state shown in FIG. FIG. 160 is a flowchart showing lottery processing during extra game following FIG. 159; FIG. FIG. 171 is a diagram showing an addition counter lottery table referred to by the sub CPU in a variation of the addition game lottery processing shown in FIGS. 159 and 160. It is a figure which shows the example of a display of the selection game screen displayed on a liquid crystal display device based on the addition selection payout table shown in FIG. It is a figure which shows the example of a display when only some elements are identifiable among each elements on the selection game screen displayed on a liquid crystal display device based on the addition selection payout table shown in FIG. It is a figure which shows a display example when all the elements on the selection game screen displayed on a liquid crystal display device based on the addition selection payout table shown in FIG. 49 are identifiable. It is a figure which shows the example of a display of the result after one of the elements on the selection game screen displayed on the liquid crystal display device is selected. It is a figure which shows the example of a display of the error screen showing the error which generate | occur | produced in the pachislot machine which concerns on embodiment of this invention. It is a figure which shows the example of a display of the error information log | history screen showing the log | history of the error which generate | occur | produced in the pachislot machine which concerns on embodiment of this invention.

  A pachislot machine that is a gaming machine according to an embodiment of the present invention will be described with reference to FIGS. First, a functional flow according to the embodiment of the gaming machine will be described with reference to FIG.

  In the pachislot machine of the present embodiment, medals are used as game media for playing games. In addition to the medals, coins, game balls, game point data, tokens, or the like can be applied as game media.

  When a player inserts a medal and operates the start lever, one value (hereinafter, random number value) is extracted from random numbers in a predetermined numerical range (for example, 0 to 65535).

  The internal lottery means performs lottery based on the extracted random number value and determines an internal winning combination. This internal lottery means is carried out by a main control circuit described later. By determining the internal winning combination, a combination of symbols that permits display along a winning determination line described later is determined. The types of symbol combinations include those related to “winning” in which benefits such as paying out medals, re-games, bonuses, etc. are given to players, and other so-called “loses”. Is provided.

  Further, when the start lever is operated, a plurality of reels are rotated. Thereafter, when the player presses the stop button corresponding to the predetermined reel, the reel stop control means performs control to stop the rotation of the corresponding reel based on the internal winning combination and the timing when the stop button is pressed. Do. The reel stop control means is responsible for a main CPU that executes a reel stop control process described later.

  In the pachislot machine, basically, control is performed to stop the rotation of the corresponding reel within a specified time (190 msec or 75 msec) from when the stop button is pressed. In the present embodiment, the number of symbols that move with the rotation of the reel within the specified time is referred to as “the number of sliding symbols”. When the specified time is 190 msec, the maximum number of sliding symbols is set to 4 symbols, and when the specified time is 75 msec, the maximum number of sliding symbols is set to 1 symbol.

  When the internal winning combination allowing the symbol combination display related to winning is determined, the reel stop control means usually displays the symbol combination within the specified time of 190 msec (four symbols) for the winning determination line. The rotation of the reel is stopped so as to display as much as possible. In addition, the reel stop control means is defined for one or more reels when, for example, a challenge bonus (CB), which is a second-type special accessory, and a middle bonus (MB) for continuously operating the CB are operated. The reel rotation is stopped so that the combination of symbols is displayed as much as possible along the winning determination line within a time of 75 msec (for one symbol). Furthermore, the reel stop control means uses various specified times corresponding to the gaming state to rotate the reels so that combinations of symbols that are not permitted to be displayed by the internal winning combination are not displayed along the winning determination line. Stop.

  Thus, when the rotation of the plurality of reels is all stopped, the winning determination means determines whether or not the combination of symbols displayed along the winning determination line is related to winning. This winning determination means is carried out by a main CPU that executes a winning search process described later. When it is determined by the winning determination means that it is related to winning, a privilege such as paying out medals is given to the player. In a pachislot machine, a series of flows as described above is performed as one game.

  Also, in the pachislot machine, in the above-described series of flows, video display performed by an image display device such as a liquid crystal display device, light output performed by various lamps, sound output performed by a speaker, and shutter driving by a shutter device. Alternatively, various effects are performed using these combinations.

  When the start lever is operated, an effect random number value (hereinafter referred to as effect random number value) is extracted separately from the random number value used for determining the internal winning combination. When the effect random number value is extracted, the effect content determining means determines, by lottery, what is to be executed this time from among a plurality of types of effect contents associated with the internal winning combination. This effect content determination means is carried out by a sub-control circuit described later.

  When the contents of the effect are determined, the effect executing means executes the corresponding effect in conjunction with each opportunity, such as when the rotation of the reels starts, when the rotation of each reel stops, or when determining whether there is a winning. As described above, in the pachislot machine, the player has an opportunity to know or predict the determined internal winning combination (in other words, a combination of symbols to be aimed at) by executing the production contents associated with the internal winning combination. The player's interest can be improved.

<Pachislot machine structure>
Next, with reference to FIG. 2, the external structure of the pachislot machine according to the present embodiment will be described.

[Appearance structure]
FIG. 2 is a perspective view showing the external structure of the pachi-slot machine 1.

  As shown in FIG. 2, the pachi-slot machine 1 includes an exterior body 2. The exterior body 2 has a cabinet 2a as a housing for housing a reel, a circuit board, and the like, and a front door 2b attached to the cabinet 2a so as to be openable and closable. Handles 2c are provided on both side surfaces of the cabinet 2a (only the handle 2c on one side is shown in FIG. 2). The handle 2c is a recess that is put on when the pachislot machine 1 is transported.

  Inside the cabinet 2a, a plurality (three in this embodiment) of reels 3L, 3C, 3R (in this embodiment, three) are displayed with a predetermined interval along the circumferential direction (for example, 21). Is housed).

  Hereinafter, the reels 3L, 3C, and 3R are referred to as a left reel 3L, a middle reel 3C, and a right reel 3R, respectively. Each reel 3L, 3C, 3R has a reel body formed in a cylindrical shape and a translucent sheet material mounted on the peripheral surface of the reel body. The above-mentioned plural (for example, 21) symbols are drawn on the surface of the aforementioned sheet material.

  The front door 2b includes a door body 9 and a liquid crystal display device 11 as image display means for displaying an image. The door body 9 is attached to the cabinet 2a using a hinge (not shown) so as to be freely opened and closed. The hinge is provided at the left end of the door body 9 when the door body 9 is viewed from the front of the pachi-slot machine 1.

  The liquid crystal display device 11 is attached to the upper part of the door body 9 of the front door 2b so as to display, for example, an image related to a game effect or information related to the game. The liquid crystal display device 11 can display game table information such as, for example, customization of gaming machines and gaming history, in addition to executing effects by displaying images.

  The front door 2b has a display window 4 through which the three reels 3L, 3C, and 3R can be visually recognized. The display window 4 includes three left display windows 4L, middle display windows 4C, and right display windows 4R corresponding to the three reels 3L, 3C, 3R.

  These display windows 4L, 4C, and 4R are provided at positions overlapping with the arrangement areas of the three reels 3L, 3C, and 3R when viewed from the front (player side), and in front of the three reels (player side) ). Therefore, the player can visually recognize the three reels 3L, 3C, 3R provided behind the display window 4 through the display windows 4L, 4C, 4R.

  In the present embodiment, the display windows 4L, 4C, 4R are arranged in succession among a plurality of types of symbols drawn on each reel when the rotation of the corresponding reel provided behind the display windows 4L, 4C, 4R is stopped. It is set to a size that can display two symbols. That is, in the frame of the display windows 4L, 4C, 4R, the upper, middle, and lower areas are provided for each reel, and one symbol is displayed in each area. In the present embodiment, a line connecting the middle stage area of the left reel 3L, the middle stage area of the middle reel 3C, and the middle stage area of the right reel 3R is defined as a winning determination line for determining whether or not a prize is won.

  A protective glass 6 is provided on the front side of the reels 3L, 3C, 3R and the liquid crystal display device 11 described above. This prevents the player from touching the reels 3L, 3C, 3R and the liquid crystal display device 11 directly.

  A decorative member 7 is attached to the upper portion of the front side of the door body 9 so as to surround the protective glass 6. The decorative member 7 constitutes a part of the exterior of the pachislot machine 1, and includes an upper exterior member 7a, a pair of side exterior members 7b, and a lower exterior member 7c.

  In particular, the upper exterior member 7a is disposed above the liquid crystal display device 11 and in front of a shutter device 200 described later. A pair of eyes 701 are formed on the upper exterior member 7a. The pair of eyes 701 are made of a translucent member, and LEDs (not shown) included in the LED group 25 described later are arranged on the back side. Accordingly, the pair of eyes 701 are lit as necessary. Note that the LEDs that light the pair of eyes 701 are multi-color LEDs capable of emitting a plurality of colors. The upper exterior member 7a constitutes an exterior member.

  A pedestal 12 is formed in the center of the door body 9. The pedestal 12 includes various devices (medal insertion slot 13, MAX bet button 14, 1 bet button 15, start lever 16, stop buttons 17L, 17C, 17R, selection button 18, decision button, and the like to be operated by the player. 19).

  The medal slot 13 is provided for receiving a medal dropped on the pachislot machine 1 from the outside by the player. That is, the medal slot 13 is for a medal to be inserted by the player. The medals inserted from the medal slot 13 are used for one game with a preset number (for example, three) as the upper limit, and the amount exceeding the preset number is deposited inside the pachislot machine 1. (So-called credit function).

  The MAX bet button 14 and the 1 bet button 15 are provided to determine the number of cards used for one game from medals deposited inside the pachislot machine 1. Although not shown in FIG. 2, the pedestal portion 12 is provided with a settlement button. This checkout button is provided to pull out (discharge) medals deposited inside the pachislot machine 1 to the outside.

  The start lever 16 is for starting the rotation of all the reels (3L, 3C, 3R) in accordance with the player's operation, and constitutes a start operation means.

  The stop buttons 17L, 17C, and 17R are provided in association with the left reel 3L, the middle reel 3C, and the right reel 3R, respectively, and are for stopping the rotation of the corresponding reels according to the player's operation. . These stop buttons 17L, 17C, and 17R constitute stop operation means.

  The stop buttons 17L, 17C, and 17R are used when performing operations related to information displayed on the liquid crystal display device 11. For example, when performing a selection operation on the display screen of the liquid crystal display device 11. Used for. Hereinafter, the stop buttons 17L, 17C, and 17R are referred to as a left stop button 17L, a middle stop button 17C, and a right stop button 17R, respectively.

  The selection button 18 and the determination button 19 are used when performing various operations on the display screen of the liquid crystal display device 11.

  The pedestal 12 is provided with a 7-segment display 28 made up of 7-segment LEDs (Light Emitting Diodes). The 7-segment display 28 displays information such as the number of medals to be paid out to the player as a privilege (hereinafter referred to as the number of payouts), the number of medals deposited inside the pachislot machine 1 (hereinafter referred to as the number of credits), and the like. Digital display.

  At the lower part of the door body 9, a medal payout port 21, a medal tray 22, speakers 23L, 23R and the like are provided. The medal payout port 21 guides medals discharged by driving a hopper device 43 described later to the outside. The medal tray 22 stores medals discharged from the medal payout opening 21. In addition, the speakers 23L and 23R output sound such as sound effects and music corresponding to the contents of the production.

  Further, the pachi-slot machine 1 includes a lock mechanism that switches the front door 2b to a locked state or an unlocked state with the front door 2b closed. This lock mechanism is operated by inserting the door key 24 into the door key hole 1 c and rotating the door key 24.

  When the door key 24 is inserted into the door key hole 1c and rotated to the right, for example, the front door 2b can be opened and closed, and when rotated to the left, the main control circuit 91 and the like are reset electrically or programmatically. It is like that. That is, the door key 24 has a reset function for resetting the pachislot machine 1 electrically or programmatically in addition to the operation of the lock mechanism.

<Electric configuration of pachislot machine>
Next, the electrical configuration of the pachislot machine 1 will be described with reference to FIG. FIG. 3 is a block diagram showing an electrical configuration of the pachi-slot machine 1.

  As shown in FIG. 3, the pachi-slot machine 1 has a main control board 41 provided in the cabinet 2a and a sub-control board 42 provided in the front door 2b. The main control board 41 is electrically connected to the reel relay terminal board 51, the setting key switch 52, the cabinet side relay board 53, the door relay terminal board 54, and the power board 44 b of the power supply device 44. ing.

  The reel relay terminal plate 51 is disposed inside the reel body of each reel 3L, 3C, 3R. The reel relay terminal plate 51 is electrically connected to the stepping motors 51L, 51C, 51R of the reels 3L, 3C, 3R, and receives signals output from the main control board 41 to the stepping motors 51L, 51C, 51R. Relay. The setting key type switch 52 is used when changing the setting of the pachislot machine 1 or when checking the setting of the pachislot machine 1. The stepping motors 51L, 51C, 51R constitute symbol variation means.

  The cabinet-side relay board 53 is electrically connected to an external concentration terminal board 56, a hopper device 43, and a medal auxiliary storage switch 57. The cabinet-side relay board 53 relays signals output from the main control board 41 to the external concentration terminal board 56, the hopper device 43, and the medal auxiliary storage switch 57. That is, the external concentration terminal board 56, the hopper device 43 and the medal auxiliary storage switch 57 are connected to the main control board 41 via the cabinet side relay board 53.

  The external concentration terminal board 56 is attached to the cabinet 2 a and is provided for outputting signals such as a medal insertion signal, a medal payout signal, and a security signal to the outside of the pachislot machine 1.

  The medal auxiliary storage switch 57 passes through a medal auxiliary storage (not shown). The medal auxiliary storage switch 57 detects whether or not the medal auxiliary storage is full of medals.

  A power switch 44 a is connected to the power board 44 b of the power device 44. The power switch 44a is turned on when supplying necessary power to the pachislot machine 1.

  The door relay terminal board 54 includes a medal sensor 46, a door open / close monitoring switch 61, a BET switch 62, a settlement switch 63, a start switch 64, a stop switch board 65, a game operation display board 66, a selection switch 67, a decision switch 68, a door key. The switch 24S (stop release switch) and the sub relay board 69 are connected. That is, the medal sensor 46, the door open / close monitoring switch 61, the BET switch 62, the checkout switch 63, the start switch 64, the stop switch board 65, the game operation display board 66, the selection switch 67, the decision switch 68, and the door key switch 24S (stop release switch) ) And the sub relay board 69 are connected to the main control board 41 via the door relay terminal board 54, and the selection switch 67 and the decision switch are connected to the sub control board 42 via the door relay terminal board 54 and the sub relay board 69. It is connected.

  The medal sensor 46 detects that the medal has passed through a selector (not shown) and outputs the detection result to the main control board 41. The door open / close monitoring switch 61 outputs a security signal for notifying the opening / closing of the front door 2b to the outside of the pachislot machine 1. The BET switch 62 detects that the MAX bet button 14 and the 1 bet button 15 (see FIG. 2) have been pressed by the player, and outputs the detection result to the main control board 41.

  The settlement switch 63 detects that a settlement button (not shown) has been pressed by the player, and outputs the detection result to the main control board 41. The start switch 64 detects that the start lever 16 has been operated by the player (start operation), and outputs the detection result to the main control board 41.

  The stop switch substrate 65 is a substrate constituting a circuit for stopping the rotating reel and a circuit for displaying the stopable reel by an LED or the like. The stop switch board 65 is provided with a stop switch 17S (not shown, but three switches corresponding to each of the three reels 3L, 3C, 3R are provided). The stop switch 17S detects that each stop button 17L, 17C, 17R has been pressed by the player (stop operation). The stop switch 17S constitutes a stop operation detection unit.

  The game operation display board 66 displays the number of inserted medals on the 7-segment display 28 when accepting insertion of medals, when the three reels 3L, 3C, 3R are rotatable and when replaying. It is a substrate for making it. A 7-segment display 28 and an LED 70 are connected to the game operation display board 66. For example, the LED 70 lights a mark for displaying the start of a game, a mark for performing a replay, and the like.

  The selection switch 67 detects that the selection button 18 has been pressed by the player, and outputs the detection result to the main control board 41 and the sub relay board 69. The decision switch 68 detects that the decision button 19 has been pressed by the player, and outputs the detection result to the main control board 41 and the sub relay board 69.

  The door key switch 24S detects that the door key 24 has been rotated in the left direction. Here, when the door key 24 is operated to rotate leftward, the error (abnormal state) of the pachislot machine 1 is reset.

  The sub relay board 69 relays the wiring connecting the sub control board 42 and the main control board 41. The sub-relay board 69 relays the wiring connecting the sub-control board 42 and a plurality of boards disposed around the sub-control board 42. That is, the sub-control board 42, the sound I / O board 71, the LED board 72, the 24h door open / close monitoring unit 74, and the shutter control board 78 are electrically connected to the sub-relay board 69.

  The sub-relay board 69 not only relays the wiring connecting between the sub-control board 42 and other boards, but also transmits sound data (compressed sound data) output from the sub-control board 42 to the sound I. Sound data is converted into audio output data (uncompressed digital sound data) by a sound chip (not shown) mounted on the sub-relay board 69 in order to output audio to the speakers 23L and 23R via the / O board 71. Then, the audio output data obtained by separating and amplifying the audio output data for the speakers 23L and 23R by a digital amplifier (not shown) is output to the sound I / O board 71, so that the audio is output from the speakers 23L and 23R. .

  The sub control board 42 is connected to the main control board 41 through the door relay terminal board 54 and the sub relay board 69. The sub control board 42 is electrically connected to the sound I / O board 71, the LED board 72, the 24h door opening / closing monitoring unit 74, and the shutter control board 78 via the sub relay board 69. .

  The sound I / O board 71 outputs sound to the speakers 23L and 23R. The LED board 72 causes the LED group 25 showing a specific example of the light source to emit light and display a blinking pattern in accordance with the effect executed by the control of the sub control circuit 101 (see FIG. 5).

  The 24h door opening / closing monitoring unit 74 stores a history of opening / closing of the front door 2b. The 24h door opening / closing monitoring unit 74 outputs a signal for displaying an error on the liquid crystal display device 11 to the sub control board 42 (sub control circuit 101) when the front door 2b is opened.

  The shutter control board 78 drives the shutter device 200 as a movable decorative portion in accordance with an effect executed by the control of the sub control circuit 101 (see FIG. 5). The shutter device 200 moves up and down shutter members 201, 202, 203, and 204, which will be described later, by being driven and controlled by the shutter control board 78. Hereinafter, the shutter members 201, 202, 203, and 204 may be collectively referred to as “shutters”.

  The shutter control board 78 is connected to an origin sensor 270, a lowering sensor 271 and a rotation sensor 272. The origin sensor 270 detects that the shutter members 201, 202, 203, and 204 of the shutter device 200 are at the origin, that is, the exposure position (position shown in FIG. 8).

  The lowering sensor 271 detects that the shutter members 201, 202, 203, and 204 are lowered, that is, at the shielding position (position shown in FIG. 9). The rotation sensor 272 detects that the shutter members 201, 202, 203, and 204 are at the rotation origin.

  A liquid crystal relay substrate 77 is connected to the sub control substrate 42. The liquid crystal relay substrate 77 is a substrate that relays the wiring connecting the sub control substrate 42 and the liquid crystal display device 11.

<Main control circuit>
Next, the main control circuit 91 constituted by the main control board 41 will be described with reference to FIG. FIG. 4 is a block diagram illustrating a configuration example of the main control circuit 91 of the pachislot machine 1.

  As shown in FIG. 4, a main control circuit 91 as a main control unit has a microcomputer 92 installed on the main control board 41 as a main component, and controls the progress of the game. The microcomputer 92 includes a main CPU 93, a main ROM 94, and a main RAM 95. The main control circuit 91 executes processing related to the progress of the game.

  The main ROM 94 stores a control program executed by the main CPU 93, a data table, data for transmitting various control commands (command signals) to the sub control circuit 101, and the like. The main RAM 95 is provided with a storage area for storing various data such as an internal winning combination determined by execution of the control program.

  Here, the main CPU 93 constitutes cycle control means for performing control at a predetermined cycle by executing interrupt processing of the main CPU described later, and performs sub-control by executing data transmission processing described later. A command transmission unit that transmits a command to the circuit 101 is configured, and a reel control unit that controls a plurality of reels 3L, 3C, and 3R is configured by executing a reel control process described later. The command includes a command triggered by the progress of the game and a no-operation command that is a command not triggered by the progress of the game.

  The command includes a command triggered by the progress of the game and a no-operation command that is a command not triggered by the progress of the game. The main CPU 93 transmits a no-operation command when a lock effect described later is being executed.

  The main CPU 93 is connected to a clock pulse generation circuit 96, a frequency divider 97, a random number generator 98, and a sampling circuit 99. The clock pulse generation circuit 96 and the frequency divider 97 generate clock pulses. The main CPU 93 executes a control program based on the generated clock pulse. The random number generator 98 generates a random number in a predetermined range (for example, 0 to 65535). The sampling circuit 99 extracts one value from the generated random numbers.

  The main CPU 93 counts the number of times pulses are output to the stepping motors 51L, 51C, 51R of the reels 3L, 3C, 3R after detecting the reel index. Thereby, the main CPU 93 manages the rotation angle of each reel 3L, 3C, 3R (mainly, how many symbols the reel has rotated).

  The reel index is information indicating that the reel has made one revolution. This reel index is provided at a predetermined position of each of the reels 3L, 3C, 3R, for example, with a light emitting unit and a light receiving unit, and between the light emitting unit and the light receiving unit by the rotation of each reel 3L, 3C, 3R. Detection is performed by a reel position detection unit (not shown) including a detection piece interposed therebetween.

  Here, the management of the rotation angle of each reel 3L, 3C, 3R will be specifically described. The number of pulses output to the stepping motors 51L, 51C, 51R is counted by a pulse counter provided in the main RAM 95. Each time the output of a predetermined number of pulses (for example, 16 times) necessary for the rotation of one symbol is counted by the pulse counter, the symbol counter provided in the main RAM 95 is incremented by one. The symbol counter is provided for each reel 3L, 3C, 3R. The value of the symbol counter is cleared when a reel index is detected by a reel position detector (not shown).

  In other words, in the present embodiment, by managing the symbol counter, it is possible to manage how many symbols have been rotated since the reel index was detected. Therefore, the position of each symbol on each reel 3L, 3C, 3R is detected with reference to the position where the reel index is detected.

  In the present embodiment, the maximum number of sliding symbols is basically set to 4 symbols. Therefore, when the left stop button 17L is pressed, the symbol of the left reel 3L in the middle of the display window 4 and each symbol within the range up to four symbols ahead can be stopped in the middle of the display window 4. It becomes a simple design.

<Sub control circuit>
Next, the sub control circuit 101 constituted by the sub control board 42 will be described with reference to FIG. FIG. 5 is a block diagram illustrating a configuration example of the sub control circuit 101 of the pachislot machine 1.

  As shown in FIG. 5, the sub control circuit 101 is electrically connected to the main control circuit 91, and performs processing such as determination and execution of effect contents based on a command signal transmitted from the main control circuit 91. At the same time, it controls various effect devices such as the liquid crystal display device 11, the shutter device 200, the LED group 25, and the speakers 23L and 23R.

  Specifically, the sub CPU 102 described below constitutes an effect determining unit that determines an effect based on a command transmitted from the main control circuit 91. For example, the sub CPU 102 constitutes an accessory control unit that controls the operation of the shutter based on the determined effect (for details, refer to a shutter control task and various tables referred to by the shutter control task described later).

  The sub-control circuit 101 basically includes a sub CPU (processor) 102, a sub ROM 103, a sub RAM 104, a rendering processor (VDP, GPU, etc.) 105, a drawing RAM 106, a driver 107, and a watchdog timer (hereinafter referred to as “WDT”). ) 108.

  The sub ROM 103 stores a control program for managing production images (videos), sound, light (LED group 25), driving data of the shutter device 200, and communication data.

  In response to the command signal transmitted from the main control circuit 91, the sub CPU 102 controls the output of video, sound, and light and driving of the shutter device 200 in accordance with a control program stored in the sub ROM 103. The sub ROM 103 basically includes a program storage area and a data storage area.

  A control program executed by the sub CPU 102 is stored in the program storage area. For example, in the control program, a main board communication task for controlling communication with the main control circuit 91 and a random number value for production are extracted, and command analysis processing for determining and registering production contents (production data) Is included. Further, the main task and the animation task for controlling the display of images by the liquid crystal display device 11 (see FIG. 2) based on the determined contents of the production, and the raising and lowering and rotation of the shutter members 201, 202, 203, 204 by the shutter device 200 are controlled. For example, a shutter control task for controlling the output of light from a light source such as the LED group 25, a sound control task for controlling output of sound by the speakers 23L and 23R, and the like.

  The data storage area includes a storage area for storing various data tables, a storage area for storing effect data constituting each effect content, and a storage area for storing animation data related to creation of video. Also included are a storage area for storing sound data related to BGM and sound effects, a storage area for storing lamp data related to the light on / off pattern, and the like.

  The sub-RAM 104 is composed of SRAM (Static RAM) and DRAM (Dynamic RAM), and includes various storage areas such as a storage area for registering the determined contents and effects data, and an internal winning combination transmitted from the main control circuit 91. A storage area for storing data is provided.

  The sub CPU 102, the rendering processor 105, the drawing RAM (including the frame buffer) 105, and the driver 107 create a video according to the animation data designated by the contents of the presentation, and display the created video on the liquid crystal display device 11. Further, the sub CPU 102 drives the shutter device 200 in accordance with the accessory movable data designated by the effect contents.

  Further, the sub CPU 102 causes the speakers 23L and 23R to output sounds such as BGM according to the sound data designated by the contents of the production. Further, the sub CPU 102 controls lighting and extinguishing of the LED group 25 according to the lamp data designated by the contents of the effect.

  The WDT 108 is configured by a circuit for monitoring CPU operation, and includes a timer in the circuit. The sub CPU 102 is configured to reset the WDT 108 once every 33 ms, for example. The WDT 108 is configured to time out when a predetermined time (for example, 1 s) longer than 33 ms elapses, and outputs a reset signal to the sub CPU 102 when it is not reset before time-out. As a result, the sub CPU 102 is restarted. Note that the WDT 108 may be built in the sub CPU 102.

<Shutter device>
Next, the shutter device 200 will be described with reference to FIGS. The shutter device 200 takes various modes with respect to the liquid crystal display device 11 by moving the shutter members 201, 202, 203, and 204 up and down and rotating.

  As various modes, a mode in which the liquid crystal display device 11 is exposed (see FIG. 8), a mode in which the liquid crystal display device 11 is shielded (see FIGS. 9 and 11), and a liquid crystal display from the gap between the shutter members 201, 202, 203, and 204. A mode in which the apparatus 11 can be seen (see FIG. 10) and a mode in which the front surfaces 201a, 202a, 203a, 204a and the back surfaces 201b, 202b, 203b, 204b of the shutter members 201, 202, 203, 204 are reversed (see FIG. 11). There is.

  6 and 7 are diagrams showing a configuration of the shutter device 200, and show a process in which the shutter members 201, 202, 203, and 204 are lowered one by one.

  As shown in FIG. 7, the shutter device 200 is provided on the front side of the pachislot machine 1 with respect to the liquid crystal display device 11. In FIG. 7, the left side is the front side of the pachislot machine 1, and the right side is the back side of the pachislot machine 1. Although not shown in FIG. 7, the protective glass 6 (see FIG. 2) is disposed on the front side (left side in the drawing) of the shutter device 200. Therefore, the shutter device 200 is provided between the protective glass 6 and the liquid crystal display device 11 and is disposed closer to the player than the liquid crystal display device 11.

  Here, FIG. 6 is a view of the shutter device 200 as viewed from the back side of the pachislot machine 1, that is, from the liquid crystal display device 11 side.

  As shown in FIGS. 6 and 7, the shutter device 200 includes a shutter base 220, a plurality of (in this embodiment, four) plate-like shutter members 201, 202, 203, and 204, and as lifting means. The lifting / lowering unit 206, the slider mechanism 210, and the rotation mechanism 230 are configured. The number of shutter members is not limited to four, but may be two, three, or five or more.

  The shutter base 220 is formed in a U-shaped plate shape, and is attached to the door main body 9 (see FIG. 2) of the front door 2b via a fastening member (not shown). The shutter base 220 includes an upper piece 221 and a pair of side pieces 222 and 223 that are integrally formed at both ends of the upper piece 221 in the longitudinal direction.

  In the pair of side pieces 222 and 223, elongated holes 222a, 222b, 222c, 223a, 223b, and 223c extending in the longitudinal direction (vertical direction) are formed. A first slider 211 and a second slider 212, which will be described later, are attached to the elongated holes 222a and 223a so as to be slidable in the vertical direction. A third slider 213 (described later) is attached to the elongated holes 222b and 223b so as to be slidable in the vertical direction. Further, a fourth slider 214 described later is attached to the long holes 222c and 223c so as to be slidable in the vertical direction.

  The shutter members 201, 202, 203, and 204 can be moved up and down between a shielding position that shields the liquid crystal display device 11 (position shown in FIG. 9) and an exposed position that exposes the liquid crystal display device 11 (position shown in FIG. 8). It is configured. Here, the exposure position (position shown in FIG. 8) is provided above the shielding position (position shown in FIG. 9).

  In other words, the shutter members 201, 202, 203, 204 are in a standby position that does not block the display area of the liquid crystal display device 11 when in the exposed position, and when operated from the standby position, the liquid crystal display device 11. Is provided so as to block the display area.

  As shown in FIGS. 7 and 12, the elevating unit 206 includes elevating motors 240 </ b> A and 240 </ b> B, a tensioner 241, and a drive belt 242. Although FIG. 7 illustrates the lifting unit 206 on the side piece 223 side of the shutter base 220, the lifting unit 206 is also provided on the side piece 223 of the shutter base 220 (see FIG. 12). That is, as shown in FIG. 12, the lifting unit 206 is provided on each of the left and right sides of the shutter base 220 from the front side to the back side of the pachislot machine 1.

  In the present embodiment, the left and right lifting motors are distinguished as lifting motors 240A and 240B, respectively. In FIG. 7, only the right lifting motor 240B is shown.

  As shown in FIGS. 7 and 12, the lifting motors 240 </ b> A and 240 </ b> B are configured by, for example, stepping motors that can rotate forward and backward. The elevating motors 240A and 240B are fixed inside the cover member 250 (see FIG. 12). The cover member 250 is fixed to the pair of side pieces 222 and 223 of the shutter base 220 so as to cover the lifting unit 206.

  The elevating motors 240A and 240B are configured to rotate the drive pulley 244 by rotating a pinion gear (not shown). The drive pulley 244 is rotatably supported inside the cover member 250 (see FIG. 12). A driving belt 242 is wound around the driving pulley 244.

  The tensioner 241 is attached to the inside of the cover member 250 (see FIG. 12), and has a tension pulley 241a that is always urged downward by a spring (not shown). A driving belt 242 is wound around the tension pulley 241a. Thus, the drive belt 242 is always maintained at a certain tension or higher.

  The drive belt 242 is wound around a drive pulley 244 and a tension pulley 241a, and is driven around by the lift motors 240A and 240B via the drive pulley 244. In addition, a first slider 211 (see FIG. 6) is connected to the drive belt 242.

  As a result, the first slider 211 moves up and down as the drive belt 242 rotates. Of the shutter members 201, 202, 203, and 204, the lowermost shutter member 201 is rotatably supported by the first slider 211.

  Therefore, the lifting / lowering unit 206 moves the lowermost shutter member 201 out of the shutter members 201, 202, 203, and 204 between the shielding position (position shown in FIG. 9) and the exposed position (position shown in FIG. 8). It is something to be made.

  As shown in FIG. 6, the slider mechanism 210 moves the shutter member 202, 203, 204 other than the lowest shutter member 201 in conjunction with the lowermost shutter member 201, thereby blocking the position (position shown in FIG. 9). The lowermost shutter member 201 is connected to the other shutter members 202, 203, and 204 so as to move up and down between the exposure position (the position shown in FIG. 8).

  Specifically, the slider mechanism 210 includes a first slider 211, a second slider 212, a third slider 213, and a fourth slider 214. The first slider 211, the second slider 212, the third slider 213, and the fourth slider 214 support the shutter members 201, 202, 203, and 204 in a rotatable manner.

  As a result, the shutter members 201, 202, 203, and 204 have their respective surfaces 201a, 202a, 203a, and 204a (exposed surfaces in FIG. 9) and the image display surface 11a (see FIG. 7) of the liquid crystal display device 11. The slider mechanism 210 is rotatably supported so as to change the angle formed by.

  The first slider 211 is slidable in the vertical direction along the elongated holes 222a and 223a of the pair of side pieces 222 and 223. A stopper (not shown) that can contact the second slider 212 is formed at the upper end of the first slider 211. The stopper portion regulates a moving range of the first slider 211 relative to the second slider 212 by abutting on upper and lower abutting surfaces (not shown) of the second slider 212 described later.

  As shown in FIG. 6, the second slider 212 is slidable in the vertical direction along the elongated holes 222 a and 223 a of the pair of side piece portions 222 and 223, similarly to the first slider 211.

  As shown in FIG. 7, the second slider 212 is formed with a recess 212 </ b> A that is recessed on the side opposite to the image display surface side (left side in FIG. 7). On the upper and lower inner wall surfaces of the recess 212A, a contact surface with which the stopper portion of the first slider 211 can contact is formed.

  FIG. 6 shows a state where the first slider 211 and the second slider 212 overlap each other in the front-rear direction of the pachislot machine 1 (a direction perpendicular to the paper surface in FIG. 6). Accordingly, in FIG. 6, the stopper portion of the first slider 211 and each contact surface of the second slider 212 are moved by the relative sliding of the first slider 211 and the second slider 212. The back sides of the two sliders 212 are configured to contact each other.

  As shown in FIG. 6, the upper end portion of the second slider 212 is provided with an inner stopper portion 212c and an outer stopper portion 212d that protrude in the left-right direction orthogonal to the up-down direction (left-right direction in FIG. 6), respectively. It has been.

  The inner stopper portion 212c regulates the moving range of the second slider 212 relative to the third slider 213 by abutting on upper and lower abutting surfaces 213a and 213b of the third slider 213 described later. On the other hand, the outer stopper portion 212d regulates the movement range of the second slider 212 relative to the fourth slider 214 by abutting on upper and lower abutment surfaces 214a and 214b of the fourth slider 214 described later. .

  The third slider 213 is slidable in the vertical direction along the elongated holes 222b and 223b of the pair of side pieces 222 and 223. The third slider 213 is formed with a recess 213A that is recessed on the image display surface side (right side in FIG. 7). Abutting surfaces 213a and 213b with which the inner stopper portion 212c of the second slider 212 can abut are formed on the upper and lower inner wall surfaces of the recess 213A.

  The fourth slider 214 is slidable in the vertical direction along the elongated holes 222c and 223c of the pair of side pieces 222 and 223. The fourth slider 214 is formed with a recess 214A that is recessed on the image display surface side (right side in FIG. 7). On the upper and lower inner wall surfaces of the recess 214A, contact surfaces 214a and 214b with which the outer stopper portion 212d of the second slider 212 can contact are formed.

  Here, the operation of the slider mechanism 210 described above when the shutter members 201, 202, 203, and 204 are lowered will be described with reference to FIGS.

  First, as shown in FIG. 8, when the lowermost shutter member 201 at the exposure position is lowered by the lifting unit 206, the other shutter members 202, 203, and 204 follow the lowermost shutter member 201 by their own weight. And descend.

  At this time, as shown in FIG. 6, first, the fourth slider 214 hits the lowermost part of the long holes 222c and 223c, and further downward movement is restricted. At this time, the upper contact surface of the second slider 212 is in contact with the stopper portion at the upper end of the first slider 211. The inner stopper portion 212 c of the second slider 212 is in contact with the contact surface 213 a of the third slider 213.

  Next, the third slider 213 strikes the bottom of the long holes 222b and 223b, and further downward movement is restricted. At this time, the contact of the inner stopper portion 212c of the second slider 212 with the contact surface 213a of the third slider 213 is eliminated.

  Next, the inner stopper portion 212c of the second slider 212 comes into contact with the contact surface 213b of the third slider 213, and further downward movement of the second slider 212 is restricted. At this time, the outer stopper portion 212 d of the second slider 212 comes into contact with the contact surface 214 b of the fourth slider 214.

  Finally, the first slider 211 hits the lowermost part of the long holes 222a and 223a, and further downward movement is restricted. At this time, the stopper portion at the upper end of the first slider 211 comes into contact with the lower contact surface of the second slider 212. Accordingly, as shown in FIG. 9, the shutter members 201, 202, 203, and 204 are stopped at the shielding position.

  On the other hand, when the lowermost shutter member 201 at the shielding position (position shown in FIG. 9) is raised by the elevating unit 206, first, the stopper portion at the upper end portion of the first slider 211 is moved to the upper portion of the second slider 212. Contact the contact surface.

  Next, the second slider 212 is pushed up by the first slider 211. Subsequently, when the second slider 212 rises together with the first slider 211, the inner stopper portion 212 c of the second slider 212 comes into contact with the contact surface 213 a of the third slider 213.

  Thereafter, the third slider 213 is pushed up by the second slider 212. Subsequently, when the third slider 213 rises together with the first slider 211 and the second slider 212, the outer stopper portion 212 d of the second slider 212 comes into contact with the contact surface 214 a of the fourth slider 214.

  Next, the fourth slider 214 is pushed up by the second slider 212. Subsequently, when the fourth slider 214 rises together with the first slider 211, the second slider 212, and the third slider 213, the fourth slider 214 hits the uppermost portion of the elongated hole 223c, and further rises. Be regulated. Accordingly, the shutter members 201, 202, 203, and 204 are stopped at the exposure position (position shown in FIG. 8).

  Here, as shown in FIG. 8, when the shutter members 201, 202, 203, and 204 are raised to the exposure positions by the elevating unit 206, the respective surfaces 201 a, 202 a, 203 a, and 204 a (see FIG. 9). In a state where they are rotated upward, they are superimposed on each other and accommodated in the space on the back side of the upper exterior member 7a.

  The shutter members 201, 202, 203, 204 have rotation shafts (not shown) at both ends in the longitudinal direction, and these rotation shafts are rotatably supported by the first slider 211 to the fourth slider 214. ing. Accordingly, the shutter members 201, 202, 203, and 204 are configured to be rotatable.

  In addition, a rotating body (not shown) can rotate integrally with at least one end of each rotation shaft of the shutter members 201, 202, 203, and 204 (in this embodiment, the end on the side piece 222 side). Is attached. This rotating body can be engaged with an engaging member (not shown) of a rotating mechanism 230 described later.

  The rotation range of the above-described rotating body is approximately 180 °. Thereby, the shutter members 201, 202, 203, and 204 can reverse the front surfaces 201a, 202a, 203a, and 204a and the back surfaces 201b, 202b, 203b, and 204b, respectively. Note that the above-described rotating body is restricted by the first slider 211 to the fourth slider 214 so that the rotation range is approximately 180 °. For example, the rotation range of the rotating body is restricted by a part of the rotating body engaging with protrusions provided on the first slider 211 to the fourth slider 214.

  Further, the shutter members 201, 202, 203, and 204 are in a shielding position (position shown in FIG. 9) by an urging member (for example, a rewind type torsion spring or the like) provided between the rotating bodies and the sliders. The front surfaces 201a, 202a, 203a, 204a are always urged so as to be parallel to the image display surface 11a with the front side of the pachislot machine 1 facing forward.

  On the other hand, at the exposed position (position shown in FIG. 8), the shutter members 201, 202, 203, and 204 are folded on each other with the surfaces 201a, 202a, 203a, and 204a facing upward against the urging force of the urging member. Thus, it is accommodated in the space on the back side of the upper exterior member 7a.

  The rotation mechanism 230 is configured such that when the shutter members 201, 202, 203, 204 are in the shielding position, the shutter members 201, 202, 203, 204 are in the state shown in FIG. 9, the state shown in FIG. 10, and the state shown in FIG. The shutter members 201, 202, 203, and 204 are rotated so as to be in any one of the states.

  Here, the state shown in FIG. 9 is a state in which the liquid crystal display device 11 is shielded with the surfaces 201a, 202a, 203a, 204a of the shutter members 201, 202, 203, 204 facing the front side of the pachislot machine 1. is there.

  The state shown in FIG. 10 is a state in which the surfaces 201a, 202a, 203a, 204a of the shutter members 201, 202, 203, 204 are stopped at an angle orthogonal to the image display surface 11a of the liquid crystal display device 11. That is, the state shown in FIG. 10 is a state in which the shutter members 201, 202, 203, and 204 are in a half-open state, and the image display surface 11a is visible from the gap between the shutter members.

  The state shown in FIG. 11 is a state in which the liquid crystal display device 11 is shielded with the back surfaces 201b, 202b, 203b, 204b of the shutter members 201, 202, 203, 204 facing the front side of the pachislot machine 1.

  As shown in FIG. 6, the rotation mechanism 230 includes a rotation motor 231 as a drive unit, a rack portion (not shown) that meshes with a pinion gear of the rotation motor 231, and an engagement member (not shown).

  As shown in FIG. 6, the rotary motor 231 is attached to the base member 238 below the side piece 222 of the shutter base 220. The base member 238 is fixed to the door body 9 via a fastening member (not shown).

  The rotation motor 231 is configured by, for example, a stepping motor capable of adjusting the rotation angle and rotating forward and backward. A pinion gear (not shown) is attached to the drive shaft of the rotary motor 231 so as to be integrally rotatable.

  In the present embodiment, the stepping motors used as the lifting motors 240A and 240B and the rotary motor 231 are two-phase excitation types, but are not limited to this, a one-phase excitation type, a one- and two-phase excitation type, Alternatively, it may be a micro-step drive type, and may be a servo motor, a reluctance motor, or a coreless motor as long as the rotation angle can be adjusted and forward / reverse rotation is possible.

  Although not shown, the rack portion is composed of a long member along the extending direction (vertical direction in FIG. 6) of the side piece portion 222, and according to the rotation of the pinion gear of the rotary motor 231. It can move up and down.

  The rack portion is provided with four engaging members that can engage with the rotating members of the shutter members 201, 202, 203, and 204 at predetermined intervals in the vertical direction. These engaging members are engaged with the rotating members of the shutter members 201, 202, 203, and 204 when the shutter members 201, 202, 203, and 204 are lowered to the shielding position (position shown in FIG. 9). It has become.

  Moreover, each engaging member is comprised so that it may rotate with the movement to the up-down direction of a rack part. For example, by engaging the gear portion formed on each engaging member with the gear portion formed on the rack portion, each engaging member can be rotated as the rack portion moves.

  The rotation mechanism 230 configured as described above can rotate the engagement member by 180 ° by moving the rack portion in the vertical direction by driving the rotation motor 231 and can rotate the rotation motor 231 by a predetermined number of steps. By driving only the engagement member, the engagement member can be rotationally driven by a predetermined drive amount.

  Therefore, the rotation mechanism 230 rotates the engagement member 180 degrees in the forward and reverse directions by driving the rotation motor 231, so that the front surfaces 201 a, 202 a, 203 a, 204 a and the rear surface of the shutter members 201, 202, 203, 204 are rotated. The shutter members 201, 202, 203, 204 can be rotated at the shielding position so that 201b, 202b, 203b, 204b are reversed.

  In addition, the rotation mechanism 230 rotates the engagement member by a predetermined drive amount (for example, 90 °) by driving the rotation motor 231, thereby allowing the surfaces 201a, 202a, 203a, 204a of the shutter members 201, 202, 203, 204 to rotate. The shutter members 201, 202, 203, and 204 can be stopped at an angle orthogonal to the image display surface 11a (see FIG. 10).

  Here, the raising / lowering and rotation of the shutter members 201, 202, 203, 204 as described above are detected by the origin sensor 270, the lowering sensor 271 and the rotation sensor 272, respectively.

  The origin sensor 270 is disposed above the side piece 223 of the shutter base 220, and is composed of, for example, a transmissive photosensor. The origin sensor 270 detects that the shutter member 201, 202, 203, 204 is at the origin, that is, the exposure position (position shown in FIG. 8) by detecting the upper end of the fourth slider 214.

  The lowering sensor 271 is disposed below the side piece 222 of the shutter base 220, and is configured by, for example, a transmissive photosensor, like the origin sensor 270. The lowering sensor 271 detects the lower end of the first slider 211, thereby detecting that the shutter members 201, 202, 203, and 204 are lowered, that is, at the shielding position (position shown in FIG. 9).

  The rotation sensor 272 is disposed in the vicinity of the lower portion of the side piece 222 of the shutter base 220, and is configured by, for example, a transmissive photosensor, similar to the origin sensor 270 and the lowering sensor 271. The rotation sensor 272 detects a detection piece (not shown) formed in the rack portion of the rotation mechanism 230, so that the shutter members 201, 202, 203, and 204 are not rotated (the state shown in FIG. 9), that is, the rotation. Detect that it is at the origin. In the present embodiment, in addition to the detection piece for detecting the rotation origin, the rack member is in a state where the shutter members 201, 202, 203, 204 are inverted (the state shown in FIG. 11). A detectable detection piece is provided.

  The origin sensor 270, the lowering sensor 271 and the rotation sensor 272 described above are not limited to transmissive photosensors, but may be reflective photosensors or sensors other than photosensors such as microswitches. Also good.

  Next, a structure for causing the shutter members 201, 202, 203, and 204 to emit light will be described with reference to FIG.

  As shown in FIG. 12, the shutter device 200 includes a light irradiation device 400 as a light irradiation unit that irradiates light to the shutter members 201, 202, 203, and 204 from the side. Two are provided at both ends in the longitudinal direction. Moreover, these light irradiation apparatuses 400 are being fixed to the side piece parts 222 and 223 of the shutter base 220 via the support member 400a, respectively.

  The light irradiation device 400 includes four LEDs 401, 402, 403, and 404 arranged in the vertical direction corresponding to the shutter members 201, 202, 203, and 204, respectively. The LEDs 401, 402, 403, and 404 are included in the LED group 25 (see FIG. 3) described above.

  Further, the shutter members 201, 202, 203, and 204 are provided with a decoration 500 on at least a part of one surface (in this embodiment, the back surfaces 201b to 204b). The decoration 500 is drawn in an arbitrary shape, and is not particularly limited to the shape shown in FIG.

  Concavities and convexities that reflect the light emitted from the LEDs 401, 402, 403, and 404 toward the front surface side of the pachislot machine 1 (see FIG. 2) are formed at the locations where the decorations 500 of the back surfaces 201b to 204b are applied. . The unevenness has an inclined surface on which light emitted from the LEDs 401, 402, 403, 404 can be reflected toward the front side of the pachislot machine 1.

  Moreover, in this Embodiment, LED401,402,403,404 is installed in the light irradiation apparatus 400 in the inclined state so that light may be irradiated with a predetermined angle with respect to the uneven inclined surface. Here, the installation angles of the LEDs 401, 402, 403, and 404 are angles at which the inclined surface can be irradiated with irradiation light such that the light reflected by the inclined surface is directed to the front surface side of the pachislot machine 1. More strictly, it is preferable to set the installation angle of the LEDs 401, 402, 403, 404 and the angle of the inclined surface in consideration of the incident angle and the reflection angle with respect to the inclined surface of the LEDs 401, 402, 403, 404.

[RT gaming state transition]
As shown in FIG. 13, the pachislot machine 1 has “RT0 gaming state”, “RT1 gaming state”, “RT2 gaming state”, “RT3 gaming state”, “RT4” as RT gaming states controlled by the main CPU 93. There are “game state” and “RT5 game state”.

  The “RT0 gaming state” and “RT1 gaming state” are replay low probability states in which the internal winning probability of the internal winning combination relating to replaying is low. The “RT2 gaming state” is a replaying probability state in which the internal winning probability of the internal winning combination relating to replay is higher than the “RT0 gaming state” and the “RT1 gaming state”. On the other hand, “RT3 gaming state”, “RT4 gaming state”, and “RT5 gaming state” are replay high probability states in which the internal winning probability of the internal winning combination relating to re-gaming is higher than “RT2 gaming state”.

  The RT gaming state is shifted between “RT0 gaming state”, “RT1 gaming state”, “RT2 gaming state”, “RT3 gaming state”, “RT4 gaming state”, and “RT5 gaming state” when a predetermined condition is established. The

  For example, when the setting is changed, the RT gaming state shifts to “RT0 gaming state”. In the “RT0 gaming state”, when any combination of “RT1 transition_1” to “RT1 transition_3” is displayed along the active line, the RT gaming state transitions to the “RT1 gaming state”.

  Further, in the “RT1 gaming state”, when any combination of “RT2 transition lip_1” to “RT2 transition lip_3” is displayed along the active line, the RT gaming state is changed to “RT2 gaming state”. Transition. On the other hand, in the “RT1 gaming state”, when any combination of “RT5 transition lip_1” to “RT5 transition lip_16” is displayed along the active line, the RT gaming state becomes “RT5 gaming state”. Transition.

  Further, in the “RT2 gaming state”, when any combination of “RT3 transition lip_1” to “RT3 transition lip_16” is displayed along the active line, the RT gaming state is changed to “RT3 gaming state”. Transition.

  Further, in the “RT3 gaming state”, when any combination of “RT4 transition lip_1” to “RT4 transition lip_13” is displayed along the active line, the RT gaming state is changed to “RT4 gaming state”. Transition. Furthermore, in the “RT3 gaming state”, when any combination of “RT5 transition lip_1” to “RT5 transition lip_16” is displayed along the active line, the RT gaming state becomes “RT5 gaming state”. Transition.

  Also, in the “RT4 gaming state” and “RT5 gaming state”, when any combination of “RT3 transition lip_1” to “RT3 transition lip_16” is displayed along the active line, the RT gaming state is Transition to “RT3 gaming state”.

  Also, in “RT1 gaming state”, “RT4 gaming state” and “RT5 gaming state”, any combination of “RT0 lip”, “middle right pressing role_1” to “middle right pressing role_8” is effective When displayed along the line, the RT gaming state shifts to “RT0 gaming state”.

  Further, in the “RT2 gaming state” to “RT5 gaming state”, when any combination of “RT1 transition_1” to “RT1 transition_3” is displayed along the active line, the RT gaming state is “RT1. “Game state”.

  In this way, the main CPU 93 constitutes a game state transition means for shifting the RT game state between a plurality of RT game states 0 to 5 having different winning probabilities of the re-game act (replay role).

[Game state of sub-control circuit]
As described above, while the RT game state is shifted by the main CPU 93, the sub CPU 102 determines the content of the effect, thereby notifying the stop operation of the reels 3L, 3C, 3R, thereby playing an internal winning combination. Winning or non-winning is advantageous to the player, or RT gaming machines are transferred.

  Here, a state in which the sub CPU 102 notifies the stop operation of the reels 3L, 3C, and 3R so as to favorably or non-winner the internal winning combination is called “AT”. A state in which the RT state is an AT state and the replay high probability state is referred to as “ART”.

  Therefore, during ART, it is possible to win an internal winning combination so that the number of winnings is increased without inserting medals. Therefore, as the number of games (number of games) of ART increases, more medals are awarded. Can be earned. For this reason, in the pachislot machine 1 of the present embodiment, adding the number of games as the number of granted ARTs (also referred to as “addition”) greatly affects medal acquisition.

  The pachislot machine 1 according to the present embodiment, in addition to the general ones, has a high ART probability, during ART, pseudo BB high probability, pseudo BB, normal return waiting, extra game, and extra selection (also referred to as “selected game”). Take a game state.

  The high probability of ART is a special gaming state in which the degree of expectation for ART is higher than the general gaming state, that is, it is easy to shift to ART. This high ART probability is transferred by the sub CPU 102 when a predetermined condition is satisfied, for example, when a predetermined number of games (for example, 600 games) have been consumed since the end of the previous ART. In this way, the sub CPU 102 constitutes a special game state transition unit.

  During a high probability of ART, in a game that does not win any internal winning combination (hereinafter referred to as “out-of-game”), is a lock that invalidates a player's game operation for a predetermined period of time performed in the next game (next game)? No is determined by the main CPU 93 by lottery.

  In addition, during a high probability of ART, a specific stop operation sequence (for example, right press) for displaying a combination of a predetermined special symbol (in this embodiment, “蝙蝠”) on the active line in the off-line game. Whether or not to notify is determined by the sub CPU 102 by lottery and notified. Thus, the sub CPU 102 constitutes notification determination means and stop operation order notification means.

  Furthermore, during the high probability of ART, the special operation during the next game is locked on the condition that the combination of special symbols is not displayed on the effective line as a result of the stop operation in the specific stop operation sequence described above. The main CPU 93 performs an outlier reel action (effect during locking) in which at least one of the reels 3L, 3C, 3R is rotated so that the symbol combination is displayed on the active line. In this way, the main CPU 93 constitutes a locking effect unit.

  If the sub CPU 102 does not win the ART during the high probability of ART, the sub CPU 102 performs the special mode transition lottery with a predetermined probability. When the gaming state shifts to the special mode, the sub CPU 102 increases the ART high probability until the ART is won. You may make it transfer repeatedly.

  Further, the sub CPU 102 shifts to an ART ultra-high probability that has a higher degree of expectation for ART than the ART high probability with a predetermined winning probability, and during the ART ultra-high probability, each time a small role is internally won, an ART transition point is set. While adding, it is also possible to maintain the number of remaining games with an ART super high probability. At this time, if the ART transition point reaches a predetermined value before the end of the ART super high probability, the sub CPU 102 determines that the transition to the ART is performed.

  The pseudo BB high probability shifts when a predetermined condition is satisfied, for example, when a lottery for winning a specific internal winning combination is won, and when the number of waiting games within a predetermined number of games has elapsed. For the pseudo BB high probability, 10 games, 20 games and an infinite game are selected by lottery at the time of winning.

  Even if 10 games or 20 games are selected as the number of games with a high probability of pseudo BB, an extra lottery is performed on the number of games with a high probability of pseudo BB during the high probability of pseudo BB. When the number of games with a high probability of pseudo BB exceeds 20 games due to this extra lottery, an infinite game is selected as the number of games with a high probability of pseudo BB, and each game is added to the number of games of ART.

  When an infinite game is selected as the number of games with a high probability of pseudo BB, the high probability of pseudo BB continues until the transition to the pseudo BB. That is, it is determined to shift to the pseudo BB. When the sub CPU 102 determines a combination that can display a combination such as RT5 transition lip 1 to RT5 transition lip_16 along the active line during the pseudo BB high probability as an internal winning combination, the sub CPU 102 transitions to the pseudo BB with a relatively high probability. The notification for making it perform is performed.

  The pseudo BB is a mode that is shifted when the RT gaming state changes from another RT gaming state to the RT5 gaming state. Compared to during ART, pseudo BB is more likely to add ART depending on the internal winning combination, and the number of games added is also relatively large.

  While waiting for a normal return, this is a mode for shifting the sub gaming state to the general state when the RT gaming state becomes a replaying probability of the RT2 gaming state or less from the high replaying probability of RT3 or higher, or the replaying low probability. Further, when the secondary gaming state shifts to waiting for normal return, ART pull-back lottery is performed while waiting for normal return, and it is determined according to the lottery result whether the ART restarts or shifts to general.

  The extra game is a mode in which the transition is made when the RT gaming state changes from the RT3 gaming state or the RT5 gaming state to the RT4 gaming state. The extra game stocks the number of executions of the extra selection.

  The extra selection is executed at the time of locking after one unit game when the number of executions of the extra selection is stocked in the RT3 gaming state or the RT5 gaming state. When the additional selection is executed, the sub CPU 102 causes the liquid crystal display device 11 to prevent the number of additional games from being identified by a plurality of elements associated with the additional number of ARTs as in the selection game screen shown in FIG. Are randomly arranged in the first area (first display state), and the number of elements associated with the number of additional games in the ART is displayed in the second area of the liquid crystal display device 11 for each additional game number. Is displayed. Thus, the sub CPU 102 constitutes a display control unit.

  That is, in FIG. 162, 13 elements associated with the number of additional games of 10 games, one element associated with the number of additional games of 100 games, and the number of additional games of 300 games are associated with each other. This means that the one element displayed is randomly arranged and displayed.

  In addition, depending on the state when winning the selection, it is displayed so that the number of added games associated with at least one element among a plurality of elements can be identified as in the selection game screen shown in FIG. 163 In some cases, as in the selection game screen shown in FIG. 164, the number of added games associated with all the elements is displayed so as to be identified (second display state).

  The elements arranged in the first region of the liquid crystal display device 11 are selected by, for example, the stop buttons 17L, 17C, and 17R, and are determined by the MAX bet button 14. Thus, the stop buttons 17L, 17C, 17R and the MAX bet button 14 constitute a selection unit.

  Further, the sub CPU 102 determines the number of added games associated with the element selected by the selection means as the number of added games of ART. In this way, the sub CPU 102 arranges the elements randomly arranged in association with the ART added game number as in the selection game screen shown in FIG. 162 displayed on the liquid crystal display device 11. Therefore, a first lottery process (see FIGS. 141 and 142), which will be described later, is referred to an ART extra selection lottery table (see FIGS. 58 and 59), which will be described later, 144 and 145), an additional selection payout table (see FIG. 56), which will be described later, is referred to, and an advantageous grant number is determined by a lottery process (see FIGS. 147 and 148), which is described later. The grant number determining means is configured.

  As shown in FIG. 162, in a state where a plurality of elements associated with the number of additional games of ART are displayed so that the number of additional games cannot be identified, the sub CPU 102 performs a predetermined operation (selection button 18 or determination button). An element may be selected at random from among a plurality of elements on the condition that 19 is pressed.

  In addition, as shown in FIG. 162, in a state where a plurality of elements associated with the number of additional games of ART are displayed so that the number of additional games cannot be identified, the sub CPU 102 performs a predetermined operation (selection button 18 or On the condition that the determination button 19 is pressed), an average of the number of games respectively associated with a plurality of elements may be determined as the number of additions of the number of ART games.

  In addition, as shown in FIG. 164, in a state where the number of added games associated with all the elements is displayed so as to be identified, the sub CPU 102 performs a predetermined operation (pressing the selection button 18 or the decision button 19). Etc.), the most advantageous element for the player may be selected from a plurality of elements.

  When one element is selected by the operation by these selection means, as shown in the selection game screen shown in FIG. 165, the number of added games associated with each element is displayed so that each element can be identified. The number of games associated with is added to the ART.

  Further, the sub CPU 102 drives the shutter device 200 so as to rotate the shutter until it is half-opened after the shutter is lowered in a state where the selection game screen as shown in FIG. 162 is displayed on the liquid crystal display device 11, for example. At this time, the sub CPU 102 may preferentially redisplay the elements displayed on the liquid crystal display device 11.

  For example, the sub CPU 102 associates all the elements associated with the number of additional games with ART with all the elements before the shutter is half-opened from the state where the number of additional games is displayed so as not to be identified. You may make it display again on the liquid crystal display device 11 in the state displayed so that each added game number could be identified.

[Data table stored in main ROM]
14 to 44 show various data tables stored in the main ROM 94.

<Pattern arrangement table>
The symbol arrangement table shown in FIG. 14 represents the arrangement of symbols arranged on the surface of each of the left reel 3L, the middle reel 3C, and the right reel 3R. The symbol arrangement table defines the correspondence between 21 symbol positions “0” to “20” and symbols corresponding to these symbol positions.

  Symbol positions “0” to “20” indicate the positions of symbols arranged along the rotation direction in each of the left reel 3L, the middle reel 3C, and the right reel 3R. The symbols corresponding to the symbol positions “0” to “20” can be specified by referring to the symbol arrangement table using the value of the symbol counter.

  The types of symbols are “Card”, “Red 7”, “蝙蝠”, “Watermelon 1”, “Bell”, “Replay”, “Cherry 1”, “Watermelon 2”, “Cherry 2” and “BAR”. Is included.

  Here, “watermelon 1” and “watermelon 2” need only be identifiable as having different symbols internally by the main CPU 93, and in this embodiment, the player can recognize them as the same symbols. Design. Similarly, “cherry 1” and “cherry 2” need only be identifiable by the main CPU 93 as internally different symbols, and in the present embodiment, the same symbol and the symbol that the player can recognize respectively. And

<Design code table>
As shown in FIG. 15, each symbol arranged on each reel 3L, 3C, 3R is specified by a symbol code table, and is distinguished by 1 byte (8 bits) data in this embodiment. The symbol code table shown in FIG. 15 represents symbol codes as data for specifying symbols arranged on the surfaces of the three reels 3L, 3C, 3R.

  For example, the symbol arrangement table shown in FIG. 14 has been described as representing the arrangement of symbols arranged on the surface of each of the left reel 3L, the middle reel 3C, and the right reel 3R, but is actually stored in the main ROM 94. The symbol arrangement table shows the arrangement of symbol codes for identifying symbols arranged on the surfaces of the left reel 3L, the middle reel 3C and the right reel 3R.

  In the present embodiment, the symbols used in the pachislot machine 1 are “card”, “red 7”, “蝙蝠”, “watermelon 1”, “bell”, “replay”, “cherry 1”, “cherry”, as described above. There are 10 types of "Watermelon 2", "Cherry 2" and "BAR".

  In the symbol code table, “1” is assigned as the symbol code for the “card” symbol. Also, “2” is assigned as the symbol code for the “red 7” symbol. Also, “3” is assigned as the symbol code for the “蝙蝠” symbol.

  Similarly, “4” to “10” are assigned as symbol codes for the symbols “watermelon 1”, “bell”, “replay”, “cherry 1”, “watermelon 2”, “cherry 2”, and “BAR”. It has been.

<Design combination table>
The symbol combination table shown in FIG. 16 and FIG. 17 is a combination of symbols identified by the storage area identification data represented by 22 bytes (hereinafter referred to as “combination”) and a combination displayed on the effective line. The number of medals paid out is associated. In the symbol combination table shown in FIGS. 16 and 17, a name and a simple description (remarks) are given to each combination in order to make the invention easy to understand.

  For example, when the combination of “Replay-Replay-Red 7” called “RT1 transition_1” is displayed along the active line, the winning combination is “losing”, so no medal is paid out. The RT gaming state transitions to the RT1 gaming state. “RT1 transition_2” and “RT1 transition_3” are the same as “RT1 transition_1”.

  When a combination of “Replay-Replay-Bell” called “MB” is displayed along the active line, the medal is not paid out, but the MB is activated. That is, when “MB” is displayed along the active line, the main gaming state shifts to the MB operating state.

  When a combination of “Replay-Replay-Replay” called “Lip without transition” is displayed along the active line, the replay is activated and the RT gaming state is maintained.

  When a combination of “蝙蝠-蝙蝠-蝙蝠” called “Symbol Lip_1” is displayed along the active line, the re-game is activated. “Symbol Lip — 2” to “Symbol Lip — 12” are the same as “Symbol Lip — 1”.

  When the combination of “bell-bell-red 7” called “RT2 transition lip_1” is displayed along the active line, the re-game is activated and the RT gaming state is shifted to the RT2 gaming state. “RT2 transition lip_2” and “RT2 transition lip_3” are the same as “RT2 transition lip_1”.

  When the combination of “watermelon 1-replay-BAR” called “RT3 transition lip_1” is displayed along the active line, the re-game is activated and the RT gaming state is shifted to the RT3 gaming state. “RT3 transition lip_2” to “RT3 transition lip_16” are the same as “RT3 transition lip_1”.

  When the combination of “watermelon 1-bell-bell” called “RT4 transition lip_1” is displayed along the active line, the re-game is activated and the RT gaming state is shifted to the RT4 gaming state. “RT4 transition lip_2” to “RT4 transition lip_13” are the same as “RT4 transition lip_1”.

  When the combination of “bell-card-BAR” called “RT5 transition lip_1” is displayed along the active line, the re-game is activated and the RT gaming state is shifted to the RT5 gaming state. “RT5 transition lip_2” to “RT5 transition lip_16” are the same as “RT5 transition lip_1”.

  When a combination of “REPLAY-BAR-BAR” called “BAR TEMP_1” is displayed along the active line, the replay is activated. “BAR TEMP_2” is the same as “BAR TEMP_1”.

  When the combination of “watermelon 1-cherry 1-bell” called “middle chelip_1” is displayed along the active line, the re-game is activated. “Medium Chelip_2” to “Medium Chelip_11” are the same as “Medium Chelip_1”.

  When a combination of “red 7-red 7-red 7” called “7 lip_RT5 — 01” is displayed along the active line, the re-game is activated and the RT gaming state is shifted to the RT 5 gaming state. “7 Lip_RT5_02” to “7 Lip_RT5_06” are the same as “7 Lip_RT5_01”.

  When the combination of “Red 7-Replay-Bell” called “7 Lip_No Transition_1” is displayed along the active line, the re-game is activated, but the transition of the RT gaming state is not performed. “7 Lip_no transition_2” to “7 Lip_no transition_3” is the same as “7 Lip_no transition_1”.

  When a combination of “bell-bell-bell” called “middle bell” is displayed along the active line, nine medals are paid out. When a combination of “replay-bell-replay” called “bell_cross down” is displayed along the active line, 14 medals are paid out.

  When a combination of “watermelon 1-bell replay” called “Bell_Oyama_1” is displayed along the active line, 13 medals are paid out. “Bell_Oyama_2” is the same as “Bell_Oyama_1”.

  When a combination of “Replay-Bell-Red 7” called “Bell_Small V_1” is displayed along the active line, 14 medals are paid out. “Bell_Small V_2” and “Bell_Small V_3” are the same as “Bell_Small V_1”.

  When a combination of “watermelon 1-bell-BAR” called “bell_cross-up_1” is displayed along the active line, 13 medals are paid out. “Bell_cross-up_2” to “Bell_cross-up_8” are the same as “Bell_cross-up_1”.

  When a combination of “Replay-Watermelon 1-Red 7” called “upper bell_A_1” is displayed along the active line, one medal is paid out. “Upper bell_A_2” and “Upper bell_A_3” are the same as “Upper bell_A_1”.

  When a combination of “Replay-Watermelon 2-Red 7” called “Upper Bell_B_1” is displayed along the active line, one medal is paid out. "Upper bell_B_2" and "Upper bell_B_3" are the same as "Upper bell_B_1".

  When a combination of “Replay-Cherry 2-Red 7” called “upper bell_1” is displayed along the active line, one medal is paid out. "Upper bell_2" and "Upper bell_3" are the same as "Upper bell_1".

  When a combination of “Bell-Cherry 1-BAR” called “upper watermelon_1” is displayed along the active line, four medals are paid out. “Upper watermelon_2” is the same as “Upper watermelon_1”.

  When the combination of “watermelon 1-replay-bell” called “middle right-handed use_1” is displayed along the active line, one medal is paid out and the RT gaming state is changed to the RT0 gaming state. Transition. The “middle right pressing role_2” to “middle right pressing role_8” are the same as the “middle right pressing role_1”.

  When a combination of “red 7-BAR- 蝙蝠” called “single winning combination A” is displayed along the active line, one medal is paid out. “One-piece combination B” and “one-piece combination C” are the same as “one-piece combination A”.

  When a combination of “BAR-watermelon 1-BAR” called “Che A_1” is displayed along the active line, one medal is paid out. “Che A_2” to “Che A_31” are the same as “Che A_1”.

  When a combination of “watermelon 2-cherry 1-BAR” called “Che B_1” is displayed along the active line, one medal is paid out. “Che B_2” to “Che B_19” are the same as “Che B_1”.

<Combination table by flag>
The flag-specific combination tables shown in FIGS. 18 and 19 show combinations that are permitted to be displayed on the active line in correspondence with the internal winning combination. As the internal winning combination in the present embodiment, “MB”, “Migration No Lip A”, “Migration No Lip B”, “SB Lip 1”, “SB Lip 2”, “SB Tempe”, “RT2 Lip 2nd” ”,“ RT2 Lip 3rd ”,“ RT2K Lip 1st ”,“ RT3 Lip 2nd ”,“ RT3 Lip 3rd ”,“ K_K_RT4 ”,“ 7_RT4_K ”,“ 77_RT4_K ”,“ 7_K_77 ”,“ 77_K_7 ”,“ Reach_Reach ” _K "," Unquestioned 7 "," Unquestioned 77 "," Unquestioned Tempai "," RT4 Transition A "," RT4 Transition B "," BAR Ten "," Medium Chelip "," Medium Che BAR Lip "," RT4K Lip “1st”, “RT4K Lip 2nd”, “RT4K Lip 3rd”, “RT5K Lip 1st”, “Confirmed Bell”, “Strong Bell”, “Medium Correct Bell”, “Right 312 Correct Bell” There is a "right 321 correct bell", "watermelon", "chance eyes A", "chance eyes B", "chance eyes C", "weak cherry" and "strong cherry".

  For example, when the internal winning combination is “MB”, the main CPU 93 permits the combination of “MB” to be displayed on the active line. That is, when the internal winning combination is “MB”, it indicates that the MB is won internally.

  Similarly, when the internal winning combination is “SB Lip 1”, the main CPU 93 sets the combination of “No Transition Lip”, “RT0 Lip” and “Symbol Lip_1” to “Symbol Lip_6” on the effective line. It is allowed to be displayed.

  When the internal winning combination is “RT4 transition A”, the main CPU 93 displays the combination of “no transition lip” and “RT4 transition lip_1” to “RT4 transition lip_13” on the active line. Allow.

  When the internal winning combination is “confirmed bell”, the main CPU 93 performs “Bell_Crossdown”, “Bell_Oyama_1” to “Bell_Oyama_2”, “Bell_Small V_1” to “Bell”. “Small V_3” and “Bell_Cross Up_1” to “Bell_Cross Up_8” are allowed to be displayed on the active line.

<Internal lottery table>
The plurality of internal lottery tables shown in FIG. 20 to FIG. 31 are stored in the main ROM 94 corresponding to each gaming state and each inserted number, and indicate the winning probability of each flag with 65536 as the denominator for each setting 1-6. Yes. In particular, in the present embodiment, an internal lottery table when the number of inserted sheets is “3” will be described.

  Here, FIG. 20 to FIG. 25 show internal lottery tables when three RT gaming states are multiplied when the main gaming state is in the general gaming state other than the MB gaming state. For example, in the case of setting 1 in FIG. 20, the probability of “out” is “33502/65536”, the probability that “MB” wins internally is “3930/65536”, and “no transition Lip A” is internal. The probability of winning is “8431/65536”, and the probability that “confirmed bell” wins internally is “1/65536”. “Medium correct answer bell”, “Right 312 correct answer bell” and “Right 321 correct answer bell” The probability of winning internally is “5579/65536”, and the probability of “strong cherry” winning internally is “330/65536”.

  26 to 31 show an internal lottery table when three RT gaming states are used when the main gaming state is the MB gaming state. For example, in the case of setting 1 in FIG. 26, the probability of “out” is “0/65536”, the probability that “CB role” is internally won is “56558/65536”, and “CB role_no transition The probability that “A” wins internally is “8431/65536”, and the probability that “CB role_SB Lip 1” wins internally is “393/65536”. Here, “CB combination” is all small combinations excluding replay.

<Cylinder stop initial setting table>
The rotating cylinder stop initial setting table shown in FIG. 32 is information for stopping the reels 3L, 3C, 3R, and is determined in advance according to the internal winning combination. The main CPU 93 refers to the rotation stop initial setting table, acquires the rotation stop number corresponding to the internal winning combination, and acquires various data for stopping the reels 3L, 3C, 3R. Yes.

  Specifically, in the rotation stop initial setting table, in addition to the determination data for each pressing order in association with the rotation stop number, the table number selection data and the change data table number after the first rotation first stop The first cylinder stop data table number, the initial data after the first cylinder first stop, and the search order table number are defined according to the gaming state. These various data indicate various table numbers to be selected in the stop control of the reels 3L, 3C, 3R according to the progress of the unit game.

  The “determination data by pressing order” includes a pull-in priority table number and a pull-in priority selection table number. The “pull-in priority table number” is a number for selecting the pull-in priority table shown in FIG. Further, the “drawing priority order selection table number” is a number for selecting the drawing priority order selection table shown in FIG.

  The “table number selection data” is a value that is referred to when all reels are stopped when the first stop reel is other than the left reel 3L, and includes a stop table number and a change status.

  The “stop table number” is a number for selecting a stop table (not shown) to be referred to when all reels are stopped when the first stop reel is other than the left reel 3L.

  The “change status” of the table number selection data is data for changing the line status for each game representing the line referred to in the stop table selected based on the stop table number.

  The change data table number after the first cylinder first stop, the first cylinder stop data table number, and the initial data after the first cylinder first stop indicate that the first cylinder is the first cylinder, that is, the left reel 3L. This data is referenced when

  “First cylinder stop data table number” is used to select a first cylinder stop data table referred to when stopping the first cylinder from the first cylinder stop data table shown in FIG. Number.

  The “initial data after first stop of the first cylinder” is data that is referred to when the second and third cylinders are stopped, and includes a table number and a line status. The “table number” is a number for selecting a stop data table (not shown) after the first cylinder reference that is referred to when stopping the second and third stop reels.

  The “change status” of the initial data after the first stop first stop indicates the line status for each game representing the line referred to in the stop data table after the first stop first stop selected based on the table number. It is data for changing.

  “Change data table number after first cylinder first stop” is used to select a change data table (not shown) after first cylinder first stop for changing initial data after first cylinder first stop. It is data of.

  “Search order table number” is a number for selecting a search order table for determining the number of sliding frames from the search order tables shown in FIGS.

<Pull-in priority table>
The drawing priority table shown in FIG. 33 represents which combination is drawn with priority among a plurality of combinations that can be displayed in the drawing range corresponding to the internal winning combination. In FIG. 33, data of a winning operation flag representing a combination combination is omitted.

  In the drawing priority order table, the drawing priority order of the combination indicated by the winning action flag is shown. The “pull-in priority data” is information provided for the main CPU 93 to identify the pull-in priority.

  For example, in the pull-in priority table number “00”, if it is determined that there is a possibility that “7 lip_RT5_01” and “RT5 transition lip_1” to “RT5 transition lip_16” may win, “RT5 transition” Since “7 Lip_RT5_01” has a higher priority than “Lip_1” to “RT5 Transition Lip_16”, the stop control of the rotating reels 3L, 3C, 3R is performed so that “7 Lip_RT5_01” is preferentially drawn. Is called.

<Retraction priority selection table>
In the pull-in priority selection table shown in FIG. 34, a pull-in priority table number for the stop operation type indicating the order of the reel stop operation is associated with each pull-in priority selection table.

  For example, in the pull-in priority table selection number “01”, when the first stop operation is “left”, the pull-in priority table number “03” is associated, and the first stop operation is “right”. In this case, the pull-in priority table number “16” is associated.

  Further, in the pull-in priority table selection data “01”, when the first stop operation is “left” and the second stop operation is “middle” during the second stop operation (“left → middle” in the figure), When the pull-in priority table number “03” is associated, the first stop operation is “right” and the second stop operation is “left” during the second stop operation (“right → left” in the figure), The pull-in priority table number “16” is associated.

<First torso stop data table>
The first cylinder stop data table shown in FIG. 35 is referred to when the left reel 3L is stopped when the first stop reel is the left reel 3L. In the first cylinder stop data table, sliding piece number determination data and change status are defined for symbol position data representing the position of each symbol. In the present embodiment, seven first cylinder stop data tables “00” to “07” are used.

  The “sliding piece number determination data” is referred to in order to specify the sliding piece number determination data in the search order table shown in FIGS. 36 and 37, and the “change status” is changed after the first cylinder first stop not shown. Referenced to identify the change status in the data table.

<Search order table>
The search order tables shown in FIGS. 36 and 37 are referred to in order to determine the number of sliding pieces for each reel 3L, 3C, 3R. In the present embodiment, two types of search order tables “00” and “01” are used. In the search order table, the number of sliding frames is associated with the sliding frame number determination data according to the priority order.

  For example, in the search order table “00” shown in FIG. 36, when the number of sliding pieces determination data is “3”, the number of sliding pieces “3” has the highest priority, and then the number of sliding pieces “1”. , “0”, “4”, “2” in order of priority.

  In this case, if the combination corresponding to the internal winning combination can be displayed on the effective line when the corresponding reel is slid by 3 frames, the number of sliding pieces “3” is selected, and the combination corresponding to the internal winning combination is selected. If the combination cannot be displayed on the active line, the priority order is lowered until the combination can be displayed on the active line.

  If the combination corresponding to the internal winning combination cannot be displayed on the active line even if the priority order is lowered to the number of sliding pieces “2”, or if it is “out of” with no internal winning combination, the highest priority is given. The number of sliding pieces “3” having the highest order is selected.

<Design winning prize operation flag data table>
The symbol corresponding winning action flag data table shown in FIG. 38 defines the correspondence between the reel type and the internal winning combination data that can be displayed according to the symbol of each reel displayed on the winning determination line. That is, by referring to the symbol corresponding winning action flag data table, the internal winning combination that can be displayed at that time can be determined. The symbol corresponding winning action flag data table is provided corresponding to the symbol combination table shown in FIGS. 16 and 17.

  For example, when the symbol “red 7” is stopped and displayed on the winning determination line of the left reel 3L, in the storage areas 1 to 22 corresponding to the symbol code “00000010” (red 7) in the reel type “left”, “1” is stored in a bit corresponding to a displayable internal winning combination. The data in the symbol code storage area is updated by the logical product of the data defined in the symbol corresponding winning action flag data table and the data stored in the symbol code storage area shown in FIG.

<Outside reel action lottery table>
In the case of the missed reel action lottery table shown in FIG. 39, in the case of “missing” without an internal winning combination, a so-called “right push” is performed in which the first stop operation is “right” and the third stop operation is “left”. This table is referred to when performing lottery on whether or not to generate a lock in the next game.

  Here, “lock” is to invalidate a game operation by a player for a predetermined period. In the present embodiment, during the locking, the reels 3L, 3C, 3R rotate in various rotation modes so as to artificially align the “symbols” (“本” in the present embodiment). It is executable.

  When “None” is won in the reel action lottery table, no lock is generated, and “Aim”, “Aim”, “Aim (symbol aligned)” and “Aim (symbol aligned after one lap)” If you win, the lock will occur.

  Here, in the case of “aiming”, locking occurs, but in particular, the reel action is not executed in the next game. In the case of “Aim”, the reel action is executed, but “symbols” are not arranged in a pseudo manner.

  Further, in the case of “aiming (symbol alignment)” and “aiming (symbol alignment after one round)”, a reel action in which “symbols” are pseudo-aligned in different rotation modes is executed. In the present embodiment, when a lock with a reel action of “aiming (symbol alignment)” and “aiming (symbol alignment after one lap)” occurs, the ART is determined.

  Furthermore, in the outlier reel action lottery table, the winning probability of whether or not to generate a lock is different for each mode of “normal”, “chance”, “great chance”, “preparation for preparation” and “confirmation”, and the reel The action distribution probability is also different.

  For example, in the “normal” mode, the winning probability of “none” is the highest at “48273/65536”, and the winning probability of “target (symbol alignment)” and “target (symbol alignment after one lap)” at which the ART is fixed. Are significantly lower at "133/65536" and "30/65536", respectively.

  In the “large chance” mode, the winning probabilities of “aiming (symbol alignment)” and “aiming (symbol alignment after one lap)” are “30000/65536” and “4536/65536”, respectively, “normal” and “ Much higher than “chance”.

  In the “determined” mode, only “aiming (symbol alignment)” and “aiming (symbol alignment after 1 lap)” in which ART is determined will win. The “determined preparation” mode is a mode in which it is committed to shift to the “determined” mode.

  Note that the “normal”, “chance”, “great chance”, “preparation for preparation” and “confirmation” modes are transitioned separately regardless of the transition of the main gaming state or the RT gaming state. The transition is performed by the main CPU 93 based on the lost reel action state transition lottery table shown in FIG. Thus, the main CPU 93 constitutes a mode transition unit.

<Lottery reel action state transition lottery table>
The lost reel action state transition lottery table shown in FIG. 40 defines transition probabilities for each mode of “normal”, “chance”, “large chance”, “confirmation preparation”, and “confirmation”.

  The transition of each mode is performed with different transition probabilities for each internal winning combination type (including “out of”). Here, in addition to “out of”, the internal winning types related to the transition of each mode include “Lip / MB”, “Pushing order bell / CB in operation”, “Weak Choi / Watermelon / Strong Bell”, “Strong Cherry”・ There are “opportunities” and “confirmed”.

  The internal winning combinations included in the “Lip / MB” internal winning combination types are “MB”, “Lip A with no transition”, “Lip B without a transition”, “SB Lip 1”, “SB Lip 2”, “ There are “RT2 Lip 2nd”, “RT2 Lip 3rd”, “Unquestion 7”, “Unquestion 77”, and “Unquestion Tempe”.

  Further, the internal winning combination included in the internal winning combination type of “push order bell / CB in operation” includes “middle correct answer bell”, “right 312 correct answer bell”, and “right 321 correct answer bell”. Also, the internal winning combination included in the internal winning combination type of “weak choi, watermelon, strong bell” includes “strong bell”, “watermelon”, and “weak cherry”.

  The internal winning combinations included in the “strong cherry chance chance” internal winning combination types include “chance eye B”, “chance eye C”, and “strong cherry”. Further, the internal winning combination included in the “confirmed” internal winning combination type includes “medium chelip”, “confirmed bell”, and “chance eye A”.

  For example, in the “normal” mode, in the case of “out of” with no internal winning combination, most of them are maintained in the “normal” mode with a probability of “120/128”, while the internal winning combination type is “weak”. In the case of “Che / Watermelon / Strong Bell” or “Strong Cherry / Chance”, the mode shifts to “Chance” or higher mode.

  Further, in the “preparation for preparation” mode, the mode shifts to or is maintained in the mode for “confirmation preparation” or higher, regardless of whether it is “off” or each of the internal winning combinations described above. In the “determined” mode, the “determined” mode is maintained except for “out”. When the internal winning combination type is “confirmed”, the mode shifts to the “confirmed” mode in each mode except “confirmed preparation”.

  In this way, the main CPU 93 refers to the lost reel action state transition lottery table, and determines whether or not to shift the mode from the current mode to a mode with a high probability of being determined to lock in the next game. And a mode demotion lottery means for determining whether to shift the mode from the current mode to a mode with a low probability of being determined to be locked in the next game.

<Special counter addition lottery table>
The special counter addition lottery table shown in FIG. 41 is a table that is referred to when determining whether or not to add the value of the special counter in response to the internal winning of the MB. In the special counter addition lottery table, the lottery values of “win” and “out” are both “64”. Therefore, the winning probabilities for “win” and “out of” are both “64/128”.

  Here, in the case of “winning”, the value of the special counter is added, and in the case of “out”, the value of the special counter is not added, and lottery based on the release lottery table shown in FIG. 43 is performed.

  In this way, the main CPU 93 constitutes special game addition determination means for determining whether or not to add to the special counter by referring to the special counter addition lottery table in the special counter process (see FIG. 89) described later. The special counter addition lottery table is not limited to that shown in FIG. 41, and may be replaced with that shown in FIG.

<Discharge lottery table>
The release lottery table shown in FIG. 43 is a table that is referred to when performing the release lottery according to the value of the special counter when winning the “out” as a result of referring to the above-described special counter addition lottery table.

  The winning lottery table has different “winning” winning probabilities based on the RT gaming state and the value of the special counter. For example, in the “RT1 gaming state”, when the value of the special counter is “1” and “2”, the winning probability of “winning” is “0/65536”, and “winning” is not won. In the release lottery table, the notation “counter 1” indicates that the value of the special counter is “1”. The same applies to “counter 2” and thereafter.

  Further, when the value of the special counter is “3” or more in “RT1 gaming state”, “winning” is won with a winning probability of “28/65536”. The “RT3 gaming state” to “RT5 gaming state” are the same as the “RT1 gaming state”.

  In this way, the main CPU 93 refers to the release lottery table in a special counter process (see FIG. 89) described later, and adds to the number of ART games executed by the sub CPU 102 based on the value of the special counter. The special game release lottery means for determining whether or not is determined.

  In this embodiment, regardless of whether the RT gaming state is “RT1 gaming state” or “RT3 gaming state” to “RT5 gaming state”, it is “winning” only when the value of the special counter is “3” or more. A release lottery table is defined to win. The release lottery table is not limited to that shown in FIG. 43, and as shown in FIG. 44, the winning probability may be changed to a value that increases as the value of the special counter increases.

[Configuration of storage area allocated to main RAM]
45 to 52 show various storage areas allocated to the main RAM 95.

<Internal winning combination storage area>
The internal winning combination storing area shown in FIG. 45 includes 22 storing areas of internal winning combination storing areas 1 to 22. In the internal winning combination storing areas 1 to 22, data (bits) corresponding to the combination associated with the internal winning combination in the combination table by flag shown in FIGS. 18 and 19 is set to 1, and other data is stored. Reset to zero.

<Display combination storage area>
The display combination storing area shown in FIG. 46 represents a combination that can be displayed along the effective line after each reel of the reels 3L, 3C, 3R is stopped. That is, the display combination storing area represents an internal winning combination that has won a prize after all of the reels 3L, 3C, 3R are stopped. The display combination storing area is used for the main CPU 93 to identify the combination displayed along the active line after all the reels 3L, 3C, 3R are stopped. The display combination storage area has the same structure as the internal winning combination storage area.

<Design code storage area>
The symbol code storage areas shown in FIG. 47 are allocated by the number of valid lines, and in each symbol code storage area, data that can be displayed along each valid line is set to 1, and the reels 3L, 3C, 3R Depending on the stop position, the data corresponding to the combination that cannot be displayed along the active line is reset to zero. In the upper 4 bits of the symbol code storage area 1, a symbol code that has been recently stopped on the corresponding effective line is stored.

<Carry-over portion storage area>
The carryover combination storage area shown in FIG. 48 stores data related to the carryover combination. For example, bit 0 of the carryover combination storage area is set to “1” on the condition that the main game state is an MB carryover state, and the corresponding bit is reset to “0” on condition that the MB is activated. Is done.

<Game state flag storage area>
In the gaming state flag storage area shown in FIG. 49, data relating to the RT gaming state is stored. For example, on condition that the RT gaming state becomes the RT5 gaming state, bit 2 of the gaming state flag storage area is set to “1”, and bits 3 to 7 are reset to “0”.

  Also, on condition that the RT gaming state becomes the RT4 gaming state, bit 3 of the gaming state flag storage area is set to “1”, and bits 2, 4 to 7 are reset to “0”. Also, on condition that the RT gaming state becomes the RT3 gaming state, bit 4 of the gaming state flag storage area is set to “1”, and bits 2, 3, 5 to 7 are reset to “0”.

  Also, on condition that the RT gaming state becomes the RT2 gaming state, bit 5 of the gaming state flag storage area is set to “1”, and bits 2 to 4, 6, and 7 are reset to “0”. Also, on condition that the RT gaming state becomes the RT1 gaming state, bit 6 of the gaming state flag storage area is set to “1”, and bits 2 to 5 and 7 are reset to “0”. On the condition that the RT gaming state becomes the RT0 gaming state, bit 7 of the gaming state flag storage area is set to “1”, and bits 2 to 6 are reset to “0”.

<Operation stop button storage area>
The operation stop button storage area shown in FIG. 50 stores the states of the stop buttons 17L, 17C, and 17R. Bit 0 corresponds to the stop button 17L, and “1” is stored in bit 0 when the stop button 17L is operated.

  Similarly, bit 1 corresponds to the stop button 17C, and “1” is stored in bit 1 when the stop button 17C is operated. Bit 2 corresponds to the stop button 17R, and “1” is stored in bit 2 when the stop button 17R is operated.

  Bit 4 corresponds to the stop button 17L, and “1” is stored in bit 4 when the stop button 17L is valid. Bit 5 corresponds to the stop button 17C, and “1” is stored in bit 5 when the stop button 17C is valid. Bit 6 corresponds to the stop button 17R. When the stop button 17R is valid, “1” is stored in bit 6.

  In the present embodiment, effective stop buttons refer to the stop buttons 17L, 17C, and 17R that correspond to the reels 3L, 3C, and 3R that are rotating and that can be detected by the main CPU 93.

<Pressing order storage area>
The pressing order storage area shown in FIG. 51 is an area for storing information indicating the pressing order of the three stop buttons 17L, 17C, and 17R. Bit 0 corresponds to the pressing order “left → middle → right”, “1” is stored in bit 0 when the pressing order is “left → middle → right”, and other bits are set to “0”. Reset.

  Similarly, bit 1 corresponds to the pressing order “left → right → middle”, bit 2 corresponds to the pressing order “middle → left → right”, and bit 3 corresponds to the pressing order “middle → right → left”. Bit 4 corresponds to the pressing order “right → left → middle”, and bit 5 corresponds to the pressing order “right → middle → left”.

<Retrieve priority data storage area>
The pull-in priority data storage area shown in FIG. 52 includes a left reel pull-in priority data storage area, a middle reel pull-in priority data storage area, and a right reel pull-in priority data storage area. The contents of the middle reel pull-in priority data storage area and the right reel pull-in priority data storage area are the same as those of the left reel pull-in priority data storage area. The data storage area will be described.

  The left reel pull-in priority data storage area stores pull-in priority data for each of the symbol position data. For example, of the drawing priority data in the drawing priority table shown in FIG. 33, any drawing priority data based on the internal winning combination and the states of the other reels 3C and 3R is stored for each symbol position.

[Data table referenced by sub CPU]
<Sub-judgment number table>
In addition to the internal winning combination, the sub CPU 102 performs various lotteries using a sub determination combination corresponding to the internal winning combination and the lock number. In the present embodiment, sub-judgment numbers “0” to “17” are defined.

  FIG. 53 shows the correspondence between the sub-decision combination numbers and names. The sub CPU 102 identifies the sub determination combination number by the sub determination combination number. However, in this embodiment, in order to make the invention easier to understand, the name of the sub determination combination is used instead of the sub determination combination number. explain.

  As shown in FIG. 53, the sub-determining roles are “losing”, “MB”, “lip”, “lip special”, “bell”, “strong bell”, “watermelon”, “weak choi”, “strong chef”. ”,“ Strong Cho + R1 ”,“ Medium Chelip ”,“ Medium Chelip + BAR ”,“ Chance Eye ”,“ Strong Chance Eye ”,“ Chance Eye + R1 ”,“ Chance Eye + R2 ”,“ Decisive Role 1 ”and“ Confirmed ” There is a role 2 ”.

<Sub-judgment role identification table>
The sub-determining combination identification table shown in FIG. 54 represents the sub-determining combination associated with the internal winning combination and the lock number. For example, when the internal winning combination is “weak cherry” and the lock number is “0”, “1” or “6” to “10”, the sub-determining role is “weak check” and the lock number Is “2” or “5”, it becomes “determined combination 1”.

<Number of games added lottery table>
The number-of-games extra lottery table shown in FIG. 55 is referred to when the number of games to be added to the ART is lottery, and the lottery value of the number of games to be added to the ART is associated with the sub-determinant.

  In the present embodiment, for example, when the sub-determining role is “weak”, “0 game” is won with the probability of “31968/32768”, and “10 game” is with the probability of “100/32768”. Winning, “20 games” is won with a probability of “200/32768”, and “30 games” is won with a probability of “500/32768”.

<Additional dividend selection table>
The additional selection payout table shown in FIG. 56 shows a list of tables used when selecting additional. In each table, the number of games for each element to which IDs “1” to “15” are assigned is associated with the selected payout table.

  For example, in the table 12, “10 games” are associated with each element of “ID1” to “ID13”, “100 games” are associated with the element of “ID14”, and the element of “ID15” Is associated with “300 games”.

  Each element is randomly arranged and displayed on the liquid crystal display device 11 by the sub CPU 102 so that the number of associated games cannot be identified when selecting the addition. Here, the element associated with “0 game” indicates that it is not displayed on the liquid crystal display device 11 when the addition is selected. For example, in the “table 17”, five elements “ID1” to “ID5” are displayed on the liquid crystal display device 11. The element associated with “0 game” is displayed on the liquid crystal display device 11 at the time of selection, but it may not be selected.

<Attack selection lottery table for the first time at ART>
In the ART initial selection bonus selection lottery table shown in FIG. 57, lottery values are associated with the winning selection / non-winning selection at the time of the first ART hit and the table used at the time of winning.

  57, for example, the lottery result becomes non-winning with a probability of “22865/32768”, “table 13” is won with a probability of “150/32768”, and “100 / “Table 14” is won with a probability of “32768”.

<ART selection selection lottery table>
In the ART extra selection lottery table shown in FIGS. 58 and 59, the winning / non-winning of the extra selection and the lottery value of the table used at the time of winning are respectively associated with the sub-determining part in the ART. Yes.

  58 and 59, for example, if the sub-determining role is “strong”, the lottery result is non-winning with a probability of “21913/32768” and “3500/32768” “Table 1” is won with probability, and “Table 2” is won with probability of “1000/32768”.

<Normal selection lottery table>
The normal addition selection lottery table shown in FIG. 60 and FIG. 61 corresponds to the lottery values of the winning selection / non-winning of the addition selection and the table used at the time of winning for the sub-determinant in the normal state that is not in ART. It is attached.

  According to the normal extra selection lottery table shown in FIG. 60 and FIG. 61, for example, when the sub-determining role is “weak”, the lottery result is non-winning with a probability of “31092/32768” and “1600/32768” “Table 1” wins with a probability, and “Table 2” wins with a probability of “70/32768”.

<Special function trigger lottery table>
In the special function activation lottery table shown in FIG. 62, the special function is activated / inactivated for the sub-determining role that is won in the state where the peeping activation flag is “peeping in operation” at the time of selecting the addition, A lottery value is associated with each type of special function.

  Here, the special function is a function called “crushing” displayed so that the number of games associated with at least one of the elements displayed on the liquid crystal display device 11 can be identified at the time of selecting the addition, and the liquid crystal And a function of “peek” that displays a plurality of elements so that the number of games respectively associated with the elements displayed on the display device 11 can be identified.

  According to the special function trigger lottery table shown in FIG. 62, for example, when the sub-determining role is “bell”, “peek” is won with a probability of “327/32768” and the sub-determining role is “strong bell”. In this case, “crush” is won with a probability of “8192/32768”.

<Crushing lottery table>
The squashing lottery table shown in FIG. 63 is referred to when “smashing” is activated as a special function, and the number of elements that can identify the number of games is associated with the number of elements displayed on the liquid crystal display device 11. ing.

  63, for example, when the number of elements displayed on the liquid crystal display device 11 is 5, that is, when a table having 10 elements associated with “0 game” is won. Is displayed so that the number of games associated with one element can be identified with a probability of “20768/32768”, and the number of games associated with two elements can be identified with a probability of “8000/32768”. Displayed so that the number of games associated with the three elements can be identified with a probability of “4000/32768”.

<Additional selection continuation rate lottery table>
64 and 65, the additional selection continuation rate lottery table is the ART initial bonus selection lottery table shown in FIG. 57, the ART additional selection lottery table shown in FIGS. 58 and 59, or FIGS. The lottery value of the continuation rate of the addition selection is associated with the table (hereinafter simply referred to as “base table”) won based on the normal addition selection lottery table shown in FIG.

  64 and 65, for example, when the base table is “table 11”, “continuation rate 1%” is won with a probability of “24903/32768” and “6000 / “Continuation rate 33%” wins with a probability of 32768 ”,“ Continuation rate 50% ”wins with a probability of“ 1500/32768 ”, and“ Continuation rate 66% ”wins with a probability of“ 300/32768 ” The “continuation rate of 80%” is won with the probability of “60/32768”, and the “continuation rate of 90%” is won with the probability of “5/32768”.

<Addition selection continuation state lottery table>
The additional selection continuation state lottery table shown in FIG. 66 is the continuation / non-continuation of the additional selection with respect to the sub-determination for each continuation rate determined based on the additional selection continuation rate lottery table shown in FIGS. And a lottery value with a continuation state at the time of continuation.

  According to the addition selection continuation state lottery table shown in FIG. 66, for example, when the sub-determining role is “bell” at “continuation rate 90%”, the lottery result is discontinued with a probability of “3467/32768” “Continue A” wins with a probability of “16100/32768”, “Continue B” wins with a probability of “300/32768”, “Continuation D” wins with a probability of “12600/32768”, and “300 “Continue E” wins with a probability of “/ 32768” and “Continue F” wins with a probability of “1/32768”.

<Additional selection dividend lottery table>
The extra selection payout lottery table shown in FIG. 67 is a continuation state, that is, for each “continuation A” to “continuation F”, with respect to the base table, continuation / non-continuation of addition selection, and a table used at the time of continuation. Lottery values are associated with each other. In FIG. 67, only the “continuation A” additional selection payout lottery table is illustrated, and the additional selection payout lottery table in other continuous states is not illustrated.

  67, for example, when the base table is “1” in “Continue A”, “Table 1” is won with a probability of “20000/32768” and “5000/32768”. “Table 2” is won with the probability of “2000/32768”, “Table 3” is won with the probability of “2000/32768”, “Table 10” is won with the probability of “543/32768”, and “150/32768” “Table 11” wins with probability.

<Additional game lottery table>
In the extra game lottery table shown in FIG. 68, the winning / non-winning lottery value of the extra game stock is associated with the sub-determining part in the extra game. According to the extra game lottery table shown in FIG. 68, for example, when the sub-determining role is “weak”, the extra game stock is not won with the probability of “32605/32768” and the probability of “163/32768”. Win the extra game stock.

<Bart lottery table>
69 is referred to when ART is not being prepared or ART is not being prepared, and for each set value, a lottery value per ART is associated with a sub-judgment.

  According to the ART direct hitting lottery table shown in FIG. 69, for example, when the sub-determining role in “Setting 6” is “Strong Cho”, the probability of “32640/32768” is “out of”, and “128 / It becomes “hit” to ART with a probability of 32768 ”.

<A lottery table with direct addition of ART>
The lottery table for the ART extra game shown in FIG. 70 defines the winning / non-winning lottery values for the extra game stock. According to the ART extra game random lottery table shown in FIG. 70, the extra game stock is non-winning with a probability of “30068/32768”, and the extra game stock is won with a probability of “2700/32768”.

<Step-up sequence table>
The step-up sequence table shown in FIG. 71 is referred to by the sub CPU 102 when it is determined that the main CPU 93 performs locking and the sub CPU 102 determines the step-up effect as the effect content. In the step-up sequence table, a sequence of effect data including a liquid crystal effect number and shutter operation data is associated with the lock number. The remarks column in FIG. 71 is provided for convenience of explanation, and is not included in the step-up sequence table.

  In the step-up sequence table shown in FIG. 71, the liquid crystal effect represents the type of liquid crystal effect performed by the liquid crystal display device 11, respectively. In the present embodiment, there are the effects “effect 1” to “effect 6” as the liquid crystal effects, which have different effects.

  The shutter operation data represents a type of a shutter operation sequence table described later. In the present embodiment, there is shutter operation data specified by “Y1” to “Y8” as shutter operation data, and these shutter operation data Y1 to Y8 are stored in a shutter operation sequence table of FIGS. 72 to 79 described later. It corresponds. In the step-up sequence table, shutter operation data corresponding to the lock number is assigned at a predetermined timing.

  Here, the shutter operation data Y1 is an operation of moving the shutter members 201, 202, 203, 204 at the exposure position (position shown in FIG. 8) down to the shielding position (position shown in FIG. 9) (elevation 0% → elevation 100). %), That is, data corresponding to a shutter operation sequence table (see FIG. 72) for performing an operation of closing the shutter.

  Further, the shutter operation data Y2 is a shutter operation sequence table (FIG. 73) for performing an operation (vibration at the up / down 100% position) for vibrating the shutter members 201, 202, 203, 204 at the shielding position (position shown in FIG. 9). Data).

  Further, the shutter operation data Y3 is an operation for raising the shutter members 201, 202, 203, 204 at the shielding position (position shown in FIG. 9) to the exposure position (position shown in FIG. 8) (elevation 100% → elevation 0%). ), That is, data corresponding to a shutter operation sequence table (see FIG. 74) for performing an operation of opening the shutter.

  Further, the shutter operation data Y4 is a shutter operation sequence table (FIG. 75) for performing an operation (vibration at the 0% lift position) that vibrates the shutter members 201, 202, 203, and 204 at the exposure position (position shown in FIG. 8). Data).

  The shutter operation data Y5 is a shutter operation sequence for performing an operation (rotation 0% → rotation 50%) of rotating the shutter members 201, 202, 203, and 204 at the shielding position (position shown in FIG. 9) by 90 °. Data corresponding to a table (see FIG. 76).

  Further, the shutter operation data Y6 performs an operation (vibrates at the 50% rotation position) that vibrates the shutter members 201, 202, 203, and 204 that are in a half-open state (50% rotation) at the exposure position (position shown in FIG. 8). Data corresponding to the shutter operation sequence table (see FIG. 77).

  Further, the shutter operation data Y7 indicates that the shutter members 201, 202, 203, and 204 in the half-open state (rotation 50%) or in the reversed state (rotation 100%) at the shielding position (position shown in FIG. 9) are before reversal. This data corresponds to the shutter operation sequence table (see FIG. 78) for performing the operation (rotation 50% or rotation 100% → rotation 0%) to return to the state (rotation 0%).

  The shutter operation data Y8 is obtained by inverting the shutter members 201, 202, 203, and 204 in the state before rotation (rotation 0%) or the half-open state (rotation 50%) at the shielding position (position shown in FIG. 9). This data corresponds to a shutter operation sequence table (see FIG. 78) for performing an operation (rotation 0% or rotation 50% → rotation 100%) to rotate to a state (rotation 100%).

  In addition, the LEDs are LEDs that turn on a pair of eyes 701 formed on the upper exterior member 7a (indicated simply as “eyes” in FIG. 71), and light irradiation that irradiates light to the shutter members 201, 202, 203, and 204. The light emission patterns and lighting patterns of the LEDs 401, 402, 403, 404 (simply referred to as “shutter” in FIG. 71) of the apparatus 400 are shown.

  For example, the light emission pattern of “eyes” may be turned on in any one of “white”, “blue”, “red”, and “rainbow”, and may be turned off. The “shutter” lighting pattern includes lighting and extinguishing.

  In addition, the count is a time required for the sub CPU 102 to receive a no-operation command from the main CPU 93 (in the present embodiment, “about 17 ms”), and the count of various operations (for example, a liquid crystal effect) , Shutter operation, LED operation), the value of the step counter that defines whether to execute or end.

  The sub CPU 102 executes or terminates the above-described various operations on condition that the value of the no-operation command reception counter to which “1” is added every time the no-operation command is received is equal to or greater than the value of the step counter.

  For example, when the lock number 1 is determined, the sub CPU 102, until the value of the no-operation command reception counter becomes “124”, the liquid crystal effect related to “effect 1”, the shutter operation related to the shutter operation data Y4, The “eye” emits white light and the “shutter” is turned on. The “time (ms)” described in the remarks is an approximate duration of these operations (= about 17 ms × 124 counts).

  In the present embodiment, “0”, “1”, and “2” are defined as triggers. When the trigger is “0” when “0” is received and “1” is “pressing the MAX bet button 14” as no-operation command input information, the value of the no-operation command reception counter is specified. The step-up sequence table is updated even if it is not greater than the value, that is, it is defined that the operation proceeds to the next operation.

  Also, “2” changes the step-up sequence table to the trigger “1” setting position when the value of the no-operation command reception counter exceeds the specified step counter value (loop to trigger “1”). It is prescribed to do. Note that the end of the loop to the trigger “1” depends on the program executed by the sub CPU 102.

<Shutter operation sequence table>
In each shutter operation sequence table of FIGS. 72 to 79, the motors (left and right lifting motors 240A and 240B for raising and lowering the shutter, and the rotating motor 231 for rotating the shutter) with a prescribed pulse width and number of pulses in the order of step numbers. The motor control direction is specified.

  72 to 79, “lifting left” indicates the motor control direction of the lifting motor 240A, “lifting right” indicates the motor control direction of the lifting motor 240B, and “rotation” indicates the motor control of the rotary motor 231. Shows direction.

  Here, the pulse width in each shutter operation sequence table represents the time on one side of the ON or OFF waveform, and the duty ratio of the pulse in the present embodiment is 1: 1. Therefore, “1 pulse” in each shutter operation sequence table is pulse width × 2 (ms).

  For example, in a certain step, when the pulse width is 5 ms and the number of pulses is defined as 5, the processing time of the step is 5 ms × 2 × 5 = 50 ms. However, at the time of holding the motor, which will be described later, only the OFF waveform is used, so the prescribed pulse width is 1 pulse.

  Further, “Non” in the motor control direction column indicates that data is not registered. For this reason, the motor described as “Non” in the motor control direction column is a motor that is not controlled. Note that “Non” in the motor control direction column is a notation for convenience, and 0xffff (“0x” is a hexadecimal identification symbol) or −1 is defined as “Non”.

  Further, “H” in the motor control direction column represents that the motor is held without excitation. For example, when the pulse width is 20 ms and the number of pulses is 1, it indicates that the motor is held for 20 ms without excitation. Note that “H” in the motor control direction column is a notation for convenience, and the value of 0x8fff (“0x” is a hexadecimal identification symbol) is defined as “H”.

  Note that the left and right lifting motors 240 for raising and lowering the shutter are excited in opposite phases due to the relationship between the mounting directions of the shutters, and are thus driven in a combination of “+ −” and “− +” in the same step.

  FIG. 72 shows a shutter operation sequence table corresponding to the shutter operation data Y1. As shown in FIG. 72, the shutter operation sequence table corresponding to the shutter operation data Y1 defines an operation sequence for closing the shutter.

  Here, in step number “3”, the process proceeds to step number “4” on the condition that the lowering sensor 271 (see FIG. 6) detects that the shutter has been lowered in the special condition column. This indicates that there is an intervening process (a process corresponding to S426, S427, S431 to S433 in FIG. 106). The special processing in the special condition column is the same in FIGS. 74, 78, 79, and 81 described later.

  The number of pulses “300” defined here is the maximum number of times the motor is excited in one step, which is defined for protecting the motor. Therefore, if the lowering sensor 271 (see FIG. 6) does not detect that the shutter has been lowered even if the number of pulses exceeds “300”, it is processed as an abnormality in the lifting motor 240A or 240B. It has become. Specifically, the movement of the shutter members 201, 202, 203, and 204 is stopped until the next power interruption recovery (once the power of the pachislot machine 1 is turned off and then the power is turned on).

  FIG. 73 shows a shutter operation sequence table corresponding to the shutter operation data Y2. As shown in FIG. 73, the shutter operation sequence table corresponding to the shutter operation data Y2 defines an operation sequence for causing the shutter to vibrate at the 100% up / down position.

  By executing the operation sequence shown in FIG. 73, vibration (blind vibration) occurs with the shutter closed. At this time, the shutter is not brought into a half-open state (blind closing).

  FIG. 74 shows a shutter operation sequence table corresponding to the shutter operation data Y3. As shown in FIG. 74, the shutter operation sequence table corresponding to the shutter operation data Y3 defines an operation sequence for opening the shutter.

  Here, in step number “2”, the process proceeds to step number “3” on condition that the origin sensor 270 (see FIG. 6) detects that the shutter is at the origin.

  In this operation sequence as well, as in the operation sequence shown in FIG. 72, if the origin sensor 270 (see FIG. 6) does not detect that the shutter is at the origin even when the number of pulses exceeds “300”, the lift motor Processing is performed assuming that an abnormality has occurred in 240A or 240B. Specifically, the movement of the shutter members 201, 202, 203, and 204 is stopped until the next power interruption recovery (once the power of the pachislot machine 1 is turned off and then the power is turned on).

  FIG. 75 shows a shutter operation sequence table corresponding to the shutter operation data Y4. As shown in FIG. 75, the shutter operation sequence table corresponding to the shutter operation data Y4 defines an operation sequence for causing the shutter to vibrate at the 0% lift position.

  By executing the operation sequence shown in FIG. 75, vibration (elevating vibration) is performed with the shutter opened.

  FIG. 76 shows a shutter operation sequence table corresponding to the shutter operation data Y5. As shown in FIG. 76, the shutter operation sequence table corresponding to the shutter operation data Y5 defines an operation sequence for rotating a shutter that is not reversed or half-opened by 90 ° (rotation 0% → rotation 50%). In step S922 (see FIG. 144) of the first extra selection selected lottery process to be performed, when “with peep” is set in the peeping activation flag, it is also data corresponding to starting peeping.

  When the operation sequence shown in FIG. 76 is executed, the shutter is closed and half open (blind open).

  FIG. 77 shows a shutter operation sequence table corresponding to the shutter operation data Y6. As shown in FIG. 77, the shutter operation sequence table corresponding to the shutter operation data Y6 defines an operation sequence for vibrating the shutter in a half-open state (rotation 50%).

  By executing the operation sequence shown in FIG. 77, the shutter is closed and vibrates (blind vibration) in a half-open state.

  FIG. 78 shows a shutter operation sequence table corresponding to the shutter operation data Y7. As shown in FIG. 78, the shutter operation sequence table corresponding to the shutter operation data Y7 has a state before the reversal (rotation 0%) of the shutter in the half-open state (rotation 50%) or the reversed state (rotation 100%). In step S922 (see FIG. 144) of the first addition selection lottery process to be described later, when “with peep” is set in the peeping activation flag, the peeping state is set. This is data for ending.

  Here, in step number “2”, the process proceeds to step number “3” on condition that the rotation sensor 272 (see FIG. 6) detects that the shutter is at the rotation origin. In this operation sequence as well, as in the operation sequence shown in FIG. 72, if the rotation sensor 272 (see FIG. 6) does not detect that the shutter is at the rotation origin even when the number of pulses exceeds “300”, the rotation is performed. The motor 231 is processed as having an abnormality. Specifically, the movement of the rotating mechanism 230 is stopped until the next power interruption recovery (once the power of the pachislot machine 1 is turned off and then turned on).

  FIG. 79 shows a shutter operation sequence table corresponding to the shutter operation data Y8. As shown in FIG. 79, the shutter operation sequence table corresponding to the shutter operation data Y8 is an operation sequence for inverting (rotation 100%) the shutter in the state before rotation (rotation 0%) or the half-open state (rotation 50%). Is stipulated.

  Here, in step number “2”, the process proceeds to step number “3” on condition that the rotation sensor 272 (see FIG. 6) detects that the shutter is in an inverted state. .

  Also in this operation sequence, as in the operation sequence shown in FIG. 72, if the rotation sensor 272 (see FIG. 6) does not detect that the shutter is inverted even when the number of pulses exceeds “300”, It is processed as an abnormality in the rotary motor 231. Specifically, the movement of the rotating mechanism 230 is stopped until the next power interruption recovery (once the power of the pachislot machine 1 is turned off and then turned on).

<Shutter operation combination determination table>
The shutter operation combination determination table shown in FIG. 80 is a table for reconstructing the shutter operation sequence for the purpose of protecting the shutter operation based on the shutter operation executed last time and the shutter operation executed this time. The shutter operation combination determination table corresponds to an accessory operation consistency table for ensuring the consistency of shutter operation. Further, the shutter operation combination determination table is configured to be able to register a plurality of shutter operation effects (object effects) based on the determination result of the shutter operation consistency.

  If the shutter is operated with a combination of wrong operation sequences, an operation that was not originally intended may be performed, and the shutter may not move. For example, if the raising operation of the shutter is performed with the shutter reversed, the elevating unit 206 or the like may be damaged, the elevating motor 240 may be burned, or the deterioration may be caused.

  In the present embodiment, when an operation sequence combination that hinders (incorrect) the operation of the shutter apparatus 200 in the operation combination is performed, the operation sequence is reconstructed using the shutter operation combination determination table. A reasonable operation can be imposed on the shutter, and the above-described problems can be prevented.

  FIG. 81 illustrates a combination of operation sequences stored in the shutter operation sequence storage area when the previous shutter operation data is “Y6” and the current shutter operation is “Y4”.

  When the previous shutter operation data is “Y6” and the current shutter operation is “Y4”, the shutter is oscillated at the up / down position of 50% and then oscillated at the up / down position of 0%. It cannot be executed with a combination of the operation sequences.

  Therefore, when the previous shutter operation data is “Y6” and the current shutter operation is a combination of “Y4”, based on the shutter operation combination determination table shown in FIG. 80, the operation sequence of shutter operation data Y7, Y3, Y4 in that order. Is reconstructed.

  The combination of the operation sequences reconstructed in this way is stored in the shutter operation sequence storage area as shown in FIG. The shutter operation sequence storage area is assigned to the sub RAM 104.

  Here, the sub CPU 102 constitutes effect execution means for executing effects in units of steps in accordance with the operation sequence stored in the shutter operation sequence storage area. Further, when the lock effect is being executed, the sub CPU 102 executes each step of the effect based on the reception period of the no-operation command. The sub CPU 102 executes an effect operation by the shutter based on the fact that each step of the effect is executed.

<Internal winning group table for penalty determination>
The penalty determination internal winning combination group table shown in FIG. 82 represents a group of internal winning combinations that are referred to when a penalty is set by the sub CPU 102. Note that the penalty means setting a disadvantageous state for the player (for example, ART lottery is not performed). In this way, the sub CPU 102 constitutes a disadvantageous state setting means for setting a penalty by referring to the penalty determination internal winning combination group table in a penalty setting process (see FIG. 120) described later.

  In the internal winning combination group table for determining a penalty, a first winning combination group to a fourth winning combination group are defined as groups of internal winning combinations. The first winning combinations include “Outside”, “MB”, “No Lip 1”, “No Lip 2”, “SB Lip 1”, “SB Lip 2” and “SB Tempe”. It consists of

  The second winning combination includes “RT2 Lip 2nd”, “RT2 Lip 3rd”, “RT2K Lip 1st”, “RT3 Lip 2nd”, “RT3 Lip 3rd”, “Medium Correct Bell”, “Right 312 Correct Bell”, and It consists of each internal winning combination of “Right 321 correct answer bell”.

  The third winning combination includes “out of”, “MB”, “no-transfer lip 1”, “no-transfer lip 2”, “SB lip 1”, “SB lip 2”, “SB tempe”, “RT2 lip 2nd”. ”,“ RT2 Lip 3rd ”,“ RT2K Lip 1st ”,“ RT3 Lip 2nd ”,“ RT3 Lip 3rd ”,“ Medium Correct Bell ”,“ Right 312 Correct Bell ”and“ Right 321 Correct Bell ” It consists of

  The fourth winning combination group includes internal winning combinations of “middle correct answer bell”, “right 312 correct answer bell”, and “right 321 correct answer bell”.

<Error management area allocation table>
The error management area allocation table shown in FIG. 83 is referred to when the sub CPU 102 specifies the type of error that has occurred when the main CPU 93 or the sub CPU 102 detects an error in the pachislot machine 1. The sub CPU 102 identifies the type of error that has occurred by referring to the error management area allocation table, and stores the identified error in the error management area of the sub RAM 104.

  In the error management area allocation table, the error source and the error type are associated with each other. Error sources include “main”, “sub”, “between main and sub”, “sound”, “lamp”, and “shutter”.

  Here, various errors relating to the main control board 41 (main CPU 93) and various devices (hopper device, medal auxiliary storage, selector, reel) connected to the main control board 41 are assigned to “main”.

  For example, “DO” indicates a door open error that occurs when the front door 2b (see FIG. 2) is open, and “EE” indicates that each reel has stopped with a combination of symbols that does not hold from the internal winning combination. Indicates an illegal hit error that occurs in

  “HJ” indicates a hopper jam error that occurs when medals are jammed in the hopper device 43 (see FIG. 3), and “HE” occurs when the hopper device 43 cannot pay out medals. Indicates a hopper empty error.

  “CR” indicates a inserted medal reverse error that occurs when the upstream and downstream medal sensors 46 (see FIG. 3) in the selector detect medals in the reverse order, and “CO” indicates the medal. This indicates a medal full error that occurs when the auxiliary storage switch 57 (see FIG. 3) is electrically connected through the medal.

  “CJ” indicates an inserted medal passage check error that occurs when the medal sensor 46 does not detect the medal normally. “CE” indicates that the medal sensor 46 has detected a medal for a predetermined time or more. In this case, the inserted medal passage time error occurs.

  Further, various errors relating to various devices mounted on the sub control board 42 are assigned to “sub”. For example, “GPU abnormality” is a high heat detection error that occurs when the detection temperature of a thermosensor (not shown) attached to the rendering processor (VDP, GPU, etc.) 105 exceeds a predetermined temperature (for example, 100 ° C.). Show.

  “Power failure error” indicates a power failure detection error that occurs when the sub CPU 102 (see FIG. 5) is activated without normally performing power failure detection processing. “Backup” This shows a backup error that occurs when there is an abnormality in the sum value of the backup area of the sub RAM 104.

  Various errors relating to command data (serial communication) transmitted from the main CPU 93 to the sub CPU 102 are assigned to “between main and sub”. For example, “sequence” indicates a command sequence error that occurs when a valid command cannot be received in a prescribed order.

  “Sum” is a command sum error that occurs when the sum operation result of received command data excluding the received command data sum value (also referred to as “SUM data”) is different from the received command data sum value. “Command” indicates that received commands corresponding to various commands (for example, a start command, a reel stop command, a no-operation command, etc.) transmitted by the main CPU 93 are “01H” to “10H” (01H and 10H “ “H” means a hexadecimal number. For example, 10H indicates a command error that occurs in cases other than “16” in decimal. In this embodiment, the calculation of the sum value is obtained by addition. However, the present invention is not limited to this, and the sum value may be obtained by calculation by subtraction or exclusive OR.

  Furthermore, “reception abnormality” refers to a main-sub reception error that occurs when data received from the main CPU 93 has a physical layer error (parity, framing, overrun) and communication between the sub CPU and sound IC. It includes a reception error between sound ICs that occurs when there is an abnormality, and a reception error between LED boards that occurs when there is an abnormality in communication between the sub CPU and the LED board.

  In addition, “no communication” and “reception abnormality” are assigned to “sound” as various errors relating to various devices (sound IC, amplifier) mounted on the sound I / O board 71 (see FIG. 3). Yes.

  In addition, “no communication” and “reception abnormality” are assigned to the “lamp” as various errors relating to the device (I2C communication IC) mounted on the LED board 72 (see FIG. 3).

  In addition, various errors relating to various sensors (the origin sensor 270, the lowering sensor 271 and the rotation sensor 272) connected to the shutter control board 78 (see FIG. 3) are assigned to the “shutter”.

  For example, “rotation” means that the shutter is at the rotation origin by the rotation sensor 272 (see FIG. 6) even when the number of pulses exceeds “300” when the shutter is rotated according to the operation sequence shown in the shutter operation data Y7, Y8. Or, it indicates an abnormal operation of the rotary motor 231 that occurs when it is not detected that the shutter is in an inverted state.

  “Right (down)” detects that the shutter is lowered by the lowering sensor 271 (see FIG. 6) even when the number of pulses exceeds “300” when the shutter is closed according to the operation sequence indicated by the shutter operation data Y1. This shows an abnormality in the operation of the lifting motors 240A and 240B that occurs when not performed.

  “Left (upper)” indicates that the shutter is at the origin by the origin sensor 270 (see FIG. 6) even when the number of pulses exceeds “300” when the shutter is opened according to the operation sequence shown in the shutter operation data Y3. It shows an abnormality in the operation of the lifting motors 240A and 240B that occurs when not detected.

  When at least one of the various error factors described above is set in the error management area of the sub RAM 104, an error screen is displayed on the liquid crystal display device 11 as in the display example shown in FIG.

  In the error screen, an abbreviation (for example, “CE” to “DO” surrounded by a square in the vicinity of the middle stage in FIG. 166) in order to make it easier to understand the error that is occurring with respect to the error detected by the main CPU 93. Is highlighted. Thereby, it can be easily recognized from the outside which error is occurring.

[Main control processing]
The main CPU 93 of the main control board 41 executes various processes according to the flowcharts shown in FIGS.

<Main control processing>
FIG. 84 is a flowchart showing the main control process. The main control process described below starts when the pachislot machine 1 is powered on.

  First, when the pachislot machine 1 is powered on, the main CPU 93 executes the power-on process shown in FIG. 85 (S10). In this power-on process, it is determined whether the backup is normal or the setting has been changed appropriately, and an initialization process is executed according to the determination result.

  Next, the main CPU 93 executes an initialization process at the end of one game (one unit game) (S11). In this initialization process, for example, a storage area designated in advance to be initialized at the end of one game is initialized. By this initialization process, data stored in the internal winning combination storing area, the display combining storage area, etc. of the main RAM 95 is cleared.

  Next, the main CPU 93 executes medal acceptance / start check processing shown in FIG. 86 (S12). In the medal acceptance / start check process, a process for detecting a medal inserted by the player and a process for detecting a start operation are executed.

  Next, the main CPU 93 extracts three random number values (random number values 1 to 3) and stores them in a random number storage area assigned to the main RAM 95 (S13). Here, the random value 1 is a value used for the internal lottery process, and is extracted from 0 to 65535 in the present embodiment.

  The random numbers 2 and 3 are values used for other lottery processing, and are extracted from 0 to 65535 and 0 to 255, respectively, in the present embodiment. The main CPU 93 does not always need to extract the random number values 2 and 3 in step S13, and may extract the random number values 2 and 3 only when the use occurs.

  Next, the main CPU 93 executes an internal lottery process shown in FIG. 88 (S14). The main CPU 93 that executes the internal lottery process constitutes an internal winning combination determining means.

  Next, the main CPU 93 executes special counter processing shown in FIG. 89 (S15). In this special counter process, the main CPU 93 determines whether or not to add a reference value for the number of games in the ART gaming state, that is, whether or not to add the number of ART games, and to add the number of games in the ART gaming state. In this case, a reference value for the addition number is determined.

  Next, the main CPU 93 executes a reel stop initial setting process shown in FIG. 90 (S16). By this reel stop initial setting process, each piece of information (for example, stop table number) related to reel stop control is stored in the corresponding area of the main RAM 95 based on the result of the internal lottery process (internal winning combination).

  Next, the main CPU 93 generates start command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated start command data in the communication data storage area assigned to the main RAM 95 (S17).

  The start command data represents, for example, a game state flag type, an internal winning combination type, an effect number for an effect, a special counter, and the like.

  Next, the main CPU 93 executes a wait process (S18). In this wait process, it is determined whether or not a predetermined time has elapsed since the start of the previous game (start of the previous unit game), and if it is determined that the predetermined time has not elapsed, the predetermined time has elapsed. Wait until you are digested. The predetermined time in the wait process, that is, the wait time is set to 4.1 seconds from the start of the previous unit game, for example.

  Next, the main CPU 93 executes reel rotation start processing for rotating all the reels 3L, 3C, 3R according to the number of inserted medals (S19). With the reel rotation start process, “0000111” is stored in the operation stop button storage area (see FIG. 50).

  The reel rotation start process is executed by the interrupt process shown in FIG. This interrupt process is a process executed at a constant cycle (1.1172 ms). By this interruption process, the driving of the stepping motors 51L, 51C, 51R is controlled, and the rotation of the reels 3L, 3C, 3R starts.

  Thereafter, the driving of the stepping motors 51L, 51C, 51R is controlled by this interruption process, and the reels 3L, 3C, 3R are accelerated until the rotation reaches a constant speed. Further, when the rotation of the reels 3L, 3C, 3R reaches a constant speed, the driving of the stepping motors 51L, 51C, 51R is controlled by this interruption process so that the reels 3L, 3C, 3R rotate at a constant speed. Maintained.

  The main CPU 93 executes the reel effect in the reel rotation start process when executing the reel effect that irregularly drives at least one of the reels 3L, 3C, and 3R during the lock effect.

  As described above, the main CPU 93 executes the lock effect of the reels 3L, 3C, and 3R for a predetermined period on condition that a specific condition in which any one of the lock numbers described later is selected from “1” to “6” is satisfied. The lock execution means is configured.

  Next, the main CPU 93 generates reel rotation start command data to be transmitted from the main control board 41 to the sub control board 42 and stores the generated reel rotation start command data in a communication data storage area assigned to the main RAM 95 ( S20).

  By receiving this reel rotation start command data, the sub-control board 42 can recognize the start of reel rotation, and can determine the timing for executing various effects.

  Next, the main CPU 93 executes a pull-in priority storage process (S21). In this pull-in priority storage process, a pull-in priority table selection process shown in FIG. 92 is executed to determine the pull-in priority of all symbols on the reels 3L, 3C, 3R that are rotating. That is, in the pull-in priority storage process, stop information is stored in the pull-in priority data storage area shown in FIG. 52 for each symbol position of each rotating reel based on the internal winning combination.

  For example, for each symbol of each reel 3L, 3C, 3R, if the corresponding symbol is permitted to stop, the drawing priority data is stored in the drawing priority data storage area based on the priority table, and the stop is not stopped. In the case of permission (for example, a case where an internal winning combination is won), data indicating suspension prohibition is stored in the drawing priority data storage area.

  Next, the main CPU 93 executes a reel stop control process shown in FIG. 94 (S22). By this process, the stop control of the reels 3L, 3C, 3R is performed. Next, the main CPU 93 executes a winning search process (S23).

  In this winning search process, all the reels 3L, 3C, 3R are stopped, and after the stop state of the stop button corresponding to the reel that was last stopped by the player is released, it is displayed on the activated winning line. The symbol combination and the symbol combination table are collated to determine the symbol combination displayed on the winning line.

  Also, when the symbol combination displayed on the winning line is determined, the combination of the internal winning combination and the symbol are collated, and it is determined whether or not the symbol can be displayed on the winning line with the combination of symbols corresponding to the internal winning combination. When a symbol combination that does not correspond to the internal winning combination is displayed on the winning line, the main CPU 93 determines that an illegal hit error has occurred.

  If it is determined that an error has occurred, the main CPU 93 sets the error that has occurred in the error storage area assigned to the main RAM 95, and notifies the sub CPU 102 that an error has occurred. Are stored in the communication data storage area allocated to the main RAM 95.

  Specifically, the data stored in the symbol code storage area (see FIG. 47) and the data in the symbol combination table (see FIGS. 16 and 17) are collated, and the collation result is stored in the display combination storage area. The

  More specifically, the data in the symbol code storage area is copied as it is into the display combination storage area. At this time, the payout number is obtained by referring to the symbol combination table. By the winning search process, the combination of symbols displayed on the display windows 4L, 4C, 4R is specified by stopping all the reels 3L, 3C, 3R.

  Next, the main CPU 93 executes RT transition processing for transitioning the RT gaming state in accordance with the symbol combination displayed on the winning line in accordance with the transition shown in the RT gaming state transition transition diagram shown in FIG. (S24).

  Next, the main CPU 93 executes payout of the number of medals according to the displayed symbol combination based on the result of the winning search process (S25). Along with this medal payout process, the control of the hopper device 43 and the update of the credit number are performed based on the payout number counter.

  In the medal payout process, the payout operation of the hopper device 43 is monitored when the payout of the hopper device 43 is executed. Specifically, the main CPU 93 detects a payout medal with a payout medal detection sensor (not shown) in the hopper device 43 when a payout control command is issued to the hopper device 43 in units of payout medals. When it is not possible, it is determined that there is no payout medal in the hopper device 43, a hopper empty error, and a payout medal is detected, but the state where the medal is detected has passed for a certain time (for example, 500 ms) It is determined that there is a hopper jam error.

  If it is determined that an error has occurred, the main CPU 93 sets the error that has occurred in the error storage area assigned to the main RAM 95, and notifies the sub CPU 102 that an error has occurred. Are stored in the communication data storage area allocated to the main RAM 95.

  Then, after the error command transmission process is executed, the progress of the game is continued until the cause of the error occurring in the hopper device 43 is canceled (for example, if the hopper empty error, the payout medal is supplied to the hopper device 43). The error code generated on the 7-segment display 48 is displayed (for example, the sub CPU 102 displays an error screen indicating that an error is occurring on the liquid crystal display device 11).

  Further, when the cause of the error of the hopper device 43 is canceled, the error set in the error storage area of the main RAM 95 is canceled, and the error command data is sent to the main CPU in order to notify the sub CPU 102 that the error has been canceled. An error command transmission process for storing in a communication data storage area allocated to the RAM 95 is executed (not shown). In the error command data, for example, the error release state set in the error storage area is stored in the communication data storage area, and the game is resumed.

  Next, the main CPU 93 generates winning action command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated winning action command data in a communication data storage area assigned to the main RAM 95 (S26). . The winning operation command data represents, for example, the type of display combination, the number of medals paid out, and the like.

  Next, the main CPU 93 executes a bonus end check process shown in FIG. 95 (S27). By this bonus end check process, when the CB or MB end condition is satisfied, a process for ending the operation of the CB or MB is executed.

  Next, the main CPU 93 executes a bonus operation check process shown in FIG. 96 (S28). By this bonus operation check processing, processing for operating the CB or MB based on the combination of symbols displayed by the reels 3L, 3C, 3R is executed. After executing the process of step S28, the main CPU 93 executes the process of step S11.

<Power-on processing>
FIG. 85 is a flowchart showing the power-on process executed in step S10 of the main control process shown in FIG.

  First, the main CPU 93 determines whether the backup is normal (S30). In this determination process, it is determined whether the backup is normal or not by error detection using the checksum value.

  For example, the main CPU 93 stores the set value of the pachislot machine 1 and the checksum value calculated from the set value when the power is turned off in the main RAM 95 as backup data, and the determination process when the power is turned on (S30). , The set value and the checksum value stored in the main RAM 95 are read out.

  Here, the main CPU 93 compares the checksum calculated from the read set value and the checksum that has been backed up, and determines that the backup is normal if the comparison results match.

  When determining that the backup is normal (YES), the main CPU 93 sets the backed up setting values and the like (S31). As a result, when the backup is normal, the set value before the power is turned off is set.

  After executing the process of step S31 or when determining that the backup is not normal in step S30 (NO), the main CPU 93 has the setting change switch provided in the cabinet 2a of the pachislot machine 1 turned on. Whether or not (S32). Here, if it is determined that the setting change switch is ON (YES), the main CPU 93 executes initialization processing at the time of setting change (S33).

  In the initialization process at the time of changing the setting, for example, the data stored in the internal winning combination storing area and the display winning combination storing area of the main RAM 95 are cleared and the set value is cleared.

  Next, the main CPU 93 generates initialization command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated initialization command data in the communication data storage area assigned to the main RAM 95 (S34). . The initialization command data represents, for example, the presence / absence of a setting value change and a setting value.

  Next, the main CPU 93 executes a set value change process (S35). In this setting value changing process, for example, the setting value is selected from 1 to 6 according to the operation result of the reset switch, and the setting value selected when the start lever 16 is operated is confirmed.

  Next, the main CPU 93 determines whether or not the setting change switch is in the on state (S36), and repeatedly executes the process of step S36 until a determination result that is not in the on state is obtained.

  Here, when a determination result that the setting change switch is not in the on state is obtained (NO), the main CPU 93 generates and generates initialization command data to be transmitted from the main control board 41 to the sub-control board 42. The initialization command data is stored in the communication data storage area assigned to the main RAM 95 (S37), and the power-on process is terminated.

  In step S32, when determining that the setting change switch is not on (NO), the main CPU 93 determines whether the backup is normal (S38). If it is determined that the backup is not normal (NO), the main CPU 93 executes an error process at power-on (S39).

  In power-on error processing, the main CPU 93 displays an error display or the like indicating that the backup is not normal. Note that the main CPU 93 does not release the error state depending on the operation of the stop release switch or the reset switch in the state where the backup is not normal (backup error), and a new setting change has been made. Only when the error state is cleared.

  If it is determined in step S38 that the backup is normal (YES), the main CPU 93 restores the state of the pachislot machine 1 to the state before the power is turned off based on the backup data stored in the main RAM 95. (S40), the power-on process is terminated.

<Medal reception / start check processing>
FIG. 86 is a flowchart showing the medal acceptance / start check process executed in step S12 of the main control process shown in FIG.

  First, the main CPU 93 determines whether or not there is an automatic insertion request (S50). When a replay role is won in the previous unit game, medals are automatically inserted in the current unit game. That is, in the determination process in step S50, it may be determined whether or not a replay combination has been won in the previous unit game.

  If it is determined in step S50 that there is an automatic insertion request (YES), the main CPU 93 executes an automatic insertion process shown in FIG. 87 (S51). In the automatic insertion process, the same number of medals as the medals inserted in the previous unit game are automatically inserted.

  Subsequently, the main CPU 93 generates medal insertion command data to be transmitted from the main control board 41 to the sub control board 42 and stores the generated medal insertion command data in a communication data storage area assigned to the main RAM 95. A transmission process is executed (S52). Here, the medal insertion command data represents, for example, the presence / absence of medal insertion, the value of the inserted number counter, the value of the credit counter, and the like.

  In step S50, when the main CPU 93 determines that there is no automatic insertion request (NO), it accepts acceptance of medals (S53). For example, the main CPU 93 drives a solenoid of a selector (not shown) to form a path so that the medal inserted into the medal slot 13 passes through the selector.

  In step S50, when the main CPU 93 determines that there is an automatic insertion request (YES), the medal acceptance is prohibited from the previous unit game, so the processing related to the medal acceptance is performed. Does not execute.

  After the process of step S52 or S53 is executed, the main CPU 93 sets the maximum value of the number of inserted medals according to the gaming state (S54). In the present embodiment, the maximum value of the number of inserted medals is 3.

  Next, the main CPU 93 determines whether or not acceptance of medals is permitted (S55). If it is determined that the acceptance of medals is permitted (YES), the main CPU 93 executes a medal insertion check process for checking the number of inserted medals (S56). In this medal insertion check process, the value of the insertion number counter is updated according to the number of checked medals.

  However, in this medal insertion check process, when the medal sensor 46 detects that a medal has passed through the selector, the medal sensor 46 is monitored to determine the medal passing state in the selector, and the medal An error assigned to the main RAM 95 is an error relating to a inserted medal when the state of the sensor 46 is different from that at the time of inserting a normal medal (for example, when the medal sensor 46 is ON and held for 100 ms or more). An error command transmission process is executed to store the error command data in the communication data storage area set in the storage area and assigned to the main RAM 95 (not shown). Here, for error command data, for example, the error occurrence state set in the error storage area is stored in the communication data storage area.

  The progress of the game is interrupted until the cause of the error occurring in the selector is canceled (for example, the error code generated on the 7-segment display 48 is displayed, and the sub CPU 102 generates an error on the liquid crystal display device 11. Error screen is displayed).

  Further, by canceling the cause of the error in the selector, the error set in the error storage area of the main RAM 95 is canceled, and the error command data is sent to the main RAM 95 in order to notify the sub CPU 102 that the error has been canceled. An error command transmission process for storing in the communication data storage area assigned to is executed (not shown). In the error command data, for example, the error release state set in the error storage area is stored in the communication data storage area, and the game is resumed.

  The medal sensor 46 includes two photo sensors arranged at two positions on the medal passage rail in the selector, and monitors the states of two photo sensors (for example, an upstream medal sensor and a downstream medal sensor). Inserted medal passage check error (when the upstream medal sensor is turned on without the upstream medal sensor being turned on), inserted medal passage time error (upstream medal sensor or downstream medal is turned on) If one of the sensors is in the ON state for 100 ms or more) and the inserted medal reverse error (when the upstream medal sensor is in the ON state after the downstream medal sensor is in the ON state) can do.

  Subsequently, the main CPU 93 generates medal insertion command data to be transmitted from the main control board 41 to the sub control board 42 and stores the generated medal insertion command data in a communication data storage area assigned to the main RAM 95. A transmission process is executed (S57).

  Next, the main CPU 93 determines whether or not medals can be inserted or credited (S58). In the present embodiment, the main CPU 93 satisfies the condition on condition that the number of inserted sheets is 3 and the credit is 50, or that the automatic loading process of step S51 is executed. Sometimes it is determined that a medal cannot be inserted or credited, and when the condition is not satisfied, it is determined that a medal can be inserted or credited.

  If it is determined in step S58 that medals cannot be inserted or credited (NO), the main CPU 93 prohibits the acceptance of medals (S59). For example, the main CPU 93 forms a path through which medals inserted into the medal insertion slot 13 are discharged from the medal payout opening 21 without driving the selector solenoid.

  If it is determined in step S55 that acceptance of medals is not permitted (NO), if it is determined in step S58 that medals can be inserted or credited (YES), or after the processing of step S59 is executed. The main CPU 93 determines whether or not the number of inserted medals is the number that can start the game (S60).

  That is, the main CPU 93 determines whether or not the number of medals inserted is a number that can start a unit game according to the gaming state. In the present embodiment, the main CPU 93 determines whether or not three medals have been inserted.

  Here, when it is determined that the number of inserted medals is not the number that can start the game (NO), the main CPU 93 executes the process of step S55. On the other hand, if it is determined that the number of inserted medals is the number that can start the game (YES), the main CPU 93 determines whether or not the start switch 64 is on (S61).

  If it is determined that the start switch 64 is not turned on (NO), the main CPU 93 executes the process of step S55. On the other hand, if it is determined that the start switch 64 is on (YES), the main CPU 93 prohibits medal acceptance (S62) and ends the medal acceptance / start check process.

<Automatic input processing>
FIG. 87 is a flowchart showing the automatic insertion process executed in step S51 of the medal acceptance / start check process shown in FIG.

  First, the main CPU 93 determines whether or not the value of the pseudo BB counter is greater than 0 (S70). If it is determined that the value of the pseudo BB counter is greater than 0 (YES), the main CPU 93 decrements the value of the pseudo BB counter by 1 (S71).

  Next, the main CPU 93 determines whether or not the value of the pseudo BB counter is 0 (S72). If it is determined that the value of the pseudo BB counter is 0 (YES), the main CPU 93 sets a lock at the end of the pseudo BB (for example, 5 seconds) (S73).

  Next, the main CPU 93 determines whether or not the MAX bet button 14 has been operated (S74). If it is determined that the MAX bet button 14 has not been operated (NO), the main CPU 93 executes the process of step S74. That is, the game cannot be played until the MAX bet button 14 is operated.

  On the other hand, if it is determined that the MAX bet button 14 has been operated (YES), the main CPU 93 releases the lock at the end of the pseudo BB (S75). Thus, the main CPU 93 constitutes a lock release unit.

  Next, the main CPU 93 generates pseudo BB end unlock release command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated pseudo BB end unlock release command data in the communication data storage allocated to the main RAM 95. An unlock command transmission process at the end of the pseudo BB stored in the area is executed (S76).

  In this way, the main CPU 93 transmits the lock release command data at the end of the pseudo BB from the main control board 41 to the sub control board 42, so that the pseudo BB ends and the lock at the end of the pseudo BB is released. The content of the effect can be changed to the sub-control board 42 side by adding the number of games in the ART gaming state. Specifically, the main CPU 93 can notify the player on the sub-control board 42 side that the number of games in the ART gaming state has been added.

  If it is determined in step S70 that the value of the pseudo BB counter is not greater than 0 (NO), if it is determined in step S72 that the value of the pseudo BB counter is not 0 (NO), or the process of step S76 is executed. After that, the main CPU 93 sets the number of inserted coins equal to the number of inserted coins in the previous unit game (S77), and ends the automatic loading process. Specifically, the main CPU 93 copies the automatic loading counter to the loading number counter, clears the automatic loading counter, and ends the automatic loading process.

<Internal lottery processing>
FIG. 88 is a flowchart showing an internal lottery process executed in step S14 of the main control process shown in FIG.

  First, the main CPU 93 sets an internal lottery table corresponding to the main gaming state and the RT gaming state in the main RAM 95 (S80). Specifically, the main CPU 93 sets the internal lottery table shown in any of FIGS. 20 to 31 in the main RAM 95 according to the gaming state.

  Next, the main CPU 93 obtains a random value stored in the random value storage area (S81). Next, the main CPU 93 determines an internal winning combination based on the acquired random number value and the set internal lottery table, and stores it in the internal winning combination storing area (S82).

  Based on the internal winning combination stored in the internal winning combination storing area, the lock effect lottery table (not shown) corresponding to the game state, and the random number for locking (refresh register built in the main CPU 93), the lock number is determined. (S83), stored in the lottery result lock number storage area (S84).

  In the present embodiment, the main CPU 93 obtains a random number value from the refresh register built in the main CPU 93 as the lock random number value. However, the present invention is not limited to this, and an interrupt process described later (FIG. 97). The software random number may be generated according to (see), and the generated random number value may be used, or the random number value may be acquired from a random number generation circuit built in the main CPU 93. Further, a random number generation circuit may be provided on the main control board 41 so that a random value is acquired from the random number generation circuit.

  Also, the lock numbers obtained from the lock number lottery are determined from 0 to 5, and the main winning combinations are “unquestion 7”, “unquestion 77”, “unquestion tempe”, “confirmation bell”, “ When “watermelon”, “chance eye A”, “chance eye B”, “chance eye C”, “weak cherry”, “strong cherry” is won, 1 to 5 are determined as lock numbers. In this way, the main CPU 93 that executes the lock number lottery process in step S83 constitutes a short lock determination means.

  Next, the main CPU 93 determines whether or not the value of the carryover combination storage area (see FIG. 48) is “0” (S85). In this determination process, it is determined whether or not bit 3 corresponding to “MB” in the carryover storage area is set to “1”.

  If it is determined in step S85 that the value of the carryover combination storage area is not “0” (NO), the main CPU 93 ends the internal lottery process. On the other hand, when it is determined that the value of the carryover combination storage area is “0” (YES), the main CPU 93 determines the internal winning combination defined as the carryover combination among the internal winning combinations stored in the internal winning combination storage area. The combination (for example, MB) is stored in the carryover combination storage area (see FIG. 48) (S86). In the process of step S86, for example, when “MB” is acquired as the internal winning combination, bit 3 corresponding to “MB” in the carryover combination storing area is set to “1”, and the internal lottery processing is ended.

<Special counter processing>
FIG. 89 is a flowchart showing the special counter process executed in step S15 of the main control process shown in FIG.

  First, the main CPU 93 determines whether or not the value of the special counter is greater than 0 (S90). Here, the main CPU 93 determines whether or not the special counter is operating. That is, if the value of the special counter is greater than 0, it can be determined that the special counter is operating.

  If it is determined in step S90 that the value of the special counter is not greater than 0 (NO), the main CPU 93 determines whether or not the gaming state satisfies a predetermined count start condition. It is determined whether or not (S91). If it is determined in step S90 that the value of the special counter is greater than 0 (YES) or if it is determined in step S91 that the MB is winning internally (YES), the main CPU 93 acquires or generates a random number. Then, the special counter addition lottery for determining whether or not to add the value of the special counter is performed based on the lottery (first probability) based on the special counter addition lottery table shown in FIG. 41 (S92).

  Next, the main CPU 93 determines whether or not a special counter addition lottery has been won (S93). If it is determined that the special counter addition lottery has been won, the main CPU 93 adds “1” to the value of the special counter (S94). That is, the main CPU 93 counts up the special counter. The value of the special counter is processed so as not to exceed 127. Thus, the main CPU 93 constitutes counting means.

  In step S93, the main CPU 93 determines whether or not the count end condition is satisfied. Specifically, the main CPU 93 obtains or generates a random number, and determines whether or not to add an ART game by the sub CPU 102 according to the value of the special counter by lottery based on the release lottery table shown in FIG. A release lottery (second probability) is determined (S95).

  Next, the main CPU 93 determines whether or not the release lottery has been won (S96). If it is determined that the release lottery has been won, the main CPU 93 sets a valid flag in the special counter (sets 1 to Bit7) and locks. “6” is set in the lock number storage area of the main RAM 95 so as to produce an effect (S97), and the special counter process is terminated.

  In this way, the main CPU 93 constitutes count determination means for determining whether or not to enable the value of the special counter when the count end condition is satisfied. The special counter is allocated as a 1-byte (8-bit) area in the main RAM 95, the valid range of the count value is 0 to 127 (Bit 0 to Bit 6), and Bit 7 is allocated to set the result of the release lottery. It is. Thus, the main CPU 93 that executes the process of S97 constitutes a long lock determining means.

  In addition, the main CPU 93 has a short lock determining means configured when the lock number determined by the internal lottery process is “0” to “5”, and the lock number determined by the special counter process is “6”. In the case where it is determined that the lock effect is to be performed by the long lock determination unit configured as described above, the lock unit is configured to perform a lock that invalidates the stop operation for a predetermined period.

  In the lock effect performed in accordance with the lock number “6”, a reel effect having a length corresponding to the count number determined by the special counter is performed unless the MAX bet button 14 is operated.

  For example, when performing a reel effect set to 20 seconds per count, if the value of the special counter is 10, the reel effect is performed for 200 seconds with 20 seconds as 10 sets. As a predetermined condition, a MAX bet button The reel effect is canceled by operating 14.

  Therefore, when the value of the special counter is 10, the player can cancel the reel effect and release the lock by operating the MAX bet button 14 every time the reel effect occurs. The predetermined operation is not limited to the operation of the MAX bet button 14, but may be an operation of the start lever 16 or the stop buttons 17L, 17C, and 17R.

  On the other hand, if it is determined that the lottery is not won, the main CPU 93 resets the value of the special counter to 0 and ends the special counter process.

  In the above-described special counter processing, the main CPU 93 has been described with respect to an example in which the value of the special counter is added on the condition that the MB is won internally. Instead, the RT gaming state is the RT4 gaming state. The value of the special counter may be added on the condition that the process has shifted to

  In addition, in step S97 of the special counter process described above, every time a lock effect set in the main RAM 95 is executed, for example, the sub CPU 102 adds 100 games to the number of ART games. That is, if the value of the special counter when winning the release lottery is “3”, the sub CPU 102 adds 300 games to the number of ART games.

  In step S91 of the special counter process described above, when the main CPU 93 determines that the MB is won internally, the main CPU 93 starts addition of the special counter through the special counter addition lottery (steps S92 and S93). The addition of the special counter may be started in accordance with the transition of the RT gaming state.

  Further, the addition of the number of games of ART may be made to notify the sub CPU 102 of the added number of games together with the reel effect after two games after the transition from the RT4 gaming state to the RT3 gaming state.

<Reel stop initial setting process>
FIG. 90 is a flowchart showing the reel stop initial setting process executed in step S16 of the main control process shown in FIG.

  First, the main CPU 93 refers to the spinning cylinder stop initial setting table, and acquires the spinning cylinder stop number based on the internal winning combination or the like (S100). The rotation stop initial setting table is a table in which various information used for stop control is defined in association with the number of rotation stop corresponding to the number of throws and the internal winning combination.

  Next, the main CPU 93 refers to the spinning cylinder stop initial setting table and acquires each piece of information based on the spinning cylinder stop number (S101). In this process, the main CPU 93, for example, the number of the stop table used at the time of the first to third stops and the information necessary for performing the control change in the control change process (that is, the reels 3L, 3C, 3R are in a specific order) When the information is stopped at (1), information used for reselecting the stop table is acquired when the information is stopped (or pressed) at a specific position.

  The stop table stores information on the number of sliding pieces for the pressed position, either directly or indirectly. Using this information, there is a limit that does not cause a disadvantage to the player and does not cause an erroneous winning prize. Are configured to stop at a stop position intended by the developer.

  Subsequently, the main CPU 93 stores the rotating identifier in the symbol code storage area (see FIG. 47) (S102). That is, the main CPU 93 sets the bits of all symbol code storage areas (excluding unused areas) to “1”.

  Next, the main CPU 93 stores 3 in the stop button non-operation counter (S103) and ends the reel stop initial setting process. The stop button non-operating counter is used for determining the number of stop buttons 17L, 17C, and 17R that are not stopped by the player, and is stored in a predetermined area of the main RAM 95.

<Retrieve priority storage process>
FIG. 91 is a flowchart showing the pull-in priority storage process executed in step S21 of the main control process shown in FIG. 84 and step S165 of the reel stop control process shown in FIG.

  First, the main CPU 93 stores the value of the stop button non-operating counter as the number of searches in the main RAM 95 (S110). Next, the main CPU 93 executes a search target reel determination process for determining a search target reel (S111). In this process, among the rotating reels, for example, one reel on the left side is determined as a search target reel.

  Next, the main CPU 93 executes a pull-in priority table selection process shown in FIG. 92 (S112). In this pull-in priority table selection process, one pull-in priority table number is selected from the pull-in priority table (see FIG. 33).

  Next, the main CPU 93 sets 21 (the number of symbols on each reel) to the number of symbol checks stored in the main RAM 95 and sets 0 to the search symbol position (S113).

  Next, the main CPU 93 executes a symbol code storage process shown in FIG. 93 (S114). In the symbol code storage process, a symbol code of the symbol position data for checking for checking the symbol position of the rotating reel is acquired.

  Next, the main CPU 93 updates the display combination storing area (see FIG. 46) based on the acquired symbol code and the symbol code storing area (see FIG. 47) (S115). Next, the main CPU 93 executes a pull-in priority data acquisition process (S116).

  In the pull-in priority data acquisition process, in step S112, for the combination in which the corresponding bit is 1 in the display combination storing area and the corresponding bit is 1 in the internal winning combination storage area (see FIG. 45). With reference to the selected pull-in priority table, pull-in priority data is acquired.

  In the drawing priority order data acquisition process, “stop prohibition” (000H) is set for the symbol positions that are erroneously won when stopped, and no internal winnings are made. For the symbol position, “stoppable” (001H) is set.

  Next, the main CPU 93 stores the acquired drawing priority data in the drawing priority data storage area corresponding to the search target reel (S117). Next, the main CPU 93 subtracts 1 from the number of symbol checks, and adds 1 to the retrieved symbol position (S118).

  Next, the main CPU 93 determines whether or not the number of symbol checks is 0 (S119). Here, when it is determined that the number of symbol checks is not 0 (NO), the main CPU 93 executes the process of step S114.

  On the other hand, when it is determined that the number of symbol checks is 0 (YES), the main CPU 93 determines whether or not a search for the number of searches has been executed (S120). If it is determined that the search for the number of times of search has been executed (YES), the main CPU 93 ends the pull-in priority storage process. On the other hand, if it is determined that the search for the number of times of search has not been executed (NO), the main CPU 93 executes the process of step S111.

<Pull-in priority table selection processing>
FIG. 92 is a flowchart showing the pull-in priority table selection process executed in step S112 of the pull-in priority storing process shown in FIG.

  First, the main CPU 93 determines whether or not pull-in priority table selection data is set (S130). If it is determined that the pull-in priority table selection data is set (YES), the main CPU 93 refers to the pressing order storage area (see FIG. 51) and the operation stop button storage area (see FIG. 50). Then, a drawing priority table number corresponding to the drawing priority table selection data is set from the drawing priority table selection table (not shown) (S131), and a drawing priority table corresponding to the drawing priority table number is set ( S132), the pull-in priority table selection process is terminated.

  On the other hand, if it is determined that the pull-in priority table selection data is not set (NO), the main CPU 93 sets a pull-in priority table corresponding to the pull-in priority table number (S132), and the pull-in priority table The selection process ends.

<Design code storage processing>
FIG. 93 is a flowchart showing the symbol code storing process executed in step S114 of the drawing priority order storing process shown in FIG. 91 and in step S159 of the reel stop control process shown in FIG.

  First, the main CPU 93 sets valid line data (S140). In the present embodiment, the main CPU 93 sets a center line as an effective line. Next, the main CPU 93 sets check symbol position data for the search target reel based on the search symbol position and the effective line data (S141). In the present embodiment, the main CPU 93 sets the middle symbol position of the left reel 3L as check symbol position data.

  Next, the main CPU 93 acquires the symbol code of the symbol position data for check (S142), and ends the symbol code storage process.

<Reel stop control process>
FIG. 94 is a flowchart showing the reel stop control process executed in step S22 of the main control process shown in FIG.

  First, the main CPU 93 determines whether or not a valid stop button has been pressed (S150). This process is a process for determining whether or not a signal is output from the stop switch 7S. If the main CPU 93 determines that a valid stop button has not been pressed (NO), the main CPU 93 repeatedly executes the process of step S150.

  On the other hand, if the main CPU 93 determines that a valid stop button has been pressed (YES), the main CPU 93 determines the pressing order storage area (see FIG. 51) and the operation stop button storage area (see FIG. 51) according to the pressed stop button. 50) is updated (S151).

  Here, the main CPU 93 stores the type of the operation stop button corresponding to each of the first stop operation, the second stop operation, and the third stop operation in the pressing order storage area (see FIG. 51). , It is possible to determine the pressing order of the stop buttons 17L, 17C, and 17R.

  Subsequently, the main CPU 93 subtracts 1 from the stop button non-operation counter (S152), determines a search target reel from the operation stop button (S153), and stores the stop start position in the main RAM 95 based on the symbol counter (S153). S154). The stop start position is a symbol position corresponding to the symbol counter of the reel when the stop operation is detected by the stop switch 7S.

  Next, the main CPU 93 executes a sliding piece number determination process (S155). In this sliding piece number determination process, the number of sliding pieces defined at the stop start position is determined based on the stop table selection data group selected based on the internal winning combination from the turning stop initial setting table (see FIG. 32). It is processing to do.

  Next, the main CPU 93 generates reel stop command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated reel stop command data in the communication data storage area assigned to the main RAM 95. A transmission process is executed (S156). This reel stop command data represents the type of reel to be stopped, the stop start position, the number of sliding pieces (or planned stop position), and the like.

  Next, the main CPU 93 determines a planned stop position based on the stop start position and the sliding piece number determination data, and stores it in the main RAM 95 (S157). The scheduled stop position is a symbol position obtained by adding any of predetermined numerical values “0” to “4” defined as the number of sliding pieces to the stop start position, and the symbol position where the reel rotation stops. It is.

  Next, the main CPU 93 sets the planned stop position as a search symbol position (S158). Next, the main CPU 93 executes a symbol code storing process shown in FIG. 93 (S159).

  Next, the main CPU 93 updates the symbol code storage area from the symbol code acquired in the symbol code storage process (S160). Next, the main CPU 93 performs a control change process (S161). In this control change process, the reel stop information group is updated when a specific stop position is reached.

  Next, the main CPU 93 determines whether or not the pressed stop button has been released (S162). This process is a process for determining whether or not a signal is no longer output from the stop switch 7S.

  When determining that the pressed stop button has not been released (NO), the main CPU 93 repeatedly executes the process of step S162. On the other hand, when determining that the pressed stop button has been released (YES), the main CPU 93 executes a reel stop command transmission process (S163).

  The reel stop command generated by this reel stop command transmission process includes information about the ON edge / OFF edge of the stop switch 7S. The ON edge / OFF edge information may be monitored by an interrupt process and transmitted to the sub-control board 42.

  Next, the main CPU 93 determines whether or not the stop button non-operation counter is 0 (S164). Here, when it is determined that the stop button non-operation counter is not 0 (NO), the main CPU 93 executes the pull-in priority storage process shown in FIG. 91 (S165), and executes the process of step S150. On the other hand, when it is determined that the stop button non-operation counter is 0 (YES), the main CPU 93 ends the reel stop control process.

<Bonus end check process>
FIG. 95 is a flowchart showing the bonus end check process executed in step S27 of the main control process shown in FIG.

  First, the main CPU 93 determines whether or not the main gaming state is the MB operating state, that is, whether or not the MB operating state flag stored in the gaming state flag storage area shown in FIG. 49 is ON (S280).

  If it is determined that the main game state is not the MB operating state (NO), the main CPU 93 ends the bonus end check process. On the other hand, when it is determined that the main game state is the MB operating state (YES), the main CPU 93 executes a CB end process for ending the CB (S281).

  Next, the main CPU 93 updates the bonus end number counter (S282). Next, the main CPU 93 determines whether or not the value of the bonus end number counter is smaller than “0” (S283).

  Here, if the value of the bonus end number counter is not smaller than “0”, that is, if the value of the bonus end number counter is “0” or more (NO), the main CPU 93 ends the bonus end check process. . On the other hand, when the value of the bonus end number counter is smaller than “0” (YES), the main CPU 93 executes MB end processing for turning off the MB operation state flag (S284).

  Next, the main CPU 93 generates bonus end time command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated bonus end time command data in the communication data storage area allocated to the main RAM 95. An hour command transmission process is executed (S285), and the bonus end check process is terminated.

<Bonus activation check process>
FIG. 96 is a flowchart showing the bonus operation check process executed in step S28 of the main control process shown in FIG.

  First, the main CPU 93 determines whether or not the MB is operating (S290). If it is determined that the MB is in operation (YES), the main CPU 93 executes a CB operation process for operating the CB (S291) and ends the bonus operation check process.

  On the other hand, if it is determined that the MB is not operating (NO), the main CPU 93 determines whether or not the MB has been won (S292). If it is determined that the MB has been won, the main CPU 93 executes MB operation processing for operating the MB (S293).

  Next, the main CPU 93 clears the value of the carryover combination storage area (S294). Thereafter, the main CPU 93 generates bonus start command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated bonus start command data in a communication data storage area allocated to the main RAM 95. The process is executed (S295), and the bonus operation check process is terminated.

  If it is determined in step S292 that the MB has not been won, the main CPU 93 determines whether or not a replay is displayed (S296). Specifically, the main CPU 93 determines whether or not a “replay-replay-replay” combination called “no transition lip” is displayed along the active line.

  When determining that the replay has not been displayed (NO), the main CPU 93 ends the bonus operation check process. On the other hand, if it is determined that the replay is displayed (YES), the main CPU 93 makes an automatic insertion request so that the automatic insertion process is executed in S51 of the medal acceptance / start check process shown in FIG. 86 (S297). .

  Next, the main CPU 93 determines whether or not RT5 Lip is displayed (S298). Specifically, the main CPU 93 determines whether any combination of “RT5 transition lip_1” to “RT5 transition lip_16” or “7 lip_RT5_01” to “7 lip_RT5_06” is displayed along the valid line. Judging. If it is determined that the RT5 lip is not displayed (NO), the main CPU 93 ends the bonus operation check process.

  On the other hand, if it is determined that the RT5 lip is displayed (YES), the main CPU 93 adds a predetermined number of games to the value of the pseudo BB, that is, the pseudo BB counter that counts the number of games in the RT5 gaming state (S299). In this embodiment, since the pseudo BB continues 50 games from the game in which the pseudo BB target replay is won internally, the predetermined number of games added to the value of the pseudo BB counter is 51.

<Interrupt processing under main CPU control>
FIG. 97 is a flowchart showing an interrupt process under the control of the main CPU 93. This process is executed every 1.1172 ms.

  First, the main CPU 93 saves the register (S320). Next, the main CPU 93 executes an input port check process shown in FIG. 98 (S321). In this process, the main CPU 93 confirms the presence / absence of a signal transmitted to the sub control board 42.

  For example, the main CPU 93 stores input state command data representing on-edge and off-edge information of various switches including the on-edge and off-edge of the start switch 64 and stop switch 7S in the communication data storage area of the main RAM 95.

  Next, the main CPU 93 executes timer update processing (S322). Subsequently, the main CPU 93 executes an effect timer update process (S323). Next, the main CPU 93 executes a reel control process for controlling the rotation of the reels 3L, 3C, 3R (S324).

  More specifically, the main CPU 93 starts the rotation of the reels 3L, 3C, and 3R in response to a request for starting the rotation of the reels 3L, 3C, and 3R, that is, in response to the start operation. Control is performed so that 3L, 3C, and 3R rotate. Further, the main CPU 93 performs control so that the rotation of the reels 3L, 3C, and 3R corresponding to the stop operation stops in response to the stop operation.

  Next, the main CPU 93 executes a lamp / 7SEG driving process (S325). For example, the main CPU 93 displays the number of credited medals, the number of payouts, etc. on various display units.

  Next, the main CPU 93 executes a data transmission process for transmitting command data to the sub CPU 102 (S326). The data transmission process will be described later with reference to FIG.

  Note that interrupts that occur periodically are generated every 1.1172 ms, but since new command data is not transmitted during transmission of command data, the actual interrupt is about 17 ms (15 interrupts). Command data is transmitted to the sub CPU 102 at intervals.

  Specifically, assuming that the transmission speed of command data is 4800 bps, in order to transmit 80-bit data in which a start bit and a stop bit are added every 8 bits to 8-byte command data, 80 bits / 4800 bps = 16.666... That is, since it takes about 17 ms, command data is actually transmitted to the sub CPU 102 at intervals of about 17 ms (15 interrupts).

  Next, the main CPU 93 restores the register (S327), and terminates the interrupt process that occurs periodically.

<Input port check processing>
FIG. 98 is a flowchart showing the input port check process executed in step S321 of the interrupt process under the control of the main CPU 93.

  First, the main CPU 93 stores the previous interrupt, that is, the state of the input port in the current input port state storage area of the main RAM 95 in the input port state storage area of the main RAM 95 one interrupt before (S331). The current input port state is stored in the current input port state storage area of the main RAM 95 (S332).

  In this way, the main CPU 93 can confirm the states of both input ports by making it possible to compare the state of the input port before one interrupt with the current state of the input port. Thus, it is checked whether the state of the input port has changed, for example, whether the MAX bet button 14 or the 1 bet button 15 has been pressed.

  Next, the main CPU 93 compares the input port state storage area before one interrupt with the current input port state storage area to generate the on-edge and off-edge states of the input port state, and sets the on-edge and off-edge states in the main RAM 95. The data is stored in the on-edge storage area and the on-edge storage area (S333), and the input port check process is terminated.

  In this embodiment, on-edge refers to the state when the button is pressed, off-edge refers to the state when the button is released, and in the state where the button is pressed from the on-edge state. In the next interrupt cycle, the on-edge state is released, and the off-edge state is also in the off-edge state only when the button is released.

  Although not particularly defined in the present embodiment, the input port is not limited to one (8 bits) input port, and usually there are a plurality of input ports, and there are a plurality of input ports. Signals corresponding to the number of bits assigned to each are input, start switch 64, stop switch 17S, MAX bet button 14, 1 bet button 15, medal insertion detection in the above-described medal acceptance / start check process, and reel 3L , 3C, 3R are assigned to reel index sensors (not shown) or the like.

<Data transmission process>
FIG. 99 is a flowchart showing the data transmission process executed in step S326 of the interrupt process under the control of the main CPU 93.

  First, the main CPU 93 determines whether or not there is an empty transmission port (S340). If it is determined that there is no available transmission port (NO), the main CPU 93 ends the data transmission process. Note that the state in which the transmission port is not empty means that the main CPU 93 is currently transmitting command data to the sub CPU 102.

  On the other hand, when it is determined that there is an empty transmission port (YES), the main CPU 93 determines whether there is transmission data as command data to be transmitted to the sub CPU 102 (S341).

  Specifically, the main CPU 93 determines that there is transmission data when command data (for example, start command data) is stored in the transmission data storage area allocated to the main RAM 95.

  If it is determined that there is no transmission data (NO), the main CPU 93 executes a no-operation command communication data storage process shown in FIG. 100 (S340). If it is determined in step S341 that there is transmission data (YES), or after executing the process of step S340, the main CPU 93 sets 8 as the data number counter for the number of data for one packet (S343).

  Next, the main CPU 93 sets the data stored in the communication data storage area in the transmission port (S344), and updates the address of the next data to be set in the transmission port in the communication data storage area, that is, 1 byte. The communication data storage area address to be added is updated (S345).

  Next, the main CPU 93 causes the data number counter to subtract 1 (S346). Next, the main CPU 93 determines whether or not the value of the data number counter is 0 (S347). If it is determined that the value of the data counter is not 0 (NO), the main CPU 93 returns the data transmission process to step S344.

  On the other hand, when determining that the value of the data number counter is 0 (YES), the main CPU 93 sets a transmission activation request for transmitting the transmission data set in the transmission port to the sub CPU 102 in the communication register port. (S348). Next, the main CPU 93 clears the communication data storage area (S349) and ends the data transmission process.

  Specifically, the main CPU 93 sets the command data to be transmitted to the sub CPU 102 for one packet (8 bytes) in the serial communication function (not shown) built in the main CPU 93, and then the communication register port of the serial communication function. The data transmission to the sub CPU 102 is started by setting a transmission request to.

  In the present embodiment, the main CPU 93 transmits command data to the sub CPU 102 using the serial communication function built in the main CPU 93, but the present invention is not limited to this, and the serial communication circuit is connected to the main control board 41. And the command data may be transmitted to the sub CPU 102 by the serial communication circuit.

<Non-operation command communication data storage processing>
FIG. 100 is a flowchart showing a non-operation command communication data storage process executed in step S342 of the data transmission process shown in FIG.

  First, the main CPU 93 determines whether or not there is an empty communication data storage area (S360). If it is determined that there is no free space in the communication data storage area (NO), the main CPU 93 ends the no-operation command communication data storage process.

  On the other hand, if it is determined that there is a free space in the communication data storage area (YES), the main CPU 93 stores a no-operation command (1 byte data) at the head (+0) of the free space in the communication data storage area (S361). ).

  Next, the main CPU 93 stores the current port state of the input port state storage area in an area (+1 to +6) following the area storing the no-operation command in the communication data storage area (S362).

  Next, the main CPU 93 creates SUM data (sum value) of the data (+0 to +6) stored in steps S361 and S362, and stores the SUM data (sum value) in the area (+7) following the area where the port state of the communication data storage area is stored. The created SUM data is stored (S363), and the no-operation command communication data storage process is terminated.

  In the present embodiment, a specific SUM calculation method is not specified, but SUM data (sum value) can be calculated by addition, for example. Further, the calculation method of the SUM data (sum value) is not limited to addition, and calculation by subtraction or exclusive OR may be used.

[Sub-control processing]
The sub CPU 102 of the sub control board 42 executes various processes according to the flowcharts shown in FIGS.

<Power-on processing>
FIG. 101 is a flowchart showing power-on processing of the sub CPU 102 at power-on.

  First, the sub CPU 102 executes an initialization process (S370). In this process, the sub CPU 102 performs error check of the sub RAM 104 and the like and initializes the task system. The task system sets the processing cycle waiting time for each of the lamp control task (4 ms), the sound control task (33 ms), and the shutter control task (1 ms).

  Next, the sub CPU 102 activates the lamp control task shown in FIG. 102 (S371). In the lamp control task, lighting states of various lamps of the LED group 25 are controlled via the LED substrate 72.

  Next, the sub CPU 102 activates the sound control task shown in FIG. 103 (S373). In the sound control task, the sub CPU 102 controls the sound output state from the speakers 23L and 23R via the sound I / O board 71.

  Next, the sub CPU 102 activates the shutter control task shown in FIG. 104 (S374). In the shutter control task, the shutter device 200 is controlled by the sub CPU 102 via the shutter control board 78.

  Next, the sub CPU 102 activates the main task shown in FIG. 107 (S375). In the main task, the sub CPU 102 executes drawing processing of the liquid crystal display device 11, processing at the time of error occurrence and error cancellation, and the like.

  Next, the sub CPU 102 activates the main board communication task shown in FIG. 110 (S376). In the main board communication task, the sub CPU 102 determines an effect performed in the pachislot machine 1 associated with reception and analysis of a command transmitted from the main control board 41.

  Next, the sub CPU 102 activates the animation task (S377). In the animation task, the sub CPU 102 selects an animation to be displayed on the liquid crystal display device 11 or the like.

  Next, the sub CPU 102 executes the power interruption recovery process shown in FIG. 128 (S378). In the power interruption recovery process, the sub CPU 102 executes a process when the power is supplied from the state where the power is not supplied to the sub control board 42.

<Ramp control task>
FIG. 102 is a flowchart showing the lamp control task activated in step S371 of the power-on process shown in FIG.

  First, the sub CPU 102 executes lamp related data initialization processing (S380). Next, the sub CPU 102 executes lamp data analysis processing (S381). The lamp data analysis process includes a plurality of effect LEDs provided at various locations of the pachislot machine 1 (for example, an effect LED group 25 disposed on the decorative member 7 and a back (not shown) disposed on the reels 3L, 3C, 3R. Control data for turning on and off the lamps and the LEDs according to the registered data of the lights and the like.

  Next, the sub CPU 102 executes a lamp effect execution process based on the control data generated in the lamp data analysis process (S381) (S382), executes the lamp effect execution process, and then executes the lamp control task process in step S381. Return to.

  Although omitted in FIG. 102, the lamp control task process returns to step S381 after the lamp effect execution process is executed, and the process returns to step S381 in less than 4 ms (4 msec- (lamp data analysis). Since the processing time of the process + the processing time of the lamp effect execution process) = the waiting time), the lamp control task is processed in units of 4 ms.

<Sound control task>
FIG. 103 is a flowchart showing the sound control task activated in step S373 of the power-on process shown in FIG.

  First, the sub CPU 102 executes initialization processing of sound related data related to the sound output state from the speakers 23L and 23R via the sound I / O board 71 (S390).

  Next, the sub CPU 102 executes sound data analysis processing (S391). In the sound data analysis process, sound data corresponding to registered data for outputting sound to the speakers 23L and 23R provided in the pachislot machine 1 is generated.

  Next, the sub CPU 102 executes a sound effect execution process based on the sound data generated in the sound data analysis process (S391) (S392), executes the sound effect execution process, and then performs a sound control task process. It returns to step S391.

  Although omitted in FIG. 103, after the sound effect execution process is executed, the processing cycle is waited. Therefore, the sound control task process returns to step S391 for less than 33 ms (33 msec- (sound data analysis Since the processing time + processing time of the sound effect execution processing) = waiting time) later, the sound control task is processed in units of 33 ms.

<Shutter control task>
FIG. 104 is a flowchart showing the shutter control task activated in step S374 of the power-on process shown in FIG. The shutter control task performs control related to driving and stopping of the lifting motor 240A, the lifting motor 240B, and the rotary motor 231.

  First, the sub CPU 102 executes a shutter activation test process (S400). In the shutter activation test process, the sub CPU 102 executes a pre-registered operation on the shutter device 200 via the shutter control board 78 after placing the shutter in the retracted state via the shutter control board 78 as shown in FIG. The shutter device 200 confirms that each operation is correctly executed based on the detection results of the origin sensor 270, the lowering sensor 271 and the rotation sensor 272.

  When the sub CPU 102 can confirm that the shutter device 200 is accurately performing each operation, the sub CPU 102 places the shutter in the housed state via the shutter control board 78 as shown in FIG.

  The sub CPU 102 performs the shutter activation test only once when the power is turned on. However, the present invention is not limited to this, and the error of the shutter device 200 (detection of each sensor of the lift motors 240A and 240B or the rotary motor 231) is not limited to the effect. When an abnormality) is detected, a shutter activation test is performed between the unit games, and the shutter activation test process is confirmed to execute normally, thereby canceling the error of the shutter device 200. You may make it do.

  In this case, if the sub CPU 102 cannot confirm that the shutter device 200 performs each operation correctly, the sub CPU 102 may display the fact on the liquid crystal display device 11.

  After executing the shutter activation test process, the sub CPU 102 determines whether there is registered shutter operation data (S401). If it is determined that there is registered shutter operation data (YES), the sub CPU 102 executes a shutter effect reconstruction process shown in FIG. 105 (S402).

  Next, the sub CPU 102 determines whether or not the shutter operation sequence stored in the shutter operation sequence storage area has reached the position where the shutter operation sequence has ended (S403). For example, when the sub CPU 102 detects “EndBlock” indicating the end of the shutter operation sequence in the shutter operation sequence storage area illustrated in FIG. 81, the sub CPU 102 determines that the shutter operation sequence has ended.

  In the present embodiment, in FIG. 81 and FIG. 101, “EndBlock” is described for the sake of convenience, but not limited to this, “0xffff” (“0x” is a value representing the end of the table). , An identification symbol representing a hexadecimal number in C language, etc.) or “−1” may be used.

  If it is determined that the shutter operation sequence stored in the shutter operation sequence storage area has not reached the position where the shutter operation sequence has ended (NO), the sub CPU 102 executes the shutter control process shown in FIG. 106 (S404).

  On the other hand, if it is determined that the shutter operation sequence stored in the shutter operation sequence storage area has reached the position where the shutter operation sequence has ended (YES), or after executing the process of step S404, the sub CPU 102 executes the shutter control task. Is returned to step S401.

  Although not shown in FIG. 106, the sub CPU 102 waits for the processing cycle when returning the processing of the shutter control task to step S401. Therefore, it is less than 1 ms for the processing of the shutter control task to return to step S401. Since (1m− (processing time of steps S401 to S403 or S404) = waiting time), the shutter control task is processed in units of 1 ms.

<Shutter effect reconstruction process>
FIG. 105 is a flowchart showing the shutter effect reconstruction process executed in step S402 of the shutter control task shown in FIG.

  First, the sub CPU 102 acquires shutter operation data from the sub RAM 104 (S410), and acquires previous shutter operation data from the sub RAM 104 (S411). Next, the sub CPU 102 acquires shutter operation combination data corresponding to the shutter operation data acquired in step S410 and the previous shutter operation data acquired in step S411 from the shutter operation combination determination table shown in FIG. 80 (S412). .

  Next, the sub CPU 102 constructs a shutter operation sequence as shown in FIG. 81 from the acquired shutter operation combination data, and stores the constructed shutter operation sequence in the shutter operation sequence storage area (S413). In this way, the sub CPU 102 constitutes an accessory operation construction unit that constructs presentation operation sequence data representing the shutter operation sequence of the shutter.

  Next, the sub CPU 102 sets the shutter operation data acquired in step S410 in the sub RAM 104 as the previous shutter operation data (S414). That is, the sub RAM 104 constitutes an accessory data storage unit.

  Next, the sub CPU 102 determines whether or not the sequence data stored in the shutter operation sequence storage area is EndBlock (S415). If it is determined that the sequence data is EndBlock (YES), the sub CPU 102 ends the shutter effect reconstruction process.

  In step S412, in the shutter operation combination determination table (see FIG. 80), the shutter operation determination table indicates “−” (“−”) as in the case where the current shutter operation data is “Y3” and the previous shutter operation data is “Y4”. If 0xfffe or -2) is registered, it is not necessary to operate the shutter.

  In this case, in step S413, the sub CPU 102 stores EndBlock (0xffff or −1) in an area corresponding to step number “1” in the shutter operation sequence storage area.

  If it is determined in step S415 that the sequence data is not EndBlock (NO), the sub CPU 102 acquires the number of pulses, the pulse width, and the excitation direction from the sequence data stored in the shutter operation sequence storage area (S416).

  Next, the sub CPU 102 sets each value of the pulse counter and the pulse width counter to 0 (S417), executes motor excitation output processing for outputting a pulse signal for exciting the motor (S418), and performs shutter effect reconstruction processing. Exit.

  Specifically, in the motor excitation output process, the sub CPU 102 sets the excitation phases of the lift motor 240A, the lift motor 240B, and the rotary motor 231 based on the excitation direction, pulse width, and number of pulses acquired from the shutter operation sequence storage area. Excitation data is output to the corresponding output port.

  When the sub CPU 102 stops the lifting motor 240A, the lifting motor 240B, and the rotary motor 231 from the driving state, the sub CPU 102 outputs excitation data for stopping all phases to the output port.

<Shutter control processing>
FIG. 106 is a flowchart showing the shutter control process executed in step S404 of the shutter control task shown in FIG.

  First, the sub CPU 102 determines whether or not the pulse width of the pulse signal is equal to the value of the pulse width counter (S420). Here, if it is determined that the pulse width of the pulse signal is not equal to the value of the pulse width counter (NO), the sub CPU 102 adds 1 to the value of the pulse width counter (S421), and the shutter control processing is ended. To do.

  If it is determined in step S420 that the pulse width of the pulse signal is not equal to the value of the pulse width counter (NO), since the motor excitation output processing by the sub CPU 102 is not executed, the excitation state of the motor being driven is Retained. Similarly, the excitation state of the motor being driven is maintained for the steps where the following motor excitation output processing is not performed.

  On the other hand, if it is determined that the pulse width of the pulse signal is equal to the value of the pulse width counter (YES), the sub CPU 102 executes motor excitation output processing (S422). Next, the sub CPU 102 determines whether or not the number of pulses of the pulse signal is equal to the value of the pulse counter (S423).

  If it is determined that the number of pulses of the pulse signal is not equal to the value of the pulse number counter (NO), the sub CPU 102 adds 1 to the value of the pulse counter (S424), and the value of the pulse width counter is set. 0 is set (S425).

  Next, the sub CPU 102 determines whether or not the number of pulses of the pulse signal is a prescribed maximum value (S426). If it is determined that the number of pulses of the pulse signal is not the maximum value (NO), the sub CPU 102 ends the shutter control process.

  In the present embodiment, the maximum value of the prescribed number of pulses is “300”, step number “3” in FIG. 72, step number “2” in FIG. 74, step number “2” in FIG. In steps where the number of pulses “300” is registered, such as step number “2” in FIG. 79 and step numbers “2” and “8” in FIG. Is executed.

  If it is determined in S426 that the number of pulses of the pulse signal is the maximum value (YES), the sub CPU 102 determines whether or not the value of the pulse counter is a specified maximum value (S427).

  If it is determined that the value of the pulse counter is the maximum value (YES), the sub CPU 102 initializes the shutter operation sequence storage area, and sets EndBlock at the head of the shutter operation sequence storage area (S428). .

  When the value of the pulse counter is the prescribed maximum value, the operating motor is in an abnormal state, so the sub CPU 102 outputs excitation data for stopping all phases to the output port during motor excitation output processing. Output.

  Next, the sub CPU 102 executes a motor excitation output process (S429), and a detection target sensor error, that is, a lift motor 240A, a lift motor 240B, and a detection sensor for the origin sensor 270, the descent sensor 271, and the rotation sensor 272. The error occurrence data of the rotary motor 231 is set in the error management area (S430), and the shutter control process is terminated.

  If it is determined in step S427 that the value of the pulse counter is not the maximum value (NO), the sub CPU 102 determines whether or not the detection target sensor is in an ON state (S431).

  If it is determined that the detection target sensor is not in the ON state (NO), the sub CPU 102 ends the shutter control process. On the other hand, when it is determined that the detection target sensor is in the ON state (YES), or when it is determined in step S423 that the number of pulses of the pulse signal is equal to the value of the pulse number counter (YES), the sub CPU 102 Updates the shutter operation sequence storage area (S432).

  Next, the sub CPU 102 acquires the number of pulses, the pulse width, and the excitation direction from the sequence data stored in the shutter operation sequence storage area (S433). Next, the sub CPU 102 sets each value of the pulse counter and the pulse width counter to 0 (S434), executes motor excitation output processing (S435), and ends the shutter control processing.

<Main task>
FIG. 107 is a flowchart showing the main task activated in step S375 of the power-on process shown in FIG.

  First, the sub CPU 102 executes a VSYNC (Vertical Synchronization) interrupt initialization process (S440), and waits for a VSYNC interrupt (S441). The VSYNC interrupt initialization process is a process that allows an image synchronization signal to be accepted as an interrupt signal. The VSYNC interrupt signal is generated at the timing of switching the frame of a drawn image, and one frame is 33 ms (about 30 FPS). Therefore, the main task is repeatedly processed in units of 33 ms including the drawing processing time.

  Next, the sub CPU 102 executes a drawing process (S442). Next, the sub CPU 102 executes an error occurrence monitoring process shown in FIG. 108 (S443), and executes an error cancellation monitoring process shown in FIG. 109 (S444). Next, the sub CPU 102 resets the WDT 108 (S445), and returns the processing of the main task to step S441.

  In the present embodiment, the WDT 108 is arranged in the sub-control circuit 101 of the sub-control board 42. However, the present invention is not limited to this, and if the WDT circuit is built in the sub-CPU 102, a built-in WDT circuit is used. May be used in place of the WDT 108.

<Error occurrence monitoring processing>
FIG. 108 is a flowchart showing the error occurrence monitoring process executed in step S443 of the main task shown in FIG.

  First, the sub CPU 102 has not displayed a simple error information history representing an error history, and the door key 24 has been rotated to the left as a predetermined operation (hereinafter also referred to as a “door key left-turned state”). It is determined whether or not 3 seconds have passed (S450).

  If it is determined that the simple error information history is not displayed and the door key counterclockwise state has passed for 3 seconds or more (YES), the sub CPU 102 displays the display example shown in FIG. A simple error information history display request for displaying the error information history screen representing the simple error information history on the liquid crystal display device 11 is made (S451).

  The simple error information history display means that an error information history screen that can be displayed when the hall menu (turning on the setting key type switch 52) is started can be easily operated without starting the hall menu. FIG. 6 is a screen display for confirming the error occurrence and release status of the pachislot machine 1.

  On the other hand, if it is determined that the simple error information history has not been displayed or the door key counterclockwise state has not elapsed for more than 3 seconds (NO), the sub CPU 102 generates an error in the error management area (see FIG. 83). It is determined whether there is data (S452).

  If it is determined that there is no error occurrence data in the error management area (NO), the sub CPU 102 ends the error occurrence monitoring process. On the other hand, if it is determined that there is error occurrence data in the error management area (YES), the sub CPU 102 displays an error screen indicating an error corresponding to the error occurrence data as in the display example shown in FIG. An error occurrence display request to be displayed is set (S453), and a timer value of 3 minutes is set in the error display timer (S454).

  As described above, when the predetermined condition such as the above-described simple error information history display request or error occurrence data exists in the error management area is satisfied, the sub CPU 102 displays an image corresponding to the predetermined condition on the liquid crystal display device 11. The image switching means to be displayed is configured.

  After executing the processing of step S451 or S454, the sub CPU 102 determines whether or not the sub game state is being selected for addition ("selected game") (S455), where the sub game state is selected for addition. If it is determined that it is in the middle (YES), the sub CPU 102 saves the selected element (selected arrangement position) in the sub RAM 104 (S456).

  Specifically, the sub CPU 102 performs an operation by the selection unit on the condition that an error screen due to an error or an error information history screen due to a simple operation is displayed on the liquid crystal display device 11 in a state where an element is selected. And the selection state information is stored in the sub-RAM 104. Thus, the sub CPU 102 constitutes a selection information storage unit.

  If it is determined in step S455 that the sub game state is not selected for addition (NO), or after executing the process of step S456, the sub CPU 102 displays the video data being displayed on the liquid crystal display device 11, the speakers 23L and 23R. The sound data being output, the lamp data being output to the plurality of effect LEDs, and the shutter operation data are saved in the sub RAM 104 (S457). Next, the sub CPU 102 sets the shutter operation data to Y3 (S458), and ends the error occurrence monitoring process.

  When the error screen or the error information history screen is displayed on the liquid crystal display device 11 while the shutter is operating, the sub CPU 102 stores shutter operation data as movable information indicating the state of the shutter in the sub RAM 104. Store (retract), and move the shutter to the exposure position (position shown in FIG. 8). Thus, the sub CPU 102 constitutes a movable state retracting unit.

<Error cancellation monitoring process>
FIG. 109 is a flowchart showing the error cancellation monitoring process executed in step S444 of the main task shown in FIG.

  First, the sub CPU 102 determines whether or not the simple error information history on which the simple error information history is displayed is being displayed and the door key left-turned state is released (S470). If it is determined that the simple error information history is being displayed and the door key left-turned state has been released (YES), the sub CPU 102 sets a simple error information history display end request (S471).

  On the other hand, when it is determined that the simple error information history is not being displayed or the door key counterclockwise state has not been released (NO), the sub CPU 102 determines whether or not an error occurrence is being displayed (S472). .

  If it is determined that the error occurrence is not being displayed (NO), the sub CPU 102 ends the error cancellation monitoring process. On the other hand, if it is determined that an error occurrence is being displayed (YES), the sub CPU 102 determines whether there is an error release in the error management area (S473).

  If it is determined that there is an error cancellation in the error management area (YES), the sub CPU 102 clears the value of the error display timer to 0 (S474). On the other hand, if it is determined that there is no error cancellation in the error management area (NO), the sub CPU 102 subtracts 1 from the value of the error display timer (S475).

  In step S473, the sub CPU 102 determines whether to cancel the error depending on whether the error cause during error display assigned to the error management area (see FIG. 83) is ON “1” or OFF “0”. Judgment is made.

  Next, the sub CPU 102 determines whether or not the value of the error display timer is 0 (S476). If it is determined that the value of the error display timer is not 0 (NO), the sub CPU 102 ends the error cancellation monitoring process.

  On the other hand, when it is determined that the value of the error display timer is 0 (YES), or after executing the process of step S474, the sub CPU 102 sets an error occurrence display end request (S477) and represents the cause of the error. The error occurrence data is reset (deleted) from the error management area (S478).

  After executing the processing of step S471 or S478, the sub CPU 102 determines whether or not there is saved effect data (S479). If it is determined that there is no effect data saved in the sub RAM 104 (NO), the sub CPU 102 ends the error cancellation monitoring process.

  On the other hand, if it is determined that there is retreated production data (YES), the sub CPU 102 restores the video data, sound data, lamp data, and shutter operation data saved in the sub RAM 104 (S480).

  Next, the sub CPU 102 determines whether or not the sub gaming state is being selected for addition (S481). Here, if it is determined that the sub game state is not being selected for addition (NO), the sub CPU 102 ends the error cancellation monitoring process.

  On the other hand, if it is determined that the sub game state is being selected for addition (YES), the sub CPU 102 restores the selected element (selected arrangement position) saved in the sub RAM 104 and sets it in the video data ( S482), the error release monitoring process is terminated.

  As described above, when the display end condition determined as YES in S470, S473, or S476 is established, the sub CPU 102 displays the game screen of the video data being displayed saved (stored) in the sub RAM 104 in S457 on the liquid crystal display device 11. And a movable state returning means for returning the shutter to the shutter position before the error screen or the error information history screen is displayed on the liquid crystal display device 11 by returning the shutter operation data saved in the sub-RAM 104. .

  In addition, if the sub game state is being selected and added (in “selected game”) in S481, the sub CPU 102 displays the selected game screen on the liquid crystal display device 11 and also selects the selected element saved in the sub RAM 104 ( Selection information returning means for returning the selected payout position) to the selected game screen is configured.

  In the present embodiment, when an error occurs in the pachislot machine 1, after performing error display for 3 minutes, it is returned to the production state before the error occurred, but depending on the content of the error that occurred, As long as the cause of the error is not actually canceled, the error display may be continued, and the error display time may be changed to an arbitrary time (for example, 10 minutes).

<Main board communication task>
FIG. 110 is a flowchart showing the main board communication task activated in step S376 of the power-on process shown in FIG.

  First, the sub CPU 102 executes initialization of a communication message queue allocated to the sub RAM 104 (S490).

  Next, the sub CPU 102 acquires received command data from the communication message queue (S491). The received command data is transmitted as command data by the data transmission process (see FIG. 99) of the main CPU 93, and is registered in the communication message queue by the reception interrupt process of the sub CPU 102.

  Further, the sub CPU 102 determines whether or not there is a reception command (S492). Specifically, the sub CPU 102 determines whether there is a reception command based on whether reception command data is registered in the communication message queue.

  Next, the sub CPU 102 checks the received command (S493). Specifically, the sub CPU 102 determines whether or not the received command type is within a valid command value range (for example, the command type is 01H to 10H), and determines the data length of the received command data (for example, 8 bytes). ) And the determination of the SUM value given to the last data of the received command data (for example, the 8th byte of the received data length of 8 bytes) (for example, the calculated value (addition, The received command is checked by performing subtraction or exclusive OR) and collating whether the SUM value matches.

  Next, the sub CPU 102 determines whether or not a valid command has been received (S494). If it is determined that a valid command has not been received (NO), the sub CPU 102 returns the processing of the main board communication task to step S491.

  On the other hand, if it is determined that a valid command has been received (YES), the sub CPU 102 determines that the received command is a legitimate command, creates game information from the received command, and creates the created game information. Is stored in the sub-RAM 104 (S495). Next, the sub CPU 102 executes command analysis processing shown in FIG. 111 (S496), and returns the processing of the main board communication task to step S491.

  Since the main CPU 93 performs data transmission processing to the sub CPU 102 about every 17 ms (refer to the interrupt processing by the control of the main CPU in FIG. 97 described above), the main board communication task is performed at a cycle of about 17 ms. The process is repeated.

<Command analysis processing>
FIG. 111 is a flowchart showing command analysis processing executed in step S496 of the main board communication task shown in FIG.

  First, the sub CPU 102 executes a command consistency determination process shown in FIG. 113 (S500). Next, the sub CPU 102 executes an effect content determination process shown in FIG. 114 (S501), executes an animation data determination process (S502), executes a ramp data determination process (S503), and executes a sound data determination process. Then, the shutter operation data determination process is executed (S505), each determined data is registered in the RAM 103 (S506), and the command analysis process is terminated.

  In each data determination process of the animation data determination process, the lamp data determination process, the sound data determination process, and the shutter operation data determination process, the sub CPU 102 provides the effect data allocated for the effect device according to the effect content determined in the effect content determination process. To decide. Further, the effect data for each effect device is registered in the RAM 103 because it is referred to in the process of controlling each effect device.

  In the effect content determination process, a new effect is not necessarily determined. Basically, when a start command, which will be described later, is received, an effect is determined, and the effect is continued and changed in subsequent command reception processing according to the content of the determined effect.

<Anime task>
FIG. 112 is a flowchart showing the animation task activated in step S377 of the power-on process shown in FIG.

  First, the sub CPU 102 checks a change from the previous game information (S510). Specifically, the sub CPU 102 indicates that the current game information updated by the interrupt process under the control of the main CPU 93 shown in FIG. 97 is the game information registered in the sub RAM 104 in the previous interrupt process. Check if the game information is different.

  Next, the sub CPU 102 executes object control processing (S511). Specifically, when a check result indicating that the game information has changed is obtained in step S510, the sub CPU 102 controls the image according to the change in the game information.

  Subsequently, the sub CPU 102 executes animation task management processing (S512). Specifically, the sub CPU 102 selects an image to be displayed for the determined effect when the animation data is determined by the animation data determination process and the animation data is registered (for example, animation data for effect). And 3D polygon data moving in the moving image data) and the display order management information are constructed, and the order of images displayed in various effects is managed. When executing the animation task management process, the sub CPU 102 returns the animation task process to step S510.

<Command consistency determination processing>
FIG. 113 is a flowchart showing the command consistency determination process executed in step S500 of the command analysis process shown in FIG.

  First, the sub CPU 102 performs command sequence determination processing for determining whether or not the reception order of commands related to the progress of unit games among commands received from the main control circuit 91 is different from the prescribed order (S515).

  In the present embodiment, the sub CPU 102 receives commands in the order of a medal insertion command, a start command, a reel rotation start command, a three-time reel stop command, and a winning action command, except for a no-operation command and an error command. The

  The sub CPU 102 determines whether or not an abnormality has occurred in the command sequence by determining whether or not the commands are received in this order. If the sub CPU 102 determines that an abnormality has occurred in the command sequence, The “sequence” abnormality in the error management area (see FIG. 83) is set.

  The “sequence” abnormality in the error management area of the sub-RAM 104 is canceled by clearing the sub-RAM 104 in the initialization command reception process (see step S521 in FIG. 144) described later.

  For example, when the sub CPU 102 receives a start command in a state where no winning operation command has been received in the previous unit game, or receives a winning operation command after receiving a reel stop command twice, Judge that an error occurred in the command sequence.

  Next, the sub CPU 102 determines whether or not a start command has been received (S516). If it is determined that the start command has not been received (NO), the sub CPU 102 ends the command consistency determination process.

  On the other hand, if it is determined that the start command has been received (YES), the sub CPU 102 is in the ON state of the power failure detection abnormality flag indicating that the power supplied to the sub CPU 102 has been cut off in an abnormal state. No, whether the setting change flag is in the OFF state, and whether an error has occurred in the command sequence. Specifically, the “sequence” error in the error management area (see FIG. 83) of the sub RAM 104 is set. It is determined whether or not it is performed (S517).

  In this way, the sub CPU 102 constitutes an operation abnormality detection means for detecting an abnormal operation of the sub control circuit 101.

  When the setting change flag is in the OFF state, this indicates that the pachislot machine 1 has not been initialized as at the time of factory shipment or the like, and in detail, the SRAM constituting the sub RAM 104 has been cleared. Represents. For this reason, the sub CPU 102 did not receive the initialization command from the main control circuit 91 at all, and there was an abnormal operation (for example, goto action) in the sub control circuit 101 on condition that the start command was received. Detect that.

  If it is determined in S517 that the power failure detection abnormality flag is ON, the setting change flag is OFF, or that an abnormality has occurred in the command sequence (YES), the sub CPU 102 determines that the pachislot machine 1 Assuming that the device is operating in an abnormal state, the sub-startup abnormal state flag is set to ON (S518), and the command consistency determination process ends.

  On the other hand, if it is determined that the power failure detection abnormality flag is not in the ON state, the setting change flag is not in the OFF state, and no abnormality has occurred in the command sequence (NO), the sub CPU 102 indicates that the pachislot machine 1 is normal. The sub-startup abnormal state flag is turned OFF (S519), and the command consistency determination process is terminated.

<Production content determination process>
FIG. 114 is a flowchart showing the effect content determination process executed in step S501 of the command analysis process shown in FIG.

  First, the sub CPU 102 determines whether or not an initialization command has been received (S520). If it is determined that the initialization command has been received (YES), the sub CPU 102 executes initialization command reception processing (S521), sets the setting change flag to ON (S522), and effects content determination processing. Exit.

  In the initialization command reception process, for example, effect data based on information transmitted as an initialization command is set, and various management areas and work areas including a management area related to game progress in the sub-RAM 104 are initialized. It becomes.

  On the other hand, if it is determined that the initialization command has not been received (NO), the sub CPU 102 determines whether or not a medal insertion command has been received (S523). If it is determined that a medal insertion command has been received (YES), the sub CPU 102 executes a medal insertion command reception process (S524), and ends the effect content determination process. In the medal insertion command reception process, for example, effect data based on information transmitted as a medal insertion command is set.

  On the other hand, if it is determined that a medal insertion command has not been received (NO), the sub CPU 102 determines whether a start command has been received (S525). If it is determined that a start command has been received (YES), the sub CPU 102 executes a start command reception process shown in FIG. 115 (S526), and ends the effect content determination process. In the start command receiving process, for example, effect data based on information transmitted as a start command is set.

  On the other hand, if it is determined that a start command has not been received (NO), the sub CPU 102 determines whether or not a reel rotation start command has been received (S527). If it is determined that a reel rotation start command has been received (YES), the sub CPU 102 executes a reel rotation start command reception process (S528), and ends the effect content determination process. In the reel rotation start command reception process, for example, effect data based on information transmitted as a reel rotation start command is set.

  On the other hand, when it is determined that the reel rotation start command has not been received (NO), the sub CPU 102 determines whether or not a reel stop command has been received (S529). If it is determined that a reel stop command has been received (YES), the sub CPU 102 executes a reel stop command reception process (S530), and ends the effect content determination process. In the reel stop command reception process, for example, effect data based on information transmitted as a reel stop command is set.

  On the other hand, when it is determined that the reel stop command has not been received (NO), the sub CPU 102 determines whether or not a winning operation command has been received (S531). If it is determined that a winning action command has been received (YES), the sub CPU 102 executes a winning action command reception process shown in FIG. 119 (S532), and ends the effect content determination process. In the winning operation command reception process, for example, effect data based on information transmitted as a winning operation command is set.

  On the other hand, if it is determined that the winning operation command has not been received (NO), the sub CPU 102 determines whether or not an error command has been received (S533). If it is determined that an error command has been received (YES), the sub CPU 102 executes an error command reception process shown in FIG. 122 (S534), and ends the effect content determination process.

  On the other hand, if it is determined that an error command has not been received (NO), the sub CPU 102 determines whether or not a no-operation command has been received (S535). If it is determined that a no-operation command has been received (YES), the sub CPU 102 executes a no-operation command reception process shown in FIG. 123 (S536) and ends the effect content determination process. On the other hand, when determining that the no-operation command has not been received (NO), the sub CPU 102 ends the effect content determination process. By executing the effect content determination process, the sub CPU 102 constitutes an effect determination unit.

<Processing when receiving a start command>
FIG. 115 is a flowchart showing a start command reception process executed in step S526 of the effect content determination process shown in FIG.

  First, the sub CPU 102 executes the fail safe process shown in FIG. 116 (S540). Next, the sub CPU 102 sets the provisional gaming state representing the gaming state determined in the previous game as the current subsidiary gaming state (S541). Next, the sub CPU 102 determines whether or not the lock number is “6” (S542).

  If it is determined that the lock number is “6” (YES), the sub CPU 102 adds a value obtained by multiplying the count value of the special counter by a specified number (for example, 100) to the ART remaining game number. At the same time, the count value of the special counter is set to the number of notification games directly on the ART (S543). In this way, the sub CPU 102 constitutes advantageous game grant determining means for determining the number of additional games of ART based on the value counted by the special counter.

  On the other hand, when it is determined that the lock number is not “6” (NO), or after executing the process of step S543, the sub CPU 102 performs the lottery process according to the sub gaming state in the first gaming state shown in FIG. Another lottery process is executed (S544).

  Next, the sub CPU 102 determines whether or not the RT gaming state is less than 2 (that is, the RT0 gaming state or the RT1 gaming state) (S545). Here, the RT gaming state is controlled by the main CPU 93 and sent from the main CPU 93 to the sub CPU 102 as a parameter given to the start command. Further, as described above, the RT gaming state takes any of the RT0 gaming state to the RT5 gaming state.

  Here, when it is determined that the RT gaming state is not less than 2 (NO), the sub CPU 102 determines whether or not the penalty game number is 0 (S546). If it is determined that the penalty game number is 0 (YES), the sub CPU 102 resets the penalty state flag (S547).

  On the other hand, when it is determined that the penalty game number is not 0 (NO), or after executing the process of step S547, the sub CPU 102 determines whether or not the penalty game number is greater than 0 (S548).

  If it is determined that the penalty game number is greater than 0 (YES), the sub CPU 102 subtracts 1 from the penalty game number (S549). On the other hand, when it is determined that the number of penalty games is not greater than 0 (NO), or after executing the process of step S549, the sub CPU 102 determines whether or not the number of grace games is greater than 0 (S550). If it is determined that the number of grace games is greater than 0 (YES), the sub CPU 102 subtracts 1 from the number of grace games (S551).

  In step S545, when it is determined that the RT gaming state is less than 2 (YES), in S550, when it is determined that the number of grace games is not greater than 0 (NO), or after executing the process of step S551, The sub CPU 102 draws the contents of the effect based on the effect random number value from the sub game state, the internal winning combination, the RT game state, and the lock number (S552).

  Next, the sub CPU 102 executes a lock generation effect setting process shown in FIG. 118 (S553), and ends the start command reception process.

<Fail-safe treatment>
FIG. 116 is a flowchart showing the fail-safe process executed in step S540 of the start command reception process shown in FIG.

  First, the sub CPU 102 determines whether or not the sub gaming state is waiting for a normal return and whether or not the RT gaming state is less than 2 (S560). If it is determined that the sub gaming state is waiting for normal return and the RT gaming state is less than 2 (YES), the sub CPU 102 determines whether the lock number before one game is “6”. It is determined whether or not (S561).

  Here, if it is determined that the lock number before one game is not “6” (NO), the sub CPU 102 sets the provisional game state to “medium” (S562), and sets the ceiling game value as the ceiling game value. (For example, 1500) is set (S563), and the ART end flag is turned on (S564).

  If it is determined in step S560 that the secondary gaming state is not normally waiting for a return or the RT gaming state is not less than 2 (NO), if it is determined that the lock number before one game is “6” (YES), Alternatively, after executing the process in step S564, the sub CPU 102 determines whether or not the RT gaming state is 2 or more (high probability of ART) (S565).

  Here, if it is determined that the RT gaming state is not 2 or more (NO), the sub CPU 102 ends the fail-safe process. On the other hand, when it is determined that the RT gaming state is 2 or more (YES), the sub CPU 102 determines whether or not the sub activation abnormal state flag is ON (S566).

  Here, if it is determined that the sub activation abnormal state flag is not ON (NO), the sub CPU 102 ends the fail safe process. On the other hand, if it is determined that the sub activation abnormal state flag is ON (YES), the sub CPU 102 sets a grace prescribed value (for example, 30) for the number of grace games, and sets a penalty low prescribed value (for the number of penalty games). For example, 8) is set, a penalty state flag is set (S567), and the fail safe process is terminated.

  Thus, the sub CPU 102 constitutes a grace game number setting means for setting a grace game number as a predetermined grace game number on condition that an abnormal operation of the sub control circuit 101 is detected. In addition, the sub CPU 102 detects that an abnormal operation of the sub control circuit 101 is detected while the number of grace games is consumed, and the number of penalty games in which a penalty low prescribed value is set as the prescribed game number. Set a penalty.

  In step S567, if the penalty state flag has already been set, the sub CPU 102 may add a grace prescribed value to the number of grace games. In step S567, when the penalty state flag is already set, the sub CPU 102 may add the penalty low prescribed value to the number of penalty games.

  In step S567, if the penalty state flag is already set, the sub CPU 102 sets the grace prescribed value to the number of grace games on condition that the grace game number is smaller than the grace prescribed value. Also good.

  In step S567, if the penalty state flag is already set, the sub CPU 102 sets the penalty low prescribed value to the penalty game number on condition that the penalty game number is smaller than the penalty low prescribed value. May be.

<First lottery process by gaming state>
FIG. 117 is a flowchart showing the first gaming state-specific lottery process executed in step S544 of the start command reception process shown in FIG.

  First, the sub CPU 102 determines whether or not the sub gaming state is “general medium” (S570). Here, when it is determined that the sub game state is “general medium” (YES), the sub CPU 102 executes the first general medium lottery process shown in FIG. 129 (S571). Next, the sub CPU 102 executes the second general medium lottery process shown in FIG. 133 (S572), and ends the first gaming state-specific lottery process.

  If it is determined in step S570 that the sub gaming state is not “general” (NO), the sub CPU 102 determines whether or not the sub gaming state is “high probability of ART” (S573). If it is determined that the secondary gaming state is “ART high probability” (YES), the sub CPU executes the first ART high probability lottery process shown in FIGS. 135 and 136 (S574). Next, the sub CPU 102 executes the second ART high-probability lottery process shown in FIG. 137 (S575), and ends the first gaming state-specific lottery process.

  If it is determined in step S573 that the secondary gaming state is not “ART high probability” (NO), the sub CPU 102 determines whether or not the secondary gaming state is “ART ready” (S576). If it is determined that the sub game state is “ART ready” (YES), the sub CPU 102 executes the first ART preparatory lottery process shown in FIG. 139 (S577). The lottery process is terminated.

  If it is determined in step S576 that the secondary gaming state is not “ART ready” (NO), the sub CPU 102 determines whether or not the secondary gaming state is “ART in progress” (S578). If it is determined that the sub game state is “ART in progress” (YES), the sub CPU 102 executes the first ART lottery process shown in FIGS. 141 and 142 (S579), and the first game state Ends another lottery process.

  If it is determined in step S578 that the sub game state is not “ART in progress” (NO), the sub CPU 102 determines whether or not the sub game state is “selecting an extra” (S580). Here, if it is determined that the sub game state is “selecting extra” (YES), the sub CPU 102 executes the first extra selection lottery process shown in FIGS. 144 and 145 (S581). Next, the sub CPU 102 executes the second extra selection lottery process shown in FIG. 146 (S582), and ends the first gaming state-specific lottery process.

  If it is determined in step S580 that the secondary gaming state is not “selecting extra” (NO), the sub CPU 102 determines whether or not the secondary gaming state is “adding extra game” (S583). Here, when it is determined that the sub game state is “in an extra game” (YES), the sub CPU 102 executes a lottery process during the extra game (S584), and ends the first game state-specific lottery process. .

  If it is determined in step S583 that the sub game state is not “in-game” (NO), the sub CPU 102 determines whether or not the sub game state is “waiting for normal return” (S585).

  Here, if it is determined that the secondary gaming state is “waiting for normal return” (YES), the sub CPU 102 executes the lottery process waiting for normal return shown in FIG. 158 (S586), and the first gaming state. Ends another lottery process. On the other hand, if it is determined that the secondary gaming state is not “waiting for normal return” (NO), the sub CPU 102 ends the first gaming state-specific lottery process.

<Direction setting process when lock occurs>
FIG. 118 is a flowchart showing a lock occurrence effect setting process executed in step S553 of the start command reception process shown in FIG.

  First, the sub CPU 102 determines whether or not the lock number included in the start command data is any one of “1” to “6” (S590). If it is determined that the lock number included in the start command data is not any of “1” to “6” (NO), the sub CPU 102 ends the effect setting process at the time of occurrence of the lock.

  On the other hand, if it is determined that the lock number included in the start command data is any one of “1” to “6” (YES), the sub CPU 102 performs step S552 of the start command reception process shown in FIG. It is determined whether or not the content of the effect determined by lottery is a step-up effect (S591).

  Here, when it is determined that the determined effect content is not the step-up effect (NO), the sub CPU 102 ends the effect setting process at the time of occurrence of the lock. On the other hand, if it is determined that the determined effect content is a step-up effect (YES), the sub CPU 102 sets a step-up sequence table (see FIG. 71) corresponding to the lock number in the sub RAM 104 (S592). .

  Next, the sub CPU 102 sets the value of the no-operation command reception counter to 0, sets the count value of the step-up sequence table to the step-up count, sets the value of the notification game counter to 0 (S593), and locks The generation setting process at the time of occurrence ends.

<Process when receiving a winning action command>
FIG. 119 is a flowchart showing a winning action command reception process executed in step S532 of the effect content determination process shown in FIG.

  First, the sub CPU 102 executes a penalty setting process shown in FIG. 120 for setting the number of penalty games and the like (S600). Next, the sub CPU 102 executes a second gaming state-specific lottery process shown in FIG. 121 (S601), and ends the process upon receiving a winning action command.

<Penalty setting process>
FIG. 120 is a flowchart showing a penalty setting process executed in step S600 of the winning operation command reception process shown in FIG.

  First, the sub CPU 102 determines whether or not the reels 3L, 3C, and 3R have been stopped by the irregular stop operation, that is, the irregular pressing (S610). In this way, the sub CPU 102 constitutes an irregular stop operation determination unit that determines whether or not the stop operation is a stop operation different from the predetermined stop operation order.

  Here, the irregular push in the present embodiment means that when the RT gaming state is not less than 2 and the stop operation of the reels 3L, 3C, 3R is not informed, the reels 3C, 3R other than the reel 3L are the first. Refers to a stopped operation.

  If it is determined in step S610 that the reels 3L, 3C, 3R are not stopped due to irregular pressing (NO), the sub CPU 102 ends the penalty setting process. On the other hand, when it is determined that the reels 3L, 3C, and 3R have been stopped due to irregular pressing (YES), the sub CPU 102 determines whether or not the sub gaming state is in the general state or has a high ART probability (S611). .

  Here, when it is determined that the sub game state is in the general state or the ART has a high probability (YES), the sub CPU 102 determines whether or not the penalty flag is OFF and the number of grace games is 0. Judgment is made (S612).

  If it is determined that the penalty flag is OFF and the number of grace games is 0 (YES), the sub CPU 102 determines whether or not the internal winning combination is included in the first winning combination group. (S613).

  Here, when it is determined that the internal winning combination is included in the first winning combination group (YES), the sub CPU 102 sets a predetermined grace limit value (for example, 30 games) in the grace game number ( S614), the penalty setting process is terminated.

  If it is determined in step S612 that the penalty flag is not OFF or the number of grace games is not 0 (NO), the sub CPU 102 determines whether or not the MB is operating and the internal winning combination is the second. It is determined whether or not it is included in the winning combination group (S615). Here, when it is determined that the MB is not operating and the internal winning combination is not included in the second winning combination group (NO), the sub CPU 102 ends the penalty setting process.

  On the other hand, when it is determined that the MB is operating or the internal winning combination is included in the second winning combination group (YES), the sub CPU 102 sets the grace game number to the grace game number (for example, 30). A penalty low prescribed value (for example, 8) is set as the number of low disadvantage games in the penalty game number, a penalty state flag as a disadvantaged game state is set (S616), and the penalty setting process is terminated.

  If it is determined in step S613 that the internal winning combination is not included in the first winning combination group (NO), the sub CPU 102 determines whether the MB is operating and the internal winning combination is the third winning combination. It is determined whether or not it is included in the role group (S617). If it is determined that the MB is not operating and the internal winning combination is not included in the third winning combination group (NO), the sub CPU 102 ends the penalty setting process.

  On the other hand, if it is determined that the MB is in operation or the internal winning combination is included in the third winning combination group (YES), the sub CPU 102 sets a grace prescribed value for the number of grace games, A penalty high prescribed value (for example, 20) is set as the number of high disadvantage games in the number, a penalty state flag is set (S618), and the penalty setting process is terminated.

  If it is determined in step S611 that the secondary gaming state is neither general nor ART high probability (NO), the sub CPU 102 determines whether or not the secondary gaming state is waiting for a normal return ( S619).

  Here, if it is determined that the sub gaming state is not waiting for a normal return (NO), the sub CPU 102 ends the penalty setting process. On the other hand, when it is determined that the secondary gaming state is waiting for normal return (YES), the sub CPU 102 determines whether the MB is operating and the internal winning combination is included in the fourth winning combination group. Whether or not (S620).

  If it is determined that the MB is not operating and the internal winning combination is not included in the fourth winning combination group (NO), the sub CPU 102 ends the penalty setting process. On the other hand, when it is determined that the MB is in operation or the internal winning combination is included in the fourth winning combination group (YES), the sub CPU 102 sets a grace prescribed value for the number of grace games, The penalty high prescribed value is set to the number, the penalty state flag is set (S621), and the penalty setting process is terminated. Thus, the sub CPU 102 constitutes a grace game number setting means by executing the penalty setting process in addition to the above-described fail safe process.

  In step S616, S618, or S621, if the penalty state flag is already set, the sub CPU 102 may add the grace prescribed value to the grace game number.

  In step S616, S618, or S621, if the penalty state flag has already been set, the sub CPU 102 determines the penalty low prescribed value or the penalty high prescribed value (hereinafter simply referred to as “penalty prescribed value”) corresponding to each step. May also be added to the number of penalty games.

  In step S616, S618 or S621, if the penalty state flag is already set, the sub CPU 102 sets the grace prescribed value for the number of grace games on condition that the grace game number is smaller than the grace prescribed value. You may make it do.

  In step S616, S618 or S621, if the penalty state flag has already been set, the sub CPU 102 sets the penalty prescribed value to the penalty game number on condition that the penalty game number is smaller than the prescribed penalty value. You may make it do.

<Second lottery processing according to gaming state>
FIG. 121 is a flowchart showing the second gaming state-specific lottery process executed in step S601 of the winning operation command reception process shown in FIG.

  First, the sub CPU 102 determines whether or not the sub gaming state is “general medium” (S630). Here, if it is determined that the sub game state is “general medium” (YES), the sub CPU 102 executes the third general medium lottery process shown in FIG. 134 (S631), and the second game state random lottery. End the process.

  If it is determined in step S630 that the secondary gaming state is not “general” (NO), the sub CPU 102 determines whether or not the secondary gaming state is “ART high probability” (S632). Here, if it is determined that the sub gaming state is “ART high probability” (YES), the sub CPU 102 executes the third ART high probability lottery process shown in FIG. 138 (S633), and the second game. The state-specific lottery process is terminated.

  If it is determined in step S632 that the secondary gaming state is not “ART high probability” (NO), the sub CPU 102 determines whether or not the secondary gaming state is “ART ready” (S634). Here, if it is determined that the sub gaming state is “ART ready” (YES), the sub CPU 102 executes the second ART preparing lottery process shown in FIG. 140 (S635), and determines the second gaming state. The lottery process is terminated.

  If it is determined in step S634 that the sub game state is not “ART ready” (NO), the sub CPU 102 determines whether or not the sub game state is “ART in progress” (S636). Here, when it is determined that the sub gaming state is “ART in progress” (YES), the sub CPU 102 executes the second lottery process during the second ART shown in FIG. 143 (S637), and the second gaming state-specific lottery process. Exit. On the other hand, if it is determined that the sub gaming state is not “ART in progress” (NO), the sub CPU 102 ends the second gaming state lottery process.

<Error command reception processing>
FIG. 122 is a flowchart showing the error command reception process executed in step S534 of the effect content determination process shown in FIG.

  First, the sub CPU 102 determines whether or not the error command data includes an error occurrence state detected by the main CPU 93 (S640). If it is determined that the error command data includes an error occurrence state detected by the main CPU 93 (YES), the sub CPU 102 displays the error occurrence state detected by the main CPU 93 in an error management area (FIG. 83). Reference) is set (S641).

  If it is determined in step S640 that the error command data does not include the error occurrence state detected by the main CPU 93 (NO), the sub CPU 102 sets the error cancel state where the error command data is detected by the main CPU 93. It is determined whether or not it is included (S642).

  If it is determined that the error command data does not include the error cancel state detected by the main CPU 93 (NO), the sub CPU 102 ends the error command reception process.

  On the other hand, when it is determined that the error command data includes the error cancel state detected by the main CPU 93 (YES), the sub CPU 102 indicates the error cancel state detected by the main CPU 93 in the error management area (see FIG. 83). ) (S643), and the error command reception process ends.

<Processing when no operation command is received>
FIG. 123 is a flowchart showing the non-operation command reception process executed in step S536 of the effect content determination process shown in FIG.

  First, the sub CPU 102 stores the state of the input port transmitted by the main CPU 93 with a non-operation command in a storage area (non-operation command input information) assigned to the sub RAM 104 (S650). Data added to the no-operation command is the state of the input port input by the main CPU 93.

  Subsequently, the sub CPU 102 executes a fourth extra selection lottery process shown in FIGS. 147 and 148 (S651), executes a step-up effect sequence state transition process shown in FIG. 124 (S652), and receives a no-operation command. End time processing.

<Step-up effect sequence state transition processing>
FIG. 124 is a flowchart showing the step-up effect sequence state transition process executed in step S652 of the no-operation command reception process shown in FIG.

  First, the sub CPU 102 determines whether or not the step count (step counter value) is greater than 0 (S660). If it is determined that the step count is not greater than 0 (NO), the sub CPU 102 ends the step-up effect sequence state transition process.

  On the other hand, if it is determined that the step count is greater than 0 (YES), the sub CPU 102 adds 1 to the value of the no-operation command reception counter (S661). Next, the sub CPU 102 determines whether or not the trigger of the effect data corresponding to the step count in the step-up sequence table (see FIG. 71) is “0” (S662).

  Here, if it is determined that the trigger is not “0” (NO), the sub CPU 102 executes the special step-up process shown in FIG. 125 (S663), and ends the step-up effect sequence state transition process.

  On the other hand, when it is determined that the trigger is “0” (YES), the sub CPU 102 determines whether or not the value of the no-operation command reception counter is equal to or greater than the step count (S664). If it is determined that the value of the no-operation command reception counter is not equal to or greater than the step count (NO), the sub CPU 102 ends the step-up effect sequence state transition process.

  On the other hand, if it is determined that the value of the no-operation command reception counter is greater than or equal to the step count (YES), the sub CPU 102 updates the step-up sequence table (S665). Specifically, the sub CPU 102 refers to the next effect data in the step-up sequence table.

  Next, the sub CPU 102 determines whether or not the effect data referred to in the step-up sequence table is a table end (S666). Here, if it is determined that the effect data is a table end (YES), the sub CPU 102 sets the step count to 0 (S667) and ends the step-up effect sequence state transition process.

  Although not shown in FIG. 71, the table is divided by lock number (for example, between the last data of lock number “1” and the head data of lock number “2”, and the lock number). Under the final data of “6”, the table ends of the step-up sequence table are arranged. Generally, 0xffff or -1 is used for the table end, and the same applies to the present embodiment.

  On the other hand, if it is determined that the effect data is not a table end (NO), the sub CPU 102 executes a step-up effect registration process shown in FIG. 126 (S668) and ends the step-up effect sequence state transition process. By executing this step-up effect sequence state transition process, the sub CPU 102 constitutes an effect execution means.

<Special step-up process>
FIG. 125 is a flowchart showing the special step-up process executed in step S663 of the step-up effect sequence state transition process shown in FIG.

  First, the sub CPU 102 determines whether or not the trigger of the effect data referred to in the step-up sequence table is “1” (S670). If it is determined that the trigger is “1” (YES), the sub CPU 102 determines whether or not the no-operation command input information is a MAX bet button and the value of the no-operation command reception counter is a step. It is determined whether or not the count is exceeded (S671).

  Here, when it is determined that the no-operation command input information is not the MAX bet button and the value of the no-operation command reception counter is greater than or equal to the step count (NO), the sub CPU 102 ends the special step-up process. .

  On the other hand, when it is determined that the no-operation command input information is the MAX bet button or the value of the no-operation command reception counter is greater than or equal to the step count (YES), the sub CPU 102 updates the step-up sequence table. (S672).

  If it is determined in step S670 that the trigger is not “1” (NO), the sub CPU 102 determines whether or not the value of the no-operation command reception counter is greater than or equal to the step count, and adds the value of the notification game counter to the ART. It is determined whether or not it is less than the number of notification games and whether or not the trigger of the step-up sequence table is 2 (S673).

  If it is determined that the value of the no-operation command reception counter is not equal to or greater than the step count, the value of the notification game counter is not less than the number of ART direct notification games, or the trigger of the step-up sequence table is not 2 (NO ), The sub CPU 102 ends the special step-up process.

  On the other hand, if it is determined that the value of the no-operation command reception counter is greater than or equal to the step count, the value of the notification game counter is less than the number of ART direct notification games, and the trigger of the step-up sequence table is 2 (YES), the sub CPU 102 adds 1 to the value of the notification game counter, and changes the step-up sequence table to the set position where the trigger is “1” (S674). Specifically, the sub CPU 102 refers to the effect data in which the trigger is set to “1” in the step-up sequence table.

  After executing the process of step S672 or S674, the sub CPU 102 executes the step-up effect registration process shown in FIG. 126 (S675) and ends the special step-up process.

  By executing this special step-up process, each time the sub CPU 102 determines YES in step S671, the sub CPU 102 divides the ART addition game number based on the value counted by the special counter and the sum of the divided values. The image control means is configured to sequentially display information representing at least one of the values on the liquid crystal display device 11.

  For example, when the value counted by the special counter is 5 and the number of additional games of ART is 500 games, the sub CPU 102 determines YES five times in step S671.

  In this case, each time the CPU determines YES in step S671, the sub CPU 102 causes the liquid crystal display device 11 to sequentially display information indicating the number of games added to 100 games as a divided value obtained by equally dividing 500 games by 5.

  Here, each time the CPU determines YES in step S671, the sub CPU 102 adds, for example, 50 games, 100 games, 50 games, 100 games, and 200 games as a divided value obtained by dividing 500 games unevenly by 5. Information representing numbers may be sequentially displayed on the liquid crystal display device 11.

  Each time the sub CPU 102 determines YES in step S671, for example, as an integrated value of the divided values obtained by dividing 500 games by 5, for example, 100 games, 200 games, 300 games, 400 games, and 500 games added. May be sequentially displayed on the liquid crystal display device 11.

<Step-up effect registration process>
126 is a flowchart showing the step-up effect registration process executed in step S668 of the step-up effect sequence state transition process shown in FIG. 124 and step S675 of the special step-up process shown in FIG. 125.

  First, the sub CPU 102 acquires registration data from the step-up sequence table (S680). Next, the sub CPU 102 sets the count value of the registration data to the value of the step counter (S681).

  Next, the sub CPU 102 sets the animation data of the registration data in the animation data determination processing area (S682), and sets the ramp data of the registration data in the lamp data determination processing area (S683).

  Next, the sub CPU 102 sets the sound data of the registration data in the sound data determination processing area (S684), sets the shutter operation data of the registration data in the shutter operation data determination processing area (S685), and performs step-up effects. The registration process ends.

<Power interruption detection processing>
FIG. 127 is a flowchart illustrating a power interruption detection process that is executed when the sub CPU 102 detects that the power is turned off.

  In this embodiment, when the power supply voltage becomes 10.5 V or less, a power interruption detection circuit (not shown) in the sub control board 42 generates an NMI (Non-Maskable Interrupt) in the sub CPU 102, and this NMI interrupt The power interruption detection process is executed. In the power interruption detection process, the sub CPU 102 turns on the power interruption detection flag stored in the SRAM constituting the sub RAM 104 (S690).

  That is, when the sub CPU 102 is restarted by the WDT 108, the sub CPU 102 maintains the power detection flag in the off state. In the present embodiment, when the power interruption detection circuit detects a drop in the power supply voltage, an NMI is generated in order to cause the sub CPU 102 to execute the power interruption detection process. However, the present invention is not limited to this. When a decrease in power supply voltage is detected in other external interrupts provided in the sub CPU 102 or in a process repeatedly executed at regular intervals such as a main task, a power interruption detection process is executed. Also good.

<Power interruption recovery process>
FIG. 128 is a flowchart showing the power interruption recovery process executed in step S378 of the power-on process shown in FIG.

  First, the sub CPU 102 initializes a work area of the sub RAM 104, in particular, a DRAM constituting the sub RAM 104 (S700). Next, the sub CPU 102 determines whether or not the power interruption detection flag is ON (S701).

  Here, if it is determined that the power interruption detection flag is ON (YES), the sub CPU 102 executes consistency check processing of the backup storage area (S702). Specifically, the sub CPU 102 executes the checksum of the backup storage area of the SRAM constituting the sub RAM 104, and if the checksum execution result is normal, copies the data in the backup storage area to the work area.

  Next, the sub CPU 102 turns off the power failure detection flag, turns off the power failure detection abnormality flag (S703), and ends the power failure recovery process. On the other hand, if it is determined that the power failure detection flag is OFF (YES), the sub CPU 102 turns on the power failure detection abnormality flag (S704), and ends the power failure recovery process.

<First general lottery processing>
FIG. 129 is a flowchart showing the first general medium lottery process executed in step S571 of the first gaming state-specific lottery process shown in FIG. 117.

  First, the sub CPU 102 executes the general first game lottery process shown in FIG. 130 (S710). Next, the sub CPU 102 determines whether or not the ART direct hit flag is OFF (S711).

  If it is determined that the ART hit flag is OFF (YES), the sub CPU 102 determines whether the penalty game number is 0 (S712). If it is determined that the penalty game number is 0 (YES), the sub CPU 102 subtracts 1 from the ART high probability activated game number (S713).

  If it is determined in step S712 that the ART direct hit flag is OFF (NO), the sub CPU 102 determines whether or not the number of waiting games for direct hit ART is 0 or more (S714). If it is determined that the number of active standby games per ART is 0 or more (YES), the sub CPU 102 subtracts 1 from the number of active standby games per ART (S715).

  If it is determined in step S712 that the number of penalty games is not 0 (NO), or if it is determined in step S714 that the number of waiting games for direct hitting ART is not 0 or more (NO), or step S713 or step S715 After executing the above process, the sub CPU 102 executes the ART addition selection stock lottery process shown in FIG. 131 (S716).

  Next, the sub CPU 102 executes the ART direct lottery process shown in FIG. 132 (S717), executes the mini-slot lottery process (S718), and ends the first general medium lottery process. Here, in the mini-slot lottery process, when three replays are won in succession, mini-slot lottery is performed, and whether or not the ART is won is determined by the lottery result.

  As for the winning chance of the minislot lottery, 3% and 25% are selected with a probability of 50% when 3 replays are won, and 25% is selected when 4 replays are won. The result of the minislot lottery is displayed as an effect by the sub CPU 102 as a result of lottery by the slot machine displayed on the liquid crystal display device 11.

<General game 1 lottery processing>
FIG. 130 is a flowchart showing the general medium first game lottery process executed in step S710 of the first general medium lottery process shown in FIG.

  First, the sub CPU 102 sets the provisional gaming state to “general” (S720). Next, the sub CPU 102 sets a ceiling specified value for the number of ceiling games (S721). Next, the sub CPU 102 turns on the ART end flag (S722).

  Next, the sub CPU 102 determines whether or not the ART end flag is ON (S723). If it is determined that the ART end flag is ON (YES), the sub CPU 102 sets “ART end” as the game number management mode lottery type (S724).

  On the other hand, if it is determined that the ART end flag is not ON (NO), the sub CPU 102 determines whether or not the ART high probability end flag is ON (S725). If it is determined that the ART high probability end flag is not ON (NO), the sub CPU 102 ends the general medium first game lottery process.

  On the other hand, if it is determined that the ART high probability end flag is ON (YES), or after executing the process of step S724, the sub CPU 102 turns the ART end flag OFF (S726) and sets the ART high probability end flag. It is turned off (S727), and the general first game lottery process is terminated.

<ART addition selection stock lottery processing>
FIG. 131 is a flowchart showing the ART addition selection stock lottery process executed in step S716 of the first general medium lottery process shown in FIG. 129.

  First, the sub CPU 102 determines whether or not the penalty state flag is ON, and whether or not the RT gaming state is greater than 1 (S730). Here, when it is determined that the penalty state flag is ON or the RT gaming state is greater than 1 (YES), the sub CPU 102 ends the ART addition selection stock lottery process.

  On the other hand, if the penalty state flag is not ON and it is determined that the RT gaming state is not greater than 1 (NO), the sub CPU 102 determines whether the ART direct hit flag is ON and the MB is not activated. In step S731, it is determined whether the internal winning combination is “medium chelip” or “confirmed bell”.

  Here, when the ART direct hit flag is not ON, the MB is not in operation, and the internal winning combination is determined to be neither “medium chelip” nor “fixed bell” (NO), the sub CPU 102 ART addition selection stock lottery processing is terminated.

  On the other hand, if the ART hit flag is ON, or if it is determined that the MB is not operating and the internal winning combination is “medium chelip” or “confirmed bell” (YES), the sub CPU 102 determines that the first normal The extra selection lottery process is executed (S732), and the ART extra selection stock lottery process is terminated.

<Lottery processing for direct ART>
FIG. 132 is a flowchart showing the ART direct hitting process executed in step S717 of the first general medium lottery process shown in FIG.

  First, the sub CPU 102 determines whether or not the penalty state flag is ON, and whether or not the RT gaming state is greater than 1 (S740). If it is determined that the penalty state flag is ON or the RT gaming state is greater than 1 (YES), the sub CPU 102 ends the ART direct lottery process.

  On the other hand, when the penalty state flag is not ON and it is determined that the RT gaming state is not greater than 1 (NO), the sub CPU 102 determines whether or not the ART direct hit flag is ON (S741). If it is determined that the ART direct hit flag is ON (YES), the sub CPU 102 performs an ART direct hitting based on the ART direct hitting lottery table shown in FIG. 69 (S742).

  Next, the sub CPU 102 determines whether or not the lottery result of the ART direct winning lottery is non-winning (S743). If it is determined that the lottery result is non-winning (YES), the lottery processing for the ART direct hitting is performed. finish.

  On the other hand, when the lottery result is not non-winning, that is, when it is determined that the lottery result is winning (NO), the sub CPU 102 turns the ART direct hit flag ON (S744). Next, the sub CPU 102 sets a predetermined ART specified value for the number of remaining games of ART (hereinafter referred to as “the number of remaining ART games”) (S745), and ends the ART direct lottery process.

<Second general lottery process>
FIG. 133 is a flowchart showing the second general medium lottery process executed in step S572 of the first gaming state-specific lottery process shown in FIG. 117.

  First, the sub CPU 102 determines whether or not the ART direct hit flag is ON (S750). If it is determined that the ART direct hit flag is ON (YES), the sub CPU 102 sets “ART in progress” to the provisional gaming state (S751). Next, the sub CPU 102 executes a second normal extra selection lottery process shown in FIG. 155 (S752).

  On the other hand, if it is determined that the ART direct hit flag is not ON (NO), the sub CPU 102 determines whether or not the number of ART high probability activated games is 0 (S754). If it is determined that the number of ART high-probability activated games is 0 (YES), the sub CPU 102 sets the ART high-probability transition flag to ON (S755) and sets “ART high probability” to the provisional gaming state. (S756).

  If it is determined in step S754 that the number of ART high-probability activated games is not 0 (NO), or after the processing in step S752 or S756 is completed, the sub CPU 102 changes the game state transition at the time of first lock occurrence shown in FIG. The process is executed (S757), and the second general lottery process is terminated.

<3rd general lottery process>
FIG. 134 is a flowchart showing the third general medium lottery process executed in step S631 of the second gaming state-specific lottery process shown in FIG.

  First, the sub CPU 102 executes a transition process during the second gaming state ART shown in FIG. 117 (S760). Next, the sub CPU 102 executes the second lock occurrence gaming state transition process shown in FIG. 115 (S761), and ends the third general medium lottery process.

<First ART high probability medium lottery processing>
135 and 136 are flowcharts showing the first ART high-probability lottery process executed in step S574 of the first gaming state-specific lottery process shown in FIG. 117.

  First, the sub CPU 102 determines whether or not the ART high probability transition flag is ON (S770). If it is determined that the ART high probability transition flag is ON (YES), the sub CPU 102 turns the ART high probability transition flag OFF (S771) and sets the ART high probability remaining value to the ART high probability remaining game count. Is set (S772).

  If it is determined in step S770 that the ART high probability transition flag is not ON (NO), or after executing the processing of step S772, the sub CPU 102 determines whether or not the RT gaming state is greater than 1 (S773). .

  Here, when it is determined that the RT gaming state is not greater than 1 (NO), the sub CPU 102 determines whether or not the number of missed revival activated waiting games is greater than 0 (S774). Here, if it is determined that the number of missed revival activated games waiting is greater than 0 (YES), the sub CPU 102 subtracts 1 from the number of missed revival activated games waiting (S775).

  If it is determined in step S773 that the RT gaming state is greater than 1 (YES), if it is determined in step S774 that the number of missed revival activation waiting games is not greater than 0 (NO), or the process of step S775 is executed. Thereafter, the sub CPU 102 determines whether or not the penalty state flag is ON and whether or not the RT gaming state is greater than 1 (S776).

  If it is determined that the penalty state flag is ON or the RT gaming state is greater than 1 (YES), the sub CPU 102 adds 1 to the ART high probability total game number (S777).

  Next, the sub CPU 102 determines whether or not the loss revival flag is ON, and whether or not the number of missed revival activation waiting games is 0 (S778). If it is determined that the loss recovery flag is ON and the number of games waiting to be recovered is 0 (YES), the sub CPU 102 executes the first normal addition selection lottery processing shown in FIG. (S779).

  If it is determined in S776 that the penalty state flag is not ON and the RT gaming state is not greater than 1 (NO), it is determined in S778 that the loss recovery flag is not ON or that the number of games waiting for the recovery recovery is not 0. In the case (NO) or after executing the process of step S779, the sub CPU 102 determines whether or not the MB is inoperative (S780).

  If it is determined that the MB is not activated (YES), the sub CPU 102 subtracts 1 from the ART high probability remaining game number (S781). On the other hand, when it is determined that the MB is not in operation (NO), that is, when it is determined that the MB is in operation, or after the processing of step S781 is executed, the sub CPU 102 causes the main CPU 93 to execute the reel operation lottery It is determined whether or not the player has won (S782).

  Here, if it is determined that the winning reel action lottery is won (YES), the sub CPU 102 adds 1 to the number of aim occurrences (S783). Next, the sub CPU 102 determines whether or not the result of the lost reel action lottery is “next lever aligned” (S784).

  If it is determined that the result of the lost reel action lottery is “next lever aligned” (YES), the sub CPU 102 determines whether or not the lost recovery flag is OFF (S785).

  If it is determined that the loss revival flag is OFF (YES), the sub CPU 102 sets the loss revival flag to ON (S786), and sets the ART high probability of the loss revival activation specified value to the number of missed revival activation waiting games. Set (S787).

  If it is determined in step S782 that the lost reel action lottery has not been won (NO), if it is determined in step S785 that the lost recovery flag is not OFF (NO), or after performing the process of step S787. The sub CPU 102 determines whether or not the confirmation standby flag is OFF, and whether or not the missed reel action state acquired from the main at the start of the game is “confirmed” (S788).

  Here, when it is determined that the confirmed standby flag is OFF and the reel action state acquired from the main at the start of the game is “Confirmed” (YES), the sub CPU 102 sets the confirmed standby flag to ON. (S789).

  If it is determined in step S788 that the confirmation waiting flag is not OFF, or the reel action state acquired from the main at the start of the game is not “confirmed” (NO), or after executing the process of step S789, the sub CPU 102 Determines whether or not the confirmation standby flag is ON (S790).

  Here, when it is determined that the final standby flag is NO (YES), the sub CPU 102 adds 1 to the final standby game number (S791). If it is determined that the final standby flag is not NO (NO), or after executing the process of step S791, the sub CPU 102 ends the first ART high probability lottery process.

<Second ART high probability medium lottery processing>
FIG. 137 is a flowchart showing the second ART high-probability lottery process executed in step S575 of the first gaming state-specific lottery process shown in FIG. 117.

  First, the sub CPU 102 determines whether or not the loss recovery flag is ON, and whether or not the number of games waiting for recovery from recovery is 0 (S800). Here, if the loss recovery flag is not ON, or if it is determined that the number of games waiting for loss recovery is not 0 (NO), the sub CPU 102 determines whether the RT gaming state is less than 2 and the MB is not activated. It is determined whether or not the internal winning combination at the time is “SB Lip 1” or “SB Lip 2” (S801).

  If it is determined in step S801 that the RT gaming state is not less than 2 or the internal winning combination when the MB is not operating is “SB lip 1” or “SB lip 2” (NO), the sub CPU 102 determines the fixed standby rule. It is determined whether or not the number of games is 0 and whether or not the number of confirmed standby games is equal to or greater than the number of defined standby prescribed games (S802).

  If it is determined in step S802 that the number of fixed standby specified games is 0 or the number of fixed standby games is not equal to or greater than the number of fixed standby specified games (NO), the sub CPU 102 executes a game stop command for effect display of a game start command. It is determined whether or not the number is “6” (S806).

  If it is determined in step S806 that the game stop execution number for effect display of the game start command is not “6” (NO), the sub CPU 102 determines whether or not the ART high probability remaining game number is zero. (S807).

  If it is determined in step S807 that the ART high probability remaining game number is 0 (YES), the sub CPU 102 determines the ART high probability remaining game number based on the addition lottery table (not shown) of the ART high probability remaining game number. A game number addition lottery process is executed (S808).

  Next, the sub CPU 102 adds the lottery result of the addition lottery process of the ART high probability remaining game number to the ART high probability remaining game number (S809). Next, the sub CPU 102 determines whether or not the ART high probability remaining game number is 0 (S810). If it is determined that the number of remaining ART high probability games is 0 (YES), the sub CPU 102 executes the game state general medium transition process shown in FIG. 153 (S811).

  In step S800, when it is determined that the loss recovery flag is ON and the number of games waiting for loss recovery is 0 (YES), in step S801, the RT gaming state is less than 2 and the MB is not activated. If it is determined that the internal winning combination at the time is “SB Lip 1” or “SB Lip 2” (YES), in Step S802, the fixed standby prescribed game number is 0 or the fixed standby game number is the fixed standby prescribed game If it is determined that the number is not more than the number (YES), or if it is determined in step S806 that the game stop execution number for effect display of the game start command is “6” (YES), the sub CPU 102 selects FIG. The transition process during the first gaming state ART shown in FIG. Next, the sub CPU 102 adds the ART specified value to the number of remaining ART games (S814).

  If it is determined in step S807 that the ART high probability remaining game number is not 0 (NO), if it is determined in step S810 that the ART high probability remaining game number is not 0 (NO), or the process of step S811 is executed. After that, the sub CPU 102 executes the first lock occurrence gaming state transition process shown in FIG. 149 (S812), and ends the second ART high-probability lottery process.

<3 ART high probability medium lottery processing>
FIG. 138 is a flowchart showing the third ART high-probability lottery process executed in step S633 of the second gaming state-specific lottery process shown in FIG.

  First, the sub CPU 102 executes the second gaming state ART transition process shown in FIG. 152 (S820). Next, the sub CPU 102 executes the second lock occurrence gaming state transition process shown in FIG. 150 (S821), and ends the third ART high-probability lottery process.

<Lottery processing in preparation for the first ART>
FIG. 139 is a flowchart showing the first ART preparing lottery process executed in step S577 of the first gaming state-specific lottery process shown in FIG. 117.

  First, the sub CPU 102 executes a lottery process by adding the number of ART games directly shown in FIG. 156 (S830). Next, the sub CPU 102 performs a normal addition selection lottery for selecting the number of games to be added to the ART based on the normal addition selection lottery table shown in FIGS. 60 and 61 (S831).

  Here, the sub CPU 102 determines whether or not the lottery result of the normal selection selection lottery is winning (S832). If it is determined that the lottery result is winning (YES), the sub CPU 102 sets the lottery result in the basic payout table of the individual stock information (S833).

  Next, the sub CPU 102 sets “per addition selection” in the stock flag of the individual stock information (S834). Next, the sub CPU 102 performs an addition selection continuation state lottery for lottering the continuation state of the addition selection based on the ART addition selection continuation state lottery table shown in FIGS. 58 and 59 (S835).

  Next, the sub CPU 102 sets the result of the addition selection continuation state lottery to the continuation state of the individual stock information (S836). Next, the sub CPU 102 stocks the individual stock information in the storage area allocated to the sub RAM 104 (S837).

  When it is determined in step S832 that the lottery result of the normal selection selection lottery is not winning (NO), or after the processing of step S837 is executed, the sub CPU 102 performs processing based on the addition game lottery table shown in FIG. An extra game lottery is performed to determine whether or not to perform an extra game (S838).

  Here, the sub CPU 102 determines whether or not the lottery result of the extra game lottery is a win (S839). Here, if it is determined that the lottery result is a win (YES), the sub CPU 102 sets “addition game” to the stock flag of the individual stock information for the lottery result (S840), and the individual individual information is stored in the sub RAM 104. Stock in the storage area allocated to (S841).

  In step S839, when it is determined that the lottery result of the extra game lottery is not winning (NO), or after executing the processing of step S841, the sub CPU 102 sets the provisional gaming state to “ART in progress” (S842). The lottery process during the first ART preparation is terminated.

<Lottery process in preparation for 2nd ART>
FIG. 140 is a flowchart showing a second ART preparing lottery process executed in step S635 of the second gaming state-specific lottery process shown in FIG.

  First, the sub CPU 102 determines whether or not the provisional gaming state is “ART in progress” (S850). If it is determined that the provisional gaming state is not “ART in progress” (NO), the sub CPU 102 ends the second ART preparing lottery process.

  On the other hand, if it is determined that the provisional gaming state is “ART in progress” (YES), the sub CPU 102 determines whether the RT gaming state is 0, whether the internal winning combination is “medium correct bell”, “right 312”. It is determined whether or not the “correct answer bell” or “right 321 correct answer bell” and whether or not the first stop reel is other than the left reel 3L (S851).

  Here, it is determined that the RT gaming state is 0, the internal winning combination is “middle correct answer bell”, “right 312 correct answer bell” or “right 321 correct answer bell”, and the first stop reel is other than the left reel 3L. If it is (YES), the sub CPU 102 ends the lottery process during the second ART preparation.

  On the other hand, when the RT gaming state is not 0, the internal winning combination is not “middle correct answer bell”, “right 312 correct answer bell” or “right 321 correct answer bell”, or the first stop reel is not other than the left reel 3L (YES), the sub CPU 102 determines whether or not the RT gaming state after the third stop reel is stopped is 3 or more (S852).

  If it is determined that the RT gaming state after the third stop reel is stopped is 3 or more (YES), the sub CPU 102 ends the lottery process during the second ART preparation. On the other hand, if it is determined that the RT gaming state after the stop of the third stop reel is not 3 or more (NO), the sub CPU 102 sets the provisional gaming state to “ART ready” (S853) and the second ART. The lottery process in preparation ends.

<Lottery processing during the first ART>
141 and 142 are flowcharts showing the first ART lottery process executed in step S579 of the first gaming state-specific lottery process shown in FIG. 117.

  First, the sub CPU 102 executes a lottery process by adding the number of ART games directly shown in FIG. 156 (S860). Next, the sub CPU 102 performs an ART extra selection lottery for selecting the number of games to be added to the ART based on the ART extra selection lottery table shown in FIGS. 58 and 59 (S861).

  Here, the sub CPU 102 determines whether or not the lottery result of the ART addition selection lottery is winning (S862). If it is determined that the lottery result is a win (YES), the sub CPU 102 stores the lottery result in the basic payout table of the individual stock information (S863).

  Next, the sub CPU 102 sets “per addition selection” to the stock flag of the individual stock information (S864). Next, the sub CPU 102 performs an addition selection continuation state lottery for lottering the continuation state of the addition selection based on the addition selection continuation state lottery table shown in FIG. 66 (S865). Next, the sub CPU 102 sets the result of the addition selection continuation state lottery to the continuation state of the individual stock information (S866).

  In step S862, when it is determined that the lottery result of the ART addition selection lottery is not winning (NO), or after executing the processing of step S866, the sub CPU 102 determines that the MB is not activated and the internal winning combination is “RT4 transition A”. Or “RT4 transition B” is determined (S867). Here, “RT4 transition A” or “RT4 transition B” is a special role.

  Here, if it is determined that the MB is not activated and the internal winning combination is “RT4 transition A” or “RT4 transition B” (YES), based on the lottery table with the ART addition game shown in FIG. Then, the lottery with the ART on top of the game is performed (S868).

  Here, the sub CPU 102 determines whether or not the lottery result of the random addition lottery in the ART addition game is a win (S869). If it is determined that the lottery result is a win (YES), the sub CPU 102 sets “addition game” to the stock flag of the individual stock information (S870). Next, the sub CPU 102 stocks the stock individual information in the storage area allocated to the sub RAM 104 (S871).

  In step S867, when it is determined that the MB is not activated and the internal winning combination is not “RT4 transition A” or “RT4 transition B” (NO), when it is determined that the lottery result of the straight addition lottery of ART is not winning ( NO) Or, after executing the process of step S871, the sub CPU 102 executes the extra game stock lottery process shown in FIG. 157 (S872).

  Next, the sub CPU 102 determines whether or not the number of remaining ART games is greater than 0, whether or not the additional game flag is OFF, and whether or not the post-pseudo BB additional game flag is OFF (S880).

  Here, if the ART remaining game number is greater than 0, the additional game flag is OFF, and it is determined that the post-pseudo BB additional game flag is OFF (YES), the sub CPU 102 counts 1 from the ART remaining game number. Is subtracted (S881).

  On the other hand, if it is determined that the number of remaining ART games is not greater than 0, the additional game flag is not OFF, or the post-pseudo BB additional game flag is not OFF (NO), or after executing the process of step S881, The sub CPU 102 adds 1 to the total number of ART games (S882).

  Next, the sub CPU 102 sets the provisional game state to “ART in progress” (S883). Next, the sub CPU 102 determines whether or not “additional game” is set in the discharging stock flag (S885).

  Here, if it is determined that “additional game” is set in the stock flag being released (YES), the sub CPU 102 sets the provisional game state to “additional game” (S886). On the other hand, when it is determined that “additional game” is not set in the stock flag being released (NO), the sub CPU 102 determines whether “per addition selection” is set in the stock flag being released. Judgment is made (S887).

  Here, if it is determined that “per addition selection” is set in the stock flag being released (YES), the sub CPU 102 sets the provisional gaming state to “selecting addition” (S888).

  On the other hand, if it is determined that “per addition selection” is not set in the stock flag being released (NO), the sub CPU 102 discards the stock being released (S889). Next, the sub CPU 102 sets the stock type of the stock being released to “no stock being released” (S890).

  After executing the processing of step S886, S888, or S890, the sub CPU 102 stores in the storage areas A to D whether the provisional gaming state is “ART in progress”, whether the number of remaining ART games is zero, or not. It is determined whether or not the individual information is stored, and whether or not the extra game flag is OFF (S891).

  Here, when it is determined that the provisional gaming state is “ART in progress”, the number of remaining ART games is 0, the stock individual information is not stored in the storage areas A to D, and the extra gaming flag is OFF (YES), the sub CPU 102 performs an ART pullback lottery for performing an ART pullback lottery with a predetermined probability (S892).

  Here, the sub CPU 102 determines whether or not the lottery result of the ART pullback lottery is “out” (S893), and when it is determined that the lottery result of the ART pullback lottery is not “out” (NO), The lottery result is set in the ART pullback flag (S894), and the ART specified value is added to the number of remaining ART games (S895).

  In step S893, when the sub CPU 102 determines that the lottery result of the ART pullback lottery is “out of” (YES), or after executing the process of step S895, the sub CPU 102 sets the game number management mode lottery type. “ART end” is set (S896). Next, the sub CPU 102 sets the provisional gaming state to “general” (S897), and sets the ART end flag (S898).

  In step S891, the provisional gaming state is not “ART in progress”, the number of remaining ART games is not zero, stock individual information is stored in any of the storage areas A to D, or the extra gaming flag is not OFF. If it is determined (NO), or after executing the process of step S898, the sub CPU 102 ends the lottery process during the first ART.

<Lottery processing during 2nd ART>
FIG. 143 is a flowchart showing the second lottery processing during the ART executed in step S637 of the second gaming state-specific lottery processing shown in FIG.

  First, the sub CPU 102 determines whether or not the provisional gaming state is “general medium” and the RT gaming state after the third stop reel is stopped is 2 or more (S900). Here, when it is determined that the provisional gaming state is “general” and the RT gaming state after the third stop reel is stopped is 2 or more (YES), the sub CPU 102 sets the provisional gaming state to “ “Waiting for normal return” is set (S901). Next, the sub CPU 102 sets an ART end flag (S902).

  If it is determined in step S900 that the provisional gaming state is not “general”, or the RT gaming state after the third stop reel is stopped is not 2 or more (NO), or after the processing of step S902 is executed The sub CPU 102 ends the lottery process during the second ART.

<First lottery selection lottery process>
144 and 145 are flowcharts showing the first extra selection lottery process executed in step S581 of the first gaming state-specific lottery process shown in FIG.

  First, the sub CPU 102 sets the contents of the use table in the pre-shuffle payout table (S910). Next, the sub CPU 102 determines whether or not the peeping activation flag is “peeping in operation” (S911).

  If the sub CPU 102 determines that the peeping activation flag is “peeping in operation” (YES), the sub CPU 102 sets the peeping activation flag to “none” (S912). On the other hand, when it is determined that the peeping activation flag is not “peeping in operation” (NO), or after executing the process of step S912, the sub CPU 102 determines that the peeping activation flag is “peeping”. It is determined whether or not (S913).

  If it is determined that the peeping activation flag is “with peeping” (YES), the sub CPU 102 sets the peeping activation flag to “peeping in operation” (S914). On the other hand, when it is determined that the peeping activation flag is not “peeping” (NO), or after executing the process of step S913, the sub CPU 102 determines whether the peeping activation flag is “peeping in operation”. It is determined whether or not (S915).

  Here, when it is determined that the peeping activation flag is “peeping in operation” (YES), the sub CPU 102 performs the extra selection special function activation lottery based on the special function activation lottery table shown in FIG. (S916).

  Next, the sub CPU 102 determines whether or not the lottery result of the extra selection special function activation lottery is “smash” (S917). Here, when it is determined that the lottery result of the extra selection special function activation lottery is “collapsed” (YES), the sub CPU 102 determines the number of elements to be collapsed based on the collapsed number lottery table shown in FIG. 63. A lottery selection lottery lottery is performed (S918). Next, the sub CPU 102 sets the lottery result as the number to be crushed (S919), and sets 1 as the addition selection determination game number (S920).

  If it is determined in step S917 that the lottery result of the extra selection special function activation lottery is not “smashed” (NO), the sub CPU 102 determines whether the lottery result of the extra selection special function activation lottery is “peek”. Is determined (S921).

  When it is determined that the lottery result of the extra selection special function activation lottery is “peep” (YES), the sub CPU 102 sets “peep” in the peek activation flag (S922), and determines the addition selection. 2 is set as the number of games (S923).

  If it is determined in step S921 that the lottery result of the extra selection special function activation lottery is not “peek” (NO), the sub CPU 102 sets 1 as the number of extra selection decision games (S924).

  In step S915, when it is determined that the peeping activation flag is not “peeping in operation” (NO), or after executing the process of step S920, S923, or S924, the sub CPU 102 determines that the number of addition selection determination games is 1. It is determined whether or not (S925).

  Here, if it is determined that the number of addition selection determination games is 1 (YES), the sub CPU 102 performs an addition selection continuation state lottery based on the addition selection continuation state lottery table shown in FIG. 66 (S926). .

  Next, the sub CPU 102 determines whether or not the lottery result of the extra selection continuation state lottery is not “non-continuous” (S927), and determines that the lottery result of the extra selection continuation state lottery is not “non-continuous”. (YES), the lottery result is set in the continuation state payout table (S928).

  If it is determined in step S925 that the number of games to be selected for addition is not 1 (NO), if it is determined in step S927 that the lottery result of the additional selection continuation state lottery is not “non-continuous” (NO), or step S928 After executing the above process, the sub CPU 102 determines whether or not the MB is inactive and the internal winning combination is “RT4 transition A” or “RT4 transition B” (S929).

  Here, if the MB is not activated and the internal winning combination is determined to be “RT4 transition A” or “RT4 transition B” (YES), the sub CPU 102 determines the ART addition game straight-line lottery shown in FIG. On the basis of the table, the lottery with the ART onboard is performed (S930).

  Here, the sub CPU 102 determines whether or not the lottery result of the random addition lottery with the ART addition is winning (S931). If it is determined that the lottery result is a win (YES), the sub CPU 102 sets “addition game” to the stock flag of the individual stock information (S932).

  If it is determined in step S929 that the MB is not activated and the internal winning combination is not “RT4 transition A” or “RT4 transition B” (NO), in step S931, the lottery result of the straight addition lottery game is not winning. If it is determined (NO), or after executing the process of step S932, the sub CPU 102 executes the extra game stock lottery process shown in FIG. 157 (S933).

  Next, the sub CPU 102 randomly determines the arrangement of the use table (S934), subtracts 1 from the number of added games determined game (S935), and ends the first added selection lottery process.

<Second lottery selection lottery process>
FIG. 146 is a flowchart showing the second over-selected lottery process executed in step S582 of the first gaming state-specific lottery process shown in FIG. 117.

  First, the sub CPU 102 determines whether or not the number of addition selection determination games is 0 (S940). If it is determined that the number of addition selection determination games is 0 (YES), the addition shown in FIG. 66 is performed. An addition selection continuation state lottery based on the selection continuation state lottery table is performed (S941).

  Next, the sub CPU 102 determines whether or not the lottery result of the addition selection continuation state lottery is “non-continuation” (S942), and determines that the lottery result of the addition selection continuation state lottery is “non-continuation”. (YES), the provisional game state is set to “ART in progress” (S943).

  On the other hand, if it is determined that the lottery result of the extra selection continuing state lottery is not “non-continuous” (NO), the sub CPU 102 determines whether the lottery result of the extra selection continuing state lottery is “continuation D” to “continuation F”. It is determined whether or not (S944).

  Here, when it is determined that the lottery result of the additional selection continuation state lottery is “continuation D” to “continuation F” (YES), the sub CPU 102 sets the provisional gaming state to “ART in progress”. (S945) and the stock release sign flag is cleared (S946).

  On the other hand, when it is determined that the lottery result of the extra selection continuation state lottery is not any of “continuation D” to “continuation F” (NO), the sub CPU 102 sets the provisional game state to “selecting addition”. (S947). If it is determined in step S940 that the number of games to be selected for addition is not 0 (NO), the sub CPU 102 sets the provisional game state to “selecting an additional” (S948).

  After executing the processing of step S943, S946, S947, or S948, if the pseudo BB winning state is ON, the sub CPU 102 sets “between BB flags” to the provisional gaming state (S949).

  Next, the sub CPU 102 determines whether or not the number of additional selection determination games is 0 (S950). If it is determined that the number of additional selection determination games is 0 (YES), the number of additional games to be acquired is permitted. The flag is turned on (S951).

  On the other hand, if it is determined that the number of games to be selected for addition is not 0 (NO), or after executing the process of step S951, the sub CPU 102 ends the second lottery process during selection for addition.

<Lottery processing during selection of 4th extra>
FIG. 147 and FIG. 148 are flowcharts showing the fourth extra selection lottery process executed in step S651 of the no-operation command reception process shown in FIG.

  First, the sub CPU 102 determines whether or not the additional game number acquisition permission flag is ON and the third stop reel is stopped (S960). Here, when it is determined that the added game number acquisition permission flag is not ON or after the third stop reel has stopped (NO), the sub CPU 102 ends the fourth added selection lottery process.

  On the other hand, when it is determined that the added game number acquisition permission flag is ON and the third stop reel has stopped (YES), the sub CPU 102 determines whether the no-operation command input information represents the MAX bet button 14 or not. It is determined whether or not (S961).

  If it is determined that the non-operation command input information represents the MAX bet button 14 (YES), the sub CPU 102 turns off the additional game number acquisition permission flag (S962) and selects the selected payout position (selected). A value corresponding to (element) is added to the number of remaining ART games (S963). Next, the sub CPU 102 adds a value corresponding to the selected payout position to the added selection notification game number (S964), and ends the fourth added selection lottery process.

  If it is determined in step S961 that the no-operation command input information does not represent the MAX bet button 14 (NO), the sub CPU 102 determines whether the no-operation command input information represents the left stop button 17L. (S965).

  If it is determined that the no-operation command input information represents the left stop button 17L (YES), the sub CPU 102 also sets the selected payout position even when the selected payout position is moved by one element position in the left direction. If it is within the selectable range, the selected payout position is shifted to the left by one element position (S966), and the fourth extra selection lottery process is terminated.

  On the other hand, when it is determined that the no-operation command input information does not represent the left stop button 17L (NO), the sub CPU 102 determines whether the no-operation command input information represents the right stop button 17R (S967). ).

  If it is determined that the no-operation command input information represents the right stop button 17R (YES), the sub CPU 102 also sets the selected payout position even when the selected payout position is moved by one element position in the right direction. If it is within the selectable range, the selected payout position is shifted to the right by one element position (S968), and the fourth extra selection lottery process is terminated.

  On the other hand, if it is determined that the no-operation command input information does not represent the right stop button 17R (NO), the sub CPU 102 determines whether the no-operation command input information represents the middle stop button 17C (S969). ).

  Here, when it is determined that the no-operation command input information represents the middle stop button 17C (YES), the sub CPU 102 also sets the selected payout position even when the selected payout position is moved downward by one element position. If it is within the selectable range, the selected payout position is shifted downward by one element position (S970), and the fourth extra selection lottery process is terminated.

  On the other hand, when it is determined that the no-operation command input information does not represent the middle stop button 17C (NO), the sub CPU 102 determines whether the no-operation command input information represents the selection button 18 or the determination button 19. (S971). If it is determined that the non-operation command input information does not represent either the selection button 18 or the determination button 19 (NO), the sub CPU 102 ends the fourth extra selection lottery process.

  On the other hand, when it is determined that the no-operation command input information represents the selection button 18 or the determination button 19 (YES), the sub CPU 102 determines whether or not the peeping activation flag is “peeping in operation”. (S972).

  Here, when it is determined that the peeping activation flag is “peeping in operation” (YES), the sub CPU 102 sets the selected payout position to a random position (S973), and the fourth extra selection selected lottery. The process ends.

  On the other hand, if it is determined that it is not “in peeking operation” (NO), the sub CPU 102 sets the selected payout position to a position where the maximum payout can be obtained (S974), and ends the fourth extra lottery process during selection. To do.

  It should be noted that “the selected payout position is within a selectable range even when the selected payout position is moved leftward (rightward or downward) by one element position” (upper part of S966, S968, and S970). Specifically, this is an execution condition for the process of determining the selected payout position and moving the selected payout position performed in the fourth extra selection selected lottery process. For example, in FIG. When the left stop button 17L is pressed while the element (6th element) is selected, the selected payout position moves to the upper right element (5th element), but the selected payout position is the element. If the number is less than the number or exceeds the number of elements, the process of moving the selected payout position by one element position is not performed. The same applies when a right stop button 17R and a middle stop button 17C described later are pressed.

<Lottery processing during extra game>
The lottery process during extra game is executed by the sub CPU 102 over a predetermined number of games (for example, 10 games) in step S584 of the first game state-specific lottery process shown in FIG.

  In the extra game lottery process, the sub CPU 102 notifies the stop operation of the reels 3L, 3C, and 3R so that the RT gaming state does not change from the RT4 gaming state, and the reel for advantageously winning the internal winning combination 3L, 3C, 3R stop operation is notified.

  Further, the sub CPU 102 determines that “RT4 transition A”, “RT4 transition B”, “BAR ten”, “RT4K lip 1st”, “RT4K lip 2nd” and “RT4K lip 3rd” are determined as internal winning combinations. Sends a message prompting to display “BAR-BAR-BAR” along the active line and a stop operation of the reels 3L, 3C, 3R to display “BAR-BAR-BAR” along the active line. Inform.

  Here, when “RT4 transition A” and “RT4 transition B” are determined as the internal winning combination, the sub CPU 102 adds 1 to the number of additional selection determined games.

<Game state transition process when first lock occurs>
FIG. 149 is a flowchart showing the first lock occurrence gaming state transition process executed in step S757 of the second general medium lottery process shown in FIG.

  First, the sub CPU 102 determines whether or not the effect display game stop execution number of the game start command is “6” (S980), and the effect display game stop execution number of the game start command is “6”. If it is determined (YES), “ART in progress” is set in the provisional game state (S981).

  In step S980, when it is determined that the game stop execution number for effect display of the game start command is not “6” (NO), or after executing the process of step S981, the sub CPU 102 determines the gaming state when the first lock is generated. End the transition process.

<Game state transition process when second lock occurs>
FIG. 150 is a flowchart showing the second lock occurrence gaming state transition process executed in step S761 of the third general medium lottery process shown in FIG. 134 and step S821 of the third ART high probability medium lottery process shown in FIG. 138. It is.

  First, the sub CPU 102 determines whether or not the effect display game stop execution number of the game start command is “6” (S990), and the effect display game stop execution number of the game start command is “6”. If it is determined (YES), it is determined whether or not the RT gaming state after the third stop reel has stopped is less than 3, and the gaming state is “waiting for normal return” (S991).

  Here, when it is determined that the RT gaming state after the third stop reel is stopped is less than 3 and the gaming state is “waiting for normal return” (NO), the sub CPU 102 sets the provisional gaming state to “ “ART ready” is set (S992).

  On the other hand, if it is determined that the RT gaming state after the stop of the third stop reel is not less than 3 or that the gaming state is not “waiting for normal return” (NO), the sub CPU 102 sets “ART” to the provisional gaming state. “Medium” is set (S993).

  In step S990, when it is determined that the game stop execution number for effect display of the game start command is not “6” (NO), or after executing the process of step S992 or S993, the sub CPU 102 determines that the second lock has occurred. The game state transition process ends.

<Transition process during the first game state ART>
FIG. 151 is a flowchart showing the first gaming state ART transition process executed in step S813 of the second ART high-probability lottery process shown in FIG. In the transition process in the first gaming state ART, the sub CPU 102 sets “ART in progress” to the provisional gaming state (S1000), and executes the second normal extra selection lottery process shown in FIG. 155 (S1001).

<Transition process during the second game state ART>
152 is a flowchart showing the second gaming state ART transition process executed in step S760 of the third general medium lottery process shown in FIG. 134 and step S820 of the third ART high probability medium lottery process shown in FIG. 138. is there.

  First, the sub CPU 102 determines whether or not the provisional gaming state is “ART in progress” and the RT gaming state after the third stop reel is stopped is 2 or less (S1010), and the provisional gaming state is “ART. If it is determined that the RT gaming state after the stop of the third stop reel is 2 or less (YES), “ART ready” is set in the provisional gaming state.

  In step S1010, when it is determined that the provisional gaming state is not “ART in progress”, or the RT gaming state after the third stop reel is stopped is not 2 or less (NO), or after executing the process of step S1011 The sub CPU 102 ends the transition process during the second gaming state ART.

<Game state general transition process>
FIG. 153 is a flowchart showing the gaming state general medium transition process executed in step S811 of the second ART high-probability random determination process shown in FIG. In the game state general transition process, the sub CPU 102 turns on the extra game end flag (S1015), and sets the provisional game state to “general medium” (S1016).

<First normal addition selection lottery processing>
FIG. 154 is a flowchart showing the first normal extra selection lottery process executed in step S779 of the first ART high-probability random determination process shown in FIGS. 135 and 136.

  First, the sub CPU 102 performs the normal addition selection lottery for performing the normal addition selection lottery for selecting the number of games to be added to the ART based on the normal addition selection lottery table shown in FIGS. 60 and 61 (S1020). Here, the sub CPU 102 determines whether or not the lottery result of the normal selection selection lottery is non-winning (S1021). When it is determined that the lottery result is non-winning (YES), the sub CPU 102 ends the first normal addition selection lottery process.

  If it is determined in step S91 that the lottery result of the normal addition selection lottery is not non-winning (NO), the sub CPU 102 sets the lottery result in the basic payout table of stock individual information (S1022).

  Next, the sub CPU 102 sets “per addition selection” to the stock flag of the individual stock information (S1023). Next, the sub CPU 102 performs an addition selection continuation state lottery for lottery of the continuation state of the addition selection based on the addition selection continuation state lottery table shown in FIG. 66 (S1024). Next, the sub CPU 102 sets the result of the addition selection continuation state lottery in the continuation state of the individual stock information (S1025), and ends the first normal addition selection lottery process.

<Second normal addition selection lottery processing>
FIG. 155 is a flowchart showing the second normal extra selection lottery process executed in step S752 of the second general medium lottery process shown in FIG. 133 and step S1001 of the transition process in the first gaming state ART shown in FIG. 151. is there.

  First, the sub CPU 102 performs an ART initial hit addition selection lottery based on the ART initial hit addition lottery table shown in FIG. 57 (S1032), and determines whether or not the lottery result is non-winning (S1033). ).

  Here, when it is determined that the lottery result of the ART initial selection extra lottery is non-winning (YES), the sub CPU 102 ends the second normal extra selection lottery process. On the other hand, if it is determined that the lottery result of the ART selection bonus lottery is not non-winning (NO), the sub CPU 102 sets the lottery result in the basic payout table of stock individual information (S1034).

  Next, the sub CPU 102 sets “per addition selection” to the stock flag of the individual stock information (S1035). Next, the sub CPU 102 performs an addition selection continuation state lottery for lottery of the continuation state of the addition selection based on the addition selection continuation state lottery table shown in FIG. 66 (S1036). Next, the sub CPU 102 sets the result of the addition selection continuation state lottery to the continuation state of the individual stock information (S1037), and ends the second normal addition selection lottery process.

<Bart lottery processing with direct number of ART games>
FIG. 156 is a flowchart showing the ART lottery adding lottery process executed in step S830 of the first ART preparing lottery process shown in FIG. 139 and step S860 of the first ART lottery process shown in FIGS. 141 and 142. is there.

  First, the sub CPU 102 performs a lottery game by directly adding the number of games to be added to the ART based on the game number addition lottery table shown in FIG. 55 (S1040), and determines whether or not the lottery result is greater than zero. Judgment is made (S1041). If it is determined that the lottery result of the lottery adding the number of games is greater than 0 (YES), the sub CPU 102 adds the lottery result to the number of remaining ART games (S1042).

  In step S1041, when it is determined that the lottery result of the game number direct lottery is not larger than 0 (NO), or after executing the process of step S1042, the sub CPU 102 displays the lottery result of the game number direct lottery ART. The number of direct ride notification games is set (S1043), and the number of ART games is set directly and the lottery process is terminated.

<Additional game stock lottery processing>
FIG. 157 shows the extra game stock lottery process executed in step S872 of the first ART lottery process shown in FIGS. 141 and 142 and in step S933 of the first extra selection lottery process shown in FIGS. 144 and 145. It is a flowchart.

  First, the sub CPU 102 performs ART extra game stock lottery based on the extra game lottery table shown in FIG. 68 (S1050), and determines whether or not the lottery result is a win (S1051).

  Here, if it is determined that the lottery result of the ART addition game stock lottery is winning (YES), the sub CPU 102 sets “addition game” in the stock flag of the individual stock information (S1052).

  If it is determined in step S1051 that the lottery result of the ART extra game stock lottery is not winning (NO), or after executing the processing of step S1052, the sub CPU 102 ends the extra game stock lottery processing.

<Normal lottery waiting process for return>
FIG. 158 is a flowchart showing the normal return waiting lottery process executed in step S586 of the first gaming state-specific lottery process shown in FIG.

  First, the sub CPU 102 determines whether the MB is not activated and the internal winning combination is “middle correct answer bell”, “right 312 correct answer bell”, or “right 321 correct answer bell” (S1060). If it is determined that the MB is not activated and the internal winning combination is not “medium correct answer bell”, “right 312 correct answer bell” or “right 321 correct answer bell” (NO), the sub CPU 102 enters the provisional gaming state. “Waiting for normal return” is set (S1061), and a return lottery process for performing return lottery with a predetermined probability is executed (S1062).

  On the other hand, if it is determined that the MB is not activated and the internal winning combination is “middle correct answer bell”, “right 312 correct answer bell” or “right 321 correct answer bell” (YES), the sub CPU 102 sets the ART end flag. It is turned on (S1063), and “general medium” is set as the provisional game state (S1064).

  After executing the process of step S1062 or S1064, the sub CPU 102 executes the first lock occurrence gaming state transition process shown in FIG. 149 (S1065). Next, the sub CPU 102 determines whether or not the provisional gaming state is “waiting for normal return” or “in general” (S1066).

  Here, if it is determined that the provisional gaming state is “waiting for normal return” or “normally waiting” (YES), the sub CPU 102 ends the lottery process waiting for normal return. On the other hand, if it is determined that the provisional gaming state is not “normally waiting for return” or “normal” (NO), the sub CPU 102 turns off the ART end flag (S1067) and clears the ART pullback flag ( S1068), the normal lottery waiting process is terminated.

  As described above, the pachislot machine 1 according to the present embodiment is determined on the condition that the addition number of the ART game number is increased with the first probability and the addition number of the ART game number is determined. Whether or not to add the determined addition number to the ART game number is determined with a second probability that increases as the added number increases.

  That is, the pachislot machine 1 according to the present embodiment reduces the probability that the number of ART games is added when the number of ART games is small compared to when the number of ART games is large. Therefore, it is possible to suppress excessive payout of medals and to prevent the player's interest from being lowered.

  In addition, the pachislot machine 1 according to the present embodiment, in the extra game, for example, every time the combination of symbols constituting “RT4 transition A” or “RT4 transition B” stops on the active line, In order to increase the number of lotteries per game with respect to the added number, every time a combination of symbols constituting “RT4 transition A” or “RT4 transition B” is displayed on the active line, “RT4 transition A” or “RT4 It is possible to make the player expect a change in privilege for the display of “Transition B”.

  In addition, the pachislot machine 1 according to the present embodiment has the number of ART games added in the lottery result per game to the number of ART games added each time the reels 3L, 3C, 3R are stopped. Since the notification is made from a small number of lottery results, the player's expectation from when the first reel is stopped to when the last reel is stopped can be maintained.

  Further, the pachislot machine 1 according to the present embodiment may determine that the lock is to be performed in the next game in the off game with a high probability of ART and notify a specific stop operation order (for example, right press). On the condition that it is determined, a specific stop operation order for displaying a combination of symbols (for example, “蝙蝠”) on the active line is notified.

  In addition, the pachislot machine 1 according to the present embodiment is a lock performed in the next game on condition that the combination of symbols is not displayed on the active line as a result of the stop operation in the specific stop operation sequence. A “removal reel action” is performed in which at least one of the reels 3L, 3C, 3R is rotated so that the symbol combination is displayed on the active line.

  For this reason, the pachislot machine 1 according to the present embodiment uses the combination of symbols based on whether or not the locking is performed and whether or not a specific stop operation sequence is performed without changing the RT gaming state. The probability of display can be changed, and the data area to be used can be reduced.

  In addition, the pachislot machine 1 according to the present embodiment is set to a mode in which it is determined that the mode is determined to be locked in the next game from the current mode based on the winning of a specific internal winning combination having a high ART probability. A lottery of whether or not to move is performed.

  On the other hand, the pachislot machine 1 according to the present embodiment shifts the mode from the current mode to a mode with a low probability of being determined to be locked in the next game based on a non-winning winning combination with a high probability of ART. A lottery of no is performed.

  As a result, the pachislot machine 1 according to the present embodiment is more likely to be determined to lock in the next game when the winning of a specific internal winning combination continues during the ART high probability. If a winning combination is not won during the probability, it is difficult to decide to lock in the next game.

  Therefore, the pachislot machine 1 according to the present embodiment can provide undulations in the probability of occurrence of locks during the high probability of ART, and can improve the interest during the high probability of ART.

  In addition, the pachislot machine 1 according to the present embodiment allows the player to select an additional number of ART games that is advantageous to the player, so that the number of games is relatively large depending on the selection result of the player. Can be added to the ART, so that the player's interest in the ART can be maintained.

  In addition, the pachislot machine 1 according to the present embodiment allows the player to select one element from the plurality of elements in a state in which the player is notified of the distribution of the number of ART games for the plurality of elements. It is possible to improve the interest of the player when the player selects an element.

  In addition, the pachislot machine 1 according to the present embodiment informs the player of the number of ART games associated with at least one element among the plurality of elements ("smashing" function), and Since the player selects one element from among them, the player can select an element relatively advantageously, and it is possible to improve the interest of the player when the player selects an element.

  In addition, the pachislot machine 1 according to the present embodiment is provided on the condition that a predetermined operation has been performed in a state in which a plurality of elements are associated with each other so that the number of ART games associated with the plurality of elements cannot be identified That a predetermined operation has been performed in a state where a plurality of elements are selected so that the number of ART games associated with each of the plurality of elements is randomly selected from among the plurality of elements. As a condition, an element that is most advantageous to the player is selected from a plurality of elements, so that the selection of the element by the player can be simplified.

  Further, the pachislot machine 1 according to the present embodiment determines the number of games associated with the selected element as an addition number of the number of games of ART on condition that one element is selected, Since the average of the number of games respectively associated with a plurality of elements is determined as an addition of the number of ART games on condition that an operation has been performed, it is also possible for a player to aim for a large number of games. It is also possible to select the number of games played, and to allow the player to select game characteristics.

  In addition, the pachislot machine 1 according to the present embodiment sets the number of grace games when an irregular stop operation is performed, and on condition that the irregular stop operation is performed again while the number of grace games is consumed. , Penalty not to do ART lottery.

  For this reason, the pachislot machine 1 according to the present embodiment determines that the first irregular stop operation is an unintentionally performed irregular stop operation and does not impose a penalty, while the number of grace games is exhausted. A penalty is imposed on the second anomaly stop operation made during this period, judging that the anomaly stop operation was intentionally performed.

  Therefore, the pachislot machine 1 according to the present embodiment changes the weight of the penalty imposed on the player between the irregular stop operation performed unintentionally by the player and the irregular stop operation performed intentionally. Thus, it is possible to prevent a player from penalizing a shift operation unintentionally.

  In addition, the pachislot machine 1 according to the present embodiment may be an irregular stop operation performed intentionally when there is a winning combination by the irregular stop operation in a state where the number of grace games is not set. It is determined that the penalty is high, and a penalty is imposed for a number of games smaller than the number of penalty games imposed when the second irregular stopping operation is performed. Thereby, the weight of the penalty imposed on the player can be changed according to the possibility of an irregular stopping operation intentionally performed.

  In addition, the pachislot machine 1 according to the present embodiment performs a specific operation (pressing the MAX bet button 14) when a predetermined condition is satisfied when a re-game act is won. In order to stop the automatic insertion of medals until there is enough time for the replay actuator to win the presentation, and even if the replay actuator wins, the medal is inserted The effect executed at the time can be executed by the player's game operation.

  Further, the pachislot machine 1 according to the present embodiment switches the screen displayed on the liquid crystal display device 11 to the selected game screen when the display end condition of the screen displayed on the liquid crystal display device 11 is satisfied during the selected game. When the screen is switched, the selection state information stored in the sub RAM 104 is reflected on the selected game screen.

  Therefore, when the pachislot machine 1 according to the present embodiment returns the selected game screen even when the selected game screen is switched to another screen during the selected game in which the number of additional games of the ART is determined, In addition, the selection state of the selected game can be reproduced on the selected game screen.

  In addition, the pachislot machine 1 according to the present embodiment selects the selected game from the error screen displayed on the liquid crystal display device 11 when an error is detected during the selected game by at least one of the main control circuit 91 and the sub control circuit 101. When the screen is restored, the selection state of the selected game can be reproduced on the selected game screen.

  Further, the pachislot machine 1 according to the present embodiment displays the selected game screen from the error information history screen even when the error information history screen indicating the error history is displayed on the liquid crystal display device 11 during the selected game. When returning, the selection state of the selected game can be reproduced on the selected game screen.

  In addition, the pachislot machine 1 according to the present embodiment displays information indicating at least one of a divided value obtained by dividing the added number of added ARTs and an integrated value of the divided value every time a predetermined condition is satisfied. Since the information is sequentially displayed on the device 11, it is possible to make the player have a sense of expectation that a privilege more than the number of games added to the ART displayed on the liquid crystal display device 11 can be received.

  In addition, the pachislot machine 1 according to the present embodiment can prevent an effect related to the number of additional games displayed on the liquid crystal display device 11 from being interrupted by a game operation.

  In addition, the pachislot machine 1 according to the present embodiment changes the display time of the effect related to the number of additional games displayed on the liquid crystal display device 11 according to the player's preference within a predetermined time range. be able to.

  In addition, when the image displayed on the liquid crystal display device 11 is switched while the shutter is operating, the pachislot machine 1 according to the present embodiment stores shutter operation data representing the state of the shutter in the sub RAM 104. Then, in order to ensure the visibility of the image after switching, the shutter is moved to the exposure position, and when the display end condition for the image after switching is satisfied, the shutter is brought into a state represented by the shutter operation data stored in the sub-RAM 104.

  For this reason, the pachislot machine 1 according to the present embodiment can continue the effect by the operation of the accessory that was executed before switching the image displayed on the liquid crystal display device 11, and the player's interest in the game Can be suppressed.

  In addition, the pachislot machine 1 according to the present embodiment stores the shutter operation data in the sub-RAM 104 and ensures the visibility of the error screen when the error screen display condition is satisfied while the shutter is operating. When the error screen display end condition is satisfied when the shutter is moved to the exposure position, the shutter is moved to the state represented by the movable information stored in the sub-RAM 104, and is executed before the error screen is displayed on the liquid crystal display device 11. The effect by the operation of the shutter can be continued.

  Further, the pachislot machine 1 according to the present embodiment stores the shutter operation data in the sub-RAM 104 and the visibility of the error information history screen when the error information history screen display condition is satisfied while the shutter is operating. When the error information history screen display end condition is satisfied when the shutter is moved to the exposure position in order to secure the error, the shutter is set in the state represented by the shutter operation data stored in the sub-RAM 104, and the error information history is stored in the liquid crystal display device 11. It is possible to continue the effect by the operation of the shutter that has been executed before the screen is displayed.

  In addition, the pachislot machine 1 according to the present embodiment synchronizes with the no-operation command transmitted from the main control circuit 91 to the sub-control circuit 101 on the condition that the lock effect is being executed. Since the performance by the sub-control circuit 101 is executed, the synchronization deviation between the performance by the main control circuit 91 and the performance by the sub-control circuit 101 can be eliminated.

  In addition, the pachislot machine 1 according to the present embodiment performs an effect operation by the shutter based on the fact that each step of the effect is executed, so that the lock effect by the main control circuit 91 and the sub control circuit 101 It is possible to eliminate a synchronization shift with the effect by the shutter.

  In addition, the pachislot machine 1 according to the present embodiment performs shutter operations so that the operations of the shutters are matched based on the effects before being saved by the sub RAM 104, the determined effects, and the shutter operation combination determination table. Since the sequence is constructed, the control of the shutter operation can be simplified.

  In addition, the pachislot machine 1 according to the present embodiment can prevent the shutter from operating normally due to inconsistency in the coordination of the shutter operation even if there is an error in the control of the shutter operation. it can.

  In addition, the pachislot machine 1 according to the present embodiment, when a stop operation different from the predetermined stop operation sequence is performed, the game state of the main control circuit 91, the game state of the sub control circuit 101, and the internal winning combination In order to set an unfavorable state according to the size of the privilege that the player may be able to obtain by setting the unfavorable state based on the game, the stop operation is different from the predetermined stop operation sequence. It is possible to appropriately set a disadvantageous state for the operation.

  Also, the pachislot machine 1 according to the present embodiment sets the number of grace games when an abnormal operation of the sub-control circuit 101 is detected, and the sub-control circuit while the unit game of the number of grace games is executed. On the condition that the abnormal operation 101 is detected again, a disadvantageous state for the player is set.

Gaming machines installed in game stores are classified into gaming machines by noise such as external noise from external devices such as mobile terminals possessed by the player and radiation noise in gaming machines mainly generated from medals in the hopper. An error may occur, and if it is determined that all errors occurring in the gaming machine are goto acts, an unpleasant discomfort is given to the player. For this reason, the pachislot machine 1 according to the present embodiment, when it is detected that there is a possibility that an electrical go-to action has been performed, In order to set an unfavorable state for the player on the condition that it is detected that there is a possibility that a reckless act has been re-executed, the electric mechanism of the new trick is not caused to give the player an unnecessary discomfort. Measures can also be taken against nasty goto acts.

  In addition, the pachislot machine 1 according to the present embodiment can perform an electrical go-to action when a start command is received from the main control circuit 91 when the power interruption detection flag is in an OFF state at the time of power interruption recovery. For this reason, it can be determined that the sub CPU 102 has been stopped and restarted for some reason, so that it is possible to detect that the sub control circuit 101 has operated abnormally.

  In addition, the pachislot machine 1 according to the present embodiment may cause an electrical go-to action when the sub control circuit 101 receives a start command without receiving an initialization command from the main control circuit 91 even once. For some reason, it can be determined that the sub-control circuit 101 has never received the initialization command, so that it is possible to detect that the sub-control circuit 101 has operated abnormally.

  Also, in the pachislot machine 1 according to the present embodiment, when the reception order of commands related to the progress of the unit game is different from the prescribed order, the sub-control circuit 101 receives it due to the possibility of an electrical go-to action. Since it can be determined that there is a command that could not be performed, it is possible to detect that the sub-control circuit 101 has operated abnormally.

  In addition, the pachislot machine 1 according to the present embodiment is in a disadvantageous state for the player by not setting the number of grace games in a state where the merit is relatively small even for the player even if an electrical go-to action is performed. Therefore, it can be suppressed that all errors occurring in the pachislot machine 1 are determined to be goto acts.

  In the above-described extra lottery process, when the “RT4 transition A” and “RT4 transition B” are determined as internal winning combinations, the sub CPU 102 adds 1 to the number of additional selection determined games. explained.

  On the other hand, in the extra lottery process, the sub CPU 102 determines the number of ART games when “RT4 transition A” and “RT4 transition B” are determined as internal winning combinations as described below. You may make it add.

  FIG. 159 and FIG. 160 are flowcharts showing a variation of the extra lottery process during the extra game executed in step S584 of the first gaming state-specific lottery process shown in FIG.

  First, the sub CPU 102 determines whether or not it is time to transfer an extra game (S1070). Here, if it is determined that it is time to shift to an additional game (YES), the sub CPU 102 sets an additional game regulation value to the number of remaining games to be secured (S1071).

  If it is determined in step S1070 that it is not time to shift to an additional game (NO), or after executing the process of step S1071, the sub CPU 102 determines whether or not the number of remaining games to be guaranteed is 0 (S1072).

  Here, if it is determined that the number of remaining games is not 0 (NO), the sub CPU 102 turns on a security game flag (S1073) and subtracts 1 from the number of remaining games (S1074).

  If it is determined in step S1072 that the number of remaining games to be guaranteed is 0 (YES), or after executing the process of step S1074, the sub CPU 102 enters the additional counter A column in the additional counter lottery table shown in FIG. Based on this, an extra counter lottery for lottering the number of added games is performed (S1075), and the lottery result is set in the extra counter A (S1076).

  Next, the sub CPU 102 determines whether or not the counter B valid flag is ON (S1077). Here, when it is determined that the counter B valid flag is ON (YES), the sub CPU 102 draws the number of added games based on the column of the added counter B in the added counter lottery table shown in FIG. 161. The lottery is performed (S1078), and the lottery result is set in the additional counter B (S1079).

  Next, the sub CPU 102 determines whether or not the counter C valid flag is ON (S1080). If it is determined that the counter C valid flag is ON (YES), the sub CPU 102 draws the number of added games based on the column of the added counter C in the added counter lottery table shown in FIG. 161. The lottery is performed (S1081), and the lottery result is set in the extra counter C (S1082).

  If it is determined in step S1077 that the counter B valid flag is not ON (NO), if it is determined in step S1080 that the counter C valid flag is not ON (NO), or after executing the processing in step S1082, The CPU 102 adds the values of the counters A, B and C to the number of remaining ART games (S1083).

  Next, the sub CPU 102 determines whether the internal winning combination is “RT4 transition A” or “RT4 transition B” in the MB inoperative state (S1084). If it is determined that the internal winning combination is “RT4 transition A” or “RT4 transition B” when the MB is not operating (YES), the sub CPU 102 determines whether or not the counter C valid flag is ON. Is determined (S1085).

  Here, if it is determined that the counter C valid flag is ON (YES), the sub CPU 102 draws an additional game security game number to be added with the predetermined lottery probability. (S1086) and the lottery result is added to the number of remaining games to be secured (S1087).

  If it is determined in step S1085 that the counter C valid flag is not ON (NO), or after executing the processing in step S1087, the sub CPU 102 determines whether or not the counter B valid flag is OFF (S1088). ). If it is determined that the counter B valid flag is OFF (YES), the sub CPU 102 turns the counter B valid flag ON (S1089).

  On the other hand, when it is determined that the counter B valid flag is not OFF (NO), the sub CPU 102 determines whether or not the counter C valid flag is OFF (S1090). If it is determined that the counter C valid flag is OFF (YES), the sub CPU 102 turns the counter C valid flag ON (S1091).

  If it is determined in step S1084 that the internal winning combination is not “RT4 transition A” or “RT4 transition B” when the MB is not operating (NO), or if it is determined in step S1090 that the counter C valid flag is not OFF (NO) ) Or, after executing the process of step S1089 or S1091, the sub CPU 102 ends the lottery process during the extra game.

  In this way, the sub CPU 102 increases the number of lotteries per game with respect to the number of ART games each time the combination of symbols constituting “RT4 transition A” or “RT4 transition B” stops on the active line.

  The sub CPU 102 displays a liquid crystal display so that every time the reels 3L, 3C, 3R are stopped, a lottery result per game with respect to the number of ART games is notified from a lottery result with a smaller number of ART games. You may make it determine the content of the production performed by the apparatus 11. FIG.

<Additional counter lottery table>
161 is referred to by the sub CPU 102 in the variation of the extra lottery process during the extra game shown in FIGS. 159 and 160. In the extra counter lottery table, the counter A, the counter B, and the counter C are associated with lottery values of the number of games to be added.

  161, for example, the counter A wins 10 games with a probability of “31433/32768”, wins 20 games with a probability of “1000/32768”, “300/32768” Win 30 games with probability, win 30 games with probability of “30/32768”, and win 100 games with probability of “5/32768”.

  Further, in the present embodiment, the pachislot machine 1 has been described as not performing an ART lottery in a state where a penalty is imposed. You may make it provide. Further, the pachislot machine 1 may set the probability of winning the ART to be low in a state where a penalty is imposed.

  In the present embodiment, the pachislot machine 1 has been described as an example in which the number of games is applied as the number of ARTs that are advantageous to the player. However, instead of the number of games, the number of sets consisting of a predetermined number of games is used. The number of notifications (the number of times of navigation) for favorably winning a so-called winning combination with different winning modes depending on the order of pressing may be applied, the number of medals paid out may be applied, A net increase number obtained by subtracting the input number from the payout number may be applied.

  In this embodiment, the transition conditions for the RT gaming state include, in place of the transition conditions shown in FIG. 13, bonuses such as MB, winning of a bonus operating role, bonus termination, and RT gaming state. A specific symbol combination may be displayed as a symbol combination to be transferred, or a predetermined number of unit games may be executed.

  In the present embodiment, the example in which the gaming machine according to the present invention is applied to the pachislot machine 1 has been described. However, the present invention is not limited to this, and the gaming machine according to the present invention uses a pachinko ball as a gaming medium. The present invention can also be applied to other gaming machines such as gaming machines.

(Appendix)
Although conventional gaming machines make it difficult to perform electrical goto acts, there is a problem that it is impossible to take measures against goto acts that are performed one after another.

  On the other hand, gaming machines installed in gaming stores may cause errors in gaming machines due to external noise, etc., and if all errors occurring in gaming machines are judged to be goto acts, it is unnecessary for the players Will give you unpleasant discomfort.

  The present invention has been made in order to solve such a problem, and a game capable of taking measures against an electric goto action of a new trick without causing unnecessary discomfort to the player. The purpose is to provide a machine.

  In order to achieve the above object, the gaming machine according to the present invention has various control devices (for example, a liquid crystal display) based on a main control circuit (91) for executing processing relating to the progress of the game and a command transmitted from the game control means. Device 11, shutter device 200, LED group 25 and speakers 23 </ b> L and 23 </ b> R), and the effect control unit includes an abnormal operation (sub operation abnormal state) of the effect control unit. And a predetermined number of grace games (for example, 30 games) are set on the condition that the abnormal operation is detected by the operation abnormality detection means (sub CPU102) for detecting the abnormality. While the grace game number setting means (sub CPU 102) and the grace game number set by the grace game number setting means are consumed, the operation abnormality detection means Triggered by the detection of the abnormal motion by the above, an unfavorable state setting means for setting an unfavorable state (for example, no ART lottery is performed) for a specified number of games (for example, 8 games). A sub-CPU (102), a processor (sub-CPU 102), and a watchdog timer (108) that restarts the processor when the processor is stopped. The processor is powered off normally. Is detected, the power failure detection flag is turned on. When the watchdog timer is restarted, the power failure detection flag is maintained in the off state. Triggered by receiving a start command indicating the start of a unit game when the disconnection detection flag is off when power is restored It has a configuration of detecting that there is unusual operation of said presentation control means.

  With this configuration, the gaming machine according to the present invention sets a grace game number when an abnormal operation of the sub control circuit is detected, and the sub control circuit malfunctions while a unit game of this grace game number is executed. On the condition that another action is detected again, a disadvantageous state for the player is set.

  That is, when it is detected that there is a possibility that an electrical goto action has been performed, the gaming machine according to the present invention performs an electrical goto action while a unit game of the number of grace games is executed. In order to set an unfavorable state for the player on the condition that it was detected that it may have been performed again, it is possible to conduct a new trick of electric goto without giving the player unnecessary discomfort Countermeasures can also be taken.

  In addition, the gaming machine according to the present invention may cause an electric goto action when a start command is received from the main control circuit when the power interruption detection flag is in an off state at the time of power interruption recovery. Since it can be determined that the processor has been stopped and restarted, it is possible to detect that the sub-control circuit has operated abnormally.

  According to the present invention, it is possible to provide a gaming machine capable of taking countermeasures against an electric goto action of a new trick without giving a player an unnecessary discomfort.

1 Pachislot machine (game machine)
3L, 3C, 3R reel 4 display window (design display means)
11 Liquid crystal display device (production device, image display means)
14 MAX bet buttons (selection means)
16 Start lever 17L, 17C, 17R Stop button (selection means)
17S Stop switch (stop operation detection means)
23L, 23R Speaker (Director)
25 LED group (production equipment)
51L, 51C, 51R Stepping motor (design variation means)
91 Main control circuit 93 Main CPU (count means, count determination means, lock means, cycle control means, command transmission means, reel control means, lock execution means, internal winning combination determination means, reel stop control means, winning determination means)
101 Sub-control circuit 102 Sub CPU (processor, display control means, advantageous number determination means, image switching means, selection information storage means, selection information return means, advantageous game provision determination means, image control means, image switching means, movable state Return means, effect execution means, effect determination means, accessory control means, disadvantageous state setting means, irregular stop operation determination means, grace game number setting means, operation abnormality detection means, accessory action construction means)
104 sub-RAM (storage medium, accessory data storage means)
108 WDT (Watch Dog Timer)
200 Shutter device (production device, movable decoration part)

Claims (3)

A movable part movable to at least a first position and a second position;
A drive unit for driving the movable unit;
A control unit capable of controlling the operation mode of the movable unit by controlling the driving unit;
Detecting means capable of detecting that the movable portion is in the first position;
The controller is
Production determining means capable of determining production pattern information;
A drive sequence table composed of a plurality of steps including a pulse width and a pulse number for controlling the drive unit;
Determining means capable of determining the drive sequence table based on operation sequence data included in the effect pattern information determined by the effect determining means;
Based on the drive sequence table determined by the determining means, performs the operation control of the movable portion,
The drive sequence table includes a special step of moving the movable part from the second position to the first position;
In the special step, a value of the number of pulses larger than the number of pulses necessary for moving the movable part from the second position to the first position is set.
A gaming machine characterized in that the processing proceeds to a step next to the special step based on the fact that the detecting means detects that the movable portion is in the first position during the execution of the special step. The movable part is movable to a third position which is different from the first position and the second position;
The gaming machine according to claim 1, wherein the movable unit can be moved from the third position to the first position based on a drive sequence table for moving the movable unit from the second position to the first position. . The controller is
Storage means capable of storing operation sequence data representing the drive sequence table determined by the determination means;
A consistency table for ensuring the consistency of operation of the movable part,
The determination unit is configured to ensure the consistency of the operation of the movable unit based on the previous operation sequence data stored by the storage unit, the current operation sequence data, and the consistency table. The game machine according to claim 1, wherein the operation sequence data can be determined.

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