JP2017198729A - Display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a display device capable of reducing the generation of Moire.SOLUTION: The display device comprises: a detection electrode RL; a display pattern; a detection circuit connected to the detection electrode; a plurality of sub pixel regions SPR, SPG, SPB, SPW on which pixel electrodes are formed; pixel regions PixB, PixW composed of the plurality of sub pixel regions; and a display region on which the pixel regions are periodically arrayed. The pixel region includes as the plurality of sub pixel regions the first colour sub pixel region SPG and the second colour sub pixel region SPW, the sub pixel regions arrayed in a Y-direction on the display region. The detection electrode includes: a plurality of circular or polygonal first patterns PT in planar view, and in the display region, a first region RLP electrically connected to the detection circuit and a second region RLN separated from the detection circuit. The first region RLP extends in an X-direction. A virtual line ILP connecting the centres of the plurality of adjacent first patterns extends in the X-direction.SELECTED DRAWING: Figure 3

Description

  The present invention relates to a display device, and more particularly to a display device with a touch detection function capable of detecting the proximity or contact of an external object.

  In recent years, a touch detection device called a so-called touch panel, which can detect the proximity or contact (hereinafter also referred to as touch for convenience) of an external object, has attracted attention. The touch detection device is integrated with a liquid crystal display device and provided as a display device with a touch detection function. As a method for detecting a touch of an external object, a capacitance method is known. In a display device with a capacitive touch detection function, a detection electrode is disposed so as to intersect with a drive electrode. When the drive electrode and the detection electrode cross each other, a capacitance is formed at the intersection. When an external object such as a finger touches the intersection, the amount of charge accumulated in the capacitance at the intersection changes. To detect a touch of an external object.

  Patent Document 1 shows a touch panel including detection electrodes in which polygonal holes are spaced apart from each other and arranged in a matrix in a plan view.

Japanese Patent Laying-Open No. 2015-35122

  In a detection electrode in which polygonal holes are arranged in a matrix, a difference in transmittance occurs between a polygonal hole part and a part where no hole is arranged. On the other hand, when displaying an image in color, one pixel is composed of, for example, three sub-pixels corresponding to the three primary colors. Of the three primary colors, green has higher brightness than the other colors, and interference fringes (hereinafter also referred to as moire) occur when the subpixels corresponding to green are concentrated on the portion where the transmittance of the detection electrode is high. It is feared to do.

  Patent Document 1 does not disclose subpixels corresponding to the three primary colors, nor does it disclose the relationship between subpixels and detection electrodes.

  An object of the present invention is to provide a display device capable of reducing the occurrence of moire.

  A display device according to one embodiment of the present invention is a detection electrode which is provided on an insulating substrate and is electrically connected to a detection electrode and a conductive pattern formed using a conductive film, and detects proximity or contact of an object. A circuit, a plurality of subpixel regions in which pixel electrodes are formed, a pixel region constituted by a plurality of subpixel regions, and a display region in which the pixel regions are periodically arranged. Here, the pixel area includes a first sub-pixel area of the first color and a second sub-pixel area of the second color as the plurality of sub-pixel areas, and the plurality of first sub-pixel areas are A plurality of first patterns are formed on the detection electrode in a plan view, arranged in one direction, and the detection electrode includes a first region electrically connected to the detection circuit in the display region, and includes a conductive pattern. Includes a second region spaced apart from the detection electrode, the first region extends in a second direction intersecting the first direction, and an imaginary line connecting the centers of the plurality of adjacent first patterns is the second Extends in the direction.

1 is an exploded perspective view illustrating a configuration of a display device according to Embodiment 1. FIG. 3 is a cross-sectional view illustrating a cross section of the display device according to Embodiment 1. FIG. (A) And (B) is a top view of the display module concerning Embodiment 1. FIG. (A) And (B) is a top view which shows the structure of the detection electrode concerning Embodiment 1. FIG. (A) And (B) is a top view of the detection electrode concerning Embodiment 1. FIG. (A) And (B) is a top view of the display area concerning Embodiment 1. FIG. (A)-(C) are figures which show the evaluation result of the moire in a display apparatus. 3 is a plan view showing the arrangement of detection electrodes according to Embodiment 1. FIG. 6 is a plan view showing a configuration of a detection electrode according to Embodiment 2. FIG. 10 is a plan view showing a configuration of a detection electrode according to Modification 1 of Embodiment 2. FIG. 10 is a plan view showing a configuration of a detection electrode according to a second modification of the second embodiment. FIG. 10 is a plan view showing a configuration of a detection electrode according to Modification 3 of Embodiment 2. FIG. (A)-(C) are explanatory drawings explaining generation | occurrence | production of a moire.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. It should be noted that the disclosure is merely an example, and those skilled in the art can easily conceive of appropriate changes while maintaining the gist of the invention are naturally included in the scope of the present invention. In addition, the drawings may be schematically represented with respect to the width, thickness, shape, and the like of each part in comparison with actual aspects for the sake of clarity of explanation, but are merely examples, and the interpretation of the present invention is not limited. It is not limited.

  In addition, in the present specification and each drawing, elements similar to those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description may be omitted as appropriate.

(Embodiment 1)
<Configuration of display device>
FIG. 1 is an exploded perspective view showing a configuration of a liquid crystal display device (hereinafter referred to as a display device) according to the first embodiment. The display device 1 includes a display module 2 and a panel 3 having a display area 6 and a non-display area 7 provided so as to surround the display area 6. Although the display device includes a polarizing plate, the polarizing plate is omitted in each drawing.

  The display module 2 includes an insulating TFT (Thin Film Transistor) substrate (hereinafter also referred to as a first substrate or a first insulating substrate) TGB and an insulating CF (Color Filter) substrate (hereinafter referred to as a second substrate or a second substrate). CGB) (also referred to as an insulating substrate). In FIG. 1, TF1 indicates the first main surface of the first substrate TGB, and TF2 indicates the second main surface facing the first main surface TF1. CF1 indicates the first main surface of the second substrate CGB, and CF2 indicates the second main surface facing the first main surface CF1. In this specification, a state in which the first main surface TF1 of the first substrate TGB and the first main surface CF1 of the second substrate CGB are viewed from the panel 3 side will be described as a plan view. In FIG. 1, an arrow with a sign Y indicates a Y direction (first direction), and an arrow with a sign X indicates an X direction (second direction) intersecting the Y direction. .

  On the first main surface TF1 of the first substrate TGB, a plurality of scanning lines GL extending in the X direction and parallel to the Y direction, and extending in the Y direction and parallel to the X direction are arranged. A plurality of signal lines SL and a plurality of drive electrodes TL extending in the Y direction and arranged in parallel to the X direction are formed. When viewed in a plan view, the signal line SL and the drive electrode TL intersect the scan line GL, but the scan line GL, the signal line SL, and the drive electrode TL are electrically separated from each other. . A region where each of the signal lines SL and each of the scanning lines GL intersects is a sub-pixel region. In the first embodiment, when viewed in a plan view, one pixel region is constituted by three sub-pixel regions arranged adjacent to each other in the X direction.

  Each intersection region of the scanning line GL and the signal line SL becomes a sub-pixel region. Therefore, in the display module 2 area corresponding to the display area 6 of the panel 3, that is, in the display area of the display module 2, the above-described subpixel areas are arranged in a matrix. In addition, since the pixel area is configured by the three sub-pixel areas, the pixel areas are periodically arranged in the display area of the display module 2.

  In the second substrate CGB, the second main surface CF2 of the second substrate CGB faces the first main surface TF1 of the first substrate TGB via a liquid crystal layer and a color filter (not shown). A plurality of detection electrodes RL extending in the X direction and arranged in parallel in the Y direction are formed on the first main surface CF1 of the second substrate CGB. In FIG. 1, reference numeral 8 indicates a signal wiring connected to the detection electrode RL. The detection electrode RL is electrically connected to the detection circuit DET mounted on the flexible cable 5 via the signal wiring 8, the flexible cable 9 and the connector 10. In FIG. 1, symbol SHL indicates a shield wiring formed on the first main surface CF <b> 1 of the second substrate CGB. In order to reduce malfunction due to noise or the like, the shield wiring SHL is disposed so as to surround the detection electrode RL when viewed in a plan view.

  In the panel 3, a light shielding film BMC is formed on the back surface of the non-display area 7. The panel 3 is mounted on the second substrate CGB so that the back surface thereof faces the first main surface CF1 of the second substrate CGB.

  In FIG. 1, reference numeral 4 indicates a semiconductor device mounted on the first substrate TGB. The semiconductor device 4 is connected to the scanning line GL, the drive electrode TL, and the signal line SL. In the display, the semiconductor device 4 supplies an image signal to the signal line SL via the flexible cable 5 connected to the first substrate TGB. Then, the image signal supplied to the signal line SL is supplied to the pixel electrode GED via the thin film transistor Tr in FIG. At the time of display, the semiconductor device 4 sequentially selects the scanning line GL and supplies a display drive signal to the drive electrode TL. Thereby, the liquid crystal layer in the sub-pixel region at the intersection of the selected scanning line GL and the signal line SL is displaced according to the image signal supplied to the pixel electrode GED. In the second main surface CF2 of the second substrate CGB, a color filter is formed in a region corresponding to the sub-pixel region. The light transmitted through the displaced liquid crystal layer is transmitted to the display area 6 of the panel 3 through the second substrate CGB and the detection electrode RL, and is displayed as a color image.

  When detecting a touch, the semiconductor device 4 supplies a drive signal for detection to the selected drive electrode TL. An electric field corresponding to a change in the detection drive signal is generated between the detection electrode RL and the selected drive electrode TL, and depending on whether or not an external object is touching the vicinity of the selected drive electrode TL. The detected signal is generated at the detection electrode RL. The detection signal at the detection electrode RL is supplied to the detection circuit DET, and the touched position is extracted.

  FIG. 2 is a cross-sectional view schematically showing the A-A ′ cross section shown in FIG. 1. FIG. 2 shows a cross section in a state where the panel 3 is laminated on the display module 2 shown in FIG. 1 via a liquid crystal layer and a color filter.

  In FIG. 2, SPR, SPG, and SPB indicate subpixel regions, and the subpixel regions SPR, SPG, and SPB include a TFT thin film transistor Tr and a pixel electrode GED connected to the source electrode of the TFT thin film transistor Tr. Yes. The TFT thin film transistor Tr includes a polysilicon semiconductor layer 11 formed on the first main surface TF1 of the first substrate TGB, a gate insulating film 12, a gate electrode 13, a source electrode 14, and a drain electrode 15 formed on the polysilicon semiconductor layer 11. It has. The gate electrode 13 is connected to the scanning line GL, and the drain electrode 15 is connected to the signal line SL. A drive electrode TL is disposed above the TFT thin film transistor Tr via the insulating films 16 and 17, and a pixel electrode GED is disposed above the drive electrode TL via the insulating film 18. When the pixel electrode GED is selected by the scanning line GL, the pixel electrode GED is connected to the signal line SL via the TFT thin film transistor Tr and supplied with an image signal.

  The liquid crystal layer EEL and the color filter CFT are arranged in this order above the pixel electrode GED, the second substrate CGB is arranged above the color filter CFT, and the detection electrode RL is formed on the first main surface CF1 of the second substrate CGB. Has been. Furthermore, the panel 3 is mounted above the detection electrode RL.

  The color filter CFT has four types of filters in the first embodiment. That is, the color filter CFT includes a green (first color) filter CFG, a blue filter CFB, a red (third color) filter CFR, and a white (second color) filter CFW. In the sub-pixel region, a corresponding filter is disposed above the pixel electrode GED, and transmits a corresponding color in the light from the liquid crystal layer EEL. For example, the sub-pixel region SPG having the filter CFG transmits green in the light from the liquid crystal layer EEL. The same applies to the sub-pixel regions SPB, SPR and SPW having other filters CFB, CFR and CFW. Since each of the sub-pixel areas transmits a color corresponding to the color of the arranged filter, the sub-pixel area SPG can be regarded as a green (first color) sub-pixel area (first sub-pixel area). The subpixel region SPB can be regarded as a blue subpixel region. The subpixel region SPR can be regarded as a red (third color) subpixel region (third color subpixel region), and the subpixel region SPW is a white (second color) subpixel region (first color). 2 sub-pixel regions).

  In FIG. 2, the symbol BMI indicates a light shielding film (also referred to as a black matrix) provided between adjacent filters. Further, in FIG. 1, reference numerals 2-R and 2-L indicate long sides of the display module 2.

<Outline of sub-pixel area and detection electrode>
Next, the relationship between the sub-pixel region and the detection electrode will be described using the display region BB surrounded by a broken line in FIG. 1 as an example. FIG. 3 is a plan view of the display module according to the first embodiment, and is an enlarged plan view of the display area BB. FIG. 3A is a plan view of sub-pixel areas arranged in the display area BB, and FIG. 3B is a plan view of detection electrodes arranged in the display area BB.

  In FIG. 3A, a broken-line block filled with a right-down diagonal line indicates a red sub-pixel area SPR, and a broken-line block filled with a right-up diagonal line indicates a green sub-pixel area SPG. Similarly, a broken line block filled with a horizontal line indicates a blue subpixel region SPB, and a broken line block filled with a right-upward and right-down diagonal line indicates a white subpixel region SPW. In this specification, also in other drawings, when the subpixel region is shown, the subpixel region of each color is shown by the same display method. In order to avoid the complexity of the drawing, in FIG. 3A, only the first row of subpixel regions arranged along the X direction is provided with a reference.

  In the first embodiment, one pixel region is configured by three sub-pixel regions arranged adjacent to each other in the X direction. In FIG. 3A, a region surrounded by an alternate long and short dash line indicates a pixel region. This alternate long and short dash line can be regarded as indicating a light shielding film surrounding the three sub-pixel regions. In the first embodiment, two types of pixel areas are arranged in the display area BB by combining the sub-pixel areas. That is, the first pixel area PixB in which the subpixel areas are arranged in the order of SPR, SPG, and SPB along the X direction, and the subpixel areas are arranged in the order of SPR, SPG, and SPW along the X direction. The second pixel region PixW. In the first pixel region PixB, a blue subpixel region SPB is disposed next to the green subpixel region SPG. On the other hand, in the second pixel area PixW, a white subpixel area SPW is arranged next to the green subpixel area SPG instead of the blue subpixel area SPB. Thus, the brightness is improved by using the white sub-pixel region SPW instead of the blue sub-pixel region SPB.

  In both the first pixel region PixB and the second pixel region PixW, the sub-pixel regions SPR, SPG, SPB, and SPW are arranged along the X direction. That is, the subpixel region arrangement direction SPD is the X direction. In the following description, when there is no need to distinguish between the first pixel region and the second pixel region, PixB and PixW are also simply referred to as pixel regions.

  As shown in FIG. 3A, the first pixel region PixB and the second pixel region PixW are alternately arranged in each of the X direction and the Y direction. That is, the first pixel region PixB and the second pixel region PixW are alternately arranged along the X direction, and are also arranged alternately along the Y direction.

  Each of the scanning lines GL extends in the X direction and is connected to a plurality of subpixel regions arranged in the same row. In addition, each of the signal lines SL extends in the Y direction and is connected to a subpixel region arranged in the same column. In the first pixel region PixB and the second pixel region PixW arranged in the same column, the green (first color) subpixel region SPG is connected to the same signal line SL, and the red subpixel region SPR is also connected to each other. The blue (third color) sub-pixel region SPB and the white (second color) sub-pixel region SPW connected to the same signal line SL are also connected to the same signal line. Therefore, when viewed in a plan view, the plurality of green sub-pixel regions SPG are arranged in the Y direction intersecting the X direction in which the detection electrodes RL extend in the display region. Similarly, the plurality of red sub-pixel regions SPR are also arranged in the Y direction in the display region, and the blue sub-pixel region SPB (third color) and the white (second color) sub-pixel region SPW are also displayed in the display region. In the Y direction.

  When viewed in a plan view, the detection electrode RL includes a first region RLP, the conductive pattern CP (non-detection electrode) includes a second region RLN, and includes a plurality of first pixel regions PixB and second pixel regions PixW. It extends in the X direction so as to overlap. Next, the structure of the detection electrode RL will be described with reference to FIG. FIG. 3B shows two detection electrodes RL.

  A plurality of circular first patterns PT are formed in the first region RLP and the second region RLN when viewed in a plan view. In the first region RLP, a conductive film having a high light transmittance, such as an ITO (Indium Tin Oxide) film constituting the detection electrode, is arranged along the X direction. In this ITO film, a non-formation region where no ITO film (conductive film) is formed is formed as a circular first pattern PT. The first region RLP is electrically connected to the detection circuit DET shown in FIG. On the other hand, in the second region RLN, a plurality of ITO films constituting the detection electrodes are formed as a circular first pattern PT. In other words, it can be considered that the second region RLN has a plurality of formation regions corresponding to the plurality of first patterns PT, and an ITO film (conductive film) is formed in each of the formation regions. The second region RLN is separated from the detection electrode and is electrically separated from the detection circuit DET. In FIG. 3B, the formation region where the ITO film is formed is filled with dots, and the non-formation region is not attached with dots. Hereinafter, the conductive film is sometimes referred to as an ITO film. However, the material of the conductive film is not limited to ITO, but may be other metals or metal oxides.

  In FIG. 3B, symbol ILP indicates a virtual straight line (hereinafter also referred to as a virtual line) that connects the center points between the first patterns PT adjacent to each other in the plurality of first patterns PT formed in the first region RLP. Is shown. Similarly, the symbol ILN indicates a virtual line connecting the center points between the adjacent first patterns PT in the plurality of first patterns PT formed in the second region PLN. The virtual lines ILP and ILN extend in the X direction, and a plurality of first patterns PT are formed along the virtual lines ILP and ILN. BDL indicates the boundary between the first region RLP and the second region RLN, and extends in the X direction. The imaginary lines ILP and ILN are imaginary straight lines connecting the center points of the closest first pattern PT.

  As described above, the arrangement direction SPD of the sub-pixel region is the X direction, and the first pattern PT in each of the first region RLP and the second region RLN of the detection electrode is also an imaginary line ILP extending in the X direction, It is formed along the ILN. Therefore, the arrangement direction of the plurality of first patterns PT is also the X direction. That is, the arrangement direction SPD of the sub-pixel region is the same as the arrangement direction of the first pattern PT. When viewing from different pixel regions arranged in the Y direction, for example, the green (first color) sub-pixel regions SPG are arranged in the Y direction. Therefore, the arrangement direction of the sub-pixel regions of the same color (first color) (hereinafter also referred to as the same-color sub-pixel arrangement direction) SSD and the arrangement direction of the plurality of first patterns PT intersect. In the pixel areas arranged in the Y direction, the sub-pixel areas of the same color, for example, the green sub-pixel area SPG, are connected to the same signal line SL. Therefore, in the present embodiment, the same color subpixel array direction SSD can be regarded as the Y direction in which the signal line SL extends.

  In the first region RLP and the second region RLN of the detection electrode RL, for example, the light transmittance is different between the region where the first pattern PT is formed and the region where the first pattern PT is not formed. In the first embodiment, virtual lines ILP and ILN connecting the center points of the adjacent first patterns PT extend in a direction intersecting with the same color sub-pixel arrangement direction SSD (that is, the extending direction of the signal line SL). Therefore, it is possible to prevent the specific same color from being emphasized, and it is possible to reduce moire described later.

<Configuration of detection electrode>
Next, a specific configuration of the detection electrode RL will be described. FIG. 4 is a plan view showing the configuration of the detection electrode RL according to the first embodiment. 4A is a plan view of the detection electrode RL and the conductive pattern CP in a state of overlapping with the pixel regions PixB and PixW arranged in the display region. FIG. 4B is a plan view of the pixel from FIG. It is a top view of the state except area | regions PixB and PixW. The pixel area codes PixB and PixW are periodically arranged so as to form a matrix in the display area. In FIG. 4A, the symbol PPX indicates the pitch between the centers of adjacent pixel regions arranged in the X direction (hereinafter also referred to as X direction pixel pitch). Reference sign PPY indicates a pitch between the centers of adjacent pixel regions arranged in the Y direction (hereinafter also referred to as Y direction pixel pitch). In FIG. 4, reference symbol PTR indicates a first pattern that is superimposed on the red subpixel region SPR, the green subpixel region SPG, and the blue subpixel region SPB among the plurality of first patterns PT.

  In FIG. 4B, the symbol CTP indicates the center point of the circular first pattern PT when viewed in a plan view. Virtual regular triangles IRT as shown by broken lines are spread over the first region RLP and the second region RLN constituting the detection electrode RL, and the center point CTP of the first pattern PT overlaps each vertex of the virtual regular triangle IRT. As described above, the first pattern PT is arranged. The first pattern PT arranged in the first region RLP and the second region RLN will be described with reference to FIG.

  FIG. 5 is a plan view of the detection electrode according to the first embodiment. FIG. 5A is a plan view of the first region RLP, and FIG. 5B is a plan view of the second region RLN.

  In FIG. 5A, the sides PTD1 to PTD3 of the virtual equilateral triangle IRT have the same length. When viewed in a plan view, a plurality of sides PTD1 of the virtual equilateral triangle IRT extend in a direction intersecting with the same color subpixel array direction SSD, in other words, in a direction intersecting with the signal line SL (X direction). Virtual equilateral triangles IRT are arranged in the first region RLP.

  The first pattern PT is arranged such that the center point CTP of the first pattern PT overlaps each vertex of the virtual equilateral triangle IRT arranged in the first region RLP. As a result, the imaginary line ILP connecting the center points CTP of the adjacent first patterns PT extends in the X direction. In FIG. 5A, PTH indicates the radius of the first pattern PT, PTI indicates the distance between the first patterns PT, and PTL indicates the distance between the virtual lines ILP.

  Here, the distance PTI represents the distance between the outer peripheries of the first patterns PT, and the sides PTD1 to PTD3 represent the pitches between the adjacent first patterns PT. Hereinafter, the pitch between the adjacent first patterns PT is also referred to as an inter-pattern pitch PTD.

  In the first region RLP, the non-formation region where the conductive film (ITO film) is not formed is the first pattern PT. Therefore, no conductive film is formed inside the first pattern PT, and the first pattern PT A conductive film is formed on the outside. The first pattern PT is arranged such that the center point CTP overlaps the vertex of the virtual equilateral triangle IRT having one side PTD1 arranged so as to intersect the subpixel arrangement direction SSD. Therefore, a region PLL in which the first pattern PT is not arranged is formed between the rows of the first patterns PT adjacent in the Y direction, and a conductive film is formed in this region PLL.

  Although the first region RLP has been described as an example, similarly in the second region RLN, the first pattern PT is arranged so that the center point of the first pattern PT overlaps the vertex of the virtual equilateral triangle IRT. Yes. The difference from the first region RLP is that in the second region RLN, a conductive film (ITO film) is formed inside the first pattern PT, and no conductive film is formed outside the first pattern PT. is there.

  In order to prevent a difference in display characteristics between the first region RLP and the second region RLN, the area of the conductive film per unit area in the first region RLP and the conductivity per unit area in the second region RLN. The area of the film is the same. That is, in FIG. 5A, the area of the remaining region RLPS (dark dot region) obtained by subtracting the region where the virtual regular triangle IRT and the first pattern PT overlap from the virtual regular triangle IRT, and FIG. ), The total area RLNS (the dark dot region) of the region where the virtual equilateral triangle IRT and the first pattern PT overlap is the same.

<Reduction of moire generation>
When the same color sub-pixel arrangement direction SSD described in FIG. 3 and the arrangement direction of the first pattern PT formed on the detection electrode coincide with each other, moire occurs. On the other hand, in the first embodiment, the occurrence of moire can be reduced by intersecting the same color sub-pixel arrangement direction SSD with the arrangement direction of the first pattern PT.

  FIG. 13 is an explanatory diagram for explaining the occurrence of moire. FIG. 13A is a plan view of the second region RLN in the detection electrode RL when viewed in a plan view. The arrangement of the sub-pixel regions SPR, SPG, SPB (SPW) is arranged along the X direction. The same color sub-pixel arrangement direction SSD like the green sub-pixel region SPG is the Y direction as in FIG. On the other hand, the first pattern PT is arranged so that the center point overlaps the vertex of the virtual equilateral triangle IRT indicated by the broken line in FIG. In FIG. 13A, unlike FIG. 4 and FIG. 5, the side PTD1 of the virtual equilateral triangle IRT is not arranged in the direction crossing the sub-pixel arrangement direction SSD, but in the direction parallel to the signal line SL (Y direction). Is arranged. As a result, the same color sub-pixel arrangement direction SSD, that is, the extending direction of the signal line SL, and the arrangement direction of the first pattern PT coincide. In FIG. 13A as well, ILN indicates an imaginary line ILN connecting the center points of a plurality of adjacent first patterns PT.

  As shown in FIG. 13, the arrangement of the first pattern PT in which the extending direction of the signal line SL and the extending direction of the virtual line ILN connecting the center point of the first pattern PT are parallel to each other is hereinafter referred to as signal line parallel. Also called a pattern. On the other hand, as described in FIG. 5, the extending direction of the signal line SL and the extending direction of the imaginary lines ILP and ILN connecting the center point of the first pattern PT intersect. Hereinafter, this arrangement is also referred to as a signal line intersection pattern.

  As shown in FIG. 13A, when adjacent first patterns are arranged along an imaginary line ILN extending in the Y direction, a region where the first pattern PT is not arranged extends in the Y direction. Will exist. FIG. 13B is a diagram schematically illustrating a region where the first pattern PT is disposed and a region where the first pattern PT is not disposed. In FIG. 13B, the area where the first pattern PT is arranged is indicated by ITY, and the area where the first pattern PT is not arranged is indicated by ITN. Since FIG. 13A shows the second region RLN, in FIG. 13B, the region ITY shows the region where the ITO film is formed on the second substrate CGB, and the region ITN is This indicates a region where the ITO film is not formed.

  The region ITN where the ITO film is not formed has a higher transmittance than the region ITY where the ITO film is formed. Therefore, when viewed in a plan view, the color in the subpixel region that overlaps the region ITN in which the ITO film is not formed in the subpixel region arranged in the display region is the color in the subpixel region that overlaps the region ITY. Rather than being highlighted. Since the arrangement direction of the sub-pixel areas of the same color and the arrangement direction of the first pattern are the same, the same color is visually recognized from the area ITN. FIG. 13A shows a state where the arrangement of the green sub-pixel areas SPG overlaps the area ITN. Therefore, as shown in FIG. 13C, green G is visually recognized from each of the continuously existing areas ITN, and moire occurs.

  In FIG. 13, the region ITN is arranged so as to overlap the sub-pixel region SPG. However, if the area ITN overlaps with the sub-pixel areas SPB and SPR, blue and red moire occurs. Note that when the colors from the sub-pixel regions SPR, SPG, SPB, and SPW are viewed, the brightness or brightness of green is higher than the brightness or brightness of red and blue. Therefore, green moire is more likely to occur than red or blue moire. Furthermore, the white subpixel region SPW substantially improves the luminance of the adjacent subpixel region. Therefore, other subpixel areas (red, blue, green) adjacent to the white subpixel area SPW overlap with the area ITN, so that moiré is more noticeably generated. In FIG. 13, the second region RLN has been described as an example, but moiré is similarly generated in the first region RLP, and tatami pattern moire is generated. As described above, the moiré countermeasure disclosed in this specification needs to be taken for an area where moiré is likely to occur.

  FIG. 6 is a plan view of the display area when the first pattern PT is arranged so that the center point of the first pattern PT overlaps the virtual line ILN extending in the X direction as described in FIG. It is. That is, FIG. 6 shows a case where the first patterns PT are arranged in a signal line intersection pattern. 6A also shows the second region RLN of the detection electrode RL in which a plurality of first patterns PT are arranged. The same color subpixel array direction SSD is the Y direction as in FIG. The virtual equilateral triangle IRT is arranged so that one side PTD1 thereof intersects the signal line SL, and the first pattern PT is arranged so that the center point of the first pattern PT overlaps the apex of the virtual equilateral triangle IRT. Yes. Thereby, the virtual line ILN connecting the center points of the adjacent first patterns PT extends in the X direction. As a result, the same color sub-pixel arrangement direction SSD intersects the arrangement direction of the adjacent first patterns PT.

  As a result, as described with reference to FIG. 13, it is possible to prevent occurrence of a region where the first pattern PT is arranged and a region where the first pattern PT is not arranged along the X direction. That is, it is possible to prevent the region where the first pattern PT is not arranged from extending in the Y direction. As a result, it is possible to prevent the sub-pixel area of the same color and the area where the first pattern PT is not arranged from overlapping, and to reduce the occurrence of moire.

  Since the first pattern PT is arranged along the virtual line ILN extending in the X direction, as shown in FIG. 6B, the region ITY in which the first pattern PT is arranged along the Y direction. As a result, a non-arranged area ITN occurs. That is, a region where the first pattern PT is not arranged extends in the X direction. In this case, for example, the region ITY where the transmittance is high overlaps the sub-pixel regions SPR, SPG, SPB, and SPW. Therefore, the color visually recognized through the area ITY is a combination of the colors of these sub-pixel areas. As a result, even if the areas ITY and ITN are generated along the Y direction, it is possible to reduce the occurrence of moire by dispersing the sub-pixel areas of the same color. Note that the region ITY illustrated in FIG. 6B corresponds to the region PLL illustrated in FIG.

  In FIG. 6, it has been explained that the generation of moire can be reduced by taking the second region RLN as an example, but the occurrence of moire can be similarly reduced in the first region RLP. .

  In the first embodiment, the X-direction pixel pitch PPX and the Y-direction pixel pitch PPY are the same length. Therefore, here, both the X direction pixel pitch PPX and the Y direction pixel pitch PPY are collectively referred to as a pixel pitch PPD. By optimizing the pixel pitch PPD and the above-described pattern pitch PTD, for example, the region ITN shown in FIG. 6B can be reduced, and the generation of moire can be further reduced.

<Pixel pitch PPD and pattern pitch PTD>
The inventor evaluated the occurrence of moire while changing the pixel pitch PPD and the inter-pattern pitch PTD for each of the signal line parallel pattern and the signal line intersecting pattern. FIG. 7 is a diagram showing the results of evaluation. FIG. 7A shows the case of the signal line intersection pattern, and FIG. 7B shows the case of the signal line parallel pattern. In the evaluation, the pixel pitch PPD was changed to 42.83 μm, 49.28 μm, 63.00 μm, 65.70 μm, 74.05 μm, 74, 85 μm, 75.00, and the pattern was changed at each pixel pitch PPD. The pitch PTD is 50.5 μm and 54.5 μm. While changing to 58.0 μm, 62.0 μm, 66.0 μm, and 77.0 μm, the occurrence of moire was evaluated. The evaluation results are shown as evaluation values at the intersections between the pixel pitch PPD and the inter-pattern pitch PTD in each of FIGS. Here, it is shown that the generation of moire is reduced as the evaluation value is smaller.

  As shown in FIG. 7B, in the signal line parallel pattern, in Experimental Examples 10 and 11, when the inter-pattern pitch is 58.0 μm, the evaluation value is “1”. On the other hand, in the signal line intersection pattern, there is a state in which the evaluation value is “1” in each of Experimental Examples 3 to 7. That is, the generation of moire is reduced in the signal line intersection pattern than in the signal line parallel pattern. Even when the comparison is performed under the same pitch condition, the generation of moire is reduced in the signal line intersection pattern as a whole than in the signal line parallel pattern.

  FIG. 7C shows a pitch ratio (= PTD / PPD) between the inter-pattern pitch PTD and the pixel pitch PPD in each of Experimental Examples 1 to 7 shown in FIG. For example, in Experimental Example 1, the pitch ratio (77.0 / 42.83≈1.80) is described in the column where the inter-pattern pitch PTD is 77.0 μm. In FIG. 7A, when the pitch ratio when the evaluation value is “1” (FIG. 7C) is seen, the moiré is generated when the pitch ratio is more than 0.8 and less than 0.95. It turns out that it is suitable for reducing. In other words, in order to reduce the occurrence of moire, it is desirable that the inter-pattern pitch PTD is more than 0.8 times and less than 0.95 times the pixel pitch PPD.

<Detection electrode arrangement>
FIG. 8 is a plan view showing the arrangement of the detection electrodes RL. FIG. 8 is a plan view of a region indicated by broken lines CCU and CCD in FIG.

  In FIG. 8 as well, the circles indicate the first patterns constituting the detection electrodes RL. In FIG. 8, the sign PT is provided for only one first pattern in order to avoid complicating the drawing. It is attached. As described above, the detection electrode RL includes a conductive film such as an ITO film, includes the first region RLP in which a plurality of first patterns PT are arranged, and the conductive pattern CP includes a ITO film. A second region RLN in which a plurality of first patterns are arranged is provided. Here, the first region RLP may be regarded as an electrode in which a plurality of openings having the shape of the first pattern PT are provided in the electrode of the conductive film (ITO film) formed on the first main surface CF1. it can.

  As shown in FIG. 1, when the panel 3 is mounted on the display module 2, the peripheral region of the second substrate CGB is formed by the light shielding film BMC formed on the back surface of the non-display region 7 when viewed in a plan view. Will be covered. In other words, the light shielding film is superimposed on the peripheral region. In FIG. 8, the boundary line between the region covered with the light shielding film BMC and the region not covered with the light shielding film BMC is indicated by a one-dot chain line BMCL. A region inside the alternate long and short dash line BMCL is a display region, and an outer region surrounding the display region is a non-display region (peripheral region).

  In the first embodiment, the first region RLP constituting the detection electrode RL includes a first detection region (first region) disposed in the display region and a first region disposed in the peripheral region when viewed in a plan view. 2 detection regions (third regions) and third detection regions (fifth regions). In FIG. 8, a region RR1 filled with a thin todd indicates a first detection region, and regions RR3R and RR3L filled with dark dots indicate a third detection region, and a region RR2R filled with a slanting left slanting line. , RR2L indicate the second detection area.

  As shown in FIG. 1, the display module 2 includes two long sides 2-R and 2-L that face each other. The detection electrode RL is disposed between the long sides 2-R and 2-L along the X direction. The second detection region RR2R is disposed in the vicinity of the long side 2-R, and the second detection region RR2L is disposed in the vicinity of the long side 2-L. The third detection region RR3R is disposed between the first detection region RR1 and the second detection region RR2R, and the third detection region RR3L is disposed between the first detection region RR1 and the second detection region RR2L. Has been. In other words, the second detection region (third region) RR2R, RR2L and the third detection region (fifth region) RR3R, RR3L are outside the first detection region (first region) RR1, The third detection regions (fifth regions) RR3R and RR3L are disposed between the first detection region (first region) RR1 and the second detection regions (third region) RR2R and RR2L. .

  The first detection region RR1, the second detection region RR2R, RR2L and the third detection region RR3R, RR3L are not particularly limited, but are integrally formed of the same conductive film (ITO film), and the first detection region RR1 and A plurality of first patterns PT are arranged in each of the third detection regions RR3R and RR3L so as to be a signal line intersection pattern.

  On the other hand, the first pattern PT is not formed in the second detection regions RR2R and RR2L. The second detection region RR2R is connected to the detection circuit DET described in FIG. 1, and the second detection region RR2L has a width BB2 wider than the width BB1 of the first detection region RR1. When viewed in a plan view, the first detection region RR1, the second detection region RR2L, and the third detection region RR3L have a T-shape. For example, when measuring the electric resistance of the detection electrode RL, a test terminal for measurement is brought into contact with the second detection region RR2L. Since the width BB2 is wider than the width BB1, the test terminals can be easily contacted. If it is not necessary to measure the electrical resistance of the detection electrode RL, for example, the second detection region RR2L may be the same as the third detection region RR3L.

  The second region RLN, which is the conductive pattern CP adjacent to the detection electrode RL, includes a first non-detection region (second region) RN1 disposed in the display region and a second non-detection region (fourth region) disposed in the peripheral region. Region) RN2. In other words, the second non-detection region (fourth region) RN2 is arranged outside the first non-detection region (second region) RN1. In the second region RLN, a plurality of first patterns PT formed of a conductive film (ITO film) are arranged on the first main surface CF1 of the second substrate CGB. In FIG. 8, the first pattern PT arranged in the first non-detection region RN1 is clearly shown by being filled with dark dots. In addition, the first pattern PT arranged in the second non-detection region RN2 is clearly shown by being filled with a slanting line that descends to the right.

  Although not particularly limited in the first embodiment, when viewed in a plan view, as shown in FIG. 8, the second non-detection region RN2 is located between the second detection regions RR2L in the peripheral region of the detection electrode RL. And a plurality of first patterns PT are arranged.

  In FIG. 8, SHL indicates a shield wiring, and a conductive film (ITO film) is formed on the shield wiring SHL, and a plurality of first patterns PT are signal line crossing patterns on the conductive film. So that it is arranged. That is, an opening having the shape of the first pattern PT is also formed in the shield wiring SHL in a signal line intersection pattern. The second detection region RN2 exists also between the detection electrode RL and the adjacent shield wiring SHL, and a plurality of first patterns PT are arranged.

  For example, when the panel 3 shown in FIG. 1 is mounted, the mounting position is shifted, and the boundary line BMCL between the region covered with the light shielding film BMC and the region not covered with the boundary line BMCE shown in FIG. If the third detection areas RR3R, RR3L and the second non-detection area RN2 do not exist in the peripheral area arranged so as to surround the display area, the inner edge of the non-display area 7 of the panel 3 It is conceivable that there will be a difference in reflection appearance. On the other hand, as shown in FIG. 8, by providing the third detection regions RR3R, RR3L and the second non-detection region RN2 in which the first pattern PT is arranged, even if the position for mounting the panel 3 is shifted, Since the first pattern PT exists, it is possible to reduce the difference in the appearance of reflection.

  Furthermore, since the second non-detection region RN2 in which the first pattern PT is arranged is also disposed between the adjacent second detection regions RR2L and between the second detection region RR2L and the shield wiring SHL, the second non-detection region Region RN2 can function to shield the electric field from the periphery of panel 3.

  When the first pattern PT is arranged in the first region RLP or / and the second region RLN in the signal line parallel pattern described above, for example, the size of the first pattern PT may change due to manufacturing variations. is there. In this case, moire occurs remarkably. Specifically, the second region RLN will be described as an example. A plurality of sub-pixel regions (SPG) of a single color (for example, green) when viewed in a plan view according to a change in the size of the first pattern PT. ) And the first pattern PT change, only the transmittance of light of a specific color changes significantly. As a result, a single color moire may occur remarkably. On the other hand, as described in the first embodiment, when the first pattern PT is arranged in the signal line intersection pattern, the sub-pixel regions of different colors (for example, red, blue, green) The amount of overlap with the first pattern PT changes. As a result, it is possible to prevent only a specific single color from changing significantly. As a result, it is possible to reduce moiré caused by manufacturing variations.

  Further, in the first region RLP and the second region RLN, the first pattern PT is in a positive and negative relationship. That is, in the first region RLP, the first pattern PT is a non-formation region where no conductive film is formed, and in the second region RLN, the first pattern PT is a formation region where a conductive film is formed. For example, when the size of the non-formation region changes due to manufacturing variations, the size of the formation region changes in the opposite direction. For example, when the size of the non-formation region increases due to manufacturing variations, the size of the formation region decreases.

  In the first region RLP and the second region RLN, if the first pattern is arranged in the signal line parallel pattern, it is assumed that manufacturing variation occurs. In this case, moire may be prominent in each of the first region RLP and the second region RLN. On the other hand, if the signal line intersection pattern is used, it is possible to reduce moire for the above-described reason in each of the first region RLP and the second region RLN.

  In the first embodiment, two types of pixel regions (first pixel region PixB and second pixel region PixW) are arranged to form a display region. That is, the display area includes not only the first pixel area PixB having the subpixel areas SPR, SPG, and SPB corresponding to the three primary colors but also the second pixel area PixW having the white subpixel area SPW. Has been. When the white sub-pixel region SPW is turned on (light from the backlight is transmitted), the luminance of the pixels around the white sub-pixel region SPW increases. Therefore, when the first pattern PT is arranged in the signal line parallel pattern, moire is likely to occur in the green sub-pixel region SPG and the red sub-pixel region SPR extending in the Y direction in FIG. On the other hand, in the first embodiment, since the first pattern PT is arranged in the signal line intersection pattern, it is possible to prevent the adjacent color from being emphasized by the white subpixel region SPW. In addition, when the white sub-pixel region SPW is provided as in the first embodiment, the luminance of the backlight can be reduced and image display can be performed, so that power consumption can be reduced. As a result, in the display device according to Embodiment 1 using the white sub-pixel region SPW, it is possible to reduce the occurrence of moire while reducing power consumption.

  In the first embodiment, in the second pixel region PixW, the green subpixel region SPG and the white subpixel region SPW are adjacent to each other. Green has a higher brightness value than red and blue. Green with high brightness is easily visible as moire. The white subpixel area SPW and the green subpixel area SPG are adjacent to each other, so that the white subpixel area SPW and the green subpixel area SPG are more easily recognized as moire. However, according to the first embodiment, the enhancement of green or / and white is reduced. Therefore, the occurrence of moire can be reduced.

  As understood from the term, the virtual equilateral triangle IRT used in the present specification indicates a virtual equilateral triangle for defining the arrangement of the first pattern PT. The virtual lines ILP and ILN are also represented by the first triangle. A virtual line that virtually connects one pattern PT is shown.

  In FIG. 4, it has been described that the first pattern PT is arranged so that the center point CTP of the first pattern PT matches the vertex of the virtual equilateral triangle IRT. However, the IRT is not limited to the virtual equilateral triangle. Instead, a triangle such as a virtual isosceles triangle arranged in a direction intersecting the sub-pixel arrangement direction SSD (signal line SL) may be used. In the case of a virtual isosceles triangle, the base opposite to the apex angle is arranged so as to intersect with the sub-pixel arrangement direction SSD. Further, the IRT may not be a virtual triangle, but may be a virtual polygon having an odd number of sides arranged so that one side thereof intersects the sub-pixel arrangement direction SSD.

  In the first embodiment, the first pattern PT is described as an example of a circular pattern in plan view. However, the first pattern PT may be a polygonal pattern in plan view.

  In the first embodiment, one side PTD1 of the virtual equilateral triangle IRT and the virtual lines ILP and ILN are preferably orthogonal to the extending direction of the signal line SL (same color subpixel array direction SSD), but intersect with an inclination. May be. Therefore, in the specification, the term “intersection” is used including “orthogonal”.

(Embodiment 2)
In the first embodiment, the first pattern PT arranged in the first region RLP and the first pattern PT arranged in the second region RLN have a circular shape when viewed in a plan view. Therefore, the reflection is the same regardless of the direction of incidence. That is, directivity can be eliminated. Further, the area of the conductive film (ITO film) per unit area in each of the first region RLP and the second region RLN is set to be the same. Thereby, it is possible to reduce the occurrence of a difference in the appearance of reflection in the first region RLP and the second region RLN.

  However, in the region BDR at the boundary between the first region RLP and the second region RLN (hereinafter also referred to as the boundary region), there is a difference in the area of the conductive film per unit area. In addition, in the boundary region BDR, directivity occurs when a large straight line region exists.

  FIG. 9 is a plan view showing a plane of the detection electrode according to the second embodiment. In FIG. 9, only the detection electrode RL formed on the second substrate CGB is shown, and the signal line SL, the pixel region, and the like are omitted. Also in the second embodiment, as in FIGS. 4 to 6, the first region RLP constituting the detection electrode RL and the second region RLN as the conductive pattern CP have signal line intersection patterns. In addition, a plurality of first patterns PT are arranged.

  That is, in the first region RLP, a plurality of non-formation regions having a planar shape of the first pattern PT are provided in the conductive film indicated by dots. The non-formation region is arranged so that a virtual line connecting the center points of the adjacent first patterns PT intersects the sub-pixel arrangement direction SSD. On the other hand, the second region RLN is provided with a plurality of formation regions having a planar shape of the first pattern. The formation region is arranged so that a virtual line connecting the center points of the adjacent first patterns PT intersects the sub-pixel arrangement direction SSD.

  In the second embodiment, when viewed in plan view, a plurality of second patterns PT2 are arranged in the second region RLN in the boundary region BDR between the first region RLP and the second region RLN. . The second pattern PT2 is similar to the first pattern PT and has a circular shape when viewed in plan, but the area of the second pattern PT2 is smaller than the area of the first pattern PT. In the example shown in FIG. 9, since the second pattern PT2 is a conductive film formation region, a small-area conductive film is formed in the boundary region BDR in the second region RLN.

  By adjusting the area of the second pattern PT2, in the boundary region BDR between the first region RLP and the second region RLN, the area of the conductive film per unit area in the first region RLP and the unit in the second region RLN The difference from the area of the conductive film per area is reduced. This makes it possible to reduce the difference in the appearance of reflection. In addition, since the second pattern PT2 is circular, it is possible to reduce the difference in the appearance of reflection without considering directivity.

  In the example shown in FIG. 9, in the boundary region BDR between the first region RLP and the second region RLN, the shape of the first region RLP is curved so as to match the shape of the second pattern PT2. . As a result, it is possible to prevent a large straight line region from being generated in the boundary region BDR, and to reduce the directivity of the first region RLP in the boundary region BDR. As a result, the difference in the appearance of reflection can be further reduced.

  Although not particularly limited, the second pattern PT2 is arranged so that a virtual line connecting the center points of the second pattern PT2 intersects the subpixel arrangement direction SSD.

<Modification 1>
FIG. 10 is a plan view showing a plane of the detection electrode according to the first modification of the second embodiment. Since FIG. 10 is similar to FIG. 9, the differences will mainly be described here. In FIG. 10, PT3 indicates the third pattern. Similar to the first pattern PT described above, the third pattern PT3 has a circular outer shape when viewed in plan view.

  The third pattern PT3 includes a region PT3N that is disposed in the first region RLP, protrudes from the first region RLP to the second region RLN, and a region PT3P that is disposed in the first region RLP. Here, the region PT3N is a formation region where a conductive film is formed, and the region PT3P is a non-formation region where a conductive film to be an electrode is not formed. That is, in the third pattern PT3, a conductive film is formed in the region PT3N, and no conductive film is formed in the region PT3P. Therefore, the third pattern PT3 is a pattern having a circular outer shape as in the first pattern PT, but having a shape different from that of the first pattern PT.

  For example, by changing the area of the region PT3N protruding to the second region RLN, the area of the conductive film per unit area in the boundary region BDR of the first region RLP and the unit area in the boundary region BDR of the second region RLN The area and difference of the conductive film can be reduced. Further, the outer shape of the region PT3N protruding to the second region RLN is a curved shape, and the portion of the region PT3P that is in contact with the conductive film in the first region RLP is also a curved shape. Thereby, directivity can be reduced. As a result, the difference in the appearance of reflection can be reduced.

<Modification 2>
FIG. 11 is a plan view illustrating a plane of the detection electrode according to the second modification of the second embodiment. Since FIG. 11 is similar to FIG. 10, differences will be mainly described. Also in the second modification shown in FIG. 11, the third pattern PT3 includes a region PT3N protruding into the second region RLN and a region PT3P disposed in the first region RLP. In the second modified example, the region PT3N and the first conductive layer are more securely connected to the conductive region forming the first region RLP and the conductive layer forming the region PT3N protruding to the second region RLN. The width BB3 of the connection region that connects the conductive film in the region RLP is increased.

  If the region PT3N and the conductive film in the first region RLP are separated due to manufacturing variations, there is a concern that the performance of the detection electrode RL may be deteriorated. In the second modification, by increasing the width BB3 of the connection region, it is possible to prevent the region PT3N from being separated from the conductive film of the first region RLP due to variations, thereby stabilizing the performance. It becomes possible.

<Modification 3>
FIG. 12 is a plan view illustrating a plane of the detection electrode according to the third modification of the second embodiment. In Modification 3, when the conductive film of the first region RLP is formed on the second substrate CGB, the boundary region BDR is formed so as to have a waveform shape when seen in a plan view.

  For example, by changing the amount of the waveform portion entering the second region RLN, the area of the conductive film per unit area in the boundary region BDR of the first region RLP and the conductivity per unit area in the boundary region BDR of the second region RLN. The difference from the film area can be reduced. In addition, since the boundary region BDR has a waveform shape, it is possible to reduce the occurrence of a large linear region, and to reduce directivity. As a result, the difference in the appearance of reflection can be reduced.

  Although not particularly limited, in Embodiments 1 and 2, the ratio between the area in the first pattern PT arranged in the first region RLP and the area in the first pattern PT arranged in the second region RLN Is in the range of 3: 2 to 2: 3. The radius of the first pattern PT is in the range of 5 μm to 250 μm.

  In the scope of the idea of the present invention, those skilled in the art can conceive of various modifications and modifications, and it is understood that these modifications and modifications belong to the scope of the present invention.

  For example, those in which the person skilled in the art appropriately added, deleted, or changed the design of the above-described embodiments, or those in which the process was added, omitted, or changed the conditions are also included in the present invention. As long as the gist is provided, it is included in the scope of the present invention.

  For example, in the embodiment, the case where the signal line SL extends in the Y direction and the detection electrode RL extends in the X direction has been described. However, the X direction and the Y direction change depending on the viewing viewpoint. The case where the signal line SL extends in the X direction and the detection electrode RL extends in the Y direction by changing the viewing viewpoint is also included in the scope of the present invention. In addition, “parallel” used in the present specification means extending without crossing from one end to the other end. Therefore, even if a part or all of one line is provided in a state inclined with respect to the other line, unless these lines intersect from one end to the other, The state is also assumed to be “parallel”. In the embodiments, the liquid crystal display device has been described as an example. However, the present invention is not limited to this, and can be applied to an OLED display device.

  In the embodiment, the example in which the drive signal for detection is supplied to the drive electrode TL and the change of the charge amount is detected by the detection electrode RL to detect the touch has been described, but the present invention is not limited to this. . For example, the touch may be detected by a so-called self-capacitance method. In this case, a detection drive signal is supplied to the detection electrode RL, and after a predetermined time has elapsed, a change in the amount of charge in the detection electrode RL is detected to detect a touch. In this case, in order to specify the coordinates of the touched position, the detection electrode RL extending in the X direction and the detection electrode RL extending in the Y direction are provided.

DESCRIPTION OF SYMBOLS 1 Display apparatus 2 Display module 2-R, 2-L Long side 3 Panel 4 Semiconductor device 5, 9 Flexible cable 6, BB Display area 7 Non-display area 8 Signal wiring 10 Connector 11 Polysilicon semiconductor layer 12 Gate insulating film 13 Gate Electrode 14 Source electrode 15 Drain electrodes 16 and 18 Insulating films BB1 to BB3 Width BDR Boundary region BMC Black matrix BMCE, BMCL Boundary line CF1, TF1 First main surface CF2, TF2 Second main surface CFB, CFG, CFR, CFW Filter CFT Color filter CGB Second substrate CP Conductive pattern CTP Center point DET Detection circuit EEL Liquid crystal layer GED Pixel electrode GL Scanning line ILN, ILP Virtual line IRT Virtual equilateral triangle ITN, ITY, PLL, PT3N, PT3P, RLL, RLPS area PixB, PixW Pixel area P N Second region PPD Pixel pitch PPX X-direction pixel pitch PPY Y-direction pixel pitch PT First pattern PT2 Second pattern PT3 Third pattern PTD Pattern pitch PTD1 to PTD3 Side PTI Distance RL Detection electrode RLN Second region RLNS Total area RLP First region RN1, RR1 First detection region RN2, RR2L, RR2R Second detection region RR3L, RR3R Third detection region SHL Shield wiring SPB, SPG, SPR, SPW Subpixel region SPD Subpixel region arrangement direction SSD Same color subpixel Alignment direction TGB First version TL Drive electrode Tr TFT thin film transistor

Claims (10)

A detection electrode and a conductive pattern formed on the insulating substrate using a conductive film;
A detection circuit that is electrically connected to the detection electrode and detects proximity or contact of an object;
A plurality of subpixel regions in which pixel electrodes are formed;
A pixel region constituted by the plurality of sub-pixel regions;
A display region in which the pixel regions are periodically arranged;
With
The pixel area includes a first subpixel area of a first color and a second subpixel area of a second color as the plurality of subpixel areas,
The plurality of first subpixel regions are arranged in a first direction in the display region,
A plurality of first patterns are formed on the detection electrode in plan view,
The detection electrode includes a first region electrically connected to the detection circuit in the display region,
The conductive pattern includes a second region spaced from the detection electrode,
The first region extends in a second direction intersecting the first direction;
The virtual line connecting between the centers of the plurality of adjacent first patterns extends in the second direction. The display device according to claim 1,
The display device, wherein a boundary region between the first region and the second region extends in the second direction. The display device according to claim 1 or 2,
In the first region, a region where the conductive film is not formed is the first pattern, and in the second region, a region where the conductive film is formed is the first pattern. The display device according to any one of claims 1 to 3,
The second region has a second pattern which is a region where the conductive film is formed in a boundary region between the first region and the second region,
The display device, wherein the second pattern is similar to the first pattern and has a smaller area than the first pattern. The display device according to any one of claims 1 to 3,
The first region has a third pattern which is a formation region of the conductive film in a boundary region between the first region and the second region, and the third pattern is the first pattern in the first region. A display device having a different shape. In the display device according to any one of claims 1 to 5,
The display device includes a peripheral region that is disposed outside the first region and the second region when viewed in a plan view, and on which a light shielding film is superimposed.
The detection electrode includes a third region located outside the first region and a fourth region located outside the second region in the peripheral region, wherein the third region is the first pattern. The display device is electrically connected to the detection circuit without being present, and the fourth region is electrically separated from the detection circuit in which the first pattern is present. The display device according to claim 6,
The detection electrode includes a fifth region where the first pattern exists between the first region and the third region in the peripheral region. The display device according to any one of claims 1 to 7,
The pixel area includes a third sub-pixel area of a third color as a sub-pixel area,
The display device, wherein when viewed in a plan view, the first pattern in the detection electrode overlaps the first subpixel region, the second subpixel region, and the third subpixel region. The display device according to any one of claims 1 to 8,
The display device, wherein the second sub-pixel region is a white sub-pixel region. The display device according to any one of claims 1 to 9,
When the distance between the centers of the plurality of first patterns is the numerator and the distance between the centers of the pixel regions is the denominator, the distance ratio is in the range of more than 0.8 and less than 0.95. Display device.

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