JP2017166938A - State monitoring device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a state monitoring device with which it is possible to reduce the number of voltage detectors, and which makes continuous and highly flexible operation of devices possible.SOLUTION: The state monitoring device comprises: resistive element groups GR, GRconnected in series between DC busbars P, N; a ground resistor Rconnected between a neutral point M and a ground point G; a positive-side power feeding circuit 3 connected to a connecting point A and its output-side capacitor C; a power supply monitoring circuit 11a for monitoring the output voltage of the positive-side power feeding circuit 3 and an intermittent signal generation circuit 12 for generating an intermittent signal in accordance with its monitoring result; voltage detection means between the connecting point A and the neutral point M and between the neutral point M and a connecting point B; AD conversion circuits 13a, 13b for converting each voltage detection value to a digital signal in accordance with the intermittent signal, and serial signal conversion circuits 14a, 14b for converting the outputs thereof to a serial signal; and an electric/optical conversion circuit 16 for converting the serial signal to an optical serial signal (state monitoring signal).SELECTED DRAWING: Figure 1

Description

  The present invention relates to a state monitoring device for monitoring a ground fault or a DC overvoltage failure in a power converter having a DC circuit.

FIG. 8 is a circuit configuration diagram of a general power converter.
In FIG. 8, a converter 101 composed of a diode rectifier circuit converts a three-phase AC voltage input from AC input terminals R, S, and T into a DC voltage and outputs the DC voltage between positive and negative DC buses P and N. The two-level inverter 102 connected to the DC buses P and N includes a capacitor 102a and a three-phase inverter circuit 102b made of a semiconductor switching element, and converts the DC voltage into a three-phase AC voltage by the operation of the switching element. And output from the AC output terminals U, V, W.
A DC power source such as a battery may be used instead of the combination of the three-phase AC power source and the converter 101.

FIG. 9 is a circuit diagram of a state monitoring device that is connected between the DC buses P and N of the power converter as shown in FIG. 8 and detects a ground fault or a DC overvoltage failure. It is what.
In FIG. 9, between the DC buses P and N, a first resistance element group GR _{1 formed} by connecting resistance elements R _1P and R _2P in series and a resistance element R _1N and R _2N are connected in series. The second resistance element group GR ₂ is connected in series.

A connection point A between the resistance elements R _1P and R _2P constituting the resistance element group GR ₁ is connected to the positive power feeding circuit 3, and a voltage V _{p at the} connection point A is one input of the DC voltage calculation circuit 207. Input to the terminal. The positive power supply circuit 3, for example, three-terminal regulator is used, the positive-side power supply voltage V _cc necessary for the operation of the device is output.
The connection point B between the resistance elements R _1N and R _2N constituting the resistance element group GR ₂ is connected to the negative power feeding circuit 4, and the voltage V _{n at the} connection point B is the other of the DC voltage calculation circuit 207. Is input to the input terminal. The negative power supply circuit 4 also uses a three-terminal regulator or the like, and outputs a negative power supply voltage V _ee necessary for the operation of the apparatus.

A capacitor C ₁ is connected between the neutral point M, which is an interconnection point between the resistance element groups GR ₁ and GR _2, and the output side of the positive power supply circuit 3, and the neutral point M and the negative power supply. A capacitor C ₂ is connected between the output side of the circuit 4.
Further, a third resistance element group GR _{3 serving as} a ground resistance is connected between the neutral point M and the ground point G. The resistive element group GR ₃ the resistance element _{R 1G,} is constituted by a series circuit of _{R 2G,} the voltage across _{V g} of the resistance element _{R 1G} is detected from the resistance element _{R 1G,} the connection point between _{R 2G} C.

  In FIG. 9, 208a and 208b are reference voltage setting circuits, 209a and 209b are voltage comparison circuits, 210a and 210b are intermittent signal oscillation circuits, 212a and 212b are E / O (electric / optical) conversion circuits, and 213a and 213b. Is an optical cable, 214a and 214b are O / E (optical / electrical) conversion circuits, and 216 is a host control device including an arithmetic circuit (not shown).

In this state monitoring device generates a signal _{V Gfdet} compared with a set value _{V Gfset} voltage _{V g} by the voltage comparator circuit 209a, based on the intermittent signal _{S inta} outputted from the intermittent signal oscillator 210a E / O conversion circuit The ground fault detection signal F _gf is output via 212a, the optical cable 213a, and the O / E conversion circuit 214a.
Further, a DC voltage _{V d} which is calculated by the DC voltage calculation circuit 207 is compared with a set value _{V Odset} the voltage comparator circuit 209b generates the signal _{V Oddet,} on the basis of the intermittent signal _{S intb} outputted from the intermittent signal oscillator 210b The DC overvoltage detection signal F _od is output via the E / O conversion circuit 212b, the optical cable 213b, and the O / E conversion circuit 214b.
Incidentally, FIG. 10 is a waveform diagram of the intermittent signal _{S inta} or _{S intb} denoted as _{S int,} T represents the cycle of the intermittent signal _{S int,} T 1, _{T 2} respectively is logic "1", A period of “0” is shown.

JP2013-183522A (FIG. 1 etc.)

According to the prior art shown in FIGS. 8 to 10, both a ground fault and a DC overvoltage fault can be detected by a single state monitoring device, and the power necessary for the operation of the device needs to be supplied from the outside. Therefore, the cost and size of the apparatus can be reduced.
However, in actual power converters, in addition to detecting faults such as ground faults and DC overvoltages, a voltage detector is required to know the magnitude of the DC voltage to control the operation of the device. The demand to reduce the number of typical voltage detectors cannot be fully met.

In the above prior art, the basic operation is to transmit a comparison result between a preset failure determination setting value and a voltage detection value to the host control device 216 to perform failure determination.
Accordingly, it has been impossible to perform a flexible response such as allowing the operation to continue as much as possible by changing the set value for failure determination according to the operation state of the power conversion device.

  Therefore, the problem to be solved by the present invention is to reduce the number of voltage detectors used in the entire power converter, and to make it possible to flexibly change the set value for failure determination according to the operating state, and to make the power converter as much as possible. An object of the present invention is to provide a state monitoring device that can be operated continuously.

In order to solve the above-mentioned problem, the invention according to claim 1 includes a first resistance element group and a second resistance element group connected in series between a positive side and a negative side of a DC power source,
A ground resistance element connected between an interconnection point of the first resistance element group and the second resistance element group and a ground point;
A first power supply means connected to a first connection point between the resistance elements constituting the first resistance element group;
First power storage means connected to the output side of the first power supply means;
Voltage monitoring means for monitoring the output voltage of the first power supply means;
Intermittent signal generating means for generating an intermittent signal according to the monitoring result by the voltage monitoring means;
First voltage detecting means for detecting a voltage between the first connection point and the interconnection point;
Second voltage detection means for detecting a voltage between a second connection point of the resistance elements constituting the second resistance element group and the interconnection point;
A digital signal calculating means for calculating a digital signal corresponding to each voltage detected value by the first voltage detecting means and the second voltage detecting means in accordance with the intermittent signal;
Serial signal conversion means for converting the digital signal into a serial signal and outputting the serial signal;
Electrical / optical conversion means for outputting an optical serial signal converted from the serial signal as a state monitoring signal.

  The invention according to claim 2 is the state monitoring apparatus according to claim 1, wherein the second power feeding means connected to the second connection point and the second power feeding means connected to the output side of the second power feeding means. Two power storage means, and the voltage monitoring means can also monitor the output voltage of the second power supply means.

According to the present invention, not only information indicating a ground fault or a DC overvoltage failure, but also a ground voltage is taken into the device as a continuous analog signal, converted into a digital signal, and then converted into an optical serial signal. The data is transmitted to the apparatus to perform arithmetic processing. As a result, it is possible to integrate voltage detectors for failure detection and DC voltage detection, and the number of voltage detectors used in the entire power conversion device can be reduced to reduce costs.
In addition, if the setting value for determination to be compared with the voltage detection value is switched flexibly according to the operating state, the period during which the power conversion device can be continuously operated becomes longer, resulting in improved reliability. Connected.

It is a circuit block diagram which shows 1st Embodiment of this invention. It is a signal waveform diagram for demonstrating operation | movement of the power supply voltage monitoring circuit in 1st Embodiment. It is a signal waveform diagram for demonstrating the outline | summary of the detection operation in 1st Embodiment. It is a signal waveform diagram for demonstrating the detail of the detection operation in 1st Embodiment. It is explanatory drawing of the serial signal transmitted by a UART system. It is a circuit block diagram (equivalent circuit diagram) for demonstrating the state of the voltage and electric current by the presence or absence of the ground fault in 1st Embodiment. It is a circuit block diagram which shows 2nd Embodiment of this invention. It is a circuit block diagram of the power converter device with which the conventional state monitoring apparatus is applied. It is a circuit block diagram of the conventional state monitoring apparatus. It is a wave form diagram which shows an example of the intermittent signal _Sinta or _Sintb in FIG.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, FIG. 1 is a circuit configuration diagram of a state monitoring apparatus according to a first embodiment applied to, for example, the power conversion apparatus illustrated in FIG. This state monitoring device is also used by connecting between positive and negative DC buses P and N in the power conversion device.

In FIG. 1, a first resistance element group GR ₁ composed of a series circuit of resistance elements R _1P and R _2P and a second resistance composed of a series circuit of resistance elements R _1N and R _2N are _arranged between the DC buses P and N. point where the element group GR ₂ are connected in series is the same as FIG. Here, _{V P} is the voltage between bus P- neutral M, _{V N} is the voltage between the neutral point M- bus N, _{V p} the connection point A- voltage between neutral points M, _{V n} is the medium sexual point M- connection point voltage between the _B, I p, the _{I n} indicates the current flowing through the resistor element group _GR 1, GR ₂ respectively.
R _G is connected grounding resistance between the ground point G and the neutral point M, the I _g is a current flowing through the ground resistor R _G (ground fault current). The neutral point M corresponds to an interconnection point in the claims.

A positive power supply circuit 3 such as a three-terminal regulator is connected to the connection point A in the resistance element group GR ₁ , and the positive power supply voltage necessary for the operation of the state monitoring device is connected from the positive power supply circuit 3. _Vcc is output. Further, a capacitor C ₁ is connected between the output side of the positive power supply circuit 3 and the neutral point M.
Here, the positive-side power supply circuit 3 corresponds to the first power supply unit of the invention, capacitor C ₁ corresponds to the first storage means.

A power supply voltage monitoring circuit 11 a is connected to the output side of the positive power supply circuit 3, and the output signal V _EN is converted into an intermittent signal S _INT by the intermittent signal generation circuit 12. The intermittent signal S _INT is input to AD (analog / digital) conversion circuits 13a and 13b and serial signal conversion circuits 14a and 14b. The AD conversion circuits 13a and 13b also receive voltages V _p and V _{n at} connection points A and B, _{respectively.} Each is entered.

The AD conversion circuits 13a and 13b convert the analog voltages V _p and V _n into digital signals D _VA and D _VB , respectively, according to the logic state (“0” or “1”) of the intermittent signal S _INT and output them. .
The serial signal conversion circuits 14a and 14b convert the digital signals D _VA and D _VB into serial signals S _VA and S _VB , respectively, according to the logic state of the intermittent signal S _INT and output them.

The serial signal selection circuit 15 selects one of the serial signals S _VA and S _VB and outputs it as the serial signal S _E.
E / O (electrical / optical) conversion circuit 16 converts the serial signal _{S E} to the optical serial signal _{S L,} O / E (optical / electrical) in the control device 51 of the upper through the optical cable 41 conversion circuit 17 To send. In the O / E converter 17 converts the optical serial signal _{S L} to the condition monitoring data _{S data} as an electrical signal.

In the above configuration, the AD conversion circuits 13a and 13b correspond to digital signal calculation means in the claims, and the serial signal conversion circuits 14a and 14b similarly correspond to serial signal conversion means. Further, the optical serial signal S _L is equivalent to a state supervisory signal in the claims.

Next, detailed operation of this state monitoring apparatus will be described.
When a DC voltage is applied between the DC buses P and N in FIG. 1 from the converter 101 or the like shown in FIG. 8 described above, a current flows through the resistance element groups GR ₁ and GR ₂ . In a state where the ground fault has not occurred, the current I _n flowing in the current I _p flowing through the resistor element group GR ₁ resistive element group GR _2, substantially the same value.

Resistance element _R 1P constituting the resistive element group GR _1, since the connection point A between the _{R 2P} current flows to the positive-side power supply circuit 3, strictly I found the following _{I p} is slightly smaller than _{I n.} However, since the input current of the positive-side power supply circuit 3 is small, the conventional equipment, I _p and I _n and the difference between the AD conversion circuit 13a, 13b of precision and control operations, the range of error in the malfunction detection Stay. Thus, no problem is considered to be equal and _{I p} and _{I n.}

When the input current flows through the positive-side power supply circuit 3 positive power supply voltage V _cc is outputted, the capacitor C ₁ is charged. When the start time of charging and t _v0, voltage or the positive power supply voltage V _cc of the capacitor C ₁ is toward voltage V ₁₀₀ where the positive-side power supply circuit 3 outputs a steady state as shown in FIG. 2 (a) To rise.
When elapsed from the start of the charging of the capacitor C ₁ to the time t _V95, positive power supply voltage V _cc is circuit sufficiently operable set value, for example to reach the voltage V _95, at this point, the power supply voltage monitoring circuit The logic state of the output signal V _{EN of} 11a changes from “0” to “1” as shown in FIG.
In the power supply voltage monitoring circuit 11a, a setting value (the voltage V _{95 in the} above example) for changing the logic state of the output signal V _EN from “0” to “1” is changed as necessary, which will be described later. Detection sensitivity of ground faults and DC overvoltage faults, and monitoring accuracy of power supply voltage can be adjusted as appropriate.

When the logic state of the signal V _EN becomes “1”, the intermittent signal generation circuit 12 to which the signal V _EN is input outputs an intermittent signal S _INT having a period T as shown in FIG. When the period of the logic state “1” of the intermittent signal S _INT is T ₁ and the period of the logic state “0” is T ₂ , the relationship between the lengths of these periods is T ₁ <T ₂ , and the period T ₁ There can be considered operating time, the period T ₂ rest period of the subsequent circuit.
The operation of the AD conversion circuit 13a connected to the subsequent stage of the intermittent signal generation circuit 12 and the output signal D _VA , and the serial signal S _VA output from the serial signal conversion circuit 14a according to the intermittent signal S _INT of FIG. Is as shown in FIGS.

Next, FIG. 4 is a waveform diagram showing the operation of the subsequent circuit and output signals in a state where the period T ₁ of the logic state “1” of the intermittent signal S _INT is enlarged.
When the logic state of the intermittent signal S _INT changes from “0” to “1” as shown in FIG. 4A, the operation of the AD conversion circuit 13a to which the intermittent signal S _INT is input is as shown in FIG. Thus, the conversion is being performed, and the conversion operation for the input voltage V _p is started. When the period T _CHG necessary for the conversion operation elapses, the conversion operation ends, and conversion result data (digital signal D _VA ) corresponding to the input voltage V _p is output as shown in FIG.
Although not shown, similarly, the other AD converter circuit 13b to which the intermittent signal S _INT of FIG. 4A is input also outputs conversion result data for the input voltage V _n .

In the serial signal conversion circuit 14a, as shown in FIG. 4 (d), AD conversion circuit 13a after the conversion has exceeded the delay time _{T DLYA} from completion by the digital signal _{D VA} serial signal S is a conversion result data Convert to _VA and output.
As the delay time _{T_DLYA} , an appropriate value may be set in the serial signal conversion circuit 14a in consideration of the time from the start of output of the conversion result data by the AD conversion circuit 13a to the stabilization (determination).

There are various types of serial signals depending on the output method. For example, in the generally well-known UART (Universal Asynchronous Receiver Transmitter) system, the clock signal S _CLK is shown in FIG. In synchronization with the rising edge, serial data is output bit by bit as shown in FIG. The start of data output as a serial signal is a start bit (ST), followed by 8 bits of data (D _{0 to} D ₇ ), then a parity bit (PR), and finally a stop bit ( SP). The stop bit and parity bit may not be used depending on the specifications of the device.

The operation of the serial signal conversion circuit 14b is basically the same as that of the serial signal conversion circuit 14a. However, as shown in FIG. _4E , the delay time T _DLYB is set after the conversion operation by the AD conversion circuit 13b is completed. After the elapse of time, the serial signal _SVB is output.
The above delay time _{T DLYB} is, as shown in FIG. 4 (e), in addition to the delay time _{T DLYA} described above, and time _{T SLout} serial signal conversion circuit 14a outputs a serial signal _{S VA,} the time _{T SLout} elapsed it may be set to the serial signal conversion circuit 14b in consideration of the appropriate margin time T _D after.

In the serial signal selection circuit 15, among the serial signal _{S VA, S VB} respectively output the serial signal conversion circuit 14a, from 14b, selects the serial signal that is actually present, and outputs a serial signal _{S E.} In other words, the serial signal selection circuit 15 outputs the sum of the serial signals S _VA and S _VB along the time axis.

Serial signal S _E output from the serial signal selection circuit 15, as described above, is converted into an optical serial signal S _L That state monitoring signals shown in FIG. 4 (f) by E / O conversion circuit 16, the optical cable 41 The state monitoring data S _data is converted by the O / E conversion circuit 17 in the control device 51. The state monitoring data S _data is taken into a calculation device (not shown), and a calculation for controlling the operation of the power converter and a calculation for detecting a ground fault or a DC overvoltage fault are executed.

Optical serial signal _{S L} on the optical cable 41, 1 ※ in FIG. 4 (f), the as shown by ※ 2, an optical serial signal _{S VA} of the voltage _{V p} obtained by converting by the AD conversion circuit 13a, voltage V _The optical serial signal _SVB obtained by converting _n by the AD conversion circuit 13b is a continuous signal.

9 and 10, when the logic state of the intermittent signal S _int (S _inta , S _intb ) is “1”, the E / O conversion circuits 212 a and 212 b always output light. Yes. On the other hand, in this embodiment, the optical serial signal SL as shown in FIG. _4F is output from the E / O conversion circuit 16 to shorten the period of the logical state “1” for outputting light. As a result, power consumption can be reduced.

Next, FIG. 6 is a circuit configuration diagram for explaining the state of voltage and current depending on the presence or absence of a ground fault in the first embodiment. The DC power source 60 (corresponding to the converter 101 in FIG. _1, GR _2, an equivalent circuit diagram illustrating using only ground resistor _{R G.}
In the following description, for the sake of simplification, it is assumed that the resistance values of the resistance elements R _1P and R _1N are equal (both resistance values are R ₁ [Ω]), and the resistance values of the resistance elements R _2P and R _2N are also equal. (Each resistance value is R ₂ [Ω]). Note that the resistance value of the ground resistance _RG is R _G [Ω] using the sign as it is.

FIG. 6A is an equivalent circuit when there is no ground fault. In this case, no current flows through the grounding resistor _{R G,} can be ignored as _I g = 0, the current _{I p} flowing through the resistor element group GR ₁ becomes _{I n} that it flows through the resistive element group GR _2. Therefore, the relationship of Formula 1 is established.
[Formula 1]
_{I p} = I _n

The above current _I p, _{I n} is known resistance _{R 1} and the voltage _V p, from _{V n,} as represented by Equation 2, Equation 3.

From the above relationship, the voltages V _p and V _n are equal as shown in Equation 4.
[Formula 4]
V _p = V _n

Therefore, in the circuit shown in FIG. 1, the values of the voltages V _p and V _n are transmitted as the optical serial signal S _{L to} the arithmetic circuit in the control device 51 via the optical cable 41, so that the arithmetic circuit becomes V _p and V If it can be detected that _n is equal, it can be determined that no ground fault has occurred. In addition, in FIG. 6A, the voltage E output from the DC power supply 60 between the DC buses P and N can be expressed by using the voltages V _p and V _n and the known resistance values R ₁ and R _2. Therefore, the arithmetic circuit can also obtain this voltage E.

Next, FIG. 6B is an equivalent circuit when the negative bus N of the DC circuit is grounded. In this case, the current _{I p} of the resistive element group GR ₁ is shunted to the current _{I g} flowing current _{I n} of the resistive element group GR ₂ a ground resistance _{R G.} Magnitude relationship between these currents, the current I _p and I _n having different sizes may Equation 6, the formula 7.
[Formula 6]
I _p = I _n + I _g
[Formula 7]
I _p > I _n

Since the voltages V _p and V _n are expressed by Equations 2 and 3 described above, the voltages V _p and V _n are also different in magnitude, and the magnitude relationship between them is Equation 8.
[Formula 8]
V _p > V _n
From the above, when the arithmetic circuit in the control device 51 to which the values of the voltages V _p and V _n are transmitted as the optical serial signal S _L detects that V _p > V _n , the arithmetic circuit in the negative bus N It can be determined that a ground fault has occurred.

Further, FIG. 6C is an equivalent circuit when the positive bus P is grounded.
In this case, the sum of the current _{I g} to the current _{I p} of the resistive element group GR ₁ ground resistance _{R G} is the current _{I p} of the resistive element group GR _2. The relationship of these currents, the current I _p having different _sizes, large and small relation of I _n is the equation 9, equation 10.
[Formula 9]
_{I n} = I p + I _g
[Formula 10]
_{I p} <I _n

Since the voltages V _p and V _n are expressed by the above-described equations 2 and 3, the voltages V _p and V _n are also different in magnitude, and the magnitude relationship between them is given by equation 11.
[Formula 11]
V _p <V _n
Arithmetic circuit in the control unit 51 to voltage V _p, the value of V _n are transmitted as optical serial signal S _L, when it is detected that a V p _{<V n,} a ground fault in the positive busbar P Can be determined to have occurred.

Since the explanation with FIG. 6 is simplified using an equivalent circuit, it is assumed that the bus P or N is directly connected to the ground point G when a ground fault occurs. However, in an actual power converter, Any other resistance element whose value is unknown, such as some other conductor or ground, is further connected in series. Thus, although the ground fault current changes, in the present embodiment it is possible to calculate the magnitude of the ground fault current on the basis of the calculation of the current I _g flowing through the ground resistor R _G, knowing the extent of ground fault (risk) It is possible.
Further, according to Equation 5, the output voltage E of the DC power supply 60 can be calculated based on the magnitudes of the voltages V _p , V _{n and the} like, and a DC overvoltage failure can be determined by an operation using the calculation result. it can.

Next, FIG. 7 is a circuit configuration diagram showing a second embodiment of the present invention.
While the first embodiment of FIG. 1 described above operates only with the positive power supply circuit 3 (positive power supply), the second embodiment shown in FIG. 7 requires both positive and negative power supplies. This is in consideration of using a high-precision AD conversion circuit or the like.

That is, in FIG. 7, the input side of the negative power supply circuit 4 (negative power supply) is connected to a connection point B between the resistance elements R _1N and R _2N constituting the resistance element group GR ₂ , and this negative power supply circuit 4 and a capacitor C ₂ between the output side and a neutral point M, these by generating a negative supply voltage V _ee. The negative power supply voltage _Vee and the positive power supply voltage _Vcc are input to the power supply voltage monitoring circuit 11b and compared with a predetermined set value (threshold value), whereby the power supply voltages _Vcc and _Vee are changed into circuit operation. It is determined whether or not it is in a necessary state. The other parts in FIG. 7 are denoted by the same symbols as in FIG. 1, and the operation for detecting a ground fault is the same as in the first embodiment.
Here, the negative-side power supply circuit 4 corresponds to the second power supply unit of the invention, the capacitor C ₂ corresponding to the second storage means.

In the first embodiment described above, the positive side power supply positive power supply voltage V _cc is the logic state of the signal V _EN if does not reach the predetermined value is "0", the operation of the intermittent signal generating circuit 12 later becomes not performed Although the abnormality of the voltage _Vcc can be detected, according to the second embodiment, the abnormality of the negative power supply voltage _Vee can also be detected by the same principle.

  The state monitoring device according to the present invention is not limited to the power conversion device as shown in FIG. 8 but also for various devices having DC circuits (positive and negative DC buses P and N), ground fault, DC overvoltage failure, positive and negative. Can be used to monitor power supply voltage abnormalities.

R, S, T: AC input terminals U, V, W: AC output terminal P: DC bus (positive bus)
N: DC bus (negative bus)
A, B: Connection point M: Neutral point G: Grounding point GR ₁ : First resistance element group GR ₂ : Second resistance element group R _1P , R _2P : Resistance elements R _1N , R _2N : Resistance element R _G : ground resistance C ₁ , C ₂ : capacitor 3: positive side power supply circuit 4: negative side power supply circuit 11a, 11b: power supply voltage monitoring circuit 12: intermittent signal generation circuit 13a, 13b: AD conversion circuit 14a, 14b: serial signal Conversion circuit 15: Serial signal selection circuit 16: E / O conversion circuit 17: O / E conversion circuit 41: Optical cable 51: Controller 101: Converter 102: Two-level inverter 102a: Capacitor 102b: Three-phase inverter circuit

Claims (2)

A first resistor element group and a second resistor element group connected in series between the positive side and the negative side of the DC power supply;
A resistance element connected between an interconnection point and a ground point of the first resistance element group and the second resistance element group;
A first power supply means connected to a first connection point between the resistance elements constituting the first resistance element group;
First power storage means connected to the output side of the first power supply means;
Voltage monitoring means for monitoring the output voltage of the first power supply means;
Intermittent signal generating means for generating an intermittent signal according to the monitoring result by the voltage monitoring means;
First voltage detecting means for detecting a voltage between the first connection point and the interconnection point;
Second voltage detection means for detecting a voltage between a second connection point of the resistance elements constituting the second resistance element group and the interconnection point;
A digital signal calculating means for calculating a digital signal corresponding to each voltage detected value by the first voltage detecting means and the second voltage detecting means in accordance with the intermittent signal;
Serial signal conversion means for converting the digital signal into a serial signal and outputting the serial signal;
Electrical / optical conversion means for outputting an optical serial signal converted from the serial signal as a state monitoring signal;
A state monitoring device comprising: In the state monitoring device according to claim 1,
A second power supply means connected to the second connection point; and a second power storage means connected to the output side of the second power supply means,
The state monitoring apparatus characterized in that the voltage monitoring means can also monitor the output voltage of the second power feeding means.

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