JP2017102659A - Server device and switch module control method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a server device or the like, configured to prevent increase of power consumption in a switch module mounted thereon.SOLUTION: A server device includes: one or multiple CPU blades each including a CPU; one or multiple switch modules that connect the server to an external device; and a mid-plane which interconnects the CPU blades and the switch modules to each other. The mid-plane has a control circuit for controlling connection between the CPU blades and the switch modules, in accordance with redundant configuration of the switch modules set in advance. The CPU blade includes virtual-machine generation means of generating a virtual machine including the switching modules connected communicably by the control circuit.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a switch module control technique in a server device.

  Along with the sophistication and complexity of IT (Information Technology) systems in recent years, I / O (Input / Output) expandability is maintained while maintaining space saving through physical integration, and system resource levels are effectively utilized. Blade servers are attracting much attention as products that realize system integration.

  The blade server generally includes a plurality of CPU (Central Processing Unit) blades and a plurality of switch modules for connecting the blade server to an external device. In recent years, blade servers equipped with a switch module having a switch chip having a PCIe (Peripheral Component Interconnect express) interface have been developed for speeding up communication in the blade server.

  FIG. 8 is a diagram illustrating an example of the configuration of the blade server 10. The blade server 10 illustrated in FIG. 8 includes a plurality of CPU blades (CPU blades 20 and 25 in FIG. 8) and a plurality of switch modules (switch modules 40, 45, and 46 in FIG. 8) for connecting to external devices. Is provided. The blade server 10 further includes a midplane 30. The midplane 30 is connected to the CPU blades 20 and 25, the switch modules 40, 45, and 46 and various modules (not shown) so that data input and output from them can be communicated.

  Since the CPU blade 20 and the CPU blade 25 have the same configuration, the configuration of the CPU blade 20 will be described in the following description. Similarly, since the switch module 40, the switch module 45, and the switch module 46 have the same configuration, the configuration of the switch module 40 will be described in the following description.

  The CPU blade 20 includes a CPU 21, a FC (Fiber Channel) controller 22, and a LAN (Local Area Network) controller 23. The CPU 21 governs the overall operation of the CPU blade 20. The FC controller 22 controls data transmission by a high-speed data transmission method. The LAN controller 23 controls data transmission based on the Ethernet (registered trademark) standard. The FC controller 22, the LAN controller 23, and the switch chip 41 each have a midplane 30 and a high-speed interface (High Speed Interface).

  The switch module 40 has a high-speed interface corresponding to the maximum number of CPU blades that can be mounted, and a switch chip 41 having a PCIe interface. The switch chip 41 is connected to the CPU 42 via the PCIe interface and is controlled by an OS (Operation System) executed by the CPU 42 or the like.

  The switch chip 41 is an IC (Integrated Circuit) designed for routing processing, and has a packet relay capability that is high enough to prevent theoretical packet loss even when data is sent at the maximum LAN speed. The CPU 42 controls the relay processing of the switch chip 41 by calculating route information that the switch chip 41 refers to during relay processing, or by performing relay processing of a protocol that cannot be processed by the switch chip 41.

  Here, as a related technique, for example, Patent Document 1 discloses an information processing apparatus capable of improving I / O performance of a virtual machine and operating as a virtual machine with the same device configuration as that of a real machine.

JP 2009-259108 A

  As described above, when packet relay processing is performed by a switch module equipped with a switch chip, there is a problem that while the packet relay performance is improved, the power consumption and the heat generation amount of the CPU that controls the switch chip are also increased. In particular, for example, a CPU included in a switch module that supports an L3 (Layer 3) function requires the same power as a PC (Personal Computer), and thus power consumption is also large.

  Although Patent Document 1 described above discloses improving the I / O performance of a virtual machine, it does not disclose a technique for solving the problem of increasing the power consumption of the CPU provided in the switch module.

  The present invention has been made in view of the above problems, and has as its main object to provide a server device and the like that can prevent an increase in power consumption in a switch module to be mounted.

  The first server device of the present invention interconnects one or a plurality of CPU blades each mounted with a CPU, one or a plurality of switch modules for connecting the own device to an external device, and the CPU blades and the switch modules. A midplane having a control circuit that controls connection between the CPU blade and the switch module according to a preset redundant configuration of the switch module, and the CPU blade includes: Virtual machine generation means for generating a virtual machine incorporating the switch module communicatively connected by the control circuit.

  The first switch module control method of the present invention includes one or more CPU blades each mounted with a CPU, one or more switch modules that connect the own device to an external device, the CPU blades, and the switch modules. In the server device including the interconnected midplane, the midplane controls the connection between the CPU blade and the switch module according to a preset redundant configuration of the switch module, and the CPU The blade creates a virtual machine incorporating the switch module communicatively connected by the midplane.

  According to the present invention, it is possible to provide a server device or the like that can prevent an increase in power consumption in a switch module to be mounted.

It is a block diagram which shows the structure of the blade server which concerns on the 1st Embodiment of this invention. It is a figure which shows an example of the process of the blade server which concerns on the 1st Embodiment of this invention. The other example of the process of the blade server which concerns on the 1st Embodiment of this invention is shown. It is a block diagram which shows the structure of the blade server which concerns on the 2nd Embodiment of this invention. It is a figure which shows an example of the process of the blade server which concerns on the 2nd Embodiment of this invention. It is a block diagram which shows the structure of the blade server which concerns on the 3rd Embodiment of this invention. It is a block diagram which shows an example of the hardware constitutions of CPU blade with which the blade server which concerns on each embodiment is provided. It is a block diagram which shows the structure of a related blade server.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In addition, the direction of the arrow in a drawing shows an example and does not limit the direction of the signal between blocks.

First Embodiment FIG. 1 is a block diagram showing a configuration of a blade server 100 according to a first embodiment of the present invention. As shown in FIG. 1, the blade server 100 includes one or more CPU blades (here, a plurality of CPU blades 110 and 120), a midplane 130, and one or more switch modules (here, a plurality of switch modules 140, 150).

  The midplane 130 is a kind of circuit board (printed circuit board) and has a plurality of connectors on both sides thereof. The midplane 130 forms a bus by connecting these connectors to each other on a board. The CPU blades 110 and 120 are connected to one surface of the midplane 130, and the switch modules 140 and 150 are connected to the other surface of the midplane 130.

  For example, a server 160 or a console 170 that controls and monitors the blade server 100 may be connected to the wiring conforming to the Ethernet standard provided in the midplane 130.

  As shown in FIG. 1, the blade server 100 according to the present embodiment controls the switch chips 141 and 151 included in the switch modules 140 and 150 by the CPU blades 110 and 120, so that the switch modules 140 and 150 are CPUs. It has the structure which is not provided.

  In order to control the switch chips 141 and 151 by the CPU blades 110 and 120, the midplane 130 has a function of controlling the connection between the CPU blades 110 and 120 and the switch modules 140 and 150. In this embodiment, in order to control the switch modules 140 and 150, the CPU blade 110 constructs virtual machines 111 and 112 that operate on the virtual machine monitor (hypervisor) 113. Similarly, the CPU blade 120 constructs virtual machines 121 and 122 that operate on the virtual machine monitor 123.

  Details of the configuration of the blade server 100 according to the present embodiment will be described below.

  First, each component of the blade server 100 will be described. Here, since the CPU blade 110 and the CPU blade 120 have the same configuration, the configuration of the CPU blade 110 will be mainly described below. Similarly, since the switch module 140 and the switch module 150 have the same configuration, the configuration of the switch module 140 will be mainly described below.

  As shown in FIG. 1, the CPU blade 110 reads out, for example, a computer program stored in a storage medium (storage device) (not shown) mounted or connected to the memory (not shown) to a memory (not shown). It has the function to construct a virtual machine by executing together. Specifically, the CPU blade 110 has a function of constructing virtual machines 111 and 112 that operate on the virtual machine monitor 113.

  The CPU blade 110 further includes a PCIe root port 115, a LAN controller 116, a management LAN 117, and an I2C (Inter-Integrated Circuit) master 118. The CPU blade 110 performs data transmission based on the PCIe standard with the midplane 130 via the PCIe root port 115.

  The LAN controller 116 has ports (ports) 1A and 1B, and is connected to the switch chips 141 and 151 through them to perform data transmission conforming to the Ethernet standard. Specifically, port 1A of LAN controller 116 is connected to port 1A of switch chip 141, and port 1B of LAN controller 116 is connected to port 1B of switch chip 151. Similarly, the LAN controller 126 has ports 2A and 2B. The port 2A is connected to the port 2A of the switch chip 141, and the port 2B is connected to the port 2B of the switch chip 151. As described above, the CPU blade 110 and the switch modules 140 and 150 have a redundant configuration of LAN paths.

  The management LAN 117 is connected to a wiring on the midplane 130 that enables connection to an external device such as the server 160 and the console 170, and sends data of the CPU blade 110 to the external device and obtains data from the external device. I do.

  The I2C master 118 performs I2C communication with the midplane 130. In this embodiment, the CPU blades 110 and 120 are connected to the life and death monitoring circuit 135 of the midplane 130 via the I2C masters 118 and 128, respectively, and perform life and death monitoring.

  Next, the configuration of the midplane 130 will be described.

  The midplane 130 includes PCIe repeaters 131 and 132, a PCIe switch 133, and a switch module controller (hereinafter also referred to as “SWM controller”) 134.

  The midplane 130 receives the data output from the CPU blades 110 and 120 by the PCIe repeaters 131 and 132, respectively, and further transmits the data to the switch modules 140 and 150 via the PCIe switch 133.

  The PCIe repeaters 131 and 132 and the PCIe switch 133 are controlled by the SWM controller 134. The SWM controller 134 includes an alive monitoring circuit 135, a CPU blade setting circuit 136, a PCIe setting circuit 137, and a status detection circuit 138.

  The PCIe repeaters 131 and 132 have an Enable control function, and operate (Active) or stand by in accordance with an Enable signal or a Disable signal from the PCIe setting circuit 137 of the SWM controller 134. Further, the PCIe switch 133 switches a communicable path between the PCIe repeaters 131 and 132 and the switch modules 140 and 150 in accordance with the CONFIG signal from the PCIe setting circuit 137 of the SWM controller 134.

  The life and death monitoring circuit 135 performs mutual life and death monitoring of the CPU blades 110 and 120 as described above. The CPU blade setting circuit 136 performs various settings of the CPU blade in accordance with the redundant configuration of the mounted CPU blade. The PCIe setting circuit 137 sends an Enable signal and a Disable signal to the PCIe repeaters 131 and 132 as described above according to a redundant configuration of the switch module set in advance and the status of the CPU blade, and the PCIe switch 133. For example, a CONFIG signal is transmitted. The status detection circuit 138 detects whether or not a CPU blade or a switch module is attached to the midplane 130.

  The switch modules 140 and 150 include switch chips 141 and 151 each having a PCIe interface, and receive data transmitted from the midplane 130 at the switch chips 141 and 151 via the PCIe interface and transmit the data to a destination.

  Next, a specific operation of the blade server 100 will be described with reference to FIG.

  First, the operation of the blade server 100 that causes one of the CPU blades 110 and 120 to function as an active system and the other as a standby system will be described.

  For example, it is assumed that the blade server 100 is powered on from a power supply module (not shown) mounted on the blade server 100. At this time, in the CPU blades 110 and 120, the PCIe root ports 115 and 125, the LAN controllers 116 and 126, the management LANs 117 and 127, and the I2C masters 118 and 128 are activated. In addition, a CPU, a memory, a control circuit, etc. (not shown) are activated, and the virtual machine monitors 113 and 123 are activated.

  At this time, the switch chips 141 and 151 of the switch modules 140 and 150 are activated. Further, the PCIe repeaters 131 and 132, the PCIe switch 133, and the SWM controller 134 of the midplane 130 are activated (S101).

  Subsequently, the status detection circuit 138 of the SWM controller 134 detects the attachment state of the midplane 130 to the connector (S102). Here, the status detection circuit 138 detects that the CPU blades 110 and 120 are attached and that the switch modules 140 and 150 are attached.

  The status detection circuit 138 that detects that the CPU blades 110 and 120 are connected notifies the CPU blade setting circuit 136 to that effect. The CPU blade setting circuit 136 sets the active or standby system of the CPU blades 110 and 120 based on the redundant configuration of the switch module and the status of the CPU blade set in advance (S103). Here, for example, the CPU blade 110 is set to the active system and the CPU blade 120 is set to the standby system.

  Subsequently, in order to connect the PCIe root port 115 of the active CPU blade 110 and the switch modules 140 and 150 in a communicable manner, an Enable signal is sent from the PCIe setting circuit 137 to the PCIe repeater 131 that relays the communication. Send out (S104). At this time, the PCIe setting circuit 137 also sends a Disable signal to the PCIe repeater 132. As a result, the PCIe repeater 131 enters an active (operating) state, and the PCIe repeater 132 enters a standby (standby) state.

  The PCIe setting circuit 137 also sends a CONFIG signal to the PCIe switch 133 (S105). That is, the PCIe setting circuit 137 sends a CONFIG signal to the PCIe switch 133 so that the PCIe repeater 131 and the switch modules 140 and 150 are communicably connected. In FIG. 1, the solid line indicates that the PCIe repeater 131 and the switch modules 140 and 150 are communicably connected.

  Subsequently, the CPU blade setting circuit 136 sends the presence of the switch modules 140 and 150 detected by the status detection circuit 138 as described above to the PCIe root port 115 of the active CPU blade 110. (S106).

  Upon receiving the above notification at the PCIe root port 115 (S107), the CPU blade 110 incorporates the switch chips 141 and 151 of the switch modules 140 and 150, which are physical devices, into the virtual machine by the PCIe Hot Swap process (hot swap function).

  Specifically, the following processing is performed. When the CPU blade 110 receives the presence of the switch modules 140 and 150, the PCIe Hot Swap is activated (S108). The PCIe Hot Swap is a program stored in a storage area (not shown) of the CPU blade 110, and is executed by being read into the memory by the CPU of the CPU blade 110.

  The PCIe Hot Swap checks whether or not a PCIe device is connected under the PCIe root port 115 (S109). As a result, in this case, PCIe Hot Swap detects that the switch chips 141 and 151 are connected under the PCIe root port 115.

  Then, the PCIe Hot Swap allocates an address and an interrupt signal so that the CPU blade 110 can use the switch chips 141 and 151 in which the connection is detected (S110). With the above PCIe Hot Swap process, the CPU blade 110 can transfer data to and from the switch chips 141 and 151.

  When the connection (incorporation) operation of the switch chips 141 and 151 by the PCIe Hot Swap is finished, the virtual machine monitor 113 of the CPU blade 110 is notified of the fact. When the virtual machine monitor 113 receives the notification, the virtual machine monitor 113 constructs the virtual machines 111 and 112. That is, the virtual machine monitor 113 constructs virtual machines by the number of switch modules connected under the virtual machine monitor 113. In this embodiment, since the number of switch modules connected under the control is 2, the virtual machine monitor 113 constructs two virtual machines 111 and 112. At this time, the virtual machines 111 and 112 incorporate the switch chips 141 and 151, which are physical devices, as pass-through devices, respectively (S111). A normal technique may be used for the construction method of the virtual machine and the method of incorporating the switch chips 141 and 151 as pass-through devices. Thereafter, each of the virtual machines 111 and 112 starts a guest OS.

  The virtual machines 111 and 112 are connected to the switch chips 141 and 151 by PCIe pass-through, which is a technology that allows a guest OS to directly access a physical device by using an Intel (registered trademark) virtualization technology-d (VT-d) function. Include. With this technique, after the guest OS is started, the virtual machines 111 and 112 can realize functions equivalent to those of the physical machine. Further, the control performance of the switch chips 141 and 151 by the virtual machines 111 and 112 can be equivalent to that of a physical machine.

  As described above, even if the switch modules 140 and 150 do not have a CPU, the virtual machines 111 and 112 of the CPU blade 110 can control the relay processing of the switch chips 141 and 151 by the above configuration.

  Next, the operation of the blade server 100 when an error is detected in the active CPU blade 110 will be described with reference to FIG.

  The CPU blade 110 and the CPU blade 120 perform life and death monitoring with a hard beat in the life and death monitoring circuit 135 provided in the SWM controller 134 of the midplane 130.

  Here, it is assumed that the CPU blade 120 detects an error of the active CPU blade 110. At this time, the standby CPU blade 120 sends an active switching request to the SWM controller 134 via the I2C master 128.

  The SWM controller 134 receives an active switching request in the life and death monitoring circuit 135 (S201). Subsequently, the PCIe setting circuit 137 switches the Enable signal and the Disable signal to the PCIe repeaters 131 and 132 (S202). In other words, the PCIe setting circuit 137 sends a Disable signal to the PCIe repeater 131 and sends an Enable signal to the PCIe repeater 132. As a result, the PCIe repeater 131 enters a standby state, and the PCIe repeater 132 enters an active state.

  Further, the PCIe setting circuit 137 switches the connection between the PCIe repeaters 131 and 132 and the switch modules 140 and 150 by sending a PCIe switch CONFIG signal to the PCIe switch 133 (S203). That is, the PCIe setting circuit 137 switches the connection indicated by the dotted line in the PCIe switch 133 in FIG. 1, that is, the PCIe repeater 132 and the switch modules 140 and 150 are connected so as to be communicable.

  Subsequently, the CPU blade setting circuit 136 notifies the CPU blade 120 of the presence of the switch modules 140 and 150 (S204).

  Thereafter, the CPU blade 120 executes the processing S107 to S111 described with reference to FIG. 2, thereby switching the CPU blade (virtual machine) and restoring the switch modules 140 and 150.

  As described above, according to the present embodiment, the midplane 130 is connected by the SWM controller 134 to the PCIe repeaters 131 and 132 so that the active CPU blade 110 and the switch modules 140 and 150 are communicably connected. The PCIe switch 133 is controlled. The active CPU blade 110 constructs virtual machines 111 and 112 in which switch chips 141 and 151 are incorporated. By adopting this configuration, according to the first embodiment, since the virtual machines 111 and 112 can incorporate the switch chips 141 and 151 as pass-through devices, the switch modules 140 and 150 are connected to the switch chip 141. , 151 need not be provided with a CPU for controlling the relay processing. That is, according to the first embodiment, since the CPU in the switch module mounted on the blade server 100 can be deleted, it is possible to achieve the effect of realizing power saving and prevention of heat generation.

Second Embodiment FIG. 4 is a block diagram showing a configuration of a blade server 200 according to a second embodiment of the present invention. As shown in FIG. 4, the blade server 200 has a configuration in which the CPU blades 110 and 120 construct one virtual machine 111 and 121, respectively, and the PCIe, compared to the blade server 100 described in the first embodiment. The connection configuration of the switch 133 is different.

  In the present embodiment, a blade server 200 in which the CPU blade 110 and the CPU blade 120 have a redundant configuration will be described. That is, the blade server 200 according to the second embodiment constructs two systems of active switch modules by making both the CPU blade 110 and the CPU blade 120 active.

  The operation of the blade server 200 according to the second embodiment will be described with reference to FIG. In FIG. 5, the process indicated by the same reference numeral as that shown in FIG. 2 is the same process as the process described in the first embodiment, and thus detailed description thereof is omitted.

  When the status detection circuit 138 detects the mounting state of the midplane 130 to the connector, here, the mounting of the CPU blade 110 and the CPU blade 120, the CPU blade setting circuit 136 of the blade server 200 detects the CPU blade 110 and the CPU blade 120. Both are set to the active system (S301). Then, the PCIe setting circuit 137 sends an Enable signal to both the PCIe repeater 131 connected to the PCIe root port 115 of the CPU blade 110 and the PCIe repeater 132 connected to the PCIe root port 125 of the CPU blade 120 ( S302).

  Subsequently, the PCIe setting circuit 137 sends a CONFIG signal indicating that the PCIe repeater 131 and the switch chip 141 are connected to the PCIe switch 133 and that the PCIe repeater 132 and the switch chip 151 are connected (S303). .

  Subsequently, the CPU blade setting circuit 136 notifies the presence of the switch modules 140 and 150 together with the CPU blades 110 and 120 (S304).

  In response to the notification, the CPU blades 110 and 120 configure the virtual machines 111 and 121, respectively, as described in the first embodiment with reference to S107 to S111 in FIG. That is, since the CPU blades 110 and 120 are both active systems and have one switch module connected to each of them, the virtual machines 111 and 121 are constructed one by one. At this time, in the CPU blade 110, the virtual machine 111 incorporates the switch chip 141 as a pass-through device, and in the CPU blade 120, the virtual machine 121 incorporates the switch chip 151 as a pass-through device.

  Through the above operation, both the switch modules 140 and 150 become active at the hardware level.

  Further, in order for the CPU blade 110 and the CPU blade 120 to have a redundant configuration as described above, a redundant configuration of a LAN path between the virtual machines 111 and 121 and the switch modules 140 and 150 is necessary.

  Here, the LAN controller 116 has a function of controlling a plurality of ports by a driver, for example, a function of redundancy control by bonding (teaming). The LAN controller 116 connects to port B (path on the switch module 150 via port 1B), for example, when disconnection of the connection of port A (path on the switch module 140 side via port 1A) is detected. Switch.

  Specifically, the LAN controller 116 switches the connection between the port 1B and the port 1B of the switch chip 151 when the path connecting the port 1A and the port 1A of the switch chip 141 is disconnected. Similarly, when the path where the port 2A and the port 2A of the switch chip 141 are connected is disconnected, the LAN controller 126 switches to the connection between the port 2B and the port 2B of the switch chip 151. As described above, the blade server 200 has a redundant configuration of LAN paths between the virtual machines 111 and 121 and the switch modules 140 and 150.

  As described above, according to the second embodiment, in the blade server 200, the CPU blades 110 and 120 are both active systems, and the LAN paths between the virtual machines 111 and 121 and the switch chips 141 and 151 constructed by the CPU blades 110 and 120, respectively. A redundant configuration with two systems is also constructed. By adopting this configuration, according to the second embodiment, for example, when an error occurs in the operating CPU blade 110 and the operation is switched to the CPU blade 120, the virtual machine 121 in the CPU blade 120 is also in the active state. Therefore, there is an effect that switching can be performed immediately.

Third Embodiment FIG. 6 is a block diagram illustrating a configuration of a server device 300 according to a third embodiment. The server apparatus 300 includes one or more CPU blades 310 each mounted with a CPU, one or more switch modules 330 that connect the own device to an external device, and a midplane that interconnects the CPU blades 310 and the switch module 330. 320.

  The midplane 320 includes a control circuit 321 that controls connection between the CPU blade 310 and the switch module 330 in accordance with a preset redundant configuration of the switch module 330.

  The CPU blade 310 includes a virtual machine generation unit 311 that generates a virtual machine incorporating the switch module 330 that is communicably connected by the control circuit 321.

  The control circuit 321 includes the SWM controller 134 in the first embodiment, and the virtual machine generation unit 311 also includes the virtual machine monitor 113.

  By adopting the above configuration, according to the third embodiment, since the CPU blade 310 can control the switch module 330, the switch module 330 does not need to be equipped with a CPU. Therefore, an effect that an increase in power consumption in the switch module 330 can be prevented is obtained.

  In each embodiment described above, each part of the CPU blade shown in FIG. 1 and the like can be realized by a dedicated HW (HardWare) (electronic circuit). Further, at least the virtual machine and the virtual machine monitor can be regarded as a function unit (software module) of the software program. However, the division of each part shown in these drawings is a configuration for convenience of explanation, and various configurations can be assumed for mounting. An example of the hardware environment in this case will be described with reference to FIG.

  FIG. 7 is a diagram illustrating an example of the configuration of the CPU blade 900 included in the blade server according to the exemplary embodiment of the present invention. That is, FIG. 7 is a configuration of a computer capable of realizing the CPU blade shown in FIG. 1 and the like, and represents a hardware environment capable of realizing each function in the above-described embodiment.

For example, the CPU blade 900 shown in FIG.
CPU 901,
ROM (Read_Only_Memory) 902,
RAM (Random_Access_Memory) 903,
-Hard disk 904 (storage device),
A communication interface 905 (Interface: hereinafter referred to as “I / F”) with an external device or an internal device,
A reader / writer 908 capable of reading and writing data stored in a storage medium 907 such as a CD-ROM (Compact_Disc_Read_Only_Memory)
The CPU blade 900 is a general computer in which these configurations are connected via a bus 906 (communication line).

  A part of the present invention described by taking the above embodiment as an example supplies a computer program capable of realizing the functions of a virtual machine and a virtual machine monitor to the CPU blade 900 shown in FIG.

  Part of the present invention is then achieved by reading the computer program into the hardware CPU 901 for interpretation and execution. The computer program supplied to the apparatus may be stored in a readable / writable volatile storage memory (RAM 903) or a nonvolatile storage device such as the hard disk 904.

  In the above case, a general procedure can be adopted as a method for supplying the computer program into the hardware. As the procedure, for example, there is a method of installing in the apparatus via various storage media 907 such as a CD-ROM. In such a case, it can be understood that a part of the present invention is constituted by a code constituting the computer program or a storage medium 907 in which the code is stored.

  The present invention has been described above using the above-described embodiment as an exemplary example. However, the present invention is not limited to the above-described embodiment. That is, the present invention can apply various modes that can be understood by those skilled in the art within the scope of the present invention.

100, 200 Blade server 110, 120 CPU blade 113, 123 Virtual machine monitor 111, 112, 121, 122 Virtual machine 115, 125 PCIe root port 116, 126 LAN controller 117, 127 Management LAN
118, 128 I2C master 130 Midplane 131, 132 PCIe repeater 133 PCIe switch 134 SWM controller 135 Alive monitoring circuit 136 CPU blade setting circuit 137 PCIe setting circuit 138 Status detection circuit 140, 150 Switch module 141, 151 Switch chip

Claims (7)

1 or a plurality of CPU blades each mounted with a CPU, one or a plurality of switch modules for connecting the own device to an external device, and a midplane for interconnecting the CPU blades and the switch modules,
The midplane is
According to a redundant configuration of the switch module set in advance, a control circuit for controlling the connection between the CPU blade and the switch module,
The CPU blade is
The server apparatus which has a virtual machine production | generation means which produces | generates the virtual machine incorporating the said switch module connected so that communication was possible by the said control circuit. The virtual machine generation means of the CPU blade detects a switch chip mounted on the switch module that is communicably connected by the control circuit, and incorporates the detected switch chip as a pass-through device The server device according to claim 1. The server device according to claim 1, wherein the virtual machine generation unit of the CPU blade generates the virtual machines for the number of the switch modules connected to be communicable by the control circuit. The control circuit of the midplane is
The server device according to any one of claims 1 to 3, wherein at least one of the switch modules is connected to the CPU blade that operates as an active system so as to be communicable. The control circuit of the midplane is
Notifying the CPU blade operating as an active system of the presence of the switch module connected to be communicable,
The CPU blade is
5. The server device according to claim 1, wherein a switch chip mounted on the switch module connected to be communicable is set to be usable by a hot swap function in response to the notification. The control circuit of the midplane is
In response to an error of the CPU blade operating as an active system, the CPU blade waiting as a standby system is notified of the presence of a switch module that is communicably connected to the CPU blade operating as the active system,
The server device according to any one of claims 1 to 5, wherein the CPU blade that is on standby as the standby system and the switch module that has notified the presence are communicably connected. In a server apparatus comprising one or more CPU blades each mounted with a CPU, one or more switch modules for connecting the CPU to an external device, and a midplane for interconnecting the CPU blades and the switch modules ,
The midplane is
According to the preset redundant configuration of the switch module, control the connection between the CPU blade and the switch module,
The CPU blade is
A switch module control method for generating a virtual machine in which the switch module is connected so as to be communicable by the midplane.

Images